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Core: rearrange OrVariableToX86Reg parameters

This commit is contained in:
zilmar 2022-11-07 16:18:54 +10:30
parent 697397f1dd
commit ce939100c5
3 changed files with 14 additions and 14 deletions
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24
Source/Project64-core/N64System/Recompiler/x86/x86RecompilerOps.cpp
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@ -5756,13 +5756,13 @@ void CX86RecompilerOps::SPECIAL_OR()
if (g_System->b32BitCore()) if (g_System->b32BitCore())
{ {
Map_GPR_32bit(m_Opcode.rd, true, KnownReg); Map_GPR_32bit(m_Opcode.rd, true, KnownReg);
m_Assembler.OrVariableToX86Reg(&_GPR[UnknownReg].W[0], CRegName::GPR_Lo[UnknownReg], GetMipsRegMapLo(m_Opcode.rd)); m_Assembler.OrVariableToX86Reg(GetMipsRegMapLo(m_Opcode.rd), &_GPR[UnknownReg].W[0], CRegName::GPR_Lo[UnknownReg]);
} }
else else
{ {
Map_GPR_64bit(m_Opcode.rd, KnownReg); Map_GPR_64bit(m_Opcode.rd, KnownReg);
m_Assembler.OrVariableToX86Reg(&_GPR[UnknownReg].W[1], CRegName::GPR_Hi[UnknownReg], GetMipsRegMapHi(m_Opcode.rd)); m_Assembler.OrVariableToX86Reg(GetMipsRegMapHi(m_Opcode.rd), &_GPR[UnknownReg].W[1], CRegName::GPR_Hi[UnknownReg]);
m_Assembler.OrVariableToX86Reg(&_GPR[UnknownReg].W[0], CRegName::GPR_Lo[UnknownReg], GetMipsRegMapLo(m_Opcode.rd)); m_Assembler.OrVariableToX86Reg(GetMipsRegMapLo(m_Opcode.rd), &_GPR[UnknownReg].W[0], CRegName::GPR_Lo[UnknownReg]);
} }
} }
} }
@ -5771,13 +5771,13 @@ void CX86RecompilerOps::SPECIAL_OR()
if (g_System->b32BitCore()) if (g_System->b32BitCore())
{ {
Map_GPR_32bit(m_Opcode.rd, true, m_Opcode.rt); Map_GPR_32bit(m_Opcode.rd, true, m_Opcode.rt);
m_Assembler.OrVariableToX86Reg(&_GPR[m_Opcode.rs].W[0], CRegName::GPR_Lo[m_Opcode.rs], GetMipsRegMapLo(m_Opcode.rd)); m_Assembler.OrVariableToX86Reg(GetMipsRegMapLo(m_Opcode.rd), &_GPR[m_Opcode.rs].W[0], CRegName::GPR_Lo[m_Opcode.rs]);
} }
else else
{ {
Map_GPR_64bit(m_Opcode.rd, m_Opcode.rt); Map_GPR_64bit(m_Opcode.rd, m_Opcode.rt);
m_Assembler.OrVariableToX86Reg(&_GPR[m_Opcode.rs].W[1], CRegName::GPR_Hi[m_Opcode.rs], GetMipsRegMapHi(m_Opcode.rd)); m_Assembler.OrVariableToX86Reg(GetMipsRegMapHi(m_Opcode.rd), &_GPR[m_Opcode.rs].W[1], CRegName::GPR_Hi[m_Opcode.rs]);
m_Assembler.OrVariableToX86Reg(&_GPR[m_Opcode.rs].W[0], CRegName::GPR_Lo[m_Opcode.rs], GetMipsRegMapLo(m_Opcode.rd)); m_Assembler.OrVariableToX86Reg(GetMipsRegMapLo(m_Opcode.rd), &_GPR[m_Opcode.rs].W[0], CRegName::GPR_Lo[m_Opcode.rs]);
} }
} }
if (g_System->bFastSP() && m_Opcode.rd == 29) if (g_System->bFastSP() && m_Opcode.rd == 29)
@ -6092,13 +6092,13 @@ void CX86RecompilerOps::SPECIAL_NOR()
if (g_System->b32BitCore()) if (g_System->b32BitCore())
{ {
Map_GPR_32bit(m_Opcode.rd, true, KnownReg); Map_GPR_32bit(m_Opcode.rd, true, KnownReg);
m_Assembler.OrVariableToX86Reg(&_GPR[UnknownReg].W[0], CRegName::GPR_Lo[UnknownReg], GetMipsRegMapLo(m_Opcode.rd)); m_Assembler.OrVariableToX86Reg(GetMipsRegMapLo(m_Opcode.rd), &_GPR[UnknownReg].W[0], CRegName::GPR_Lo[UnknownReg]);
} }
else else
{ {
Map_GPR_64bit(m_Opcode.rd, KnownReg); Map_GPR_64bit(m_Opcode.rd, KnownReg);
m_Assembler.OrVariableToX86Reg(&_GPR[UnknownReg].W[1], CRegName::GPR_Hi[UnknownReg], GetMipsRegMapHi(m_Opcode.rd)); m_Assembler.OrVariableToX86Reg(GetMipsRegMapHi(m_Opcode.rd), &_GPR[UnknownReg].W[1], CRegName::GPR_Hi[UnknownReg]);
m_Assembler.OrVariableToX86Reg(&_GPR[UnknownReg].W[0], CRegName::GPR_Lo[UnknownReg], GetMipsRegMapLo(m_Opcode.rd)); m_Assembler.OrVariableToX86Reg(GetMipsRegMapLo(m_Opcode.rd), &_GPR[UnknownReg].W[0], CRegName::GPR_Lo[UnknownReg]);
} }
} }
} }
@ -6107,13 +6107,13 @@ void CX86RecompilerOps::SPECIAL_NOR()
if (g_System->b32BitCore()) if (g_System->b32BitCore())
{ {
Map_GPR_32bit(m_Opcode.rd, true, m_Opcode.rt); Map_GPR_32bit(m_Opcode.rd, true, m_Opcode.rt);
m_Assembler.OrVariableToX86Reg(&_GPR[m_Opcode.rs].W[0], CRegName::GPR_Lo[m_Opcode.rs], GetMipsRegMapLo(m_Opcode.rd)); m_Assembler.OrVariableToX86Reg(GetMipsRegMapLo(m_Opcode.rd), &_GPR[m_Opcode.rs].W[0], CRegName::GPR_Lo[m_Opcode.rs]);
} }
else else
{ {
Map_GPR_64bit(m_Opcode.rd, m_Opcode.rt); Map_GPR_64bit(m_Opcode.rd, m_Opcode.rt);
m_Assembler.OrVariableToX86Reg(&_GPR[m_Opcode.rs].W[1], CRegName::GPR_Hi[m_Opcode.rs], GetMipsRegMapHi(m_Opcode.rd)); m_Assembler.OrVariableToX86Reg(GetMipsRegMapHi(m_Opcode.rd), &_GPR[m_Opcode.rs].W[1], CRegName::GPR_Hi[m_Opcode.rs]);
m_Assembler.OrVariableToX86Reg(&_GPR[m_Opcode.rs].W[0], CRegName::GPR_Lo[m_Opcode.rs], GetMipsRegMapLo(m_Opcode.rd)); m_Assembler.OrVariableToX86Reg(GetMipsRegMapLo(m_Opcode.rd), &_GPR[m_Opcode.rs].W[0], CRegName::GPR_Lo[m_Opcode.rs]);
} }
} }

2
Source/Project64-core/N64System/Recompiler/x86/x86ops.cpp
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@ -1824,7 +1824,7 @@ void CX86Ops::OrConstToX86Reg(x86Reg Reg, uint32_t Const)
} }
} }
void CX86Ops::OrVariableToX86Reg(void * Variable, const char * VariableName, x86Reg Reg) void CX86Ops::OrVariableToX86Reg(x86Reg Reg, void * Variable, const char * VariableName)
{ {
CodeLog(" or %s, dword ptr [%s]", x86_Name(Reg), VariableName); CodeLog(" or %s, dword ptr [%s]", x86_Name(Reg), VariableName);
switch (Reg) switch (Reg)

2
Source/Project64-core/N64System/Recompiler/x86/x86ops.h
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@ -163,7 +163,7 @@ public:
void NotX86Reg(x86Reg Reg); void NotX86Reg(x86Reg Reg);
void OrConstToVariable(void * Variable, const char * VariableName, uint32_t Const); void OrConstToVariable(void * Variable, const char * VariableName, uint32_t Const);
void OrConstToX86Reg(x86Reg Reg, uint32_t Const); void OrConstToX86Reg(x86Reg Reg, uint32_t Const);
void OrVariableToX86Reg(void * Variable, const char * VariableName, x86Reg Reg); void OrVariableToX86Reg(x86Reg Reg, void * Variable, const char * VariableName);
void OrX86RegToVariable(void * Variable, const char * VariableName, x86Reg Reg); void OrX86RegToVariable(void * Variable, const char * VariableName, x86Reg Reg);
void OrX86RegToX86Reg(x86Reg Destination, x86Reg Source); void OrX86RegToX86Reg(x86Reg Destination, x86Reg Source);
void Push(x86Reg Reg); void Push(x86Reg Reg);