diff --git a/Source/Project64/N64 System.h b/Source/Project64/N64 System.h index 658c2b8b5..a26dcd4c8 100644 --- a/Source/Project64/N64 System.h +++ b/Source/Project64/N64 System.h @@ -18,6 +18,8 @@ class CNotification; #include "N64 System/Rom Information Class.h" #include "N64 System/Speed Limitor Class.h" #include "N64 System/Mips/OpCode.h" +#include "N64 System/Mips/OpCode Analysis Class.h" +#include "N64 System/Recompiler/X86ops.h" #include "N64 System/Mips/Register Class.h" #include "N64 System/Mips/TranslateVaddr.h" #include "N64 System/Mips/TLB Class.h" @@ -38,7 +40,12 @@ class CNotification; //Recompiler #include "N64 System/Recompiler/Recompiler Memory.h" +#include "N64 System/Recompiler/Reg Info.h" #include "N64 System/Recompiler/Recompiler Ops.h" +#include "N64 System/Recompiler/Exit Info.h" +#include "N64 System/Recompiler/Jump Info.h" +#include "N64 System/Recompiler/Code Section.h" +#include "N64 System/Recompiler/Code Block.h" #include "N64 System/Recompiler/Section Info.h" #include "N64 System/Recompiler/Function Info.h" #include "N64 System/Recompiler/Function Map Class.h" diff --git a/Source/Project64/N64 System/C Core/C Core Interface.cpp b/Source/Project64/N64 System/C Core/C Core Interface.cpp index 1e4906886..904630eca 100644 --- a/Source/Project64/N64 System/C Core/C Core Interface.cpp +++ b/Source/Project64/N64 System/C Core/C Core Interface.cpp @@ -672,10 +672,13 @@ void SyncToPC (void) { BOOL ClearRecompCodeProtectMem ( DWORD Address, int length ) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix if (_Recompiler) { return _Recompiler->ClearRecompCode_Phys(Address,length,CRecompiler::Remove_ProtectedMem); } +#endif return false; } @@ -683,7 +686,10 @@ BOOL ClearRecompCodeInitialCode ( void ) { if (_Recompiler) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix return _Recompiler->ClearRecompCode_Virt(0x80000000,0x200,CRecompiler::Remove_InitialCode); +#endif } return false; } \ No newline at end of file diff --git a/Source/Project64/N64 System/C Core/C Core.h b/Source/Project64/N64 System/C Core/C Core.h index c57c62506..65e358254 100644 --- a/Source/Project64/N64 System/C Core/C Core.h +++ b/Source/Project64/N64 System/C Core/C Core.h @@ -18,7 +18,7 @@ void InitializeCPUCore ( void ); //from exception.h void _fastcall DoTLBMiss ( BOOL DelaySlot, DWORD BadVaddr ); -extern enum STEP_TYPE NextInstruction; +//extern enum STEP_TYPE NextInstruction; #ifdef __cplusplus } diff --git a/Source/Project64/N64 System/C Core/CPU.cpp b/Source/Project64/N64 System/C Core/CPU.cpp index fd67a4045..e97a49376 100644 --- a/Source/Project64/N64 System/C Core/CPU.cpp +++ b/Source/Project64/N64 System/C Core/CPU.cpp @@ -8,14 +8,14 @@ //DWORD MemoryStack; DWORD JumpToLocation; -R4300iOp_FUNC * R4300i_Opcode; +//R4300iOp_FUNC * R4300i_Opcode; void InitializeCPUCore ( void ) { LARGE_INTEGER PerformanceFrequency; //R4300i_Opcode = R4300iOp::BuildInterpreter(); - R4300i_Opcode = R4300iOp32::BuildInterpreter(); + //R4300i_Opcode = R4300iOp32::BuildInterpreter(); CurrentFrame = 0; QueryPerformanceFrequency(&PerformanceFrequency); @@ -57,358 +57,6 @@ void InitializeCPUCore ( void ) } -int DelaySlotEffectsJump (DWORD JumpPC) { - OPCODE Command; - - if (!_MMU->LW_VAddr(JumpPC, Command.Hex)) { return TRUE; } - - switch (Command.op) { - case R4300i_SPECIAL: - switch (Command.funct) { - case R4300i_SPECIAL_JR: return DelaySlotEffectsCompare(JumpPC,Command.rs,0); - case R4300i_SPECIAL_JALR: return DelaySlotEffectsCompare(JumpPC,Command.rs,31); - } - break; - case R4300i_REGIMM: - switch (Command.rt) { - case R4300i_REGIMM_BLTZ: - case R4300i_REGIMM_BGEZ: - case R4300i_REGIMM_BLTZL: - case R4300i_REGIMM_BGEZL: - case R4300i_REGIMM_BLTZAL: - case R4300i_REGIMM_BGEZAL: - return DelaySlotEffectsCompare(JumpPC,Command.rs,0); - } - break; - case R4300i_JAL: - case R4300i_SPECIAL_JALR: return DelaySlotEffectsCompare(JumpPC,31,0); break; - case R4300i_J: return FALSE; - case R4300i_BEQ: - case R4300i_BNE: - case R4300i_BLEZ: - case R4300i_BGTZ: - return DelaySlotEffectsCompare(JumpPC,Command.rs,Command.rt); - case R4300i_CP1: - switch (Command.fmt) { - case R4300i_COP1_BC: - switch (Command.ft) { - case R4300i_COP1_BC_BCF: - case R4300i_COP1_BC_BCT: - case R4300i_COP1_BC_BCFL: - case R4300i_COP1_BC_BCTL: - { - int EffectDelaySlot; - OPCODE NewCommand; - - if (!_MMU->LW_VAddr(JumpPC + 4, NewCommand.Hex)) { return TRUE; } - - EffectDelaySlot = FALSE; - if (NewCommand.op == R4300i_CP1) { - if (NewCommand.fmt == R4300i_COP1_S && (NewCommand.funct & 0x30) == 0x30 ) { - EffectDelaySlot = TRUE; - } - if (NewCommand.fmt == R4300i_COP1_D && (NewCommand.funct & 0x30) == 0x30 ) { - EffectDelaySlot = TRUE; - } - } - return EffectDelaySlot; - } - break; - } - break; - } - break; - case R4300i_BEQL: - case R4300i_BNEL: - case R4300i_BLEZL: - case R4300i_BGTZL: - return DelaySlotEffectsCompare(JumpPC,Command.rs,Command.rt); - } - return TRUE; -} - -void DoSomething ( void ) { - if (CPU_Action.CloseCPU) { - return; - } - - if (CPU_Action.SoftReset) - { - CPU_Action.SoftReset = false; - - _SystemTimer->SetTimer(CSystemTimer::SoftResetTimer,0x3000000,false); - ShowCFB(); - _Reg->FAKE_CAUSE_REGISTER |= CAUSE_IP4; - CheckInterrupts(); - _Plugins->Gfx()->SoftReset(); - } - - if (CPU_Action.GenerateInterrupt) - { - CPU_Action.GenerateInterrupt = FALSE; - _Reg->MI_INTR_REG |= CPU_Action.InterruptFlag; - CPU_Action.InterruptFlag = 0; - CheckInterrupts(); - } - if (CPU_Action.CheckInterrupts) { - CPU_Action.CheckInterrupts = FALSE; - CheckInterrupts(); - } - if (CPU_Action.ProfileStartStop) { - CPU_Action.ProfileStartStop = FALSE; - ResetTimer(); - } - if (CPU_Action.ProfileResetStats) { - CPU_Action.ProfileResetStats = FALSE; - ResetTimer(); - } - if (CPU_Action.ProfileGenerateLogs) { - CPU_Action.ProfileGenerateLogs = FALSE; - GenerateProfileLog(); - } - - if (CPU_Action.DoInterrupt) { - CPU_Action.DoInterrupt = FALSE; - if (DoIntrException(FALSE) && !CPU_Action.InterruptExecuted) - { - CPU_Action.InterruptExecuted = TRUE; - ClearRecompCodeInitialCode(); - } - } - - if (CPU_Action.ChangeWindow) { - CPU_Action.ChangeWindow = FALSE; - ChangeFullScreenFunc(); - } - - if (CPU_Action.Pause) { - PauseExecution(); - CPU_Action.Pause = FALSE; - } - if (CPU_Action.ChangePlugin) { - ChangePluginFunc(); - CPU_Action.ChangePlugin = FALSE; - } - if (CPU_Action.GSButton) { - ApplyGSButtonCheats(); - CPU_Action.GSButton = FALSE; - } - - CPU_Action.DoSomething = FALSE; - - if (CPU_Action.SaveState) { - //test if allowed - CPU_Action.SaveState = FALSE; - if (!Machine_SaveState()) { - CPU_Action.SaveState = TRUE; - CPU_Action.DoSomething = TRUE; - } - } - if (CPU_Action.RestoreState) { - CPU_Action.RestoreState = FALSE; - Machine_LoadState(); - } - if (CPU_Action.DoInterrupt == TRUE) { CPU_Action.DoSomething = TRUE; } -} - -void InPermLoop (void) { - // *** Changed ***/ - if (CPU_Action.DoInterrupt) - { - CPU_Action.DoSomething = TRUE; - return; - } - - //if (CPU_Type == CPU_SyncCores) { SyncRegisters.CP0[9] +=5; } - - /* Interrupts enabled */ - if (( _Reg->STATUS_REGISTER & STATUS_IE ) == 0 ) { goto InterruptsDisabled; } - if (( _Reg->STATUS_REGISTER & STATUS_EXL ) != 0 ) { goto InterruptsDisabled; } - if (( _Reg->STATUS_REGISTER & STATUS_ERL ) != 0 ) { goto InterruptsDisabled; } - if (( _Reg->STATUS_REGISTER & 0xFF00) == 0) { goto InterruptsDisabled; } - - /* check sound playing */ - _N64System->SyncToAudio(); - - /* check RSP running */ - /* check RDP running */ - - if (*_NextTimer > 0) { - //_Reg->COUNT_REGISTER += *_Timer + 1; - //if (CPU_Type == CPU_SyncCores) { SyncRegisters.CP0[9] += Timers.Timer + 1; } - *_NextTimer = -1; - } - return; - -InterruptsDisabled: - if (UpdateScreen != NULL) { UpdateScreen(); } - //CurrentFrame = 0; - //CurrentPercent = 0; - //DisplayFPS(); - DisplayError(GS(MSG_PERM_LOOP)); - StopEmulation(); - -} - -int DelaySlotEffectsCompare (DWORD PC, DWORD Reg1, DWORD Reg2) { - OPCODE Command; - - if (!_MMU->LW_VAddr(PC + 4, Command.Hex)) { - //DisplayError("Failed to load word 2"); - //ExitThread(0); - return TRUE; - } - - switch (Command.op) { - case R4300i_SPECIAL: - switch (Command.funct) { - case R4300i_SPECIAL_SLL: - case R4300i_SPECIAL_SRL: - case R4300i_SPECIAL_SRA: - case R4300i_SPECIAL_SLLV: - case R4300i_SPECIAL_SRLV: - case R4300i_SPECIAL_SRAV: - case R4300i_SPECIAL_MFHI: - case R4300i_SPECIAL_MTHI: - case R4300i_SPECIAL_MFLO: - case R4300i_SPECIAL_MTLO: - case R4300i_SPECIAL_DSLLV: - case R4300i_SPECIAL_DSRLV: - case R4300i_SPECIAL_DSRAV: - case R4300i_SPECIAL_ADD: - case R4300i_SPECIAL_ADDU: - case R4300i_SPECIAL_SUB: - case R4300i_SPECIAL_SUBU: - case R4300i_SPECIAL_AND: - case R4300i_SPECIAL_OR: - case R4300i_SPECIAL_XOR: - case R4300i_SPECIAL_NOR: - case R4300i_SPECIAL_SLT: - case R4300i_SPECIAL_SLTU: - case R4300i_SPECIAL_DADD: - case R4300i_SPECIAL_DADDU: - case R4300i_SPECIAL_DSUB: - case R4300i_SPECIAL_DSUBU: - case R4300i_SPECIAL_DSLL: - case R4300i_SPECIAL_DSRL: - case R4300i_SPECIAL_DSRA: - case R4300i_SPECIAL_DSLL32: - case R4300i_SPECIAL_DSRL32: - case R4300i_SPECIAL_DSRA32: - if (Command.rd == 0) { return FALSE; } - if (Command.rd == Reg1) { return TRUE; } - if (Command.rd == Reg2) { return TRUE; } - break; - case R4300i_SPECIAL_MULT: - case R4300i_SPECIAL_MULTU: - case R4300i_SPECIAL_DIV: - case R4300i_SPECIAL_DIVU: - case R4300i_SPECIAL_DMULT: - case R4300i_SPECIAL_DMULTU: - case R4300i_SPECIAL_DDIV: - case R4300i_SPECIAL_DDIVU: - break; - default: -#ifndef EXTERNAL_RELEASE - DisplayError("Does %s effect Delay slot at %X?",R4300iOpcodeName(Command.Hex,PC+4), PC); -#endif - return TRUE; - } - break; - case R4300i_CP0: - switch (Command.rs) { - case R4300i_COP0_MT: break; - case R4300i_COP0_MF: - if (Command.rt == 0) { return FALSE; } - if (Command.rt == Reg1) { return TRUE; } - if (Command.rt == Reg2) { return TRUE; } - break; - default: - if ( (Command.rs & 0x10 ) != 0 ) { - switch( Command.funct ) { - case R4300i_COP0_CO_TLBR: break; - case R4300i_COP0_CO_TLBWI: break; - case R4300i_COP0_CO_TLBWR: break; - case R4300i_COP0_CO_TLBP: break; - default: -#ifndef EXTERNAL_RELEASE - DisplayError("Does %s effect Delay slot at %X?\n6",R4300iOpcodeName(Command.Hex,PC+4), PC); -#endif - return TRUE; - } - } else { -#ifndef EXTERNAL_RELEASE - DisplayError("Does %s effect Delay slot at %X?\n7",R4300iOpcodeName(Command.Hex,PC+4), PC); -#endif - return TRUE; - } - } - break; - case R4300i_CP1: - switch (Command.fmt) { - case R4300i_COP1_MF: - if (Command.rt == 0) { return FALSE; } - if (Command.rt == Reg1) { return TRUE; } - if (Command.rt == Reg2) { return TRUE; } - break; - case R4300i_COP1_CF: break; - case R4300i_COP1_MT: break; - case R4300i_COP1_CT: break; - case R4300i_COP1_S: break; - case R4300i_COP1_D: break; - case R4300i_COP1_W: break; - case R4300i_COP1_L: break; -#ifndef EXTERNAL_RELEASE - default: - DisplayError("Does %s effect Delay slot at %X?",R4300iOpcodeName(Command.Hex,PC+4), PC); -#endif - return TRUE; - } - break; - case R4300i_ANDI: - case R4300i_ORI: - case R4300i_XORI: - case R4300i_LUI: - case R4300i_ADDI: - case R4300i_ADDIU: - case R4300i_SLTI: - case R4300i_SLTIU: - case R4300i_DADDI: - case R4300i_DADDIU: - case R4300i_LB: - case R4300i_LH: - case R4300i_LW: - case R4300i_LWL: - case R4300i_LWR: - case R4300i_LDL: - case R4300i_LDR: - case R4300i_LBU: - case R4300i_LHU: - case R4300i_LD: - case R4300i_LWC1: - case R4300i_LDC1: - if (Command.rt == 0) { return FALSE; } - if (Command.rt == Reg1) { return TRUE; } - if (Command.rt == Reg2) { return TRUE; } - break; - case R4300i_CACHE: break; - case R4300i_SB: break; - case R4300i_SH: break; - case R4300i_SW: break; - case R4300i_SWR: break; - case R4300i_SWL: break; - case R4300i_SWC1: break; - case R4300i_SDC1: break; - case R4300i_SD: break; - default: -#ifndef EXTERNAL_RELEASE - DisplayError("Does %s effect Delay slot at %X?",R4300iOpcodeName(Command.Hex,PC+4), PC); -#endif - return TRUE; - } - return FALSE; -} - #ifdef toremove void ChangeCompareTimer(void) { DWORD NextCompare = _Reg->COMPARE_REGISTER - _Reg->COUNT_REGISTER; diff --git a/Source/Project64/N64 System/C Core/CPU.h b/Source/Project64/N64 System/C Core/CPU.h index d7f9b48ec..2e3295fa4 100644 --- a/Source/Project64/N64 System/C Core/CPU.h +++ b/Source/Project64/N64 System/C Core/CPU.h @@ -20,10 +20,6 @@ #include "pif.h" #include "Sync Cpu.h" -#ifdef __cplusplus -extern "C" { -#endif - //extern int NextInstruction/*, ManualPaused*/; extern DWORD JumpToLocation; extern BOOL TestTimer; @@ -61,7 +57,3 @@ int DelaySlotEffectsCompare ( DWORD PC, DWORD Reg1, DWORD Reg2 ); int DelaySlotEffectsJump (DWORD JumpPC); void InPermLoop ( void ); void DisplayFPS ( void ); - -#ifdef __cplusplus -} -#endif diff --git a/Source/Project64/N64 System/C Core/Dma.cpp b/Source/Project64/N64 System/C Core/Dma.cpp index eefe311ba..fd5459d3c 100644 --- a/Source/Project64/N64 System/C Core/Dma.cpp +++ b/Source/Project64/N64 System/C Core/Dma.cpp @@ -169,7 +169,10 @@ void PI_DMA_WRITE (void) { } if (_Recompiler && _Recompiler->bSMM_PIDMA()) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix _Recompiler->ClearRecompCode_Phys(_Reg->PI_DRAM_ADDR_REG, _Reg->PI_WR_LEN_REG,CRecompiler::Remove_DMA); +#endif } _Reg->PI_STATUS_REG &= ~PI_STATUS_DMA_BUSY; _Reg->MI_INTR_REG |= MI_INTR_PI; diff --git a/Source/Project64/N64 System/C Core/Interpreter Ops 32.h b/Source/Project64/N64 System/C Core/Interpreter Ops 32.h index dee767bd5..182795bbe 100644 --- a/Source/Project64/N64 System/C Core/Interpreter Ops 32.h +++ b/Source/Project64/N64 System/C Core/Interpreter Ops 32.h @@ -26,6 +26,7 @@ public: static void _fastcall LH ( void ); static void _fastcall LWL ( void ); static void _fastcall LW ( void ); + static void _fastcall LW_LOG ( void ); static void _fastcall LBU ( void ); static void _fastcall LHU ( void ); static void _fastcall LWR ( void ); diff --git a/Source/Project64/N64 System/C Core/Recompiler Fpu Ops.cpp b/Source/Project64/N64 System/C Core/Recompiler Fpu Ops.cpp index 2f4e0204b..b545fd593 100644 --- a/Source/Project64/N64 System/C Core/Recompiler Fpu Ops.cpp +++ b/Source/Project64/N64 System/C Core/Recompiler Fpu Ops.cpp @@ -1,3 +1,4 @@ +#ifdef tofix /* * Project 64 - A Nintendo 64 emulator. * @@ -1165,4 +1166,6 @@ void Compile_R4300i_COP1_L_CVT_D (CCodeSection * Section) { ChangeFPURegFormat(Section,m_CompileOpcode.fd,CRegInfo::FPU_Qword,CRegInfo::FPU_Double,CRegInfo::RoundDefault); } +#endif + #endif \ No newline at end of file diff --git a/Source/Project64/N64 System/C Core/Registers.cpp b/Source/Project64/N64 System/C Core/Registers.cpp index 0be9b5096..2282a962e 100644 --- a/Source/Project64/N64 System/C Core/Registers.cpp +++ b/Source/Project64/N64 System/C Core/Registers.cpp @@ -23,6 +23,7 @@ * should be forwarded to them so if they want them. * */ +#ifdef tofix #include #include #include "c core.h" @@ -1355,80 +1356,6 @@ void UnProtectGPR(CCodeSection * Section, DWORD Reg) { } UnMap_AllFPRs(Section); }*/ -void WriteBackRegisters (CCodeSection * Section) { - int count; - BOOL bEdiZero = FALSE; - BOOL bEsiSign = FALSE; - /*** coming soon ***/ - BOOL bEaxGprLo = FALSE; - BOOL bEbxGprHi = FALSE; - for (count = 1; count < 10; count ++) { Section->x86Protected(count) = FALSE; } - for (count = 1; count < 10; count ++) { UnMap_X86reg (Section, count); } - - /*************************************/ - - for (count = 1; count < 32; count ++) { - switch (Section->MipsRegState(count)) { - case CRegInfo::STATE_UNKNOWN: break; - case CRegInfo::STATE_CONST_32: - if (!bEdiZero && (!Section->MipsRegLo(count) || !(Section->MipsRegLo(count) & 0x80000000))) { - XorX86RegToX86Reg(x86_EDI, x86_EDI); - bEdiZero = TRUE; - } - if (!bEsiSign && (Section->MipsRegLo(count) & 0x80000000)) { - MoveConstToX86reg(0xFFFFFFFF, x86_ESI); - bEsiSign = TRUE; - } - - if ((Section->MipsRegLo(count) & 0x80000000) != 0) { - MoveX86regToVariable(x86_ESI,&_GPR[count].UW[1],GPR_NameHi[count]); - } else { - MoveX86regToVariable(x86_EDI,&_GPR[count].UW[1],GPR_NameHi[count]); - } - - if (Section->MipsRegLo(count) == 0) { - MoveX86regToVariable(x86_EDI,&_GPR[count].UW[0],GPR_NameLo[count]); - } else if (Section->MipsRegLo(count) == 0xFFFFFFFF) { - MoveX86regToVariable(x86_ESI,&_GPR[count].UW[0],GPR_NameLo[count]); - } else - MoveConstToVariable(Section->MipsRegLo(count),&_GPR[count].UW[0],GPR_NameLo[count]); - - Section->MipsRegState(count) = CRegInfo::STATE_UNKNOWN; - break; - case CRegInfo::STATE_CONST_64: - if (Section->MipsRegLo(count) == 0 || Section->MipsRegHi(count) == 0) { - XorX86RegToX86Reg(x86_EDI, x86_EDI); - bEdiZero = TRUE; - } - if (Section->MipsRegLo(count) == 0xFFFFFFFF || Section->MipsRegHi(count) == 0xFFFFFFFF) { - MoveConstToX86reg(0xFFFFFFFF, x86_ESI); - bEsiSign = TRUE; - } - - if (Section->MipsRegHi(count) == 0) { - MoveX86regToVariable(x86_EDI,&_GPR[count].UW[1],GPR_NameHi[count]); - } else if (Section->MipsRegLo(count) == 0xFFFFFFFF) { - MoveX86regToVariable(x86_ESI,&_GPR[count].UW[1],GPR_NameHi[count]); - } else { - MoveConstToVariable(Section->MipsRegHi(count),&_GPR[count].UW[1],GPR_NameHi[count]); - } - - if (Section->MipsRegLo(count) == 0) { - MoveX86regToVariable(x86_EDI,&_GPR[count].UW[0],GPR_NameLo[count]); - } else if (Section->MipsRegLo(count) == 0xFFFFFFFF) { - MoveX86regToVariable(x86_ESI,&_GPR[count].UW[0],GPR_NameLo[count]); - } else { - MoveConstToVariable(Section->MipsRegLo(count),&_GPR[count].UW[0],GPR_NameLo[count]); - } - Section->MipsRegState(count) = CRegInfo::STATE_UNKNOWN; - break; -#ifndef EXTERNAL_RELEASE - default: - DisplayError("Unknown State: %d\nin WriteBackRegisters",Section->MipsRegState(count)); -#endif - } - } - UnMap_AllFPRs(Section); -} +#endif \ No newline at end of file diff --git a/Source/Project64/N64 System/C Core/Registers.h b/Source/Project64/N64 System/C Core/Registers.h index 2705862f9..ffbdec92e 100644 --- a/Source/Project64/N64 System/C Core/Registers.h +++ b/Source/Project64/N64 System/C Core/Registers.h @@ -226,7 +226,6 @@ void SetupRegisters ( N64_REGISTERS * n64_Registers ); } #endif -#endif BOOL Is8BitReg ( int x86Reg); void ChangeFPURegFormat ( CCodeSection * Section, int Reg, CRegInfo::FPU_STATE OldFormat, CRegInfo::FPU_STATE NewFormat, CRegInfo::FPU_ROUND RoundingModel ); @@ -245,3 +244,5 @@ BOOL UnMap_X86reg ( CCodeSection * Section, DWORD x86Reg ); void UnProtectGPR ( CCodeSection * Section, DWORD Reg ); void WriteBackRegisters ( CCodeSection * Section ); void FixRoundModel ( CCodeSection * Section, CRegInfo::FPU_ROUND RoundMethod ); + +#endif diff --git a/Source/Project64/N64 System/C Core/X86.cpp b/Source/Project64/N64 System/C Core/X86.cpp index 5a9ac1b04..3337f05ef 100644 --- a/Source/Project64/N64 System/C Core/X86.cpp +++ b/Source/Project64/N64 System/C Core/X86.cpp @@ -1,3 +1,5 @@ +#ifdef tofix + /* * Project 64 - A Nintendo 64 emulator. * @@ -3009,3 +3011,5 @@ void * GetAddressOf(int value, ...) { return Address; } + +#endif diff --git a/Source/Project64/N64 System/C Core/X86.h b/Source/Project64/N64 System/C Core/X86.h index 2233d33be..e769524bd 100644 --- a/Source/Project64/N64 System/C Core/X86.h +++ b/Source/Project64/N64 System/C Core/X86.h @@ -1,3 +1,5 @@ +#ifdef toremove + /* * Project 64 - A Nintendo 64 emulator. * @@ -281,3 +283,5 @@ void fpuSubRegPop ( int x86reg ); #ifdef __cplusplus } #endif + +#endif \ No newline at end of file diff --git a/Source/Project64/N64 System/C Core/r4300i Commands.cpp b/Source/Project64/N64 System/C Core/r4300i Commands.cpp index 228593231..629afa9b9 100644 --- a/Source/Project64/N64 System/C Core/r4300i Commands.cpp +++ b/Source/Project64/N64 System/C Core/r4300i Commands.cpp @@ -28,6 +28,9 @@ #include "CPU.h" #include "debugger.h" +#define FPR_Type(Reg) (Reg) == R4300i_COP1_S ? "S" : (Reg) == R4300i_COP1_D ? "D" :\ + (Reg) == R4300i_COP1_W ? "W" : "L" + BOOL InR4300iCommandsWindow = FALSE; char CommandName[100]; diff --git a/Source/Project64/N64 System/C Core/x86 fpu.cpp b/Source/Project64/N64 System/C Core/x86 fpu.cpp index 38f5b89b9..69776bdae 100644 --- a/Source/Project64/N64 System/C Core/x86 fpu.cpp +++ b/Source/Project64/N64 System/C Core/x86 fpu.cpp @@ -1,3 +1,5 @@ +#ifdef tofix + /* * Project 64 - A Nintendo 64 emulator. * @@ -40,755 +42,7 @@ (Reg) == x86_ST6 ? "ST(6)" : (Reg) == x86_ST7 ? "ST(7)" :\ "Unknown x86fpu Register" -static char fpupop[2][2] = { - "", "p" -}; -void fpuAbs(void) { - CPU_Message(" fabs ST(0)"); - PUTDST16(RecompPos,0xE1D9); -} - -void fpuAddDword(void *Variable, const char * VariableName) { - CPU_Message(" fadd ST(0), dword ptr [%s]", VariableName); - PUTDST16(RecompPos,0x05D8); - PUTDST32(RecompPos,Variable); -} - -void fpuAddDwordRegPointer(int x86Pointer) { - CPU_Message(" fadd ST(0), dword ptr [%s]",x86_Name(x86Pointer)); - switch (x86Pointer) { - case x86_EAX: PUTDST16(RecompPos,0x00D8); break; - case x86_EBX: PUTDST16(RecompPos,0x03D8); break; - case x86_ECX: PUTDST16(RecompPos,0x01D8); break; - case x86_EDX: PUTDST16(RecompPos,0x02D8); break; - case x86_ESI: PUTDST16(RecompPos,0x06D8); break; - case x86_EDI: PUTDST16(RecompPos,0x07D8); break; - default: - DisplayError("fpuAddDwordRegPointer\nUnknown x86 Register"); - break; - } -} - -void fpuAddQword(void *Variable, const char * VariableName) { - CPU_Message(" fadd ST(0), qword ptr [%s]", VariableName); - PUTDST16(RecompPos,0x05DC); - PUTDST32(RecompPos,Variable); -} - -void fpuAddQwordRegPointer(int x86Pointer) { - CPU_Message(" fadd ST(0), qword ptr [%s]",x86_Name(x86Pointer)); - switch (x86Pointer) { - case x86_EAX: PUTDST16(RecompPos,0x00DC); break; - case x86_EBX: PUTDST16(RecompPos,0x03DC); break; - case x86_ECX: PUTDST16(RecompPos,0x01DC); break; - case x86_EDX: PUTDST16(RecompPos,0x02DC); break; - case x86_ESI: PUTDST16(RecompPos,0x06DC); break; - case x86_EDI: PUTDST16(RecompPos,0x07DC); break; - default: - DisplayError("fpuAddQwordRegPointer\nUnknown x86 Register"); - break; - } -} - -void fpuAddReg(int x86reg) { - CPU_Message(" fadd ST(0), %s",fpu_Name(x86reg)); - switch (x86reg) { - case x86_ST0: PUTDST16(RecompPos,0xC0D8); break; - case x86_ST1: PUTDST16(RecompPos,0xC1D8); break; - case x86_ST2: PUTDST16(RecompPos,0xC2D8); break; - case x86_ST3: PUTDST16(RecompPos,0xC3D8); break; - case x86_ST4: PUTDST16(RecompPos,0xC4D8); break; - case x86_ST5: PUTDST16(RecompPos,0xC5D8); break; - case x86_ST6: PUTDST16(RecompPos,0xC6D8); break; - case x86_ST7: PUTDST16(RecompPos,0xC7D8); break; - default: - DisplayError("fpuAddReg\nUnknown x86 Register"); - break; - } -} - -void fpuAddRegPop(int * StackPos, int x86reg) { - CPU_Message(" faddp ST(0), %s",fpu_Name(x86reg)); - *StackPos = (*StackPos + 1) & 7; - switch (x86reg) { - case x86_ST0: PUTDST16(RecompPos,0xC0DE); break; - case x86_ST1: PUTDST16(RecompPos,0xC1DE); break; - case x86_ST2: PUTDST16(RecompPos,0xC2DE); break; - case x86_ST3: PUTDST16(RecompPos,0xC3DE); break; - case x86_ST4: PUTDST16(RecompPos,0xC4DE); break; - case x86_ST5: PUTDST16(RecompPos,0xC5DE); break; - case x86_ST6: PUTDST16(RecompPos,0xC6DE); break; - case x86_ST7: PUTDST16(RecompPos,0xC7DE); break; - default: - DisplayError("fpuAddReg\nUnknown x86 Register"); - break; - } -} - -void fpuComDword(void *Variable, const char * VariableName, BOOL Pop) { - CPU_Message(" fcom%s ST(0), dword ptr [%s]", fpupop[Pop], VariableName); - PUTDST16(RecompPos, (Pop == TRUE) ? 0x1DD8 : 0x15D8); - PUTDST32(RecompPos,Variable); -} - -void fpuComDwordRegPointer(int x86Pointer, BOOL Pop) { - WORD x86Command; - - CPU_Message(" fcom%s ST(0), dword ptr [%s]",fpupop[Pop],x86_Name(x86Pointer)); - switch (x86Pointer) { - case x86_EAX: x86Command = 0x10D8; break; - case x86_EBX: x86Command = 0x13D8; break; - case x86_ECX: x86Command = 0x11D8; break; - case x86_EDX: x86Command = 0x12D8; break; - case x86_ESI: x86Command = 0x16D8; break; - case x86_EDI: x86Command = 0x17D8; break; - } - if (Pop) { x86Command |= 0x0800; } - PUTDST16(RecompPos,x86Command); -} - -void fpuComQword(void *Variable, const char * VariableName, BOOL Pop) { - CPU_Message(" fcom%s ST(0), qword ptr [%s]", fpupop[Pop], VariableName); - PUTDST16(RecompPos, (Pop == TRUE) ? 0x1DDC : 0x15DC); - PUTDST32(RecompPos,Variable); -} - -void fpuComQwordRegPointer(int x86Pointer, BOOL Pop) { - WORD x86Command; - - CPU_Message(" fcom%s ST(0), qword ptr [%s]",fpupop[Pop],x86_Name(x86Pointer)); - switch (x86Pointer) { - case x86_EAX: x86Command = 0x10DC; break; - case x86_EBX: x86Command = 0x13DC; break; - case x86_ECX: x86Command = 0x11DC; break; - case x86_EDX: x86Command = 0x12DC; break; - case x86_ESI: x86Command = 0x16DC; break; - case x86_EDI: x86Command = 0x17DC; break; - } - if (Pop) { x86Command |= 0x0800; } - PUTDST16(RecompPos,x86Command); -} - -void fpuComReg(int x86reg, BOOL Pop) { - int s = (Pop == TRUE) ? 0x0800 : 0x0000; - CPU_Message(" fcom%s ST(0), %s", fpupop[Pop], fpu_Name(x86reg)); - - switch (x86reg) { - case x86_ST0: PUTDST16(RecompPos,0xD0D8|s); break; - case x86_ST1: PUTDST16(RecompPos,0xD1D8|s); break; - case x86_ST2: PUTDST16(RecompPos,0xD2D8|s); break; - case x86_ST3: PUTDST16(RecompPos,0xD3D8|s); break; - case x86_ST4: PUTDST16(RecompPos,0xD4D8|s); break; - case x86_ST5: PUTDST16(RecompPos,0xD5D8|s); break; - case x86_ST6: PUTDST16(RecompPos,0xD6D8|s); break; - case x86_ST7: PUTDST16(RecompPos,0xD7D8|s); break; - default: - DisplayError("fpuComReg\nUnknown x86 Register"); - break; - } -} - -void fpuDivDword(void *Variable, const char * VariableName) { - CPU_Message(" fdiv ST(0), dword ptr [%s]", VariableName); - PUTDST16(RecompPos,0x35D8); - PUTDST32(RecompPos,Variable); -} - -void fpuDivDwordRegPointer(int x86Pointer) { - CPU_Message(" fdiv ST(0), dword ptr [%s]",x86_Name(x86Pointer)); - switch (x86Pointer) { - case x86_EAX: PUTDST16(RecompPos,0x30D8); break; - case x86_EBX: PUTDST16(RecompPos,0x33D8); break; - case x86_ECX: PUTDST16(RecompPos,0x31D8); break; - case x86_EDX: PUTDST16(RecompPos,0x32D8); break; - case x86_ESI: PUTDST16(RecompPos,0x36D8); break; - case x86_EDI: PUTDST16(RecompPos,0x37D8); break; - default: - DisplayError("fpuDivDwordRegPointer\nUnknown x86 Register"); - break; - } -} - -void fpuDivQword(void *Variable, const char * VariableName) { - CPU_Message(" fdiv ST(0), qword ptr [%s]", VariableName); - PUTDST16(RecompPos,0x35DC); - PUTDST32(RecompPos,Variable); -} - -void fpuDivQwordRegPointer(int x86Pointer) { - CPU_Message(" fdiv ST(0), qword ptr [%s]",x86_Name(x86Pointer)); - switch (x86Pointer) { - case x86_EAX: PUTDST16(RecompPos,0x30DC); break; - case x86_EBX: PUTDST16(RecompPos,0x33DC); break; - case x86_ECX: PUTDST16(RecompPos,0x31DC); break; - case x86_EDX: PUTDST16(RecompPos,0x32DC); break; - case x86_ESI: PUTDST16(RecompPos,0x36DC); break; - case x86_EDI: PUTDST16(RecompPos,0x37DC); break; - default: - DisplayError("fpuDivQwordRegPointer\nUnknown x86 Register"); - break; - } -} - -void fpuDivReg(int Reg) { - CPU_Message(" fdiv ST(0), %s", fpu_Name(Reg)); - switch (Reg) { - case x86_ST0: PUTDST16(RecompPos,0xF0D8); break; - case x86_ST1: PUTDST16(RecompPos,0xF1D8); break; - case x86_ST2: PUTDST16(RecompPos,0xF2D8); break; - case x86_ST3: PUTDST16(RecompPos,0xF3D8); break; - case x86_ST4: PUTDST16(RecompPos,0xF4D8); break; - case x86_ST5: PUTDST16(RecompPos,0xF5D8); break; - case x86_ST6: PUTDST16(RecompPos,0xF6D8); break; - case x86_ST7: PUTDST16(RecompPos,0xF7D8); break; - default: - DisplayError("fpuDivReg\nUnknown x86 Register"); - break; - } -} - -void fpuDivRegPop(int x86reg) { - CPU_Message(" fdivp ST(0), %s",fpu_Name(x86reg)); - switch (x86reg) { - case x86_ST0: PUTDST16(RecompPos,0xF8DE); break; - case x86_ST1: PUTDST16(RecompPos,0xF9DE); break; - case x86_ST2: PUTDST16(RecompPos,0xFADE); break; - case x86_ST3: PUTDST16(RecompPos,0xFBDE); break; - case x86_ST4: PUTDST16(RecompPos,0xFCDE); break; - case x86_ST5: PUTDST16(RecompPos,0xFDDE); break; - case x86_ST6: PUTDST16(RecompPos,0xFEDE); break; - case x86_ST7: PUTDST16(RecompPos,0xFFDE); break; - default: - DisplayError("fpuDivReg\nUnknown x86 Register"); - break; - } -} - -void fpuExchange(int Reg) { - CPU_Message(" fxch ST(0), %s",fpu_Name(Reg)); - switch (Reg) { - case x86_ST0: PUTDST16(RecompPos,0xC8D9); break; - case x86_ST1: PUTDST16(RecompPos,0xC9D9); break; - case x86_ST2: PUTDST16(RecompPos,0xCAD9); break; - case x86_ST3: PUTDST16(RecompPos,0xCBD9); break; - case x86_ST4: PUTDST16(RecompPos,0xCCD9); break; - case x86_ST5: PUTDST16(RecompPos,0xCDD9); break; - case x86_ST6: PUTDST16(RecompPos,0xCED9); break; - case x86_ST7: PUTDST16(RecompPos,0xCFD9); break; - default: - DisplayError("fpuExchange\nUnknown x86 Register: %i", Reg); - break; - } -} - -void fpuFree(int Reg) { - CPU_Message(" ffree %s",fpu_Name(Reg)); - switch (Reg) { - case x86_ST0: PUTDST16(RecompPos,0xC0DD); break; - case x86_ST1: PUTDST16(RecompPos,0xC1DD); break; - case x86_ST2: PUTDST16(RecompPos,0xC2DD); break; - case x86_ST3: PUTDST16(RecompPos,0xC3DD); break; - case x86_ST4: PUTDST16(RecompPos,0xC4DD); break; - case x86_ST5: PUTDST16(RecompPos,0xC5DD); break; - case x86_ST6: PUTDST16(RecompPos,0xC6DD); break; - case x86_ST7: PUTDST16(RecompPos,0xC7DD); break; - default: - DisplayError("fpuFree\nUnknown x86 Register"); - break; - } -} - -void fpuDecStack(int * StackPos) { - CPU_Message(" fdecstp"); - *StackPos = (*StackPos - 1) & 7; - PUTDST16(RecompPos,0xF6D9); -} - -void fpuIncStack(int * StackPos) { - CPU_Message(" fincstp"); - *StackPos = (*StackPos + 1) & 7; - PUTDST16(RecompPos,0xF7D9); -} - -void fpuLoadControl(void *Variable, const char * VariableName) { - CPU_Message(" fldcw [%s]",VariableName); - PUTDST16(RecompPos,0x2DD9); - PUTDST32(RecompPos,Variable); -} - -void fpuLoadDword(int * StackPos,void *Variable, const char * VariableName) { - CPU_Message(" fld dword ptr [%s]",VariableName); - *StackPos = (*StackPos - 1) & 7; - PUTDST16(RecompPos,0x05D9); - PUTDST32(RecompPos,Variable); -} - -void fpuLoadDwordFromX86Reg(int * StackPos, int x86Reg) { - CPU_Message(" fld dword ptr [%s]",x86_Name(x86Reg)); - *StackPos = (*StackPos - 1) & 7; - PUTDST8(RecompPos,0xD9); - switch (x86Reg) { - case x86_EAX: PUTDST8(RecompPos,0x00); break; - case x86_EBX: PUTDST8(RecompPos,0x03); break; - case x86_ECX: PUTDST8(RecompPos,0x01); break; - case x86_EDX: PUTDST8(RecompPos,0x02); break; - case x86_ESI: PUTDST8(RecompPos,0x06); break; - case x86_EDI: PUTDST8(RecompPos,0x07); break; - default: - DisplayError("fpuLoadDwordFromX86Reg\nUnknown x86 Register"); - } -} - -void fpuLoadDwordFromN64Mem(int * StackPos,int x86reg) { - CPU_Message(" fld dword ptr [%s+N64mem]",x86_Name(x86reg)); - *StackPos = (*StackPos - 1) & 7; - switch (x86reg) { - case x86_EAX: PUTDST16(RecompPos,0x80D9); break; - case x86_EBX: PUTDST16(RecompPos,0x83D9); break; - case x86_ECX: PUTDST16(RecompPos,0x81D9); break; - case x86_EDX: PUTDST16(RecompPos,0x82D9); break; - case x86_ESI: PUTDST16(RecompPos,0x86D9); break; - case x86_EDI: PUTDST16(RecompPos,0x87D9); break; - case x86_EBP: PUTDST16(RecompPos,0x85D9); break; - default: - DisplayError("fpuLoadDwordFromN64Mem\nUnknown x86 Register"); - } - PUTDST32(RecompPos,_MMU->Rdram()); -} - -void fpuLoadInt32bFromN64Mem(int * StackPos,int x86reg) { - CPU_Message(" fild dword ptr [%s+N64mem]",x86_Name(x86reg)); - *StackPos = (*StackPos - 1) & 7; - switch (x86reg) { - case x86_EAX: PUTDST16(RecompPos,0x80DB); break; - case x86_EBX: PUTDST16(RecompPos,0x83DB); break; - case x86_ECX: PUTDST16(RecompPos,0x81DB); break; - case x86_EDX: PUTDST16(RecompPos,0x82DB); break; - case x86_ESI: PUTDST16(RecompPos,0x86DB); break; - case x86_EDI: PUTDST16(RecompPos,0x87DB); break; - case x86_EBP: PUTDST16(RecompPos,0x85DB); break; - default: - DisplayError("fpuLoadIntDwordFromN64Mem\nUnknown x86 Register"); - } - PUTDST32(RecompPos,_MMU->Rdram()); -} - -void fpuLoadIntegerDword(int * StackPos,void *Variable, const char * VariableName) { - CPU_Message(" fild dword ptr [%s]",VariableName); - *StackPos = (*StackPos - 1) & 7; - PUTDST16(RecompPos,0x05DB); - PUTDST32(RecompPos,Variable); -} - -void fpuLoadIntegerDwordFromX86Reg(int * StackPos,int x86Reg) { - CPU_Message(" fild dword ptr [%s]",x86_Name(x86Reg)); - *StackPos = (*StackPos - 1) & 7; - PUTDST8(RecompPos,0xDB); - switch (x86Reg) { - case x86_EAX: PUTDST8(RecompPos,0x00); break; - case x86_EBX: PUTDST8(RecompPos,0x03); break; - case x86_ECX: PUTDST8(RecompPos,0x01); break; - case x86_EDX: PUTDST8(RecompPos,0x02); break; - case x86_ESI: PUTDST8(RecompPos,0x06); break; - case x86_EDI: PUTDST8(RecompPos,0x07); break; - default: - DisplayError("fpuLoadIntegerDwordFromX86Reg\nUnknown x86 Register"); - } -} - -void fpuLoadIntegerQword(int * StackPos,void *Variable, const char * VariableName) { - CPU_Message(" fild qword ptr [%s]",VariableName); - *StackPos = (*StackPos - 1) & 7; - PUTDST16(RecompPos,0x2DDF); - PUTDST32(RecompPos,Variable); -} - -void fpuLoadIntegerQwordFromX86Reg(int * StackPos,int x86Reg) { - CPU_Message(" fild qword ptr [%s]",x86_Name(x86Reg)); - *StackPos = (*StackPos - 1) & 7; - PUTDST8(RecompPos,0xDF); - switch (x86Reg) { - case x86_EAX: PUTDST8(RecompPos,0x28); break; - case x86_EBX: PUTDST8(RecompPos,0x2B); break; - case x86_ECX: PUTDST8(RecompPos,0x29); break; - case x86_EDX: PUTDST8(RecompPos,0x2A); break; - case x86_ESI: PUTDST8(RecompPos,0x2E); break; - case x86_EDI: PUTDST8(RecompPos,0x2F); break; - default: - DisplayError("fpuLoadIntegerDwordFromX86Reg\nUnknown x86 Register"); - } -} - -void fpuLoadQword(int * StackPos,void *Variable, const char * VariableName) { - CPU_Message(" fld qword ptr [%s]",VariableName); - *StackPos = (*StackPos - 1) & 7; - PUTDST16(RecompPos,0x05DD); - PUTDST32(RecompPos,Variable); -} - -void fpuLoadQwordFromX86Reg(int * StackPos, int x86Reg) { - CPU_Message(" fld qword ptr [%s]",x86_Name(x86Reg)); - *StackPos = (*StackPos - 1) & 7; - PUTDST8(RecompPos,0xDD); - switch (x86Reg) { - case x86_EAX: PUTDST8(RecompPos,0x00); break; - case x86_EBX: PUTDST8(RecompPos,0x03); break; - case x86_ECX: PUTDST8(RecompPos,0x01); break; - case x86_EDX: PUTDST8(RecompPos,0x02); break; - case x86_ESI: PUTDST8(RecompPos,0x06); break; - case x86_EDI: PUTDST8(RecompPos,0x07); break; - default: - DisplayError("fpuLoadQwordFromX86Reg\nUnknown x86 Register"); - } -} - -void fpuLoadQwordFromN64Mem(int * StackPos,int x86reg) { - CPU_Message(" fld qword ptr [%s+N64mem]",x86_Name(x86reg)); - *StackPos = (*StackPos - 1) & 7; - switch (x86reg) { - case x86_EAX: PUTDST16(RecompPos,0x80DD); break; - case x86_EBX: PUTDST16(RecompPos,0x83DD); break; - case x86_ECX: PUTDST16(RecompPos,0x81DD); break; - case x86_EDX: PUTDST16(RecompPos,0x82DD); break; - case x86_ESI: PUTDST16(RecompPos,0x86DD); break; - case x86_EDI: PUTDST16(RecompPos,0x87DD); break; - case x86_EBP: PUTDST16(RecompPos,0x85DD); break; - default: - DisplayError("fpuLoadQwordFromN64Mem\nUnknown x86 Register"); - } - PUTDST32(RecompPos,_MMU->Rdram()); -} - -void fpuLoadReg(int * StackPos,int Reg) { - CPU_Message(" fld ST(0), %s",fpu_Name(Reg)); - *StackPos = (*StackPos - 1) & 7; - switch (Reg) { - case x86_ST0: PUTDST16(RecompPos,0xC0D9); break; - case x86_ST1: PUTDST16(RecompPos,0xC1D9); break; - case x86_ST2: PUTDST16(RecompPos,0xC2D9); break; - case x86_ST3: PUTDST16(RecompPos,0xC3D9); break; - case x86_ST4: PUTDST16(RecompPos,0xC4D9); break; - case x86_ST5: PUTDST16(RecompPos,0xC5D9); break; - case x86_ST6: PUTDST16(RecompPos,0xC6D9); break; - case x86_ST7: PUTDST16(RecompPos,0xC7D9); break; - default: - DisplayError("fpuLoadReg\nUnknown x86 Register:%i", Reg); - break; - } -} - -void fpuMulDword(void *Variable, const char * VariableName) { - CPU_Message(" fmul ST(0), dword ptr [%s]", VariableName); - PUTDST16(RecompPos,0x0DD8); - PUTDST32(RecompPos,Variable); -} - -void fpuMulDwordRegPointer(int x86Pointer) { - CPU_Message(" fmul ST(0), dword ptr [%s]",x86_Name(x86Pointer)); - switch (x86Pointer) { - case x86_EAX: PUTDST16(RecompPos,0x08D8); break; - case x86_EBX: PUTDST16(RecompPos,0x0BD8); break; - case x86_ECX: PUTDST16(RecompPos,0x09D8); break; - case x86_EDX: PUTDST16(RecompPos,0x0AD8); break; - case x86_ESI: PUTDST16(RecompPos,0x0ED8); break; - case x86_EDI: PUTDST16(RecompPos,0x0FD8); break; - default: - DisplayError("fpuMulDwordRegPointer\nUnknown x86 Register"); - break; - } -} - -void fpuMulQword(void *Variable, const char * VariableName) { - CPU_Message(" fmul ST(0), qword ptr [%s]", VariableName); - PUTDST16(RecompPos,0x0DDC); - PUTDST32(RecompPos,Variable); -} - -void fpuMulQwordRegPointer(int x86Pointer) { - CPU_Message(" fmul ST(0), qword ptr [%s]",x86_Name(x86Pointer)); - switch (x86Pointer) { - case x86_EAX: PUTDST16(RecompPos,0x08DC); break; - case x86_EBX: PUTDST16(RecompPos,0x0BDC); break; - case x86_ECX: PUTDST16(RecompPos,0x09DC); break; - case x86_EDX: PUTDST16(RecompPos,0x0ADC); break; - case x86_ESI: PUTDST16(RecompPos,0x0EDC); break; - case x86_EDI: PUTDST16(RecompPos,0x0FDC); break; - default: - DisplayError("fpuMulQwordRegPointer\nUnknown x86 Register"); - break; - } -} - -void fpuMulReg(int x86reg) { - CPU_Message(" fmul ST(0), %s",fpu_Name(x86reg)); - switch (x86reg) { - case x86_ST0: PUTDST16(RecompPos,0xC8D8); break; - case x86_ST1: PUTDST16(RecompPos,0xC9D8); break; - case x86_ST2: PUTDST16(RecompPos,0xCAD8); break; - case x86_ST3: PUTDST16(RecompPos,0xCBD8); break; - case x86_ST4: PUTDST16(RecompPos,0xCCD8); break; - case x86_ST5: PUTDST16(RecompPos,0xCDD8); break; - case x86_ST6: PUTDST16(RecompPos,0xCED8); break; - case x86_ST7: PUTDST16(RecompPos,0xCFD8); break; - default: - DisplayError("fpuMulReg\nUnknown x86 Register"); - break; - } -} - -void fpuMulRegPop(int x86reg) { - CPU_Message(" fmulp ST(0), %s",fpu_Name(x86reg)); - switch (x86reg) { - case x86_ST0: PUTDST16(RecompPos,0xC8DE); break; - case x86_ST1: PUTDST16(RecompPos,0xC9DE); break; - case x86_ST2: PUTDST16(RecompPos,0xCADE); break; - case x86_ST3: PUTDST16(RecompPos,0xCBDE); break; - case x86_ST4: PUTDST16(RecompPos,0xCCDE); break; - case x86_ST5: PUTDST16(RecompPos,0xCDDE); break; - case x86_ST6: PUTDST16(RecompPos,0xCEDE); break; - case x86_ST7: PUTDST16(RecompPos,0xCFDE); break; - default: - DisplayError("fpuMulReg\nUnknown x86 Register"); - break; - } -} - -void fpuNeg(void) { - CPU_Message(" fchs ST(0)"); - PUTDST16(RecompPos,0xE0D9); -} - -void fpuRound(void) { - CPU_Message(" frndint ST(0)"); - PUTDST16(RecompPos,0xFCD9); -} - -void fpuSqrt(void) { - CPU_Message(" fsqrt ST(0)"); - PUTDST16(RecompPos,0xFAD9); -} - -void fpuStoreControl(void *Variable, const char * VariableName) { - CPU_Message(" fnstcw [%s]",VariableName); - PUTDST16(RecompPos,0x3DD9); - PUTDST32(RecompPos,Variable); -} - -void fpuStoreDword(int * StackPos,void *Variable, const char * VariableName, BOOL pop) { - CPU_Message(" fst%s dword ptr [%s]", fpupop[pop], VariableName); - if (pop) { *StackPos = (*StackPos + 1) & 7; } - PUTDST16(RecompPos,(pop == FALSE) ? 0x15D9 : 0x1DD9); - PUTDST32(RecompPos,Variable); -} - -void fpuStoreDwordFromX86Reg(int * StackPos,int x86Reg, BOOL pop) { - BYTE Command; - - CPU_Message(" fst%s dword ptr [%s]", fpupop[pop], x86_Name(x86Reg)); - if (pop) { *StackPos = (*StackPos + 1) & 7; } - PUTDST8(RecompPos,0xD9); - - switch (x86Reg) { - case x86_EAX: Command = 0x10; break; - case x86_EBX: Command = 0x13; break; - case x86_ECX: Command = 0x11; break; - case x86_EDX: Command = 0x12; break; - case x86_ESI: Command = 0x16; break; - case x86_EDI: Command = 0x17; break; - default: - DisplayError("fpuStoreIntegerQwordFromX86Reg\nUnknown x86 Register"); - } - PUTDST8(RecompPos, (pop == FALSE) ? Command : (Command + 0x8)); -} - -void fpuStoreDwordToN64Mem(int * StackPos,int x86reg, BOOL Pop) { - int s = (Pop == TRUE) ? 0x0800 : 0; - - CPU_Message(" fst%s dword ptr [%s+N64mem]", fpupop[Pop], x86_Name(x86reg)); - if (Pop) { *StackPos = (*StackPos + 1) & 7; } - - switch (x86reg) { - case x86_EAX: PUTDST16(RecompPos,0x90D9|s); break; - case x86_EBX: PUTDST16(RecompPos,0x93D9|s); break; - case x86_ECX: PUTDST16(RecompPos,0x91D9|s); break; - case x86_EDX: PUTDST16(RecompPos,0x92D9|s); break; - case x86_ESI: PUTDST16(RecompPos,0x96D9|s); break; - case x86_EDI: PUTDST16(RecompPos,0x97D9|s); break; - case x86_EBP: PUTDST16(RecompPos,0x95D9|s); break; - default: - DisplayError("fpuStoreDwordToN64Mem\nUnknown x86 Register"); - } - PUTDST32(RecompPos,_MMU->Rdram()); -} - -void fpuStoreIntegerDword(int * StackPos,void *Variable, const char * VariableName, BOOL pop) { - CPU_Message(" fist%s dword ptr [%s]", fpupop[pop], VariableName); - if (pop) { *StackPos = (*StackPos + 1) & 7; } - PUTDST16(RecompPos, (pop == FALSE) ? 0x15DB : 0x1DDB); - PUTDST32(RecompPos,Variable); -} - -void fpuStoreIntegerDwordFromX86Reg(int * StackPos,int x86Reg, BOOL pop) { - BYTE Command; - - CPU_Message(" fist%s dword ptr [%s]", fpupop[pop], x86_Name(x86Reg)); - if (pop) { *StackPos = (*StackPos + 1) & 7; } - PUTDST8(RecompPos,0xDB); - - switch (x86Reg) { - case x86_EAX: Command = 0x10; break; - case x86_EBX: Command = 0x13; break; - case x86_ECX: Command = 0x11; break; - case x86_EDX: Command = 0x12; break; - case x86_ESI: Command = 0x16; break; - case x86_EDI: Command = 0x17; break; - default: - DisplayError("fpuStoreIntegerDwordFromX86Reg\nUnknown x86 Register"); - } - PUTDST8(RecompPos, (pop == FALSE) ? Command : (Command + 0x8)); -} - -void fpuStoreIntegerQword(int * StackPos,void *Variable, const char * VariableName, BOOL pop) { - CPU_Message(" fist%s qword ptr [%s]", fpupop[pop], VariableName); - if (pop) { *StackPos = (*StackPos + 1) & 7; } - PUTDST16(RecompPos, (pop == FALSE) ? 0x35DF : 0x3DDF); - PUTDST32(RecompPos,Variable); - if (!pop) { X86BreakPoint(__FILE__,__LINE__); } -} - -void fpuStoreIntegerQwordFromX86Reg(int * StackPos, int x86Reg, BOOL pop) { - BYTE Command; - - CPU_Message(" fist%s qword ptr [%s]", fpupop[pop], x86_Name(x86Reg)); - if (pop) { *StackPos = (*StackPos + 1) & 7; } - PUTDST8(RecompPos,0xDF); - - switch (x86Reg) { - case x86_EAX: Command = 0x30; break; - case x86_EBX: Command = 0x33; break; - case x86_ECX: Command = 0x31; break; - case x86_EDX: Command = 0x32; break; - case x86_ESI: Command = 0x36; break; - case x86_EDI: Command = 0x37; break; - default: - DisplayError("fpuStoreIntegerQwordFromX86Reg\nUnknown x86 Register"); - } - PUTDST8(RecompPos, (pop == FALSE) ? Command : (Command + 0x8)); -} - -void fpuStoreQwordFromX86Reg(int * StackPos, int x86Reg, BOOL pop) { - BYTE Command; - - CPU_Message(" fst%s qword ptr [%s]", fpupop[pop], x86_Name(x86Reg)); - if (pop) { *StackPos = (*StackPos + 1) & 7; } - PUTDST8(RecompPos,0xDD); - - switch (x86Reg) { - case x86_EAX: Command = 0x10; break; - case x86_EBX: Command = 0x13; break; - case x86_ECX: Command = 0x11; break; - case x86_EDX: Command = 0x12; break; - case x86_ESI: Command = 0x16; break; - case x86_EDI: Command = 0x17; break; - default: - DisplayError("fpuStoreQwordFromX86Reg\nUnknown x86 Register"); - } - PUTDST8(RecompPos, (pop == FALSE) ? Command : (Command + 0x8)); -} - -void fpuStoreStatus(void) { - CPU_Message(" fnstsw ax"); - PUTDST16(RecompPos,0xE0DF); -} - -void fpuSubDword(void *Variable, const char * VariableName) { - CPU_Message(" fsub ST(0), dword ptr [%s]", VariableName); - PUTDST16(RecompPos,0x25D8); - PUTDST32(RecompPos,Variable); -} - -void fpuSubDwordRegPointer(int x86Pointer) { - CPU_Message(" fsub ST(0), dword ptr [%s]",x86_Name(x86Pointer)); - switch (x86Pointer) { - case x86_EAX: PUTDST16(RecompPos,0x20D8); break; - case x86_EBX: PUTDST16(RecompPos,0x23D8); break; - case x86_ECX: PUTDST16(RecompPos,0x21D8); break; - case x86_EDX: PUTDST16(RecompPos,0x22D8); break; - case x86_ESI: PUTDST16(RecompPos,0x26D8); break; - case x86_EDI: PUTDST16(RecompPos,0x27D8); break; - default: - DisplayError("fpuSubDwordRegPointer\nUnknown x86 Register"); - break; - } -} - -void fpuSubDwordReverse(void *Variable, const char * VariableName) { - CPU_Message(" fsubr ST(0), dword ptr [%s]", VariableName); - PUTDST16(RecompPos,0x2DD8); - PUTDST32(RecompPos,Variable); -} - -void fpuSubQword(void *Variable, const char * VariableName) { - CPU_Message(" fsub ST(0), qword ptr [%s]", VariableName); - PUTDST16(RecompPos,0x25DC); - PUTDST32(RecompPos,Variable); -} - -void fpuSubQwordRegPointer(int x86Pointer) { - CPU_Message(" fsub ST(0), qword ptr [%s]",x86_Name(x86Pointer)); - switch (x86Pointer) { - case x86_EAX: PUTDST16(RecompPos,0x20DC); break; - case x86_EBX: PUTDST16(RecompPos,0x23DC); break; - case x86_ECX: PUTDST16(RecompPos,0x21DC); break; - case x86_EDX: PUTDST16(RecompPos,0x22DC); break; - case x86_ESI: PUTDST16(RecompPos,0x26DC); break; - case x86_EDI: PUTDST16(RecompPos,0x27DC); break; - default: - DisplayError("fpuSubQwordRegPointer\nUnknown x86 Register"); - break; - } -} - -void fpuSubQwordReverse(void *Variable, const char * VariableName) { - CPU_Message(" fsubr ST(0), qword ptr [%s]", VariableName); - PUTDST16(RecompPos,0x2DDC); - PUTDST32(RecompPos,Variable); -} - -void fpuSubReg(int x86reg) { - CPU_Message(" fsub ST(0), %s",fpu_Name(x86reg)); - switch (x86reg) { - case x86_ST0: PUTDST16(RecompPos,0xE0D8); break; - case x86_ST1: PUTDST16(RecompPos,0xE1D8); break; - case x86_ST2: PUTDST16(RecompPos,0xE2D8); break; - case x86_ST3: PUTDST16(RecompPos,0xE3D8); break; - case x86_ST4: PUTDST16(RecompPos,0xE4D8); break; - case x86_ST5: PUTDST16(RecompPos,0xE5D8); break; - case x86_ST6: PUTDST16(RecompPos,0xE6D8); break; - case x86_ST7: PUTDST16(RecompPos,0xE7D8); break; - default: - DisplayError("fpuSubReg\nUnknown x86 Register"); - break; - } -} - -void fpuSubRegPop(int x86reg) { - CPU_Message(" fsubp ST(0), %s",fpu_Name(x86reg)); - switch (x86reg) { - case x86_ST0: PUTDST16(RecompPos,0xE8DE); break; - case x86_ST1: PUTDST16(RecompPos,0xE9DE); break; - case x86_ST2: PUTDST16(RecompPos,0xEADE); break; - case x86_ST3: PUTDST16(RecompPos,0xEBDE); break; - case x86_ST4: PUTDST16(RecompPos,0xECDE); break; - case x86_ST5: PUTDST16(RecompPos,0xEDDE); break; - case x86_ST6: PUTDST16(RecompPos,0xEEDE); break; - case x86_ST7: PUTDST16(RecompPos,0xEFDE); break; - default: - DisplayError("fpuSubRegPop\nUnknown x86 Register"); - break; - } -} @@ -826,7 +80,7 @@ void fpuDivQwordReverse(void *Variable, const char * VariableName) { // FPU Utility // -unsigned int fpucontrol; +static unsigned int fpucontrol; /* returns and pushes current fpu state, bool for set normal */ int fpuSaveControl(BOOL bSetNormal) { @@ -861,4 +115,6 @@ void fpuSetupDouble(void) { and [temp], 0xFFFFF3FF fldcw word ptr [temp] } -} \ No newline at end of file +} + +#endif \ No newline at end of file diff --git a/Source/Project64/N64 System/Debugger/Debugger - Memory Dump.cpp b/Source/Project64/N64 System/Debugger/Debugger - Memory Dump.cpp index 9e5c91d31..d0a940514 100644 --- a/Source/Project64/N64 System/Debugger/Debugger - Memory Dump.cpp +++ b/Source/Project64/N64 System/Debugger/Debugger - Memory Dump.cpp @@ -303,6 +303,8 @@ bool CDumpMemory::DumpMemory ( LPCSTR FileName,DumpFormat Format, DWORD StartPC, } LogFile.SetFlush(false); LogFile.SetTruncateFile(false); + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix char Command[200]; for (COpcode OpCode(StartPC); OpCode.PC() < EndPC; OpCode.Next()) { @@ -310,6 +312,7 @@ bool CDumpMemory::DumpMemory ( LPCSTR FileName,DumpFormat Format, DWORD StartPC, OpCode.OpcodeParam(Command); LogFile.LogF("%X: %-15s%s\r\n",OpCode.PC(),szOpName,Command); } +#endif m_StartAddress.SetValue(StartPC,true,true); m_EndAddress.SetValue(EndPC,true,true); return true; diff --git a/Source/Project64/N64 System/Interpreter/Interpreter CPU.cpp b/Source/Project64/N64 System/Interpreter/Interpreter CPU.cpp index 3ee0c20d6..3750c00fb 100644 --- a/Source/Project64/N64 System/Interpreter/Interpreter CPU.cpp +++ b/Source/Project64/N64 System/Interpreter/Interpreter CPU.cpp @@ -287,14 +287,6 @@ InterruptsDisabled: } -void TestInterpreterJump (DWORD PC, DWORD TargetPC, int Reg1, int Reg2) { - if (PC != TargetPC) { return; } - if (DelaySlotEffectsCompare(PC,Reg1,Reg2)) { return; } - InPermLoop(); - R4300iOp::m_NextInstruction = DELAY_SLOT; - R4300iOp::m_TestTimer = TRUE; -} - CInterpreterCPU::CInterpreterCPU () : m_R4300i_Opcode(NULL) { @@ -307,17 +299,20 @@ CInterpreterCPU::~CInterpreterCPU() void CInterpreterCPU::StartInterpreterCPU (void ) { - R4300iOp::m_TestTimer = FALSE; + R4300iOp::m_TestTimer = FALSE; R4300iOp::m_NextInstruction = NORMAL; + R4300iOp::m_JumpToLocation = 0; + DWORD CountPerOp = _Settings->LoadDword(Game_CounterFactor); - bool & Done = _N64System->m_EndEmulation; - DWORD & PROGRAM_COUNTER = *_PROGRAM_COUNTER; - OPCODE & Opcode = R4300iOp::m_Opcode; - DWORD & JumpToLocation = R4300iOp::m_JumpToLocation; - BOOL & TestTimer = R4300iOp::m_TestTimer; + bool & Done = _N64System->m_EndEmulation; + DWORD & PROGRAM_COUNTER = *_PROGRAM_COUNTER; + OPCODE & Opcode = R4300iOp::m_Opcode; + DWORD & JumpToLocation = R4300iOp::m_JumpToLocation; + BOOL & TestTimer = R4300iOp::m_TestTimer; R4300iOp::Func * R4300i_Opcode = R4300iOp::BuildInterpreter(); + //R4300iOp::Func * R4300i_Opcode = R4300iOp32::BuildInterpreter(); __try { @@ -332,9 +327,10 @@ void CInterpreterCPU::StartInterpreterCPU (void ) //WriteTraceF((TraceType)(TraceError | TraceNoHeader),"%X: %d %d",*_PROGRAM_COUNTER,*_NextTimer,_SystemTimer->CurrentType()); }*/ *_NextTimer -= CountPerOp; - ((void (_fastcall *)()) R4300i_Opcode[ Opcode.op ])(); + R4300i_Opcode[ Opcode.op ](); - switch (R4300iOp::m_NextInstruction) { + switch (R4300iOp::m_NextInstruction) + { case NORMAL: PROGRAM_COUNTER += 4; break; diff --git a/Source/Project64/N64 System/Interpreter/Interpreter CPU.h b/Source/Project64/N64 System/Interpreter/Interpreter CPU.h index aa6928adb..9f066a6c5 100644 --- a/Source/Project64/N64 System/Interpreter/Interpreter CPU.h +++ b/Source/Project64/N64 System/Interpreter/Interpreter CPU.h @@ -1,4 +1,5 @@ -class CInterpreterCPU +class CInterpreterCPU : + private R4300iOp { public: CInterpreterCPU(); diff --git a/Source/Project64/N64 System/Interpreter/Interpreter Ops 32.cpp b/Source/Project64/N64 System/Interpreter/Interpreter Ops 32.cpp index 66bbb3a27..b7e5bfacf 100644 --- a/Source/Project64/N64 System/Interpreter/Interpreter Ops 32.cpp +++ b/Source/Project64/N64 System/Interpreter/Interpreter Ops 32.cpp @@ -2,7 +2,7 @@ #include "../C Core/Logging.h" void InPermLoop ( void ); -void TestInterpreterJump ( DWORD PC, DWORD TargetPC, int Reg1, int Reg2 ); +int DelaySlotEffectsCompare ( DWORD PC, DWORD Reg1, DWORD Reg2 ); #define ADDRESS_ERROR_EXCEPTION(Address,FromRead) \ DoAddressError(m_NextInstruction == JUMP,Address,FromRead);\ @@ -25,49 +25,7 @@ void TestInterpreterJump ( DWORD PC, DWORD TargetPC, int Reg1, int Reg2 ); m_JumpToLocation = (*_PROGRAM_COUNTER);\ return; -void R4300iOp32::SPECIAL (void) { - ((void (*)()) Jump_Special[ m_Opcode.funct ])(); -} - -void R4300iOp32::REGIMM (void) { - ((void (*)()) Jump_Regimm[ m_Opcode.rt ])(); -} - -void R4300iOp32::COP0 (void) { - ((void (*)()) Jump_CoP0[ m_Opcode.rs ])(); -} - -void R4300iOp32::COP0_CO (void) { - ((void (*)()) Jump_CoP0_Function[ m_Opcode.funct ])(); -} - -void R4300iOp32::COP1 (void) { - ((void (*)()) Jump_CoP1[ m_Opcode.fmt ])(); -} - -void R4300iOp32::COP1_BC (void) { - ((void (*)()) Jump_CoP1_BC[ m_Opcode.ft ])(); -} - -void R4300iOp32::COP1_S (void) { - _controlfp(RoundingModel,_MCW_RC); - ((void (*)()) Jump_CoP1_S[ m_Opcode.funct ])(); -} - -void R4300iOp32::COP1_D (void) { - _controlfp(RoundingModel,_MCW_RC); - ((void (*)()) Jump_CoP1_D[ m_Opcode.funct ])(); -} - -void R4300iOp32::COP1_W (void) { - ((void (*)()) Jump_CoP1_W[ m_Opcode.funct ])(); -} - -void R4300iOp32::COP1_L (void) { - ((void (*)()) Jump_CoP1_L[ m_Opcode.funct ])(); -} - -R4300iOp_FUNC * R4300iOp32::BuildInterpreter (void ) +R4300iOp32::Func * R4300iOp32::BuildInterpreter (void ) { Jump_Opcode[ 0] = SPECIAL; Jump_Opcode[ 1] = REGIMM; @@ -663,7 +621,11 @@ R4300iOp_FUNC * R4300iOp32::BuildInterpreter (void ) void R4300iOp32::J (void) { m_NextInstruction = DELAY_SLOT; m_JumpToLocation = ((*_PROGRAM_COUNTER) & 0xF0000000) + (m_Opcode.target << 2); - TestInterpreterJump((*_PROGRAM_COUNTER),m_JumpToLocation,0,0); + + if ((*_PROGRAM_COUNTER) == m_JumpToLocation) + { + InPermLoop(); + } } void R4300iOp32::JAL (void) { @@ -674,8 +636,6 @@ void R4300iOp32::JAL (void) { if ((*_PROGRAM_COUNTER) == m_JumpToLocation) { InPermLoop(); - m_NextInstruction = DELAY_SLOT; - m_TestTimer = TRUE; } } @@ -683,7 +643,13 @@ void R4300iOp32::BEQ (void) { m_NextInstruction = DELAY_SLOT; if (_GPR[m_Opcode.rs].W[0] == _GPR[m_Opcode.rt].W[0]) { m_JumpToLocation = (*_PROGRAM_COUNTER) + ((short)m_Opcode.offset << 2) + 4; - TestInterpreterJump((*_PROGRAM_COUNTER),m_JumpToLocation,m_Opcode.rs,m_Opcode.rt); + if ((*_PROGRAM_COUNTER) == m_JumpToLocation) + { + if (!DelaySlotEffectsCompare((*_PROGRAM_COUNTER),m_Opcode.rs,m_Opcode.rt)) + { + InPermLoop(); + } + } } else { m_JumpToLocation = (*_PROGRAM_COUNTER) + 8; } @@ -693,7 +659,13 @@ void R4300iOp32::BNE (void) { m_NextInstruction = DELAY_SLOT; if (_GPR[m_Opcode.rs].W[0] != _GPR[m_Opcode.rt].W[0]) { m_JumpToLocation = (*_PROGRAM_COUNTER) + ((short)m_Opcode.offset << 2) + 4; - TestInterpreterJump((*_PROGRAM_COUNTER),m_JumpToLocation,m_Opcode.rs,m_Opcode.rt); + if ((*_PROGRAM_COUNTER) == m_JumpToLocation) + { + if (!DelaySlotEffectsCompare((*_PROGRAM_COUNTER),m_Opcode.rs,m_Opcode.rt)) + { + InPermLoop(); + } + } } else { m_JumpToLocation = (*_PROGRAM_COUNTER) + 8; } @@ -703,7 +675,13 @@ void R4300iOp32::BLEZ (void) { m_NextInstruction = DELAY_SLOT; if (_GPR[m_Opcode.rs].W[0] <= 0) { m_JumpToLocation = (*_PROGRAM_COUNTER) + ((short)m_Opcode.offset << 2) + 4; - TestInterpreterJump((*_PROGRAM_COUNTER),m_JumpToLocation,m_Opcode.rs,0); + if ((*_PROGRAM_COUNTER) == m_JumpToLocation) + { + if (!DelaySlotEffectsCompare((*_PROGRAM_COUNTER),m_Opcode.rs,0)) + { + InPermLoop(); + } + } } else { m_JumpToLocation = (*_PROGRAM_COUNTER) + 8; } @@ -713,7 +691,13 @@ void R4300iOp32::BGTZ (void) { m_NextInstruction = DELAY_SLOT; if (_GPR[m_Opcode.rs].W[0] > 0) { m_JumpToLocation = (*_PROGRAM_COUNTER) + ((short)m_Opcode.offset << 2) + 4; - TestInterpreterJump((*_PROGRAM_COUNTER),m_JumpToLocation,m_Opcode.rs,0); + if ((*_PROGRAM_COUNTER) == m_JumpToLocation) + { + if (!DelaySlotEffectsCompare((*_PROGRAM_COUNTER),m_Opcode.rs,0)) + { + InPermLoop(); + } + } } else { m_JumpToLocation = (*_PROGRAM_COUNTER) + 8; } @@ -790,7 +774,13 @@ void R4300iOp32::BEQL (void) { if (_GPR[m_Opcode.rs].W[0] == _GPR[m_Opcode.rt].W[0]) { m_NextInstruction = DELAY_SLOT; m_JumpToLocation = (*_PROGRAM_COUNTER) + ((short)m_Opcode.offset << 2) + 4; - TestInterpreterJump((*_PROGRAM_COUNTER),m_JumpToLocation,m_Opcode.rs,m_Opcode.rt); + if ((*_PROGRAM_COUNTER) == m_JumpToLocation) + { + if (!DelaySlotEffectsCompare((*_PROGRAM_COUNTER),m_Opcode.rs,m_Opcode.rt)) + { + InPermLoop(); + } + } } else { m_NextInstruction = JUMP; m_JumpToLocation = (*_PROGRAM_COUNTER) + 8; @@ -801,7 +791,13 @@ void R4300iOp32::BNEL (void) { if (_GPR[m_Opcode.rs].W[0] != _GPR[m_Opcode.rt].W[0]) { m_NextInstruction = DELAY_SLOT; m_JumpToLocation = (*_PROGRAM_COUNTER) + ((short)m_Opcode.offset << 2) + 4; - TestInterpreterJump((*_PROGRAM_COUNTER),m_JumpToLocation,m_Opcode.rs,m_Opcode.rt); + if ((*_PROGRAM_COUNTER) == m_JumpToLocation) + { + if (!DelaySlotEffectsCompare((*_PROGRAM_COUNTER),m_Opcode.rs,m_Opcode.rt)) + { + InPermLoop(); + } + } } else { m_NextInstruction = JUMP; m_JumpToLocation = (*_PROGRAM_COUNTER) + 8; @@ -812,7 +808,13 @@ void R4300iOp32::BLEZL (void) { if (_GPR[m_Opcode.rs].W[0] <= 0) { m_NextInstruction = DELAY_SLOT; m_JumpToLocation = (*_PROGRAM_COUNTER) + ((short)m_Opcode.offset << 2) + 4; - TestInterpreterJump((*_PROGRAM_COUNTER),m_JumpToLocation,m_Opcode.rs,0); + if ((*_PROGRAM_COUNTER) == m_JumpToLocation) + { + if (!DelaySlotEffectsCompare((*_PROGRAM_COUNTER),m_Opcode.rs,0)) + { + InPermLoop(); + } + } } else { m_NextInstruction = JUMP; m_JumpToLocation = (*_PROGRAM_COUNTER) + 8; @@ -823,7 +825,13 @@ void R4300iOp32::BGTZL (void) { if (_GPR[m_Opcode.rs].W[0] > 0) { m_NextInstruction = DELAY_SLOT; m_JumpToLocation = (*_PROGRAM_COUNTER) + ((short)m_Opcode.offset << 2) + 4; - TestInterpreterJump((*_PROGRAM_COUNTER),m_JumpToLocation,m_Opcode.rs,0); + if ((*_PROGRAM_COUNTER) == m_JumpToLocation) + { + if (!DelaySlotEffectsCompare((*_PROGRAM_COUNTER),m_Opcode.rs,0)) + { + InPermLoop(); + } + } } else { m_NextInstruction = JUMP; m_JumpToLocation = (*_PROGRAM_COUNTER) + 8; @@ -879,29 +887,13 @@ void R4300iOp32::LW (void) { DWORD Address = _GPR[m_Opcode.base].UW[0] + (short)m_Opcode.offset; if ((Address & 3) != 0) { ADDRESS_ERROR_EXCEPTION(Address,TRUE); } -#if (!defined(EXTERNAL_RELEASE)) - Log_LW((*_PROGRAM_COUNTER),Address); -#endif + if (LogOptions.GenerateLog) + { + Log_LW((*_PROGRAM_COUNTER),Address); + } + if (m_Opcode.rt == 0) { return; } -#ifdef toremove - if (Address >= 0xA3F00000 && Address < 0xC0000000) - { - if (Address < 0xA4000000 || Address >= 0xA4002000) - { - Address &= 0x1FFFFFFF; - if (!r4300i_LW_NonMemory(Address,&_GPR[m_Opcode.rt].UW[0])) - { - if (ShowUnhandledMemory) - { - DisplayError("Failed to load word\n\nIn LW",Address); - } - } - _GPR[m_Opcode.rt].W[0] = _GPR[m_Opcode.rt].W[0]; - return; - } - } -#endif if (!_MMU->LW_VAddr(Address,_GPR[m_Opcode.rt].UW[0])) { if (g_ShowTLBMisses) { DisplayError("LW TLB: %X",Address); @@ -1016,26 +1008,13 @@ void R4300iOp32::SW (void) { DWORD Address = _GPR[m_Opcode.base].UW[0] + (short)m_Opcode.offset; if ((Address & 3) != 0) { ADDRESS_ERROR_EXCEPTION(Address,FALSE); } #if (!defined(EXTERNAL_RELEASE)) - Log_SW((*_PROGRAM_COUNTER),Address,_GPR[m_Opcode.rt].UW[0]); -#endif -#ifdef toremove - if (Address >= 0xA3F00000 && Address < 0xC0000000) - { - if (Address < 0xA4000000 || Address >= 0xA4002000) - { - Address &= 0x1FFFFFFF; - if (!r4300i_SW_NonMemory(Address,_GPR[m_Opcode.rt].UW[0])) - { - if (ShowUnhandledMemory) - { - DisplayError("Failed to load word\n\nIn SW",Address); - } - } - return; - } + if (LogOptions.GenerateLog) + { + Log_SW((*_PROGRAM_COUNTER),Address,_GPR[m_Opcode.rt].UW[0]); } #endif - if (!_MMU->SW_VAddr(Address,_GPR[m_Opcode.rt].UW[0])) { + if (!_MMU->SW_VAddr(Address,_GPR[m_Opcode.rt].UW[0])) + { #ifndef EXTERNAL_RELEASE DisplayError("SW TLB: %X",Address); #endif @@ -1262,7 +1241,13 @@ void R4300iOp32::REGIMM_BLTZ (void) { m_NextInstruction = DELAY_SLOT; if (_GPR[m_Opcode.rs].W[0] < 0) { m_JumpToLocation = (*_PROGRAM_COUNTER) + ((short)m_Opcode.offset << 2) + 4; - TestInterpreterJump((*_PROGRAM_COUNTER),m_JumpToLocation,m_Opcode.rs,0); + if ((*_PROGRAM_COUNTER) == m_JumpToLocation) + { + if (!DelaySlotEffectsCompare((*_PROGRAM_COUNTER),m_Opcode.rs,0)) + { + InPermLoop(); + } + } } else { m_JumpToLocation = (*_PROGRAM_COUNTER) + 8; } @@ -1272,7 +1257,13 @@ void R4300iOp32::REGIMM_BGEZ (void) { m_NextInstruction = DELAY_SLOT; if (_GPR[m_Opcode.rs].W[0] >= 0) { m_JumpToLocation = (*_PROGRAM_COUNTER) + ((short)m_Opcode.offset << 2) + 4; - TestInterpreterJump((*_PROGRAM_COUNTER),m_JumpToLocation,m_Opcode.rs,0); + if ((*_PROGRAM_COUNTER) == m_JumpToLocation) + { + if (!DelaySlotEffectsCompare((*_PROGRAM_COUNTER),m_Opcode.rs,0)) + { + InPermLoop(); + } + } } else { m_JumpToLocation = (*_PROGRAM_COUNTER) + 8; } @@ -1282,7 +1273,13 @@ void R4300iOp32::REGIMM_BLTZL (void) { if (_GPR[m_Opcode.rs].W[0] < 0) { m_NextInstruction = DELAY_SLOT; m_JumpToLocation = (*_PROGRAM_COUNTER) + ((short)m_Opcode.offset << 2) + 4; - TestInterpreterJump((*_PROGRAM_COUNTER),m_JumpToLocation,m_Opcode.rs,0); + if ((*_PROGRAM_COUNTER) == m_JumpToLocation) + { + if (!DelaySlotEffectsCompare((*_PROGRAM_COUNTER),m_Opcode.rs,0)) + { + InPermLoop(); + } + } } else { m_NextInstruction = JUMP; m_JumpToLocation = (*_PROGRAM_COUNTER) + 8; @@ -1293,7 +1290,13 @@ void R4300iOp32::REGIMM_BGEZL (void) { if (_GPR[m_Opcode.rs].W[0] >= 0) { m_NextInstruction = DELAY_SLOT; m_JumpToLocation = (*_PROGRAM_COUNTER) + ((short)m_Opcode.offset << 2) + 4; - TestInterpreterJump((*_PROGRAM_COUNTER),m_JumpToLocation,m_Opcode.rs,0); + if ((*_PROGRAM_COUNTER) == m_JumpToLocation) + { + if (!DelaySlotEffectsCompare((*_PROGRAM_COUNTER),m_Opcode.rs,0)) + { + InPermLoop(); + } + } } else { m_NextInstruction = JUMP; m_JumpToLocation = (*_PROGRAM_COUNTER) + 8; @@ -1304,7 +1307,13 @@ void R4300iOp32::REGIMM_BLTZAL (void) { m_NextInstruction = DELAY_SLOT; if (_GPR[m_Opcode.rs].W[0] < 0) { m_JumpToLocation = (*_PROGRAM_COUNTER) + ((short)m_Opcode.offset << 2) + 4; - TestInterpreterJump((*_PROGRAM_COUNTER),m_JumpToLocation,m_Opcode.rs,0); + if ((*_PROGRAM_COUNTER) == m_JumpToLocation) + { + if (!DelaySlotEffectsCompare((*_PROGRAM_COUNTER),m_Opcode.rs,0)) + { + InPermLoop(); + } + } } else { m_JumpToLocation = (*_PROGRAM_COUNTER) + 8; } @@ -1315,7 +1324,13 @@ void R4300iOp32::REGIMM_BGEZAL (void) { m_NextInstruction = DELAY_SLOT; if (_GPR[m_Opcode.rs].W[0] >= 0) { m_JumpToLocation = (*_PROGRAM_COUNTER) + ((short)m_Opcode.offset << 2) + 4; - TestInterpreterJump((*_PROGRAM_COUNTER),m_JumpToLocation,m_Opcode.rs,0); + if ((*_PROGRAM_COUNTER) == m_JumpToLocation) + { + if (!DelaySlotEffectsCompare((*_PROGRAM_COUNTER),m_Opcode.rs,0)) + { + InPermLoop(); + } + } } else { m_JumpToLocation = (*_PROGRAM_COUNTER) + 8; } diff --git a/Source/Project64/N64 System/Interpreter/Interpreter Ops 32.h b/Source/Project64/N64 System/Interpreter/Interpreter Ops 32.h index 1427ce5e7..441739468 100644 --- a/Source/Project64/N64 System/Interpreter/Interpreter Ops 32.h +++ b/Source/Project64/N64 System/Interpreter/Interpreter Ops 32.h @@ -1,5 +1,3 @@ -typedef void ( * R4300iOp_FUNC )(); - class R4300iOp32 : public R4300iOp { @@ -155,17 +153,5 @@ public: static void UnknownOpcode ( void ); - static R4300iOp_FUNC * BuildInterpreter (void ); - -private: - static void SPECIAL (void); - static void REGIMM (void); - static void COP0 (void); - static void COP0_CO (void); - static void COP1 (void); - static void COP1_BC (void); - static void COP1_S (void); - static void COP1_D (void); - static void COP1_W (void); - static void COP1_L (void); + static Func * BuildInterpreter (void ); }; diff --git a/Source/Project64/N64 System/Interpreter/Interpreter Ops.cpp b/Source/Project64/N64 System/Interpreter/Interpreter Ops.cpp index 22aac338f..8d4ea41e3 100644 --- a/Source/Project64/N64 System/Interpreter/Interpreter Ops.cpp +++ b/Source/Project64/N64 System/Interpreter/Interpreter Ops.cpp @@ -34,17 +34,17 @@ DWORD R4300iOp::m_NextInstruction; OPCODE R4300iOp::m_Opcode; DWORD R4300iOp::m_JumpToLocation; -R4300iOp_FUNC R4300iOp::Jump_Opcode[64]; -R4300iOp_FUNC R4300iOp::Jump_Special[64]; -R4300iOp_FUNC R4300iOp::Jump_Regimm[32]; -R4300iOp_FUNC R4300iOp::Jump_CoP0[32]; -R4300iOp_FUNC R4300iOp::Jump_CoP0_Function[64]; -R4300iOp_FUNC R4300iOp::Jump_CoP1[32]; -R4300iOp_FUNC R4300iOp::Jump_CoP1_BC[32]; -R4300iOp_FUNC R4300iOp::Jump_CoP1_S[64]; -R4300iOp_FUNC R4300iOp::Jump_CoP1_D[64]; -R4300iOp_FUNC R4300iOp::Jump_CoP1_W[64]; -R4300iOp_FUNC R4300iOp::Jump_CoP1_L[64]; +R4300iOp::Func R4300iOp::Jump_Opcode[64]; +R4300iOp::Func R4300iOp::Jump_Special[64]; +R4300iOp::Func R4300iOp::Jump_Regimm[32]; +R4300iOp::Func R4300iOp::Jump_CoP0[32]; +R4300iOp::Func R4300iOp::Jump_CoP0_Function[64]; +R4300iOp::Func R4300iOp::Jump_CoP1[32]; +R4300iOp::Func R4300iOp::Jump_CoP1_BC[32]; +R4300iOp::Func R4300iOp::Jump_CoP1_S[64]; +R4300iOp::Func R4300iOp::Jump_CoP1_D[64]; +R4300iOp::Func R4300iOp::Jump_CoP1_W[64]; +R4300iOp::Func R4300iOp::Jump_CoP1_L[64]; const DWORD R4300iOp::SWL_MASK[4] = { 0x00000000, 0xFF000000,0xFFFF0000,0xFFFFFF00 }; const DWORD R4300iOp::SWR_MASK[4] = { 0x00FFFFFF, 0x0000FFFF,0x000000FF,0x00000000 }; @@ -80,48 +80,48 @@ int RoundingModel = _RC_NEAR; return; void R4300iOp::SPECIAL (void) { - ((void (*)()) Jump_Special[ m_Opcode.funct ])(); + Jump_Special[ m_Opcode.funct ](); } void R4300iOp::REGIMM (void) { - ((void (*)()) Jump_Regimm[ m_Opcode.rt ])(); + Jump_Regimm[ m_Opcode.rt ](); } void R4300iOp::COP0 (void) { - ((void (*)()) Jump_CoP0[ m_Opcode.rs ])(); + Jump_CoP0[ m_Opcode.rs ](); } void R4300iOp::COP0_CO (void) { - ((void (*)()) Jump_CoP0_Function[ m_Opcode.funct ])(); + Jump_CoP0_Function[ m_Opcode.funct ](); } void R4300iOp::COP1 (void) { - ((void (*)()) Jump_CoP1[ m_Opcode.fmt ])(); + Jump_CoP1[ m_Opcode.fmt ](); } void R4300iOp::COP1_BC (void) { - ((void (*)()) Jump_CoP1_BC[ m_Opcode.ft ])(); + Jump_CoP1_BC[ m_Opcode.ft ](); } void R4300iOp::COP1_S (void) { _controlfp(RoundingModel,_MCW_RC); - ((void (*)()) Jump_CoP1_S[ m_Opcode.funct ])(); + Jump_CoP1_S[ m_Opcode.funct ](); } void R4300iOp::COP1_D (void) { _controlfp(RoundingModel,_MCW_RC); - ((void (*)()) Jump_CoP1_D[ m_Opcode.funct ])(); + Jump_CoP1_D[ m_Opcode.funct ](); } void R4300iOp::COP1_W (void) { - ((void (*)()) Jump_CoP1_W[ m_Opcode.funct ])(); + Jump_CoP1_W[ m_Opcode.funct ](); } void R4300iOp::COP1_L (void) { - ((void (*)()) Jump_CoP1_L[ m_Opcode.funct ])(); + Jump_CoP1_L[ m_Opcode.funct ](); } -R4300iOp_FUNC * R4300iOp::BuildInterpreter (void ) +R4300iOp::Func * R4300iOp::BuildInterpreter (void ) { Jump_Opcode[ 0] = SPECIAL; Jump_Opcode[ 1] = REGIMM; @@ -713,11 +713,25 @@ R4300iOp_FUNC * R4300iOp::BuildInterpreter (void ) return Jump_Opcode; } +int DelaySlotEffectsCompare (DWORD PC, DWORD Reg1, DWORD Reg2); + +void TestInterpreterJump (DWORD PC, DWORD TargetPC, int Reg1, int Reg2) +{ + if (PC != TargetPC) { return; } + if (DelaySlotEffectsCompare(PC,Reg1,Reg2)) { return; } + InPermLoop(); + R4300iOp::m_NextInstruction = DELAY_SLOT; + R4300iOp::m_TestTimer = TRUE; +} + /************************* m_Opcode functions *************************/ void R4300iOp::J (void) { m_NextInstruction = DELAY_SLOT; m_JumpToLocation = ((*_PROGRAM_COUNTER) & 0xF0000000) + (m_Opcode.target << 2); - TestInterpreterJump((*_PROGRAM_COUNTER),m_JumpToLocation,0,0); + if ((*_PROGRAM_COUNTER) == m_JumpToLocation) + { + InPermLoop(); + } } void R4300iOp::JAL (void) { @@ -728,8 +742,6 @@ void R4300iOp::JAL (void) { if ((*_PROGRAM_COUNTER) == m_JumpToLocation) { InPermLoop(); - m_NextInstruction = DELAY_SLOT; - m_TestTimer = TRUE; } } @@ -737,7 +749,13 @@ void R4300iOp::BEQ (void) { m_NextInstruction = DELAY_SLOT; if (_GPR[m_Opcode.rs].DW == _GPR[m_Opcode.rt].DW) { m_JumpToLocation = (*_PROGRAM_COUNTER) + ((short)m_Opcode.offset << 2) + 4; - TestInterpreterJump((*_PROGRAM_COUNTER),m_JumpToLocation,m_Opcode.rs,m_Opcode.rt); + if ((*_PROGRAM_COUNTER) == m_JumpToLocation) + { + if (!DelaySlotEffectsCompare(*_PROGRAM_COUNTER,m_Opcode.rs,m_Opcode.rt)) + { + InPermLoop(); + } + } } else { m_JumpToLocation = (*_PROGRAM_COUNTER) + 8; } @@ -747,7 +765,13 @@ void R4300iOp::BNE (void) { m_NextInstruction = DELAY_SLOT; if (_GPR[m_Opcode.rs].DW != _GPR[m_Opcode.rt].DW) { m_JumpToLocation = (*_PROGRAM_COUNTER) + ((short)m_Opcode.offset << 2) + 4; - TestInterpreterJump((*_PROGRAM_COUNTER),m_JumpToLocation,m_Opcode.rs,m_Opcode.rt); + if ((*_PROGRAM_COUNTER) == m_JumpToLocation) + { + if (!DelaySlotEffectsCompare(*_PROGRAM_COUNTER,m_Opcode.rs,m_Opcode.rt)) + { + InPermLoop(); + } + } } else { m_JumpToLocation = (*_PROGRAM_COUNTER) + 8; } @@ -757,7 +781,13 @@ void R4300iOp::BLEZ (void) { m_NextInstruction = DELAY_SLOT; if (_GPR[m_Opcode.rs].DW <= 0) { m_JumpToLocation = (*_PROGRAM_COUNTER) + ((short)m_Opcode.offset << 2) + 4; - TestInterpreterJump((*_PROGRAM_COUNTER),m_JumpToLocation,m_Opcode.rs,0); + if ((*_PROGRAM_COUNTER) == m_JumpToLocation) + { + if (!DelaySlotEffectsCompare(*_PROGRAM_COUNTER,m_Opcode.rs,0)) + { + InPermLoop(); + } + } } else { m_JumpToLocation = (*_PROGRAM_COUNTER) + 8; } @@ -767,7 +797,13 @@ void R4300iOp::BGTZ (void) { m_NextInstruction = DELAY_SLOT; if (_GPR[m_Opcode.rs].DW > 0) { m_JumpToLocation = (*_PROGRAM_COUNTER) + ((short)m_Opcode.offset << 2) + 4; - TestInterpreterJump((*_PROGRAM_COUNTER),m_JumpToLocation,m_Opcode.rs,0); + if ((*_PROGRAM_COUNTER) == m_JumpToLocation) + { + if (!DelaySlotEffectsCompare(*_PROGRAM_COUNTER,m_Opcode.rs,0)) + { + InPermLoop(); + } + } } else { m_JumpToLocation = (*_PROGRAM_COUNTER) + 8; } @@ -844,7 +880,13 @@ void R4300iOp::BEQL (void) { if (_GPR[m_Opcode.rs].DW == _GPR[m_Opcode.rt].DW) { m_NextInstruction = DELAY_SLOT; m_JumpToLocation = (*_PROGRAM_COUNTER) + ((short)m_Opcode.offset << 2) + 4; - TestInterpreterJump((*_PROGRAM_COUNTER),m_JumpToLocation,m_Opcode.rs,m_Opcode.rt); + if ((*_PROGRAM_COUNTER) == m_JumpToLocation) + { + if (!DelaySlotEffectsCompare(*_PROGRAM_COUNTER,m_Opcode.rs,m_Opcode.rt)) + { + InPermLoop(); + } + } } else { m_NextInstruction = JUMP; m_JumpToLocation = (*_PROGRAM_COUNTER) + 8; @@ -855,7 +897,13 @@ void R4300iOp::BNEL (void) { if (_GPR[m_Opcode.rs].DW != _GPR[m_Opcode.rt].DW) { m_NextInstruction = DELAY_SLOT; m_JumpToLocation = (*_PROGRAM_COUNTER) + ((short)m_Opcode.offset << 2) + 4; - TestInterpreterJump((*_PROGRAM_COUNTER),m_JumpToLocation,m_Opcode.rs,m_Opcode.rt); + if ((*_PROGRAM_COUNTER) == m_JumpToLocation) + { + if (!DelaySlotEffectsCompare(*_PROGRAM_COUNTER,m_Opcode.rs,m_Opcode.rt)) + { + InPermLoop(); + } + } } else { m_NextInstruction = JUMP; m_JumpToLocation = (*_PROGRAM_COUNTER) + 8; @@ -866,7 +914,13 @@ void R4300iOp::BLEZL (void) { if (_GPR[m_Opcode.rs].DW <= 0) { m_NextInstruction = DELAY_SLOT; m_JumpToLocation = (*_PROGRAM_COUNTER) + ((short)m_Opcode.offset << 2) + 4; - TestInterpreterJump((*_PROGRAM_COUNTER),m_JumpToLocation,m_Opcode.rs,0); + if ((*_PROGRAM_COUNTER) == m_JumpToLocation) + { + if (!DelaySlotEffectsCompare(*_PROGRAM_COUNTER,m_Opcode.rs,0)) + { + InPermLoop(); + } + } } else { m_NextInstruction = JUMP; m_JumpToLocation = (*_PROGRAM_COUNTER) + 8; @@ -877,7 +931,13 @@ void R4300iOp::BGTZL (void) { if (_GPR[m_Opcode.rs].DW > 0) { m_NextInstruction = DELAY_SLOT; m_JumpToLocation = (*_PROGRAM_COUNTER) + ((short)m_Opcode.offset << 2) + 4; - TestInterpreterJump((*_PROGRAM_COUNTER),m_JumpToLocation,m_Opcode.rs,0); + if ((*_PROGRAM_COUNTER) == m_JumpToLocation) + { + if (!DelaySlotEffectsCompare(*_PROGRAM_COUNTER,m_Opcode.rs,0)) + { + InPermLoop(); + } + } } else { m_NextInstruction = JUMP; m_JumpToLocation = (*_PROGRAM_COUNTER) + 8; diff --git a/Source/Project64/N64 System/Mips/Memory Class.h b/Source/Project64/N64 System/Mips/Memory Class.h index a38ccc3b6..be8a444f9 100644 --- a/Source/Project64/N64 System/Mips/Memory Class.h +++ b/Source/Project64/N64 System/Mips/Memory Class.h @@ -1,4 +1,4 @@ -#include +//#include #ifdef toremove enum MemorySize { _8Bit, _16Bit, _32Bit, _64Bit }; @@ -14,6 +14,7 @@ public: }; class CCodeSection; +class CRegInfo; class CMipsMemory { @@ -43,16 +44,16 @@ public: virtual void UnProtectMemory ( DWORD StartVaddr, DWORD EndVaddr ) = 0; //Compilation Functions - virtual void ResetMemoryStack ( CCodeSection * Section ) = 0; - virtual void Compile_LB ( int Reg, DWORD Addr, BOOL SignExtend ) = 0; - virtual void Compile_LH ( int Reg, DWORD Addr, BOOL SignExtend ) = 0; - virtual void Compile_LW ( CCodeSection * Section, int Reg, DWORD Addr ) = 0; + virtual void ResetMemoryStack ( CRegInfo & RegInfo ) = 0; + virtual void Compile_LB ( CX86Ops::x86Reg Reg, DWORD Addr, BOOL SignExtend ) = 0; + virtual void Compile_LH ( CX86Ops::x86Reg Reg, DWORD Addr, BOOL SignExtend ) = 0; + virtual void Compile_LW ( CCodeSection * Section, CX86Ops::x86Reg Reg, DWORD Addr ) = 0; virtual void Compile_SB_Const ( BYTE Value, DWORD Addr ) = 0; - virtual void Compile_SB_Register ( int x86Reg, DWORD Addr ) = 0; + virtual void Compile_SB_Register ( CX86Ops::x86Reg Reg, DWORD Addr ) = 0; virtual void Compile_SH_Const ( WORD Value, DWORD Addr ) = 0; - virtual void Compile_SH_Register ( int x86Reg, DWORD Addr ) = 0; + virtual void Compile_SH_Register ( CX86Ops::x86Reg Reg, DWORD Addr ) = 0; virtual void Compile_SW_Const ( DWORD Value, DWORD Addr ) = 0; - virtual void Compile_SW_Register ( CCodeSection * Section, int x86Reg, DWORD Addr ) = 0; + virtual void Compile_SW_Register ( CRegInfo & RegInfo, CX86Ops::x86Reg Reg, DWORD Addr ) = 0; }; @@ -60,7 +61,8 @@ class CRSP_Plugin; class CMipsMemoryVM : public CMipsMemory, - public CTransVaddr + public CTransVaddr, + private CX86Ops #ifdef toremove , @@ -159,16 +161,16 @@ public: void UnProtectMemory ( DWORD StartVaddr, DWORD EndVaddr ); //Compilation Functions - void ResetMemoryStack ( CCodeSection * Section ); - void Compile_LB ( int Reg, DWORD Addr, BOOL SignExtend ); - void Compile_LH ( int Reg, DWORD Addr, BOOL SignExtend ); - void Compile_LW ( CCodeSection * Section, int Reg, DWORD Addr ); + void ResetMemoryStack ( CRegInfo & RegInfo ); + void Compile_LB ( CX86Ops::x86Reg Reg, DWORD Addr, BOOL SignExtend ); + void Compile_LH ( CX86Ops::x86Reg Reg, DWORD Addr, BOOL SignExtend ); + void Compile_LW ( CCodeSection * Section, CX86Ops::x86Reg Reg, DWORD Addr ); void Compile_SB_Const ( BYTE Value, DWORD Addr ); - void Compile_SB_Register ( int x86Reg, DWORD Addr ); + void Compile_SB_Register ( CX86Ops::x86Reg Reg, DWORD Addr ); void Compile_SH_Const ( WORD Value, DWORD Addr ); - void Compile_SH_Register ( int x86Reg, DWORD Addr ); + void Compile_SH_Register ( CX86Ops::x86Reg Reg, DWORD Addr ); void Compile_SW_Const ( DWORD Value, DWORD Addr ); - void Compile_SW_Register ( CCodeSection * Section, int x86Reg, DWORD Addr ); + void Compile_SW_Register ( CRegInfo & RegInfo, CX86Ops::x86Reg Reg, DWORD Addr ); //Functions for TLB notification void TLB_Mapped ( DWORD VAddr, DWORD Len, DWORD PAddr, bool bReadOnly ); @@ -244,4 +246,3 @@ private: }; extern void ** JumpTable; -extern BYTE *RecompPos; diff --git a/Source/Project64/N64 System/Mips/Memory.cpp b/Source/Project64/N64 System/Mips/Memory.cpp index 2c5f1a1ce..60cf740bb 100644 --- a/Source/Project64/N64 System/Mips/Memory.cpp +++ b/Source/Project64/N64 System/Mips/Memory.cpp @@ -621,7 +621,7 @@ void CMipsMemoryVM::MemoryFilterFailed( char * FailureType, DWORD MipsAddress, } #endif -void CMipsMemoryVM::Compile_LB ( int Reg, DWORD VAddr, BOOL SignExtend) { +void CMipsMemoryVM::Compile_LB ( CX86Ops::x86Reg Reg, DWORD VAddr, BOOL SignExtend) { _Notify->BreakPoint(__FILE__,__LINE__); #ifdef tofix DWORD PAddr; @@ -658,7 +658,7 @@ void CMipsMemoryVM::Compile_LB ( int Reg, DWORD VAddr, BOOL SignExtend) { #endif } -void CMipsMemoryVM::Compile_LH ( int Reg, DWORD VAddr, BOOL SignExtend) { +void CMipsMemoryVM::Compile_LH ( CX86Ops::x86Reg Reg, DWORD VAddr, BOOL SignExtend) { _Notify->BreakPoint(__FILE__,__LINE__); #ifdef tofix char VarName[100]; @@ -695,9 +695,7 @@ void CMipsMemoryVM::Compile_LH ( int Reg, DWORD VAddr, BOOL SignExtend) { #endif } -void CMipsMemoryVM::Compile_LW ( CCodeSection * Section, int Reg, DWORD VAddr ) { - _Notify->BreakPoint(__FILE__,__LINE__); -#ifdef tofix +void CMipsMemoryVM::Compile_LW (CCodeSection * Section, CX86Ops::x86Reg Reg, DWORD VAddr ) { char VarName[100]; DWORD PAddr; @@ -727,10 +725,10 @@ void CMipsMemoryVM::Compile_LW ( CCodeSection * Section, int Reg, DWORD VAddr ) break; } switch (PAddr) { - case 0x04040010: MoveVariableToX86reg(&SP_STATUS_REG,"SP_STATUS_REG",Reg); break; - case 0x04040014: MoveVariableToX86reg(&SP_DMA_FULL_REG,"SP_DMA_FULL_REG",Reg); break; - case 0x04040018: MoveVariableToX86reg(&SP_DMA_BUSY_REG,"SP_DMA_BUSY_REG",Reg); break; - case 0x04080000: MoveVariableToX86reg(&SP_PC_REG,"SP_PC_REG",Reg); break; + case 0x04040010: MoveVariableToX86reg(&_Reg->SP_STATUS_REG,"SP_STATUS_REG",Reg); break; + case 0x04040014: MoveVariableToX86reg(&_Reg->SP_DMA_FULL_REG,"SP_DMA_FULL_REG",Reg); break; + case 0x04040018: MoveVariableToX86reg(&_Reg->SP_DMA_BUSY_REG,"SP_DMA_BUSY_REG",Reg); break; + case 0x04080000: MoveVariableToX86reg(&_Reg->SP_PC_REG,"SP_PC_REG",Reg); break; default: MoveConstToX86reg(0,Reg); if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { DisplayError("Compile_LW\nFailed to translate address: %X",VAddr); } @@ -743,10 +741,10 @@ void CMipsMemoryVM::Compile_LW ( CCodeSection * Section, int Reg, DWORD VAddr ) break; case 0x04300000: switch (PAddr) { - case 0x04300000: MoveVariableToX86reg(&MI_MODE_REG,"MI_MODE_REG",Reg); break; - case 0x04300004: MoveVariableToX86reg(&MI_VERSION_REG,"MI_VERSION_REG",Reg); break; - case 0x04300008: MoveVariableToX86reg(&MI_INTR_REG,"MI_INTR_REG",Reg); break; - case 0x0430000C: MoveVariableToX86reg(&MI_INTR_MASK_REG,"MI_INTR_MASK_REG",Reg); break; + case 0x04300000: MoveVariableToX86reg(&_Reg->MI_MODE_REG,"MI_MODE_REG",Reg); break; + case 0x04300004: MoveVariableToX86reg(&_Reg->MI_VERSION_REG,"MI_VERSION_REG",Reg); break; + case 0x04300008: MoveVariableToX86reg(&_Reg->MI_INTR_REG,"MI_INTR_REG",Reg); break; + case 0x0430000C: MoveVariableToX86reg(&_Reg->MI_INTR_MASK_REG,"MI_INTR_MASK_REG",Reg); break; default: MoveConstToX86reg(0,Reg); if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { DisplayError("Compile_LW\nFailed to translate address: %X",VAddr); } @@ -755,14 +753,17 @@ void CMipsMemoryVM::Compile_LW ( CCodeSection * Section, int Reg, DWORD VAddr ) case 0x04400000: switch (PAddr) { case 0x04400010: - _N64System->GetRecompiler()->UpdateCounters(&Section->BlockCycleCount(),&Section->BlockRandomModifier(),FALSE); - Section->BlockCycleCount() = 0; - Section->BlockRandomModifier() = 0; + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + Section->UpdateCounters(&RegInfo.BlockCycleCount(),&RegInfo.BlockRandomModifier(),FALSE); + RegInfo.BlockCycleCount() = 0; + RegInfo.BlockRandomModifier() = 0; Pushad(); MoveConstToX86reg((DWORD)this,x86_ECX); Call_Direct(AddressOf(CMipsMemoryVM::UpdateHalfLine),"CMipsMemoryVM::UpdateHalfLine"); Popad(); - MoveVariableToX86reg(m_HalfLine,"m_HalfLine",Reg); + MoveVariableToX86reg(&m_HalfLine,"m_HalfLine",Reg); +#endif break; default: MoveConstToX86reg(0,Reg); @@ -774,13 +775,16 @@ void CMipsMemoryVM::Compile_LW ( CCodeSection * Section, int Reg, DWORD VAddr ) case 0x04500004: if (_Settings->LoadBool(Game_FixedAudio)) { - _N64System->GetRecompiler()->UpdateCounters(&Section->BlockCycleCount(),&Section->BlockRandomModifier(),FALSE); + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + CRecompilerOps::UpdateCounters(&RegInfo.BlockCycleCount(),&RegInfo.BlockRandomModifier(),FALSE); Pushad(); MoveConstToX86reg((DWORD)_Audio,x86_ECX); - Call_Direct(CAudio::AiGetLength,"AiGetLength"); + Call_Direct(AddressOf(CAudio::AiGetLength),"AiGetLength"); MoveX86regToVariable(x86_EAX,&m_TempValue,"m_TempValue"); Popad(); MoveVariableToX86reg(&m_TempValue,"m_TempValue",Reg); +#endif } else { if (AiReadLength != NULL) { Pushad(); @@ -798,12 +802,12 @@ void CMipsMemoryVM::Compile_LW ( CCodeSection * Section, int Reg, DWORD VAddr ) { Pushad(); MoveConstToX86reg((DWORD)_Audio,x86_ECX); - Call_Direct(CAudio::AiGetStatus,"AiGetStatus"); + Call_Direct(AddressOf(CAudio::AiGetStatus),"AiGetStatus"); MoveX86regToVariable(x86_EAX,&m_TempValue,"m_TempValue"); Popad(); MoveVariableToX86reg(&m_TempValue,"m_TempValue",Reg); } else { - MoveVariableToX86reg(&AI_STATUS_REG,"AI_STATUS_REG",Reg); + MoveVariableToX86reg(&_Reg->AI_STATUS_REG,"AI_STATUS_REG",Reg); } break; default: @@ -813,15 +817,15 @@ void CMipsMemoryVM::Compile_LW ( CCodeSection * Section, int Reg, DWORD VAddr ) break; case 0x04600000: switch (PAddr) { - case 0x04600010: MoveVariableToX86reg(&PI_STATUS_REG,"PI_STATUS_REG",Reg); break; - case 0x04600014: MoveVariableToX86reg(&PI_DOMAIN1_REG,"PI_DOMAIN1_REG",Reg); break; - case 0x04600018: MoveVariableToX86reg(&PI_BSD_DOM1_PWD_REG,"PI_BSD_DOM1_PWD_REG",Reg); break; - case 0x0460001C: MoveVariableToX86reg(&PI_BSD_DOM1_PGS_REG,"PI_BSD_DOM1_PGS_REG",Reg); break; - case 0x04600020: MoveVariableToX86reg(&PI_BSD_DOM1_RLS_REG,"PI_BSD_DOM1_RLS_REG",Reg); break; - case 0x04600024: MoveVariableToX86reg(&PI_DOMAIN2_REG,"PI_DOMAIN2_REG",Reg); break; - case 0x04600028: MoveVariableToX86reg(&PI_BSD_DOM2_PWD_REG,"PI_BSD_DOM2_PWD_REG",Reg); break; - case 0x0460002C: MoveVariableToX86reg(&PI_BSD_DOM2_PGS_REG,"PI_BSD_DOM2_PGS_REG",Reg); break; - case 0x04600030: MoveVariableToX86reg(&PI_BSD_DOM2_RLS_REG,"PI_BSD_DOM2_RLS_REG",Reg); break; + case 0x04600010: MoveVariableToX86reg(&_Reg->PI_STATUS_REG,"PI_STATUS_REG",Reg); break; + case 0x04600014: MoveVariableToX86reg(&_Reg->PI_DOMAIN1_REG,"PI_DOMAIN1_REG",Reg); break; + case 0x04600018: MoveVariableToX86reg(&_Reg->PI_BSD_DOM1_PWD_REG,"PI_BSD_DOM1_PWD_REG",Reg); break; + case 0x0460001C: MoveVariableToX86reg(&_Reg->PI_BSD_DOM1_PGS_REG,"PI_BSD_DOM1_PGS_REG",Reg); break; + case 0x04600020: MoveVariableToX86reg(&_Reg->PI_BSD_DOM1_RLS_REG,"PI_BSD_DOM1_RLS_REG",Reg); break; + case 0x04600024: MoveVariableToX86reg(&_Reg->PI_DOMAIN2_REG,"PI_DOMAIN2_REG",Reg); break; + case 0x04600028: MoveVariableToX86reg(&_Reg->PI_BSD_DOM2_PWD_REG,"PI_BSD_DOM2_PWD_REG",Reg); break; + case 0x0460002C: MoveVariableToX86reg(&_Reg->PI_BSD_DOM2_PGS_REG,"PI_BSD_DOM2_PGS_REG",Reg); break; + case 0x04600030: MoveVariableToX86reg(&_Reg->PI_BSD_DOM2_RLS_REG,"PI_BSD_DOM2_RLS_REG",Reg); break; default: MoveConstToX86reg(0,Reg); if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { DisplayError("Compile_LW\nFailed to translate address: %X",VAddr); } @@ -829,8 +833,8 @@ void CMipsMemoryVM::Compile_LW ( CCodeSection * Section, int Reg, DWORD VAddr ) break; case 0x04700000: switch (PAddr) { - case 0x0470000C: MoveVariableToX86reg(&RI_SELECT_REG,"RI_SELECT_REG",Reg); break; - case 0x04700010: MoveVariableToX86reg(&RI_REFRESH_REG,"RI_REFRESH_REG",Reg); break; + case 0x0470000C: MoveVariableToX86reg(&_Reg->RI_SELECT_REG,"RI_SELECT_REG",Reg); break; + case 0x04700010: MoveVariableToX86reg(&_Reg->RI_REFRESH_REG,"RI_REFRESH_REG",Reg); break; default: MoveConstToX86reg(0,Reg); if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { DisplayError("Compile_LW\nFailed to translate address: %X",VAddr); } @@ -838,7 +842,7 @@ void CMipsMemoryVM::Compile_LW ( CCodeSection * Section, int Reg, DWORD VAddr ) break; case 0x04800000: switch (PAddr) { - case 0x04800018: MoveVariableToX86reg(&SI_STATUS_REG,"SI_STATUS_REG",Reg); break; + case 0x04800018: MoveVariableToX86reg(&_Reg->SI_STATUS_REG,"SI_STATUS_REG",Reg); break; default: MoveConstToX86reg(0,Reg); if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { DisplayError("Compile_LW\nFailed to translate address: %X",VAddr); } @@ -855,7 +859,6 @@ void CMipsMemoryVM::Compile_LW ( CCodeSection * Section, int Reg, DWORD VAddr ) DisplayError("Compile_LW\nFailed to translate address: %X",VAddr); } } -#endif } void CMipsMemoryVM::Compile_SB_Const ( BYTE Value, DWORD VAddr ) { @@ -888,7 +891,7 @@ void CMipsMemoryVM::Compile_SB_Const ( BYTE Value, DWORD VAddr ) { #endif } -void CMipsMemoryVM::Compile_SB_Register ( int x86Reg, DWORD VAddr ) { +void CMipsMemoryVM::Compile_SB_Register ( CX86Ops::x86Reg Reg, DWORD VAddr ) { _Notify->BreakPoint(__FILE__,__LINE__); #ifdef tofix char VarName[100]; @@ -948,7 +951,7 @@ void CMipsMemoryVM::Compile_SH_Const ( WORD Value, DWORD VAddr ) { #endif } -void CMipsMemoryVM::Compile_SH_Register ( int x86Reg, DWORD VAddr ) { +void CMipsMemoryVM::Compile_SH_Register ( CX86Ops::x86Reg Reg, DWORD VAddr ) { _Notify->BreakPoint(__FILE__,__LINE__); #ifdef tofix char VarName[100]; @@ -1320,7 +1323,7 @@ void CMipsMemoryVM::Compile_SW_Const ( DWORD Value, DWORD VAddr ) { #endif } -void CMipsMemoryVM::Compile_SW_Register ( CCodeSection * Section, int x86Reg, DWORD VAddr ) +void CMipsMemoryVM::Compile_SW_Register (CRegInfo & RegInfo, CX86Ops::x86Reg Reg, DWORD VAddr ) { _Notify->BreakPoint(__FILE__,__LINE__); #ifdef tofix @@ -1590,7 +1593,7 @@ void CMipsMemoryVM::Compile_SW_Register ( CCodeSection * Section, int x86Reg, DW #endif } -void CMipsMemoryVM::ResetMemoryStack (CCodeSection * Section) +void CMipsMemoryVM::ResetMemoryStack (CRegInfo & RegInfo) { _Notify->BreakPoint(__FILE__,__LINE__); #ifdef tofix diff --git a/Source/Project64/N64 System/Mips/OpCode Analysis Class.cpp b/Source/Project64/N64 System/Mips/OpCode Analysis Class.cpp index 0f10be673..b1ecc579c 100644 --- a/Source/Project64/N64 System/Mips/OpCode Analysis Class.cpp +++ b/Source/Project64/N64 System/Mips/OpCode Analysis Class.cpp @@ -1,6 +1,6 @@ #include "stdafx.h" -extern CLog TlbLog; +#ifdef tofix COpcodeAnalysis::COpcodeAnalysis(OPCODE &opcode) : m_opcode(opcode) { @@ -1152,3 +1152,5 @@ void COpcodeAnalysis::OpcodeParam(char * CommandName) } + +#endif \ No newline at end of file diff --git a/Source/Project64/N64 System/Mips/OpCode Analysis Class.h b/Source/Project64/N64 System/Mips/OpCode Analysis Class.h index 4d746afb9..8a6a56d21 100644 --- a/Source/Project64/N64 System/Mips/OpCode Analysis Class.h +++ b/Source/Project64/N64 System/Mips/OpCode Analysis Class.h @@ -1,3 +1,5 @@ +#ifdef tofix + class COpcodeAnalysis { OPCODE &m_opcode; @@ -27,4 +29,6 @@ public: //Stops execution bool TerminateExecution ( void ); -}; \ No newline at end of file +}; + +#endif \ No newline at end of file diff --git a/Source/Project64/N64 System/Mips/OpCode Class.cpp b/Source/Project64/N64 System/Mips/OpCode Class.cpp index 6d71283e3..8c6090cd2 100644 --- a/Source/Project64/N64 System/Mips/OpCode Class.cpp +++ b/Source/Project64/N64 System/Mips/OpCode Class.cpp @@ -1,5 +1,6 @@ #include "stdafx.h" +#ifdef toremove QWORD const COpcode::LDL_MASK[8] = { 0x0000000000000000,0x00000000000000FF,0x000000000000FFFF, 0x0000000000FFFFFF,0x00000000FFFFFFFF,0x000000FFFFFFFFFF, 0x0000FFFFFFFFFFFF,0x00FFFFFFFFFFFFFF }; @@ -116,3 +117,4 @@ bool COpcode::SetPC ( DWORD VirtualAddress ) { return Result; } +#endif diff --git a/Source/Project64/N64 System/Mips/OpCode Class.h b/Source/Project64/N64 System/Mips/OpCode Class.h index dead9ca7d..c88567887 100644 --- a/Source/Project64/N64 System/Mips/OpCode Class.h +++ b/Source/Project64/N64 System/Mips/OpCode Class.h @@ -1,3 +1,5 @@ +#ifdef toremove + #ifndef __OPCODE_CLASS__H__ #define __OPCODE_CLASS__H__ @@ -57,97 +59,6 @@ enum StepType DoDelaySlot, InsideDelaySlot, DelaySlotDone, BranchCompiled }; -//enum R4300iOpCodes -//{ -// R4300i_SPECIAL = 0, R4300i_REGIMM = 1, R4300i_J = 2, R4300i_JAL = 3, -// R4300i_BEQ = 4, R4300i_BNE = 5, R4300i_BLEZ = 6, R4300i_BGTZ = 7, -// R4300i_ADDI = 8, R4300i_ADDIU = 9, R4300i_SLTI = 10, R4300i_SLTIU = 11, -// R4300i_ANDI = 12, R4300i_ORI = 13, R4300i_XORI = 14, R4300i_LUI = 15, -// R4300i_CP0 = 16, R4300i_CP1 = 17, R4300i_BEQL = 20, R4300i_BNEL = 21, -// R4300i_BLEZL = 22, R4300i_BGTZL = 23, R4300i_DADDI = 24, R4300i_DADDIU = 25, -// R4300i_LDL = 26, R4300i_LDR = 27, R4300i_LB = 32, R4300i_LH = 33, -// R4300i_LWL = 34, R4300i_LW = 35, R4300i_LBU = 36, R4300i_LHU = 37, -// R4300i_LWR = 38, R4300i_LWU = 39, R4300i_SB = 40, R4300i_SH = 41, -// R4300i_SWL = 42, R4300i_SW = 43, R4300i_SDL = 44, R4300i_SDR = 45, -// R4300i_SWR = 46, R4300i_CACHE = 47, R4300i_LL = 48, R4300i_LWC1 = 49, -// R4300i_LDC1 = 53, R4300i_LD = 55, R4300i_SC = 56, R4300i_SWC1 = 57, -// R4300i_SDC1 = 61, R4300i_SDC2 = 62, R4300i_SD = 63 -//}; -// -//enum R4300iSpecialOpCodes -//{ -// R4300i_SPECIAL_SLL = 0, R4300i_SPECIAL_SRL = 2, R4300i_SPECIAL_SRA = 3, -// R4300i_SPECIAL_SLLV = 4, R4300i_SPECIAL_SRLV = 6, R4300i_SPECIAL_SRAV = 7, -// R4300i_SPECIAL_JR = 8, R4300i_SPECIAL_JALR = 9, R4300i_SPECIAL_SYSCALL = 12, -// R4300i_SPECIAL_BREAK = 13, R4300i_SPECIAL_SYNC = 15, R4300i_SPECIAL_MFHI = 16, -// R4300i_SPECIAL_MTHI = 17, R4300i_SPECIAL_MFLO = 18, R4300i_SPECIAL_MTLO = 19, -// R4300i_SPECIAL_DSLLV = 20, R4300i_SPECIAL_DSRLV = 22, R4300i_SPECIAL_DSRAV = 23, -// R4300i_SPECIAL_MULT = 24, R4300i_SPECIAL_MULTU = 25, R4300i_SPECIAL_DIV = 26, -// R4300i_SPECIAL_DIVU = 27, R4300i_SPECIAL_DMULT = 28, R4300i_SPECIAL_DMULTU = 29, -// R4300i_SPECIAL_DDIV = 30, R4300i_SPECIAL_DDIVU = 31, R4300i_SPECIAL_ADD = 32, -// R4300i_SPECIAL_ADDU = 33, R4300i_SPECIAL_SUB = 34, R4300i_SPECIAL_SUBU = 35, -// R4300i_SPECIAL_AND = 36, R4300i_SPECIAL_OR = 37, R4300i_SPECIAL_XOR = 38, -// R4300i_SPECIAL_NOR = 39, R4300i_SPECIAL_SLT = 42, R4300i_SPECIAL_SLTU = 43, -// R4300i_SPECIAL_DADD = 44, R4300i_SPECIAL_DADDU = 45, R4300i_SPECIAL_DSUB = 46, -// R4300i_SPECIAL_DSUBU = 47, R4300i_SPECIAL_TGE = 48, R4300i_SPECIAL_TGEU = 49, -// R4300i_SPECIAL_TLT = 50, R4300i_SPECIAL_TLTU = 51, R4300i_SPECIAL_TEQ = 52, -// R4300i_SPECIAL_TNE = 54, R4300i_SPECIAL_DSLL = 56, R4300i_SPECIAL_DSRL = 58, -// R4300i_SPECIAL_DSRA = 59, R4300i_SPECIAL_DSLL32 = 60, R4300i_SPECIAL_DSRL32 = 62, -// R4300i_SPECIAL_DSRA32 = 63 -//}; -// -//enum R4300iRegImmOpCodes -//{ -// R4300i_REGIMM_BLTZ = 0, R4300i_REGIMM_BGEZ = 1, R4300i_REGIMM_BLTZL = 2, -// R4300i_REGIMM_BGEZL = 3, R4300i_REGIMM_TGEI = 8, R4300i_REGIMM_TGEIU = 9, -// R4300i_REGIMM_TLTI = 10, R4300i_REGIMM_TLTIU = 11, R4300i_REGIMM_TEQI = 12, -// R4300i_REGIMM_TNEI = 14, R4300i_REGIMM_BLTZAL = 16, R4300i_REGIMM_BGEZAL = 17, -// R4300i_REGIMM_BLTZALL = 18, R4300i_REGIMM_BGEZALL = 19, -//}; -// -//enum R4300iCOP0OpCodes -//{ -// R4300i_COP0_MF = 0, R4300i_COP0_MT = 4 -//}; -// -//enum R4300iCOP0C0OpCodes -//{ -// R4300i_COP0_CO_TLBR = 1, R4300i_COP0_CO_TLBWI = 2, R4300i_COP0_CO_TLBWR = 6, -// R4300i_COP0_CO_TLBP = 8, R4300i_COP0_CO_ERET = 24, -//}; -// -//enum R4300iCOP1OpCodes -//{ -// R4300i_COP1_MF = 0, R4300i_COP1_DMF = 1, R4300i_COP1_CF = 2, R4300i_COP1_MT = 4, -// R4300i_COP1_DMT = 5, R4300i_COP1_CT = 6, R4300i_COP1_BC = 8, R4300i_COP1_S = 16, -// R4300i_COP1_D = 17, R4300i_COP1_W = 20, R4300i_COP1_L = 21, -//}; -// -//enum R4300iCOP1BcOpCodes -//{ -// R4300i_COP1_BC_BCF = 0, R4300i_COP1_BC_BCT = 1, R4300i_COP1_BC_BCFL = 2, -// R4300i_COP1_BC_BCTL = 3, -//}; -// -//enum R4300iCOP1FuntOpCodes -//{ -// R4300i_COP1_FUNCT_ADD = 0, R4300i_COP1_FUNCT_SUB = 1, R4300i_COP1_FUNCT_MUL = 2, -// R4300i_COP1_FUNCT_DIV = 3, R4300i_COP1_FUNCT_SQRT = 4, R4300i_COP1_FUNCT_ABS = 5, -// R4300i_COP1_FUNCT_MOV = 6, R4300i_COP1_FUNCT_NEG = 7, R4300i_COP1_FUNCT_ROUND_L = 8, -// R4300i_COP1_FUNCT_TRUNC_L = 9, R4300i_COP1_FUNCT_CEIL_L = 10,R4300i_COP1_FUNCT_FLOOR_L = 11, -// R4300i_COP1_FUNCT_ROUND_W = 12,R4300i_COP1_FUNCT_TRUNC_W = 13,R4300i_COP1_FUNCT_CEIL_W = 14, -// R4300i_COP1_FUNCT_FLOOR_W = 15,R4300i_COP1_FUNCT_CVT_S = 32,R4300i_COP1_FUNCT_CVT_D = 33, -// R4300i_COP1_FUNCT_CVT_W = 36,R4300i_COP1_FUNCT_CVT_L = 37,R4300i_COP1_FUNCT_C_F = 48, -// R4300i_COP1_FUNCT_C_UN = 49,R4300i_COP1_FUNCT_C_EQ = 50,R4300i_COP1_FUNCT_C_UEQ = 51, -// R4300i_COP1_FUNCT_C_OLT = 52,R4300i_COP1_FUNCT_C_ULT = 53,R4300i_COP1_FUNCT_C_OLE = 54, -// R4300i_COP1_FUNCT_C_ULE = 55,R4300i_COP1_FUNCT_C_SF = 56,R4300i_COP1_FUNCT_C_NGLE = 57, -// R4300i_COP1_FUNCT_C_SEQ = 58,R4300i_COP1_FUNCT_C_NGL = 59,R4300i_COP1_FUNCT_C_LT = 60, -// R4300i_COP1_FUNCT_C_NGE = 61,R4300i_COP1_FUNCT_C_LE = 62,R4300i_COP1_FUNCT_C_NGT = 63, -//}; - -#define FPR_Type(Reg) (Reg) == R4300i_COP1_S ? "S" : (Reg) == R4300i_COP1_D ? "D" :\ - (Reg) == R4300i_COP1_W ? "W" : "L" - enum { OpCode_Size = 4}; enum PERM_LOOP { PermLoop_None, PermLoop_Jump, PermLoop_Delay }; class CRecompilerOps; @@ -185,11 +96,8 @@ public: bool m_FlagSet; //A Flag was set bool m_ExectionJumped; //Was the last next moved to a new location from a jump PERM_LOOP m_InPermLoop; //Jumped to same address with delay slot not effecting the operation - - //Flags used in LWL/SWL/etc .. instructions - static QWORD const LDL_MASK[8], LDR_MASK[8], SDL_MASK[8], SDR_MASK[8]; - static DWORD const LWL_MASK[4], LWR_MASK[4], SWL_MASK[4], SWR_MASK[4]; - static int const WL_SHIFT[4], WR_SHIFT[4], DL_SHIFT[8], DR_SHIFT[8]; }; #endif + +#endif \ No newline at end of file diff --git a/Source/Project64/N64 System/Mips/OpCode.h b/Source/Project64/N64 System/Mips/OpCode.h index 408344171..27975e0c6 100644 --- a/Source/Project64/N64 System/Mips/OpCode.h +++ b/Source/Project64/N64 System/Mips/OpCode.h @@ -1,50 +1,45 @@ -#ifndef __OPCODE__H__ -#define __OPCODE__H__ +#pragma once -typedef struct { - DWORD VirtualAddress; - - union { - unsigned long Hex; - unsigned char Ascii[4]; - - struct { - unsigned offset : 16; - unsigned rt : 5; - unsigned rs : 5; - unsigned op : 6; - }; - - struct { - unsigned immediate : 16; - unsigned : 5; - unsigned base : 5; - unsigned : 6; - }; - - struct { - unsigned target : 26; - unsigned : 6; - }; - - struct { - unsigned funct : 6; - unsigned sa : 5; - unsigned rd : 5; - unsigned : 5; - unsigned : 5; - unsigned : 6; - }; - - struct { - unsigned : 6; - unsigned fd : 5; - unsigned fs : 5; - unsigned ft : 5; - unsigned fmt : 5; - unsigned : 6; - }; +typedef union { + unsigned long Hex; + unsigned char Ascii[4]; + + struct { + unsigned offset : 16; + unsigned rt : 5; + unsigned rs : 5; + unsigned op : 6; }; + + struct { + unsigned immediate : 16; + unsigned : 5; + unsigned base : 5; + unsigned : 6; + }; + + struct { + unsigned target : 26; + unsigned : 6; + }; + + struct { + unsigned funct : 6; + unsigned sa : 5; + unsigned rd : 5; + unsigned : 5; + unsigned : 5; + unsigned : 6; + }; + + struct { + unsigned : 6; + unsigned fd : 5; + unsigned fs : 5; + unsigned ft : 5; + unsigned fmt : 5; + unsigned : 6; + }; } OPCODE; enum R4300iOpCodes @@ -134,5 +129,3 @@ enum R4300iCOP1FuntOpCodes R4300i_COP1_FUNCT_C_SEQ = 58,R4300i_COP1_FUNCT_C_NGL = 59,R4300i_COP1_FUNCT_C_LT = 60, R4300i_COP1_FUNCT_C_NGE = 61,R4300i_COP1_FUNCT_C_LE = 62,R4300i_COP1_FUNCT_C_NGT = 63, }; - -#endif diff --git a/Source/Project64/N64 System/Mips/TranslateVaddr.h b/Source/Project64/N64 System/Mips/TranslateVaddr.h new file mode 100644 index 000000000..5e3521f60 --- /dev/null +++ b/Source/Project64/N64 System/Mips/TranslateVaddr.h @@ -0,0 +1,6 @@ +class CTransVaddr +{ +public: + virtual bool TranslateVaddr ( DWORD VAddr, DWORD &PAddr) const = 0; + virtual bool ValidVaddr ( DWORD VAddr ) const = 0; +}; \ No newline at end of file diff --git a/Source/Project64/N64 System/N64 Class.cpp b/Source/Project64/N64 System/N64 Class.cpp index 50334a5ba..cbd3d4786 100644 --- a/Source/Project64/N64 System/N64 Class.cpp +++ b/Source/Project64/N64 System/N64 Class.cpp @@ -1787,7 +1787,10 @@ bool CN64System::WriteToProtectedMemory (DWORD Address, int length) WriteTraceF(TraceDebug,"WriteToProtectedMemory Addres: %X Len: %d",Address,length); if (m_Recomp) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix return m_Recomp->ClearRecompCode_Phys(Address,length,CRecompiler::Remove_ProtectedMem); +#endif } return false; } @@ -1802,7 +1805,10 @@ void CN64System::TLB_Unmaped ( DWORD VAddr, DWORD Len ) m_MMU_VM.TLB_Unmaped(VAddr,Len); if (m_Recomp && m_Recomp->bSMM_TLB()) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix m_Recomp->ClearRecompCode_Virt(VAddr,Len,CRecompiler::Remove_TLB); +#endif } } diff --git a/Source/Project64/N64 System/Recompiler/Code Block.cpp b/Source/Project64/N64 System/Recompiler/Code Block.cpp new file mode 100644 index 000000000..e69de29bb diff --git a/Source/Project64/N64 System/Recompiler/Code Block.h b/Source/Project64/N64 System/Recompiler/Code Block.h new file mode 100644 index 000000000..19cdc0aa1 --- /dev/null +++ b/Source/Project64/N64 System/Recompiler/Code Block.h @@ -0,0 +1,29 @@ +class CCodeBlock +{ +public: + CCodeBlock(DWORD VAddrEnter, BYTE * RecompPos); + + bool Compile ( void ); + + inline DWORD VAddrEnter ( void ) const { return m_VAddrEnter; } + inline DWORD VAddrFirst ( void ) const { return m_VAddrFirst; } + inline DWORD VAddrLast ( void ) const { return m_VAddrLast; } + inline BYTE * CompiledLocation ( void ) const { return m_CompiledLocation; } + inline int NoOfSections ( void ) const { return m_NoOfSections; } + inline const CCodeSection & EnterSection ( void ) const { return m_EnterSection; } + + inline void SetVAddrFirst ( DWORD VAddr ) { m_VAddrFirst = VAddr; } + inline void SetVAddrLast ( DWORD VAddr ) { m_VAddrLast = VAddr; } + + EXIT_LIST m_ExitInfo; + +private: + void AnalyseBlock ( void ); + + DWORD m_VAddrEnter; + DWORD m_VAddrFirst; // the address of the first opcode in the block + DWORD m_VAddrLast; // the address of the first opcode in the block + BYTE * m_CompiledLocation; // What address is this compiled at + int m_NoOfSections; // The number of sections this block uses + CCodeSection m_EnterSection; +}; diff --git a/Source/Project64/N64 System/Recompiler/Code Section.cpp b/Source/Project64/N64 System/Recompiler/Code Section.cpp new file mode 100644 index 000000000..76b9da8c6 --- /dev/null +++ b/Source/Project64/N64 System/Recompiler/Code Section.cpp @@ -0,0 +1,981 @@ +#include "stdafx.h" + +void InPermLoop ( void ); + +int DelaySlotEffectsCompare ( DWORD PC, DWORD Reg1, DWORD Reg2 ); + +int DelaySlotEffectsJump (DWORD JumpPC) { +OPCODE Command; + +if (!_MMU->LW_VAddr(JumpPC, Command.Hex)) { return TRUE; } + +switch (Command.op) { +case R4300i_SPECIAL: + switch (Command.funct) { + case R4300i_SPECIAL_JR: return DelaySlotEffectsCompare(JumpPC,Command.rs,0); + case R4300i_SPECIAL_JALR: return DelaySlotEffectsCompare(JumpPC,Command.rs,31); + } + break; +case R4300i_REGIMM: + switch (Command.rt) { + case R4300i_REGIMM_BLTZ: + case R4300i_REGIMM_BGEZ: + case R4300i_REGIMM_BLTZL: + case R4300i_REGIMM_BGEZL: + case R4300i_REGIMM_BLTZAL: + case R4300i_REGIMM_BGEZAL: + return DelaySlotEffectsCompare(JumpPC,Command.rs,0); + } + break; +case R4300i_JAL: +case R4300i_SPECIAL_JALR: return DelaySlotEffectsCompare(JumpPC,31,0); break; +case R4300i_J: return FALSE; +case R4300i_BEQ: +case R4300i_BNE: +case R4300i_BLEZ: +case R4300i_BGTZ: + return DelaySlotEffectsCompare(JumpPC,Command.rs,Command.rt); +case R4300i_CP1: + switch (Command.fmt) { + case R4300i_COP1_BC: + switch (Command.ft) { + case R4300i_COP1_BC_BCF: + case R4300i_COP1_BC_BCT: + case R4300i_COP1_BC_BCFL: + case R4300i_COP1_BC_BCTL: + { + int EffectDelaySlot; + OPCODE NewCommand; + + if (!_MMU->LW_VAddr(JumpPC + 4, NewCommand.Hex)) { return TRUE; } + + EffectDelaySlot = FALSE; + if (NewCommand.op == R4300i_CP1) { + if (NewCommand.fmt == R4300i_COP1_S && (NewCommand.funct & 0x30) == 0x30 ) { + EffectDelaySlot = TRUE; + } + if (NewCommand.fmt == R4300i_COP1_D && (NewCommand.funct & 0x30) == 0x30 ) { + EffectDelaySlot = TRUE; + } + } + return EffectDelaySlot; + } + break; + } + break; + } + break; +case R4300i_BEQL: +case R4300i_BNEL: +case R4300i_BLEZL: +case R4300i_BGTZL: + return DelaySlotEffectsCompare(JumpPC,Command.rs,Command.rt); +} +return TRUE; +} + +CCodeSection::CCodeSection( CCodeBlock * CodeBlock, DWORD EnterPC, DWORD ID) : +m_BlockInfo(CodeBlock), +m_EnterPC(EnterPC), +m_SectionID(ID), +m_ContinueSection(NULL), +m_JumpSection(NULL), +m_LinkAllowed(true), +m_CompiledLocation(NULL), +m_Test(0) +{ +/* +Test2 = 0; +InLoop = false; +DelaySlotSection = false; + +*/ +if (&CodeBlock->EnterSection() == this) +{ + m_LinkAllowed = false; + m_RegEnter.Initilize(); +} +} + +CCodeSection::~CCodeSection( void ) +{ +} + +void CCodeSection::CompileExit ( DWORD JumpPC, DWORD TargetPC, CRegInfo ExitRegSet, CExitInfo::EXIT_REASON reason, int CompileNow, void (*x86Jmp)(char * Label, DWORD Value)) +{ +if (!CompileNow) +{ + char String[100]; + sprintf(String,"Exit_%d",m_BlockInfo->m_ExitInfo.size()); + if (x86Jmp == NULL) + { + DisplayError("CompileExit error"); + ExitThread(0); + } + x86Jmp(String,0); + + CExitInfo ExitInfo; + ExitInfo.ID = m_BlockInfo->m_ExitInfo.size(); + ExitInfo.TargetPC = TargetPC; + ExitInfo.ExitRegSet = ExitRegSet; + ExitInfo.reason = reason; + ExitInfo.NextInstruction = m_NextInstruction; + ExitInfo.JumpLoc = m_RecompPos - 4; + m_BlockInfo->m_ExitInfo.push_back(ExitInfo); + return; +} + +//CPU_Message("CompileExit: %d",reason); +CCodeSection TempSection(m_BlockInfo,-1,0); +TempSection.m_RegWorkingSet = ExitRegSet; + +if (TargetPC != (DWORD)-1) +{ + MoveConstToVariable(TargetPC,&_Reg->m_PROGRAM_COUNTER,"PROGRAM_COUNTER"); + UpdateCounters(ExitRegSet,false,TargetPC <= JumpPC && reason == CExitInfo::Normal); +} else { + UpdateCounters(ExitRegSet,false,reason == CExitInfo::Normal); +} +TempSection.m_RegWorkingSet.WriteBackRegisters(); + +switch (reason) { +case CExitInfo::Normal: case CExitInfo::Normal_NoSysCheck: + TempSection.m_RegWorkingSet.SetBlockCycleCount(0); + if (TargetPC != (DWORD)-1) + { + if (TargetPC <= JumpPC && reason == CExitInfo::Normal) + { + CompileSystemCheck((DWORD)-1,TempSection.m_RegWorkingSet); + } + } else { + if (reason == CExitInfo::Normal) { CompileSystemCheck((DWORD)-1,TempSection.m_RegWorkingSet); } + } +_Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + if (m_SyncSystem) { Call_Direct(SyncToPC, "SyncToPC"); } +#endif +#ifdef LinkBlocks + if (bSMM_ValidFunc == false) + { + if (LookUpMode() == FuncFind_ChangeMemory) + { + BreakPoint(__FILE__,__LINE__); +// BYTE * Jump, * Jump2; +// if (TargetPC >= 0x80000000 && TargetPC < 0xC0000000) { +// DWORD pAddr = TargetPC & 0x1FFFFFFF; +// +// MoveVariableToX86reg((BYTE *)RDRAM + pAddr,"RDRAM + pAddr",x86_EAX); +// Jump2 = NULL; +// } else { +// MoveConstToX86reg((TargetPC >> 12),x86_ECX); +// MoveConstToX86reg(TargetPC,x86_EBX); +// MoveVariableDispToX86Reg(TLB_ReadMap,"TLB_ReadMap",x86_ECX,x86_ECX,4); +// TestX86RegToX86Reg(x86_ECX,x86_ECX); +// JeLabel8("NoTlbEntry",0); +// Jump2 = m_RecompPos - 1; +// MoveX86regPointerToX86reg(x86_ECX, x86_EBX,x86_EAX); +// } +// MoveX86RegToX86Reg(x86_EAX,x86_ECX); +// AndConstToX86Reg(x86_ECX,0xFFFF0000); +// CompConstToX86reg(x86_ECX,0x7C7C0000); +// JneLabel8("NoCode",0); +// Jump = m_RecompPos - 1; +// AndConstToX86Reg(x86_EAX,0xFFFF); +// ShiftLeftSignImmed(x86_EAX,4); +// AddConstToX86Reg(x86_EAX,0xC); +// MoveVariableDispToX86Reg(OrigMem,"OrigMem",x86_ECX,x86_EAX,1); +// JmpDirectReg(x86_ECX); +// CPU_Message(" NoCode:"); +// *((BYTE *)(Jump))=(BYTE)(m_RecompPos - Jump - 1); +// if (Jump2 != NULL) { +// CPU_Message(" NoTlbEntry:"); +// *((BYTE *)(Jump2))=(BYTE)(m_RecompPos - Jump2 - 1); +// } + } + else if (LookUpMode() == FuncFind_VirtualLookup) + { + MoveConstToX86reg(TargetPC,x86_EDX); + MoveConstToX86reg((DWORD)&m_Functions,x86_ECX); + Call_Direct(AddressOf(CFunctionMap::CompilerFindFunction), "CFunctionMap::CompilerFindFunction"); + MoveX86RegToX86Reg(x86_EAX,x86_ECX); + JecxzLabel8("NullPointer",0); + BYTE * Jump = m_RecompPos - 1; + MoveX86PointerToX86regDisp(x86_EBX,x86_ECX,0xC); + JmpDirectReg(x86_EBX); + CPU_Message(" NullPointer:"); + *((BYTE *)(Jump))=(BYTE)(m_RecompPos - Jump - 1); + } + else if (LookUpMode() == FuncFind_PhysicalLookup) + { + BYTE * Jump2 = NULL; + if (TargetPC >= 0x80000000 && TargetPC < 0x90000000) { + DWORD pAddr = TargetPC & 0x1FFFFFFF; + MoveVariableToX86reg((BYTE *)JumpTable + pAddr,"JumpTable + pAddr",x86_ECX); + } else if (TargetPC >= 0x90000000 && TargetPC < 0xC0000000) { + } else { + MoveConstToX86reg((TargetPC >> 12),x86_ECX); + MoveConstToX86reg(TargetPC,x86_EBX); + MoveVariableDispToX86Reg(TLB_ReadMap,"TLB_ReadMap",x86_ECX,x86_ECX,4); + TestX86RegToX86Reg(x86_ECX,x86_ECX); + JeLabel8("NoTlbEntry",0); + Jump2 = m_RecompPos - 1; + AddConstToX86Reg(x86_ECX,(DWORD)JumpTable - (DWORD)RDRAM); + MoveX86regPointerToX86reg(x86_ECX, x86_EBX,x86_ECX); + } + if (TargetPC < 0x90000000 || TargetPC >= 0xC0000000) + { + JecxzLabel8("NullPointer",0); + BYTE * Jump = m_RecompPos - 1; + MoveX86PointerToX86regDisp(x86_EAX,x86_ECX,0xC); + JmpDirectReg(x86_EAX); + CPU_Message(" NullPointer:"); + *((BYTE *)(Jump))=(BYTE)(m_RecompPos - Jump - 1); + if (Jump2 != NULL) { + CPU_Message(" NoTlbEntry:"); + *((BYTE *)(Jump2))=(BYTE)(m_RecompPos - Jump2 - 1); + } + } + } + } + Ret(); +#else + Ret(); +#endif + break; +case CExitInfo::DoCPU_Action: +_Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + Call_Direct(DoSomething,"DoSomething"); + if (m_SyncSystem) { Call_Direct(SyncToPC, "SyncToPC"); } +#endif + Ret(); + break; +case CExitInfo::DoSysCall: +_Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + MoveConstToX86reg(NextInstruction == JUMP || NextInstruction == DELAY_SLOT,x86_ECX); + Call_Direct(DoSysCallException,"DoSysCallException"); + if (m_SyncSystem) { Call_Direct(SyncToPC, "SyncToPC"); } + Ret(); +#endif + break; +case CExitInfo::COP1_Unuseable: +_Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + MoveConstToX86reg(NextInstruction == JUMP || NextInstruction == DELAY_SLOT,x86_ECX); + MoveConstToX86reg(1,x86_EDX); + Call_Direct(DoCopUnusableException,"DoCopUnusableException"); + if (m_SyncSystem) { Call_Direct(SyncToPC, "SyncToPC"); } + Ret(); +#endif + break; +case CExitInfo::ExitResetRecompCode: +_Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + if (NextInstruction == JUMP || NextInstruction == DELAY_SLOT) { + X86BreakPoint(__FILE__,__LINE__); + } + if (m_SyncSystem) { Call_Direct(SyncToPC, "SyncToPC"); } + X86BreakPoint(__FILE__,__LINE__); + MoveVariableToX86reg(this,"this",x86_ECX); + Call_Direct(AddressOf(ResetRecompCode), "ResetRecompCode"); +#endif + Ret(); + break; +case CExitInfo::TLBReadMiss: +_Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + MoveConstToX86reg(NextInstruction == JUMP || NextInstruction == DELAY_SLOT,x86_ECX); + MoveVariableToX86reg(&TLBLoadAddress,"TLBLoadAddress",x86_EDX); + Call_Direct(DoTLBMiss,"DoTLBMiss"); + if (m_SyncSystem) { Call_Direct(SyncToPC, "SyncToPC"); } + Ret(); +#endif + break; +default: + DisplayError("how did you want to exit on reason (%d) ???",reason); +} +} + +void CCodeSection::CompileSystemCheck (DWORD TargetPC, const CRegInfo & RegSet) +{ +CompConstToVariable(0,&g_CPU_Action->DoSomething,"g_CPU_Action.DoSomething"); +JeLabel32("Continue_From_Interrupt_Test",0); +DWORD * Jump = (DWORD *)(m_RecompPos - 4); +if (TargetPC != (DWORD)-1) +{ + MoveConstToVariable(TargetPC,&_Reg->m_PROGRAM_COUNTER,"PROGRAM_COUNTER"); +} + +CCodeSection Section(NULL,-1,0); +Section.m_RegWorkingSet = RegSet; +Section.m_RegWorkingSet.WriteBackRegisters(); +CompileExit(-1, -1,Section.m_RegWorkingSet,CExitInfo::DoCPU_Action,true,NULL); +CPU_Message(""); +CPU_Message(" $Continue_From_Interrupt_Test:"); +SetJump32(Jump,(DWORD *)m_RecompPos); +} + +void CCodeSection::GenerateSectionLinkage (void) +{ +CCodeSection * TargetSection[] = { m_ContinueSection, m_JumpSection }; +CJumpInfo * JumpInfo[] = { &m_Cont, &m_Jump }; +BYTE * Jump; +int count; + +for (count = 0; count < 2; count ++) +{ + if (JumpInfo[count]->LinkLocation == NULL && + JumpInfo[count]->FallThrough == false) + { + JumpInfo[count]->TargetPC = -1; + } +} + +if ((CRecompilerOps::CompilePC() & 0xFFC) == 0xFFC) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + //Handle Fall througth + Jump = NULL; + for (count = 0; count < 2; count ++) { + if (!JumpInfo[count]->FallThrough) { continue; } + JumpInfo[count]->FallThrough = false; + if (JumpInfo[count]->LinkLocation != NULL) { + SetJump32(JumpInfo[count]->LinkLocation,(DWORD *)m_RecompPos); + JumpInfo[count]->LinkLocation = NULL; + if (JumpInfo[count]->LinkLocation2 != NULL) { + SetJump32(JumpInfo[count]->LinkLocation2,(DWORD *)m_RecompPos); + JumpInfo[count]->LinkLocation2 = NULL; + } + } + MoveConstToVariable(JumpInfo[count]->TargetPC,&JumpToLocation,"JumpToLocation"); + if (JumpInfo[(count + 1) & 1]->LinkLocation == NULL) { break; } + JmpLabel8("FinishBlock",0); + Jump = m_RecompPos - 1; + } + for (count = 0; count < 2; count ++) { + if (JumpInfo[count]->LinkLocation == NULL) { continue; } + JumpInfo[count]->FallThrough = false; + if (JumpInfo[count]->LinkLocation != NULL) { + SetJump32(JumpInfo[count]->LinkLocation,(DWORD *)m_RecompPos); + JumpInfo[count]->LinkLocation = NULL; + if (JumpInfo[count]->LinkLocation2 != NULL) { + SetJump32(JumpInfo[count]->LinkLocation2,(DWORD *)m_RecompPos); + JumpInfo[count]->LinkLocation2 = NULL; + } + } + MoveConstToVariable(JumpInfo[count]->TargetPC,&JumpToLocation,"JumpToLocation"); + if (JumpInfo[(count + 1) & 1]->LinkLocation == NULL) { break; } + JmpLabel8("FinishBlock",0); + Jump = m_RecompPos - 1; + } + if (Jump != NULL) { + CPU_Message(" $FinishBlock:"); + SetJump8(Jump,m_RecompPos); + } + MoveConstToVariable(CRecompilerOps::CompilePC() + 4,_PROGRAM_COUNTER,"PROGRAM_COUNTER"); + m_RegWorkingSet.WriteBackRegisters(); + m_RegWorkingSet.UpdateCounters(&BlockCycleCount(),&BlockRandomModifier(),false); +// WriteBackRegisters(Section); +// if (m_SyncSystem) { Call_Direct(SyncToPC, "SyncToPC"); } + MoveConstToVariable(DELAY_SLOT,&NextInstruction,"NextInstruction"); + Ret(); +#endif + return; +} +if (!g_UseLinking) { + if (CRecompilerOps::m_CompilePC == m_Jump.TargetPC && (m_Cont.FallThrough == false)) { + if (!DelaySlotEffectsJump(CRecompilerOps::CompilePC())) { +CPU_Message("PermLoop *** a"); +_Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + MoveConstToVariable(CRecompilerOps::CompilePC(),_PROGRAM_COUNTER,"PROGRAM_COUNTER"); + m_RegWorkingSet.WriteBackRegisters(); + m_RegWorkingSet.BlockCycleCount() -= g_CountPerOp; + UpdateCounters(&m_RegWorkingSet.BlockCycleCount(),&m_RegWorkingSet.BlockRandomModifier(), false); + Call_Direct(InPermLoop,"InPermLoop"); + m_RegWorkingSet.BlockCycleCount() += g_CountPerOp; + UpdateCounters(&m_RegWorkingSet.BlockCycleCount(),&m_RegWorkingSet.BlockRandomModifier(), true); + CompileSystemCheck(-1,m_RegWorkingSet); +#endif + } + } +} +if (TargetSection[0] != TargetSection[1] || TargetSection[0] == NULL) { + for (count = 0; count < 2; count ++) { + if (JumpInfo[count]->LinkLocation == NULL && JumpInfo[count]->FallThrough == false) { + if (TargetSection[count]) + { +_Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + TargetSection[count]->UnlinkParent(Section,true, count == 0); +#endif + } + } else if (TargetSection[count] == NULL && JumpInfo[count]->FallThrough) { + if (JumpInfo[count]->LinkLocation != NULL) { + SetJump32(JumpInfo[count]->LinkLocation,(DWORD *)m_RecompPos); + JumpInfo[count]->LinkLocation = NULL; + if (JumpInfo[count]->LinkLocation2 != NULL) { + SetJump32(JumpInfo[count]->LinkLocation2,(DWORD *)m_RecompPos); + JumpInfo[count]->LinkLocation2 = NULL; + } + } + CompileExit (CRecompilerOps::CompilePC(), JumpInfo[count]->TargetPC,JumpInfo[count]->RegSet,CExitInfo::Normal,true,NULL); + JumpInfo[count]->FallThrough = false; + } else if (TargetSection[count] != NULL && JumpInfo[count] != NULL) { + if (!JumpInfo[count]->FallThrough) { continue; } + if (JumpInfo[count]->TargetPC == TargetSection[count]->m_EnterPC) { continue; } + if (JumpInfo[count]->LinkLocation != NULL) { + SetJump32(JumpInfo[count]->LinkLocation,(DWORD *)m_RecompPos); + JumpInfo[count]->LinkLocation = NULL; + if (JumpInfo[count]->LinkLocation2 != NULL) { + SetJump32(JumpInfo[count]->LinkLocation2,(DWORD *)m_RecompPos); + JumpInfo[count]->LinkLocation2 = NULL; + } + } + CompileExit (CRecompilerOps::CompilePC(), JumpInfo[count]->TargetPC,JumpInfo[count]->RegSet,CExitInfo::Normal,true,NULL); + //FreeSection(TargetSection[count],Section); + } + } +} else { + if (m_Cont.LinkLocation == NULL && m_Cont.FallThrough == false) { m_ContinueSection = NULL; } + if (m_Jump.LinkLocation == NULL && m_Jump.FallThrough == false) { m_JumpSection = NULL; } + if (m_JumpSection == NULL && m_ContinueSection == NULL) { + //FreeSection(TargetSection[0],Section); + } +} + +TargetSection[0] = m_ContinueSection; +TargetSection[1] = m_JumpSection; + +for (count = 0; count < 2; count ++) { + if (TargetSection[count] == NULL) { continue; } + if (!JumpInfo[count]->FallThrough) { continue; } + + if (TargetSection[count]->m_CompiledLocation != NULL) { + char Label[100]; + sprintf(Label,"Section_%d",TargetSection[count]->m_SectionID); + JumpInfo[count]->FallThrough = false; + if (JumpInfo[count]->LinkLocation != NULL) { + SetJump32(JumpInfo[count]->LinkLocation,(DWORD *)m_RecompPos); + JumpInfo[count]->LinkLocation = NULL; + if (JumpInfo[count]->LinkLocation2 != NULL) { + SetJump32(JumpInfo[count]->LinkLocation2,(DWORD *)m_RecompPos); + JumpInfo[count]->LinkLocation2 = NULL; + } + } + if (JumpInfo[count]->TargetPC <= CRecompilerOps::CompilePC()) { + if (JumpInfo[count]->PermLoop) { +CPU_Message("PermLoop *** 1"); + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + MoveConstToVariable(JumpInfo[count]->TargetPC,_PROGRAM_COUNTER,"PROGRAM_COUNTER"); + JumpInfo[count]->RegSet.BlockCycleCount() -= g_CountPerOp; + UpdateCounters(&JumpInfo[count]->RegSet.BlockCycleCount(),&JumpInfo[count]->RegSet.BlockRandomModifier(), false); + Call_Direct(InPermLoop,"InPermLoop"); + JumpInfo[count]->RegSet.BlockCycleCount() += g_CountPerOp; + UpdateCounters(&JumpInfo[count]->RegSet.BlockCycleCount(),&JumpInfo[count]->RegSet.BlockRandomModifier(), true); + CompileSystemCheck(-1,JumpInfo[count]->RegSet); +#endif + } else { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + UpdateCounters(&JumpInfo[count]->RegSet.BlockCycleCount(), &JumpInfo[count]->RegSet.BlockRandomModifier(), true); + CompileSystemCheck(JumpInfo[count]->TargetPC,JumpInfo[count]->RegSet); +#endif + } + } else { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + UpdateCounters(&JumpInfo[count]->RegSet.BlockCycleCount(), &JumpInfo[count]->RegSet.BlockRandomModifier(), false); +#endif + } + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + JumpInfo[count]->RegSet.BlockCycleCount() = 0; + m_RegWorkingSet = JumpInfo[count]->RegSet; + SyncRegState(Section,&TargetSection[count]->RegStart); +#endif + JmpLabel32(Label,0); + SetJump32((DWORD *)m_RecompPos - 1,(DWORD *)(TargetSection[count]->m_CompiledLocation)); + } +} +//BlockCycleCount() = 0; +//BlockRandomModifier() = 0; + +for (count = 0; count < 2; count ++) { + if (TargetSection[count] == NULL) { continue; } +_Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + if (TargetSection[count]->ParentSection.empty()) { continue; } + for (SECTION_LIST::iterator iter = TargetSection[count]->ParentSection.begin(); iter != TargetSection[count]->ParentSection.end(); iter++) + { + CCodeSection * Parent = *iter; + + if (Parent->CompiledLocation != NULL) { continue; } + if (JumpInfo[count]->PermLoop) { + CPU_Message("PermLoop *** 2"); + MoveConstToVariable(JumpInfo[count]->TargetPC,_PROGRAM_COUNTER,"PROGRAM_COUNTER"); + JumpInfo[count]->RegSet.BlockCycleCount() -= g_CountPerOp; + UpdateCounters(&JumpInfo[count]->RegSet.BlockCycleCount(),&JumpInfo[count]->RegSet.BlockRandomModifier(), false); + Call_Direct(InPermLoop,"InPermLoop"); + JumpInfo[count]->RegSet.BlockCycleCount() += g_CountPerOp; + UpdateCounters(&JumpInfo[count]->RegSet.BlockCycleCount(),&JumpInfo[count]->RegSet.BlockRandomModifier(), true); + CompileSystemCheck(-1,JumpInfo[count]->RegSet); + } + if (JumpInfo[count]->FallThrough) { + JumpInfo[count]->FallThrough = false; + JmpLabel32(JumpInfo[count]->BranchLabel,0); + JumpInfo[count]->LinkLocation = m_RecompPos - 4; + } + } +#endif +} + +for (count = 0; count < 2; count ++) { + if (JumpInfo[count]->FallThrough) { + if (JumpInfo[count]->TargetPC < CRecompilerOps::CompilePC()) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + UpdateCounters(&JumpInfo[count]->RegSet.BlockCycleCount(),&JumpInfo[count]->RegSet.BlockRandomModifier(),true); +#endif + CompileSystemCheck(JumpInfo[count]->TargetPC,JumpInfo[count]->RegSet); + } + } +} + +CPU_Message("====== End of Section %d ======",m_SectionID); + +_Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix +for (count = 0; count < 2; count ++) { + if (JumpInfo[count]->FallThrough) { + GenerateX86Code(*(m_BlockInfo),TargetSection[count],m_BlockInfo->m_Test + 1); + } +} +#endif + +//CPU_Message("Section %d",m_SectionID); +for (count = 0; count < 2; count ++) { + if (JumpInfo[count]->LinkLocation == NULL) { continue; } + if (TargetSection[count] == NULL) { + CPU_Message("ExitBlock (from %d):",m_SectionID); + SetJump32(JumpInfo[count]->LinkLocation,(DWORD *)m_RecompPos); + JumpInfo[count]->LinkLocation = NULL; + if (JumpInfo[count]->LinkLocation2 != NULL) { + SetJump32(JumpInfo[count]->LinkLocation2,(DWORD *)m_RecompPos); + JumpInfo[count]->LinkLocation2 = NULL; + } + CompileExit (CRecompilerOps::CompilePC(),JumpInfo[count]->TargetPC,JumpInfo[count]->RegSet,CExitInfo::Normal,true,NULL); + continue; + } + if (JumpInfo[count]->TargetPC != TargetSection[count]->m_EnterPC) { + DisplayError("I need to add more code in GenerateSectionLinkage cause this is going to cause an exception"); + BreakPoint(__FILE__,__LINE__); + } + if (TargetSection[count]->m_CompiledLocation == NULL) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + GenerateX86Code(*TargetSection[count]->m_BlockInfo,TargetSection[count],m_BlockInfo->m_Test + 1); +#endif + } else { + char Label[100]; + + CPU_Message("Section_%d (from %d):",TargetSection[count]->m_SectionID,m_SectionID); + SetJump32(JumpInfo[count]->LinkLocation,(DWORD *)m_RecompPos); + JumpInfo[count]->LinkLocation = NULL; + if (JumpInfo[count]->LinkLocation2 != NULL) { + SetJump32(JumpInfo[count]->LinkLocation2,(DWORD *)m_RecompPos); + JumpInfo[count]->LinkLocation2 = NULL; + } + m_RegWorkingSet = JumpInfo[count]->RegSet; + if (JumpInfo[count]->TargetPC <= CRecompilerOps::CompilePC()) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + UpdateCounters(&JumpInfo[count]->RegSet.BlockCycleCount(),&JumpInfo[count]->RegSet.BlockRandomModifier(), true); +#endif + + if (JumpInfo[count]->PermLoop) { +CPU_Message("PermLoop *** 3"); + MoveConstToVariable(JumpInfo[count]->TargetPC,_PROGRAM_COUNTER,"PROGRAM_COUNTER"); + Call_Direct(InPermLoop,"InPermLoop"); + CompileSystemCheck(-1,JumpInfo[count]->RegSet); + } else { + CompileSystemCheck(JumpInfo[count]->TargetPC,JumpInfo[count]->RegSet); + } + } else{ + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + UpdateCounters(&JumpInfo[count]->RegSet.BlockCycleCount(),&JumpInfo[count]->RegSet.BlockRandomModifier(), false); +#endif + } + m_RegWorkingSet = JumpInfo[count]->RegSet; + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + SyncRegState(Section,&TargetSection[count]->RegStart); +#endif + JmpLabel32(Label,0); + SetJump32((DWORD *)m_RecompPos - 1,(DWORD *)(TargetSection[count]->m_CompiledLocation)); + } +} +} + +bool CCodeSection::GenerateX86Code ( DWORD Test ) +{ +if (this == NULL) { return false; } + +if (m_CompiledLocation != NULL) { + if (m_Test == Test) + { + return false; + } + m_Test = Test; + if (m_ContinueSection->GenerateX86Code(Test)) { return true; } + if (m_JumpSection->GenerateX86Code(Test)) { return true; } + return false; +} +#ifdef tofix +if (ParentSection.size() > 0) +{ + for (SECTION_LIST::iterator iter = ParentSection.begin(); iter != ParentSection.end(); iter++) + { + CBlockSection * Parent = *iter; + if (Parent->CompiledLocation != NULL) { continue; } + if (IsAllParentLoops(Parent,true,CBlockSection::GetNewTestValue())) { continue; } + return false; + } +} +if (!InheritParentInfo(Section)) { return false; } +#endif +m_RegWorkingSet = m_RegEnter; +m_CompiledLocation = m_RecompPos; +m_CompilePC = m_EnterPC; +m_NextInstruction = NORMAL; +m_RegWorkingSet = m_RegEnter; +m_Section = this; + +if (m_CompilePC < m_BlockInfo->VAddrFirst()) +{ + m_BlockInfo->SetVAddrFirst(m_CompilePC); +} + +do { + __try { + if (!_MMU->LW_VAddr(m_CompilePC,m_Opcode.Hex)) + { + DisplayError(GS(MSG_FAIL_LOAD_WORD)); + ExitThread(0); + } + } __except( _MMU->MemoryFilter( GetExceptionCode(), GetExceptionInformation()) ) { + DisplayError(GS(MSG_UNKNOWN_MEM_ACTION)); + ExitThread(0); + } + + if (m_CompilePC > m_BlockInfo->VAddrLast()) + { + m_BlockInfo->SetVAddrLast(m_CompilePC); + } + + m_RegWorkingSet.SetBlockCycleCount(m_RegWorkingSet.GetBlockCycleCount() + g_CountPerOp); + m_RegWorkingSet.ResetX86Protection(); + + switch (m_Opcode.op) { + case R4300i_SPECIAL: + switch (m_Opcode.funct) { + case R4300i_SPECIAL_SLL: SPECIAL_SLL(); break; + case R4300i_SPECIAL_SRL: SPECIAL_SRL(); break; + case R4300i_SPECIAL_SRA: SPECIAL_SRA(); break; + case R4300i_SPECIAL_SLLV: SPECIAL_SLLV(); break; + case R4300i_SPECIAL_SRLV: SPECIAL_SRLV(); break; + case R4300i_SPECIAL_SRAV: SPECIAL_SRAV(); break; + case R4300i_SPECIAL_JR: SPECIAL_JR(); break; + case R4300i_SPECIAL_JALR: SPECIAL_JALR(); break; + case R4300i_SPECIAL_MFLO: SPECIAL_MFLO(); break; + case R4300i_SPECIAL_SYSCALL: SPECIAL_SYSCALL(); break; + case R4300i_SPECIAL_MTLO: SPECIAL_MTLO(); break; + case R4300i_SPECIAL_MFHI: SPECIAL_MFHI(); break; + case R4300i_SPECIAL_MTHI: SPECIAL_MTHI(); break; + case R4300i_SPECIAL_DSLLV: SPECIAL_DSLLV(); break; + case R4300i_SPECIAL_DSRLV: SPECIAL_DSRLV(); break; + case R4300i_SPECIAL_DSRAV: SPECIAL_DSRAV(); break; + case R4300i_SPECIAL_MULT: SPECIAL_MULT(); break; + case R4300i_SPECIAL_DIV: SPECIAL_DIV(); break; + case R4300i_SPECIAL_DIVU: SPECIAL_DIVU(); break; + case R4300i_SPECIAL_MULTU: SPECIAL_MULTU(); break; + case R4300i_SPECIAL_DMULT: SPECIAL_DMULT(); break; + case R4300i_SPECIAL_DMULTU: SPECIAL_DMULTU(); break; + case R4300i_SPECIAL_DDIV: SPECIAL_DDIV(); break; + case R4300i_SPECIAL_DDIVU: SPECIAL_DDIVU(); break; + case R4300i_SPECIAL_ADD: SPECIAL_ADD(); break; + case R4300i_SPECIAL_ADDU: SPECIAL_ADDU(); break; + case R4300i_SPECIAL_SUB: SPECIAL_SUB(); break; + case R4300i_SPECIAL_SUBU: SPECIAL_SUBU(); break; + case R4300i_SPECIAL_AND: SPECIAL_AND(); break; + case R4300i_SPECIAL_OR: SPECIAL_OR(); break; + case R4300i_SPECIAL_XOR: SPECIAL_XOR(); break; + case R4300i_SPECIAL_NOR: SPECIAL_NOR(); break; + case R4300i_SPECIAL_SLT: SPECIAL_SLT(); break; + case R4300i_SPECIAL_SLTU: SPECIAL_SLTU(); break; + case R4300i_SPECIAL_DADD: SPECIAL_DADD(); break; + case R4300i_SPECIAL_DADDU: SPECIAL_DADDU(); break; + case R4300i_SPECIAL_DSUB: SPECIAL_DSUB(); break; + case R4300i_SPECIAL_DSUBU: SPECIAL_DSUBU(); break; + case R4300i_SPECIAL_DSLL: SPECIAL_DSLL(); break; + case R4300i_SPECIAL_DSRL: SPECIAL_DSRL(); break; + case R4300i_SPECIAL_DSRA: SPECIAL_DSRA(); break; + case R4300i_SPECIAL_DSLL32: SPECIAL_DSLL32(); break; + case R4300i_SPECIAL_DSRL32: SPECIAL_DSRL32(); break; + case R4300i_SPECIAL_DSRA32: SPECIAL_DSRA32(); break; + default: + UnknownOpcode(); break; + } + break; + case R4300i_REGIMM: + switch (m_Opcode.rt) { + case R4300i_REGIMM_BLTZ:Compile_Branch(BLTZ_Compare,BranchTypeRs, false); break; + case R4300i_REGIMM_BGEZ:Compile_Branch(BGEZ_Compare,BranchTypeRs, false); break; + case R4300i_REGIMM_BLTZL:Compile_BranchLikely(BLTZ_Compare, false); break; + case R4300i_REGIMM_BGEZL:Compile_BranchLikely(BGEZ_Compare, false); break; + case R4300i_REGIMM_BLTZAL:Compile_Branch(BLTZ_Compare,BranchTypeRs, true); break; + case R4300i_REGIMM_BGEZAL:Compile_Branch(BGEZ_Compare,BranchTypeRs, true); break; + default: + UnknownOpcode(); break; + } + break; + case R4300i_BEQ: Compile_Branch(BEQ_Compare,BranchTypeRsRt,false); break; + case R4300i_BNE: Compile_Branch(BNE_Compare,BranchTypeRsRt,false); break; + case R4300i_BGTZ:Compile_Branch(BGTZ_Compare,BranchTypeRs,false); break; + case R4300i_BLEZ:Compile_Branch(BLEZ_Compare,BranchTypeRs,false); break; + case R4300i_J: J(); break; + case R4300i_JAL: JAL(); break; + case R4300i_ADDI: ADDI(); break; + case R4300i_ADDIU: ADDIU(); break; + case R4300i_SLTI: SLTI(); break; + case R4300i_SLTIU: SLTIU(); break; + case R4300i_ANDI: ANDI(); break; + case R4300i_ORI: ORI(); break; + case R4300i_XORI: XORI(); break; + case R4300i_LUI: LUI(); break; + case R4300i_CP0: + switch (m_Opcode.rs) { + case R4300i_COP0_MF: COP0_MF(); break; + case R4300i_COP0_MT: COP0_MT(); break; + default: + if ( (m_Opcode.rs & 0x10 ) != 0 ) { + switch( m_Opcode.funct ) { + case R4300i_COP0_CO_TLBR: COP0_CO_TLBR(); break; + case R4300i_COP0_CO_TLBWI: COP0_CO_TLBWI(); break; + case R4300i_COP0_CO_TLBWR: COP0_CO_TLBWR(); break; + case R4300i_COP0_CO_TLBP: COP0_CO_TLBP(); break; + case R4300i_COP0_CO_ERET: COP0_CO_ERET(); break; + default: UnknownOpcode(); break; + } + } else { + UnknownOpcode(); + } + } + break; + case R4300i_CP1: + switch (m_Opcode.rs) { + case R4300i_COP1_MF: COP1_MF(); break; + case R4300i_COP1_DMF: COP1_DMF(); break; + case R4300i_COP1_CF: COP1_CF(); break; + case R4300i_COP1_MT: COP1_MT(); break; + case R4300i_COP1_DMT: COP1_DMT(); break; + case R4300i_COP1_CT: COP1_CT(); break; + case R4300i_COP1_BC: + switch (m_Opcode.ft) { + case R4300i_COP1_BC_BCF: Compile_Branch(COP1_BCF_Compare,BranchTypeCop1,false); break; + case R4300i_COP1_BC_BCT: Compile_Branch(COP1_BCT_Compare,BranchTypeCop1,false); break; + case R4300i_COP1_BC_BCFL: Compile_BranchLikely(COP1_BCF_Compare,false); break; + case R4300i_COP1_BC_BCTL: Compile_BranchLikely(COP1_BCT_Compare,false); break; + default: + UnknownOpcode(); break; + } + break; + case R4300i_COP1_S: + switch (m_Opcode.funct) { + case R4300i_COP1_FUNCT_ADD: COP1_S_ADD(); break; + case R4300i_COP1_FUNCT_SUB: COP1_S_SUB(); break; + case R4300i_COP1_FUNCT_MUL: COP1_S_MUL(); break; + case R4300i_COP1_FUNCT_DIV: COP1_S_DIV(); break; + case R4300i_COP1_FUNCT_ABS: COP1_S_ABS(); break; + case R4300i_COP1_FUNCT_NEG: COP1_S_NEG(); break; + case R4300i_COP1_FUNCT_SQRT: COP1_S_SQRT(); break; + case R4300i_COP1_FUNCT_MOV: COP1_S_MOV(); break; + case R4300i_COP1_FUNCT_TRUNC_L: COP1_S_TRUNC_L(); break; + case R4300i_COP1_FUNCT_CEIL_L: COP1_S_CEIL_L(); break; //added by Witten + case R4300i_COP1_FUNCT_FLOOR_L: COP1_S_FLOOR_L(); break; //added by Witten + case R4300i_COP1_FUNCT_ROUND_W: COP1_S_ROUND_W(); break; + case R4300i_COP1_FUNCT_TRUNC_W: COP1_S_TRUNC_W(); break; + case R4300i_COP1_FUNCT_CEIL_W: COP1_S_CEIL_W(); break; //added by Witten + case R4300i_COP1_FUNCT_FLOOR_W: COP1_S_FLOOR_W(); break; + case R4300i_COP1_FUNCT_CVT_D: COP1_S_CVT_D(); break; + case R4300i_COP1_FUNCT_CVT_W: COP1_S_CVT_W(); break; + case R4300i_COP1_FUNCT_CVT_L: COP1_S_CVT_L(); break; + case R4300i_COP1_FUNCT_C_F: case R4300i_COP1_FUNCT_C_UN: + case R4300i_COP1_FUNCT_C_EQ: case R4300i_COP1_FUNCT_C_UEQ: + case R4300i_COP1_FUNCT_C_OLT: case R4300i_COP1_FUNCT_C_ULT: + case R4300i_COP1_FUNCT_C_OLE: case R4300i_COP1_FUNCT_C_ULE: + case R4300i_COP1_FUNCT_C_SF: case R4300i_COP1_FUNCT_C_NGLE: + case R4300i_COP1_FUNCT_C_SEQ: case R4300i_COP1_FUNCT_C_NGL: + case R4300i_COP1_FUNCT_C_LT: case R4300i_COP1_FUNCT_C_NGE: + case R4300i_COP1_FUNCT_C_LE: case R4300i_COP1_FUNCT_C_NGT: + COP1_S_CMP(); break; + default: + UnknownOpcode(); break; + } + break; + case R4300i_COP1_D: + switch (m_Opcode.funct) { + case R4300i_COP1_FUNCT_ADD: COP1_D_ADD(); break; + case R4300i_COP1_FUNCT_SUB: COP1_D_SUB(); break; + case R4300i_COP1_FUNCT_MUL: COP1_D_MUL(); break; + case R4300i_COP1_FUNCT_DIV: COP1_D_DIV(); break; + case R4300i_COP1_FUNCT_ABS: COP1_D_ABS(); break; + case R4300i_COP1_FUNCT_NEG: COP1_D_NEG(); break; + case R4300i_COP1_FUNCT_SQRT: COP1_D_SQRT(); break; + case R4300i_COP1_FUNCT_MOV: COP1_D_MOV(); break; + case R4300i_COP1_FUNCT_TRUNC_L: COP1_D_TRUNC_L(); break; //added by Witten + case R4300i_COP1_FUNCT_CEIL_L: COP1_D_CEIL_L(); break; //added by Witten + case R4300i_COP1_FUNCT_FLOOR_L: COP1_D_FLOOR_L(); break; //added by Witten + case R4300i_COP1_FUNCT_ROUND_W: COP1_D_ROUND_W(); break; + case R4300i_COP1_FUNCT_TRUNC_W: COP1_D_TRUNC_W(); break; + case R4300i_COP1_FUNCT_CEIL_W: COP1_D_CEIL_W(); break; //added by Witten + case R4300i_COP1_FUNCT_FLOOR_W: COP1_D_FLOOR_W(); break; //added by Witten + case R4300i_COP1_FUNCT_CVT_S: COP1_D_CVT_S(); break; + case R4300i_COP1_FUNCT_CVT_W: COP1_D_CVT_W(); break; + case R4300i_COP1_FUNCT_CVT_L: COP1_D_CVT_L(); break; + case R4300i_COP1_FUNCT_C_F: case R4300i_COP1_FUNCT_C_UN: + case R4300i_COP1_FUNCT_C_EQ: case R4300i_COP1_FUNCT_C_UEQ: + case R4300i_COP1_FUNCT_C_OLT: case R4300i_COP1_FUNCT_C_ULT: + case R4300i_COP1_FUNCT_C_OLE: case R4300i_COP1_FUNCT_C_ULE: + case R4300i_COP1_FUNCT_C_SF: case R4300i_COP1_FUNCT_C_NGLE: + case R4300i_COP1_FUNCT_C_SEQ: case R4300i_COP1_FUNCT_C_NGL: + case R4300i_COP1_FUNCT_C_LT: case R4300i_COP1_FUNCT_C_NGE: + case R4300i_COP1_FUNCT_C_LE: case R4300i_COP1_FUNCT_C_NGT: + COP1_D_CMP(); break; + default: + UnknownOpcode(); break; + } + break; + case R4300i_COP1_W: + switch (m_Opcode.funct) { + case R4300i_COP1_FUNCT_CVT_S: COP1_W_CVT_S(); break; + case R4300i_COP1_FUNCT_CVT_D: COP1_W_CVT_D(); break; + default: + UnknownOpcode(); break; + } + break; + case R4300i_COP1_L: + switch (m_Opcode.funct) { + case R4300i_COP1_FUNCT_CVT_S: COP1_L_CVT_S(); break; + case R4300i_COP1_FUNCT_CVT_D: COP1_L_CVT_D(); break; + default: + UnknownOpcode(); break; + } + break; + default: + UnknownOpcode(); break; + } + break; + case R4300i_BEQL: Compile_BranchLikely(BEQ_Compare,false); break; + case R4300i_BNEL: Compile_BranchLikely(BNE_Compare,false); break; + case R4300i_BGTZL:Compile_BranchLikely(BGTZ_Compare,false); break; + case R4300i_BLEZL:Compile_BranchLikely(BLEZ_Compare,false); break; + case R4300i_DADDIU: DADDIU(); break; + case R4300i_LDL: LDL(); break; + case R4300i_LDR: LDR(); break; + case R4300i_LB: LB(); break; + case R4300i_LH: LH(); break; + case R4300i_LWL: LWL(); break; + case R4300i_LW: LW(); break; + case R4300i_LBU: LBU(); break; + case R4300i_LHU: LHU(); break; + case R4300i_LWR: LWR(); break; + case R4300i_LWU: LWU(); break; //added by Witten + case R4300i_SB: SB(); break; + case R4300i_SH: SH(); break; + case R4300i_SWL: SWL(); break; + case R4300i_SW: SW(); break; + case R4300i_SWR: SWR(); break; + case R4300i_SDL: SDL(); break; + case R4300i_SDR: SDR(); break; + case R4300i_CACHE: CACHE(); break; + case R4300i_LL: LL(); break; + case R4300i_LWC1: LWC1(); break; + case R4300i_LDC1: LDC1(); break; + case R4300i_SC: SC(); break; + case R4300i_LD: LD(); break; + case R4300i_SWC1: SWC1(); break; + case R4300i_SDC1: SDC1(); break; + case R4300i_SD: SD(); break; + default: + UnknownOpcode(); break; + } +#ifdef tofix + if (!bRegCaching()) { WriteBackRegisters(); } + + /*if ((DWORD)RecompPos > 0x60B452E6) { + if (m_CompilePC == 0x8002D9B8 && m_CompilePC < 0x8002DA20) { + CurrentRoundingModel = RoundUnknown; + } + }*/ + UnMap_AllFPRs(); + + /*if ((DWORD)RecompPos > 0x60AD0BD3) { + if (m_CompilePC >= 0x8008B804 && m_CompilePC < 0x800496D8) { + CPU_Message("Blah *"); + WriteBackRegisters(); + } + /*if (m_CompilePC >= 0x80000180 && m_CompilePC < 0x80000190) { + CPU_Message("Blah *"); + //WriteBackRegisters(); + }*/ + //} + + /*for (count = 1; count < 10; count ++) { + if (x86Mapped(count) == CRegInfo::Stack_Mapped) { + UnMap_X86reg (Section, count); + } + }*/ + //CPU_Message("MemoryStack = %s",Map_MemoryStack(Section, false) > 0?x86_Name(Map_MemoryStack(Section, false)):"Not Mapped"); + + if ((m_CompilePC &0xFFC) == 0xFFC) { + if (NextInstruction == DO_DELAY_SLOT) { +#ifndef EXTERNAL_RELEASE + DisplayError("Wanting to do delay slot over end of block"); +#endif + } + if (NextInstruction == NORMAL) { + CompileExit (Section,m_CompilePC, m_CompilePC + 4,m_RegWorkingSet,CExitInfo::Normal,true,NULL); + NextInstruction = END_BLOCK; + } + } + + if (DelaySlotSection) + { + Cont.RegSet = m_RegWorkingSet; + GenerateSectionLinkage(); + NextInstruction = END_BLOCK; + } +#endif + + switch (m_NextInstruction) { + case NORMAL: + m_CompilePC += 4; + break; + case DO_DELAY_SLOT: + m_NextInstruction = DELAY_SLOT; + m_CompilePC += 4; + break; + case DELAY_SLOT: + m_NextInstruction = DELAY_SLOT_DONE; + m_RegWorkingSet.SetBlockCycleCount(m_RegWorkingSet.GetBlockCycleCount() - g_CountPerOp); + m_CompilePC -= 4; + break; + } +} while (m_NextInstruction != END_BLOCK); + +return true; +} diff --git a/Source/Project64/N64 System/Recompiler/Code Section.h b/Source/Project64/N64 System/Recompiler/Code Section.h new file mode 100644 index 000000000..43bb86198 --- /dev/null +++ b/Source/Project64/N64 System/Recompiler/Code Section.h @@ -0,0 +1,94 @@ +#pragma once + +class CCodeBlock; + +class CCodeSection : + private CRecompilerOps +{ +public: + CCodeSection( CCodeBlock * CodeBlock, DWORD EnterPC, DWORD ID); + ~CCodeSection( void ); + + bool GenerateX86Code ( DWORD Test ); + void GenerateSectionLinkage ( void ); + void CompileSystemCheck ( DWORD TargetPC, const CRegInfo &RegSet ); + void CompileExit ( DWORD JumpPC, DWORD TargetPC, CRegInfo ExitRegSet, CExitInfo::EXIT_REASON reason, int CompileNow, void (*x86Jmp)(char * Label, DWORD Value)); + + + /* Block Connection info */ + CCodeBlock * const m_BlockInfo; + const DWORD m_EnterPC; + const DWORD m_SectionID; + CCodeSection * m_ContinueSection; + CCodeSection * m_JumpSection; + bool m_LinkAllowed; // are other sections allowed to find block to link to it + DWORD m_Test; + BYTE * m_CompiledLocation; + + /* SECTION_LIST ParentSection; + + DWORD Test2; + bool InLoop; + bool DelaySlotSection; + + + /* Register Info */ + CRegInfo m_RegEnter; + + /* Jump Info */ + CJumpInfo m_Jump; + CJumpInfo m_Cont; + + //Information about the opcode current being compiled +/* DWORD m_CompilePC; + OPCODE m_CompileOpcode; + + void AddParent ( CCodeSection * Parent ); + void UnlinkParent ( CCodeSection * Parent, bool AllowDelete, bool ContinueLink ); + bool IsAllParentLoops ( CCodeSection * Parent, bool IgnoreIfCompiled, DWORD Test ); + void ResetX86Protection ( void ); + static DWORD GetNewTestValue ( void ); + + static void TestRegConstantStates ( CRegInfo & Base, CRegInfo & Reg ); + + //Handy Functions + inline CRegInfo::REG_STATE & MipsRegState ( int Reg ) { return RegWorking.MipsRegState(Reg); } + inline unsigned _int64 & MipsReg ( int Reg ) { return RegWorking.MipsReg(Reg); } + inline _int64 & MipsReg_S ( int Reg ) { return RegWorking.MipsReg_S(Reg); } + inline DWORD & MipsRegLo ( int Reg ) { return RegWorking.MipsRegLo(Reg); } + inline long & MipsRegLo_S ( int Reg ) { return RegWorking.MipsRegLo_S(Reg); } + inline DWORD & MipsRegHi ( int Reg ) { return RegWorking.MipsRegHi(Reg); } + inline long & MipsRegHi_S ( int Reg ) { return RegWorking.MipsRegHi_S(Reg); } + inline DWORD & BlockCycleCount(void) { return RegWorking.BlockCycleCount(); } + inline DWORD & BlockRandomModifier(void) { return RegWorking.BlockRandomModifier(); } + + inline DWORD & x86MapOrder( int Reg ) { return RegWorking.x86MapOrder(Reg); } + inline bool & x86Protected( int Reg ) { return RegWorking.x86Protected(Reg); } + inline CRegInfo::REG_MAPPED & x86Mapped(int Reg) { return RegWorking.x86Mapped(Reg); } + + inline bool IsKnown(int Reg) { return RegWorking.IsKnown(Reg); } + inline bool IsUnknown(int Reg) { return RegWorking.IsUnknown(Reg); } + + inline bool IsMapped(int Reg) { return RegWorking.IsMapped(Reg); } + inline bool IsConst(int Reg) { return RegWorking.IsConst(Reg); } + + inline bool IsSigned(int Reg) { return RegWorking.IsSigned(Reg); } + inline bool IsUnsigned(int Reg) { return RegWorking.IsUnsigned(Reg); } + + inline bool Is32Bit(int Reg) { return RegWorking.Is32Bit(Reg); } + inline bool Is64Bit(int Reg) { return RegWorking.Is64Bit(Reg); } + + inline bool Is32BitMapped(int Reg) { return RegWorking.Is32BitMapped(Reg); } + inline bool Is64BitMapped(int Reg) { return RegWorking.Is64BitMapped(Reg); } + + inline int & StackTopPos ( void ) { return RegWorking.StackTopPos(); } + inline DWORD & FpuMappedTo( int Reg) { return RegWorking.FpuMappedTo(Reg); } + inline CRegInfo::FPU_STATE & FpuState(int Reg) { return RegWorking.FpuState(Reg); } + inline CRegInfo::FPU_ROUND & FpuRoundingModel(int Reg) { return RegWorking.FpuRoundingModel(Reg); } + inline bool & FpuBeenUsed (void ) { return RegWorking.FpuBeenUsed(); } + inline CRegInfo::FPU_ROUND & CurrentRoundingModel ( void ) { return RegWorking.CurrentRoundingModel(); }*/ + +private: + +}; + diff --git a/Source/Project64/N64 System/Recompiler/Delay Slot Map Class.cpp b/Source/Project64/N64 System/Recompiler/Delay Slot Map Class.cpp index 17d533207..8cbeda892 100644 --- a/Source/Project64/N64 System/Recompiler/Delay Slot Map Class.cpp +++ b/Source/Project64/N64 System/Recompiler/Delay Slot Map Class.cpp @@ -12,6 +12,8 @@ CDelaySlotFunctionMap::~CDelaySlotFunctionMap() CCompiledFunc * CDelaySlotFunctionMap::AddFunctionInfo ( DWORD vAddr, DWORD pAddr ) { + Notify().BreakPoint(__FILE__,__LINE__); +#ifdef tofix if (FunctionMap.find(vAddr) != FunctionMap.end()) { Notify().BreakPoint(__FILE__,__LINE__); @@ -22,6 +24,7 @@ CCompiledFunc * CDelaySlotFunctionMap::AddFunctionInfo ( DWORD vAddr, DWORD pAdd return info; Notify().BreakPoint(__FILE__,__LINE__); +#endif return NULL; } @@ -53,13 +56,16 @@ CCompiledFunc * CDelaySlotFunctionMap::FindFunction ( DWORD vAddr ) const void CDelaySlotFunctionMap::Remove ( CCompiledFunc * info ) { - FUNCTION_MAP::iterator iter = FunctionMap.find(info->VStartPC()); + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + FUNCTION_MAP::iterator iter = FunctionMap.find(info->VAddrEnter()); if (iter != FunctionMap.end()) { delete iter->second; FunctionMap.erase(iter); } +#endif } void CDelaySlotFunctionMap::Reset ( void ) diff --git a/Source/Project64/N64 System/Recompiler/Exit Info.cpp b/Source/Project64/N64 System/Recompiler/Exit Info.cpp new file mode 100644 index 000000000..e69de29bb diff --git a/Source/Project64/N64 System/Recompiler/Exit Info.h b/Source/Project64/N64 System/Recompiler/Exit Info.h new file mode 100644 index 000000000..062904c3e --- /dev/null +++ b/Source/Project64/N64 System/Recompiler/Exit Info.h @@ -0,0 +1,24 @@ +class CExitInfo +{ +public: + enum EXIT_REASON + { + Normal = 0, + Normal_NoSysCheck = 1, + DoCPU_Action = 2, + COP1_Unuseable = 3, + DoSysCall = 4, + TLBReadMiss = 5, + TLBWriteMiss = 6, + ExitResetRecompCode = 7, + }; + + DWORD ID; + DWORD TargetPC; + CRegInfo ExitRegSet; + EXIT_REASON reason; + STEP_TYPE NextInstruction; + BYTE * JumpLoc; //32bit jump +}; + +typedef std::list EXIT_LIST; diff --git a/Source/Project64/N64 System/Recompiler/Function Info.cpp b/Source/Project64/N64 System/Recompiler/Function Info.cpp index b6f835d4b..3772c7bc5 100644 --- a/Source/Project64/N64 System/Recompiler/Function Info.cpp +++ b/Source/Project64/N64 System/Recompiler/Function Info.cpp @@ -1,9 +1,20 @@ #include "..\..\N64 System.h" +CCompiledFunc::CCompiledFunc( const CCodeBlock & CodeBlock ) : + m_EnterPC(CodeBlock.VAddrEnter()), + m_MinPC(CodeBlock.VAddrFirst()), + m_MaxPC(CodeBlock.VAddrLast()), + m_Function((Func)CodeBlock.CompiledLocation()) +{ +} + +#ifdef tofix + CCompiledFunc::CCompiledFunc(DWORD StartAddress, DWORD PhysicalStartAddress) : - m_VStartPC(StartAddress), - m_PStartPC(PhysicalStartAddress), - m_VEndPC(0), + m_VEnterPC(StartAddress), + m_PEnterPC(PhysicalStartAddress), + m_VMinPC(StartAddress), + m_VMaxPC(StartAddress), m_Function(NULL), Next(NULL) { @@ -17,7 +28,7 @@ CCompiledFunc::CCompiledFunc(DWORD StartAddress, DWORD PhysicalStartAddress) : bool CCompiledFunc::CompilerCodeBlock(void) { DWORD StartTime = timeGetTime(); - WriteTraceF(TraceRecompiler,"Compile Block-Start: VAddr: %X PAddr",m_VStartPC,m_PStartPC); + WriteTraceF(TraceRecompiler,"Compile Block-Start: VEnterPC: %X PEnterPC",m_VEnterPC,m_PEnterPC); //if (bProfiling()) { m_Profile.StartTimer(Timer_GetBlockInfo); } @@ -48,7 +59,7 @@ bool CCompiledFunc::CompilerCodeBlock(void) #endif ExitThread(0); #endif - }*/ + } #endif CPU_Message("====== Code block ======"); CPU_Message("VAddress: %X",BlockInfo.StartVAddr ); @@ -110,3 +121,5 @@ bool CCompiledFunc::CompilerCodeBlock(void) WriteTraceF(TraceRecompiler,"Compile Block-Done: %X-%X - Taken: %d",info->VStartPC(),info->VEndPC(),TimeTaken);*/ return true; } + +#endif \ No newline at end of file diff --git a/Source/Project64/N64 System/Recompiler/Function Info.h b/Source/Project64/N64 System/Recompiler/Function Info.h index 49da53545..1d3d93169 100644 --- a/Source/Project64/N64 System/Recompiler/Function Info.h +++ b/Source/Project64/N64 System/Recompiler/Function Info.h @@ -1,35 +1,28 @@ -typedef void (* RECOMP_FUNC)(void); - class CCompiledFunc { - //Information - DWORD m_VStartPC; //The Virtual Address that the jump is going to - DWORD m_PStartPC; //The Physical Address that the jump is going to - DWORD m_VEndPC; - - //From querying the recompiler get information about the function - RECOMP_FUNC m_Function; - -public: //constructor - CCompiledFunc (DWORD VirtualStartAddress, DWORD PhysicalStartAddress ); + CCompiledFunc ( void ); // not implemented + +public: + CCompiledFunc ( const CCodeBlock & CodeBlock ); + + typedef void (* Func)(void); //Get Private Information - inline const DWORD VStartPC ( void ) const { return m_VStartPC; } - inline const DWORD PStartPC ( void ) const { return m_PStartPC; } - inline const DWORD VEndPC ( void ) const { return m_VEndPC; } - inline const RECOMP_FUNC Function ( void ) const { return m_Function; } + inline const DWORD EnterPC ( void ) const { return m_EnterPC; } + inline const DWORD MinPC ( void ) const { return m_MinPC; } + inline const DWORD MaxPC ( void ) const { return m_MaxPC; } + inline const Func Function ( void ) const { return m_Function; } + +private: + //Information + DWORD m_EnterPC; // The Entry PC + DWORD m_MinPC; // The Lowest PC in the function + DWORD m_MaxPC; // The Highest PC in the function + + //From querying the recompiler get information about the function + Func m_Function; - //Set Private Information - inline void SetVEndPC ( DWORD VEndPC ) { m_VEndPC = VEndPC; } - inline void SetFunctionAddr ( RECOMP_FUNC FunctionAddr ) { m_Function = FunctionAddr; } - - - //Functions - bool CompilerCodeBlock ( void ); - //Validation - QWORD MemContents[2], * MemLocation[2]; - - CCompiledFunc * Next; + //QWORD MemContents[2], * MemLocation[2]; }; diff --git a/Source/Project64/N64 System/Recompiler/Jump Info.cpp b/Source/Project64/N64 System/Recompiler/Jump Info.cpp new file mode 100644 index 000000000..e69de29bb diff --git a/Source/Project64/N64 System/Recompiler/Jump Info.h b/Source/Project64/N64 System/Recompiler/Jump Info.h new file mode 100644 index 000000000..146360ede --- /dev/null +++ b/Source/Project64/N64 System/Recompiler/Jump Info.h @@ -0,0 +1,14 @@ +class CJumpInfo +{ +public: + CJumpInfo(); + + DWORD TargetPC; + char * BranchLabel; + DWORD * LinkLocation; + DWORD * LinkLocation2; + BOOL FallThrough; + BOOL PermLoop; + BOOL DoneDelaySlot; + CRegInfo RegSet; +}; diff --git a/Source/Project64/N64 System/Recompiler/Recompiler Class.cpp b/Source/Project64/N64 System/Recompiler/Recompiler Class.cpp index a2060fbf7..7f20f65b8 100644 --- a/Source/Project64/N64 System/Recompiler/Recompiler Class.cpp +++ b/Source/Project64/N64 System/Recompiler/Recompiler Class.cpp @@ -101,13 +101,16 @@ void CRecompiler::RecompilerMain_VirtualTable ( void ) } if (!_TransVaddr->ValidVaddr(PROGRAM_COUNTER)) { - DoTLBMiss(NextInstruction == DELAY_SLOT,PROGRAM_COUNTER); + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + DoTLBMiss(m_NextInstruction == DELAY_SLOT,PROGRAM_COUNTER); NextInstruction = NORMAL; if (!_TransVaddr->ValidVaddr(PROGRAM_COUNTER)) { DisplayError("Failed to tranlate PC to a PAddr: %X\n\nEmulation stopped",PROGRAM_COUNTER); return; } +#endif continue; } @@ -453,7 +456,7 @@ void CRecompiler::RecompilerMain_Lookup( void ) void CRecompiler::ResetRecompCode() { /* - RecompPos = RecompCode; + RecompPos() = RecompCode; m_Functions.Reset(); m_FunctionsDelaySlot.Reset(); @@ -537,10 +540,10 @@ CCompiledFunc * CRecompiler::CompileDelaySlot(DWORD PC) CCompiledFunc * info = m_FunctionsDelaySlot.AddFunctionInfo(PC, _TLB->TranslateVaddr(PC)); - CBlockInfo BlockInfo(PROGRAM_COUNTER, RecompPos); + CCodeBlock BlockInfo(PROGRAM_COUNTER, RecompPos()); CCodeSection * Section = &BlockInfo.ParentSection; - BYTE * Block = RecompPos; + BYTE * Block = RecompPos(); DWORD StartAddress; if (!TranslateVaddr(PC, &StartAddress)) { @@ -725,20 +728,25 @@ CCompiledFunc * CRecompiler::CompileDelaySlot(DWORD PC) return NULL; } -bool CRecompiler::AnalyseBlock ( CBlockInfo & BlockInfo) +bool CRecompiler::AnalyseBlock ( CCodeBlock & BlockInfo) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix if (bLinkBlocks()) { CCodeSection * Section = &BlockInfo.ParentSection; if (!CreateSectionLinkage (Section)) { return false; } - DetermineLoop(Section,CCodeSection::GetNewTestValue(),CCodeSection::GetNewTestValue(), Section->SectionID); + DetermineLoop(Section,CCodeSection::GetNewTestValue(),CCodeSection::GetNewTestValue(), Section->m_SectionID); while (FixConstants(Section,CCodeSection::GetNewTestValue())) {} } +#endif return true; } bool CRecompiler::FixConstants (CCodeSection * Section, DWORD Test) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix if (Section == NULL) { return false; } if (Section->Test == Test) { return false; } Section->Test = Test; @@ -750,24 +758,24 @@ bool CRecompiler::FixConstants (CCodeSection * Section, DWORD Test) int count, NoOfParents; REG_INFO Original[2]; */ - CRegInfo Original[2] = { Section->Cont.RegSet, Section->Jump.RegSet }; + CRegInfo Original[2] = { Section->m_Cont.RegSet, Section->m_Jump.RegSet }; if (!Section->ParentSection.empty()) { for (SECTION_LIST::iterator iter = Section->ParentSection.begin(); iter != Section->ParentSection.end(); iter++) { CCodeSection * Parent = *iter; - if (Parent->ContinueSection == Section) { + if (Parent->m_ContinueSection == Section) { for (int count = 0; count < 32; count++) { - if (Section->RegStart.MipsRegState(count) != Parent->Cont.RegSet.MipsRegState(count)) { + if (Section->RegStart.MipsRegState(count) != Parent->m_Cont.RegSet.MipsRegState(count)) { Section->RegStart.MipsRegState(count) = CRegInfo::STATE_UNKNOWN; //*Changed = true; } Section->RegStart.MipsRegState(count) = CRegInfo::STATE_UNKNOWN; } } - if (Parent->JumpSection == Section) { + if (Parent->m_JumpSection == Section) { for (int count = 0; count < 32; count++) { - if (Section->RegStart.MipsRegState(count) != Parent->Jump.RegSet.MipsRegState(count)) { + if (Section->RegStart.MipsRegState(count) != Parent->m_Jump.RegSet.MipsRegState(count)) { Section->RegStart.MipsRegState(count) = CRegInfo::STATE_UNKNOWN; //*Changed = true; } @@ -778,23 +786,27 @@ bool CRecompiler::FixConstants (CCodeSection * Section, DWORD Test) } FillSectionInfo(Section, NORMAL); - if (Original[0] != Section->Cont.RegSet) + if (Original[0] != Section->m_Cont.RegSet) { Changed = true; } - if (Original[1] != Section->Jump.RegSet) + if (Original[1] != Section->m_Jump.RegSet) { Changed = true; } - if (Section->JumpSection && FixConstants(Section->JumpSection,Test)) { Changed = true; } - if (Section->ContinueSection && FixConstants(Section->ContinueSection,Test)) { Changed = true; } + if (Section->m_JumpSection && FixConstants(Section->m_JumpSection,Test)) { Changed = true; } + if (Section->m_ContinueSection && FixConstants(Section->m_ContinueSection,Test)) { Changed = true; } return Changed; +#endif + return false; } void CRecompiler::InheritConstants(CCodeSection * Section) { +_Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix if (Section->ParentSection.empty()) { Section->RegStart.Initilize(); @@ -803,7 +815,7 @@ void CRecompiler::InheritConstants(CCodeSection * Section) } CCodeSection * Parent = *(Section->ParentSection.begin()); - CRegInfo * RegSet = (Section == Parent->ContinueSection?&Parent->Cont.RegSet:&Parent->Jump.RegSet); + CRegInfo * RegSet = (Section == Parent->m_ContinueSection?&Parent->m_Cont.RegSet:&Parent->m_Jump.RegSet); Section->RegStart = *RegSet; Section->RegWorking = *RegSet; @@ -811,7 +823,7 @@ void CRecompiler::InheritConstants(CCodeSection * Section) { if (iter == Section->ParentSection.begin()) { continue; } Parent = *iter; - RegSet = Section == Parent->ContinueSection?&Parent->Cont.RegSet:&Parent->Jump.RegSet; + RegSet = Section == Parent->m_ContinueSection?&Parent->m_Cont.RegSet:&Parent->m_Jump.RegSet; for (int count = 0; count < 32; count++) { if (Section->IsConst(count)) { @@ -826,10 +838,13 @@ void CRecompiler::InheritConstants(CCodeSection * Section) } } Section->RegStart = Section->RegWorking; +#endif } CCodeSection * CRecompiler::ExistingSection(CCodeSection * StartSection, DWORD Addr, DWORD Test) { +_Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix if (StartSection == NULL) { return NULL; } if (StartSection->StartPC == Addr && StartSection->LinkAllowed) { @@ -838,14 +853,17 @@ CCodeSection * CRecompiler::ExistingSection(CCodeSection * StartSection, DWORD A if (StartSection->Test == Test) { return NULL; } StartSection->Test = Test; - CCodeSection * Section = ExistingSection(StartSection->JumpSection,Addr,Test); + CCodeSection * Section = ExistingSection(StartSection->m_JumpSection,Addr,Test); if (Section != NULL) { return Section; } - Section = ExistingSection(StartSection->ContinueSection,Addr,Test); + Section = ExistingSection(StartSection->m_ContinueSection,Addr,Test); if (Section != NULL) { return Section; } +#endif return NULL; } bool CRecompiler::CreateSectionLinkage (CCodeSection * Section) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix InheritConstants(Section); if (!FillSectionInfo(Section,NORMAL)) @@ -855,19 +873,19 @@ bool CRecompiler::CreateSectionLinkage (CCodeSection * Section) { CCodeSection ** TargetSection[2]; CJumpInfo * JumpInfo[2]; - if (Section->Jump.TargetPC < Section->Cont.TargetPC) { - TargetSection[0] = (CCodeSection **)&Section->JumpSection; - TargetSection[1] = (CCodeSection **)&Section->ContinueSection; - JumpInfo[0] = &Section->Jump; - JumpInfo[1] = &Section->Cont; + if (Section->m_Jump.TargetPC < Section->m_Cont.TargetPC) { + TargetSection[0] = (CCodeSection **)&Section->m_JumpSection; + TargetSection[1] = (CCodeSection **)&Section->m_ContinueSection; + JumpInfo[0] = &Section->m_Jump; + JumpInfo[1] = &Section->m_Cont; } else { - TargetSection[0] = (CCodeSection **)&Section->ContinueSection; - TargetSection[1] = (CCodeSection **)&Section->JumpSection; - JumpInfo[0] = &Section->Cont; - JumpInfo[1] = &Section->Jump; + TargetSection[0] = (CCodeSection **)&Section->m_ContinueSection; + TargetSection[1] = (CCodeSection **)&Section->m_JumpSection; + JumpInfo[0] = &Section->m_Cont; + JumpInfo[1] = &Section->m_Jump; } - CBlockInfo * BlockInfo = Section->BlockInfo; + CCodeBlock * BlockInfo = Section->BlockInfo; for (int count = 0; count < 2; count ++) { @@ -877,11 +895,11 @@ bool CRecompiler::CreateSectionLinkage (CCodeSection * Section) { } if (!JumpInfo[count]->DoneDelaySlot) { - Section->Jump.RegSet = Section->RegWorking; + Section->m_Jump.RegSet = Section->RegWorking; //this is a special delay slot section BlockInfo->NoOfSections += 1; - *TargetSection[count] = new CCodeSection(BlockInfo,Section->m_CompilePC + 4,BlockInfo->NoOfSections); + *TargetSection[count] = new CCodeSection(BlockInfo,CRecompilerOps::CompilePC() + 4,BlockInfo->NoOfSections); (*TargetSection[count])->AddParent(Section); (*TargetSection[count])->LinkAllowed = false; InheritConstants((*TargetSection[count])); @@ -890,21 +908,21 @@ bool CRecompiler::CreateSectionLinkage (CCodeSection * Section) { { return false; } - (*TargetSection[count])->Jump.TargetPC = -1; - (*TargetSection[count])->Cont.TargetPC = JumpInfo[count]->TargetPC; - (*TargetSection[count])->Cont.FallThrough = true; - (*TargetSection[count])->Cont.RegSet = (*TargetSection[count])->RegWorking; - JumpInfo[count]->TargetPC = Section->m_CompilePC + 4; + (*TargetSection[count])->m_Jump.TargetPC = -1; + (*TargetSection[count])->m_Cont.TargetPC = JumpInfo[count]->TargetPC; + (*TargetSection[count])->m_Cont.FallThrough = true; + (*TargetSection[count])->m_Cont.RegSet = (*TargetSection[count])->RegWorking; + JumpInfo[count]->TargetPC = CRecompilerOps::CompilePC() + 4; //Create the section that joins with that block - (*TargetSection[count])->ContinueSection = ExistingSection(&BlockInfo->ParentSection,(*TargetSection[count])->Cont.TargetPC,CCodeSection::GetNewTestValue()); - if ((*TargetSection[count])->ContinueSection == NULL) { + (*TargetSection[count])->m_ContinueSection = ExistingSection(&BlockInfo->ParentSection,(*TargetSection[count])->m_Cont.TargetPC,CCodeSection::GetNewTestValue()); + if ((*TargetSection[count])->m_ContinueSection == NULL) { BlockInfo->NoOfSections += 1; - (*TargetSection[count])->ContinueSection = new CCodeSection(BlockInfo,(*TargetSection[count])->Cont.TargetPC,BlockInfo->NoOfSections); - (*TargetSection[count])->ContinueSection->AddParent((*TargetSection[count])); - CreateSectionLinkage((*TargetSection[count])->ContinueSection); + (*TargetSection[count])->m_ContinueSection = new CCodeSection(BlockInfo,(*TargetSection[count])->m_Cont.TargetPC,BlockInfo->NoOfSections); + (*TargetSection[count])->m_ContinueSection->AddParent((*TargetSection[count])); + CreateSectionLinkage((*TargetSection[count])->m_ContinueSection); } else { - (*TargetSection[count])->ContinueSection->AddParent((*TargetSection[count])); + (*TargetSection[count])->m_ContinueSection->AddParent((*TargetSection[count])); } } else { *TargetSection[count] = ExistingSection(&BlockInfo->ParentSection,JumpInfo[count]->TargetPC,CCodeSection::GetNewTestValue()); @@ -918,6 +936,7 @@ bool CRecompiler::CreateSectionLinkage (CCodeSection * Section) { } } } +#endif return true; } @@ -928,11 +947,11 @@ bool CRecompiler::FillSectionInfo(CCodeSection * Section, STEP_TYPE StartStepTyp OPCODE Command; if (Section->CompiledLocation != NULL) { return true; } - Section->m_CompilePC = Section->StartPC; + CRecompilerOps::CompilePC() = Section->StartPC; Section->RegWorking = Section->RegStart; NextInstruction = StartStepType; do { - if (!_MMU->LW_VAddr(Section->m_CompilePC, Command.Hex)) { + if (!_MMU->LW_VAddr(CRecompilerOps::CompilePC(), Command.Hex)) { DisplayError(GS(MSG_FAIL_LOAD_WORD)); return false; } @@ -1013,26 +1032,26 @@ bool CRecompiler::FillSectionInfo(CCodeSection * Section, STEP_TYPE StartStepTyp break; case R4300i_SPECIAL_JR: if (Section->IsConst(Command.rs)) { - Section->Jump.TargetPC = Section->MipsRegLo(Command.rs); + Section->m_Jump.TargetPC = Section->MipsRegLo(Command.rs); } else { - Section->Jump.TargetPC = (DWORD)-1; + Section->m_Jump.TargetPC = (DWORD)-1; } NextInstruction = DELAY_SLOT; break; case R4300i_SPECIAL_JALR: - Section->MipsRegLo(Opcode.rd) = Section->m_CompilePC + 8; + Section->MipsRegLo(Opcode.rd) = CRecompilerOps::CompilePC() + 8; Section->MipsRegState(Opcode.rd) = CRegInfo::STATE_CONST_32; if (Section->IsConst(Command.rs)) { - Section->Jump.TargetPC = Section->MipsRegLo(Command.rs); + Section->m_Jump.TargetPC = Section->MipsRegLo(Command.rs); } else { - Section->Jump.TargetPC = (DWORD)-1; + Section->m_Jump.TargetPC = (DWORD)-1; } NextInstruction = DELAY_SLOT; break; case R4300i_SPECIAL_SYSCALL: case R4300i_SPECIAL_BREAK: NextInstruction = END_BLOCK; - Section->m_CompilePC -= 4; + CRecompilerOps::CompilePC() -= 4; break; case R4300i_SPECIAL_MFHI: Section->MipsRegState(Command.rd) = CRegInfo::STATE_UNKNOWN; break; case R4300i_SPECIAL_MTHI: break; @@ -1344,10 +1363,10 @@ bool CRecompiler::FillSectionInfo(CCodeSection * Section, STEP_TYPE StartStepTyp #ifndef EXTERNAL_RELEASE if (Command.Hex == 0x00000001) { break; } DisplayError("Unhandled R4300i OpCode in FillSectionInfo 5\n%s", - R4300iOpcodeName(Command.Hex,Section->m_CompilePC)); + R4300iOpcodeName(Command.Hex,CRecompilerOps::CompilePC())); #endif NextInstruction = END_BLOCK; - Section->m_CompilePC -= 4; + CRecompilerOps::CompilePC() -= 4; } break; case R4300i_REGIMM: @@ -1355,33 +1374,33 @@ bool CRecompiler::FillSectionInfo(CCodeSection * Section, STEP_TYPE StartStepTyp case R4300i_REGIMM_BLTZ: case R4300i_REGIMM_BGEZ: NextInstruction = DELAY_SLOT; - Section->Cont.TargetPC = Section->m_CompilePC + 8; - Section->Jump.TargetPC = Section->m_CompilePC + ((short)Command.offset << 2) + 4; - if (Section->m_CompilePC == Section->Jump.TargetPC) { - if (!DelaySlotEffectsCompare(Section->m_CompilePC,Command.rs,0)) { - Section->Jump.PermLoop = true; + Section->m_Cont.TargetPC = CRecompilerOps::CompilePC() + 8; + Section->m_Jump.TargetPC = CRecompilerOps::CompilePC() + ((short)Command.offset << 2) + 4; + if (CRecompilerOps::CompilePC() == Section->m_Jump.TargetPC) { + if (!DelaySlotEffectsCompare(CRecompilerOps::CompilePC(),Command.rs,0)) { + Section->m_Jump.PermLoop = true; } } break; case R4300i_REGIMM_BLTZL: case R4300i_REGIMM_BGEZL: NextInstruction = LIKELY_DELAY_SLOT; - Section->Cont.TargetPC = Section->m_CompilePC + 8; - Section->Jump.TargetPC = Section->m_CompilePC + ((short)Command.offset << 2) + 4; - if (Section->m_CompilePC == Section->Jump.TargetPC) { - if (!DelaySlotEffectsCompare(Section->m_CompilePC,Command.rs,0)) { - Section->Jump.PermLoop = true; + Section->m_Cont.TargetPC = CRecompilerOps::CompilePC() + 8; + Section->m_Jump.TargetPC = CRecompilerOps::CompilePC() + ((short)Command.offset << 2) + 4; + if (CRecompilerOps::CompilePC() == Section->m_Jump.TargetPC) { + if (!DelaySlotEffectsCompare(CRecompilerOps::CompilePC(),Command.rs,0)) { + Section->m_Jump.PermLoop = true; } } break; case R4300i_REGIMM_BLTZAL: - Section->MipsRegLo(31) = Section->m_CompilePC + 8; + Section->MipsRegLo(31) = CRecompilerOps::CompilePC() + 8; Section->MipsRegState(31) = CRegInfo::STATE_CONST_32; - Section->Cont.TargetPC = Section->m_CompilePC + 8; - Section->Jump.TargetPC = Section->m_CompilePC + ((short)Command.offset << 2) + 4; - if (Section->m_CompilePC == Section->Jump.TargetPC) { - if (!DelaySlotEffectsCompare(Section->m_CompilePC,Command.rs,0)) { - Section->Jump.PermLoop = true; + Section->m_Cont.TargetPC = CRecompilerOps::CompilePC() + 8; + Section->m_Jump.TargetPC = CRecompilerOps::CompilePC() + ((short)Command.offset << 2) + 4; + if (CRecompilerOps::CompilePC() == Section->m_Jump.TargetPC) { + if (!DelaySlotEffectsCompare(CRecompilerOps::CompilePC(),Command.rs,0)) { + Section->m_Jump.PermLoop = true; } } break; @@ -1397,12 +1416,12 @@ bool CRecompiler::FillSectionInfo(CCodeSection * Section, STEP_TYPE StartStepTyp Value = Section->MipsReg_S(Command.rs); } if (Value >= 0) { - Section->MipsRegLo(31) = Section->m_CompilePC + 8; + Section->MipsRegLo(31) = CRecompilerOps::CompilePC() + 8; Section->MipsRegState(31) = CRegInfo::STATE_CONST_32; - Section->Jump.TargetPC = Section->m_CompilePC + ((short)Command.offset << 2) + 4; - if (Section->m_CompilePC == Section->Jump.TargetPC) { - if (!DelaySlotEffectsCompare(Section->m_CompilePC,31,0)) { - Section->Jump.PermLoop = true; + Section->m_Jump.TargetPC = CRecompilerOps::CompilePC() + ((short)Command.offset << 2) + 4; + if (CRecompilerOps::CompilePC() == Section->m_Jump.TargetPC) { + if (!DelaySlotEffectsCompare(CRecompilerOps::CompilePC(),31,0)) { + Section->m_Jump.PermLoop = true; } } break; @@ -1410,13 +1429,13 @@ bool CRecompiler::FillSectionInfo(CCodeSection * Section, STEP_TYPE StartStepTyp } - Section->MipsRegLo(31) = Section->m_CompilePC + 8; + Section->MipsRegLo(31) = CRecompilerOps::CompilePC() + 8; Section->MipsRegState(31) = CRegInfo::STATE_CONST_32; - Section->Cont.TargetPC = Section->m_CompilePC + 8; - Section->Jump.TargetPC = Section->m_CompilePC + ((short)Command.offset << 2) + 4; - if (Section->m_CompilePC == Section->Jump.TargetPC) { - if (!DelaySlotEffectsCompare(Section->m_CompilePC,Command.rs,0)) { - Section->Jump.PermLoop = true; + Section->m_Cont.TargetPC = CRecompilerOps::CompilePC() + 8; + Section->m_Jump.TargetPC = CRecompilerOps::CompilePC() + ((short)Command.offset << 2) + 4; + if (CRecompilerOps::CompilePC() == Section->m_Jump.TargetPC) { + if (!DelaySlotEffectsCompare(CRecompilerOps::CompilePC(),Command.rs,0)) { + Section->m_Jump.PermLoop = true; } } break; @@ -1424,35 +1443,35 @@ bool CRecompiler::FillSectionInfo(CCodeSection * Section, STEP_TYPE StartStepTyp #ifndef EXTERNAL_RELEASE if (Command.Hex == 0x0407000D) { break; } DisplayError("Unhandled R4300i OpCode in FillSectionInfo 4\n%s", - R4300iOpcodeName(Command.Hex,Section->m_CompilePC)); + R4300iOpcodeName(Command.Hex,CRecompilerOps::CompilePC())); #endif NextInstruction = END_BLOCK; - Section->m_CompilePC -= 4; + CRecompilerOps::CompilePC() -= 4; } break; case R4300i_JAL: NextInstruction = DELAY_SLOT; - Section->MipsRegLo(31) = Section->m_CompilePC + 8; + Section->MipsRegLo(31) = CRecompilerOps::CompilePC() + 8; Section->MipsRegState(31) = CRegInfo::STATE_CONST_32; - Section->Jump.TargetPC = (Section->m_CompilePC & 0xF0000000) + (Command.target << 2); - if (Section->m_CompilePC == Section->Jump.TargetPC) { - if (!DelaySlotEffectsCompare(Section->m_CompilePC,31,0)) { - Section->Jump.PermLoop = true; + Section->m_Jump.TargetPC = (CRecompilerOps::CompilePC() & 0xF0000000) + (Command.target << 2); + if (CRecompilerOps::CompilePC() == Section->m_Jump.TargetPC) { + if (!DelaySlotEffectsCompare(CRecompilerOps::CompilePC(),31,0)) { + Section->m_Jump.PermLoop = true; } } break; case R4300i_J: NextInstruction = DELAY_SLOT; - Section->Jump.TargetPC = (Section->m_CompilePC & 0xF0000000) + (Command.target << 2); - if (Section->m_CompilePC == Section->Jump.TargetPC) { Section->Jump.PermLoop = true; } + Section->m_Jump.TargetPC = (CRecompilerOps::CompilePC() & 0xF0000000) + (Command.target << 2); + if (CRecompilerOps::CompilePC() == Section->m_Jump.TargetPC) { Section->m_Jump.PermLoop = true; } break; case R4300i_BEQ: NextInstruction = DELAY_SLOT; - Section->Cont.TargetPC = Section->m_CompilePC + 8; - Section->Jump.TargetPC = Section->m_CompilePC + ((short)Command.offset << 2) + 4; - if (Section->m_CompilePC == Section->Jump.TargetPC) { - if (!DelaySlotEffectsCompare(Section->m_CompilePC,Command.rs,Command.rt)) { - Section->Jump.PermLoop = true; + Section->m_Cont.TargetPC = CRecompilerOps::CompilePC() + 8; + Section->m_Jump.TargetPC = CRecompilerOps::CompilePC() + ((short)Command.offset << 2) + 4; + if (CRecompilerOps::CompilePC() == Section->m_Jump.TargetPC) { + if (!DelaySlotEffectsCompare(CRecompilerOps::CompilePC(),Command.rs,Command.rt)) { + Section->m_Jump.PermLoop = true; } } if (Section->IsConst(Command.rs) && Section->IsConst(Command.rt)) @@ -1472,7 +1491,7 @@ bool CRecompiler::FillSectionInfo(CCodeSection * Section, STEP_TYPE StartStepTyp } if (Value1 == Value2) { - Section->Cont.TargetPC = -1; + Section->m_Cont.TargetPC = -1; } } break; @@ -1480,11 +1499,11 @@ bool CRecompiler::FillSectionInfo(CCodeSection * Section, STEP_TYPE StartStepTyp case R4300i_BLEZ: case R4300i_BGTZ: NextInstruction = DELAY_SLOT; - Section->Cont.TargetPC = Section->m_CompilePC + 8; - Section->Jump.TargetPC = Section->m_CompilePC + ((short)Command.offset << 2) + 4; - if (Section->m_CompilePC == Section->Jump.TargetPC) { - if (!DelaySlotEffectsCompare(Section->m_CompilePC,Command.rs,Command.rt)) { - Section->Jump.PermLoop = true; + Section->m_Cont.TargetPC = CRecompilerOps::CompilePC() + 8; + Section->m_Jump.TargetPC = CRecompilerOps::CompilePC() + ((short)Command.offset << 2) + 4; + if (CRecompilerOps::CompilePC() == Section->m_Jump.TargetPC) { + if (!DelaySlotEffectsCompare(CRecompilerOps::CompilePC(),Command.rs,Command.rt)) { + Section->m_Jump.PermLoop = true; } } break; @@ -1586,18 +1605,18 @@ bool CRecompiler::FillSectionInfo(CCodeSection * Section, STEP_TYPE StartStepTyp default: #ifndef EXTERNAL_RELEASE DisplayError("Unhandled R4300i OpCode in FillSectionInfo\n%s", - R4300iOpcodeName(Command.Hex,Section->m_CompilePC)); + R4300iOpcodeName(Command.Hex,CRecompilerOps::CompilePC())); #endif NextInstruction = END_BLOCK; - Section->m_CompilePC -= 4; + CRecompilerOps::CompilePC() -= 4; } } else { #ifndef EXTERNAL_RELEASE DisplayError("Unhandled R4300i OpCode in FillSectionInfo 3\n%s", - R4300iOpcodeName(Command.Hex,Section->m_CompilePC)); + R4300iOpcodeName(Command.Hex,CRecompilerOps::CompilePC())); #endif NextInstruction = END_BLOCK; - Section->m_CompilePC -= 4; + CRecompilerOps::CompilePC() -= 4; } } break; @@ -1614,13 +1633,13 @@ bool CRecompiler::FillSectionInfo(CCodeSection * Section, STEP_TYPE StartStepTyp case R4300i_COP1_BC_BCFL: case R4300i_COP1_BC_BCTL: NextInstruction = LIKELY_DELAY_SLOT; - Section->Cont.TargetPC = Section->m_CompilePC + 8; - Section->Jump.TargetPC = Section->m_CompilePC + ((short)Command.offset << 2) + 4; - if (Section->m_CompilePC == Section->Jump.TargetPC) { + Section->m_Cont.TargetPC = CRecompilerOps::CompilePC() + 8; + Section->m_Jump.TargetPC = CRecompilerOps::CompilePC() + ((short)Command.offset << 2) + 4; + if (CRecompilerOps::CompilePC() == Section->m_Jump.TargetPC) { int EffectDelaySlot; OPCODE NewCommand; - if (!_MMU->LW_VAddr(Section->m_CompilePC + 4, NewCommand.Hex)) { + if (!_MMU->LW_VAddr(CRecompilerOps::CompilePC() + 4, NewCommand.Hex)) { DisplayError(GS(MSG_FAIL_LOAD_WORD)); ExitThread(0); } @@ -1635,20 +1654,20 @@ bool CRecompiler::FillSectionInfo(CCodeSection * Section, STEP_TYPE StartStepTyp } } if (!EffectDelaySlot) { - Section->Jump.PermLoop = true; + Section->m_Jump.PermLoop = true; } } break; case R4300i_COP1_BC_BCF: case R4300i_COP1_BC_BCT: NextInstruction = DELAY_SLOT; - Section->Cont.TargetPC = Section->m_CompilePC + 8; - Section->Jump.TargetPC = Section->m_CompilePC + ((short)Command.offset << 2) + 4; - if (Section->m_CompilePC == Section->Jump.TargetPC) { + Section->m_Cont.TargetPC = CRecompilerOps::CompilePC() + 8; + Section->m_Jump.TargetPC = CRecompilerOps::CompilePC() + ((short)Command.offset << 2) + 4; + if (CRecompilerOps::CompilePC() == Section->m_Jump.TargetPC) { int EffectDelaySlot; OPCODE NewCommand; - if (!_MMU->LW_VAddr(Section->m_CompilePC + 4, NewCommand.Hex)) { + if (!_MMU->LW_VAddr(CRecompilerOps::CompilePC() + 4, NewCommand.Hex)) { DisplayError(GS(MSG_FAIL_LOAD_WORD)); ExitThread(0); } @@ -1663,7 +1682,7 @@ bool CRecompiler::FillSectionInfo(CCodeSection * Section, STEP_TYPE StartStepTyp } } if (!EffectDelaySlot) { - Section->Jump.PermLoop = true; + Section->m_Jump.PermLoop = true; } } break; @@ -1679,10 +1698,10 @@ bool CRecompiler::FillSectionInfo(CCodeSection * Section, STEP_TYPE StartStepTyp default: #ifndef EXTERNAL_RELEASE DisplayError("Unhandled R4300i OpCode in FillSectionInfo 2\n%s", - R4300iOpcodeName(Command.Hex,Section->m_CompilePC)); + R4300iOpcodeName(Command.Hex,CRecompilerOps::CompilePC())); #endif NextInstruction = END_BLOCK; - Section->m_CompilePC -= 4; + CRecompilerOps::CompilePC() -= 4; } break; case R4300i_BEQL: @@ -1690,11 +1709,11 @@ bool CRecompiler::FillSectionInfo(CCodeSection * Section, STEP_TYPE StartStepTyp case R4300i_BLEZL: case R4300i_BGTZL: NextInstruction = LIKELY_DELAY_SLOT; - Section->Cont.TargetPC = Section->m_CompilePC + 8; - Section->Jump.TargetPC = Section->m_CompilePC + ((short)Command.offset << 2) + 4; - if (Section->m_CompilePC == Section->Jump.TargetPC) { - if (!DelaySlotEffectsCompare(Section->m_CompilePC,Command.rs,Command.rt)) { - Section->Jump.PermLoop = true; + Section->m_Cont.TargetPC = CRecompilerOps::CompilePC() + 8; + Section->m_Jump.TargetPC = CRecompilerOps::CompilePC() + ((short)Command.offset << 2) + 4; + if (CRecompilerOps::CompilePC() == Section->m_Jump.TargetPC) { + if (!DelaySlotEffectsCompare(CRecompilerOps::CompilePC(),Command.rs,Command.rt)) { + Section->m_Jump.PermLoop = true; } } break; @@ -1751,7 +1770,7 @@ bool CRecompiler::FillSectionInfo(CCodeSection * Section, STEP_TYPE StartStepTyp case R4300i_SD: break; default: NextInstruction = END_BLOCK; - Section->m_CompilePC -= 4; + CRecompilerOps::CompilePC() -= 4; if (Command.Hex == 0x7C1C97C0) { break; } if (Command.Hex == 0x7FFFFFFF) { break; } if (Command.Hex == 0xF1F3F5F7) { break; } @@ -1759,90 +1778,93 @@ bool CRecompiler::FillSectionInfo(CCodeSection * Section, STEP_TYPE StartStepTyp if (Command.Hex == 0x4C5A5353) { break; } #ifndef EXTERNAL_RELEASE DisplayError("Unhandled R4300i OpCode in FillSectionInfo 1\n%s\n%X", - R4300iOpcodeName(Command.Hex,Section->m_CompilePC),Command.Hex); + R4300iOpcodeName(Command.Hex,CRecompilerOps::CompilePC()),Command.Hex); #endif } -// if (Section->m_CompilePC == 0x8005E4B8) { -//CPU_Message("%X: %s %s = %d",Section->m_CompilePC,R4300iOpcodeName(Command.Hex,Section->m_CompilePC), +// if (CRecompilerOps::CompilePC() == 0x8005E4B8) { +//CPU_Message("%X: %s %s = %d",CRecompilerOps::CompilePC(),R4300iOpcodeName(Command.Hex,CRecompilerOps::CompilePC()), // CRegName::GPR[8],Section->MipsRegState(8)); //_asm int 3 // } switch (NextInstruction) { case NORMAL: - Section->m_CompilePC += 4; + CRecompilerOps::CompilePC() += 4; break; case DELAY_SLOT: NextInstruction = DELAY_SLOT_DONE; - Section->m_CompilePC += 4; + CRecompilerOps::CompilePC() += 4; break; case LIKELY_DELAY_SLOT: - if (Section->Cont.TargetPC == Section->Jump.TargetPC) + if (Section->m_Cont.TargetPC == Section->m_Jump.TargetPC) { - Section->Jump.RegSet = Section->RegWorking; - Section->Cont.DoneDelaySlot = false; - Section->Cont.RegSet = Section->RegWorking; - Section->Cont.DoneDelaySlot = true; + Section->m_Jump.RegSet = Section->RegWorking; + Section->m_Cont.DoneDelaySlot = false; + Section->m_Cont.RegSet = Section->RegWorking; + Section->m_Cont.DoneDelaySlot = true; NextInstruction = END_BLOCK; } else { - Section->Cont.RegSet = Section->RegWorking; - Section->Cont.DoneDelaySlot = true; + Section->m_Cont.RegSet = Section->RegWorking; + Section->m_Cont.DoneDelaySlot = true; NextInstruction = LIKELY_DELAY_SLOT_DONE; - Section->m_CompilePC += 4; + CRecompilerOps::CompilePC() += 4; } break; case DELAY_SLOT_DONE: - Section->Cont.RegSet = Section->RegWorking; - Section->Jump.RegSet = Section->RegWorking; - Section->Cont.DoneDelaySlot = true; - Section->Jump.DoneDelaySlot = true; + Section->m_Cont.RegSet = Section->RegWorking; + Section->m_Jump.RegSet = Section->RegWorking; + Section->m_Cont.DoneDelaySlot = true; + Section->m_Jump.DoneDelaySlot = true; NextInstruction = END_BLOCK; break; case LIKELY_DELAY_SLOT_DONE: - Section->Jump.RegSet = Section->RegWorking; - Section->Jump.DoneDelaySlot = true; + Section->m_Jump.RegSet = Section->RegWorking; + Section->m_Jump.DoneDelaySlot = true; NextInstruction = END_BLOCK; break; } - if ((Section->m_CompilePC & 0xFFFFF000) != (Section->StartPC & 0xFFFFF000)) { + if ((CRecompilerOps::CompilePC() & 0xFFFFF000) != (Section->StartPC & 0xFFFFF000)) { if (NextInstruction != END_BLOCK && NextInstruction != NORMAL) { // DisplayError("Branch running over delay slot ???\nNextInstruction == %d",NextInstruction); - Section->Cont.TargetPC = (DWORD)-1; - Section->Jump.TargetPC = (DWORD)-1; + Section->m_Cont.TargetPC = (DWORD)-1; + Section->m_Jump.TargetPC = (DWORD)-1; } NextInstruction = END_BLOCK; - Section->m_CompilePC -= 4; + CRecompilerOps::CompilePC() -= 4; } } while (NextInstruction != END_BLOCK); - if (Section->Cont.TargetPC != (DWORD)-1) { - if ((Section->Cont.TargetPC & 0xFFFFF000) != (Section->StartPC & 0xFFFFF000)) { - Section->Cont.TargetPC = (DWORD)-1; + if (Section->m_Cont.TargetPC != (DWORD)-1) { + if ((Section->m_Cont.TargetPC & 0xFFFFF000) != (Section->StartPC & 0xFFFFF000)) { + Section->m_Cont.TargetPC = (DWORD)-1; } } - if (Section->Jump.TargetPC != (DWORD)-1) { - if (Section->Jump.TargetPC < Section->BlockInfo->StartVAddr) + if (Section->m_Jump.TargetPC != (DWORD)-1) { + if (Section->m_Jump.TargetPC < Section->BlockInfo->StartVAddr) { - Section->Jump.TargetPC = (DWORD)-1; + Section->m_Jump.TargetPC = (DWORD)-1; } - if ((Section->Jump.TargetPC & 0xFFFFF000) != (Section->StartPC & 0xFFFFF000)) { - Section->Jump.TargetPC = (DWORD)-1; + if ((Section->m_Jump.TargetPC & 0xFFFFF000) != (Section->StartPC & 0xFFFFF000)) { + Section->m_Jump.TargetPC = (DWORD)-1; } } #endif return true; } -void CRecompiler::CompileExitCode ( CBlockInfo & BlockInfo ) +void CRecompiler::CompileExitCode ( CCodeBlock & BlockInfo ) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix for (EXIT_LIST::iterator ExitIter = BlockInfo.ExitInfo.begin(); ExitIter != BlockInfo.ExitInfo.end(); ExitIter++) { CPU_Message(""); CPU_Message(" $Exit_%d",ExitIter->ID); - SetJump32(ExitIter->JumpLoc,RecompPos); + SetJump32(ExitIter->m_JumpLoc,RecompPos()); NextInstruction = ExitIter->NextInstruction; CompileExit(&BlockInfo.ParentSection, -1, ExitIter->TargetPC,ExitIter->ExitRegSet,ExitIter->reason,true,NULL); } +#endif } void CRecompiler::RecompilerMain_ChangeMemory ( void ) @@ -1997,7 +2019,22 @@ CCompiledFunc * CRecompiler::CompilerCode ( void ) return NULL; } - CCompiledFunc * info = new CCompiledFunc(PROGRAM_COUNTER,pAddr); + DWORD StartTime = timeGetTime(); + WriteTraceF(TraceRecompiler,"Compile Block-Start: Program Counter: %X pAddr: %X",*_PROGRAM_COUNTER,pAddr); + + + CCodeBlock CodeBlock(*_PROGRAM_COUNTER, RecompPos()); + if (!CodeBlock.Compile()) + { + return NULL; + } + + CCompiledFunc * info = new CCompiledFunc(CodeBlock); + + //if block linking then analysis + // + + /*CCompiledFunc * info = new CCompiledFunc(PROGRAM_COUNTER,pAddr); if (info == NULL) { WriteTrace(TraceError,"CRecompiler::CompilerCode: Failed to allocate CCompiledFunc"); @@ -2028,39 +2065,21 @@ CCompiledFunc * CRecompiler::CompilerCode ( void ) return Info; } #endif - return NULL; -} - -void CRecompiler::CheckRecompMem ( void ) -{ - int Size = (int)((BYTE *)RecompPos - (BYTE *)m_RecompCode); - if ((Size + 0x20000) < m_RecompSize) - { - return; - } - if (m_RecompSize == MaxCompileBufferSize) - { - return; - } - LPVOID MemAddr = VirtualAlloc( m_RecompCode + m_RecompSize , IncreaseCompileBufferSize, MEM_COMMIT, PAGE_EXECUTE_READWRITE); - m_RecompSize += IncreaseCompileBufferSize; - - if (MemAddr == NULL) - { - _Notify->FatalError(MSG_MEM_ALLOC_ERROR); - } + */ + return info; } +#ifdef tofix void CRecompiler::DetermineLoop(CCodeSection * Section, DWORD Test, DWORD Test2, DWORD TestID) { if (Section == NULL) { return; } - if (Section->SectionID != TestID) { + if (Section->m_SectionID != TestID) { if (Section->Test2 == Test2) { return; } Section->Test2 = Test2; - DetermineLoop(Section->ContinueSection,Test,Test2,TestID); - DetermineLoop(Section->JumpSection,Test,Test2,TestID); + DetermineLoop(Section->m_ContinueSection,Test,Test2,TestID); + DetermineLoop(Section->m_JumpSection,Test,Test2,TestID); return; } if (Section->Test2 == Test2) { @@ -2068,15 +2087,15 @@ void CRecompiler::DetermineLoop(CCodeSection * Section, DWORD Test, DWORD Test2, return; } Section->Test2 = Test2; - DetermineLoop(Section->ContinueSection,Test,Test2,TestID); - DetermineLoop(Section->JumpSection,Test,Test2,TestID); + DetermineLoop(Section->m_ContinueSection,Test,Test2,TestID); + DetermineLoop(Section->m_JumpSection,Test,Test2,TestID); if (Section->Test == Test) { return; } Section->Test = Test; - if (Section->ContinueSection != NULL) { - DetermineLoop(Section->ContinueSection,Test,CCodeSection::GetNewTestValue(),Section->ContinueSection->SectionID); + if (Section->m_ContinueSection != NULL) { + DetermineLoop(Section->m_ContinueSection,Test,CCodeSection::GetNewTestValue(),Section->m_ContinueSection->m_SectionID); } - if (Section->JumpSection != NULL) { - DetermineLoop(Section->JumpSection,Test,CCodeSection::GetNewTestValue(),Section->JumpSection->SectionID); + if (Section->m_JumpSection != NULL) { + DetermineLoop(Section->m_JumpSection,Test,CCodeSection::GetNewTestValue(),Section->m_JumpSection->m_SectionID); } } @@ -2089,14 +2108,14 @@ bool CRecompiler::DisplaySectionInformation (CCodeSection * Section, DWORD ID, D if (Section == NULL) { return false; } if (Section->Test == Test) { return false; } Section->Test = Test; - if (Section->SectionID != ID) { - if (DisplaySectionInformation(Section->ContinueSection,ID,Test)) { return true; } - if (DisplaySectionInformation(Section->JumpSection,ID,Test)) { return true; } + if (Section->m_SectionID != ID) { + if (DisplaySectionInformation(Section->m_ContinueSection,ID,Test)) { return true; } + if (DisplaySectionInformation(Section->m_JumpSection,ID,Test)) { return true; } return false; } - CPU_Message("====== Section %d ======",Section->SectionID); + CPU_Message("====== Section %d ======",Section->m_SectionID); CPU_Message("Start PC: %X",Section->StartPC); - CPU_Message("CompiledLocation: %X",RecompPos); + CPU_Message("CompiledLocation: %X",RecompPos()); if (!Section->ParentSection.empty()) { stdstr ParentList; @@ -2107,22 +2126,22 @@ bool CRecompiler::DisplaySectionInformation (CCodeSection * Section, DWORD ID, D { ParentList += ", "; } - ParentList += stdstr_f("%d",Parent->SectionID); + ParentList += stdstr_f("%d",Parent->m_SectionID); } CPU_Message("Number of parents: %d (%s)",Section->ParentSection.size(),ParentList.c_str()); } - if (Section->JumpSection != NULL) { - CPU_Message("Jump Section: %d",Section->JumpSection->SectionID); + if (Section->m_JumpSection != NULL) { + CPU_Message("Jump Section: %d",Section->m_JumpSection->m_SectionID); } else { CPU_Message("Jump Section: None"); } - if (Section->ContinueSection != NULL) { - CPU_Message("Continue Section: %d",Section->ContinueSection->SectionID); + if (Section->m_ContinueSection != NULL) { + CPU_Message("Continue Section: %d",Section->m_ContinueSection->m_SectionID); } else { CPU_Message("Continue Section: None"); } - CPU_Message("=======================",Section->SectionID); + CPU_Message("=======================",Section->m_SectionID); return true; } @@ -2135,7 +2154,7 @@ bool CRecompiler::InheritParentInfo (CCodeSection * Section) char Label[100]; BOOL NeedSync; */ - DisplaySectionInformation(Section,Section->SectionID,CCodeSection::GetNewTestValue()); + DisplaySectionInformation(Section,Section->m_SectionID,CCodeSection::GetNewTestValue()); if (Section->ParentSection.empty()) { @@ -2147,14 +2166,14 @@ bool CRecompiler::InheritParentInfo (CCodeSection * Section) if (Section->ParentSection.size() == 1) { CCodeSection * Parent = *(Section->ParentSection.begin()); - CJumpInfo * JumpInfo = Section == Parent->ContinueSection ? &Parent->Cont : &Parent->Jump; + CJumpInfo * JumpInfo = Section == Parent->m_ContinueSection ? &Parent->m_Cont : &Parent->m_Jump; Section->RegStart = JumpInfo->RegSet; if (JumpInfo->LinkLocation != NULL) { - CPU_Message(" Section_%d:",Section->SectionID); - SetJump32(JumpInfo->LinkLocation,RecompPos); + CPU_Message(" Section_%d:",Section->m_SectionID); + SetJump32(JumpInfo->LinkLocation,RecompPos()); if (JumpInfo->LinkLocation2 != NULL) { - SetJump32(JumpInfo->LinkLocation2,RecompPos); + SetJump32(JumpInfo->LinkLocation2,RecompPos()); } } Section->RegWorking = Section->RegStart; @@ -2170,16 +2189,16 @@ bool CRecompiler::InheritParentInfo (CCodeSection * Section) BLOCK_PARENT BlockParent; if (Parent->CompiledLocation == NULL) { continue; } - if (Parent->JumpSection != Parent->ContinueSection) { + if (Parent->m_JumpSection != Parent->m_ContinueSection) { BlockParent.Parent = Parent; - BlockParent.JumpInfo = Section == Parent->ContinueSection?&Parent->Cont:&Parent->Jump; + BlockParent.JumpInfo = Section == Parent->m_ContinueSection?&Parent->m_Cont:&Parent->m_Jump; ParentList.push_back(BlockParent); } else { BlockParent.Parent = Parent; - BlockParent.JumpInfo = &Parent->Cont; + BlockParent.JumpInfo = &Parent->m_Cont; ParentList.push_back(BlockParent); BlockParent.Parent = Parent; - BlockParent.JumpInfo = &Parent->Jump; + BlockParent.JumpInfo = &Parent->m_Jump; ParentList.push_back(BlockParent); } } @@ -2197,16 +2216,16 @@ bool CRecompiler::InheritParentInfo (CCodeSection * Section) BLOCK_PARENT BlockParent; if (Parent->CompiledLocation != NULL) { continue; } - if (Parent->JumpSection != Parent->ContinueSection) { + if (Parent->m_JumpSection != Parent->m_ContinueSection) { BlockParent.Parent = Parent; - BlockParent.JumpInfo = Section == Parent->ContinueSection?&Parent->Cont:&Parent->Jump; + BlockParent.JumpInfo = Section == Parent->m_ContinueSection?&Parent->m_Cont:&Parent->m_Jump; ParentList.push_back(BlockParent); } else { BlockParent.Parent = Parent; - BlockParent.JumpInfo = &Parent->Cont; + BlockParent.JumpInfo = &Parent->m_Cont; ParentList.push_back(BlockParent); BlockParent.Parent = Parent; - BlockParent.JumpInfo = &Parent->Jump; + BlockParent.JumpInfo = &Parent->m_Jump; ParentList.push_back(BlockParent); } } @@ -2223,11 +2242,11 @@ bool CRecompiler::InheritParentInfo (CCodeSection * Section) Section->RegWorking = JumpInfo->RegSet; if (JumpInfo->LinkLocation != NULL) { - CPU_Message(" Section_%d (from %d):",Section->SectionID,Parent->SectionID); - SetJump32(JumpInfo->LinkLocation,RecompPos); + CPU_Message(" Section_%d (from %d):",Section->m_SectionID,Parent->m_SectionID); + SetJump32(JumpInfo->LinkLocation,RecompPos()); JumpInfo->LinkLocation = NULL; if (JumpInfo->LinkLocation2 != NULL) { - SetJump32(JumpInfo->LinkLocation2,RecompPos); + SetJump32(JumpInfo->LinkLocation2,RecompPos()); JumpInfo->LinkLocation2 = NULL; } } @@ -2323,7 +2342,7 @@ bool CRecompiler::InheritParentInfo (CCodeSection * Section) //Sync registers for different blocks char Label[100]; - sprintf(Label,"Section_%d",Section->SectionID); + sprintf(Label,"Section_%d",Section->m_SectionID); int CurrentParent = FirstParent; bool NeedSync = false; for (count = 0;count < NoOfCompiledParents;count++) { @@ -2368,7 +2387,7 @@ bool CRecompiler::InheritParentInfo (CCodeSection * Section) case CRegInfo::STATE_MAPPED_32_ZERO: case CRegInfo::STATE_MAPPED_32_SIGN: if (Section->MipsRegLo(count2) != RegSet->MipsRegLo(count2)) { - //DisplayError("Parent: %d",Parent->SectionID); + //DisplayError("Parent: %d",Parent->m_SectionID); NeedSync = true; } break; @@ -2390,18 +2409,18 @@ bool CRecompiler::InheritParentInfo (CCodeSection * Section) Parent = ParentList[CurrentParent].Parent; JumpInfo = ParentList[CurrentParent].JumpInfo; JmpLabel32(Label,0); - JumpInfo->LinkLocation = RecompPos - 4; + JumpInfo->LinkLocation = RecompPos() - 4; JumpInfo->LinkLocation2 = NULL; CurrentParent = count; Parent = ParentList[CurrentParent].Parent; JumpInfo = ParentList[CurrentParent].JumpInfo; - CPU_Message(" Section_%d (from %d):",Section->SectionID,Parent->SectionID); + CPU_Message(" Section_%d (from %d):",Section->m_SectionID,Parent->m_SectionID); if (JumpInfo->LinkLocation != NULL) { - SetJump32(JumpInfo->LinkLocation,RecompPos); + SetJump32(JumpInfo->LinkLocation,RecompPos()); JumpInfo->LinkLocation = NULL; if (JumpInfo->LinkLocation2 != NULL) { - SetJump32(JumpInfo->LinkLocation2,RecompPos); + SetJump32(JumpInfo->LinkLocation2,RecompPos()); JumpInfo->LinkLocation2 = NULL; } } @@ -2423,22 +2442,22 @@ bool CRecompiler::InheritParentInfo (CCodeSection * Section) JumpInfo = ParentList[count].JumpInfo; if (JumpInfo->LinkLocation != NULL) { - SetJump32(JumpInfo->LinkLocation,RecompPos); + SetJump32(JumpInfo->LinkLocation,RecompPos()); JumpInfo->LinkLocation = NULL; if (JumpInfo->LinkLocation2 != NULL) { - SetJump32(JumpInfo->LinkLocation2,RecompPos); + SetJump32(JumpInfo->LinkLocation2,RecompPos()); JumpInfo->LinkLocation2 = NULL; } } } - CPU_Message(" Section_%d:",Section->SectionID); + CPU_Message(" Section_%d:",Section->m_SectionID); Section->BlockCycleCount() = 0; Section->BlockRandomModifier() = 0; return true; } -bool CRecompiler::GenerateX86Code(CBlockInfo & BlockInfo, CCodeSection * Section, DWORD Test ) +bool CRecompiler::GenerateX86Code(CCodeBlock & BlockInfo, CCodeSection * Section, DWORD Test ) { _Notify->BreakPoint(__FILE__,__LINE__); #ifdef tofix @@ -2447,8 +2466,8 @@ bool CRecompiler::GenerateX86Code(CBlockInfo & BlockInfo, CCodeSection * Section if (Section->CompiledLocation != NULL) { if (Section->Test == Test) { return false; } Section->Test = Test; - if (GenerateX86Code(BlockInfo,Section->ContinueSection,Test)) { return true; } - if (GenerateX86Code(BlockInfo,Section->JumpSection,Test)) { return true; } + if (GenerateX86Code(BlockInfo,Section->m_ContinueSection,Test)) { return true; } + if (GenerateX86Code(BlockInfo,Section->m_JumpSection,Test)) { return true; } return false; } if (Section->ParentSection.size() > 0) @@ -2462,11 +2481,11 @@ bool CRecompiler::GenerateX86Code(CBlockInfo & BlockInfo, CCodeSection * Section } } if (!InheritParentInfo(Section)) { return false; } - Section->CompiledLocation = RecompPos; - Section->m_CompilePC = Section->StartPC; + Section->CompiledLocation = RecompPos(); + CRecompilerOps::CompilePC() = Section->StartPC; NextInstruction = NORMAL; /*if (m_SyncSystem) { - //if (m_SyncSystem && (DWORD)RecompPos > 0x6094C283) { + //if (m_SyncSystem && (DWORD)RecompPos() > 0x6094C283) { MoveConstToVariable(Section->StartPC,&PROGRAM_COUNTER,"PROGRAM_COUNTER"); if (BlockCycleCount != 0) { AddConstToVariable(BlockCycleCount,&_CP0[9],CRegName::Cop0[9]); @@ -2476,11 +2495,11 @@ bool CRecompiler::GenerateX86Code(CBlockInfo & BlockInfo, CCodeSection * Section BlockCycleCount = 0; BlockRandomModifier = 0; Call_Direct(SyncToPC, "SyncToPC"); - MoveConstToVariable((DWORD)RecompPos,&CurrentBlock,"CurrentBlock"); + MoveConstToVariable((DWORD)RecompPos(),&CurrentBlock,"CurrentBlock"); }*/ do { __try { - if (!_MMU->LW_VAddr(Section->m_CompilePC, g_Opcode.Hex)) { + if (!_MMU->LW_VAddr(CRecompilerOps::CompilePC(), g_Opcode.Hex)) { DisplayError(GS(MSG_FAIL_LOAD_WORD)); ExitThread(0); } @@ -2489,61 +2508,61 @@ bool CRecompiler::GenerateX86Code(CBlockInfo & BlockInfo, CCodeSection * Section ExitThread(0); } - //if (Section->m_CompilePC == 0x800AA51C && NextInstruction == NORMAL) { _asm int 3 } -// if (Section->m_CompilePC == 0xF000044 && NextInstruction == NORMAL) + //if (CRecompilerOps::CompilePC() == 0x800AA51C && NextInstruction == NORMAL) { _asm int 3 } +// if (CRecompilerOps::CompilePC() == 0xF000044 && NextInstruction == NORMAL) // { // WriteBackRegisters(Section); // UpdateCounters(&Section->BlockCycleCount(),&Section->BlockRandomModifier(),false); // // CompConstToVariable(0x26D5BB0,&_CP0[9],CRegName::Cop0[9]); // JlLabel8("blah",0); -// BYTE * Jump = RecompPos - 1; +// BYTE * Jump = RecompPos() - 1; // // BreakPoint(__FILE__,__LINE__); // X86BreakPoint(__FILE__,__LINE__); -// *((BYTE *)(Jump))=(BYTE)(RecompPos - Jump - 1); +// *((BYTE *)(Jump))=(BYTE)(RecompPos() - Jump - 1); // } - /*if (Section->m_CompilePC >= 0x800C4024 && Section->m_CompilePC < 0x800C4030) { + /*if (CRecompilerOps::CompilePC() >= 0x800C4024 && CRecompilerOps::CompilePC() < 0x800C4030) { CurrentRoundingModel = RoundUnknown; }*/ -// if (Section->m_CompilePC >= 0x800017A8 && Section->m_CompilePC < 0x800017DC && NextInstruction == NORMAL) { +// if (CRecompilerOps::CompilePC() >= 0x800017A8 && CRecompilerOps::CompilePC() < 0x800017DC && NextInstruction == NORMAL) { // WriteBackRegisters(Section); // UpdateCounters(&Section->BlockCycleCount(),&Section->BlockRandomModifier(),false); -// MoveConstToVariable(Section->m_CompilePC,&PROGRAM_COUNTER,"PROGRAM_COUNTER"); -// //MoveConstToVariable((DWORD)RecompPos,&CurrentBlock,"CurrentBlock"); +// MoveConstToVariable(CRecompilerOps::CompilePC(),&PROGRAM_COUNTER,"PROGRAM_COUNTER"); +// //MoveConstToVariable((DWORD)RecompPos(),&CurrentBlock,"CurrentBlock"); // if (m_SyncSystem) { Call_Direct(SyncToPC, "SyncToPC"); } // } -// if (Section->m_CompilePC >= 0x8005E984 && Section->m_CompilePC < 0x8005EA84 && NextInstruction == NORMAL) { +// if (CRecompilerOps::CompilePC() >= 0x8005E984 && CRecompilerOps::CompilePC() < 0x8005EA84 && NextInstruction == NORMAL) { // WriteBackRegisters(Section); // UpdateCounters(&Section->BlockCycleCount(),&Section->BlockRandomModifier(),false); -// MoveConstToVariable(Section->m_CompilePC,&PROGRAM_COUNTER,"PROGRAM_COUNTER"); -// //MoveConstToVariable((DWORD)RecompPos,&CurrentBlock,"CurrentBlock"); +// MoveConstToVariable(CRecompilerOps::CompilePC(),&PROGRAM_COUNTER,"PROGRAM_COUNTER"); +// //MoveConstToVariable((DWORD)RecompPos(),&CurrentBlock,"CurrentBlock"); // if (m_SyncSystem) { Call_Direct(SyncToPC, "SyncToPC"); } // } -// if (Section->m_CompilePC >= 0xF000000 && Section->m_CompilePC < 0xF000500 && NextInstruction == NORMAL) { +// if (CRecompilerOps::CompilePC() >= 0xF000000 && CRecompilerOps::CompilePC() < 0xF000500 && NextInstruction == NORMAL) { // WriteBackRegisters(Section); // UpdateCounters(&Section->BlockCycleCount(),&Section->BlockRandomModifier(),false); -// MoveConstToVariable(Section->m_CompilePC,&PROGRAM_COUNTER,"PROGRAM_COUNTER"); -// //MoveConstToVariable((DWORD)RecompPos,&CurrentBlock,"CurrentBlock"); +// MoveConstToVariable(CRecompilerOps::CompilePC(),&PROGRAM_COUNTER,"PROGRAM_COUNTER"); +// //MoveConstToVariable((DWORD)RecompPos(),&CurrentBlock,"CurrentBlock"); // if (m_SyncSystem) { Call_Direct(SyncToPC, "SyncToPC"); } // } - /*if (Section->m_CompilePC == 0x802000D0 && NextInstruction == NORMAL) { + /*if (CRecompilerOps::CompilePC() == 0x802000D0 && NextInstruction == NORMAL) { CPU_Message("%s = %d",CRegName::GPR[14],Section->MipsRegState(14)); }*/ - /*if (Section->m_CompilePC == 0x150A1514 && NextInstruction == NORMAL) { + /*if (CRecompilerOps::CompilePC() == 0x150A1514 && NextInstruction == NORMAL) { CPU_Message("%s = %d",CRegName::GPR[14],Section->MipsRegState(14)); } - if (Section->m_CompilePC == 0x150A1454 && NextInstruction == NORMAL) { + if (CRecompilerOps::CompilePC() == 0x150A1454 && NextInstruction == NORMAL) { CPU_Message("%s = %d",CRegName::GPR[14],Section->MipsRegState(14)); }*/ - if (Section->m_CompilePC > Section->BlockInfo->EndVAddr) + if (CRecompilerOps::CompilePC() > Section->BlockInfo->EndVAddr) { - Section->BlockInfo->EndVAddr = Section->m_CompilePC; + Section->BlockInfo->EndVAddr = CRecompilerOps::CompilePC(); } Section->BlockCycleCount() += CountPerOp(); //CPU_Message("BlockCycleCount = %d",BlockCycleCount); @@ -2790,19 +2809,19 @@ bool CRecompiler::GenerateX86Code(CBlockInfo & BlockInfo, CCodeSection * Section if (!bRegCaching()) { WriteBackRegisters(Section); } Section->ResetX86Protection(); - /*if ((DWORD)RecompPos > 0x60B452E6) { - if (Section->m_CompilePC == 0x8002D9B8 && Section->m_CompilePC < 0x8002DA20) { + /*if ((DWORD)RecompPos() > 0x60B452E6) { + if (CRecompilerOps::CompilePC() == 0x8002D9B8 && CRecompilerOps::CompilePC() < 0x8002DA20) { CurrentRoundingModel = RoundUnknown; } }*/ UnMap_AllFPRs(Section); - /*if ((DWORD)RecompPos > 0x60AD0BD3) { - if (Section->m_CompilePC >= 0x8008B804 && Section->m_CompilePC < 0x800496D8) { + /*if ((DWORD)RecompPos() > 0x60AD0BD3) { + if (CRecompilerOps::CompilePC() >= 0x8008B804 && CRecompilerOps::CompilePC() < 0x800496D8) { CPU_Message("Blah *"); WriteBackRegisters(Section); } - /*if (Section->m_CompilePC >= 0x80000180 && Section->m_CompilePC < 0x80000190) { + /*if (CRecompilerOps::CompilePC() >= 0x80000180 && CRecompilerOps::CompilePC() < 0x80000190) { CPU_Message("Blah *"); //WriteBackRegisters(Section); }*/ @@ -2815,38 +2834,38 @@ bool CRecompiler::GenerateX86Code(CBlockInfo & BlockInfo, CCodeSection * Section }*/ //CPU_Message("MemoryStack = %s",Map_MemoryStack(Section, false) > 0?x86_Name(Map_MemoryStack(Section, false)):"Not Mapped"); - if ((Section->m_CompilePC &0xFFC) == 0xFFC) { + if ((CRecompilerOps::CompilePC() &0xFFC) == 0xFFC) { if (NextInstruction == DO_DELAY_SLOT) { #ifndef EXTERNAL_RELEASE DisplayError("Wanting to do delay slot over end of block"); #endif } if (NextInstruction == NORMAL) { - CompileExit (Section,Section->m_CompilePC, Section->m_CompilePC + 4,Section->RegWorking,CExitInfo::Normal,true,NULL); + CompileExit (Section,CRecompilerOps::CompilePC(), CRecompilerOps::CompilePC() + 4,Section->RegWorking,CExitInfo::Normal,true,NULL); NextInstruction = END_BLOCK; } } if (Section->DelaySlotSection) { - Section->Cont.RegSet = Section->RegWorking; + Section->m_Cont.RegSet = Section->RegWorking; GenerateSectionLinkage(Section); NextInstruction = END_BLOCK; } switch (NextInstruction) { case NORMAL: - Section->m_CompilePC += 4; + CRecompilerOps::CompilePC() += 4; break; case DO_DELAY_SLOT: NextInstruction = DELAY_SLOT; - Section->m_CompilePC += 4; + CRecompilerOps::CompilePC() += 4; break; case DELAY_SLOT: NextInstruction = DELAY_SLOT_DONE; Section->BlockCycleCount() -= CountPerOp(); Section->BlockRandomModifier() -= 1; - Section->m_CompilePC -= 4; + CRecompilerOps::CompilePC() -= 4; break; } } while (NextInstruction != END_BLOCK); @@ -2854,189 +2873,6 @@ bool CRecompiler::GenerateX86Code(CBlockInfo & BlockInfo, CCodeSection * Section return true; } - -void CRecompiler::CompileExit ( CCodeSection * Section, DWORD JumpPC, DWORD TargetPC, CRegInfo ExitRegSet, CExitInfo::EXIT_REASON reason, int CompileNow, void (*x86Jmp)(char * Label, DWORD Value)) -{ - CBlockInfo * const BlockInfo = Section->BlockInfo; - - if (!CompileNow) - { - char String[100]; - sprintf(String,"Exit_%d",BlockInfo->ExitInfo.size()); - if (x86Jmp == NULL) - { - DisplayError("CompileExit error"); - ExitThread(0); - } - x86Jmp(String,0); - - CExitInfo ExitInfo; - ExitInfo.ID = BlockInfo->ExitInfo.size(); - ExitInfo.TargetPC = TargetPC; - ExitInfo.ExitRegSet = ExitRegSet; - ExitInfo.reason = reason; - ExitInfo.NextInstruction = NextInstruction; - ExitInfo.JumpLoc = RecompPos - 4; - BlockInfo->ExitInfo.push_back(ExitInfo); - return; - } - - //CPU_Message("CompileExit: %d",reason); - CCodeSection TempSection(BlockInfo,-1,0); - TempSection.AddParent(NULL); - TempSection.RegWorking = ExitRegSet; - - if (TargetPC != (DWORD)-1) - { - MoveConstToVariable(TargetPC,&PROGRAM_COUNTER,"PROGRAM_COUNTER"); - UpdateCounters(&ExitRegSet.BlockCycleCount(),&ExitRegSet.BlockRandomModifier(),TargetPC <= JumpPC && reason == CExitInfo::Normal); - } else { - UpdateCounters(&ExitRegSet.BlockCycleCount(),&ExitRegSet.BlockRandomModifier(),reason == CExitInfo::Normal); - } - WriteBackRegisters(&TempSection); - - switch (reason) { - case CExitInfo::Normal: case CExitInfo::Normal_NoSysCheck: - TempSection.RegWorking.BlockRandomModifier() = 0; - TempSection.RegWorking.BlockCycleCount() = 0; - if (TargetPC != (DWORD)-1) - { - if (TargetPC <= JumpPC && reason == CExitInfo::Normal) - { - CompileSystemCheck((DWORD)-1,TempSection.RegWorking); - } - } else { - if (reason == CExitInfo::Normal) { CompileSystemCheck((DWORD)-1,TempSection.RegWorking); } - } - if (m_SyncSystem) { Call_Direct(SyncToPC, "SyncToPC"); } -#ifdef LinkBlocks - if (bSMM_ValidFunc == false) - { - if (LookUpMode() == FuncFind_ChangeMemory) - { - BreakPoint(__FILE__,__LINE__); - // BYTE * Jump, * Jump2; - // if (TargetPC >= 0x80000000 && TargetPC < 0xC0000000) { - // DWORD pAddr = TargetPC & 0x1FFFFFFF; - // - // MoveVariableToX86reg((BYTE *)RDRAM + pAddr,"RDRAM + pAddr",x86_EAX); - // Jump2 = NULL; - // } else { - // MoveConstToX86reg((TargetPC >> 12),x86_ECX); - // MoveConstToX86reg(TargetPC,x86_EBX); - // MoveVariableDispToX86Reg(TLB_ReadMap,"TLB_ReadMap",x86_ECX,x86_ECX,4); - // TestX86RegToX86Reg(x86_ECX,x86_ECX); - // JeLabel8("NoTlbEntry",0); - // Jump2 = RecompPos - 1; - // MoveX86regPointerToX86reg(x86_ECX, x86_EBX,x86_EAX); - // } - // MoveX86RegToX86Reg(x86_EAX,x86_ECX); - // AndConstToX86Reg(x86_ECX,0xFFFF0000); - // CompConstToX86reg(x86_ECX,0x7C7C0000); - // JneLabel8("NoCode",0); - // Jump = RecompPos - 1; - // AndConstToX86Reg(x86_EAX,0xFFFF); - // ShiftLeftSignImmed(x86_EAX,4); - // AddConstToX86Reg(x86_EAX,0xC); - // MoveVariableDispToX86Reg(OrigMem,"OrigMem",x86_ECX,x86_EAX,1); - // JmpDirectReg(x86_ECX); - // CPU_Message(" NoCode:"); - // *((BYTE *)(Jump))=(BYTE)(RecompPos - Jump - 1); - // if (Jump2 != NULL) { - // CPU_Message(" NoTlbEntry:"); - // *((BYTE *)(Jump2))=(BYTE)(RecompPos - Jump2 - 1); - // } - } - else if (LookUpMode() == FuncFind_VirtualLookup) - { - MoveConstToX86reg(TargetPC,x86_EDX); - MoveConstToX86reg((DWORD)&m_Functions,x86_ECX); - Call_Direct(AddressOf(CFunctionMap::CompilerFindFunction), "CFunctionMap::CompilerFindFunction"); - MoveX86RegToX86Reg(x86_EAX,x86_ECX); - JecxzLabel8("NullPointer",0); - BYTE * Jump = RecompPos - 1; - MoveX86PointerToX86regDisp(x86_EBX,x86_ECX,0xC); - JmpDirectReg(x86_EBX); - CPU_Message(" NullPointer:"); - *((BYTE *)(Jump))=(BYTE)(RecompPos - Jump - 1); - } - else if (LookUpMode() == FuncFind_PhysicalLookup) - { - BYTE * Jump2 = NULL; - if (TargetPC >= 0x80000000 && TargetPC < 0x90000000) { - DWORD pAddr = TargetPC & 0x1FFFFFFF; - MoveVariableToX86reg((BYTE *)JumpTable + pAddr,"JumpTable + pAddr",x86_ECX); - } else if (TargetPC >= 0x90000000 && TargetPC < 0xC0000000) { - } else { - MoveConstToX86reg((TargetPC >> 12),x86_ECX); - MoveConstToX86reg(TargetPC,x86_EBX); - MoveVariableDispToX86Reg(TLB_ReadMap,"TLB_ReadMap",x86_ECX,x86_ECX,4); - TestX86RegToX86Reg(x86_ECX,x86_ECX); - JeLabel8("NoTlbEntry",0); - Jump2 = RecompPos - 1; - AddConstToX86Reg(x86_ECX,(DWORD)JumpTable - (DWORD)RDRAM); - MoveX86regPointerToX86reg(x86_ECX, x86_EBX,x86_ECX); - } - if (TargetPC < 0x90000000 || TargetPC >= 0xC0000000) - { - JecxzLabel8("NullPointer",0); - BYTE * Jump = RecompPos - 1; - MoveX86PointerToX86regDisp(x86_EAX,x86_ECX,0xC); - JmpDirectReg(x86_EAX); - CPU_Message(" NullPointer:"); - *((BYTE *)(Jump))=(BYTE)(RecompPos - Jump - 1); - if (Jump2 != NULL) { - CPU_Message(" NoTlbEntry:"); - *((BYTE *)(Jump2))=(BYTE)(RecompPos - Jump2 - 1); - } - } - } - } - Ret(); -#else - Ret(); -#endif - break; - case CExitInfo::DoCPU_Action: - Call_Direct(DoSomething,"DoSomething"); - if (m_SyncSystem) { Call_Direct(SyncToPC, "SyncToPC"); } - Ret(); - break; - case CExitInfo::DoSysCall: - MoveConstToX86reg(NextInstruction == JUMP || NextInstruction == DELAY_SLOT,x86_ECX); - Call_Direct(DoSysCallException,"DoSysCallException"); - if (m_SyncSystem) { Call_Direct(SyncToPC, "SyncToPC"); } - Ret(); - break; - case CExitInfo::COP1_Unuseable: - MoveConstToX86reg(NextInstruction == JUMP || NextInstruction == DELAY_SLOT,x86_ECX); - MoveConstToX86reg(1,x86_EDX); - Call_Direct(DoCopUnusableException,"DoCopUnusableException"); - if (m_SyncSystem) { Call_Direct(SyncToPC, "SyncToPC"); } - Ret(); - break; - case CExitInfo::ExitResetRecompCode: - if (NextInstruction == JUMP || NextInstruction == DELAY_SLOT) { - X86BreakPoint(__FILE__,__LINE__); - } - if (m_SyncSystem) { Call_Direct(SyncToPC, "SyncToPC"); } - X86BreakPoint(__FILE__,__LINE__); - MoveVariableToX86reg(this,"this",x86_ECX); - Call_Direct(AddressOf(ResetRecompCode), "ResetRecompCode"); - Ret(); - break; - case CExitInfo::TLBReadMiss: - MoveConstToX86reg(NextInstruction == JUMP || NextInstruction == DELAY_SLOT,x86_ECX); - MoveVariableToX86reg(&TLBLoadAddress,"TLBLoadAddress",x86_EDX); - Call_Direct(DoTLBMiss,"DoTLBMiss"); - if (m_SyncSystem) { Call_Direct(SyncToPC, "SyncToPC"); } - Ret(); - break; - default: - DisplayError("how did you want to exit on reason (%d) ???",reason); - } -} - void CRecompiler::UpdateCounters ( DWORD * Cycles, DWORD * RandomMod, BOOL CheckTimer) { if (Cycles == NULL || RandomMod == NULL) @@ -3081,7 +2917,7 @@ void CRecompiler::UpdateCounters ( DWORD * Cycles, DWORD * RandomMod, BOOL Check // uses SubConstFromVariable(Cycles,_Timer,"Timer"); for compare flag } JnsLabel8("Continue_From_Timer_Test",0); - Jump = RecompPos - 1; + Jump = RecompPos() - 1; Pushad(); X86BreakPoint(__FILE__,__LINE__); MoveConstToX86reg((DWORD)_SystemTimer,x86_ECX); @@ -3090,40 +2926,20 @@ void CRecompiler::UpdateCounters ( DWORD * Cycles, DWORD * RandomMod, BOOL Check CPU_Message(""); CPU_Message(" $Continue_From_Timer_Test:"); - SetJump8(Jump,RecompPos); + SetJump8(Jump,RecompPos()); } /* if (CheckTimer) { x86ops.CompConstToVariable(0,(DWORD *)&_Reg->Timer,"_Reg->Timer"); - x86ops.JgLabel8("Timer_Fine",0); BYTE * Jump = x86ops.RecompPos.WritePos() - 1; + x86ops.JgLabel8("Timer_Fine",0); BYTE * Jump = x86ops.RecompPos().WritePos() - 1; Section->SaveX86Registers(); x86ops.Call_NonStatic_Direct((CSystemTimer *)_Reg,AddressOf(CSystemTimer::CheckTimer),"CSystemTimer::CheckTimer"); Section->RestoreX86Registers(); - x86ops.WriteLabel("Timer_Fine"); x86ops.SetJump8(Jump, x86ops.RecompPos.WritePos()); + x86ops.WriteLabel("Timer_Fine"); x86ops.SetJump8(Jump, x86ops.RecompPos().WritePos()); }*/ } -void CRecompiler::CompileSystemCheck (DWORD TargetPC, CRegInfo & RegSet) -{ - CompConstToVariable(0,&CPU_Action.DoSomething,"CPU_Action.DoSomething"); - JeLabel32("Continue_From_Interrupt_Test",0); - BYTE * Jump = RecompPos - 4; - if (TargetPC != (DWORD)-1) - { - MoveConstToVariable(TargetPC,&PROGRAM_COUNTER,"PROGRAM_COUNTER"); - } - - CCodeSection Section(NULL,-1,0); - Section.AddParent(NULL); - Section.RegWorking = RegSet; - WriteBackRegisters(&Section); - CompileExit(&Section,-1, -1,Section.RegWorking,CExitInfo::DoCPU_Action,true,NULL); - CPU_Message(""); - CPU_Message(" $Continue_From_Interrupt_Test:"); - SetJump32(Jump,RecompPos); -} - void SyncRegState (CCodeSection * Section, CRegInfo * SyncTo) { int count, x86Reg,x86RegHi, changed; @@ -3326,273 +3142,14 @@ void SyncRegState (CCodeSection * Section, CRegInfo * SyncTo) { } } -void CRecompiler::GenerateSectionLinkage (CCodeSection * Section) { - CCodeSection ** TargetSection[2]; - CJumpInfo * JumpInfo[2]; - BYTE * Jump; - int count; - - TargetSection[0] = &Section->ContinueSection; - TargetSection[1] = &Section->JumpSection; - JumpInfo[0] = &Section->Cont; - JumpInfo[1] = &Section->Jump; +#endif - for (count = 0; count < 2; count ++) { - if (JumpInfo[count]->LinkLocation == NULL && JumpInfo[count]->FallThrough == false) { - JumpInfo[count]->TargetPC = -1; - } - } - if ((Section->m_CompilePC & 0xFFC) == 0xFFC) { - //Handle Fall througth - Jump = NULL; - for (count = 0; count < 2; count ++) { - if (!JumpInfo[count]->FallThrough) { continue; } - JumpInfo[count]->FallThrough = false; - if (JumpInfo[count]->LinkLocation != NULL) { - SetJump32(JumpInfo[count]->LinkLocation,RecompPos); - JumpInfo[count]->LinkLocation = NULL; - if (JumpInfo[count]->LinkLocation2 != NULL) { - SetJump32(JumpInfo[count]->LinkLocation2,RecompPos); - JumpInfo[count]->LinkLocation2 = NULL; - } - } - MoveConstToVariable(JumpInfo[count]->TargetPC,&JumpToLocation,"JumpToLocation"); - if (JumpInfo[(count + 1) & 1]->LinkLocation == NULL) { break; } - JmpLabel8("FinishBlock",0); - Jump = RecompPos - 1; - } - for (count = 0; count < 2; count ++) { - if (JumpInfo[count]->LinkLocation == NULL) { continue; } - JumpInfo[count]->FallThrough = false; - if (JumpInfo[count]->LinkLocation != NULL) { - SetJump32(JumpInfo[count]->LinkLocation,RecompPos); - JumpInfo[count]->LinkLocation = NULL; - if (JumpInfo[count]->LinkLocation2 != NULL) { - SetJump32(JumpInfo[count]->LinkLocation2,RecompPos); - JumpInfo[count]->LinkLocation2 = NULL; - } - } - MoveConstToVariable(JumpInfo[count]->TargetPC,&JumpToLocation,"JumpToLocation"); - if (JumpInfo[(count + 1) & 1]->LinkLocation == NULL) { break; } - JmpLabel8("FinishBlock",0); - Jump = RecompPos - 1; - } - if (Jump != NULL) { - CPU_Message(" $FinishBlock:"); - SetJump8(Jump,RecompPos); - } - MoveConstToVariable(Section->m_CompilePC + 4,_PROGRAM_COUNTER,"PROGRAM_COUNTER"); - WriteBackRegisters(Section); - _N64System->GetRecompiler()->UpdateCounters(&Section->BlockCycleCount(),&Section->BlockRandomModifier(),false); -// WriteBackRegisters(Section); -// if (m_SyncSystem) { Call_Direct(SyncToPC, "SyncToPC"); } - MoveConstToVariable(DELAY_SLOT,&NextInstruction,"NextInstruction"); - Ret(); - return; - } - if (!UseLinking) { - if (Section->m_CompilePC == Section->Jump.TargetPC && (Section->Cont.FallThrough == false)) { - if (!DelaySlotEffectsJump(Section->m_CompilePC)) { -CPU_Message("PermLoop *** a"); - MoveConstToVariable(Section->m_CompilePC,_PROGRAM_COUNTER,"PROGRAM_COUNTER"); - WriteBackRegisters(Section); - Section->RegWorking.BlockCycleCount() -= CountPerOp(); - _N64System->GetRecompiler()->UpdateCounters(&Section->RegWorking.BlockCycleCount(),&Section->RegWorking.BlockRandomModifier(), false); - Call_Direct(InPermLoop,"InPermLoop"); - Section->RegWorking.BlockCycleCount() += CountPerOp(); - _N64System->GetRecompiler()->UpdateCounters(&Section->RegWorking.BlockCycleCount(),&Section->RegWorking.BlockRandomModifier(), true); - _N64System->GetRecompiler()->CompileSystemCheck(-1,Section->RegWorking); - - } - } - } - if ((*TargetSection[0]) != (*TargetSection[1]) || (*TargetSection[0]) == NULL) { - for (count = 0; count < 2; count ++) { - if (JumpInfo[count]->LinkLocation == NULL && JumpInfo[count]->FallThrough == false) { - if ((*TargetSection[count])) - { - (*TargetSection[count])->UnlinkParent(Section,true, count == 0); - } - } else if ((*TargetSection[count]) == NULL && JumpInfo[count]->FallThrough) { - if (JumpInfo[count]->LinkLocation != NULL) { - SetJump32(JumpInfo[count]->LinkLocation,RecompPos); - JumpInfo[count]->LinkLocation = NULL; - if (JumpInfo[count]->LinkLocation2 != NULL) { - SetJump32(JumpInfo[count]->LinkLocation2,RecompPos); - JumpInfo[count]->LinkLocation2 = NULL; - } - } - _N64System->GetRecompiler()->CompileExit (Section,Section->m_CompilePC, JumpInfo[count]->TargetPC,JumpInfo[count]->RegSet,CExitInfo::Normal,true,NULL); - JumpInfo[count]->FallThrough = false; - } else if ((*TargetSection[count]) != NULL && JumpInfo[count] != NULL) { - if (!JumpInfo[count]->FallThrough) { continue; } - if (JumpInfo[count]->TargetPC == (*TargetSection[count])->StartPC) { continue; } - if (JumpInfo[count]->LinkLocation != NULL) { - SetJump32(JumpInfo[count]->LinkLocation,RecompPos); - JumpInfo[count]->LinkLocation = NULL; - if (JumpInfo[count]->LinkLocation2 != NULL) { - SetJump32(JumpInfo[count]->LinkLocation2,RecompPos); - JumpInfo[count]->LinkLocation2 = NULL; - } - } - _N64System->GetRecompiler()->CompileExit (Section,Section->m_CompilePC, JumpInfo[count]->TargetPC,JumpInfo[count]->RegSet,CExitInfo::Normal,true,NULL); - //FreeSection((*TargetSection[count]),Section); - } - } - } else { - if (Section->Cont.LinkLocation == NULL && Section->Cont.FallThrough == false) { Section->ContinueSection = NULL; } - if (Section->Jump.LinkLocation == NULL && Section->Jump.FallThrough == false) { Section->JumpSection = NULL; } - if (Section->JumpSection == NULL && Section->ContinueSection == NULL) { - //FreeSection(TargetSection[0],Section); - } - } - - TargetSection[0] = &Section->ContinueSection; - TargetSection[1] = &Section->JumpSection; - - for (count = 0; count < 2; count ++) { - if ((*TargetSection[count]) == NULL) { continue; } - if (!JumpInfo[count]->FallThrough) { continue; } - - if ((*TargetSection[count])->CompiledLocation != NULL) { - char Label[100]; - sprintf(Label,"Section_%d",(*TargetSection[count])->SectionID); - JumpInfo[count]->FallThrough = false; - if (JumpInfo[count]->LinkLocation != NULL) { - SetJump32(JumpInfo[count]->LinkLocation,RecompPos); - JumpInfo[count]->LinkLocation = NULL; - if (JumpInfo[count]->LinkLocation2 != NULL) { - SetJump32(JumpInfo[count]->LinkLocation2,RecompPos); - JumpInfo[count]->LinkLocation2 = NULL; - } - } - if (JumpInfo[count]->TargetPC <= Section->m_CompilePC) { - if (JumpInfo[count]->PermLoop) { -CPU_Message("PermLoop *** 1"); - MoveConstToVariable(JumpInfo[count]->TargetPC,_PROGRAM_COUNTER,"PROGRAM_COUNTER"); - JumpInfo[count]->RegSet.BlockCycleCount() -= CountPerOp(); - _N64System->GetRecompiler()->UpdateCounters(&JumpInfo[count]->RegSet.BlockCycleCount(),&JumpInfo[count]->RegSet.BlockRandomModifier(), false); - Call_Direct(InPermLoop,"InPermLoop"); - JumpInfo[count]->RegSet.BlockCycleCount() += CountPerOp(); - _N64System->GetRecompiler()->UpdateCounters(&JumpInfo[count]->RegSet.BlockCycleCount(),&JumpInfo[count]->RegSet.BlockRandomModifier(), true); - _N64System->GetRecompiler()->CompileSystemCheck(-1,JumpInfo[count]->RegSet); - } else { - _N64System->GetRecompiler()->UpdateCounters(&JumpInfo[count]->RegSet.BlockCycleCount(), &JumpInfo[count]->RegSet.BlockRandomModifier(), true); - _N64System->GetRecompiler()->CompileSystemCheck(JumpInfo[count]->TargetPC,JumpInfo[count]->RegSet); - } - } else { - _N64System->GetRecompiler()->UpdateCounters(&JumpInfo[count]->RegSet.BlockCycleCount(), &JumpInfo[count]->RegSet.BlockRandomModifier(), false); - } - JumpInfo[count]->RegSet.BlockRandomModifier() = 0; - JumpInfo[count]->RegSet.BlockCycleCount() = 0; - Section->RegWorking = JumpInfo[count]->RegSet; - SyncRegState(Section,&(*TargetSection[count])->RegStart); - JmpLabel32(Label,0); - SetJump32((DWORD *)RecompPos - 1,(*TargetSection[count])->CompiledLocation); - } - } - //Section->BlockCycleCount() = 0; - //Section->BlockRandomModifier() = 0; - - for (count = 0; count < 2; count ++) { - if ((*TargetSection[count]) == NULL) { continue; } - if ((*TargetSection[count])->ParentSection.empty()) { continue; } - - for (SECTION_LIST::iterator iter = (*TargetSection[count])->ParentSection.begin(); iter != (*TargetSection[count])->ParentSection.end(); iter++) - { - CCodeSection * Parent = *iter; - - if (Parent->CompiledLocation != NULL) { continue; } - if (JumpInfo[count]->PermLoop) { - CPU_Message("PermLoop *** 2"); - MoveConstToVariable(JumpInfo[count]->TargetPC,_PROGRAM_COUNTER,"PROGRAM_COUNTER"); - JumpInfo[count]->RegSet.BlockCycleCount() -= CountPerOp(); - _N64System->GetRecompiler()->UpdateCounters(&JumpInfo[count]->RegSet.BlockCycleCount(),&JumpInfo[count]->RegSet.BlockRandomModifier(), false); - Call_Direct(InPermLoop,"InPermLoop"); - JumpInfo[count]->RegSet.BlockCycleCount() += CountPerOp(); - _N64System->GetRecompiler()->UpdateCounters(&JumpInfo[count]->RegSet.BlockCycleCount(),&JumpInfo[count]->RegSet.BlockRandomModifier(), true); - _N64System->GetRecompiler()->CompileSystemCheck(-1,JumpInfo[count]->RegSet); - } - if (JumpInfo[count]->FallThrough) { - JumpInfo[count]->FallThrough = false; - JmpLabel32(JumpInfo[count]->BranchLabel,0); - JumpInfo[count]->LinkLocation = RecompPos - 4; - } - } - } - - for (count = 0; count < 2; count ++) { - if (JumpInfo[count]->FallThrough) { - if (JumpInfo[count]->TargetPC < Section->m_CompilePC) { - _N64System->GetRecompiler()->UpdateCounters(&JumpInfo[count]->RegSet.BlockCycleCount(),&JumpInfo[count]->RegSet.BlockRandomModifier(),true); - _N64System->GetRecompiler()->CompileSystemCheck(JumpInfo[count]->TargetPC,JumpInfo[count]->RegSet); - } - } - } - - CPU_Message("====== End of Section %d ======",Section->SectionID); - - for (count = 0; count < 2; count ++) { - if (JumpInfo[count]->FallThrough) { - _N64System->GetRecompiler()->GenerateX86Code(*(Section->BlockInfo),(*TargetSection[count]),CCodeSection::GetNewTestValue()); - } - } - - //CPU_Message("Section %d",Section->SectionID); - for (count = 0; count < 2; count ++) { - if (JumpInfo[count]->LinkLocation == NULL) { continue; } - if ((*TargetSection[count]) == NULL) { - CPU_Message("ExitBlock (from %d):",Section->SectionID); - SetJump32(JumpInfo[count]->LinkLocation,RecompPos); - JumpInfo[count]->LinkLocation = NULL; - if (JumpInfo[count]->LinkLocation2 != NULL) { - SetJump32(JumpInfo[count]->LinkLocation2,RecompPos); - JumpInfo[count]->LinkLocation2 = NULL; - } - _N64System->GetRecompiler()->CompileExit (Section,Section->m_CompilePC,JumpInfo[count]->TargetPC,JumpInfo[count]->RegSet,CExitInfo::Normal,true,NULL); - continue; - } - if (JumpInfo[count]->TargetPC != (*TargetSection[count])->StartPC) { - DisplayError("I need to add more code in GenerateSectionLinkage cause this is going to cause an exception"); - BreakPoint(__FILE__,__LINE__); - } - if ((*TargetSection[count])->CompiledLocation == NULL) { - _N64System->GetRecompiler()->GenerateX86Code(*(*TargetSection[count])->BlockInfo,(*TargetSection[count]),CCodeSection::GetNewTestValue()); - } else { - char Label[100]; - - CPU_Message("Section_%d (from %d):",(*TargetSection[count])->SectionID,Section->SectionID); - SetJump32(JumpInfo[count]->LinkLocation,RecompPos); - JumpInfo[count]->LinkLocation = NULL; - if (JumpInfo[count]->LinkLocation2 != NULL) { - SetJump32(JumpInfo[count]->LinkLocation2,RecompPos); - JumpInfo[count]->LinkLocation2 = NULL; - } - Section->RegWorking = JumpInfo[count]->RegSet; - if (JumpInfo[count]->TargetPC <= Section->m_CompilePC) { - _N64System->GetRecompiler()->UpdateCounters(&JumpInfo[count]->RegSet.BlockCycleCount(),&JumpInfo[count]->RegSet.BlockRandomModifier(), true); - - if (JumpInfo[count]->PermLoop) { -CPU_Message("PermLoop *** 3"); - MoveConstToVariable(JumpInfo[count]->TargetPC,_PROGRAM_COUNTER,"PROGRAM_COUNTER"); - Call_Direct(InPermLoop,"InPermLoop"); - _N64System->GetRecompiler()->CompileSystemCheck(-1,JumpInfo[count]->RegSet); - } else { - _N64System->GetRecompiler()->CompileSystemCheck(JumpInfo[count]->TargetPC,JumpInfo[count]->RegSet); - } - } else{ - _N64System->GetRecompiler()->UpdateCounters(&JumpInfo[count]->RegSet.BlockCycleCount(),&JumpInfo[count]->RegSet.BlockRandomModifier(), false); - } - Section->RegWorking = JumpInfo[count]->RegSet; - SyncRegState(Section,&(*TargetSection[count])->RegStart); - JmpLabel32(Label,0); - SetJump32((DWORD *)RecompPos - 1,(*TargetSection[count])->CompiledLocation); - } - } -} +#ifdef tofix void CRecompiler::RemoveFunction (CCompiledFunc * FunInfo, bool DelaySlot, REMOVE_REASON Reason ) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix LPCSTR lpReason = "Unknown"; switch (Reason) { @@ -3617,6 +3174,8 @@ void CRecompiler::RemoveFunction (CCompiledFunc * FunInfo, bool DelaySlot, REMOV } } +#endif + /* TlbLog.Log("Clear %X",FunInfo->StartPC()); @@ -3934,4 +3493,6 @@ void CRecompiler::SyncRegState (CCodeSection * Section, CRegInfo * SyncTo) changed = FALSE; } } -} \ No newline at end of file +} + +#endif \ No newline at end of file diff --git a/Source/Project64/N64 System/Recompiler/Recompiler Class.h b/Source/Project64/N64 System/Recompiler/Recompiler Class.h index a59c1d2cb..932f76290 100644 --- a/Source/Project64/N64 System/Recompiler/Recompiler Class.h +++ b/Source/Project64/N64 System/Recompiler/Recompiler Class.h @@ -21,18 +21,14 @@ public: void Run ( void ); void ResetRecompCode ( void ); - void CompileSystemCheck (DWORD TargetPC, CRegInfo &RegSet); - void UpdateCounters ( DWORD * Cycles, DWORD * RandomMod, BOOL CheckTimer); - void CompileExit ( CCodeSection * Section, DWORD JumpPC, DWORD TargetPC, CRegInfo ExitRegSet, CExitInfo::EXIT_REASON reason, int CompileNow, void (*x86Jmp)(char * Label, DWORD Value)); - bool GenerateX86Code (CBlockInfo & BlockInfo, CCodeSection * Section, DWORD Test ); - void GenerateSectionLinkage (CCodeSection * Section); + bool GenerateX86Code (CCodeBlock & BlockInfo, CCodeSection * Section, DWORD Test ); //Self modifying code methods bool ClearRecompCode_Virt ( DWORD VirtualAddress, int length, REMOVE_REASON Reason ); bool ClearRecompCode_Phys ( DWORD PhysicalAddress, int length, REMOVE_REASON Reason ); private: - bool const m_SyncSystem; + bool const m_SyncSystem; CProfiling & m_Profile; bool & m_EndEmulation; @@ -47,12 +43,10 @@ private: CCompiledFunc * CompileDelaySlot ( DWORD PC ); bool Compiler4300iBlock ( CCompiledFunc * info ); - void CheckRecompMem ( void ); - // Compiling code - bool AnalyseBlock ( CBlockInfo & BlockInfo ); + bool AnalyseBlock ( CCodeBlock & BlockInfo ); bool CreateSectionLinkage ( CCodeSection * Section ); - void CompileExitCode ( CBlockInfo & BlockInfo ); + void CompileExitCode ( CCodeBlock & BlockInfo ); void DetermineLoop ( CCodeSection * Section, DWORD Test, DWORD Test2, DWORD TestID); bool DisplaySectionInformation (CCodeSection * Section, DWORD ID, DWORD Test); bool FixConstants ( CCodeSection * Section, DWORD Test ); diff --git a/Source/Project64/N64 System/Recompiler/Recompiler Memory.cpp b/Source/Project64/N64 System/Recompiler/Recompiler Memory.cpp index 04477aa8d..00189d590 100644 --- a/Source/Project64/N64 System/Recompiler/Recompiler Memory.cpp +++ b/Source/Project64/N64 System/Recompiler/Recompiler Memory.cpp @@ -1,9 +1,10 @@ #include "stdafx.h" CRecompMemory::CRecompMemory() : - m_RecompCode(0), + m_RecompCode(NULL), m_RecompSize(0) { + m_RecompPos = NULL; } CRecompMemory::~CRecompMemory() @@ -13,6 +14,7 @@ CRecompMemory::~CRecompMemory() VirtualFree( m_RecompCode, 0 , MEM_RELEASE); m_RecompCode = NULL; } + m_RecompPos = NULL; } bool CRecompMemory::AllocateMemory() @@ -31,6 +33,26 @@ bool CRecompMemory::AllocateMemory() return FALSE; } m_RecompSize = InitialCompileBufferSize; - + m_RecompPos = m_RecompCode; return true; -} \ No newline at end of file +} + +void CRecompMemory::CheckRecompMem ( void ) +{ + int Size = (int)((BYTE *)m_RecompPos - (BYTE *)m_RecompCode); + if ((Size + 0x20000) < m_RecompSize) + { + return; + } + if (m_RecompSize == MaxCompileBufferSize) + { + return; + } + LPVOID MemAddr = VirtualAlloc( m_RecompCode + m_RecompSize , IncreaseCompileBufferSize, MEM_COMMIT, PAGE_EXECUTE_READWRITE); + m_RecompSize += IncreaseCompileBufferSize; + + if (MemAddr == NULL) + { + _Notify->FatalError(MSG_MEM_ALLOC_ERROR); + } +} diff --git a/Source/Project64/N64 System/Recompiler/Recompiler Memory.h b/Source/Project64/N64 System/Recompiler/Recompiler Memory.h index 72e547629..27e2ab768 100644 --- a/Source/Project64/N64 System/Recompiler/Recompiler Memory.h +++ b/Source/Project64/N64 System/Recompiler/Recompiler Memory.h @@ -1,11 +1,16 @@ -class CRecompMemory +class CRecompMemory : + protected CX86Ops { protected: CRecompMemory(); ~CRecompMemory(); bool AllocateMemory ( void ); + void CheckRecompMem ( void ); + + inline BYTE * RecompPos ( void ) const { return m_RecompPos; } +private: BYTE * m_RecompCode; DWORD m_RecompSize; diff --git a/Source/Project64/N64 System/Recompiler/Recompiler Ops.cpp b/Source/Project64/N64 System/Recompiler/Recompiler Ops.cpp index fb208aaec..e0659f883 100644 --- a/Source/Project64/N64 System/Recompiler/Recompiler Ops.cpp +++ b/Source/Project64/N64 System/Recompiler/Recompiler Ops.cpp @@ -1,40 +1,56 @@ #include "stdafx.h" +CCodeSection * CRecompilerOps::m_Section = NULL; +CRegInfo CRecompilerOps::m_RegWorkingSet; +STEP_TYPE CRecompilerOps::m_NextInstruction; +DWORD CRecompilerOps::m_CompilePC; +OPCODE CRecompilerOps::m_Opcode; + + +void CRecompilerOps::CompileReadTLBMiss (CCodeSection * Section, int AddressReg, int LookUpReg ) +{ +#ifdef tofix + MoveX86regToVariable(AddressReg,&TLBLoadAddress,"TLBLoadAddress"); + TestX86RegToX86Reg(LookUpReg,LookUpReg); + _N64System->GetRecompiler()->CompileExit (m_Section,m_CompilePC, m_CompilePC,m_RegWorkingSet,CExitInfo::TLBReadMiss,FALSE,JeLabel32); +#endif +} + +void CRecompilerOps::CompileWriteTLBMiss (CCodeSection * Section, int AddressReg, int LookUpReg ) +{ +#ifdef tofix + MoveX86regToVariable(AddressReg,&TLBStoreAddress,"TLBStoreAddress"); + TestX86RegToX86Reg(LookUpReg,LookUpReg); + _N64System->GetRecompiler()->CompileExit (m_Section,m_CompilePC, m_CompilePC,m_RegWorkingSet,CExitInfo::TLBReadMiss,FALSE,JeLabel32); +#endif +} + #ifdef tofix DWORD BranchCompare = 0; -/* -void CompileReadTLBMiss (int AddressReg, int LookUpReg ) { - MoveX86regToVariable(AddressReg,&TLBLoadAddress,"TLBLoadAddress"); - TestX86RegToX86Reg(LookUpReg,LookUpReg); - _N64System->GetRecompiler()->CompileExit (m_Section,m_Section->CompilePC, m_Section->CompilePC,m_Section->RegWorking,CExitInfo::TLBReadMiss,FALSE,JeLabel32); -} -void CompileWriteTLBMiss (int AddressReg, int LookUpReg ) -{ - MoveX86regToVariable(AddressReg,&TLBStoreAddress,"TLBStoreAddress"); - TestX86RegToX86Reg(LookUpReg,LookUpReg); - _N64System->GetRecompiler()->CompileExit (m_Section,m_Section->CompilePC, m_Section->CompilePC,m_Section->RegWorking,CExitInfo::TLBReadMiss,FALSE,JeLabel32); -} -*/ +#endif + +int DelaySlotEffectsCompare ( DWORD PC, DWORD Reg1, DWORD Reg2 ); + /************************** Branch functions ************************/ -void CRecompilerOps::Compile_Branch (BranchFunction CompareFunc, BRANCH_TYPE BranchType, BOOL Link) +void CRecompilerOps::Compile_Branch (CRecompilerOps::BranchFunction CompareFunc, BRANCH_TYPE BranchType, BOOL Link) { static int EffectDelaySlot, DoneJumpDelay, DoneContinueDelay; static char ContLabel[100], JumpLabel[100]; static CRegInfo RegBeforeDelay; - if ( NextInstruction == NORMAL ) { - CPU_Message(" %X %s",m_Section->CompilePC,R4300iOpcodeName(Opcode.Hex,m_Section->CompilePC)); + if ( m_NextInstruction == NORMAL ) { + CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC)); - if ((m_Section->CompilePC & 0xFFC) != 0xFFC) { + if ((m_CompilePC & 0xFFC) != 0xFFC) { switch (BranchType) { - case BranchTypeRs: EffectDelaySlot = DelaySlotEffectsCompare(m_Section->CompilePC,Opcode.rs,0); break; - case BranchTypeRsRt: EffectDelaySlot = DelaySlotEffectsCompare(m_Section->CompilePC,Opcode.rs,Opcode.rt); break; + case BranchTypeRs: EffectDelaySlot = DelaySlotEffectsCompare(m_CompilePC,m_Opcode.rs,0); break; + case BranchTypeRsRt: EffectDelaySlot = DelaySlotEffectsCompare(m_CompilePC,m_Opcode.rs,m_Opcode.rt); break; case BranchTypeCop1: { OPCODE Command; - if (!_MMU ->LW_VAddr(m_Section->CompilePC + 4, Command.Hex)) { + if (!_MMU ->LW_VAddr(m_CompilePC + 4, Command.Hex)) { DisplayError(GS(MSG_FAIL_LOAD_WORD)); ExitThread(0); } @@ -58,106 +74,108 @@ void CRecompilerOps::Compile_Branch (BranchFunction CompareFunc, BRANCH_TYPE Bra } else { EffectDelaySlot = TRUE; } - if (m_Section->ContinueSection != NULL) { - sprintf(ContLabel,"Section_%d",((CCodeSection *)m_Section->ContinueSection)->SectionID); + if (m_Section->m_ContinueSection != NULL) { + sprintf(ContLabel,"Section_%d",((CCodeSection *)m_Section->m_ContinueSection)->m_SectionID); } else { - strcpy(ContLabel,"Cont.LinkLocationinue"); + strcpy(ContLabel,"Cont.LinkLocation"); } - if (m_Section->JumpSection != NULL) { - sprintf(JumpLabel,"Section_%d",((CCodeSection *)m_Section->JumpSection)->SectionID); + if (m_Section->m_JumpSection != NULL) { + sprintf(JumpLabel,"Section_%d",((CCodeSection *)m_Section->m_JumpSection)->m_SectionID); } else { strcpy(JumpLabel,"Jump.LinkLocation"); } - m_Section->Jump.TargetPC = m_Section->CompilePC + ((short)Opcode.offset << 2) + 4; - m_Section->Jump.BranchLabel = JumpLabel; - m_Section->Jump.LinkLocation = NULL; - m_Section->Jump.LinkLocation2 = NULL; - m_Section->Jump.DoneDelaySlot = FALSE; - m_Section->Cont.TargetPC = m_Section->CompilePC + 8; - m_Section->Cont.BranchLabel = ContLabel; - m_Section->Cont.LinkLocation = NULL; - m_Section->Cont.LinkLocation2 = NULL; - m_Section->Cont.DoneDelaySlot = FALSE; - if (m_Section->Jump.TargetPC < m_Section->Cont.TargetPC) { - m_Section->Cont.FallThrough = FALSE; - m_Section->Jump.FallThrough = TRUE; + m_Section->m_Jump.TargetPC = m_CompilePC + ((short)m_Opcode.offset << 2) + 4; + m_Section->m_Jump.BranchLabel = JumpLabel; + m_Section->m_Jump.LinkLocation = NULL; + m_Section->m_Jump.LinkLocation2 = NULL; + m_Section->m_Jump.DoneDelaySlot = FALSE; + m_Section->m_Cont.TargetPC = m_CompilePC + 8; + m_Section->m_Cont.BranchLabel = ContLabel; + m_Section->m_Cont.LinkLocation = NULL; + m_Section->m_Cont.LinkLocation2 = NULL; + m_Section->m_Cont.DoneDelaySlot = FALSE; + if (m_Section->m_Jump.TargetPC < m_Section->m_Cont.TargetPC) { + m_Section->m_Cont.FallThrough = FALSE; + m_Section->m_Jump.FallThrough = TRUE; } else { - m_Section->Cont.FallThrough = TRUE; - m_Section->Jump.FallThrough = FALSE; + m_Section->m_Cont.FallThrough = TRUE; + m_Section->m_Jump.FallThrough = FALSE; } if (Link) { - UnMap_GPR(m_Section, 31, FALSE); - m_Section->MipsRegLo(31) = m_Section->CompilePC + 8; - m_Section->MipsRegState(31) = CRegInfo::STATE_CONST_32; + UnMap_GPR( 31, FALSE); + MipsRegLo(31) = m_CompilePC + 8; + MipsRegState(31) = CRegInfo::STATE_CONST_32; } if (EffectDelaySlot) { - if (m_Section->ContinueSection != NULL) { - sprintf(ContLabel,"Continue",((CCodeSection *)m_Section->ContinueSection)->SectionID); + if (m_Section->m_ContinueSection != NULL) { + sprintf(ContLabel,"Continue",((CCodeSection *)m_Section->m_ContinueSection)->m_SectionID); } else { strcpy(ContLabel,"ExitBlock"); } - if (m_Section->JumpSection != NULL) { - sprintf(JumpLabel,"Jump",((CCodeSection *)m_Section->JumpSection)->SectionID); + if (m_Section->m_JumpSection != NULL) { + sprintf(JumpLabel,"Jump",((CCodeSection *)m_Section->m_JumpSection)->m_SectionID); } else { strcpy(JumpLabel,"ExitBlock"); } - CompareFunc(m_Section); + CompareFunc(); - if ((m_Section->CompilePC & 0xFFC) == 0xFFC) { - _N64System->GetRecompiler()->GenerateSectionLinkage(m_Section); - NextInstruction = END_BLOCK; + if ((m_CompilePC & 0xFFC) == 0xFFC) { + m_Section->GenerateSectionLinkage(); + m_NextInstruction = END_BLOCK; return; } - if (!m_Section->Jump.FallThrough && !m_Section->Cont.FallThrough) { - if (m_Section->Jump.LinkLocation != NULL) { + if (!m_Section->m_Jump.FallThrough && !m_Section->m_Cont.FallThrough) { + if (m_Section->m_Jump.LinkLocation != NULL) { CPU_Message(""); - CPU_Message(" %s:",m_Section->Jump.BranchLabel); - SetJump32((DWORD *)m_Section->Jump.LinkLocation,(DWORD *)RecompPos); - m_Section->Jump.LinkLocation = NULL; - if (m_Section->Jump.LinkLocation2 != NULL) { - SetJump32((DWORD *)m_Section->Jump.LinkLocation2,(DWORD *)RecompPos); - m_Section->Jump.LinkLocation2 = NULL; + CPU_Message(" %s:",m_Section->m_Jump.BranchLabel); + SetJump32((DWORD *)m_Section->m_Jump.LinkLocation,(DWORD *)m_RecompPos); + m_Section->m_Jump.LinkLocation = NULL; + if (m_Section->m_Jump.LinkLocation2 != NULL) { + SetJump32((DWORD *)m_Section->m_Jump.LinkLocation2,(DWORD *)m_RecompPos); + m_Section->m_Jump.LinkLocation2 = NULL; } - m_Section->Jump.FallThrough = TRUE; - } else if (m_Section->Cont.LinkLocation != NULL){ + m_Section->m_Jump.FallThrough = TRUE; + } else if (m_Section->m_Cont.LinkLocation != NULL){ CPU_Message(""); - CPU_Message(" %s:",m_Section->Cont.BranchLabel); - SetJump32((DWORD *)m_Section->Cont.LinkLocation,(DWORD *)RecompPos); - m_Section->Cont.LinkLocation = NULL; - if (m_Section->Cont.LinkLocation2 != NULL) { - SetJump32((DWORD *)m_Section->Cont.LinkLocation2,(DWORD *)RecompPos); - m_Section->Cont.LinkLocation2 = NULL; + CPU_Message(" %s:",m_Section->m_Cont.BranchLabel); + SetJump32((DWORD *)m_Section->m_Cont.LinkLocation,(DWORD *)m_RecompPos); + m_Section->m_Cont.LinkLocation = NULL; + if (m_Section->m_Cont.LinkLocation2 != NULL) { + SetJump32((DWORD *)m_Section->m_Cont.LinkLocation2,(DWORD *)m_RecompPos); + m_Section->m_Cont.LinkLocation2 = NULL; } - m_Section->Cont.FallThrough = TRUE; + m_Section->m_Cont.FallThrough = TRUE; } } m_Section->ResetX86Protection(); - memcpy(&RegBeforeDelay,&m_Section->RegWorking,sizeof(CRegInfo)); + memcpy(&RegBeforeDelay,&m_RegWorkingSet,sizeof(CRegInfo)); } - NextInstruction = DO_DELAY_SLOT; - } else if (NextInstruction == DELAY_SLOT_DONE ) { + m_NextInstruction = DO_DELAY_SLOT; + } else if (m_NextInstruction == DELAY_SLOT_DONE ) { if (EffectDelaySlot) { - CJumpInfo * FallInfo = m_Section->Jump.FallThrough?&m_Section->Jump:&m_Section->Cont; - CJumpInfo * JumpInfo = m_Section->Jump.FallThrough?&m_Section->Cont:&m_Section->Jump; + CJumpInfo * FallInfo = m_Section->m_Jump.FallThrough?&m_Section->m_Jump:&m_Section->m_Cont; + CJumpInfo * JumpInfo = m_Section->m_Jump.FallThrough?&m_Section->m_Cont:&m_Section->m_Jump; if (FallInfo->FallThrough && !FallInfo->DoneDelaySlot) { m_Section->ResetX86Protection(); - FallInfo->RegSet = m_Section->RegWorking; - if (FallInfo == &m_Section->Jump) { - if (m_Section->JumpSection != NULL) { - sprintf(JumpLabel,"Section_%d",((CCodeSection *)m_Section->JumpSection)->SectionID); + FallInfo->RegSet = m_RegWorkingSet; + if (FallInfo == &m_Section->m_Jump) { + if (m_Section->m_JumpSection != NULL) { + sprintf(JumpLabel,"Section_%d",((CCodeSection *)m_Section->m_JumpSection)->m_SectionID); } else { strcpy(JumpLabel,"ExitBlock"); } - if (FallInfo->TargetPC <= m_Section->CompilePC) + if (FallInfo->TargetPC <= m_CompilePC) { - _N64System->GetRecompiler()->UpdateCounters(&(FallInfo->RegSet.BlockCycleCount()),&(FallInfo->RegSet.BlockRandomModifier()),true); - _N64System->GetRecompiler()->CompileSystemCheck(FallInfo->TargetPC,FallInfo->RegSet); +#ifdef tofix + UpdateCounters(&(FallInfo->RegSet.BlockCycleCount()),&(FallInfo->RegSet.BlockRandomModifier()),true); + m_Section->CompileSystemCheck(FallInfo->TargetPC,FallInfo->RegSet); m_Section->ResetX86Protection(); +#endif } } else { - if (m_Section->ContinueSection != NULL) { - sprintf(ContLabel,"Section_%d",((CCodeSection *)m_Section->ContinueSection)->SectionID); + if (m_Section->m_ContinueSection != NULL) { + sprintf(ContLabel,"Section_%d",((CCodeSection *)m_Section->m_ContinueSection)->m_SectionID); } else { strcpy(ContLabel,"ExitBlock"); } @@ -166,1287 +184,1312 @@ void CRecompilerOps::Compile_Branch (BranchFunction CompareFunc, BRANCH_TYPE Bra if (!JumpInfo->DoneDelaySlot) { FallInfo->FallThrough = FALSE; JmpLabel32(FallInfo->BranchLabel,0); - FallInfo->LinkLocation = RecompPos - 4; + FallInfo->LinkLocation = (DWORD *)(m_RecompPos - 4); if (JumpInfo->LinkLocation != NULL) { CPU_Message(" %s:",JumpInfo->BranchLabel); - SetJump32((DWORD *)JumpInfo->LinkLocation,(DWORD *)RecompPos); + SetJump32((DWORD *)JumpInfo->LinkLocation,(DWORD *)m_RecompPos); JumpInfo->LinkLocation = NULL; if (JumpInfo->LinkLocation2 != NULL) { - SetJump32((DWORD *)JumpInfo->LinkLocation2,(DWORD *)RecompPos); + SetJump32((DWORD *)JumpInfo->LinkLocation2,(DWORD *)m_RecompPos); JumpInfo->LinkLocation2 = NULL; } JumpInfo->FallThrough = TRUE; - NextInstruction = DO_DELAY_SLOT; - memcpy(&m_Section->RegWorking,&RegBeforeDelay,sizeof(CRegInfo)); + m_NextInstruction = DO_DELAY_SLOT; + memcpy(&m_RegWorkingSet,&RegBeforeDelay,sizeof(CRegInfo)); return; } } } } else { - CompareFunc(m_Section); + CompareFunc(); m_Section->ResetX86Protection(); - memcpy(&m_Section->Cont.RegSet,&m_Section->RegWorking,sizeof(CRegInfo)); - memcpy(&m_Section->Jump.RegSet,&m_Section->RegWorking,sizeof(CRegInfo)); + memcpy(&m_Section->m_Cont.RegSet,&m_RegWorkingSet,sizeof(CRegInfo)); + memcpy(&m_Section->m_Jump.RegSet,&m_RegWorkingSet,sizeof(CRegInfo)); } - _N64System->GetRecompiler()->GenerateSectionLinkage(m_Section); - NextInstruction = END_BLOCK; + m_Section->GenerateSectionLinkage(); + m_NextInstruction = END_BLOCK; } else { #ifndef EXTERNAL_RELEASE - DisplayError("WTF\n\nBranch\nNextInstruction = %X", NextInstruction); + DisplayError("WTF\n\nBranch\nNextInstruction = %X", m_NextInstruction); #endif } } -void CRecompilerOps::Compile_BranchLikely (void (*CompareFunc)(CCodeSection * m_Section), BOOL Link) { +void CRecompilerOps::Compile_BranchLikely (BranchFunction CompareFunc, BOOL Link) +{ + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix static char ContLabel[100], JumpLabel[100]; - if ( NextInstruction == NORMAL ) { - CPU_Message(" %X %s",m_Section->CompilePC,R4300iOpcodeName(Opcode.Hex,m_Section->CompilePC)); + if ( m_NextInstruction == NORMAL ) { + CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC)); - if (m_Section->ContinueSection != NULL) { - sprintf(ContLabel,"Section_%d",((CCodeSection *)m_Section->ContinueSection)->SectionID); + if (m_Section->m_ContinueSection != NULL) { + sprintf(ContLabel,"Section_%d",((CCodeSection *)m_Section->m_ContinueSection)->m_SectionID); } else { strcpy(ContLabel,"ExitBlock"); } - if (m_Section->JumpSection != NULL) { - sprintf(JumpLabel,"Section_%d",((CCodeSection *)m_Section->JumpSection)->SectionID); + if (m_Section->m_JumpSection != NULL) { + sprintf(JumpLabel,"Section_%d",((CCodeSection *)m_Section->m_JumpSection)->m_SectionID); } else { strcpy(JumpLabel,"ExitBlock"); } - m_Section->Jump.TargetPC = m_Section->CompilePC + ((short)Opcode.offset << 2) + 4; - m_Section->Jump.BranchLabel = JumpLabel; - m_Section->Jump.FallThrough = TRUE; - m_Section->Jump.LinkLocation = NULL; - m_Section->Jump.LinkLocation2 = NULL; - m_Section->Cont.TargetPC = m_Section->CompilePC + 8; - m_Section->Cont.BranchLabel = ContLabel; - m_Section->Cont.FallThrough = FALSE; - m_Section->Cont.LinkLocation = NULL; - m_Section->Cont.LinkLocation2 = NULL; + m_Section->m_Jump.TargetPC = m_CompilePC + ((short)m_Opcode.offset << 2) + 4; + m_Section->m_Jump.BranchLabel = JumpLabel; + m_Section->m_Jump.FallThrough = TRUE; + m_Section->m_Jump.LinkLocation = NULL; + m_Section->m_Jump.LinkLocation2 = NULL; + m_Section->m_Cont.TargetPC = m_CompilePC + 8; + m_Section->m_Cont.BranchLabel = ContLabel; + m_Section->m_Cont.FallThrough = FALSE; + m_Section->m_Cont.LinkLocation = NULL; + m_Section->m_Cont.LinkLocation2 = NULL; if (Link) { - UnMap_GPR(m_Section, 31, FALSE); - m_Section->MipsRegLo(31) = m_Section->CompilePC + 8; - m_Section->MipsRegState(31) = CRegInfo::STATE_CONST_32; + UnMap_GPR( 31, FALSE); + cMipsRegLo(31) = m_CompilePC + 8; + MipsRegState(31) = CRegInfo::STATE_CONST_32; } CompareFunc(m_Section); m_Section->ResetX86Protection(); - memcpy(&m_Section->Cont.RegSet,&m_Section->RegWorking,sizeof(CRegInfo)); - if (UseLinking && m_Section->Jump.TargetPC == m_Section->Cont.TargetPC) + memcpy(&m_Section->m_Cont.RegSet,&m_RegWorkingSet,sizeof(CRegInfo)); + if (UseLinking && m_Section->m_Jump.TargetPC == m_Section->m_Cont.TargetPC) { - if (m_Section->Cont.FallThrough) + if (m_Section->m_Cont.FallThrough) { BreakPoint(__FILE__,__LINE__); } - if (!m_Section->Jump.FallThrough) + if (!m_Section->m_Jump.FallThrough) { BreakPoint(__FILE__,__LINE__); } - m_Section->JumpSection->Cont.TargetPC = m_Section->Jump.TargetPC; - m_Section->JumpSection->DelaySlotSection = true; - m_Section->Jump.TargetPC = m_Section->CompilePC + 4; - m_Section->Jump.RegSet = m_Section->RegWorking; + m_Section->m_JumpSection->m_Cont.TargetPC = m_Section->m_Jump.TargetPC; + m_Section->m_JumpSection->DelaySlotSection = true; + m_Section->m_Jump.TargetPC = m_CompilePC + 4; + m_Section->m_Jump.RegSet = m_RegWorkingSet; _N64System->GetRecompiler()->GenerateSectionLinkage(m_Section); - NextInstruction = END_BLOCK; + m_NextInstruction = END_BLOCK; } else { - if (m_Section->Cont.FallThrough) { - if (m_Section->Jump.LinkLocation != NULL) { + if (m_Section->m_Cont.FallThrough) { + if (m_Section->m_Jump.LinkLocation != NULL) { #ifndef EXTERNAL_RELEASE - DisplayError("WTF .. problem with CRecompilerOps::Compile_BranchLikely"); + DisplayError("WTF .. problem with CRecompilerOps::BranchLikely"); #endif } _N64System->GetRecompiler()->GenerateSectionLinkage(m_Section); - NextInstruction = END_BLOCK; + m_NextInstruction = END_BLOCK; } else { - if ((m_Section->CompilePC & 0xFFC) == 0xFFC) { - m_Section->Jump.FallThrough = FALSE; - if (m_Section->Jump.LinkLocation != NULL) { - SetJump32(m_Section->Jump.LinkLocation,RecompPos); - m_Section->Jump.LinkLocation = NULL; - if (m_Section->Jump.LinkLocation2 != NULL) { - SetJump32(m_Section->Jump.LinkLocation2,RecompPos); - m_Section->Jump.LinkLocation2 = NULL; + if ((m_CompilePC & 0xFFC) == 0xFFC) { + m_Section->m_Jump.FallThrough = FALSE; + if (m_Section->m_Jump.LinkLocation != NULL) { + SetJump32(m_Section->m_Jump.LinkLocation,m_RecompPos); + m_Section->m_Jump.LinkLocation = NULL; + if (m_Section->m_Jump.LinkLocation2 != NULL) { + SetJump32(m_Section->m_Jump.LinkLocation2,m_RecompPos); + m_Section->m_Jump.LinkLocation2 = NULL; } } JmpLabel32("DoDelaySlot",0); - m_Section->Jump.LinkLocation = RecompPos - 4; + m_Section->m_Jump.LinkLocation = (DWORD *)(m_RecompPos - 4); CPU_Message(" "); - CPU_Message(" %s:",m_Section->Cont.BranchLabel); - if (m_Section->Cont.LinkLocation != NULL) { - SetJump32(m_Section->Cont.LinkLocation,RecompPos); - m_Section->Cont.LinkLocation = NULL; - if (m_Section->Cont.LinkLocation2 != NULL) { - SetJump32(m_Section->Cont.LinkLocation2,RecompPos); - m_Section->Cont.LinkLocation2 = NULL; + CPU_Message(" %s:",m_Section->m_Cont.BranchLabel); + if (m_Section->m_Cont.LinkLocation != NULL) { + SetJump32(m_Section->m_Cont.LinkLocation,m_RecompPos); + m_Section->m_Cont.LinkLocation = NULL; + if (m_Section->m_Cont.LinkLocation2 != NULL) { + SetJump32(m_Section->m_Cont.LinkLocation2,m_RecompPos); + m_Section->m_Cont.LinkLocation2 = NULL; } } - _N64System->GetRecompiler()->CompileExit (m_Section,m_Section->CompilePC, m_Section->CompilePC + 8,m_Section->RegWorking,CExitInfo::Normal,TRUE,NULL); + _N64System->GetRecompiler()->CompileExit (m_Section,m_CompilePC, m_CompilePC + 8,m_RegWorkingSet,CExitInfo::Normal,TRUE,NULL); CPU_Message(" "); CPU_Message(" DoDelaySlot"); _N64System->GetRecompiler()->GenerateSectionLinkage(m_Section); - NextInstruction = END_BLOCK; + m_NextInstruction = END_BLOCK; } else { - NextInstruction = DO_DELAY_SLOT; + m_NextInstruction = DO_DELAY_SLOT; } } } - } else if (NextInstruction == DELAY_SLOT_DONE ) { + } else if (m_NextInstruction == DELAY_SLOT_DONE ) { m_Section->ResetX86Protection(); - memcpy(&m_Section->Jump.RegSet,&m_Section->RegWorking,sizeof(CRegInfo)); + memcpy(&m_Section->m_Jump.RegSet,&m_RegWorkingSet,sizeof(CRegInfo)); _N64System->GetRecompiler()->GenerateSectionLinkage(m_Section); - NextInstruction = END_BLOCK; + m_NextInstruction = END_BLOCK; } else { #ifndef EXTERNAL_RELEASE - DisplayError("WTF\n\nBranchLikely\nNextInstruction = %X", NextInstruction); + DisplayError("WTF\n\nBranchLikely\nNextInstruction = %X", m_NextInstruction); #endif } +#endif } -void BNE_Compare (CCodeSection * m_Section) { +void CRecompilerOps::BNE_Compare (void) +{ BYTE *Jump; - if (m_Section->IsKnown(Opcode.rs) && m_Section->IsKnown(Opcode.rt)) { - if (m_Section->IsConst(Opcode.rs) && m_Section->IsConst(Opcode.rt)) { - if (m_Section->Is64Bit(Opcode.rs) || m_Section->Is64Bit(Opcode.rt)) { - CRecompilerOps::Compile_UnknownOpcode(m_Section); - } else if (m_Section->MipsRegLo(Opcode.rs) != m_Section->MipsRegLo(Opcode.rt)) { - m_Section->Jump.FallThrough = TRUE; - m_Section->Cont.FallThrough = FALSE; + if (m_Section->IsKnown(m_Opcode.rs) && m_Section->IsKnown(m_Opcode.rt)) { + if (IsConst(m_Opcode.rs) && IsConst(m_Opcode.rt)) { + if (m_Section->Is64Bit(m_Opcode.rs) || m_Section->Is64Bit(m_Opcode.rt)) { + CRecompilerOps::UnknownOpcode(); + } else if (cMipsRegLo(m_Opcode.rs) != cMipsRegLo(m_Opcode.rt)) { + m_Section->m_Jump.FallThrough = TRUE; + m_Section->m_Cont.FallThrough = FALSE; } else { - m_Section->Jump.FallThrough = FALSE; - m_Section->Cont.FallThrough = TRUE; + m_Section->m_Jump.FallThrough = FALSE; + m_Section->m_Cont.FallThrough = TRUE; } - } else if (m_Section->IsMapped(Opcode.rs) && m_Section->IsMapped(Opcode.rt)) { - if (m_Section->Is64Bit(Opcode.rs) || m_Section->Is64Bit(Opcode.rt)) { - ProtectGPR(m_Section,Opcode.rs); - ProtectGPR(m_Section,Opcode.rt); + } else if (IsMapped(m_Opcode.rs) && IsMapped(m_Opcode.rt)) { + if (m_Section->Is64Bit(m_Opcode.rs) || m_Section->Is64Bit(m_Opcode.rt)) { + ProtectGPR(m_Opcode.rs); + ProtectGPR(m_Opcode.rt); CompX86RegToX86Reg( - m_Section->Is32Bit(Opcode.rs)?Map_TempReg(m_Section,x86_Any,Opcode.rs,TRUE):m_Section->MipsRegHi(Opcode.rs), - m_Section->Is32Bit(Opcode.rt)?Map_TempReg(m_Section,x86_Any,Opcode.rt,TRUE):m_Section->MipsRegHi(Opcode.rt) + m_Section->Is32Bit(m_Opcode.rs)?m_Section->Map_TempReg(x86_Any,m_Opcode.rs,TRUE):m_Section->MipsRegMapHi(m_Opcode.rs), + m_Section->Is32Bit(m_Opcode.rt)?m_Section->Map_TempReg(x86_Any,m_Opcode.rt,TRUE):m_Section->MipsRegMapHi(m_Opcode.rt) ); - if (m_Section->Jump.FallThrough) { + if (m_Section->m_Jump.FallThrough) { JneLabel8("continue",0); - Jump = RecompPos - 1; + Jump = m_RecompPos - 1; } else { - JneLabel32(m_Section->Jump.BranchLabel,0); - m_Section->Jump.LinkLocation = RecompPos - 4; + JneLabel32(m_Section->m_Jump.BranchLabel,0); + m_Section->m_Jump.LinkLocation = (DWORD *)(m_RecompPos - 4); } - CompX86RegToX86Reg(m_Section->MipsRegLo(Opcode.rs),m_Section->MipsRegLo(Opcode.rt)); - if (m_Section->Cont.FallThrough) { - JneLabel32 ( m_Section->Jump.BranchLabel, 0 ); - m_Section->Jump.LinkLocation2 = RecompPos - 4; - } else if (m_Section->Jump.FallThrough) { - JeLabel32 ( m_Section->Cont.BranchLabel, 0 ); - m_Section->Cont.LinkLocation = RecompPos - 4; + CompX86RegToX86Reg(cMipsRegMapLo(m_Opcode.rs),cMipsRegMapLo(m_Opcode.rt)); + if (m_Section->m_Cont.FallThrough) { + JneLabel32 ( m_Section->m_Jump.BranchLabel, 0 ); + m_Section->m_Jump.LinkLocation2 = (DWORD *)(m_RecompPos - 4); + } else if (m_Section->m_Jump.FallThrough) { + JeLabel32 ( m_Section->m_Cont.BranchLabel, 0 ); + m_Section->m_Cont.LinkLocation = (DWORD *)(m_RecompPos - 4); CPU_Message(" "); CPU_Message(" continue:"); - SetJump8(Jump,RecompPos); + SetJump8(Jump,m_RecompPos); } else { - JeLabel32 ( m_Section->Cont.BranchLabel, 0 ); - m_Section->Cont.LinkLocation = RecompPos - 4; - JmpLabel32(m_Section->Jump.BranchLabel,0); - m_Section->Jump.LinkLocation2 = RecompPos - 4; + JeLabel32 ( m_Section->m_Cont.BranchLabel, 0 ); + m_Section->m_Cont.LinkLocation = (DWORD *)(m_RecompPos - 4); + JmpLabel32(m_Section->m_Jump.BranchLabel,0); + m_Section->m_Jump.LinkLocation2 = (DWORD *)(m_RecompPos - 4); } } else { - CompX86RegToX86Reg(m_Section->MipsRegLo(Opcode.rs),m_Section->MipsRegLo(Opcode.rt)); - if (m_Section->Cont.FallThrough) { - JneLabel32 ( m_Section->Jump.BranchLabel, 0 ); - m_Section->Jump.LinkLocation = RecompPos - 4; - } else if (m_Section->Jump.FallThrough) { - JeLabel32 ( m_Section->Cont.BranchLabel, 0 ); - m_Section->Cont.LinkLocation = RecompPos - 4; + CompX86RegToX86Reg(cMipsRegMapLo(m_Opcode.rs),cMipsRegMapLo(m_Opcode.rt)); + if (m_Section->m_Cont.FallThrough) { + JneLabel32 ( m_Section->m_Jump.BranchLabel, 0 ); + m_Section->m_Jump.LinkLocation = (DWORD *)(m_RecompPos - 4); + } else if (m_Section->m_Jump.FallThrough) { + JeLabel32 ( m_Section->m_Cont.BranchLabel, 0 ); + m_Section->m_Cont.LinkLocation = (DWORD *)(m_RecompPos - 4); } else { - JeLabel32 ( m_Section->Cont.BranchLabel, 0 ); - m_Section->Cont.LinkLocation = RecompPos - 4; - JmpLabel32(m_Section->Jump.BranchLabel,0); - m_Section->Jump.LinkLocation = RecompPos - 4; + JeLabel32 ( m_Section->m_Cont.BranchLabel, 0 ); + m_Section->m_Cont.LinkLocation = (DWORD *)(m_RecompPos - 4); + JmpLabel32(m_Section->m_Jump.BranchLabel,0); + m_Section->m_Jump.LinkLocation = (DWORD *)(m_RecompPos - 4); } } } else { - DWORD ConstReg = m_Section->IsConst(Opcode.rt)?Opcode.rt:Opcode.rs; - DWORD MappedReg = m_Section->IsConst(Opcode.rt)?Opcode.rs:Opcode.rt; + DWORD ConstReg = IsConst(m_Opcode.rt)?m_Opcode.rt:m_Opcode.rs; + DWORD MappedReg = IsConst(m_Opcode.rt)?m_Opcode.rs:m_Opcode.rt; if (m_Section->Is64Bit(ConstReg) || m_Section->Is64Bit(MappedReg)) { if (m_Section->Is32Bit(ConstReg) || m_Section->Is32Bit(MappedReg)) { - ProtectGPR(m_Section,MappedReg); + ProtectGPR(MappedReg); if (m_Section->Is32Bit(MappedReg)) { - CompConstToX86reg(Map_TempReg(m_Section,x86_Any,MappedReg,TRUE),m_Section->MipsRegHi(ConstReg)); + CompConstToX86reg(m_Section->Map_TempReg(x86_Any,MappedReg,TRUE),MipsRegHi(ConstReg)); } else { - CompConstToX86reg(m_Section->MipsRegHi(MappedReg),(int)m_Section->MipsRegLo(ConstReg) >> 31); + CompConstToX86reg(m_Section->MipsRegMapHi(MappedReg),(int)cMipsRegMapLo(ConstReg) >> 31); } } else { - CompConstToX86reg(m_Section->MipsRegHi(MappedReg),m_Section->MipsRegHi(ConstReg)); + CompConstToX86reg(m_Section->MipsRegMapHi(MappedReg),MipsRegHi(ConstReg)); } - if (m_Section->Jump.FallThrough) { + if (m_Section->m_Jump.FallThrough) { JneLabel8("continue",0); - Jump = RecompPos - 1; + Jump = m_RecompPos - 1; } else { - JneLabel32(m_Section->Jump.BranchLabel,0); - m_Section->Jump.LinkLocation = RecompPos - 4; + JneLabel32(m_Section->m_Jump.BranchLabel,0); + m_Section->m_Jump.LinkLocation = (DWORD *)(m_RecompPos - 4); } - if (m_Section->MipsRegLo(ConstReg) == 0) { - OrX86RegToX86Reg(m_Section->MipsRegLo(MappedReg),m_Section->MipsRegLo(MappedReg)); - } else { - CompConstToX86reg(m_Section->MipsRegLo(MappedReg),m_Section->MipsRegLo(ConstReg)); - } - if (m_Section->Cont.FallThrough) { - JneLabel32 ( m_Section->Jump.BranchLabel, 0 ); - m_Section->Jump.LinkLocation2 = RecompPos - 4; - } else if (m_Section->Jump.FallThrough) { - JeLabel32 ( m_Section->Cont.BranchLabel, 0 ); - m_Section->Cont.LinkLocation = RecompPos - 4; + CompConstToX86reg(cMipsRegMapLo(MappedReg),cMipsRegLo(ConstReg)); + if (m_Section->m_Cont.FallThrough) { + JneLabel32 ( m_Section->m_Jump.BranchLabel, 0 ); + m_Section->m_Jump.LinkLocation2 = (DWORD *)(m_RecompPos - 4); + } else if (m_Section->m_Jump.FallThrough) { + JeLabel32 ( m_Section->m_Cont.BranchLabel, 0 ); + m_Section->m_Cont.LinkLocation = (DWORD *)(m_RecompPos - 4); CPU_Message(" "); CPU_Message(" continue:"); - SetJump8(Jump,RecompPos); + SetJump8(Jump,m_RecompPos); } else { - JeLabel32 ( m_Section->Cont.BranchLabel, 0 ); - m_Section->Cont.LinkLocation = RecompPos - 4; - JmpLabel32(m_Section->Jump.BranchLabel,0); - m_Section->Jump.LinkLocation2 = RecompPos - 4; + JeLabel32 ( m_Section->m_Cont.BranchLabel, 0 ); + m_Section->m_Cont.LinkLocation = (DWORD *)(m_RecompPos - 4); + JmpLabel32(m_Section->m_Jump.BranchLabel,0); + m_Section->m_Jump.LinkLocation2 = (DWORD *)(m_RecompPos - 4); } } else { - if (m_Section->MipsRegLo(ConstReg) == 0) { - OrX86RegToX86Reg(m_Section->MipsRegLo(MappedReg),m_Section->MipsRegLo(MappedReg)); + CompConstToX86reg(cMipsRegMapLo(MappedReg),cMipsRegLo(ConstReg)); + if (m_Section->m_Cont.FallThrough) { + JneLabel32 ( m_Section->m_Jump.BranchLabel, 0 ); + m_Section->m_Jump.LinkLocation = (DWORD *)(m_RecompPos - 4); + } else if (m_Section->m_Jump.FallThrough) { + JeLabel32 ( m_Section->m_Cont.BranchLabel, 0 ); + m_Section->m_Cont.LinkLocation = (DWORD *)(m_RecompPos - 4); } else { - CompConstToX86reg(m_Section->MipsRegLo(MappedReg),m_Section->MipsRegLo(ConstReg)); - } - if (m_Section->Cont.FallThrough) { - JneLabel32 ( m_Section->Jump.BranchLabel, 0 ); - m_Section->Jump.LinkLocation = RecompPos - 4; - } else if (m_Section->Jump.FallThrough) { - JeLabel32 ( m_Section->Cont.BranchLabel, 0 ); - m_Section->Cont.LinkLocation = RecompPos - 4; - } else { - JeLabel32 ( m_Section->Cont.BranchLabel, 0 ); - m_Section->Cont.LinkLocation = RecompPos - 4; - JmpLabel32(m_Section->Jump.BranchLabel,0); - m_Section->Jump.LinkLocation = RecompPos - 4; + JeLabel32 ( m_Section->m_Cont.BranchLabel, 0 ); + m_Section->m_Cont.LinkLocation = (DWORD *)(m_RecompPos - 4); + JmpLabel32(m_Section->m_Jump.BranchLabel,0); + m_Section->m_Jump.LinkLocation = (DWORD *)(m_RecompPos - 4); } } } - } else if (m_Section->IsKnown(Opcode.rs) || m_Section->IsKnown(Opcode.rt)) { - DWORD KnownReg = m_Section->IsKnown(Opcode.rt)?Opcode.rt:Opcode.rs; - DWORD UnknownReg = m_Section->IsKnown(Opcode.rt)?Opcode.rs:Opcode.rt; + } else if (m_Section->IsKnown(m_Opcode.rs) || m_Section->IsKnown(m_Opcode.rt)) { + DWORD KnownReg = m_Section->IsKnown(m_Opcode.rt)?m_Opcode.rt:m_Opcode.rs; + DWORD UnknownReg = m_Section->IsKnown(m_Opcode.rt)?m_Opcode.rs:m_Opcode.rt; - if (m_Section->IsConst(KnownReg)) { + if (IsConst(KnownReg)) { if (m_Section->Is64Bit(KnownReg)) { - CompConstToVariable(m_Section->MipsRegHi(KnownReg),&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg]); + CompConstToVariable(MipsRegHi(KnownReg),&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg]); } else if (m_Section->IsSigned(KnownReg)) { - CompConstToVariable(((int)m_Section->MipsRegLo(KnownReg) >> 31),&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg]); + CompConstToVariable(((int)cMipsRegLo(KnownReg) >> 31),&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg]); } else { CompConstToVariable(0,&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg]); } } else { if (m_Section->Is64Bit(KnownReg)) { - CompX86regToVariable(m_Section->MipsRegHi(KnownReg),&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg]); + CompX86regToVariable(m_Section->MipsRegMapHi(KnownReg),&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg]); } else if (m_Section->IsSigned(KnownReg)) { - ProtectGPR(m_Section,KnownReg); - CompX86regToVariable(Map_TempReg(m_Section,x86_Any,KnownReg,TRUE),&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg]); + ProtectGPR(KnownReg); + CompX86regToVariable(m_Section->Map_TempReg(x86_Any,KnownReg,TRUE),&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg]); } else { CompConstToVariable(0,&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg]); } } - if (m_Section->Jump.FallThrough) { + if (m_Section->m_Jump.FallThrough) { JneLabel8("continue",0); - Jump = RecompPos - 1; + Jump = m_RecompPos - 1; } else { - JneLabel32(m_Section->Jump.BranchLabel,0); - m_Section->Jump.LinkLocation = RecompPos - 4; + JneLabel32(m_Section->m_Jump.BranchLabel,0); + m_Section->m_Jump.LinkLocation = (DWORD *)(m_RecompPos - 4); } - if (m_Section->IsConst(KnownReg)) { - CompConstToVariable(m_Section->MipsRegLo(KnownReg),&_GPR[UnknownReg].W[0],CRegName::GPR_Lo[UnknownReg]); + if (IsConst(KnownReg)) { + CompConstToVariable(cMipsRegLo(KnownReg),&_GPR[UnknownReg].W[0],CRegName::GPR_Lo[UnknownReg]); } else { - CompX86regToVariable(m_Section->MipsRegLo(KnownReg),&_GPR[UnknownReg].W[0],CRegName::GPR_Lo[UnknownReg]); + CompX86regToVariable(cMipsRegMapLo(KnownReg),&_GPR[UnknownReg].W[0],CRegName::GPR_Lo[UnknownReg]); } - if (m_Section->Cont.FallThrough) { - JneLabel32 ( m_Section->Jump.BranchLabel, 0 ); - m_Section->Jump.LinkLocation2 = RecompPos - 4; - } else if (m_Section->Jump.FallThrough) { - JeLabel32 ( m_Section->Cont.BranchLabel, 0 ); - m_Section->Cont.LinkLocation = RecompPos - 4; + if (m_Section->m_Cont.FallThrough) { + JneLabel32 ( m_Section->m_Jump.BranchLabel, 0 ); + m_Section->m_Jump.LinkLocation2 = (DWORD *)(m_RecompPos - 4); + } else if (m_Section->m_Jump.FallThrough) { + JeLabel32 ( m_Section->m_Cont.BranchLabel, 0 ); + m_Section->m_Cont.LinkLocation = (DWORD *)(m_RecompPos - 4); CPU_Message(" "); CPU_Message(" continue:"); - SetJump8(Jump,RecompPos); + SetJump8(Jump,m_RecompPos); } else { - JeLabel32 ( m_Section->Cont.BranchLabel, 0 ); - m_Section->Cont.LinkLocation = RecompPos - 4; - JmpLabel32(m_Section->Jump.BranchLabel,0); - m_Section->Jump.LinkLocation2 = RecompPos - 4; + JeLabel32 ( m_Section->m_Cont.BranchLabel, 0 ); + m_Section->m_Cont.LinkLocation = (DWORD *)(m_RecompPos - 4); + JmpLabel32(m_Section->m_Jump.BranchLabel,0); + m_Section->m_Jump.LinkLocation2 = (DWORD *)(m_RecompPos - 4); } } else { - int x86Reg; + x86Reg Reg; - x86Reg = Map_TempReg(m_Section,x86_Any,Opcode.rt,TRUE); - CompX86regToVariable(x86Reg,&_GPR[Opcode.rs].W[1],CRegName::GPR_Hi[Opcode.rs]); - if (m_Section->Jump.FallThrough) { + Reg = m_Section->Map_TempReg(x86_Any,m_Opcode.rt,TRUE); + CompX86regToVariable(Reg,&_GPR[m_Opcode.rs].W[1],CRegName::GPR_Hi[m_Opcode.rs]); + if (m_Section->m_Jump.FallThrough) { JneLabel8("continue",0); - Jump = RecompPos - 1; + Jump = m_RecompPos - 1; } else { - JneLabel32(m_Section->Jump.BranchLabel,0); - m_Section->Jump.LinkLocation = RecompPos - 4; + JneLabel32(m_Section->m_Jump.BranchLabel,0); + m_Section->m_Jump.LinkLocation = (DWORD *)(m_RecompPos - 4); } - x86Reg = Map_TempReg(m_Section,x86Reg,Opcode.rt,FALSE); - CompX86regToVariable(x86Reg,&_GPR[Opcode.rs].W[0],CRegName::GPR_Lo[Opcode.rs]); - if (m_Section->Cont.FallThrough) { - JneLabel32 ( m_Section->Jump.BranchLabel, 0 ); - m_Section->Jump.LinkLocation2 = RecompPos - 4; - } else if (m_Section->Jump.FallThrough) { - JeLabel32 ( m_Section->Cont.BranchLabel, 0 ); - m_Section->Cont.LinkLocation = RecompPos - 4; + Reg = m_Section->Map_TempReg(Reg,m_Opcode.rt,FALSE); + CompX86regToVariable(Reg,&_GPR[m_Opcode.rs].W[0],CRegName::GPR_Lo[m_Opcode.rs]); + if (m_Section->m_Cont.FallThrough) { + JneLabel32 ( m_Section->m_Jump.BranchLabel, 0 ); + m_Section->m_Jump.LinkLocation2 = (DWORD *)(m_RecompPos - 4); + } else if (m_Section->m_Jump.FallThrough) { + JeLabel32 ( m_Section->m_Cont.BranchLabel, 0 ); + m_Section->m_Cont.LinkLocation = (DWORD *)(m_RecompPos - 4); CPU_Message(" "); CPU_Message(" continue:"); - SetJump8(Jump,RecompPos); + SetJump8(Jump,m_RecompPos); } else { - JeLabel32 ( m_Section->Cont.BranchLabel, 0 ); - m_Section->Cont.LinkLocation = RecompPos - 4; - JmpLabel32(m_Section->Jump.BranchLabel,0); - m_Section->Jump.LinkLocation2 = RecompPos - 4; + JeLabel32 ( m_Section->m_Cont.BranchLabel, 0 ); + m_Section->m_Cont.LinkLocation = (DWORD *)(m_RecompPos - 4); + JmpLabel32(m_Section->m_Jump.BranchLabel,0); + m_Section->m_Jump.LinkLocation2 = (DWORD *)(m_RecompPos - 4); } } } -void BEQ_Compare (CCodeSection * m_Section) { +void CRecompilerOps::BEQ_Compare (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix BYTE *Jump; - if (m_Section->IsKnown(Opcode.rs) && m_Section->IsKnown(Opcode.rt)) { - if (m_Section->IsConst(Opcode.rs) && m_Section->IsConst(Opcode.rt)) { - if (m_Section->Is64Bit(Opcode.rs) || m_Section->Is64Bit(Opcode.rt)) { - CRecompilerOps::Compile_UnknownOpcode(m_Section); - } else if (m_Section->MipsRegLo(Opcode.rs) == m_Section->MipsRegLo(Opcode.rt)) { - m_Section->Jump.FallThrough = TRUE; - m_Section->Cont.FallThrough = FALSE; + if (m_Section->IsKnown(m_Opcode.rs) && m_Section->IsKnown(m_Opcode.rt)) { + if (IsConst(m_Opcode.rs) && IsConst(m_Opcode.rt)) { + if (m_Section->Is64Bit(m_Opcode.rs) || m_Section->Is64Bit(m_Opcode.rt)) { + CRecompilerOps::UnknownOpcode(); + } else if (cMipsRegLo(m_Opcode.rs) == cMipsRegLo(m_Opcode.rt)) { + m_Section->m_Jump.FallThrough = TRUE; + m_Section->m_Cont.FallThrough = FALSE; } else { - m_Section->Jump.FallThrough = FALSE; - m_Section->Cont.FallThrough = TRUE; + m_Section->m_Jump.FallThrough = FALSE; + m_Section->m_Cont.FallThrough = TRUE; } - } else if (m_Section->IsMapped(Opcode.rs) && m_Section->IsMapped(Opcode.rt)) { - if (m_Section->Is64Bit(Opcode.rs) || m_Section->Is64Bit(Opcode.rt)) { - ProtectGPR(m_Section,Opcode.rs); - ProtectGPR(m_Section,Opcode.rt); + } else if (IsMapped(m_Opcode.rs) && IsMapped(m_Opcode.rt)) { + if (m_Section->Is64Bit(m_Opcode.rs) || m_Section->Is64Bit(m_Opcode.rt)) { + ProtectGPR(m_Opcode.rs); + ProtectGPR(m_Opcode.rt); CompX86RegToX86Reg( - m_Section->Is32Bit(Opcode.rs)?Map_TempReg(m_Section,x86_Any,Opcode.rs,TRUE):m_Section->MipsRegHi(Opcode.rs), - m_Section->Is32Bit(Opcode.rt)?Map_TempReg(m_Section,x86_Any,Opcode.rt,TRUE):m_Section->MipsRegHi(Opcode.rt) + m_Section->Is32Bit(m_Opcode.rs)?m_Section->Map_TempReg(x86_Any,m_Opcode.rs,TRUE):MipsRegHi(m_Opcode.rs), + m_Section->Is32Bit(m_Opcode.rt)?m_Section->Map_TempReg(x86_Any,m_Opcode.rt,TRUE):MipsRegHi(m_Opcode.rt) ); - if (m_Section->Cont.FallThrough) { + if (m_Section->m_Cont.FallThrough) { JneLabel8("continue",0); - Jump = RecompPos - 1; + Jump = m_RecompPos - 1; } else { - JneLabel32(m_Section->Cont.BranchLabel,0); - m_Section->Cont.LinkLocation = RecompPos - 4; + JneLabel32(m_Section->m_Cont.BranchLabel,0); + m_Section->m_Cont.LinkLocation = (DWORD *)(m_RecompPos - 4); } - CompX86RegToX86Reg(m_Section->MipsRegLo(Opcode.rs),m_Section->MipsRegLo(Opcode.rt)); - if (m_Section->Cont.FallThrough) { - JeLabel32 ( m_Section->Jump.BranchLabel, 0 ); - m_Section->Jump.LinkLocation = RecompPos - 4; + CompX86RegToX86Reg(cMipsRegMapLo(m_Opcode.rs),cMipsRegMapLo(m_Opcode.rt)); + if (m_Section->m_Cont.FallThrough) { + JeLabel32 ( m_Section->m_Jump.BranchLabel, 0 ); + m_Section->m_Jump.LinkLocation = (DWORD *)(m_RecompPos - 4); CPU_Message(" "); CPU_Message(" continue:"); - SetJump8(Jump,RecompPos); - } else if (m_Section->Jump.FallThrough) { - JneLabel32 ( m_Section->Cont.BranchLabel, 0 ); - m_Section->Cont.LinkLocation2 = RecompPos - 4; + SetJump8(Jump,m_RecompPos); + } else if (m_Section->m_Jump.FallThrough) { + JneLabel32 ( m_Section->m_Cont.BranchLabel, 0 ); + m_Section->m_Cont.LinkLocation2 = (DWORD *)(m_RecompPos - 4); } else { - JneLabel32 ( m_Section->Cont.BranchLabel, 0 ); - m_Section->Cont.LinkLocation2 = RecompPos - 4; - JmpLabel32(m_Section->Jump.BranchLabel,0); - m_Section->Jump.LinkLocation = RecompPos - 4; + JneLabel32 ( m_Section->m_Cont.BranchLabel, 0 ); + m_Section->m_Cont.LinkLocation2 = (DWORD *)(m_RecompPos - 4); + JmpLabel32(m_Section->m_Jump.BranchLabel,0); + m_Section->m_Jump.LinkLocation = (DWORD *)(m_RecompPos - 4); } } else { - CompX86RegToX86Reg(m_Section->MipsRegLo(Opcode.rs),m_Section->MipsRegLo(Opcode.rt)); - if (m_Section->Cont.FallThrough) { - JeLabel32 ( m_Section->Jump.BranchLabel, 0 ); - m_Section->Jump.LinkLocation = RecompPos - 4; - } else if (m_Section->Jump.FallThrough) { - JneLabel32 ( m_Section->Cont.BranchLabel, 0 ); - m_Section->Cont.LinkLocation = RecompPos - 4; + CompX86RegToX86Reg(cMipsRegMapLo(m_Opcode.rs),cMipsRegMapLo(m_Opcode.rt)); + if (m_Section->m_Cont.FallThrough) { + JeLabel32 ( m_Section->m_Jump.BranchLabel, 0 ); + m_Section->m_Jump.LinkLocation = (DWORD *)(m_RecompPos - 4); + } else if (m_Section->m_Jump.FallThrough) { + JneLabel32 ( m_Section->m_Cont.BranchLabel, 0 ); + m_Section->m_Cont.LinkLocation = (DWORD *)(m_RecompPos - 4); } else { - JneLabel32 ( m_Section->Cont.BranchLabel, 0 ); - m_Section->Cont.LinkLocation = RecompPos - 4; - JmpLabel32(m_Section->Jump.BranchLabel,0); - m_Section->Jump.LinkLocation = RecompPos - 4; + JneLabel32 ( m_Section->m_Cont.BranchLabel, 0 ); + m_Section->m_Cont.LinkLocation = (DWORD *)(m_RecompPos - 4); + JmpLabel32(m_Section->m_Jump.BranchLabel,0); + m_Section->m_Jump.LinkLocation = (DWORD *)(m_RecompPos - 4); } } } else { - DWORD ConstReg = m_Section->IsConst(Opcode.rt)?Opcode.rt:Opcode.rs; - DWORD MappedReg = m_Section->IsConst(Opcode.rt)?Opcode.rs:Opcode.rt; + DWORD ConstReg = IsConst(m_Opcode.rt)?m_Opcode.rt:m_Opcode.rs; + DWORD MappedReg = IsConst(m_Opcode.rt)?m_Opcode.rs:m_Opcode.rt; if (m_Section->Is64Bit(ConstReg) || m_Section->Is64Bit(MappedReg)) { if (m_Section->Is32Bit(ConstReg) || m_Section->Is32Bit(MappedReg)) { if (m_Section->Is32Bit(MappedReg)) { - ProtectGPR(m_Section,MappedReg); - CompConstToX86reg(Map_TempReg(m_Section,x86_Any,MappedReg,TRUE),m_Section->MipsRegHi(ConstReg)); + ProtectGPR(MappedReg); + CompConstToX86reg(m_Section->Map_TempReg(x86_Any,MappedReg,TRUE),MipsRegHi(ConstReg)); } else { - CompConstToX86reg(m_Section->MipsRegHi(MappedReg),(int)m_Section->MipsRegLo(ConstReg) >> 31); + CompConstToX86reg(MipsRegHi(MappedReg),(int)cMipsRegLo(ConstReg) >> 31); } } else { - CompConstToX86reg(m_Section->MipsRegHi(MappedReg),m_Section->MipsRegHi(ConstReg)); + CompConstToX86reg(MipsRegHi(MappedReg),MipsRegHi(ConstReg)); } - if (m_Section->Cont.FallThrough) { + if (m_Section->m_Cont.FallThrough) { JneLabel8("continue",0); - Jump = RecompPos - 1; + Jump = m_RecompPos - 1; } else { - JneLabel32(m_Section->Cont.BranchLabel,0); - m_Section->Cont.LinkLocation = RecompPos - 4; + JneLabel32(m_Section->m_Cont.BranchLabel,0); + m_Section->m_Cont.LinkLocation = (DWORD *)(m_RecompPos - 4); } - if (m_Section->MipsRegLo(ConstReg) == 0) { - OrX86RegToX86Reg(m_Section->MipsRegLo(MappedReg),m_Section->MipsRegLo(MappedReg)); - } else { - CompConstToX86reg(m_Section->MipsRegLo(MappedReg),m_Section->MipsRegLo(ConstReg)); - } - if (m_Section->Cont.FallThrough) { - JeLabel32 ( m_Section->Jump.BranchLabel, 0 ); - m_Section->Jump.LinkLocation = RecompPos - 4; + CompConstToX86reg(cMipsRegLo(MappedReg),cMipsRegLo(ConstReg)); + if (m_Section->m_Cont.FallThrough) { + JeLabel32 ( m_Section->m_Jump.BranchLabel, 0 ); + m_Section->m_Jump.LinkLocation = (DWORD *)(m_RecompPos - 4); CPU_Message(" "); CPU_Message(" continue:"); - SetJump8(Jump,RecompPos); - } else if (m_Section->Jump.FallThrough) { - JneLabel32 ( m_Section->Cont.BranchLabel, 0 ); - m_Section->Cont.LinkLocation2 = RecompPos - 4; + SetJump8(Jump,m_RecompPos); + } else if (m_Section->m_Jump.FallThrough) { + JneLabel32 ( m_Section->m_Cont.BranchLabel, 0 ); + m_Section->m_Cont.LinkLocation2 = (DWORD *)(m_RecompPos - 4); } else { - JneLabel32 ( m_Section->Cont.BranchLabel, 0 ); - m_Section->Cont.LinkLocation2 = RecompPos - 4; - JmpLabel32(m_Section->Jump.BranchLabel,0); - m_Section->Jump.LinkLocation = RecompPos - 4; + JneLabel32 ( m_Section->m_Cont.BranchLabel, 0 ); + m_Section->m_Cont.LinkLocation2 = (DWORD *)(m_RecompPos - 4); + JmpLabel32(m_Section->m_Jump.BranchLabel,0); + m_Section->m_Jump.LinkLocation = (DWORD *)(m_RecompPos - 4); } } else { - if (m_Section->MipsRegLo(ConstReg) == 0) { - OrX86RegToX86Reg(m_Section->MipsRegLo(MappedReg),m_Section->MipsRegLo(MappedReg)); + CompConstToX86reg(cMipsRegLo(MappedReg),cMipsRegLo(ConstReg)); + if (m_Section->m_Cont.FallThrough) { + JeLabel32 ( m_Section->m_Jump.BranchLabel, 0 ); + m_Section->m_Jump.LinkLocation = (DWORD *)(m_RecompPos - 4); + } else if (m_Section->m_Jump.FallThrough) { + JneLabel32 ( m_Section->m_Cont.BranchLabel, 0 ); + m_Section->m_Cont.LinkLocation = (DWORD *)(m_RecompPos - 4); } else { - CompConstToX86reg(m_Section->MipsRegLo(MappedReg),m_Section->MipsRegLo(ConstReg)); - } - if (m_Section->Cont.FallThrough) { - JeLabel32 ( m_Section->Jump.BranchLabel, 0 ); - m_Section->Jump.LinkLocation = RecompPos - 4; - } else if (m_Section->Jump.FallThrough) { - JneLabel32 ( m_Section->Cont.BranchLabel, 0 ); - m_Section->Cont.LinkLocation = RecompPos - 4; - } else { - JneLabel32 ( m_Section->Cont.BranchLabel, 0 ); - m_Section->Cont.LinkLocation = RecompPos - 4; - JmpLabel32(m_Section->Jump.BranchLabel,0); - m_Section->Jump.LinkLocation = RecompPos - 4; + JneLabel32 ( m_Section->m_Cont.BranchLabel, 0 ); + m_Section->m_Cont.LinkLocation = (DWORD *)(m_RecompPos - 4); + JmpLabel32(m_Section->m_Jump.BranchLabel,0); + m_Section->m_Jump.LinkLocation = (DWORD *)(m_RecompPos - 4); } } } - } else if (m_Section->IsKnown(Opcode.rs) || m_Section->IsKnown(Opcode.rt)) { - DWORD KnownReg = m_Section->IsKnown(Opcode.rt)?Opcode.rt:Opcode.rs; - DWORD UnknownReg = m_Section->IsKnown(Opcode.rt)?Opcode.rs:Opcode.rt; + } else if (m_Section->IsKnown(m_Opcode.rs) || m_Section->IsKnown(m_Opcode.rt)) { + DWORD KnownReg = m_Section->IsKnown(m_Opcode.rt)?m_Opcode.rt:m_Opcode.rs; + DWORD UnknownReg = m_Section->IsKnown(m_Opcode.rt)?m_Opcode.rs:m_Opcode.rt; - if (m_Section->IsConst(KnownReg)) { + if (IsConst(KnownReg)) { if (m_Section->Is64Bit(KnownReg)) { - CompConstToVariable(m_Section->MipsRegHi(KnownReg),&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg]); + CompConstToVariable(MipsRegHi(KnownReg),&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg]); } else if (m_Section->IsSigned(KnownReg)) { - CompConstToVariable((int)m_Section->MipsRegLo(KnownReg) >> 31,&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg]); + CompConstToVariable((int)cMipsRegLo(KnownReg) >> 31,&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg]); } else { CompConstToVariable(0,&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg]); } } else { - ProtectGPR(m_Section,KnownReg); + ProtectGPR(KnownReg); if (m_Section->Is64Bit(KnownReg)) { - CompX86regToVariable(m_Section->MipsRegHi(KnownReg),&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg]); + CompX86regToVariable(MipsRegHi(KnownReg),&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg]); } else if (m_Section->IsSigned(KnownReg)) { - CompX86regToVariable(Map_TempReg(m_Section,x86_Any,KnownReg,TRUE),&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg]); + CompX86regToVariable(m_Section->Map_TempReg(x86_Any,KnownReg,TRUE),&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg]); } else { CompConstToVariable(0,&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg]); } } - if (m_Section->Cont.FallThrough) { + if (m_Section->m_Cont.FallThrough) { JneLabel8("continue",0); - Jump = RecompPos - 1; + Jump = m_RecompPos - 1; } else { - JneLabel32(m_Section->Cont.BranchLabel,0); - m_Section->Cont.LinkLocation = RecompPos - 4; + JneLabel32(m_Section->m_Cont.BranchLabel,0); + m_Section->m_Cont.LinkLocation = (DWORD *)(m_RecompPos - 4); } - if (m_Section->IsConst(KnownReg)) { - CompConstToVariable(m_Section->MipsRegLo(KnownReg),&_GPR[UnknownReg].W[0],CRegName::GPR_Lo[UnknownReg]); + if (IsConst(KnownReg)) { + CompConstToVariable(cMipsRegLo(KnownReg),&_GPR[UnknownReg].W[0],CRegName::GPR_Lo[UnknownReg]); } else { - CompX86regToVariable(m_Section->MipsRegLo(KnownReg),&_GPR[UnknownReg].W[0],CRegName::GPR_Lo[UnknownReg]); + CompX86regToVariable(cMipsRegMapLo(KnownReg),&_GPR[UnknownReg].W[0],CRegName::GPR_Lo[UnknownReg]); } - if (m_Section->Cont.FallThrough) { - JeLabel32 ( m_Section->Jump.BranchLabel, 0 ); - m_Section->Jump.LinkLocation = RecompPos - 4; + if (m_Section->m_Cont.FallThrough) { + JeLabel32 ( m_Section->m_Jump.BranchLabel, 0 ); + m_Section->m_Jump.LinkLocation = (DWORD *)(m_RecompPos - 4); CPU_Message(" "); CPU_Message(" continue:"); - SetJump8(Jump,RecompPos); - } else if (m_Section->Jump.FallThrough) { - JneLabel32 ( m_Section->Cont.BranchLabel, 0 ); - m_Section->Cont.LinkLocation2 = RecompPos - 4; + SetJump8(Jump,m_RecompPos); + } else if (m_Section->m_Jump.FallThrough) { + JneLabel32 ( m_Section->m_Cont.BranchLabel, 0 ); + m_Section->m_Cont.LinkLocation2 = (DWORD *)(m_RecompPos - 4); } else { - JneLabel32 ( m_Section->Cont.BranchLabel, 0 ); - m_Section->Cont.LinkLocation2 = RecompPos - 4; - JmpLabel32(m_Section->Jump.BranchLabel,0); - m_Section->Jump.LinkLocation = RecompPos - 4; + JneLabel32 ( m_Section->m_Cont.BranchLabel, 0 ); + m_Section->m_Cont.LinkLocation2 = (DWORD *)(m_RecompPos - 4); + JmpLabel32(m_Section->m_Jump.BranchLabel,0); + m_Section->m_Jump.LinkLocation = (DWORD *)(m_RecompPos - 4); } } else { - int x86Reg = Map_TempReg(m_Section,x86_Any,Opcode.rs,TRUE); - CompX86regToVariable(x86Reg,&_GPR[Opcode.rt].W[1],CRegName::GPR_Hi[Opcode.rt]); - if (m_Section->Cont.FallThrough) { + x86Reg Reg = m_Section->Map_TempReg(x86_Any,m_Opcode.rs,TRUE); + CompX86regToVariable(Reg,&_GPR[m_Opcode.rt].W[1],CRegName::GPR_Hi[m_Opcode.rt]); + if (m_Section->m_Cont.FallThrough) { JneLabel8("continue",0); - Jump = RecompPos - 1; + Jump = m_RecompPos - 1; } else { - JneLabel32(m_Section->Cont.BranchLabel,0); - m_Section->Cont.LinkLocation = RecompPos - 4; + JneLabel32(m_Section->m_Cont.BranchLabel,0); + m_Section->m_Cont.LinkLocation = (DWORD *)(m_RecompPos - 4); } - CompX86regToVariable(Map_TempReg(m_Section,x86Reg,Opcode.rs,FALSE),&_GPR[Opcode.rt].W[0],CRegName::GPR_Lo[Opcode.rt]); - if (m_Section->Cont.FallThrough) { - JeLabel32 ( m_Section->Jump.BranchLabel, 0 ); - m_Section->Jump.LinkLocation = RecompPos - 4; + CompX86regToVariable(m_Section->Map_TempReg(Reg,m_Opcode.rs,FALSE),&_GPR[m_Opcode.rt].W[0],CRegName::GPR_Lo[m_Opcode.rt]); + if (m_Section->m_Cont.FallThrough) { + JeLabel32 ( m_Section->m_Jump.BranchLabel, 0 ); + m_Section->m_Jump.LinkLocation = (DWORD *)(m_RecompPos - 4); CPU_Message(" "); CPU_Message(" continue:"); - SetJump8(Jump,RecompPos); - } else if (m_Section->Jump.FallThrough) { - JneLabel32 ( m_Section->Cont.BranchLabel, 0 ); - m_Section->Cont.LinkLocation2 = RecompPos - 4; + SetJump8(Jump,m_RecompPos); + } else if (m_Section->m_Jump.FallThrough) { + JneLabel32 ( m_Section->m_Cont.BranchLabel, 0 ); + m_Section->m_Cont.LinkLocation2 = (DWORD *)(m_RecompPos - 4); } else { - JneLabel32 ( m_Section->Cont.BranchLabel, 0 ); - m_Section->Cont.LinkLocation2 = RecompPos - 4; - JmpLabel32(m_Section->Jump.BranchLabel,0); - m_Section->Jump.LinkLocation = RecompPos - 4; + JneLabel32 ( m_Section->m_Cont.BranchLabel, 0 ); + m_Section->m_Cont.LinkLocation2 = (DWORD *)(m_RecompPos - 4); + JmpLabel32(m_Section->m_Jump.BranchLabel,0); + m_Section->m_Jump.LinkLocation = (DWORD *)(m_RecompPos - 4); } } +#endif } -void BGTZ_Compare (CCodeSection * m_Section) { - if (m_Section->IsConst(Opcode.rs)) { - if (m_Section->Is64Bit(Opcode.rs)) { - if (m_Section->MipsReg_S(Opcode.rs) > 0) { - m_Section->Jump.FallThrough = TRUE; - m_Section->Cont.FallThrough = FALSE; +void CRecompilerOps::BGTZ_Compare (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + if (IsConst(m_Opcode.rs)) { + if (m_Section->Is64Bit(m_Opcode.rs)) { + if (m_Section->MipsReg_S(m_Opcode.rs) > 0) { + m_Section->m_Jump.FallThrough = TRUE; + m_Section->m_Cont.FallThrough = FALSE; } else { - m_Section->Jump.FallThrough = FALSE; - m_Section->Cont.FallThrough = TRUE; + m_Section->m_Jump.FallThrough = FALSE; + m_Section->m_Cont.FallThrough = TRUE; } } else { - if (m_Section->MipsRegLo_S(Opcode.rs) > 0) { - m_Section->Jump.FallThrough = TRUE; - m_Section->Cont.FallThrough = FALSE; + if (m_Section->MipsRegLo_S(m_Opcode.rs) > 0) { + m_Section->m_Jump.FallThrough = TRUE; + m_Section->m_Cont.FallThrough = FALSE; } else { - m_Section->Jump.FallThrough = FALSE; - m_Section->Cont.FallThrough = TRUE; + m_Section->m_Jump.FallThrough = FALSE; + m_Section->m_Cont.FallThrough = TRUE; } } - } else if (m_Section->IsMapped(Opcode.rs) && m_Section->Is32Bit(Opcode.rs)) { - CompConstToX86reg(m_Section->MipsRegLo(Opcode.rs),0); - if (m_Section->Jump.FallThrough) { - JleLabel32 (m_Section->Cont.BranchLabel, 0 ); - m_Section->Cont.LinkLocation = RecompPos - 4; - } else if (m_Section->Cont.FallThrough) { - JgLabel32(m_Section->Jump.BranchLabel,0); - m_Section->Jump.LinkLocation = RecompPos - 4; + } else if (IsMapped(m_Opcode.rs) && m_Section->Is32Bit(m_Opcode.rs)) { + CompConstToX86reg(cMipsRegLo(m_Opcode.rs),0); + if (m_Section->m_Jump.FallThrough) { + JleLabel32 (m_Section->m_Cont.BranchLabel, 0 ); + m_Section->m_Cont.LinkLocation = (DWORD *)(m_RecompPos - 4); + } else if (m_Section->m_Cont.FallThrough) { + JgLabel32(m_Section->m_Jump.BranchLabel,0); + m_Section->m_Jump.LinkLocation = (DWORD *)(m_RecompPos - 4); } else { - JleLabel32 (m_Section->Cont.BranchLabel, 0 ); - m_Section->Cont.LinkLocation = RecompPos - 4; - JmpLabel32(m_Section->Jump.BranchLabel,0); - m_Section->Jump.LinkLocation = RecompPos - 4; + JleLabel32 (m_Section->m_Cont.BranchLabel, 0 ); + m_Section->m_Cont.LinkLocation = (DWORD *)(m_RecompPos - 4); + JmpLabel32(m_Section->m_Jump.BranchLabel,0); + m_Section->m_Jump.LinkLocation = (DWORD *)(m_RecompPos - 4); } } else { BYTE *Jump; - if (m_Section->IsMapped(Opcode.rs)) { - CompConstToX86reg(m_Section->MipsRegHi(Opcode.rs),0); + if (IsMapped(m_Opcode.rs)) { + CompConstToX86reg(MipsRegHi(m_Opcode.rs),0); } else { - CompConstToVariable(0,&_GPR[Opcode.rs].W[1],CRegName::GPR_Hi[Opcode.rs]); + CompConstToVariable(0,&_GPR[m_Opcode.rs].W[1],CRegName::GPR_Hi[m_Opcode.rs]); } - if (m_Section->Jump.FallThrough) { - JlLabel32 (m_Section->Cont.BranchLabel, 0 ); - m_Section->Cont.LinkLocation = RecompPos - 4; + if (m_Section->m_Jump.FallThrough) { + JlLabel32 (m_Section->m_Cont.BranchLabel, 0 ); + m_Section->m_Cont.LinkLocation = (DWORD *)(m_RecompPos - 4); JgLabel8("continue",0); - Jump = RecompPos - 1; - } else if (m_Section->Cont.FallThrough) { + Jump = m_RecompPos - 1; + } else if (m_Section->m_Cont.FallThrough) { JlLabel8("continue",0); - Jump = RecompPos - 1; - JgLabel32(m_Section->Jump.BranchLabel,0); - m_Section->Jump.LinkLocation = RecompPos - 4; + Jump = m_RecompPos - 1; + JgLabel32(m_Section->m_Jump.BranchLabel,0); + m_Section->m_Jump.LinkLocation = (DWORD *)(m_RecompPos - 4); } else { - JlLabel32 (m_Section->Cont.BranchLabel, 0 ); - m_Section->Cont.LinkLocation = RecompPos - 4; - JgLabel32(m_Section->Jump.BranchLabel,0); - m_Section->Jump.LinkLocation = RecompPos - 4; + JlLabel32 (m_Section->m_Cont.BranchLabel, 0 ); + m_Section->m_Cont.LinkLocation = (DWORD *)(m_RecompPos - 4); + JgLabel32(m_Section->m_Jump.BranchLabel,0); + m_Section->m_Jump.LinkLocation = (DWORD *)(m_RecompPos - 4); } - if (m_Section->IsMapped(Opcode.rs)) { - CompConstToX86reg(m_Section->MipsRegLo(Opcode.rs),0); + if (IsMapped(m_Opcode.rs)) { + CompConstToX86reg(cMipsRegLo(m_Opcode.rs),0); } else { - CompConstToVariable(0,&_GPR[Opcode.rs].W[0],CRegName::GPR_Lo[Opcode.rs]); + CompConstToVariable(0,&_GPR[m_Opcode.rs].W[0],CRegName::GPR_Lo[m_Opcode.rs]); } - if (m_Section->Jump.FallThrough) { - JeLabel32 (m_Section->Cont.BranchLabel, 0 ); - m_Section->Cont.LinkLocation2 = RecompPos - 4; + if (m_Section->m_Jump.FallThrough) { + JeLabel32 (m_Section->m_Cont.BranchLabel, 0 ); + m_Section->m_Cont.LinkLocation2 = (DWORD *)(m_RecompPos - 4); CPU_Message(" continue:"); - *((BYTE *)(Jump))=(BYTE)(RecompPos - Jump - 1); - } else if (m_Section->Cont.FallThrough) { - JneLabel32(m_Section->Jump.BranchLabel,0); - m_Section->Jump.LinkLocation = RecompPos - 4; + *((BYTE *)(Jump))=(BYTE)(m_RecompPos - Jump - 1); + } else if (m_Section->m_Cont.FallThrough) { + JneLabel32(m_Section->m_Jump.BranchLabel,0); + m_Section->m_Jump.LinkLocation = (DWORD *)(m_RecompPos - 4); CPU_Message(" continue:"); - *((BYTE *)(Jump))=(BYTE)(RecompPos - Jump - 1); + *((BYTE *)(Jump))=(BYTE)(m_RecompPos - Jump - 1); } else { - JneLabel32(m_Section->Jump.BranchLabel,0); - m_Section->Jump.LinkLocation = RecompPos - 4; - JmpLabel32 (m_Section->Cont.BranchLabel, 0 ); - m_Section->Cont.LinkLocation2 = RecompPos - 4; + JneLabel32(m_Section->m_Jump.BranchLabel,0); + m_Section->m_Jump.LinkLocation = (DWORD *)(m_RecompPos - 4); + JmpLabel32 (m_Section->m_Cont.BranchLabel, 0 ); + m_Section->m_Cont.LinkLocation2 = (DWORD *)(m_RecompPos - 4); } } +#endif } -void BLEZ_Compare (CCodeSection * m_Section) { - if (m_Section->IsConst(Opcode.rs)) { - if (m_Section->Is64Bit(Opcode.rs)) { - if (m_Section->MipsReg_S(Opcode.rs) <= 0) { - m_Section->Jump.FallThrough = TRUE; - m_Section->Cont.FallThrough = FALSE; +void CRecompilerOps::BLEZ_Compare (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + if (IsConst(m_Opcode.rs)) { + if (m_Section->Is64Bit(m_Opcode.rs)) { + if (m_Section->MipsReg_S(m_Opcode.rs) <= 0) { + m_Section->m_Jump.FallThrough = TRUE; + m_Section->m_Cont.FallThrough = FALSE; } else { - m_Section->Jump.FallThrough = FALSE; - m_Section->Cont.FallThrough = TRUE; + m_Section->m_Jump.FallThrough = FALSE; + m_Section->m_Cont.FallThrough = TRUE; } - } else if (m_Section->IsSigned(Opcode.rs)) { - if (m_Section->MipsRegLo_S(Opcode.rs) <= 0) { - m_Section->Jump.FallThrough = TRUE; - m_Section->Cont.FallThrough = FALSE; + } else if (m_Section->IsSigned(m_Opcode.rs)) { + if (m_Section->MipsRegLo_S(m_Opcode.rs) <= 0) { + m_Section->m_Jump.FallThrough = TRUE; + m_Section->m_Cont.FallThrough = FALSE; } else { - m_Section->Jump.FallThrough = FALSE; - m_Section->Cont.FallThrough = TRUE; + m_Section->m_Jump.FallThrough = FALSE; + m_Section->m_Cont.FallThrough = TRUE; } } else { - if (m_Section->MipsRegLo(Opcode.rs) == 0) { - m_Section->Jump.FallThrough = TRUE; - m_Section->Cont.FallThrough = FALSE; + if (cMipsRegLo(m_Opcode.rs) == 0) { + m_Section->m_Jump.FallThrough = TRUE; + m_Section->m_Cont.FallThrough = FALSE; } else { - m_Section->Jump.FallThrough = FALSE; - m_Section->Cont.FallThrough = TRUE; + m_Section->m_Jump.FallThrough = FALSE; + m_Section->m_Cont.FallThrough = TRUE; } } } else { - if (m_Section->IsMapped(Opcode.rs) && m_Section->Is32Bit(Opcode.rs)) { - CompConstToX86reg(m_Section->MipsRegLo(Opcode.rs),0); - if (m_Section->Jump.FallThrough) { - JgLabel32 (m_Section->Cont.BranchLabel, 0 ); - m_Section->Cont.LinkLocation = RecompPos - 4; - } else if (m_Section->Cont.FallThrough) { - JleLabel32(m_Section->Jump.BranchLabel,0); - m_Section->Jump.LinkLocation = RecompPos - 4; + if (IsMapped(m_Opcode.rs) && m_Section->Is32Bit(m_Opcode.rs)) { + CompConstToX86reg(cMipsRegLo(m_Opcode.rs),0); + if (m_Section->m_Jump.FallThrough) { + JgLabel32 (m_Section->m_Cont.BranchLabel, 0 ); + m_Section->m_Cont.LinkLocation = (DWORD *)(m_RecompPos - 4); + } else if (m_Section->m_Cont.FallThrough) { + JleLabel32(m_Section->m_Jump.BranchLabel,0); + m_Section->m_Jump.LinkLocation = (DWORD *)(m_RecompPos - 4); } else { - JgLabel32 (m_Section->Cont.BranchLabel, 0 ); - m_Section->Cont.LinkLocation = RecompPos - 4; - JmpLabel32(m_Section->Jump.BranchLabel,0); - m_Section->Jump.LinkLocation = RecompPos - 4; + JgLabel32 (m_Section->m_Cont.BranchLabel, 0 ); + m_Section->m_Cont.LinkLocation = (DWORD *)(m_RecompPos - 4); + JmpLabel32(m_Section->m_Jump.BranchLabel,0); + m_Section->m_Jump.LinkLocation = (DWORD *)(m_RecompPos - 4); } } else { BYTE *Jump; - if (m_Section->IsMapped(Opcode.rs)) { - CompConstToX86reg(m_Section->MipsRegHi(Opcode.rs),0); + if (IsMapped(m_Opcode.rs)) { + CompConstToX86reg(MipsRegHi(m_Opcode.rs),0); } else { - CompConstToVariable(0,&_GPR[Opcode.rs].W[1],CRegName::GPR_Hi[Opcode.rs]); + CompConstToVariable(0,&_GPR[m_Opcode.rs].W[1],CRegName::GPR_Hi[m_Opcode.rs]); } - if (m_Section->Jump.FallThrough) { - JgLabel32 (m_Section->Cont.BranchLabel, 0 ); - m_Section->Cont.LinkLocation = RecompPos - 4; + if (m_Section->m_Jump.FallThrough) { + JgLabel32 (m_Section->m_Cont.BranchLabel, 0 ); + m_Section->m_Cont.LinkLocation = (DWORD *)(m_RecompPos - 4); JlLabel8("Continue",0); - Jump = RecompPos - 1; - } else if (m_Section->Cont.FallThrough) { + Jump = m_RecompPos - 1; + } else if (m_Section->m_Cont.FallThrough) { JgLabel8("Continue",0); - Jump = RecompPos - 1; - JlLabel32(m_Section->Jump.BranchLabel,0); - m_Section->Jump.LinkLocation = RecompPos - 4; + Jump = m_RecompPos - 1; + JlLabel32(m_Section->m_Jump.BranchLabel,0); + m_Section->m_Jump.LinkLocation = (DWORD *)(m_RecompPos - 4); } else { - JgLabel32 (m_Section->Cont.BranchLabel, 0 ); - m_Section->Cont.LinkLocation = RecompPos - 4; - JlLabel32(m_Section->Jump.BranchLabel,0); - m_Section->Jump.LinkLocation = RecompPos - 4; + JgLabel32 (m_Section->m_Cont.BranchLabel, 0 ); + m_Section->m_Cont.LinkLocation = (DWORD *)(m_RecompPos - 4); + JlLabel32(m_Section->m_Jump.BranchLabel,0); + m_Section->m_Jump.LinkLocation = (DWORD *)(m_RecompPos - 4); } - if (m_Section->IsMapped(Opcode.rs)) { - CompConstToX86reg(m_Section->MipsRegLo(Opcode.rs),0); + if (IsMapped(m_Opcode.rs)) { + CompConstToX86reg(cMipsRegLo(m_Opcode.rs),0); } else { - CompConstToVariable(0,&_GPR[Opcode.rs].W[0],CRegName::GPR_Lo[Opcode.rs]); + CompConstToVariable(0,&_GPR[m_Opcode.rs].W[0],CRegName::GPR_Lo[m_Opcode.rs]); } - if (m_Section->Jump.FallThrough) { - JneLabel32 (m_Section->Cont.BranchLabel, 0 ); - m_Section->Cont.LinkLocation2 = RecompPos - 4; + if (m_Section->m_Jump.FallThrough) { + JneLabel32 (m_Section->m_Cont.BranchLabel, 0 ); + m_Section->m_Cont.LinkLocation2 = (DWORD *)(m_RecompPos - 4); CPU_Message(" continue:"); - *((BYTE *)(Jump))=(BYTE)(RecompPos - Jump - 1); - } else if (m_Section->Cont.FallThrough) { - JeLabel32 (m_Section->Jump.BranchLabel, 0 ); - m_Section->Jump.LinkLocation2 = RecompPos - 4; + *((BYTE *)(Jump))=(BYTE)(m_RecompPos - Jump - 1); + } else if (m_Section->m_Cont.FallThrough) { + JeLabel32 (m_Section->m_Jump.BranchLabel, 0 ); + m_Section->m_Jump.LinkLocation2 = (DWORD *)(m_RecompPos - 4); CPU_Message(" continue:"); - *((BYTE *)(Jump))=(BYTE)(RecompPos - Jump - 1); + *((BYTE *)(Jump))=(BYTE)(m_RecompPos - Jump - 1); } else { - JneLabel32 (m_Section->Cont.BranchLabel, 0 ); - m_Section->Cont.LinkLocation2 = RecompPos - 4; + JneLabel32 (m_Section->m_Cont.BranchLabel, 0 ); + m_Section->m_Cont.LinkLocation2 = (DWORD *)(m_RecompPos - 4); JmpLabel32("BranchToJump",0); - m_Section->Jump.LinkLocation2 = RecompPos - 4; + m_Section->m_Jump.LinkLocation2 = (DWORD *)(m_RecompPos - 4); } } } +#endif } -void BLTZ_Compare (CCodeSection * m_Section) { - if (m_Section->IsConst(Opcode.rs)) { - if (m_Section->Is64Bit(Opcode.rs)) { - if (m_Section->MipsReg_S(Opcode.rs) < 0) { - m_Section->Jump.FallThrough = TRUE; - m_Section->Cont.FallThrough = FALSE; +void CRecompilerOps::BLTZ_Compare (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + if (IsConst(m_Opcode.rs)) { + if (m_Section->Is64Bit(m_Opcode.rs)) { + if (m_Section->MipsReg_S(m_Opcode.rs) < 0) { + m_Section->m_Jump.FallThrough = TRUE; + m_Section->m_Cont.FallThrough = FALSE; } else { - m_Section->Jump.FallThrough = FALSE; - m_Section->Cont.FallThrough = TRUE; + m_Section->m_Jump.FallThrough = FALSE; + m_Section->m_Cont.FallThrough = TRUE; } - } else if (m_Section->IsSigned(Opcode.rs)) { - if (m_Section->MipsRegLo_S(Opcode.rs) < 0) { - m_Section->Jump.FallThrough = TRUE; - m_Section->Cont.FallThrough = FALSE; + } else if (m_Section->IsSigned(m_Opcode.rs)) { + if (m_Section->MipsRegLo_S(m_Opcode.rs) < 0) { + m_Section->m_Jump.FallThrough = TRUE; + m_Section->m_Cont.FallThrough = FALSE; } else { - m_Section->Jump.FallThrough = FALSE; - m_Section->Cont.FallThrough = TRUE; + m_Section->m_Jump.FallThrough = FALSE; + m_Section->m_Cont.FallThrough = TRUE; } } else { - m_Section->Jump.FallThrough = FALSE; - m_Section->Cont.FallThrough = TRUE; + m_Section->m_Jump.FallThrough = FALSE; + m_Section->m_Cont.FallThrough = TRUE; } - } else if (m_Section->IsMapped(Opcode.rs)) { - if (m_Section->Is64Bit(Opcode.rs)) { - CompConstToX86reg(m_Section->MipsRegHi(Opcode.rs),0); - if (m_Section->Jump.FallThrough) { - JgeLabel32 (m_Section->Cont.BranchLabel, 0 ); - m_Section->Cont.LinkLocation = RecompPos - 4; - } else if (m_Section->Cont.FallThrough) { - JlLabel32(m_Section->Jump.BranchLabel,0); - m_Section->Jump.LinkLocation = RecompPos - 4; + } else if (IsMapped(m_Opcode.rs)) { + if (m_Section->Is64Bit(m_Opcode.rs)) { + CompConstToX86reg(MipsRegHi(m_Opcode.rs),0); + if (m_Section->m_Jump.FallThrough) { + JgeLabel32 (m_Section->m_Cont.BranchLabel, 0 ); + m_Section->m_Cont.LinkLocation = (DWORD *)(m_RecompPos - 4); + } else if (m_Section->m_Cont.FallThrough) { + JlLabel32(m_Section->m_Jump.BranchLabel,0); + m_Section->m_Jump.LinkLocation = (DWORD *)(m_RecompPos - 4); } else { - JgeLabel32 (m_Section->Cont.BranchLabel, 0 ); - m_Section->Cont.LinkLocation = RecompPos - 4; - JmpLabel32(m_Section->Jump.BranchLabel,0); - m_Section->Jump.LinkLocation = RecompPos - 4; + JgeLabel32 (m_Section->m_Cont.BranchLabel, 0 ); + m_Section->m_Cont.LinkLocation = (DWORD *)(m_RecompPos - 4); + JmpLabel32(m_Section->m_Jump.BranchLabel,0); + m_Section->m_Jump.LinkLocation = (DWORD *)(m_RecompPos - 4); } - } else if (m_Section->IsSigned(Opcode.rs)) { - CompConstToX86reg(m_Section->MipsRegLo(Opcode.rs),0); - if (m_Section->Jump.FallThrough) { - JgeLabel32 (m_Section->Cont.BranchLabel, 0 ); - m_Section->Cont.LinkLocation = RecompPos - 4; - } else if (m_Section->Cont.FallThrough) { - JlLabel32(m_Section->Jump.BranchLabel,0); - m_Section->Jump.LinkLocation = RecompPos - 4; + } else if (m_Section->IsSigned(m_Opcode.rs)) { + CompConstToX86reg(cMipsRegLo(m_Opcode.rs),0); + if (m_Section->m_Jump.FallThrough) { + JgeLabel32 (m_Section->m_Cont.BranchLabel, 0 ); + m_Section->m_Cont.LinkLocation = (DWORD *)(m_RecompPos - 4); + } else if (m_Section->m_Cont.FallThrough) { + JlLabel32(m_Section->m_Jump.BranchLabel,0); + m_Section->m_Jump.LinkLocation = (DWORD *)(m_RecompPos - 4); } else { - JgeLabel32 (m_Section->Cont.BranchLabel, 0 ); - m_Section->Cont.LinkLocation = RecompPos - 4; - JmpLabel32(m_Section->Jump.BranchLabel,0); - m_Section->Jump.LinkLocation = RecompPos - 4; + JgeLabel32 (m_Section->m_Cont.BranchLabel, 0 ); + m_Section->m_Cont.LinkLocation = (DWORD *)(m_RecompPos - 4); + JmpLabel32(m_Section->m_Jump.BranchLabel,0); + m_Section->m_Jump.LinkLocation = (DWORD *)(m_RecompPos - 4); } } else { - m_Section->Jump.FallThrough = FALSE; - m_Section->Cont.FallThrough = TRUE; + m_Section->m_Jump.FallThrough = FALSE; + m_Section->m_Cont.FallThrough = TRUE; } - } else if (m_Section->IsUnknown(Opcode.rs)) { - CompConstToVariable(0,&_GPR[Opcode.rs].W[1],CRegName::GPR_Hi[Opcode.rs]); - if (m_Section->Jump.FallThrough) { - JgeLabel32 (m_Section->Cont.BranchLabel, 0 ); - m_Section->Cont.LinkLocation = RecompPos - 4; - } else if (m_Section->Cont.FallThrough) { - JlLabel32(m_Section->Jump.BranchLabel,0); - m_Section->Jump.LinkLocation = RecompPos - 4; + } else if (m_Section->IsUnknown(m_Opcode.rs)) { + CompConstToVariable(0,&_GPR[m_Opcode.rs].W[1],CRegName::GPR_Hi[m_Opcode.rs]); + if (m_Section->m_Jump.FallThrough) { + JgeLabel32 (m_Section->m_Cont.BranchLabel, 0 ); + m_Section->m_Cont.LinkLocation = (DWORD *)(m_RecompPos - 4); + } else if (m_Section->m_Cont.FallThrough) { + JlLabel32(m_Section->m_Jump.BranchLabel,0); + m_Section->m_Jump.LinkLocation = (DWORD *)(m_RecompPos - 4); } else { - JlLabel32(m_Section->Jump.BranchLabel,0); - m_Section->Jump.LinkLocation = RecompPos - 4; - JmpLabel32 (m_Section->Cont.BranchLabel, 0 ); - m_Section->Cont.LinkLocation = RecompPos - 4; + JlLabel32(m_Section->m_Jump.BranchLabel,0); + m_Section->m_Jump.LinkLocation = (DWORD *)(m_RecompPos - 4); + JmpLabel32 (m_Section->m_Cont.BranchLabel, 0 ); + m_Section->m_Cont.LinkLocation = (DWORD *)(m_RecompPos - 4); } } +#endif } -void BGEZ_Compare (CCodeSection * m_Section) { - if (m_Section->IsConst(Opcode.rs)) { - if (m_Section->Is64Bit(Opcode.rs)) { +void CRecompilerOps::BGEZ_Compare (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + if (IsConst(m_Opcode.rs)) { + if (m_Section->Is64Bit(m_Opcode.rs)) { #ifndef EXTERNAL_RELEASE DisplayError("BGEZ 1"); #endif - CRecompilerOps::Compile_UnknownOpcode(m_Section); - } else if (m_Section->IsSigned(Opcode.rs)) { - if (m_Section->MipsRegLo_S(Opcode.rs) >= 0) { - m_Section->Jump.FallThrough = TRUE; - m_Section->Cont.FallThrough = FALSE; + CRecompilerOps::UnknownOpcode(); + } else if (m_Section->IsSigned(m_Opcode.rs)) { + if (m_Section->MipsRegLo_S(m_Opcode.rs) >= 0) { + m_Section->m_Jump.FallThrough = TRUE; + m_Section->m_Cont.FallThrough = FALSE; } else { - m_Section->Jump.FallThrough = FALSE; - m_Section->Cont.FallThrough = TRUE; + m_Section->m_Jump.FallThrough = FALSE; + m_Section->m_Cont.FallThrough = TRUE; } } else { - m_Section->Jump.FallThrough = TRUE; - m_Section->Cont.FallThrough = FALSE; + m_Section->m_Jump.FallThrough = TRUE; + m_Section->m_Cont.FallThrough = FALSE; } - } else if (m_Section->IsMapped(Opcode.rs)) { - if (m_Section->Is64Bit(Opcode.rs)) { - CompConstToX86reg(m_Section->MipsRegHi(Opcode.rs),0); - if (m_Section->Cont.FallThrough) { - JgeLabel32 ( m_Section->Jump.BranchLabel, 0 ); - m_Section->Jump.LinkLocation = RecompPos - 4; - } else if (m_Section->Jump.FallThrough) { - JlLabel32 ( m_Section->Cont.BranchLabel, 0 ); - m_Section->Cont.LinkLocation = RecompPos - 4; + } else if (IsMapped(m_Opcode.rs)) { + if (m_Section->Is64Bit(m_Opcode.rs)) { + CompConstToX86reg(MipsRegHi(m_Opcode.rs),0); + if (m_Section->m_Cont.FallThrough) { + JgeLabel32 ( m_Section->m_Jump.BranchLabel, 0 ); + m_Section->m_Jump.LinkLocation = (DWORD *)(m_RecompPos - 4); + } else if (m_Section->m_Jump.FallThrough) { + JlLabel32 ( m_Section->m_Cont.BranchLabel, 0 ); + m_Section->m_Cont.LinkLocation = (DWORD *)(m_RecompPos - 4); } else { - JlLabel32 ( m_Section->Cont.BranchLabel, 0 ); - m_Section->Cont.LinkLocation = RecompPos - 4; - JmpLabel32(m_Section->Jump.BranchLabel,0); - m_Section->Jump.LinkLocation = RecompPos - 4; + JlLabel32 ( m_Section->m_Cont.BranchLabel, 0 ); + m_Section->m_Cont.LinkLocation = (DWORD *)(m_RecompPos - 4); + JmpLabel32(m_Section->m_Jump.BranchLabel,0); + m_Section->m_Jump.LinkLocation = (DWORD *)(m_RecompPos - 4); } - } else if (m_Section->IsSigned(Opcode.rs)) { - CompConstToX86reg(m_Section->MipsRegLo(Opcode.rs),0); - if (m_Section->Cont.FallThrough) { - JgeLabel32 ( m_Section->Jump.BranchLabel, 0 ); - m_Section->Jump.LinkLocation = RecompPos - 4; - } else if (m_Section->Jump.FallThrough) { - JlLabel32 ( m_Section->Cont.BranchLabel, 0 ); - m_Section->Cont.LinkLocation = RecompPos - 4; + } else if (m_Section->IsSigned(m_Opcode.rs)) { + CompConstToX86reg(cMipsRegLo(m_Opcode.rs),0); + if (m_Section->m_Cont.FallThrough) { + JgeLabel32 ( m_Section->m_Jump.BranchLabel, 0 ); + m_Section->m_Jump.LinkLocation = (DWORD *)(m_RecompPos - 4); + } else if (m_Section->m_Jump.FallThrough) { + JlLabel32 ( m_Section->m_Cont.BranchLabel, 0 ); + m_Section->m_Cont.LinkLocation = (DWORD *)(m_RecompPos - 4); } else { - JlLabel32 ( m_Section->Cont.BranchLabel, 0 ); - m_Section->Cont.LinkLocation = RecompPos - 4; - JmpLabel32(m_Section->Jump.BranchLabel,0); - m_Section->Jump.LinkLocation = RecompPos - 4; + JlLabel32 ( m_Section->m_Cont.BranchLabel, 0 ); + m_Section->m_Cont.LinkLocation = (DWORD *)(m_RecompPos - 4); + JmpLabel32(m_Section->m_Jump.BranchLabel,0); + m_Section->m_Jump.LinkLocation = (DWORD *)(m_RecompPos - 4); } } else { - m_Section->Jump.FallThrough = TRUE; - m_Section->Cont.FallThrough = FALSE; + m_Section->m_Jump.FallThrough = TRUE; + m_Section->m_Cont.FallThrough = FALSE; } } else { - CompConstToVariable(0,&_GPR[Opcode.rs].W[1],CRegName::GPR_Hi[Opcode.rs]); - if (m_Section->Cont.FallThrough) { - JgeLabel32 ( m_Section->Jump.BranchLabel, 0 ); - m_Section->Jump.LinkLocation = RecompPos - 4; - } else if (m_Section->Jump.FallThrough) { - JlLabel32 ( m_Section->Cont.BranchLabel, 0 ); - m_Section->Cont.LinkLocation = RecompPos - 4; + CompConstToVariable(0,&_GPR[m_Opcode.rs].W[1],CRegName::GPR_Hi[m_Opcode.rs]); + if (m_Section->m_Cont.FallThrough) { + JgeLabel32 ( m_Section->m_Jump.BranchLabel, 0 ); + m_Section->m_Jump.LinkLocation = (DWORD *)(m_RecompPos - 4); + } else if (m_Section->m_Jump.FallThrough) { + JlLabel32 ( m_Section->m_Cont.BranchLabel, 0 ); + m_Section->m_Cont.LinkLocation = (DWORD *)(m_RecompPos - 4); } else { - JlLabel32 ( m_Section->Cont.BranchLabel, 0 ); - m_Section->Cont.LinkLocation = RecompPos - 4; - JmpLabel32(m_Section->Jump.BranchLabel,0); - m_Section->Jump.LinkLocation = RecompPos - 4; + JlLabel32 ( m_Section->m_Cont.BranchLabel, 0 ); + m_Section->m_Cont.LinkLocation = (DWORD *)(m_RecompPos - 4); + JmpLabel32(m_Section->m_Jump.BranchLabel,0); + m_Section->m_Jump.LinkLocation = (DWORD *)(m_RecompPos - 4); } } +#endif } -void COP1_BCF_Compare (CCodeSection * m_Section) { +void CRecompilerOps::COP1_BCF_Compare (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix TestVariable(FPCSR_C,&_FPCR[31],"_FPCR[31]"); - if (m_Section->Cont.FallThrough) { - JeLabel32 ( m_Section->Jump.BranchLabel, 0 ); - m_Section->Jump.LinkLocation = RecompPos - 4; - } else if (m_Section->Jump.FallThrough) { - JneLabel32 ( m_Section->Cont.BranchLabel, 0 ); - m_Section->Cont.LinkLocation = RecompPos - 4; + if (m_Section->m_Cont.FallThrough) { + JeLabel32 ( m_Section->m_Jump.BranchLabel, 0 ); + m_Section->m_Jump.LinkLocation = (DWORD *)(m_RecompPos - 4); + } else if (m_Section->m_Jump.FallThrough) { + JneLabel32 ( m_Section->m_Cont.BranchLabel, 0 ); + m_Section->m_Cont.LinkLocation = (DWORD *)(m_RecompPos - 4); } else { - JneLabel32 ( m_Section->Cont.BranchLabel, 0 ); - m_Section->Cont.LinkLocation = RecompPos - 4; - JmpLabel32(m_Section->Jump.BranchLabel,0); - m_Section->Jump.LinkLocation = RecompPos - 4; + JneLabel32 ( m_Section->m_Cont.BranchLabel, 0 ); + m_Section->m_Cont.LinkLocation = (DWORD *)(m_RecompPos - 4); + JmpLabel32(m_Section->m_Jump.BranchLabel,0); + m_Section->m_Jump.LinkLocation = (DWORD *)(m_RecompPos - 4); } +#endif } -void COP1_BCT_Compare (CCodeSection * m_Section) { +void CRecompilerOps::COP1_BCT_Compare (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix TestVariable(FPCSR_C,&_FPCR[31],"_FPCR[31]"); - if (m_Section->Cont.FallThrough) { - JneLabel32 ( m_Section->Jump.BranchLabel, 0 ); - m_Section->Jump.LinkLocation = RecompPos - 4; - } else if (m_Section->Jump.FallThrough) { - JeLabel32 ( m_Section->Cont.BranchLabel, 0 ); - m_Section->Cont.LinkLocation = RecompPos - 4; + if (m_Section->m_Cont.FallThrough) { + JneLabel32 ( m_Section->m_Jump.BranchLabel, 0 ); + m_Section->m_Jump.LinkLocation = (DWORD *)(m_RecompPos - 4); + } else if (m_Section->m_Jump.FallThrough) { + JeLabel32 ( m_Section->m_Cont.BranchLabel, 0 ); + m_Section->m_Cont.LinkLocation = (DWORD *)(m_RecompPos - 4); } else { - JeLabel32 ( m_Section->Cont.BranchLabel, 0 ); - m_Section->Cont.LinkLocation = RecompPos - 4; - JmpLabel32(m_Section->Jump.BranchLabel,0); - m_Section->Jump.LinkLocation = RecompPos - 4; + JeLabel32 ( m_Section->m_Cont.BranchLabel, 0 ); + m_Section->m_Cont.LinkLocation = (DWORD *)(m_RecompPos - 4); + JmpLabel32(m_Section->m_Jump.BranchLabel,0); + m_Section->m_Jump.LinkLocation = (DWORD *)(m_RecompPos - 4); } +#endif } + /************************* OpCode functions *************************/ -void CRecompilerOps::Compile_J (CCodeSection * m_Section) { +void CRecompilerOps::J (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix static char JumpLabel[100]; - if ( NextInstruction == NORMAL ) { - CPU_Message(" %X %s",m_Section->CompilePC,R4300iOpcodeName(Opcode.Hex,m_Section->CompilePC)); + if ( m_NextInstruction == NORMAL ) { + CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC)); - if (m_Section->JumpSection != NULL) { - sprintf(JumpLabel,"Section_%d",((CCodeSection *)m_Section->JumpSection)->SectionID); + if (m_Section->m_JumpSection != NULL) { + sprintf(JumpLabel,"Section_%d",((CCodeSection *)m_Section->m_JumpSection)->m_SectionID); } else { strcpy(JumpLabel,"ExitBlock"); } - m_Section->Jump.TargetPC = (m_Section->CompilePC & 0xF0000000) + (Opcode.target << 2);; - m_Section->Jump.BranchLabel = JumpLabel; - m_Section->Jump.FallThrough = TRUE; - m_Section->Jump.LinkLocation = NULL; - m_Section->Jump.LinkLocation2 = NULL; - NextInstruction = DO_DELAY_SLOT; - if ((m_Section->CompilePC & 0xFFC) == 0xFFC) { - memcpy(&m_Section->Jump.RegSet,&m_Section->RegWorking,sizeof(CRegInfo)); + m_Section->m_Jump.TargetPC = (m_CompilePC & 0xF0000000) + (Opcode.target << 2);; + m_Section->m_Jump.BranchLabel = JumpLabel; + m_Section->m_Jump.FallThrough = TRUE; + m_Section->m_Jump.LinkLocation = NULL; + m_Section->m_Jump.LinkLocation2 = NULL; + m_NextInstruction = DO_DELAY_SLOT; + if ((m_CompilePC & 0xFFC) == 0xFFC) { + memcpy(&m_Section->m_Jump.RegSet,&m_RegWorkingSet,sizeof(CRegInfo)); _N64System->GetRecompiler()->GenerateSectionLinkage(m_Section); - NextInstruction = END_BLOCK; + m_NextInstruction = END_BLOCK; } - } else if (NextInstruction == DELAY_SLOT_DONE ) { - memcpy(&m_Section->Jump.RegSet,&m_Section->RegWorking,sizeof(CRegInfo)); + } else if (m_NextInstruction == DELAY_SLOT_DONE ) { + memcpy(&m_Section->m_Jump.RegSet,&m_RegWorkingSet,sizeof(CRegInfo)); _N64System->GetRecompiler()->GenerateSectionLinkage(m_Section); - NextInstruction = END_BLOCK; + m_NextInstruction = END_BLOCK; } else { #ifndef EXTERNAL_RELEASE - DisplayError("WTF\n\nJal\nNextInstruction = %X", NextInstruction); + DisplayError("WTF\n\nJal\nNextInstruction = %X", m_NextInstruction); #endif } +#endif } -void CRecompilerOps::Compile_JAL (CCodeSection * m_Section) { +void CRecompilerOps::JAL (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix static char JumpLabel[100]; - if ( NextInstruction == NORMAL ) { - CPU_Message(" %X %s",m_Section->CompilePC,R4300iOpcodeName(Opcode.Hex,m_Section->CompilePC)); - UnMap_GPR(m_Section, 31, FALSE); - m_Section->MipsRegLo(31) = m_Section->CompilePC + 8; - m_Section->MipsRegState(31) = CRegInfo::STATE_CONST_32; - if ((m_Section->CompilePC & 0xFFC) == 0xFFC) { - MoveConstToVariable((m_Section->CompilePC & 0xF0000000) + (Opcode.target << 2),&JumpToLocation,"JumpToLocation"); - MoveConstToVariable(m_Section->CompilePC + 4,_PROGRAM_COUNTER,"_PROGRAM_COUNTER"); - _N64System->GetRecompiler()->UpdateCounters(&m_Section->BlockCycleCount(),&m_Section->BlockRandomModifier(),FALSE); + if ( m_NextInstruction == NORMAL ) { + CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC)); + UnMap_GPR( 31, FALSE); + cMipsRegLo(31) = m_CompilePC + 8; + MipsRegState(31) = CRegInfo::STATE_CONST_32; + if ((m_CompilePC & 0xFFC) == 0xFFC) { + MoveConstToVariable((m_CompilePC & 0xF0000000) + (Opcode.target << 2),&JumpToLocation,"JumpToLocation"); + MoveConstToVariable(m_CompilePC + 4,_PROGRAM_COUNTER,"_PROGRAM_COUNTER"); + UpdateCounters(&m_RegWorkingSet.BlockCycleCount(),&m_RegWorkingSet.BlockRandomModifier(),FALSE); WriteBackRegisters(m_Section); if (CPU_Type == CPU_SyncCores) { Call_Direct(SyncToPC, "SyncToPC"); } - MoveConstToVariable(DELAY_SLOT,&NextInstruction,"NextInstruction"); + MoveConstToVariable(DELAY_SLOT,&m_NextInstruction,"m_NextInstruction"); Ret(); - NextInstruction = END_BLOCK; + m_NextInstruction = END_BLOCK; return; } - NextInstruction = DO_DELAY_SLOT; - } else if (NextInstruction == DELAY_SLOT_DONE ) { - DWORD TargetPC = (m_Section->CompilePC & 0xF0000000) + (Opcode.target << 2); - _N64System->GetRecompiler()->CompileExit (m_Section,m_Section->CompilePC,TargetPC,m_Section->RegWorking,CExitInfo::Normal,TRUE,NULL); - NextInstruction = END_BLOCK; + m_NextInstruction = DO_DELAY_SLOT; + } else if (m_NextInstruction == DELAY_SLOT_DONE ) { + DWORD TargetPC = (m_CompilePC & 0xF0000000) + (Opcode.target << 2); + _N64System->GetRecompiler()->CompileExit (m_Section,m_CompilePC,TargetPC,m_RegWorkingSet,CExitInfo::Normal,TRUE,NULL); + m_NextInstruction = END_BLOCK; } else { #ifndef EXTERNAL_RELEASE - DisplayError("WTF\n\nBranch\nNextInstruction = %X", NextInstruction); + DisplayError("WTF\n\nBranch\nNextInstruction = %X", m_NextInstruction); #endif } return; - if ( NextInstruction == NORMAL ) { - CPU_Message(" %X %s",m_Section->CompilePC,R4300iOpcodeName(Opcode.Hex,m_Section->CompilePC)); + if ( m_NextInstruction == NORMAL ) { + CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC)); - UnMap_GPR(m_Section, 31, FALSE); - m_Section->MipsRegLo(31) = m_Section->CompilePC + 8; - m_Section->MipsRegState(31) = CRegInfo::STATE_CONST_32; - NextInstruction = DO_DELAY_SLOT; - if (m_Section->JumpSection != NULL) { - sprintf(JumpLabel,"Section_%d",((CCodeSection *)m_Section->JumpSection)->SectionID); + UnMap_GPR( 31, FALSE); + cMipsRegLo(31) = m_CompilePC + 8; + MipsRegState(31) = CRegInfo::STATE_CONST_32; + m_NextInstruction = DO_DELAY_SLOT; + if (m_Section->m_JumpSection != NULL) { + sprintf(JumpLabel,"Section_%d",((CCodeSection *)m_Section->m_JumpSection)->m_SectionID); } else { strcpy(JumpLabel,"ExitBlock"); } - m_Section->Jump.TargetPC = (m_Section->CompilePC & 0xF0000000) + (Opcode.target << 2); - m_Section->Jump.BranchLabel = JumpLabel; - m_Section->Jump.FallThrough = TRUE; - m_Section->Jump.LinkLocation = NULL; - m_Section->Jump.LinkLocation2 = NULL; - if ((m_Section->CompilePC & 0xFFC) == 0xFFC) { - memcpy(&m_Section->Jump.RegSet,&m_Section->RegWorking,sizeof(CRegInfo)); + m_Section->m_Jump.TargetPC = (m_CompilePC & 0xF0000000) + (Opcode.target << 2); + m_Section->m_Jump.BranchLabel = JumpLabel; + m_Section->m_Jump.FallThrough = TRUE; + m_Section->m_Jump.LinkLocation = NULL; + m_Section->m_Jump.LinkLocation2 = NULL; + if ((m_CompilePC & 0xFFC) == 0xFFC) { + memcpy(&m_Section->m_Jump.RegSet,&m_RegWorkingSet,sizeof(CRegInfo)); _N64System->GetRecompiler()->GenerateSectionLinkage(m_Section); - NextInstruction = END_BLOCK; + m_NextInstruction = END_BLOCK; } - } else if (NextInstruction == DELAY_SLOT_DONE ) { - memcpy(&m_Section->Jump.RegSet,&m_Section->RegWorking,sizeof(CRegInfo)); + } else if (m_NextInstruction == DELAY_SLOT_DONE ) { + memcpy(&m_Section->m_Jump.RegSet,&m_RegWorkingSet,sizeof(CRegInfo)); _N64System->GetRecompiler()->GenerateSectionLinkage(m_Section); - NextInstruction = END_BLOCK; + m_NextInstruction = END_BLOCK; } else { #ifndef EXTERNAL_RELEASE - DisplayError("WTF\n\nJal\nNextInstruction = %X", NextInstruction); + DisplayError("WTF\n\nJal\nNextInstruction = %X", m_NextInstruction); #endif } +#endif } -void CRecompilerOps::Compile_ADDI (CCodeSection * m_Section) { - CPU_Message(" %X %s",m_Section->CompilePC,R4300iOpcodeName(Opcode.Hex,m_Section->CompilePC)); +void CRecompilerOps::ADDI (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC)); - if (Opcode.rt == 0) { return; } + if (m_Opcode.rt == 0) { return; } _Notify->BreakPoint(__FILE__,__LINE__); #ifdef tofix - if (SPHack && Opcode.rs == 29 && Opcode.rt == 29) { - AddConstToX86Reg(Map_MemoryStack(m_Section, x86_Any, true),(short)Opcode.immediate); + if (SPHack && m_Opcode.rs == 29 && m_Opcode.rt == 29) { + AddConstToX86Reg(Map_MemoryStack(m_Section, x86_Any, true),(short)m_Opcode.immediate); } #endif - if (m_Section->IsConst(Opcode.rs)) { - if (m_Section->IsMapped(Opcode.rt)) { UnMap_GPR(m_Section,Opcode.rt, FALSE); } - m_Section->MipsRegLo(Opcode.rt) = m_Section->MipsRegLo(Opcode.rs) + (short)Opcode.immediate; - m_Section->MipsRegState(Opcode.rt) = CRegInfo::STATE_CONST_32; + if (IsConst(m_Opcode.rs)) { + if (IsMapped(m_Opcode.rt)) { UnMap_GPR(m_Opcode.rt, FALSE); } + cMipsRegLo(m_Opcode.rt) = cMipsRegLo(m_Opcode.rs) + (short)m_Opcode.immediate; + MipsRegState(m_Opcode.rt) = CRegInfo::STATE_CONST_32; } else { - Map_GPR_32bit(m_Section,Opcode.rt,TRUE,Opcode.rs); - if (Opcode.immediate == 0) { - } else if (Opcode.immediate == 1) { - IncX86reg(m_Section->MipsRegLo(Opcode.rt)); - } else if (Opcode.immediate == 0xFFFF) { - DecX86reg(m_Section->MipsRegLo(Opcode.rt)); + Map_GPR_32bit(m_Opcode.rt,TRUE,m_Opcode.rs); + if (m_Opcode.immediate == 0) { + } else if (m_Opcode.immediate == 1) { + IncX86reg(cMipsRegLo(m_Opcode.rt)); + } else if (m_Opcode.immediate == 0xFFFF) { + DecX86reg(cMipsRegLo(m_Opcode.rt)); } else { - AddConstToX86Reg(m_Section->MipsRegLo(Opcode.rt),(short)Opcode.immediate); + AddConstToX86Reg(cMipsRegLo(m_Opcode.rt),(short)m_Opcode.immediate); } } _Notify->BreakPoint(__FILE__,__LINE__); #ifdef tofix - if (SPHack && Opcode.rt == 29 && Opcode.rs != 29) { + if (SPHack && m_Opcode.rt == 29 && m_Opcode.rs != 29) { m_Section->ResetX86Protection(); _MMU->ResetMemoryStack(m_Section); } #endif +#endif } -void CRecompilerOps::Compile_ADDIU (CCodeSection * m_Section) { - CPU_Message(" %X %s",m_Section->CompilePC,R4300iOpcodeName(Opcode.Hex,m_Section->CompilePC)); +void CRecompilerOps::ADDIU (void) { + CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC)); - if (Opcode.rt == 0) { return; } + if (m_Opcode.rt == 0) { return; } - _Notify->BreakPoint(__FILE__,__LINE__); #ifdef tofix if (SPHack) { - if (Opcode.rs == 29 && Opcode.rt == 29) + if (m_Opcode.rs == 29 && m_Opcode.rt == 29) { - AddConstToX86Reg(Map_MemoryStack(m_Section, x86_Any, TRUE),(short)Opcode.immediate); + AddConstToX86Reg(Map_MemoryStack(m_Section, x86_Any, TRUE),(short)m_Opcode.immediate); } } #endif - if (m_Section->IsConst(Opcode.rs)) { - if (m_Section->IsMapped(Opcode.rt)) { UnMap_GPR(m_Section,Opcode.rt, FALSE); } - m_Section->MipsRegLo(Opcode.rt) = m_Section->MipsRegLo(Opcode.rs) + (short)Opcode.immediate; - m_Section->MipsRegState(Opcode.rt) = CRegInfo::STATE_CONST_32; + if (IsConst(m_Opcode.rs)) { + if (IsMapped(m_Opcode.rt)) { UnMap_GPR(m_Opcode.rt, FALSE); } + MipsRegLo(m_Opcode.rt) = cMipsRegLo(m_Opcode.rs) + (short)m_Opcode.immediate; + MipsRegState(m_Opcode.rt) = CRegInfo::STATE_CONST_32; } else { - Map_GPR_32bit(m_Section,Opcode.rt,TRUE,Opcode.rs); - if (Opcode.immediate == 0) { - } else if (Opcode.immediate == 1) { - IncX86reg(m_Section->MipsRegLo(Opcode.rt)); - } else if (Opcode.immediate == 0xFFFF) { - DecX86reg(m_Section->MipsRegLo(Opcode.rt)); - } else { - AddConstToX86Reg(m_Section->MipsRegLo(Opcode.rt),(short)Opcode.immediate); - } + Map_GPR_32bit(m_Opcode.rt,TRUE,m_Opcode.rs); + AddConstToX86Reg(cMipsRegMapLo(m_Opcode.rt),(short)m_Opcode.immediate); } - _Notify->BreakPoint(__FILE__,__LINE__); #ifdef tofix - if (SPHack && Opcode.rt == 29 && Opcode.rs != 29) { + if (SPHack && m_Opcode.rt == 29 && m_Opcode.rs != 29) { m_Section->ResetX86Protection(); _MMU->ResetMemoryStack(m_Section); } #endif } -void CRecompilerOps::Compile_SLTIU (CCodeSection * m_Section) { - CPU_Message(" %X %s",m_Section->CompilePC,R4300iOpcodeName(Opcode.Hex,m_Section->CompilePC)); - if (Opcode.rt == 0) { return; } +void CRecompilerOps::SLTIU (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC)); + if (m_Opcode.rt == 0) { return; } - if (m_Section->IsConst(Opcode.rs)) { + if (IsConst(m_Opcode.rs)) { DWORD Result; - if (m_Section->Is64Bit(Opcode.rs)) { - _int64 Immediate = (_int64)((short)Opcode.immediate); - Result = m_Section->MipsReg(Opcode.rs) < ((unsigned)(Immediate))?1:0; - } else if (m_Section->Is32Bit(Opcode.rs)) { - Result = m_Section->MipsRegLo(Opcode.rs) < ((unsigned)((short)Opcode.immediate))?1:0; + if (m_Section->Is64Bit(m_Opcode.rs)) { + _int64 Immediate = (_int64)((short)m_Opcode.immediate); + Result = m_Section->MipsReg(m_Opcode.rs) < ((unsigned)(Immediate))?1:0; + } else if (m_Section->Is32Bit(m_Opcode.rs)) { + Result = cMipsRegLo(m_Opcode.rs) < ((unsigned)((short)m_Opcode.immediate))?1:0; } - UnMap_GPR(m_Section,Opcode.rt, FALSE); - m_Section->MipsRegState(Opcode.rt) = CRegInfo::STATE_CONST_32; - m_Section->MipsRegLo(Opcode.rt) = Result; - } else if (m_Section->IsMapped(Opcode.rs)) { - if (m_Section->Is64Bit(Opcode.rs)) { + UnMap_GPR(m_Opcode.rt, FALSE); + MipsRegState(m_Opcode.rt) = CRegInfo::STATE_CONST_32; + cMipsRegLo(m_Opcode.rt) = Result; + } else if (IsMapped(m_Opcode.rs)) { + if (m_Section->Is64Bit(m_Opcode.rs)) { BYTE * Jump[2]; - CompConstToX86reg(m_Section->MipsRegHi(Opcode.rs),((short)Opcode.immediate >> 31)); + CompConstToX86reg(MipsRegHi(m_Opcode.rs),((short)m_Opcode.immediate >> 31)); JeLabel8("Low Compare",0); - Jump[0] = RecompPos - 1; + Jump[0] = m_RecompPos - 1; SetbVariable(&BranchCompare,"BranchCompare"); JmpLabel8("Continue",0); - Jump[1] = RecompPos - 1; + Jump[1] = m_RecompPos - 1; CPU_Message(""); CPU_Message(" Low Compare:"); - *((BYTE *)(Jump[0]))=(BYTE)(RecompPos - Jump[0] - 1); - CompConstToX86reg(m_Section->MipsRegLo(Opcode.rs),(short)Opcode.immediate); + *((BYTE *)(Jump[0]))=(BYTE)(m_RecompPos - Jump[0] - 1); + CompConstToX86reg(cMipsRegLo(m_Opcode.rs),(short)m_Opcode.immediate); SetbVariable(&BranchCompare,"BranchCompare"); CPU_Message(""); CPU_Message(" Continue:"); - *((BYTE *)(Jump[1]))=(BYTE)(RecompPos - Jump[1] - 1); - Map_GPR_32bit(m_Section,Opcode.rt,FALSE, -1); - MoveVariableToX86reg(&BranchCompare,"BranchCompare",m_Section->MipsRegLo(Opcode.rt)); + *((BYTE *)(Jump[1]))=(BYTE)(m_RecompPos - Jump[1] - 1); + Map_GPR_32bit(m_Opcode.rt,FALSE, -1); + MoveVariableToX86reg(&BranchCompare,"BranchCompare",cMipsRegLo(m_Opcode.rt)); } else { - CompConstToX86reg(m_Section->MipsRegLo(Opcode.rs),(short)Opcode.immediate); + CompConstToX86reg(cMipsRegLo(m_Opcode.rs),(short)m_Opcode.immediate); SetbVariable(&BranchCompare,"BranchCompare"); - Map_GPR_32bit(m_Section,Opcode.rt,FALSE, -1); - MoveVariableToX86reg(&BranchCompare,"BranchCompare",m_Section->MipsRegLo(Opcode.rt)); + Map_GPR_32bit(m_Opcode.rt,FALSE, -1); + MoveVariableToX86reg(&BranchCompare,"BranchCompare",cMipsRegLo(m_Opcode.rt)); } } else { BYTE * Jump; - CompConstToVariable(((short)Opcode.immediate >> 31),&_GPR[Opcode.rs].W[1],CRegName::GPR_Hi[Opcode.rs]); + CompConstToVariable(((short)m_Opcode.immediate >> 31),&_GPR[m_Opcode.rs].W[1],CRegName::GPR_Hi[m_Opcode.rs]); JneLabel8("CompareSet",0); - Jump = RecompPos - 1; - CompConstToVariable((short)Opcode.immediate,&_GPR[Opcode.rs].W[0],CRegName::GPR_Lo[Opcode.rs]); + Jump = m_RecompPos - 1; + CompConstToVariable((short)m_Opcode.immediate,&_GPR[m_Opcode.rs].W[0],CRegName::GPR_Lo[m_Opcode.rs]); CPU_Message(""); CPU_Message(" CompareSet:"); - *((BYTE *)(Jump))=(BYTE)(RecompPos - Jump - 1); + *((BYTE *)(Jump))=(BYTE)(m_RecompPos - Jump - 1); SetbVariable(&BranchCompare,"BranchCompare"); - Map_GPR_32bit(m_Section,Opcode.rt,FALSE, -1); - MoveVariableToX86reg(&BranchCompare,"BranchCompare",m_Section->MipsRegLo(Opcode.rt)); + Map_GPR_32bit(m_Opcode.rt,FALSE, -1); + MoveVariableToX86reg(&BranchCompare,"BranchCompare",cMipsRegLo(m_Opcode.rt)); /*SetbVariable(&BranchCompare,"BranchCompare"); JmpLabel8("Continue",0); - Jump[1] = RecompPos - 1; + Jump[1] = m_RecompPos - 1; CPU_Message(""); CPU_Message(" Low Compare:"); - *((BYTE *)(Jump[0]))=(BYTE)(RecompPos - Jump[0] - 1); - CompConstToVariable((short)Opcode.immediate,&_GPR[Opcode.rs].W[0],CRegName::GPR_Lo[Opcode.rs]); + *((BYTE *)(Jump[0]))=(BYTE)(m_RecompPos - Jump[0] - 1); + CompConstToVariable((short)m_Opcode.immediate,&_GPR[m_Opcode.rs].W[0],CRegName::GPR_Lo[m_Opcode.rs]); SetbVariable(&BranchCompare,"BranchCompare"); CPU_Message(""); CPU_Message(" Continue:"); - *((BYTE *)(Jump[1]))=(BYTE)(RecompPos - Jump[1] - 1); - Map_GPR_32bit(m_Section,Opcode.rt,FALSE, -1); - MoveVariableToX86reg(&BranchCompare,"BranchCompare",m_Section->MipsRegLo(Opcode.rt));*/ + *((BYTE *)(Jump[1]))=(BYTE)(m_RecompPos - Jump[1] - 1); + Map_GPR_32bit(m_Opcode.rt,FALSE, -1); + MoveVariableToX86reg(&BranchCompare,"BranchCompare",cMipsRegLo(m_Opcode.rt));*/ } +#endif } -void CRecompilerOps::Compile_SLTI (CCodeSection * m_Section) { - CPU_Message(" %X %s",m_Section->CompilePC,R4300iOpcodeName(Opcode.Hex,m_Section->CompilePC)); - if (Opcode.rt == 0) { return; } +void CRecompilerOps::SLTI (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC)); + if (m_Opcode.rt == 0) { return; } - if (m_Section->IsConst(Opcode.rs)) { + if (IsConst(m_Opcode.rs)) { DWORD Result; - if (m_Section->Is64Bit(Opcode.rs)) { - _int64 Immediate = (_int64)((short)Opcode.immediate); - Result = (_int64)m_Section->MipsReg(Opcode.rs) < Immediate?1:0; - } else if (m_Section->Is32Bit(Opcode.rs)) { - Result = m_Section->MipsRegLo_S(Opcode.rs) < (short)Opcode.immediate?1:0; + if (m_Section->Is64Bit(m_Opcode.rs)) { + _int64 Immediate = (_int64)((short)m_Opcode.immediate); + Result = (_int64)m_Section->MipsReg(m_Opcode.rs) < Immediate?1:0; + } else if (m_Section->Is32Bit(m_Opcode.rs)) { + Result = m_Section->MipsRegLo_S(m_Opcode.rs) < (short)m_Opcode.immediate?1:0; } - UnMap_GPR(m_Section,Opcode.rt, FALSE); - m_Section->MipsRegState(Opcode.rt) = CRegInfo::STATE_CONST_32; - m_Section->MipsRegLo(Opcode.rt) = Result; - } else if (m_Section->IsMapped(Opcode.rs)) { - if (m_Section->Is64Bit(Opcode.rs)) { + UnMap_GPR(m_Opcode.rt, FALSE); + MipsRegState(m_Opcode.rt) = CRegInfo::STATE_CONST_32; + cMipsRegLo(m_Opcode.rt) = Result; + } else if (IsMapped(m_Opcode.rs)) { + if (m_Section->Is64Bit(m_Opcode.rs)) { BYTE * Jump[2]; - CompConstToX86reg(m_Section->MipsRegHi(Opcode.rs),((short)Opcode.immediate >> 31)); + CompConstToX86reg(MipsRegHi(m_Opcode.rs),((short)m_Opcode.immediate >> 31)); JeLabel8("Low Compare",0); - Jump[0] = RecompPos - 1; + Jump[0] = m_RecompPos - 1; SetlVariable(&BranchCompare,"BranchCompare"); JmpLabel8("Continue",0); - Jump[1] = RecompPos - 1; + Jump[1] = m_RecompPos - 1; CPU_Message(""); CPU_Message(" Low Compare:"); - *((BYTE *)(Jump[0]))=(BYTE)(RecompPos - Jump[0] - 1); - CompConstToX86reg(m_Section->MipsRegLo(Opcode.rs),(short)Opcode.immediate); + *((BYTE *)(Jump[0]))=(BYTE)(m_RecompPos - Jump[0] - 1); + CompConstToX86reg(cMipsRegLo(m_Opcode.rs),(short)m_Opcode.immediate); SetbVariable(&BranchCompare,"BranchCompare"); CPU_Message(""); CPU_Message(" Continue:"); - *((BYTE *)(Jump[1]))=(BYTE)(RecompPos - Jump[1] - 1); - Map_GPR_32bit(m_Section,Opcode.rt,FALSE, -1); - MoveVariableToX86reg(&BranchCompare,"BranchCompare",m_Section->MipsRegLo(Opcode.rt)); + *((BYTE *)(Jump[1]))=(BYTE)(m_RecompPos - Jump[1] - 1); + Map_GPR_32bit(m_Opcode.rt,FALSE, -1); + MoveVariableToX86reg(&BranchCompare,"BranchCompare",cMipsRegLo(m_Opcode.rt)); } else { - /* CompConstToX86reg(m_Section->MipsRegLo(Opcode.rs),(short)Opcode.immediate); + /* CompConstToX86reg(cMipsRegLo(m_Opcode.rs),(short)m_Opcode.immediate); SetlVariable(&BranchCompare,"BranchCompare"); - Map_GPR_32bit(m_Section,Opcode.rt,FALSE, -1); - MoveVariableToX86reg(&BranchCompare,"BranchCompare",m_Section->MipsRegLo(Opcode.rt)); + Map_GPR_32bit(m_Opcode.rt,FALSE, -1); + MoveVariableToX86reg(&BranchCompare,"BranchCompare",cMipsRegLo(m_Opcode.rt)); */ - ProtectGPR(m_Section, Opcode.rs); - Map_GPR_32bit(m_Section,Opcode.rt,FALSE, -1); - CompConstToX86reg(m_Section->MipsRegLo(Opcode.rs),(short)Opcode.immediate); + ProtectGPR( m_Opcode.rs); + Map_GPR_32bit(m_Opcode.rt,FALSE, -1); + CompConstToX86reg(cMipsRegLo(m_Opcode.rs),(short)m_Opcode.immediate); - if (m_Section->MipsRegLo(Opcode.rt) > x86_EDX) { + if (cMipsRegLo(m_Opcode.rt) > x86_EDX) { SetlVariable(&BranchCompare,"BranchCompare"); - MoveVariableToX86reg(&BranchCompare,"BranchCompare",m_Section->MipsRegLo(Opcode.rt)); + MoveVariableToX86reg(&BranchCompare,"BranchCompare",cMipsRegLo(m_Opcode.rt)); } else { - Setl(m_Section->MipsRegLo(Opcode.rt)); - AndConstToX86Reg(m_Section->MipsRegLo(Opcode.rt), 1); + Setl(cMipsRegLo(m_Opcode.rt)); + AndConstToX86Reg(cMipsRegLo(m_Opcode.rt), 1); } } } else { BYTE * Jump[2]; - CompConstToVariable(((short)Opcode.immediate >> 31),&_GPR[Opcode.rs].W[1],CRegName::GPR_Hi[Opcode.rs]); + CompConstToVariable(((short)m_Opcode.immediate >> 31),&_GPR[m_Opcode.rs].W[1],CRegName::GPR_Hi[m_Opcode.rs]); JeLabel8("Low Compare",0); - Jump[0] = RecompPos - 1; + Jump[0] = m_RecompPos - 1; SetlVariable(&BranchCompare,"BranchCompare"); JmpLabel8("Continue",0); - Jump[1] = RecompPos - 1; + Jump[1] = m_RecompPos - 1; CPU_Message(""); CPU_Message(" Low Compare:"); - *((BYTE *)(Jump[0]))=(BYTE)(RecompPos - Jump[0] - 1); - CompConstToVariable((short)Opcode.immediate,&_GPR[Opcode.rs].W[0],CRegName::GPR_Lo[Opcode.rs]); + *((BYTE *)(Jump[0]))=(BYTE)(m_RecompPos - Jump[0] - 1); + CompConstToVariable((short)m_Opcode.immediate,&_GPR[m_Opcode.rs].W[0],CRegName::GPR_Lo[m_Opcode.rs]); SetbVariable(&BranchCompare,"BranchCompare"); CPU_Message(""); CPU_Message(" Continue:"); - *((BYTE *)(Jump[1]))=(BYTE)(RecompPos - Jump[1] - 1); - Map_GPR_32bit(m_Section,Opcode.rt,FALSE, -1); - MoveVariableToX86reg(&BranchCompare,"BranchCompare",m_Section->MipsRegLo(Opcode.rt)); + *((BYTE *)(Jump[1]))=(BYTE)(m_RecompPos - Jump[1] - 1); + Map_GPR_32bit(m_Opcode.rt,FALSE, -1); + MoveVariableToX86reg(&BranchCompare,"BranchCompare",cMipsRegLo(m_Opcode.rt)); } +#endif } -void CRecompilerOps::Compile_ANDI (CCodeSection * m_Section) { - CPU_Message(" %X %s",m_Section->CompilePC,R4300iOpcodeName(Opcode.Hex,m_Section->CompilePC)); - - if (Opcode.rt == 0) { return;} - - if (m_Section->IsConst(Opcode.rs)) { - if (m_Section->IsMapped(Opcode.rt)) { UnMap_GPR(m_Section,Opcode.rt, FALSE); } - m_Section->MipsRegState(Opcode.rt) = CRegInfo::STATE_CONST_32; - m_Section->MipsRegLo(Opcode.rt) = m_Section->MipsRegLo(Opcode.rs) & Opcode.immediate; - } else if (Opcode.immediate != 0) { - Map_GPR_32bit(m_Section,Opcode.rt,FALSE,Opcode.rs); - AndConstToX86Reg(m_Section->MipsRegLo(Opcode.rt),Opcode.immediate); - } else { - Map_GPR_32bit(m_Section,Opcode.rt,FALSE,0); - } -} - -void CRecompilerOps::Compile_ORI (CCodeSection * m_Section) { - CPU_Message(" %X %s",m_Section->CompilePC,R4300iOpcodeName(Opcode.Hex,m_Section->CompilePC)); - if (Opcode.rt == 0) { return;} - - if (m_Section->IsConst(Opcode.rs)) { - if (m_Section->IsMapped(Opcode.rt)) { UnMap_GPR(m_Section,Opcode.rt, FALSE); } - m_Section->MipsRegState(Opcode.rt) = m_Section->MipsRegState(Opcode.rs); - m_Section->MipsRegHi(Opcode.rt) = m_Section->MipsRegHi(Opcode.rs); - m_Section->MipsRegLo(Opcode.rt) = m_Section->MipsRegLo(Opcode.rs) | Opcode.immediate; - } else if (m_Section->IsMapped(Opcode.rs)) { - if (m_Section->Is64Bit(Opcode.rs)) { - Map_GPR_64bit(m_Section,Opcode.rt,Opcode.rs); - } else { - Map_GPR_32bit(m_Section,Opcode.rt,m_Section->IsSigned(Opcode.rs),Opcode.rs); - } - OrConstToX86Reg(Opcode.immediate,m_Section->MipsRegLo(Opcode.rt)); - } else { - Map_GPR_64bit(m_Section,Opcode.rt,Opcode.rs); - OrConstToX86Reg(Opcode.immediate,m_Section->MipsRegLo(Opcode.rt)); - } -} - -void CRecompilerOps::Compile_XORI (CCodeSection * m_Section) { - CPU_Message(" %X %s",m_Section->CompilePC,R4300iOpcodeName(Opcode.Hex,m_Section->CompilePC)); - if (Opcode.rt == 0) { return;} - - if (m_Section->IsConst(Opcode.rs)) { - if (Opcode.rs != Opcode.rt) { UnMap_GPR(m_Section,Opcode.rt, FALSE); } - m_Section->MipsRegState(Opcode.rt) = m_Section->MipsRegState(Opcode.rs); - m_Section->MipsRegHi(Opcode.rt) = m_Section->MipsRegHi(Opcode.rs); - m_Section->MipsRegLo(Opcode.rt) = m_Section->MipsRegLo(Opcode.rs) ^ Opcode.immediate; - } else { - if (m_Section->IsMapped(Opcode.rs) && m_Section->Is32Bit(Opcode.rs)) { - Map_GPR_32bit(m_Section,Opcode.rt,m_Section->IsSigned(Opcode.rs),Opcode.rs); - } else { - Map_GPR_64bit(m_Section,Opcode.rt,Opcode.rs); - } - if (Opcode.immediate != 0) { XorConstToX86Reg(m_Section->MipsRegLo(Opcode.rt),Opcode.immediate); } - } -} - -void CRecompilerOps::Compile_LUI (CCodeSection * m_Section) { - CPU_Message(" %X %s",m_Section->CompilePC,R4300iOpcodeName(Opcode.Hex,m_Section->CompilePC)); - if (Opcode.rt == 0) { return;} - +void CRecompilerOps::ANDI (void) { _Notify->BreakPoint(__FILE__,__LINE__); #ifdef tofix - if (SPHack && Opcode.rt == 29) { + CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC)); + + if (m_Opcode.rt == 0) { return;} + + if (IsConst(m_Opcode.rs)) { + if (IsMapped(m_Opcode.rt)) { UnMap_GPR(m_Opcode.rt, FALSE); } + MipsRegState(m_Opcode.rt) = CRegInfo::STATE_CONST_32; + cMipsRegLo(m_Opcode.rt) = cMipsRegLo(m_Opcode.rs) & m_Opcode.immediate; + } else if (m_Opcode.immediate != 0) { + Map_GPR_32bit(m_Opcode.rt,FALSE,m_Opcode.rs); + AndConstToX86Reg(cMipsRegLo(m_Opcode.rt),m_Opcode.immediate); + } else { + Map_GPR_32bit(m_Opcode.rt,FALSE,0); + } +#endif +} + +void CRecompilerOps::ORI (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC)); + if (m_Opcode.rt == 0) { return;} + + if (IsConst(m_Opcode.rs)) { + if (IsMapped(m_Opcode.rt)) { UnMap_GPR(m_Opcode.rt, FALSE); } + MipsRegState(m_Opcode.rt) = MipsRegState(m_Opcode.rs); + MipsRegHi(m_Opcode.rt) = MipsRegHi(m_Opcode.rs); + cMipsRegLo(m_Opcode.rt) = cMipsRegLo(m_Opcode.rs) | m_Opcode.immediate; + } else if (IsMapped(m_Opcode.rs)) { + if (m_Section->Is64Bit(m_Opcode.rs)) { + Map_GPR_64bit(m_Section,m_Opcode.rt,m_Opcode.rs); + } else { + Map_GPR_32bit(m_Opcode.rt,m_Section->IsSigned(m_Opcode.rs),m_Opcode.rs); + } + OrConstToX86Reg(m_Opcode.immediate,cMipsRegLo(m_Opcode.rt)); + } else { + Map_GPR_64bit(m_Section,m_Opcode.rt,m_Opcode.rs); + OrConstToX86Reg(m_Opcode.immediate,cMipsRegLo(m_Opcode.rt)); + } +#endif +} + +void CRecompilerOps::XORI (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC)); + if (m_Opcode.rt == 0) { return;} + + if (IsConst(m_Opcode.rs)) { + if (m_Opcode.rs != m_Opcode.rt) { UnMap_GPR(m_Opcode.rt, FALSE); } + MipsRegState(m_Opcode.rt) = MipsRegState(m_Opcode.rs); + MipsRegHi(m_Opcode.rt) = MipsRegHi(m_Opcode.rs); + cMipsRegLo(m_Opcode.rt) = cMipsRegLo(m_Opcode.rs) ^ m_Opcode.immediate; + } else { + if (IsMapped(m_Opcode.rs) && m_Section->Is32Bit(m_Opcode.rs)) { + Map_GPR_32bit(m_Opcode.rt,m_Section->IsSigned(m_Opcode.rs),m_Opcode.rs); + } else { + Map_GPR_64bit(m_Section,m_Opcode.rt,m_Opcode.rs); + } + if (m_Opcode.immediate != 0) { XorConstToX86Reg(cMipsRegLo(m_Opcode.rt),m_Opcode.immediate); } + } +#endif +} + +void CRecompilerOps::LUI (void) { + CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC)); + if (m_Opcode.rt == 0) { return;} + +#ifdef tofix + if (SPHack && m_Opcode.rt == 29) { int x86reg = Map_MemoryStack(m_Section, x86_Any, false); DWORD Address; - TranslateVaddr (((short)Opcode.offset << 16), &Address); + TranslateVaddr (((short)m_Opcode.offset << 16), &Address); if (x86reg < 0) { MoveConstToVariable((DWORD)(Address + RDRAM), g_MemoryStack, "MemoryStack"); } else { @@ -1454,295 +1497,278 @@ void CRecompilerOps::Compile_LUI (CCodeSection * m_Section) { } } #endif - UnMap_GPR(m_Section,Opcode.rt, FALSE); - m_Section->MipsRegLo(Opcode.rt) = ((short)Opcode.offset << 16); - m_Section->MipsRegState(Opcode.rt) = CRegInfo::STATE_CONST_32; + UnMap_GPR(m_Opcode.rt, FALSE); + MipsRegLo(m_Opcode.rt) = ((short)m_Opcode.offset << 16); + MipsRegState(m_Opcode.rt) = CRegInfo::STATE_CONST_32; } -void CRecompilerOps::Compile_DADDIU (CCodeSection * m_Section) { - CPU_Message(" %X %s",m_Section->CompilePC,R4300iOpcodeName(Opcode.Hex,m_Section->CompilePC)); +void CRecompilerOps::DADDIU (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC)); - if (Opcode.rs != 0) { UnMap_GPR(m_Section,Opcode.rs,TRUE); } - if (Opcode.rs != 0) { UnMap_GPR(m_Section,Opcode.rt,TRUE); } + if (m_Opcode.rs != 0) { UnMap_GPR(m_Opcode.rs,TRUE); } + if (m_Opcode.rs != 0) { UnMap_GPR(m_Opcode.rt,TRUE); } Pushad(); MoveConstToVariable(Opcode.Hex, &Opcode.Hex, "Opcode.Hex" ); Call_Direct(R4300iOp::DADDIU, "R4300iOp::DADDIU"); Popad(); +#endif } -void CRecompilerOps::Compile_LDL (CCodeSection * m_Section) { - CPU_Message(" %X %s",m_Section->CompilePC,R4300iOpcodeName(Opcode.Hex,m_Section->CompilePC)); - if (Opcode.base != 0) { UnMap_GPR(m_Section,Opcode.base,TRUE); } - if (Opcode.rt != 0) { UnMap_GPR(m_Section,Opcode.rt,TRUE); } +void CRecompilerOps::LDL (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC)); + if (m_Opcode.base != 0) { UnMap_GPR(m_Opcode.base,TRUE); } + if (m_Opcode.rt != 0) { UnMap_GPR(m_Opcode.rt,TRUE); } Pushad(); MoveConstToVariable(Opcode.Hex, &Opcode.Hex, "Opcode.Hex" ); Call_Direct(R4300iOp::LDL, "R4300iOp::LDL"); Popad(); - +#endif } -void CRecompilerOps::Compile_LDR (CCodeSection * m_Section) { - CPU_Message(" %X %s",m_Section->CompilePC,R4300iOpcodeName(Opcode.Hex,m_Section->CompilePC)); - if (Opcode.base != 0) { UnMap_GPR(m_Section,Opcode.base,TRUE); } - if (Opcode.rt != 0) { UnMap_GPR(m_Section,Opcode.rt,TRUE); } +void CRecompilerOps::LDR (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC)); + if (m_Opcode.base != 0) { UnMap_GPR(m_Opcode.base,TRUE); } + if (m_Opcode.rt != 0) { UnMap_GPR(m_Opcode.rt,TRUE); } Pushad(); MoveConstToVariable(Opcode.Hex, &Opcode.Hex, "Opcode.Hex" ); Call_Direct(R4300iOp::LDR, "R4300iOp::LDR"); Popad(); +#endif } -void CRecompilerOps::Compile_LB (CCodeSection * m_Section) { +void CRecompilerOps::LB (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix DWORD TempReg1, TempReg2; - CPU_Message(" %X %s",m_Section->CompilePC,R4300iOpcodeName(Opcode.Hex,m_Section->CompilePC)); + CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC)); - if (Opcode.rt == 0) return; + if (m_Opcode.rt == 0) return; - if (m_Section->IsConst(Opcode.base)) { - DWORD Address = (m_Section->MipsRegLo(Opcode.base) + (short)Opcode.offset) ^ 3; - Map_GPR_32bit(m_Section,Opcode.rt,TRUE,0); - _MMU->Compile_LB(m_Section->MipsRegLo(Opcode.rt),Address,TRUE); + if (IsConst(m_Opcode.base)) { + DWORD Address = (cMipsRegLo(m_Opcode.base) + (short)m_Opcode.offset) ^ 3; + Map_GPR_32bit(m_Opcode.rt,TRUE,0); + _MMU->Compile_LB(cMipsRegLo(m_Opcode.rt),Address,TRUE); return; } - if (m_Section->IsMapped(Opcode.rt)) { ProtectGPR(m_Section,Opcode.rt); } - if (m_Section->IsMapped(Opcode.base)) { - ProtectGPR(m_Section,Opcode.base); - if (Opcode.offset != 0) { - TempReg1 = Map_TempReg(m_Section,x86_Any,-1,FALSE); - LeaSourceAndOffset(TempReg1,m_Section->MipsRegLo(Opcode.base),(short)Opcode.offset); + if (IsMapped(m_Opcode.rt)) { ProtectGPR(m_Opcode.rt); } + if (IsMapped(m_Opcode.base)) { + ProtectGPR(m_Opcode.base); + if (m_Opcode.offset != 0) { + TempReg1 = m_Section->Map_TempReg(x86_Any,-1,FALSE); + LeaSourceAndOffset(TempReg1,cMipsRegLo(m_Opcode.base),(short)m_Opcode.offset); } else { - TempReg1 = Map_TempReg(m_Section,x86_Any,Opcode.base,FALSE); + TempReg1 = m_Section->Map_TempReg(x86_Any,m_Opcode.base,FALSE); } } else { - TempReg1 = Map_TempReg(m_Section,x86_Any,Opcode.base,FALSE); - if (Opcode.immediate == 0) { - } else if (Opcode.immediate == 1) { - IncX86reg(TempReg1); - } else if (Opcode.immediate == 0xFFFF) { - DecX86reg(TempReg1); - } else { - AddConstToX86Reg(TempReg1,(short)Opcode.immediate); - } + TempReg1 = m_Section->Map_TempReg(x86_Any,m_Opcode.base,FALSE); + AddConstToX86Reg(TempReg1,(short)m_Opcode.immediate); } - if (UseTlb) { - TempReg2 = Map_TempReg(m_Section,x86_Any,-1,FALSE); + if (g_UseTlb) { + TempReg2 = m_Section->Map_TempReg(x86_Any,-1,FALSE); MoveX86RegToX86Reg(TempReg1, TempReg2); ShiftRightUnsignImmed(TempReg2,12); MoveVariableDispToX86Reg(TLB_ReadMap,"TLB_ReadMap",TempReg2,TempReg2,4); CompileReadTLBMiss(m_Section,TempReg1,TempReg2); XorConstToX86Reg(TempReg1,3); - Map_GPR_32bit(m_Section,Opcode.rt,TRUE,-1); - MoveSxByteX86regPointerToX86reg(TempReg1, TempReg2,m_Section->MipsRegLo(Opcode.rt)); + Map_GPR_32bit(m_Opcode.rt,TRUE,-1); + MoveSxByteX86regPointerToX86reg(TempReg1, TempReg2,cMipsRegLo(m_Opcode.rt)); } else { AndConstToX86Reg(TempReg1,0x1FFFFFFF); XorConstToX86Reg(TempReg1,3); - Map_GPR_32bit(m_Section,Opcode.rt,TRUE,-1); - MoveSxN64MemToX86regByte(m_Section->MipsRegLo(Opcode.rt), TempReg1); + Map_GPR_32bit(m_Opcode.rt,TRUE,-1); + MoveSxN64MemToX86regByte(cMipsRegLo(m_Opcode.rt), TempReg1); } +#endif } -void CRecompilerOps::Compile_LH (CCodeSection * m_Section) { +void CRecompilerOps::LH (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix DWORD TempReg1, TempReg2; - CPU_Message(" %X %s",m_Section->CompilePC,R4300iOpcodeName(Opcode.Hex,m_Section->CompilePC)); + CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC)); - if (Opcode.rt == 0) return; + if (m_Opcode.rt == 0) return; - if (m_Section->IsConst(Opcode.base)) { - DWORD Address = (m_Section->MipsRegLo(Opcode.base) + (short)Opcode.offset) ^ 2; - Map_GPR_32bit(m_Section,Opcode.rt,TRUE,0); - _MMU->Compile_LH(m_Section->MipsRegLo(Opcode.rt),Address,TRUE); + if (IsConst(m_Opcode.base)) { + DWORD Address = (cMipsRegLo(m_Opcode.base) + (short)m_Opcode.offset) ^ 2; + Map_GPR_32bit(m_Opcode.rt,TRUE,0); + _MMU->Compile_LH(cMipsRegLo(m_Opcode.rt),Address,TRUE); return; } - if (m_Section->IsMapped(Opcode.rt)) { ProtectGPR(m_Section,Opcode.rt); } - if (m_Section->IsMapped(Opcode.base)) { - ProtectGPR(m_Section,Opcode.base); - if (Opcode.offset != 0) { - TempReg1 = Map_TempReg(m_Section,x86_Any,-1,FALSE); - LeaSourceAndOffset(TempReg1,m_Section->MipsRegLo(Opcode.base),(short)Opcode.offset); + if (IsMapped(m_Opcode.rt)) { ProtectGPR(m_Opcode.rt); } + if (IsMapped(m_Opcode.base)) { + ProtectGPR(m_Opcode.base); + if (m_Opcode.offset != 0) { + TempReg1 = m_Section->Map_TempReg(x86_Any,-1,FALSE); + LeaSourceAndOffset(TempReg1,cMipsRegLo(m_Opcode.base),(short)m_Opcode.offset); } else { - TempReg1 = Map_TempReg(m_Section,x86_Any,Opcode.base,FALSE); + TempReg1 = m_Section->Map_TempReg(x86_Any,m_Opcode.base,FALSE); } } else { - TempReg1 = Map_TempReg(m_Section,x86_Any,Opcode.base,FALSE); - if (Opcode.immediate == 0) { - } else if (Opcode.immediate == 1) { - IncX86reg(TempReg1); - } else if (Opcode.immediate == 0xFFFF) { - DecX86reg(TempReg1); - } else { - AddConstToX86Reg(TempReg1,(short)Opcode.immediate); - } + TempReg1 = m_Section->Map_TempReg(x86_Any,m_Opcode.base,FALSE); + AddConstToX86Reg(TempReg1,(short)m_Opcode.immediate); } - if (UseTlb) { - TempReg2 = Map_TempReg(m_Section,x86_Any,-1,FALSE); + if (g_UseTlb) { + TempReg2 = m_Section->Map_TempReg(x86_Any,-1,FALSE); MoveX86RegToX86Reg(TempReg1, TempReg2); ShiftRightUnsignImmed(TempReg2,12); MoveVariableDispToX86Reg(TLB_ReadMap,"TLB_ReadMap",TempReg2,TempReg2,4); CompileReadTLBMiss(m_Section,TempReg1,TempReg2); XorConstToX86Reg(TempReg1,2); - Map_GPR_32bit(m_Section,Opcode.rt,TRUE,-1); - MoveSxHalfX86regPointerToX86reg(TempReg1, TempReg2,m_Section->MipsRegLo(Opcode.rt)); + Map_GPR_32bit(m_Opcode.rt,TRUE,-1); + MoveSxHalfX86regPointerToX86reg(TempReg1, TempReg2,cMipsRegLo(m_Opcode.rt)); } else { AndConstToX86Reg(TempReg1,0x1FFFFFFF); XorConstToX86Reg(TempReg1,2); - Map_GPR_32bit(m_Section,Opcode.rt,TRUE,-1); - MoveSxN64MemToX86regHalf(m_Section->MipsRegLo(Opcode.rt), TempReg1); + Map_GPR_32bit(m_Opcode.rt,TRUE,-1); + MoveSxN64MemToX86regHalf(cMipsRegLo(m_Opcode.rt), TempReg1); } +#endif } -void CRecompilerOps::Compile_LWL (CCodeSection * m_Section) { +void CRecompilerOps::LWL (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix DWORD TempReg1, TempReg2, Offset, shift; - CPU_Message(" %X %s",m_Section->CompilePC,R4300iOpcodeName(Opcode.Hex,m_Section->CompilePC)); + CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC)); - if (Opcode.rt == 0) return; + if (m_Opcode.rt == 0) return; - if (m_Section->IsConst(Opcode.base)) { + if (IsConst(m_Opcode.base)) { DWORD Address, Value; - Address = m_Section->MipsRegLo(Opcode.base) + (short)Opcode.offset; + Address = cMipsRegLo(m_Opcode.base) + (short)m_Opcode.offset; Offset = Address & 3; - Map_GPR_32bit(m_Section,Opcode.rt,TRUE,Opcode.rt); - Value = Map_TempReg(m_Section,x86_Any,-1,FALSE); + Map_GPR_32bit(m_Opcode.rt,TRUE,m_Opcode.rt); + Value = m_Section->Map_TempReg(x86_Any,-1,FALSE); _MMU->Compile_LW(m_Section, Value,(Address & ~3)); - AndConstToX86Reg(m_Section->MipsRegLo(Opcode.rt),LWL_MASK[Offset]); + AndConstToX86Reg(cMipsRegLo(m_Opcode.rt),LWL_MASK[Offset]); ShiftLeftSignImmed(Value,(BYTE)LWL_SHIFT[Offset]); - AddX86RegToX86Reg(m_Section->MipsRegLo(Opcode.rt),Value); + AddX86RegToX86Reg(cMipsRegLo(m_Opcode.rt),Value); return; } - shift = Map_TempReg(m_Section,x86_ECX,-1,FALSE); - if (m_Section->IsMapped(Opcode.rt)) { ProtectGPR(m_Section,Opcode.rt); } - if (m_Section->IsMapped(Opcode.base)) { - ProtectGPR(m_Section,Opcode.base); - if (Opcode.offset != 0) { - TempReg1 = Map_TempReg(m_Section,x86_Any,-1,FALSE); - LeaSourceAndOffset(TempReg1,m_Section->MipsRegLo(Opcode.base),(short)Opcode.offset); + shift = m_Section->Map_TempReg(x86_ECX,-1,FALSE); + if (IsMapped(m_Opcode.rt)) { ProtectGPR(m_Opcode.rt); } + if (IsMapped(m_Opcode.base)) { + ProtectGPR(m_Opcode.base); + if (m_Opcode.offset != 0) { + TempReg1 = m_Section->Map_TempReg(x86_Any,-1,FALSE); + LeaSourceAndOffset(TempReg1,cMipsRegLo(m_Opcode.base),(short)m_Opcode.offset); } else { - TempReg1 = Map_TempReg(m_Section,x86_Any,Opcode.base,FALSE); + TempReg1 = m_Section->Map_TempReg(x86_Any,m_Opcode.base,FALSE); } - UnProtectGPR(m_Section,Opcode.base); + UnProtectGPR(m_Opcode.base); } else { - TempReg1 = Map_TempReg(m_Section,x86_Any,Opcode.base,FALSE); - if (Opcode.immediate == 0) { - } else if (Opcode.immediate == 1) { - IncX86reg(TempReg1); - } else if (Opcode.immediate == 0xFFFF) { - DecX86reg(TempReg1); - } else { - AddConstToX86Reg(TempReg1,(short)Opcode.immediate); - } + TempReg1 = m_Section->Map_TempReg(x86_Any,m_Opcode.base,FALSE); + AddConstToX86Reg(TempReg1,(short)m_Opcode.immediate); } - if (UseTlb) { - TempReg2 = Map_TempReg(m_Section,x86_Any,-1,FALSE); + if (g_UseTlb) { + TempReg2 = m_Section->Map_TempReg(x86_Any,-1,FALSE); MoveX86RegToX86Reg(TempReg1, TempReg2); ShiftRightUnsignImmed(TempReg2,12); MoveVariableDispToX86Reg(TLB_ReadMap,"TLB_ReadMap",TempReg2,TempReg2,4); CompileReadTLBMiss(m_Section,TempReg1,TempReg2); } - Offset = Map_TempReg(m_Section,x86_Any,-1,FALSE); + Offset = m_Section->Map_TempReg(x86_Any,-1,FALSE); MoveX86RegToX86Reg(TempReg1, Offset); AndConstToX86Reg(Offset,3); AndConstToX86Reg(TempReg1,~3); - Map_GPR_32bit(m_Section,Opcode.rt,TRUE,Opcode.rt); - AndVariableDispToX86Reg(LWL_MASK,"LWL_MASK",m_Section->MipsRegLo(Opcode.rt),Offset,4); + Map_GPR_32bit(m_Opcode.rt,TRUE,m_Opcode.rt); + AndVariableDispToX86Reg(LWL_MASK,"LWL_MASK",cMipsRegLo(m_Opcode.rt),Offset,4); MoveVariableDispToX86Reg(LWL_SHIFT,"LWL_SHIFT",shift,Offset,4); - if (UseTlb) { + if (g_UseTlb) { MoveX86regPointerToX86reg(TempReg1, TempReg2,TempReg1); } else { AndConstToX86Reg(TempReg1,0x1FFFFFFF); MoveN64MemToX86reg(TempReg1,TempReg1); } ShiftLeftSign(TempReg1); - AddX86RegToX86Reg(m_Section->MipsRegLo(Opcode.rt),TempReg1); + AddX86RegToX86Reg(cMipsRegLo(m_Opcode.rt),TempReg1); +#endif } -void CRecompilerOps::Compile_LW (CCodeSection * m_Section) +void CRecompilerOps::LW (void) { - CPU_Message(" %X %s",m_Section->CompilePC,R4300iOpcodeName(Opcode.Hex,m_Section->CompilePC)); + CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC)); - if (Opcode.rt == 0) return; + if (m_Opcode.rt == 0) return; - _Notify->BreakPoint(__FILE__,__LINE__); + x86Reg TempReg1, TempReg2; #ifdef tofix - DWORD TempReg1, TempReg2; - if (Opcode.base == 29 && SPHack) { + if (m_Opcode.base == 29 && SPHack) { char String[100]; - Map_GPR_32bit(m_Section,Opcode.rt,TRUE,-1); + Map_GPR_32bit(m_Opcode.rt,TRUE,-1); TempReg1 = Map_MemoryStack(m_Section,x86_Any,true); - sprintf(String,"%Xh",(short)Opcode.offset); - MoveVariableDispToX86Reg((void *)((DWORD)(short)Opcode.offset),String,m_Section->MipsRegLo(Opcode.rt),TempReg1,1); + sprintf(String,"%Xh",(short)m_Opcode.offset); + MoveVariableDispToX86Reg((void *)((DWORD)(short)m_Opcode.offset),String,cMipsRegLo(m_Opcode.rt),TempReg1,1); } else { - if (m_Section->IsConst(Opcode.base)) { - DWORD Address = m_Section->MipsRegLo(Opcode.base) + (short)Opcode.offset; - Map_GPR_32bit(m_Section,Opcode.rt,TRUE,-1); - _MMU->Compile_LW(m_Section, m_Section->MipsRegLo(Opcode.rt),Address); +#endif + if (IsConst(m_Opcode.base)) { + DWORD Address = cMipsRegLo(m_Opcode.base) + (short)m_Opcode.offset; + Map_GPR_32bit(m_Opcode.rt,TRUE,-1); + _MMU->Compile_LW(m_Section, cMipsRegMapLo(m_Opcode.rt),Address); } else { - if (UseTlb) { - if (m_Section->IsMapped(Opcode.rt)) { ProtectGPR(m_Section,Opcode.rt); } - if (m_Section->IsMapped(Opcode.base) && Opcode.offset == 0) { - ProtectGPR(m_Section,Opcode.base); - TempReg1 = m_Section->MipsRegLo(Opcode.base); + if (g_UseTlb) { + if (IsMapped(m_Opcode.rt)) { ProtectGPR(m_Opcode.rt); } + if (IsMapped(m_Opcode.base) && m_Opcode.offset == 0) { + ProtectGPR(m_Opcode.base); + TempReg1 = cMipsRegMapLo(m_Opcode.base); } else { - if (m_Section->IsMapped(Opcode.base)) { - ProtectGPR(m_Section,Opcode.base); - if (Opcode.offset != 0) { - TempReg1 = Map_TempReg(m_Section,x86_Any,-1,FALSE); - LeaSourceAndOffset(TempReg1,m_Section->MipsRegLo(Opcode.base),(short)Opcode.offset); + if (IsMapped(m_Opcode.base)) { + ProtectGPR(m_Opcode.base); + if (m_Opcode.offset != 0) { + TempReg1 = m_Section->Map_TempReg(x86_Any,-1,FALSE); + LeaSourceAndOffset(TempReg1,cMipsRegMapLo(m_Opcode.base),(short)m_Opcode.offset); } else { - TempReg1 = Map_TempReg(m_Section,x86_Any,Opcode.base,FALSE); + TempReg1 = m_Section->Map_TempReg(x86_Any,m_Opcode.base,FALSE); } } else { - TempReg1 = Map_TempReg(m_Section,x86_Any,Opcode.base,FALSE); - if (Opcode.immediate == 0) { - } else if (Opcode.immediate == 1) { - IncX86reg(TempReg1); - } else if (Opcode.immediate == 0xFFFF) { - DecX86reg(TempReg1); - } else { - AddConstToX86Reg(TempReg1,(short)Opcode.immediate); - } + TempReg1 = m_Section->Map_TempReg(x86_Any,m_Opcode.base,FALSE); + AddConstToX86Reg(TempReg1,(short)m_Opcode.immediate); } } - TempReg2 = Map_TempReg(m_Section,x86_Any,-1,FALSE); + TempReg2 = m_Section->Map_TempReg(x86_Any,-1,FALSE); MoveX86RegToX86Reg(TempReg1, TempReg2); ShiftRightUnsignImmed(TempReg2,12); - MoveVariableDispToX86Reg(TLB_ReadMap,"TLB_ReadMap",TempReg2,TempReg2,4); + MoveVariableDispToX86Reg(g_TLB_ReadMap,"TLB_ReadMap",TempReg2,TempReg2,4); CompileReadTLBMiss(m_Section,TempReg1,TempReg2); - Map_GPR_32bit(m_Section,Opcode.rt,TRUE,-1); - MoveX86regPointerToX86reg(TempReg1, TempReg2,m_Section->MipsRegLo(Opcode.rt)); + Map_GPR_32bit(m_Opcode.rt,TRUE,-1); + MoveX86regPointerToX86reg(TempReg1, TempReg2,cMipsRegMapLo(m_Opcode.rt)); } else { - if (m_Section->IsMapped(Opcode.base)) { - ProtectGPR(m_Section,Opcode.base); - if (Opcode.offset != 0) { - Map_GPR_32bit(m_Section,Opcode.rt,TRUE,-1); - LeaSourceAndOffset(m_Section->MipsRegLo(Opcode.rt),m_Section->MipsRegLo(Opcode.base),(short)Opcode.offset); + if (IsMapped(m_Opcode.base)) { + ProtectGPR(m_Opcode.base); + if (m_Opcode.offset != 0) { + Map_GPR_32bit(m_Opcode.rt,TRUE,-1); + LeaSourceAndOffset(cMipsRegMapLo(m_Opcode.rt),cMipsRegMapLo(m_Opcode.base),(short)m_Opcode.offset); } else { - Map_GPR_32bit(m_Section,Opcode.rt,TRUE,Opcode.base); + Map_GPR_32bit(m_Opcode.rt,TRUE,m_Opcode.base); } } else { - Map_GPR_32bit(m_Section,Opcode.rt,TRUE,Opcode.base); - if (Opcode.immediate == 0) { - } else if (Opcode.immediate == 1) { - IncX86reg(m_Section->MipsRegLo(Opcode.rt)); - } else if (Opcode.immediate == 0xFFFF) { - DecX86reg(m_Section->MipsRegLo(Opcode.rt)); - } else { - AddConstToX86Reg(m_Section->MipsRegLo(Opcode.rt),(short)Opcode.immediate); - } + Map_GPR_32bit(m_Opcode.rt,TRUE,m_Opcode.base); + AddConstToX86Reg(cMipsRegMapLo(m_Opcode.rt),(short)m_Opcode.immediate); } - AndConstToX86Reg(m_Section->MipsRegLo(Opcode.rt),0x1FFFFFFF); - MoveN64MemToX86reg(m_Section->MipsRegLo(Opcode.rt),m_Section->MipsRegLo(Opcode.rt)); + AndConstToX86Reg(cMipsRegMapLo(m_Opcode.rt),0x1FFFFFFF); + MoveN64MemToX86reg(cMipsRegMapLo(m_Opcode.rt),cMipsRegMapLo(m_Opcode.rt)); } } +#ifdef tofix } - if (SPHack && Opcode.rt == 29) + if (SPHack && m_Opcode.rt == 29) { m_Section->ResetX86Protection(); _MMU->ResetMemoryStack(m_Section); @@ -1750,265 +1776,244 @@ void CRecompilerOps::Compile_LW (CCodeSection * m_Section) #endif } -void CRecompilerOps::Compile_LBU (CCodeSection * m_Section) { +void CRecompilerOps::LBU (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix DWORD TempReg1, TempReg2; - CPU_Message(" %X %s",m_Section->CompilePC,R4300iOpcodeName(Opcode.Hex,m_Section->CompilePC)); + CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC)); - if (Opcode.rt == 0) return; + if (m_Opcode.rt == 0) return; - if (m_Section->IsConst(Opcode.base)) { - DWORD Address = (m_Section->MipsRegLo(Opcode.base) + (short)Opcode.offset) ^ 3; - Map_GPR_32bit(m_Section,Opcode.rt,FALSE,0); - _MMU->Compile_LB(m_Section->MipsRegLo(Opcode.rt),Address,FALSE); + if (IsConst(m_Opcode.base)) { + DWORD Address = (cMipsRegLo(m_Opcode.base) + (short)m_Opcode.offset) ^ 3; + Map_GPR_32bit(m_Opcode.rt,FALSE,0); + _MMU->Compile_LB(cMipsRegLo(m_Opcode.rt),Address,FALSE); return; } - if (m_Section->IsMapped(Opcode.rt)) { ProtectGPR(m_Section,Opcode.rt); } - if (m_Section->IsMapped(Opcode.base)) { - ProtectGPR(m_Section,Opcode.base); - if (Opcode.offset != 0) { - TempReg1 = Map_TempReg(m_Section,x86_Any,-1,FALSE); - LeaSourceAndOffset(TempReg1,m_Section->MipsRegLo(Opcode.base),(short)Opcode.offset); + if (IsMapped(m_Opcode.rt)) { ProtectGPR(m_Opcode.rt); } + if (IsMapped(m_Opcode.base)) { + ProtectGPR(m_Opcode.base); + if (m_Opcode.offset != 0) { + TempReg1 = m_Section->Map_TempReg(x86_Any,-1,FALSE); + LeaSourceAndOffset(TempReg1,cMipsRegLo(m_Opcode.base),(short)m_Opcode.offset); } else { - TempReg1 = Map_TempReg(m_Section,x86_Any,Opcode.base,FALSE); + TempReg1 = m_Section->Map_TempReg(x86_Any,m_Opcode.base,FALSE); } } else { - TempReg1 = Map_TempReg(m_Section,x86_Any,Opcode.base,FALSE); - if (Opcode.immediate == 0) { - } else if (Opcode.immediate == 1) { - IncX86reg(TempReg1); - } else if (Opcode.immediate == 0xFFFF) { - DecX86reg(TempReg1); - } else { - AddConstToX86Reg(TempReg1,(short)Opcode.immediate); - } + TempReg1 = m_Section->Map_TempReg(x86_Any,m_Opcode.base,FALSE); + AddConstToX86Reg(TempReg1,(short)m_Opcode.immediate); } - if (UseTlb) { - TempReg2 = Map_TempReg(m_Section,x86_Any,-1,FALSE); + if (g_UseTlb) { + TempReg2 = m_Section->Map_TempReg(x86_Any,-1,FALSE); MoveX86RegToX86Reg(TempReg1, TempReg2); ShiftRightUnsignImmed(TempReg2,12); MoveVariableDispToX86Reg(TLB_ReadMap,"TLB_ReadMap",TempReg2,TempReg2,4); CompileReadTLBMiss(m_Section,TempReg1,TempReg2); XorConstToX86Reg(TempReg1,3); - Map_GPR_32bit(m_Section,Opcode.rt,FALSE,-1); - MoveZxByteX86regPointerToX86reg(TempReg1, TempReg2,m_Section->MipsRegLo(Opcode.rt)); + Map_GPR_32bit(m_Opcode.rt,FALSE,-1); + MoveZxByteX86regPointerToX86reg(TempReg1, TempReg2,cMipsRegLo(m_Opcode.rt)); } else { AndConstToX86Reg(TempReg1,0x1FFFFFFF); XorConstToX86Reg(TempReg1,3); - Map_GPR_32bit(m_Section,Opcode.rt,FALSE,-1); - MoveZxN64MemToX86regByte(m_Section->MipsRegLo(Opcode.rt), TempReg1); + Map_GPR_32bit(m_Opcode.rt,FALSE,-1); + MoveZxN64MemToX86regByte(cMipsRegLo(m_Opcode.rt), TempReg1); } +#endif } -void CRecompilerOps::Compile_LHU (CCodeSection * m_Section) { +void CRecompilerOps::LHU (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix DWORD TempReg1, TempReg2; - CPU_Message(" %X %s",m_Section->CompilePC,R4300iOpcodeName(Opcode.Hex,m_Section->CompilePC)); + CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC)); - if (Opcode.rt == 0) return; + if (m_Opcode.rt == 0) return; - if (m_Section->IsConst(Opcode.base)) { - DWORD Address = (m_Section->MipsRegLo(Opcode.base) + (short)Opcode.offset) ^ 2; - Map_GPR_32bit(m_Section,Opcode.rt,FALSE,0); - _MMU->Compile_LH(m_Section->MipsRegLo(Opcode.rt),Address,FALSE); + if (IsConst(m_Opcode.base)) { + DWORD Address = (cMipsRegLo(m_Opcode.base) + (short)m_Opcode.offset) ^ 2; + Map_GPR_32bit(m_Opcode.rt,FALSE,0); + _MMU->Compile_LH(cMipsRegLo(m_Opcode.rt),Address,FALSE); return; } - if (m_Section->IsMapped(Opcode.rt)) { ProtectGPR(m_Section,Opcode.rt); } - if (m_Section->IsMapped(Opcode.base)) { - ProtectGPR(m_Section,Opcode.base); - if (Opcode.offset != 0) { - TempReg1 = Map_TempReg(m_Section,x86_Any,-1,FALSE); - LeaSourceAndOffset(TempReg1,m_Section->MipsRegLo(Opcode.base),(short)Opcode.offset); + if (IsMapped(m_Opcode.rt)) { ProtectGPR(m_Opcode.rt); } + if (IsMapped(m_Opcode.base)) { + ProtectGPR(m_Opcode.base); + if (m_Opcode.offset != 0) { + TempReg1 = m_Section->Map_TempReg(x86_Any,-1,FALSE); + LeaSourceAndOffset(TempReg1,cMipsRegLo(m_Opcode.base),(short)m_Opcode.offset); } else { - TempReg1 = Map_TempReg(m_Section,x86_Any,Opcode.base,FALSE); + TempReg1 = m_Section->Map_TempReg(x86_Any,m_Opcode.base,FALSE); } } else { - TempReg1 = Map_TempReg(m_Section,x86_Any,Opcode.base,FALSE); - if (Opcode.immediate == 0) { - } else if (Opcode.immediate == 1) { - IncX86reg(TempReg1); - } else if (Opcode.immediate == 0xFFFF) { - DecX86reg(TempReg1); - } else { - AddConstToX86Reg(TempReg1,(short)Opcode.immediate); - } + TempReg1 = m_Section->Map_TempReg(x86_Any,m_Opcode.base,FALSE); + AddConstToX86Reg(TempReg1,(short)m_Opcode.immediate); } - if (UseTlb) { - TempReg2 = Map_TempReg(m_Section,x86_Any,-1,FALSE); + if (g_UseTlb) { + TempReg2 = m_Section->Map_TempReg(x86_Any,-1,FALSE); MoveX86RegToX86Reg(TempReg1, TempReg2); ShiftRightUnsignImmed(TempReg2,12); MoveVariableDispToX86Reg(TLB_ReadMap,"TLB_ReadMap",TempReg2,TempReg2,4); CompileReadTLBMiss(m_Section,TempReg1,TempReg2); XorConstToX86Reg(TempReg1,2); - Map_GPR_32bit(m_Section,Opcode.rt,FALSE,-1); - MoveZxHalfX86regPointerToX86reg(TempReg1, TempReg2,m_Section->MipsRegLo(Opcode.rt)); + Map_GPR_32bit(m_Opcode.rt,FALSE,-1); + MoveZxHalfX86regPointerToX86reg(TempReg1, TempReg2,cMipsRegLo(m_Opcode.rt)); } else { AndConstToX86Reg(TempReg1,0x1FFFFFFF); XorConstToX86Reg(TempReg1,2); - Map_GPR_32bit(m_Section,Opcode.rt,TRUE,-1); - MoveZxN64MemToX86regHalf(m_Section->MipsRegLo(Opcode.rt), TempReg1); + Map_GPR_32bit(m_Opcode.rt,TRUE,-1); + MoveZxN64MemToX86regHalf(cMipsRegLo(m_Opcode.rt), TempReg1); } +#endif } -void CRecompilerOps::Compile_LWR (CCodeSection * m_Section) { +void CRecompilerOps::LWR (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix DWORD TempReg1, TempReg2, Offset, shift; - CPU_Message(" %X %s",m_Section->CompilePC,R4300iOpcodeName(Opcode.Hex,m_Section->CompilePC)); + CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC)); - if (Opcode.rt == 0) return; + if (m_Opcode.rt == 0) return; - if (m_Section->IsConst(Opcode.base)) { + if (IsConst(m_Opcode.base)) { DWORD Address, Value; - Address = m_Section->MipsRegLo(Opcode.base) + (short)Opcode.offset; + Address = cMipsRegLo(m_Opcode.base) + (short)m_Opcode.offset; Offset = Address & 3; - Map_GPR_32bit(m_Section,Opcode.rt,TRUE,Opcode.rt); - Value = Map_TempReg(m_Section,x86_Any,-1,FALSE); + Map_GPR_32bit(m_Opcode.rt,TRUE,m_Opcode.rt); + Value = m_Section->Map_TempReg(x86_Any,-1,FALSE); _MMU->Compile_LW(m_Section, Value,(Address & ~3)); - AndConstToX86Reg(m_Section->MipsRegLo(Opcode.rt),LWR_MASK[Offset]); + AndConstToX86Reg(cMipsRegLo(m_Opcode.rt),LWR_MASK[Offset]); ShiftRightUnsignImmed(Value,(BYTE)LWR_SHIFT[Offset]); - AddX86RegToX86Reg(m_Section->MipsRegLo(Opcode.rt),Value); + AddX86RegToX86Reg(cMipsRegLo(m_Opcode.rt),Value); return; } - shift = Map_TempReg(m_Section,x86_ECX,-1,FALSE); - if (m_Section->IsMapped(Opcode.rt)) { ProtectGPR(m_Section,Opcode.rt); } - if (m_Section->IsMapped(Opcode.base)) { - ProtectGPR(m_Section,Opcode.base); - if (Opcode.offset != 0) { - TempReg1 = Map_TempReg(m_Section,x86_Any,-1,FALSE); - LeaSourceAndOffset(TempReg1,m_Section->MipsRegLo(Opcode.base),(short)Opcode.offset); + shift = m_Section->Map_TempReg(x86_ECX,-1,FALSE); + if (IsMapped(m_Opcode.rt)) { ProtectGPR(m_Opcode.rt); } + if (IsMapped(m_Opcode.base)) { + ProtectGPR(m_Opcode.base); + if (m_Opcode.offset != 0) { + TempReg1 = m_Section->Map_TempReg(x86_Any,-1,FALSE); + LeaSourceAndOffset(TempReg1,cMipsRegLo(m_Opcode.base),(short)m_Opcode.offset); } else { - TempReg1 = Map_TempReg(m_Section,x86_Any,Opcode.base,FALSE); + TempReg1 = m_Section->Map_TempReg(x86_Any,m_Opcode.base,FALSE); } - UnProtectGPR(m_Section,Opcode.base); + UnProtectGPR(m_Opcode.base); } else { - TempReg1 = Map_TempReg(m_Section,x86_Any,Opcode.base,FALSE); - if (Opcode.immediate == 0) { - } else if (Opcode.immediate == 1) { - IncX86reg(TempReg1); - } else if (Opcode.immediate == 0xFFFF) { - DecX86reg(TempReg1); - } else { - AddConstToX86Reg(TempReg1,(short)Opcode.immediate); - } + TempReg1 = m_Section->Map_TempReg(x86_Any,m_Opcode.base,FALSE); + AddConstToX86Reg(TempReg1,(short)m_Opcode.immediate); } - if (UseTlb) { - TempReg2 = Map_TempReg(m_Section,x86_Any,-1,FALSE); + if (g_UseTlb) { + TempReg2 = m_Section->Map_TempReg(x86_Any,-1,FALSE); MoveX86RegToX86Reg(TempReg1, TempReg2); ShiftRightUnsignImmed(TempReg2,12); MoveVariableDispToX86Reg(TLB_ReadMap,"TLB_ReadMap",TempReg2,TempReg2,4); CompileReadTLBMiss(m_Section,TempReg1,TempReg2); } - Offset = Map_TempReg(m_Section,x86_Any,-1,FALSE); + Offset = m_Section->Map_TempReg(x86_Any,-1,FALSE); MoveX86RegToX86Reg(TempReg1, Offset); AndConstToX86Reg(Offset,3); AndConstToX86Reg(TempReg1,~3); - Map_GPR_32bit(m_Section,Opcode.rt,TRUE,Opcode.rt); - AndVariableDispToX86Reg(LWR_MASK,"LWR_MASK",m_Section->MipsRegLo(Opcode.rt),Offset,4); + Map_GPR_32bit(m_Opcode.rt,TRUE,m_Opcode.rt); + AndVariableDispToX86Reg(LWR_MASK,"LWR_MASK",cMipsRegLo(m_Opcode.rt),Offset,4); MoveVariableDispToX86Reg(LWR_SHIFT,"LWR_SHIFT",shift,Offset,4); - if (UseTlb) { + if (g_UseTlb) { MoveX86regPointerToX86reg(TempReg1, TempReg2,TempReg1); } else { AndConstToX86Reg(TempReg1,0x1FFFFFFF); MoveN64MemToX86reg(TempReg1,TempReg1); } ShiftRightUnsign(TempReg1); - AddX86RegToX86Reg(m_Section->MipsRegLo(Opcode.rt),TempReg1); + AddX86RegToX86Reg(cMipsRegLo(m_Opcode.rt),TempReg1); +#endif } -void CRecompilerOps::Compile_LWU (CCodeSection * m_Section) { //added by Witten +void CRecompilerOps::LWU (void) { //added by Witten + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix DWORD TempReg1, TempReg2; - CPU_Message(" %X %s",m_Section->CompilePC,R4300iOpcodeName(Opcode.Hex,m_Section->CompilePC)); + CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC)); - if (Opcode.rt == 0) return; + if (m_Opcode.rt == 0) return; - if (m_Section->IsConst(Opcode.base)) { - DWORD Address = (m_Section->MipsRegLo(Opcode.base) + (short)Opcode.offset); - Map_GPR_32bit(m_Section,Opcode.rt,FALSE,0); - _MMU->Compile_LW(m_Section, m_Section->MipsRegLo(Opcode.rt),Address); + if (IsConst(m_Opcode.base)) { + DWORD Address = (cMipsRegLo(m_Opcode.base) + (short)m_Opcode.offset); + Map_GPR_32bit(m_Opcode.rt,FALSE,0); + _MMU->Compile_LW(m_Section, cMipsRegLo(m_Opcode.rt),Address); return; } - if (m_Section->IsMapped(Opcode.rt)) { ProtectGPR(m_Section,Opcode.rt); } - if (m_Section->IsMapped(Opcode.base)) { - ProtectGPR(m_Section,Opcode.base); - if (Opcode.offset != 0) { - TempReg1 = Map_TempReg(m_Section,x86_Any,-1,FALSE); - LeaSourceAndOffset(TempReg1,m_Section->MipsRegLo(Opcode.base),(short)Opcode.offset); + if (IsMapped(m_Opcode.rt)) { ProtectGPR(m_Opcode.rt); } + if (IsMapped(m_Opcode.base)) { + ProtectGPR(m_Opcode.base); + if (m_Opcode.offset != 0) { + TempReg1 = m_Section->Map_TempReg(x86_Any,-1,FALSE); + LeaSourceAndOffset(TempReg1,cMipsRegLo(m_Opcode.base),(short)m_Opcode.offset); } else { - TempReg1 = Map_TempReg(m_Section,x86_Any,Opcode.base,FALSE); + TempReg1 = m_Section->Map_TempReg(x86_Any,m_Opcode.base,FALSE); } } else { - TempReg1 = Map_TempReg(m_Section,x86_Any,Opcode.base,FALSE); - if (Opcode.immediate == 0) { - } else if (Opcode.immediate == 1) { - IncX86reg(TempReg1); - } else if (Opcode.immediate == 0xFFFF) { - DecX86reg(TempReg1); - } else { - AddConstToX86Reg(TempReg1,(short)Opcode.immediate); - } + TempReg1 = m_Section->Map_TempReg(x86_Any,m_Opcode.base,FALSE); + AddConstToX86Reg(TempReg1,(short)m_Opcode.immediate); } - if (UseTlb) { - TempReg2 = Map_TempReg(m_Section,x86_Any,-1,FALSE); + if (g_UseTlb) { + TempReg2 = m_Section->Map_TempReg(x86_Any,-1,FALSE); MoveX86RegToX86Reg(TempReg1, TempReg2); ShiftRightUnsignImmed(TempReg2,12); MoveVariableDispToX86Reg(TLB_ReadMap,"TLB_ReadMap",TempReg2,TempReg2,4); CompileReadTLBMiss(m_Section,TempReg1,TempReg2); - Map_GPR_32bit(m_Section,Opcode.rt,FALSE,-1); - MoveZxHalfX86regPointerToX86reg(TempReg1, TempReg2,m_Section->MipsRegLo(Opcode.rt)); + Map_GPR_32bit(m_Opcode.rt,FALSE,-1); + MoveZxHalfX86regPointerToX86reg(TempReg1, TempReg2,cMipsRegLo(m_Opcode.rt)); } else { AndConstToX86Reg(TempReg1,0x1FFFFFFF); - Map_GPR_32bit(m_Section,Opcode.rt,TRUE,-1); - MoveZxN64MemToX86regHalf(m_Section->MipsRegLo(Opcode.rt), TempReg1); + Map_GPR_32bit(m_Opcode.rt,TRUE,-1); + MoveZxN64MemToX86regHalf(cMipsRegLo(m_Opcode.rt), TempReg1); } +#endif } -void CRecompilerOps::Compile_SB (CCodeSection * m_Section){ +void CRecompilerOps::SB (void){ + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix DWORD TempReg1, TempReg2; - CPU_Message(" %X %s",m_Section->CompilePC,R4300iOpcodeName(Opcode.Hex,m_Section->CompilePC)); + CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC)); - if (m_Section->IsConst(Opcode.base)) { - DWORD Address = (m_Section->MipsRegLo(Opcode.base) + (short)Opcode.offset) ^ 3; + if (IsConst(m_Opcode.base)) { + DWORD Address = (cMipsRegLo(m_Opcode.base) + (short)m_Opcode.offset) ^ 3; - if (m_Section->IsConst(Opcode.rt)) { - _MMU->Compile_SB_Const((BYTE)m_Section->MipsRegLo(Opcode.rt), Address); - } else if (m_Section->IsMapped(Opcode.rt) && Is8BitReg(m_Section->MipsRegLo(Opcode.rt))) { - _MMU->Compile_SB_Register(m_Section->MipsRegLo(Opcode.rt), Address); + if (IsConst(m_Opcode.rt)) { + _MMU->Compile_SB_Const((BYTE)cMipsRegLo(m_Opcode.rt), Address); + } else if (IsMapped(m_Opcode.rt) && Is8BitReg(cMipsRegLo(m_Opcode.rt))) { + _MMU->Compile_SB_Register(cMipsRegLo(m_Opcode.rt), Address); } else { - _MMU->Compile_SB_Register(Map_TempReg(m_Section,x86_Any8Bit,Opcode.rt,FALSE), Address); + _MMU->Compile_SB_Register(m_Section->Map_TempReg(x86_Any8Bit,m_Opcode.rt,FALSE), Address); } return; } - if (m_Section->IsMapped(Opcode.rt)) { ProtectGPR(m_Section,Opcode.rt); } - if (m_Section->IsMapped(Opcode.base)) { - ProtectGPR(m_Section,Opcode.base); - if (Opcode.offset != 0) { - TempReg1 = Map_TempReg(m_Section,x86_Any,-1,FALSE); - LeaSourceAndOffset(TempReg1,m_Section->MipsRegLo(Opcode.base),(short)Opcode.offset); + if (IsMapped(m_Opcode.rt)) { ProtectGPR(m_Opcode.rt); } + if (IsMapped(m_Opcode.base)) { + ProtectGPR(m_Opcode.base); + if (m_Opcode.offset != 0) { + TempReg1 = m_Section->Map_TempReg(x86_Any,-1,FALSE); + LeaSourceAndOffset(TempReg1,cMipsRegLo(m_Opcode.base),(short)m_Opcode.offset); } else { - TempReg1 = Map_TempReg(m_Section,x86_Any,Opcode.base,FALSE); + TempReg1 = m_Section->Map_TempReg(x86_Any,m_Opcode.base,FALSE); } - UnProtectGPR(m_Section,Opcode.base); + UnProtectGPR(m_Opcode.base); } else { - TempReg1 = Map_TempReg(m_Section,x86_Any,Opcode.base,FALSE); - if (Opcode.immediate == 0) { - } else if (Opcode.immediate == 1) { - IncX86reg(TempReg1); - } else if (Opcode.immediate == 0xFFFF) { - DecX86reg(TempReg1); - } else { - AddConstToX86Reg(TempReg1,(short)Opcode.immediate); - } + TempReg1 = m_Section->Map_TempReg(x86_Any,m_Opcode.base,FALSE); + AddConstToX86Reg(TempReg1,(short)m_Opcode.immediate); } - if (UseTlb) { - TempReg2 = Map_TempReg(m_Section,x86_Any,-1,FALSE); + if (g_UseTlb) { + TempReg2 = m_Section->Map_TempReg(x86_Any,-1,FALSE); MoveX86RegToX86Reg(TempReg1, TempReg2); ShiftRightUnsignImmed(TempReg2,12); MoveVariableDispToX86Reg(TLB_WriteMap,"TLB_WriteMap",TempReg2,TempReg2,4); @@ -2017,69 +2022,64 @@ void CRecompilerOps::Compile_SB (CCodeSection * m_Section){ //0041C524 75 01 jne 0041C527 XorConstToX86Reg(TempReg1,3); - if (m_Section->IsConst(Opcode.rt)) { - MoveConstByteToX86regPointer((BYTE)m_Section->MipsRegLo(Opcode.rt),TempReg1, TempReg2); - } else if (m_Section->IsMapped(Opcode.rt) && Is8BitReg(m_Section->MipsRegLo(Opcode.rt))) { - MoveX86regByteToX86regPointer(m_Section->MipsRegLo(Opcode.rt),TempReg1, TempReg2); + if (IsConst(m_Opcode.rt)) { + MoveConstByteToX86regPointer((BYTE)cMipsRegLo(m_Opcode.rt),TempReg1, TempReg2); + } else if (IsMapped(m_Opcode.rt) && Is8BitReg(cMipsRegLo(m_Opcode.rt))) { + MoveX86regByteToX86regPointer(cMipsRegLo(m_Opcode.rt),TempReg1, TempReg2); } else { - UnProtectGPR(m_Section,Opcode.rt); - MoveX86regByteToX86regPointer(Map_TempReg(m_Section,x86_Any8Bit,Opcode.rt,FALSE),TempReg1, TempReg2); + UnProtectGPR(m_Opcode.rt); + MoveX86regByteToX86regPointer(m_Section->Map_TempReg(x86_Any8Bit,m_Opcode.rt,FALSE),TempReg1, TempReg2); } } else { AndConstToX86Reg(TempReg1,0x1FFFFFFF); XorConstToX86Reg(TempReg1,3); - if (m_Section->IsConst(Opcode.rt)) { - MoveConstByteToN64Mem((BYTE)m_Section->MipsRegLo(Opcode.rt),TempReg1); - } else if (m_Section->IsMapped(Opcode.rt) && Is8BitReg(m_Section->MipsRegLo(Opcode.rt))) { - MoveX86regByteToN64Mem(m_Section->MipsRegLo(Opcode.rt),TempReg1); + if (IsConst(m_Opcode.rt)) { + MoveConstByteToN64Mem((BYTE)cMipsRegLo(m_Opcode.rt),TempReg1); + } else if (IsMapped(m_Opcode.rt) && Is8BitReg(cMipsRegLo(m_Opcode.rt))) { + MoveX86regByteToN64Mem(cMipsRegLo(m_Opcode.rt),TempReg1); } else { - UnProtectGPR(m_Section,Opcode.rt); - MoveX86regByteToN64Mem(Map_TempReg(m_Section,x86_Any8Bit,Opcode.rt,FALSE),TempReg1); + UnProtectGPR(m_Opcode.rt); + MoveX86regByteToN64Mem(m_Section->Map_TempReg(x86_Any8Bit,m_Opcode.rt,FALSE),TempReg1); } } - +#endif } -void CRecompilerOps::Compile_SH (CCodeSection * m_Section){ +void CRecompilerOps::SH (void){ + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix DWORD TempReg1, TempReg2; - CPU_Message(" %X %s",m_Section->CompilePC,R4300iOpcodeName(Opcode.Hex,m_Section->CompilePC)); + CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC)); - if (m_Section->IsConst(Opcode.base)) { - DWORD Address = (m_Section->MipsRegLo(Opcode.base) + (short)Opcode.offset) ^ 2; + if (IsConst(m_Opcode.base)) { + DWORD Address = (cMipsRegLo(m_Opcode.base) + (short)m_Opcode.offset) ^ 2; - if (m_Section->IsConst(Opcode.rt)) { - _MMU->Compile_SH_Const((WORD)m_Section->MipsRegLo(Opcode.rt), Address); - } else if (m_Section->IsMapped(Opcode.rt)) { - _MMU->Compile_SH_Register(m_Section->MipsRegLo(Opcode.rt), Address); + if (IsConst(m_Opcode.rt)) { + _MMU->Compile_SH_Const((WORD)cMipsRegLo(m_Opcode.rt), Address); + } else if (IsMapped(m_Opcode.rt)) { + _MMU->Compile_SH_Register(cMipsRegLo(m_Opcode.rt), Address); } else { - _MMU->Compile_SH_Register(Map_TempReg(m_Section,x86_Any,Opcode.rt,FALSE), Address); + _MMU->Compile_SH_Register(m_Section->Map_TempReg(x86_Any,m_Opcode.rt,FALSE), Address); } return; } - if (m_Section->IsMapped(Opcode.rt)) { ProtectGPR(m_Section,Opcode.rt); } - if (m_Section->IsMapped(Opcode.base)) { - ProtectGPR(m_Section,Opcode.base); - if (Opcode.offset != 0) { - TempReg1 = Map_TempReg(m_Section,x86_Any,-1,FALSE); - LeaSourceAndOffset(TempReg1,m_Section->MipsRegLo(Opcode.base),(short)Opcode.offset); + if (IsMapped(m_Opcode.rt)) { ProtectGPR(m_Opcode.rt); } + if (IsMapped(m_Opcode.base)) { + ProtectGPR(m_Opcode.base); + if (m_Opcode.offset != 0) { + TempReg1 = m_Section->Map_TempReg(x86_Any,-1,FALSE); + LeaSourceAndOffset(TempReg1,cMipsRegLo(m_Opcode.base),(short)m_Opcode.offset); } else { - TempReg1 = Map_TempReg(m_Section,x86_Any,Opcode.base,FALSE); + TempReg1 = m_Section->Map_TempReg(x86_Any,m_Opcode.base,FALSE); } - UnProtectGPR(m_Section,Opcode.base); + UnProtectGPR(m_Opcode.base); } else { - TempReg1 = Map_TempReg(m_Section,x86_Any,Opcode.base,FALSE); - if (Opcode.immediate == 0) { - } else if (Opcode.immediate == 1) { - IncX86reg(TempReg1); - } else if (Opcode.immediate == 0xFFFF) { - DecX86reg(TempReg1); - } else { - AddConstToX86Reg(TempReg1,(short)Opcode.immediate); - } + TempReg1 = m_Section->Map_TempReg(x86_Any,m_Opcode.base,FALSE); + AddConstToX86Reg(TempReg1,(short)m_Opcode.immediate); } - if (UseTlb) { - TempReg2 = Map_TempReg(m_Section,x86_Any,-1,FALSE); + if (g_UseTlb) { + TempReg2 = m_Section->Map_TempReg(x86_Any,-1,FALSE); MoveX86RegToX86Reg(TempReg1, TempReg2); ShiftRightUnsignImmed(TempReg2,12); MoveVariableDispToX86Reg(TLB_WriteMap,"TLB_WriteMap",TempReg2,TempReg2,4); @@ -2088,69 +2088,65 @@ void CRecompilerOps::Compile_SH (CCodeSection * m_Section){ //0041C524 75 01 jne 0041C527 XorConstToX86Reg(TempReg1,2); - if (m_Section->IsConst(Opcode.rt)) { - MoveConstHalfToX86regPointer((WORD)m_Section->MipsRegLo(Opcode.rt),TempReg1, TempReg2); - } else if (m_Section->IsMapped(Opcode.rt)) { - MoveX86regHalfToX86regPointer(m_Section->MipsRegLo(Opcode.rt),TempReg1, TempReg2); + if (IsConst(m_Opcode.rt)) { + MoveConstHalfToX86regPointer((WORD)cMipsRegLo(m_Opcode.rt),TempReg1, TempReg2); + } else if (IsMapped(m_Opcode.rt)) { + MoveX86regHalfToX86regPointer(cMipsRegLo(m_Opcode.rt),TempReg1, TempReg2); } else { - MoveX86regHalfToX86regPointer(Map_TempReg(m_Section,x86_Any,Opcode.rt,FALSE),TempReg1, TempReg2); + MoveX86regHalfToX86regPointer(m_Section->Map_TempReg(x86_Any,m_Opcode.rt,FALSE),TempReg1, TempReg2); } } else { AndConstToX86Reg(TempReg1,0x1FFFFFFF); XorConstToX86Reg(TempReg1,2); - if (m_Section->IsConst(Opcode.rt)) { - MoveConstHalfToN64Mem((WORD)m_Section->MipsRegLo(Opcode.rt),TempReg1); - } else if (m_Section->IsMapped(Opcode.rt)) { - MoveX86regHalfToN64Mem(m_Section->MipsRegLo(Opcode.rt),TempReg1); + if (IsConst(m_Opcode.rt)) { + MoveConstHalfToN64Mem((WORD)cMipsRegLo(m_Opcode.rt),TempReg1); + } else if (IsMapped(m_Opcode.rt)) { + MoveX86regHalfToN64Mem(cMipsRegLo(m_Opcode.rt),TempReg1); } else { - MoveX86regHalfToN64Mem(Map_TempReg(m_Section,x86_Any,Opcode.rt,FALSE),TempReg1); + MoveX86regHalfToN64Mem(m_Section->Map_TempReg(x86_Any,m_Opcode.rt,FALSE),TempReg1); } } +#endif } -void CRecompilerOps::Compile_SWL (CCodeSection * m_Section) { +void CRecompilerOps::SWL (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix DWORD TempReg1, TempReg2, Value, Offset, shift; - CPU_Message(" %X %s",m_Section->CompilePC,R4300iOpcodeName(Opcode.Hex,m_Section->CompilePC)); + CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC)); - if (m_Section->IsConst(Opcode.base)) { + if (IsConst(m_Opcode.base)) { DWORD Address; - Address = m_Section->MipsRegLo(Opcode.base) + (short)Opcode.offset; + Address = cMipsRegLo(m_Opcode.base) + (short)m_Opcode.offset; Offset = Address & 3; - Value = Map_TempReg(m_Section,x86_Any,-1,FALSE); + Value = m_Section->Map_TempReg(x86_Any,-1,FALSE); _MMU->Compile_LW(m_Section, Value,(Address & ~3)); AndConstToX86Reg(Value,SWL_MASK[Offset]); - TempReg1 = Map_TempReg(m_Section,x86_Any,Opcode.rt,FALSE); + TempReg1 = m_Section->Map_TempReg(x86_Any,m_Opcode.rt,FALSE); ShiftRightUnsignImmed(TempReg1,(BYTE)SWL_SHIFT[Offset]); AddX86RegToX86Reg(Value,TempReg1); _MMU->Compile_SW_Register(m_Section,Value, (Address & ~3)); return; } - shift = Map_TempReg(m_Section,x86_ECX,-1,FALSE); - if (m_Section->IsMapped(Opcode.base)) { - ProtectGPR(m_Section,Opcode.base); - if (Opcode.offset != 0) { - TempReg1 = Map_TempReg(m_Section,x86_Any,-1,FALSE); - LeaSourceAndOffset(TempReg1,m_Section->MipsRegLo(Opcode.base),(short)Opcode.offset); + shift = m_Section->Map_TempReg(x86_ECX,-1,FALSE); + if (IsMapped(m_Opcode.base)) { + ProtectGPR(m_Opcode.base); + if (m_Opcode.offset != 0) { + TempReg1 = m_Section->Map_TempReg(x86_Any,-1,FALSE); + LeaSourceAndOffset(TempReg1,cMipsRegLo(m_Opcode.base),(short)m_Opcode.offset); } else { - TempReg1 = Map_TempReg(m_Section,x86_Any,Opcode.base,FALSE); + TempReg1 = m_Section->Map_TempReg(x86_Any,m_Opcode.base,FALSE); } - UnProtectGPR(m_Section,Opcode.base); + UnProtectGPR(m_Opcode.base); } else { - TempReg1 = Map_TempReg(m_Section,x86_Any,Opcode.base,FALSE); - if (Opcode.immediate == 0) { - } else if (Opcode.immediate == 1) { - IncX86reg(TempReg1); - } else if (Opcode.immediate == 0xFFFF) { - DecX86reg(TempReg1); - } else { - AddConstToX86Reg(TempReg1,(short)Opcode.immediate); - } + TempReg1 = m_Section->Map_TempReg(x86_Any,m_Opcode.base,FALSE); + AddConstToX86Reg(TempReg1,(short)m_Opcode.immediate); } - if (UseTlb) { - TempReg2 = Map_TempReg(m_Section,x86_Any,-1,FALSE); + if (g_UseTlb) { + TempReg2 = m_Section->Map_TempReg(x86_Any,-1,FALSE); MoveX86RegToX86Reg(TempReg1, TempReg2); ShiftRightUnsignImmed(TempReg2,12); MoveVariableDispToX86Reg(TLB_ReadMap,"TLB_ReadMap",TempReg2,TempReg2,4); @@ -2160,13 +2156,13 @@ void CRecompilerOps::Compile_SWL (CCodeSection * m_Section) { //0041C524 75 01 jne 0041C527 } - Offset = Map_TempReg(m_Section,x86_Any,-1,FALSE); + Offset = m_Section->Map_TempReg(x86_Any,-1,FALSE); MoveX86RegToX86Reg(TempReg1, Offset); AndConstToX86Reg(Offset,3); AndConstToX86Reg(TempReg1,~3); - Value = Map_TempReg(m_Section,x86_Any,-1,FALSE); - if (UseTlb) { + Value = m_Section->Map_TempReg(x86_Any,-1,FALSE); + if (g_UseTlb) { MoveX86regPointerToX86reg(TempReg1, TempReg2,Value); } else { AndConstToX86Reg(TempReg1,0x1FFFFFFF); @@ -2174,20 +2170,20 @@ void CRecompilerOps::Compile_SWL (CCodeSection * m_Section) { } AndVariableDispToX86Reg(SWL_MASK,"SWL_MASK",Value,Offset,4); - if (!m_Section->IsConst(Opcode.rt) || m_Section->MipsRegLo(Opcode.rt) != 0) { + if (!IsConst(m_Opcode.rt) || cMipsRegLo(m_Opcode.rt) != 0) { MoveVariableDispToX86Reg(SWL_SHIFT,"SWL_SHIFT",shift,Offset,4); - if (m_Section->IsConst(Opcode.rt)) { - MoveConstToX86reg(m_Section->MipsRegLo(Opcode.rt),Offset); - } else if (m_Section->IsMapped(Opcode.rt)) { - MoveX86RegToX86Reg(m_Section->MipsRegLo(Opcode.rt),Offset); + if (IsConst(m_Opcode.rt)) { + MoveConstToX86reg(cMipsRegLo(m_Opcode.rt),Offset); + } else if (IsMapped(m_Opcode.rt)) { + MoveX86RegToX86Reg(cMipsRegLo(m_Opcode.rt),Offset); } else { - MoveVariableToX86reg(&_GPR[Opcode.rt].UW[0],CRegName::GPR_Lo[Opcode.rt],Offset); + MoveVariableToX86reg(&_GPR[m_Opcode.rt].UW[0],CRegName::GPR_Lo[m_Opcode.rt],Offset); } ShiftRightUnsign(Offset); AddX86RegToX86Reg(Value,Offset); } - if (UseTlb) { + if (g_UseTlb) { MoveX86RegToX86Reg(TempReg1, TempReg2); ShiftRightUnsignImmed(TempReg2,12); MoveVariableDispToX86Reg(TLB_WriteMap,"TLB_WriteMap",TempReg2,TempReg2,4); @@ -2196,63 +2192,58 @@ void CRecompilerOps::Compile_SWL (CCodeSection * m_Section) { } else { MoveX86regToN64Mem(Value,TempReg1); } +#endif } -void CRecompilerOps::Compile_SW (CCodeSection * m_Section){ - - CPU_Message(" %X %s",m_Section->CompilePC,R4300iOpcodeName(Opcode.Hex,m_Section->CompilePC)); - +void CRecompilerOps::SW (void){ _Notify->BreakPoint(__FILE__,__LINE__); #ifdef tofix + + CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC)); + + _Notify->BreakPoint(__FILE__,__LINE__); DWORD TempReg1, TempReg2; - if (Opcode.base == 29 && SPHack) { - if (m_Section->IsMapped(Opcode.rt)) { ProtectGPR(m_Section,Opcode.rt); } + if (m_Opcode.base == 29 && SPHack) { + if (IsMapped(m_Opcode.rt)) { ProtectGPR(m_Opcode.rt); } TempReg1 = Map_MemoryStack(m_Section,x86_Any,true); - if (m_Section->IsConst(Opcode.rt)) { - MoveConstToMemoryDisp (m_Section->MipsRegLo(Opcode.rt),TempReg1, (DWORD)((short)Opcode.offset)); - } else if (m_Section->IsMapped(Opcode.rt)) { - MoveX86regToMemory(m_Section->MipsRegLo(Opcode.rt),TempReg1,(DWORD)((short)Opcode.offset)); + if (IsConst(m_Opcode.rt)) { + MoveConstToMemoryDisp (cMipsRegLo(m_Opcode.rt),TempReg1, (DWORD)((short)m_Opcode.offset)); + } else if (IsMapped(m_Opcode.rt)) { + MoveX86regToMemory(cMipsRegLo(m_Opcode.rt),TempReg1,(DWORD)((short)m_Opcode.offset)); } else { - TempReg2 = Map_TempReg(m_Section,x86_Any,Opcode.rt,FALSE); - MoveX86regToMemory(TempReg2,TempReg1,(DWORD)((short)Opcode.offset)); + TempReg2 = m_Section->Map_TempReg(x86_Any,m_Opcode.rt,FALSE); + MoveX86regToMemory(TempReg2,TempReg1,(DWORD)((short)m_Opcode.offset)); } } else { - if (m_Section->IsConst(Opcode.base)) { - DWORD Address = m_Section->MipsRegLo(Opcode.base) + (short)Opcode.offset; + if (IsConst(m_Opcode.base)) { + DWORD Address = cMipsRegLo(m_Opcode.base) + (short)m_Opcode.offset; - if (m_Section->IsConst(Opcode.rt)) { - _MMU->Compile_SW_Const(m_Section->MipsRegLo(Opcode.rt), Address); - } else if (m_Section->IsMapped(Opcode.rt)) { - _MMU->Compile_SW_Register(m_Section,m_Section->MipsRegLo(Opcode.rt), Address); + if (IsConst(m_Opcode.rt)) { + _MMU->Compile_SW_Const(cMipsRegLo(m_Opcode.rt), Address); + } else if (IsMapped(m_Opcode.rt)) { + _MMU->Compile_SW_Register(m_Section,cMipsRegLo(m_Opcode.rt), Address); } else { - _MMU->Compile_SW_Register(m_Section,Map_TempReg(m_Section,x86_Any,Opcode.rt,FALSE), Address); + _MMU->Compile_SW_Register(m_Section,m_Section->Map_TempReg(x86_Any,m_Opcode.rt,FALSE), Address); } return; } - if (m_Section->IsMapped(Opcode.rt)) { ProtectGPR(m_Section,Opcode.rt); } - if (m_Section->IsMapped(Opcode.base)) { - ProtectGPR(m_Section,Opcode.base); - if (Opcode.offset != 0) { - TempReg1 = Map_TempReg(m_Section,x86_Any,-1,FALSE); - LeaSourceAndOffset(TempReg1,m_Section->MipsRegLo(Opcode.base),(short)Opcode.offset); + if (IsMapped(m_Opcode.rt)) { ProtectGPR(m_Opcode.rt); } + if (IsMapped(m_Opcode.base)) { + ProtectGPR(m_Opcode.base); + if (m_Opcode.offset != 0) { + TempReg1 = m_Section->Map_TempReg(x86_Any,-1,FALSE); + LeaSourceAndOffset(TempReg1,cMipsRegLo(m_Opcode.base),(short)m_Opcode.offset); } else { - TempReg1 = Map_TempReg(m_Section,x86_Any,Opcode.base,FALSE); + TempReg1 = m_Section->Map_TempReg(x86_Any,m_Opcode.base,FALSE); } - UnProtectGPR(m_Section,Opcode.base); + UnProtectGPR(m_Opcode.base); } else { - TempReg1 = Map_TempReg(m_Section,x86_Any,Opcode.base,FALSE); - if (Opcode.immediate == 0) { - } else if (Opcode.immediate == 1) { - IncX86reg(TempReg1); - } else if (Opcode.immediate == 0xFFFF) { - DecX86reg(TempReg1); - } else { - AddConstToX86Reg(TempReg1,(short)Opcode.immediate); - } + TempReg1 = m_Section->Map_TempReg(x86_Any,m_Opcode.base,FALSE); + AddConstToX86Reg(TempReg1,(short)m_Opcode.immediate); } - if (UseTlb) { - TempReg2 = Map_TempReg(m_Section,x86_Any,-1,FALSE); + if (g_UseTlb) { + TempReg2 = m_Section->Map_TempReg(x86_Any,-1,FALSE); MoveX86RegToX86Reg(TempReg1, TempReg2); ShiftRightUnsignImmed(TempReg2,12); MoveVariableDispToX86Reg(TLB_WriteMap,"TLB_WriteMap",TempReg2,TempReg2,4); @@ -2260,70 +2251,65 @@ void CRecompilerOps::Compile_SW (CCodeSection * m_Section){ //0041C522 85 C0 test eax,eax //0041C524 75 01 jne 0041C527 - if (m_Section->IsConst(Opcode.rt)) { - MoveConstToX86regPointer(m_Section->MipsRegLo(Opcode.rt),TempReg1, TempReg2); - } else if (m_Section->IsMapped(Opcode.rt)) { - MoveX86regToX86regPointer(m_Section->MipsRegLo(Opcode.rt),TempReg1, TempReg2); + if (IsConst(m_Opcode.rt)) { + MoveConstToX86regPointer(cMipsRegLo(m_Opcode.rt),TempReg1, TempReg2); + } else if (IsMapped(m_Opcode.rt)) { + MoveX86regToX86regPointer(cMipsRegLo(m_Opcode.rt),TempReg1, TempReg2); } else { - MoveX86regToX86regPointer(Map_TempReg(m_Section,x86_Any,Opcode.rt,FALSE),TempReg1, TempReg2); + MoveX86regToX86regPointer(m_Section->Map_TempReg(x86_Any,m_Opcode.rt,FALSE),TempReg1, TempReg2); } } else { AndConstToX86Reg(TempReg1,0x1FFFFFFF); - if (m_Section->IsConst(Opcode.rt)) { - MoveConstToN64Mem(m_Section->MipsRegLo(Opcode.rt),TempReg1); - } else if (m_Section->IsMapped(Opcode.rt)) { - MoveX86regToN64Mem(m_Section->MipsRegLo(Opcode.rt),TempReg1); + if (IsConst(m_Opcode.rt)) { + MoveConstToN64Mem(cMipsRegLo(m_Opcode.rt),TempReg1); + } else if (IsMapped(m_Opcode.rt)) { + MoveX86regToN64Mem(cMipsRegLo(m_Opcode.rt),TempReg1); } else { - MoveX86regToN64Mem(Map_TempReg(m_Section,x86_Any,Opcode.rt,FALSE),TempReg1); + MoveX86regToN64Mem(m_Section->Map_TempReg(x86_Any,m_Opcode.rt,FALSE),TempReg1); } } } #endif } -void CRecompilerOps::Compile_SWR (CCodeSection * m_Section) { +void CRecompilerOps::SWR (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix DWORD TempReg1, TempReg2, Value, Offset, shift; - CPU_Message(" %X %s",m_Section->CompilePC,R4300iOpcodeName(Opcode.Hex,m_Section->CompilePC)); + CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC)); - if (m_Section->IsConst(Opcode.base)) { + if (IsConst(m_Opcode.base)) { DWORD Address; - Address = m_Section->MipsRegLo(Opcode.base) + (short)Opcode.offset; + Address = cMipsRegLo(m_Opcode.base) + (short)m_Opcode.offset; Offset = Address & 3; - Value = Map_TempReg(m_Section,x86_Any,-1,FALSE); + Value = m_Section->Map_TempReg(x86_Any,-1,FALSE); _MMU->Compile_LW(m_Section, Value,(Address & ~3)); AndConstToX86Reg(Value,SWR_MASK[Offset]); - TempReg1 = Map_TempReg(m_Section,x86_Any,Opcode.rt,FALSE); + TempReg1 = m_Section->Map_TempReg(x86_Any,m_Opcode.rt,FALSE); ShiftLeftSignImmed(TempReg1,(BYTE)SWR_SHIFT[Offset]); AddX86RegToX86Reg(Value,TempReg1); _MMU->Compile_SW_Register(m_Section,Value, (Address & ~3)); return; } - shift = Map_TempReg(m_Section,x86_ECX,-1,FALSE); - if (m_Section->IsMapped(Opcode.base)) { - ProtectGPR(m_Section,Opcode.base); - if (Opcode.offset != 0) { - TempReg1 = Map_TempReg(m_Section,x86_Any,-1,FALSE); - LeaSourceAndOffset(TempReg1,m_Section->MipsRegLo(Opcode.base),(short)Opcode.offset); + shift = m_Section->Map_TempReg(x86_ECX,-1,FALSE); + if (IsMapped(m_Opcode.base)) { + ProtectGPR(m_Opcode.base); + if (m_Opcode.offset != 0) { + TempReg1 = m_Section->Map_TempReg(x86_Any,-1,FALSE); + LeaSourceAndOffset(TempReg1,cMipsRegLo(m_Opcode.base),(short)m_Opcode.offset); } else { - TempReg1 = Map_TempReg(m_Section,x86_Any,Opcode.base,FALSE); + TempReg1 = m_Section->Map_TempReg(x86_Any,m_Opcode.base,FALSE); } - UnProtectGPR(m_Section,Opcode.base); + UnProtectGPR(m_Opcode.base); } else { - TempReg1 = Map_TempReg(m_Section,x86_Any,Opcode.base,FALSE); - if (Opcode.immediate == 0) { - } else if (Opcode.immediate == 1) { - IncX86reg(TempReg1); - } else if (Opcode.immediate == 0xFFFF) { - DecX86reg(TempReg1); - } else { - AddConstToX86Reg(TempReg1,(short)Opcode.immediate); - } + TempReg1 = m_Section->Map_TempReg(x86_Any,m_Opcode.base,FALSE); + AddConstToX86Reg(TempReg1,(short)m_Opcode.immediate); } - if (UseTlb) { - TempReg2 = Map_TempReg(m_Section,x86_Any,-1,FALSE); + if (g_UseTlb) { + TempReg2 = m_Section->Map_TempReg(x86_Any,-1,FALSE); MoveX86RegToX86Reg(TempReg1, TempReg2); ShiftRightUnsignImmed(TempReg2,12); MoveVariableDispToX86Reg(TLB_ReadMap,"TLB_ReadMap",TempReg2,TempReg2,4); @@ -2333,13 +2319,13 @@ void CRecompilerOps::Compile_SWR (CCodeSection * m_Section) { //0041C524 75 01 jne 0041C527 } - Offset = Map_TempReg(m_Section,x86_Any,-1,FALSE); + Offset = m_Section->Map_TempReg(x86_Any,-1,FALSE); MoveX86RegToX86Reg(TempReg1, Offset); AndConstToX86Reg(Offset,3); AndConstToX86Reg(TempReg1,~3); - Value = Map_TempReg(m_Section,x86_Any,-1,FALSE); - if (UseTlb) { + Value = m_Section->Map_TempReg(x86_Any,-1,FALSE); + if (g_UseTlb) { MoveX86regPointerToX86reg(TempReg1, TempReg2,Value); } else { AndConstToX86Reg(TempReg1,0x1FFFFFFF); @@ -2347,20 +2333,20 @@ void CRecompilerOps::Compile_SWR (CCodeSection * m_Section) { } AndVariableDispToX86Reg(SWR_MASK,"SWR_MASK",Value,Offset,4); - if (!m_Section->IsConst(Opcode.rt) || m_Section->MipsRegLo(Opcode.rt) != 0) { + if (!IsConst(m_Opcode.rt) || cMipsRegLo(m_Opcode.rt) != 0) { MoveVariableDispToX86Reg(SWR_SHIFT,"SWR_SHIFT",shift,Offset,4); - if (m_Section->IsConst(Opcode.rt)) { - MoveConstToX86reg(m_Section->MipsRegLo(Opcode.rt),Offset); - } else if (m_Section->IsMapped(Opcode.rt)) { - MoveX86RegToX86Reg(m_Section->MipsRegLo(Opcode.rt),Offset); + if (IsConst(m_Opcode.rt)) { + MoveConstToX86reg(cMipsRegLo(m_Opcode.rt),Offset); + } else if (IsMapped(m_Opcode.rt)) { + MoveX86RegToX86Reg(cMipsRegLo(m_Opcode.rt),Offset); } else { - MoveVariableToX86reg(&_GPR[Opcode.rt].UW[0],CRegName::GPR_Lo[Opcode.rt],Offset); + MoveVariableToX86reg(&_GPR[m_Opcode.rt].UW[0],CRegName::GPR_Lo[m_Opcode.rt],Offset); } ShiftLeftSign(Offset); AddX86RegToX86Reg(Value,Offset); } - if (UseTlb) { + if (g_UseTlb) { MoveX86RegToX86Reg(TempReg1, TempReg2); ShiftRightUnsignImmed(TempReg2,12); MoveVariableDispToX86Reg(TLB_WriteMap,"TLB_WriteMap",TempReg2,TempReg2,4); @@ -2369,53 +2355,61 @@ void CRecompilerOps::Compile_SWR (CCodeSection * m_Section) { } else { MoveX86regToN64Mem(Value,TempReg1); } +#endif } -void CRecompilerOps::Compile_SDL (CCodeSection * m_Section) { - CPU_Message(" %X %s",m_Section->CompilePC,R4300iOpcodeName(Opcode.Hex,m_Section->CompilePC)); - if (Opcode.base != 0) { UnMap_GPR(m_Section,Opcode.base,TRUE); } - if (Opcode.rt != 0) { UnMap_GPR(m_Section,Opcode.rt,TRUE); } +void CRecompilerOps::SDL (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC)); + if (m_Opcode.base != 0) { UnMap_GPR(m_Opcode.base,TRUE); } + if (m_Opcode.rt != 0) { UnMap_GPR(m_Opcode.rt,TRUE); } Pushad(); MoveConstToVariable(Opcode.Hex, &Opcode.Hex, "Opcode.Hex" ); Call_Direct(R4300iOp::SDL, "R4300iOp::SDL"); Popad(); +#endif } -void CRecompilerOps::Compile_SDR (CCodeSection * m_Section) { - CPU_Message(" %X %s",m_Section->CompilePC,R4300iOpcodeName(Opcode.Hex,m_Section->CompilePC)); - if (Opcode.base != 0) { UnMap_GPR(m_Section,Opcode.base,TRUE); } - if (Opcode.rt != 0) { UnMap_GPR(m_Section,Opcode.rt,TRUE); } +void CRecompilerOps::SDR (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC)); + if (m_Opcode.base != 0) { UnMap_GPR(m_Opcode.base,TRUE); } + if (m_Opcode.rt != 0) { UnMap_GPR(m_Opcode.rt,TRUE); } Pushad(); MoveConstToVariable(Opcode.Hex, &Opcode.Hex, "Opcode.Hex" ); Call_Direct(R4300iOp::SDR, "R4300iOp::SDR"); Popad(); - +#endif } -void CRecompilerOps::Compile_CACHE (CCodeSection * m_Section){ - CPU_Message(" %X %s",m_Section->CompilePC,R4300iOpcodeName(Opcode.Hex,m_Section->CompilePC)); +void CRecompilerOps::CACHE (void){ + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC)); if (_Settings->LoadDword(Game_SMM_Cache) == 0) { return; } - switch(Opcode.rt) { + switch(m_Opcode.rt) { case 0: case 16: Pushad(); PushImm32("CRecompiler::Remove_Cache",CRecompiler::Remove_Cache); PushImm32("20",20); - if (m_Section->IsConst(Opcode.base)) { - DWORD Address = m_Section->MipsRegLo(Opcode.base) + (short)Opcode.offset; + if (IsConst(m_Opcode.base)) { + DWORD Address = cMipsRegLo(m_Opcode.base) + (short)m_Opcode.offset; PushImm32("Address",Address); - } else if (m_Section->IsMapped(Opcode.base)) { - AddConstToX86Reg(m_Section->MipsRegLo(Opcode.base),(short)Opcode.offset); - Push(m_Section->MipsRegLo(Opcode.base)); + } else if (IsMapped(m_Opcode.base)) { + AddConstToX86Reg(cMipsRegLo(m_Opcode.base),(short)m_Opcode.offset); + Push(cMipsRegLo(m_Opcode.base)); } else { - MoveVariableToX86reg(&_GPR[Opcode.base].UW[0],CRegName::GPR_Lo[Opcode.base],x86_EAX); - AddConstToX86Reg(x86_EAX,(short)Opcode.offset); + MoveVariableToX86reg(&_GPR[m_Opcode.base].UW[0],CRegName::GPR_Lo[m_Opcode.base],x86_EAX); + AddConstToX86Reg(x86_EAX,(short)m_Opcode.offset); Push(x86_EAX); } MoveConstToX86reg((DWORD)_N64System->GetRecompiler(),x86_ECX); @@ -2434,22 +2428,25 @@ void CRecompilerOps::Compile_CACHE (CCodeSection * m_Section){ break; #ifndef EXTERNAL_RELEASE default: - DisplayError("cache: %d",Opcode.rt); + DisplayError("cache: %d",m_Opcode.rt); #endif } +#endif } -void CRecompilerOps::Compile_LL (CCodeSection * m_Section) { +void CRecompilerOps::LL (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix DWORD TempReg1, TempReg2; - CPU_Message(" %X %s",m_Section->CompilePC,R4300iOpcodeName(Opcode.Hex,m_Section->CompilePC)); + CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC)); - if (Opcode.rt == 0) return; + if (m_Opcode.rt == 0) return; - if (m_Section->IsConst(Opcode.base)) { - DWORD Address = m_Section->MipsRegLo(Opcode.base) + (short)Opcode.offset; - Map_GPR_32bit(m_Section,Opcode.rt,TRUE,-1); - _MMU->Compile_LW(m_Section, m_Section->MipsRegLo(Opcode.rt),Address); + if (IsConst(m_Opcode.base)) { + DWORD Address = cMipsRegLo(m_Opcode.base) + (short)m_Opcode.offset; + Map_GPR_32bit(m_Opcode.rt,TRUE,-1); + _MMU->Compile_LW(m_Section, cMipsRegLo(m_Opcode.rt),Address); MoveConstToVariable(1,_LLBit,"LLBit"); _Notify->BreakPoint(__FILE__,__LINE__); @@ -2459,118 +2456,99 @@ void CRecompilerOps::Compile_LL (CCodeSection * m_Section) { MoveConstToVariable(Address,_LLAddr,"LLAddr"); return; } - if (UseTlb) { - if (m_Section->IsMapped(Opcode.rt)) { ProtectGPR(m_Section,Opcode.rt); } - if (m_Section->IsMapped(Opcode.base) && Opcode.offset == 0) { - ProtectGPR(m_Section,Opcode.base); - TempReg1 = m_Section->MipsRegLo(Opcode.base); + if (g_UseTlb) { + if (IsMapped(m_Opcode.rt)) { ProtectGPR(m_Opcode.rt); } + if (IsMapped(m_Opcode.base) && m_Opcode.offset == 0) { + ProtectGPR(m_Opcode.base); + TempReg1 = cMipsRegLo(m_Opcode.base); } else { - if (m_Section->IsMapped(Opcode.base)) { - ProtectGPR(m_Section,Opcode.base); - if (Opcode.offset != 0) { - TempReg1 = Map_TempReg(m_Section,x86_Any,-1,FALSE); - LeaSourceAndOffset(TempReg1,m_Section->MipsRegLo(Opcode.base),(short)Opcode.offset); + if (IsMapped(m_Opcode.base)) { + ProtectGPR(m_Opcode.base); + if (m_Opcode.offset != 0) { + TempReg1 = m_Section->Map_TempReg(x86_Any,-1,FALSE); + LeaSourceAndOffset(TempReg1,cMipsRegLo(m_Opcode.base),(short)m_Opcode.offset); } else { - TempReg1 = Map_TempReg(m_Section,x86_Any,Opcode.base,FALSE); + TempReg1 = m_Section->Map_TempReg(x86_Any,m_Opcode.base,FALSE); } } else { - TempReg1 = Map_TempReg(m_Section,x86_Any,Opcode.base,FALSE); - if (Opcode.immediate == 0) { - } else if (Opcode.immediate == 1) { - IncX86reg(TempReg1); - } else if (Opcode.immediate == 0xFFFF) { - DecX86reg(TempReg1); - } else { - AddConstToX86Reg(TempReg1,(short)Opcode.immediate); - } + TempReg1 = m_Section->Map_TempReg(x86_Any,m_Opcode.base,FALSE); + AddConstToX86Reg(TempReg1,(short)m_Opcode.immediate); } } - TempReg2 = Map_TempReg(m_Section,x86_Any,-1,FALSE); + TempReg2 = m_Section->Map_TempReg(x86_Any,-1,FALSE); MoveX86RegToX86Reg(TempReg1, TempReg2); ShiftRightUnsignImmed(TempReg2,12); MoveVariableDispToX86Reg(TLB_ReadMap,"TLB_ReadMap",TempReg2,TempReg2,4); CompileReadTLBMiss(m_Section,TempReg1,TempReg2); - Map_GPR_32bit(m_Section,Opcode.rt,TRUE,-1); - MoveX86regPointerToX86reg(TempReg1, TempReg2,m_Section->MipsRegLo(Opcode.rt)); + Map_GPR_32bit(m_Opcode.rt,TRUE,-1); + MoveX86regPointerToX86reg(TempReg1, TempReg2,cMipsRegLo(m_Opcode.rt)); MoveConstToVariable(1,_LLBit,"LLBit"); MoveX86regToVariable(TempReg1,_LLAddr,"LLAddr"); AddX86regToVariable(TempReg2,_LLAddr,"LLAddr"); SubConstFromVariable((DWORD)_MMU->Rdram(),_LLAddr,"LLAddr"); } else { - if (m_Section->IsMapped(Opcode.base)) { - ProtectGPR(m_Section,Opcode.base); - if (Opcode.offset != 0) { - Map_GPR_32bit(m_Section,Opcode.rt,TRUE,-1); - LeaSourceAndOffset(m_Section->MipsRegLo(Opcode.rt),m_Section->MipsRegLo(Opcode.base),(short)Opcode.offset); + if (IsMapped(m_Opcode.base)) { + ProtectGPR(m_Opcode.base); + if (m_Opcode.offset != 0) { + Map_GPR_32bit(m_Opcode.rt,TRUE,-1); + LeaSourceAndOffset(cMipsRegLo(m_Opcode.rt),cMipsRegLo(m_Opcode.base),(short)m_Opcode.offset); } else { - Map_GPR_32bit(m_Section,Opcode.rt,TRUE,Opcode.base); + Map_GPR_32bit(m_Opcode.rt,TRUE,m_Opcode.base); } } else { - Map_GPR_32bit(m_Section,Opcode.rt,TRUE,Opcode.base); - if (Opcode.immediate == 0) { - } else if (Opcode.immediate == 1) { - IncX86reg(m_Section->MipsRegLo(Opcode.rt)); - } else if (Opcode.immediate == 0xFFFF) { - DecX86reg(m_Section->MipsRegLo(Opcode.rt)); - } else { - AddConstToX86Reg(m_Section->MipsRegLo(Opcode.rt),(short)Opcode.immediate); - } + Map_GPR_32bit(m_Opcode.rt,TRUE,m_Opcode.base); + AddConstToX86Reg(cMipsRegLo(m_Opcode.rt),(short)m_Opcode.immediate); } - AndConstToX86Reg(m_Section->MipsRegLo(Opcode.rt),0x1FFFFFFF); - MoveX86regToVariable(m_Section->MipsRegLo(Opcode.rt),_LLAddr,"LLAddr"); - MoveN64MemToX86reg(m_Section->MipsRegLo(Opcode.rt),m_Section->MipsRegLo(Opcode.rt)); + AndConstToX86Reg(cMipsRegLo(m_Opcode.rt),0x1FFFFFFF); + MoveX86regToVariable(cMipsRegLo(m_Opcode.rt),_LLAddr,"LLAddr"); + MoveN64MemToX86reg(cMipsRegLo(m_Opcode.rt),cMipsRegLo(m_Opcode.rt)); MoveConstToVariable(1,_LLBit,"LLBit"); } +#endif } -void CRecompilerOps::Compile_SC (CCodeSection * m_Section){ +void CRecompilerOps::SC (void){ +#ifdef tofix DWORD TempReg1, TempReg2; BYTE * Jump; - CPU_Message(" %X %s",m_Section->CompilePC,R4300iOpcodeName(Opcode.Hex,m_Section->CompilePC)); + CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC)); CompConstToVariable(1,_LLBit,"LLBit"); JneLabel32("LLBitNotSet",0); - Jump = RecompPos - 4; - if (m_Section->IsConst(Opcode.base)) { - DWORD Address = m_Section->MipsRegLo(Opcode.base) + (short)Opcode.offset; + Jump = (DWORD *)(m_RecompPos - 4); + if (IsConst(m_Opcode.base)) { + DWORD Address = cMipsRegLo(m_Opcode.base) + (short)m_Opcode.offset; - if (m_Section->IsConst(Opcode.rt)) { - _MMU->Compile_SW_Const(m_Section->MipsRegLo(Opcode.rt), Address); - } else if (m_Section->IsMapped(Opcode.rt)) { - _MMU->Compile_SW_Register(m_Section,m_Section->MipsRegLo(Opcode.rt), Address); + if (IsConst(m_Opcode.rt)) { + _MMU->Compile_SW_Const(cMipsRegLo(m_Opcode.rt), Address); + } else if (IsMapped(m_Opcode.rt)) { + _MMU->Compile_SW_Register(m_Section,cMipsRegLo(m_Opcode.rt), Address); } else { - _MMU->Compile_SW_Register(m_Section,Map_TempReg(m_Section,x86_Any,Opcode.rt,FALSE), Address); + _MMU->Compile_SW_Register(m_Section,m_Section->Map_TempReg(x86_Any,m_Opcode.rt,FALSE), Address); } CPU_Message(" LLBitNotSet:"); - *((DWORD *)(Jump))=(BYTE)(RecompPos - Jump - 4); - Map_GPR_32bit(m_Section,Opcode.rt,FALSE,-1); - MoveVariableToX86reg(_LLBit,"LLBit",m_Section->MipsRegLo(Opcode.rt)); + *((DWORD *)(Jump))=(BYTE)(m_RecompPos - Jump - 4); + Map_GPR_32bit(m_Opcode.rt,FALSE,-1); + MoveVariableToX86reg(_LLBit,"LLBit",cMipsRegLo(m_Opcode.rt)); return; } - if (m_Section->IsMapped(Opcode.rt)) { ProtectGPR(m_Section,Opcode.rt); } - if (m_Section->IsMapped(Opcode.base)) { - ProtectGPR(m_Section,Opcode.base); - if (Opcode.offset != 0) { - TempReg1 = Map_TempReg(m_Section,x86_Any,-1,FALSE); - LeaSourceAndOffset(TempReg1,m_Section->MipsRegLo(Opcode.base),(short)Opcode.offset); + if (IsMapped(m_Opcode.rt)) { ProtectGPR(m_Opcode.rt); } + if (IsMapped(m_Opcode.base)) { + ProtectGPR(m_Opcode.base); + if (m_Opcode.offset != 0) { + TempReg1 = m_Section->Map_TempReg(x86_Any,-1,FALSE); + LeaSourceAndOffset(TempReg1,cMipsRegLo(m_Opcode.base),(short)m_Opcode.offset); } else { - TempReg1 = Map_TempReg(m_Section,x86_Any,Opcode.base,FALSE); + TempReg1 = m_Section->Map_TempReg(x86_Any,m_Opcode.base,FALSE); } - UnProtectGPR(m_Section,Opcode.base); + UnProtectGPR(m_Opcode.base); } else { - TempReg1 = Map_TempReg(m_Section,x86_Any,Opcode.base,FALSE); - if (Opcode.immediate == 0) { - } else if (Opcode.immediate == 1) { - IncX86reg(TempReg1); - } else if (Opcode.immediate == 0xFFFF) { - DecX86reg(TempReg1); - } else { - AddConstToX86Reg(TempReg1,(short)Opcode.immediate); - } + TempReg1 = m_Section->Map_TempReg(x86_Any,m_Opcode.base,FALSE); + AddConstToX86Reg(TempReg1,(short)m_Opcode.immediate); } - if (UseTlb) { - TempReg2 = Map_TempReg(m_Section,x86_Any,-1,FALSE); + if (g_UseTlb) { + TempReg2 = m_Section->Map_TempReg(x86_Any,-1,FALSE); MoveX86RegToX86Reg(TempReg1, TempReg2); ShiftRightUnsignImmed(TempReg2,12); MoveVariableDispToX86Reg(TLB_WriteMap,"TLB_WriteMap",TempReg2,TempReg2,4); @@ -2578,150 +2556,139 @@ void CRecompilerOps::Compile_SC (CCodeSection * m_Section){ //0041C522 85 C0 test eax,eax //0041C524 75 01 jne 0041C527 - if (m_Section->IsConst(Opcode.rt)) { - MoveConstToX86regPointer(m_Section->MipsRegLo(Opcode.rt),TempReg1, TempReg2); - } else if (m_Section->IsMapped(Opcode.rt)) { - MoveX86regToX86regPointer(m_Section->MipsRegLo(Opcode.rt),TempReg1, TempReg2); + if (IsConst(m_Opcode.rt)) { + MoveConstToX86regPointer(cMipsRegLo(m_Opcode.rt),TempReg1, TempReg2); + } else if (IsMapped(m_Opcode.rt)) { + MoveX86regToX86regPointer(cMipsRegLo(m_Opcode.rt),TempReg1, TempReg2); } else { - MoveX86regToX86regPointer(Map_TempReg(m_Section,x86_Any,Opcode.rt,FALSE),TempReg1, TempReg2); + MoveX86regToX86regPointer(m_Section->Map_TempReg(x86_Any,m_Opcode.rt,FALSE),TempReg1, TempReg2); } } else { AndConstToX86Reg(TempReg1,0x1FFFFFFF); - if (m_Section->IsConst(Opcode.rt)) { - MoveConstToN64Mem(m_Section->MipsRegLo(Opcode.rt),TempReg1); - } else if (m_Section->IsMapped(Opcode.rt)) { - MoveX86regToN64Mem(m_Section->MipsRegLo(Opcode.rt),TempReg1); + if (IsConst(m_Opcode.rt)) { + MoveConstToN64Mem(cMipsRegLo(m_Opcode.rt),TempReg1); + } else if (IsMapped(m_Opcode.rt)) { + MoveX86regToN64Mem(cMipsRegLo(m_Opcode.rt),TempReg1); } else { - MoveX86regToN64Mem(Map_TempReg(m_Section,x86_Any,Opcode.rt,FALSE),TempReg1); + MoveX86regToN64Mem(m_Section->Map_TempReg(x86_Any,m_Opcode.rt,FALSE),TempReg1); } } CPU_Message(" LLBitNotSet:"); - *((DWORD *)(Jump))=(BYTE)(RecompPos - Jump - 4); - Map_GPR_32bit(m_Section,Opcode.rt,FALSE,-1); - MoveVariableToX86reg(_LLBit,"LLBit",m_Section->MipsRegLo(Opcode.rt)); - + *((DWORD *)(Jump))=(BYTE)(m_RecompPos - Jump - 4); + Map_GPR_32bit(m_Opcode.rt,FALSE,-1); + MoveVariableToX86reg(_LLBit,"LLBit",cMipsRegLo(m_Opcode.rt)); +#endif } -void CRecompilerOps::Compile_LD (CCodeSection * m_Section) { - CPU_Message(" %X %s",m_Section->CompilePC,R4300iOpcodeName(Opcode.Hex,m_Section->CompilePC)); - - if (Opcode.rt == 0) return; - +void CRecompilerOps::LD (void) { _Notify->BreakPoint(__FILE__,__LINE__); #ifdef tofix + CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC)); + + if (m_Opcode.rt == 0) return; + + _Notify->BreakPoint(__FILE__,__LINE__); DWORD TempReg1, TempReg2; - if (m_Section->IsConst(Opcode.base)) { - DWORD Address = m_Section->MipsRegLo(Opcode.base) + (short)Opcode.offset; - Map_GPR_64bit(m_Section,Opcode.rt,-1); - _MMU->Compile_LW(m_Section, m_Section->MipsRegHi(Opcode.rt),Address); - _MMU->Compile_LW(m_Section, m_Section->MipsRegLo(Opcode.rt),Address + 4); - if (SPHack && Opcode.rt == 29) { _MMU->ResetMemoryStack(m_Section); } + if (IsConst(m_Opcode.base)) { + DWORD Address = cMipsRegLo(m_Opcode.base) + (short)m_Opcode.offset; + Map_GPR_64bit(m_Section,m_Opcode.rt,-1); + _MMU->Compile_LW(m_Section, MipsRegHi(m_Opcode.rt),Address); + _MMU->Compile_LW(m_Section, cMipsRegLo(m_Opcode.rt),Address + 4); + if (SPHack && m_Opcode.rt == 29) { _MMU->ResetMemoryStack(m_Section); } return; } - if (m_Section->IsMapped(Opcode.rt)) { ProtectGPR(m_Section,Opcode.rt); } - if (m_Section->IsMapped(Opcode.base) && Opcode.offset == 0) { - if (UseTlb) { - ProtectGPR(m_Section,Opcode.base); - TempReg1 = m_Section->MipsRegLo(Opcode.base); + if (IsMapped(m_Opcode.rt)) { ProtectGPR(m_Opcode.rt); } + if (IsMapped(m_Opcode.base) && m_Opcode.offset == 0) { + if (g_UseTlb) { + ProtectGPR(m_Opcode.base); + TempReg1 = cMipsRegLo(m_Opcode.base); } else { - TempReg1 = Map_TempReg(m_Section,x86_Any,Opcode.base,FALSE); + TempReg1 = m_Section->Map_TempReg(x86_Any,m_Opcode.base,FALSE); } } else { - if (m_Section->IsMapped(Opcode.base)) { - ProtectGPR(m_Section,Opcode.base); - if (Opcode.offset != 0) { - TempReg1 = Map_TempReg(m_Section,x86_Any,-1,FALSE); - LeaSourceAndOffset(TempReg1,m_Section->MipsRegLo(Opcode.base),(short)Opcode.offset); + if (IsMapped(m_Opcode.base)) { + ProtectGPR(m_Opcode.base); + if (m_Opcode.offset != 0) { + TempReg1 = m_Section->Map_TempReg(x86_Any,-1,FALSE); + LeaSourceAndOffset(TempReg1,cMipsRegLo(m_Opcode.base),(short)m_Opcode.offset); } else { - TempReg1 = Map_TempReg(m_Section,x86_Any,Opcode.base,FALSE); + TempReg1 = m_Section->Map_TempReg(x86_Any,m_Opcode.base,FALSE); } } else { - TempReg1 = Map_TempReg(m_Section,x86_Any,Opcode.base,FALSE); - if (Opcode.immediate == 0) { - } else if (Opcode.immediate == 1) { - IncX86reg(TempReg1); - } else if (Opcode.immediate == 0xFFFF) { - DecX86reg(TempReg1); - } else { - AddConstToX86Reg(TempReg1,(short)Opcode.immediate); - } + TempReg1 = m_Section->Map_TempReg(x86_Any,m_Opcode.base,FALSE); + AddConstToX86Reg(TempReg1,(short)m_Opcode.immediate); } } - if (UseTlb) { - TempReg2 = Map_TempReg(m_Section,x86_Any,-1,FALSE); + if (g_UseTlb) { + TempReg2 = m_Section->Map_TempReg(x86_Any,-1,FALSE); MoveX86RegToX86Reg(TempReg1, TempReg2); ShiftRightUnsignImmed(TempReg2,12); MoveVariableDispToX86Reg(TLB_ReadMap,"TLB_ReadMap",TempReg2,TempReg2,4); //For tlb miss //0041C522 85 C0 test eax,eax //0041C524 75 01 jne 0041C527 - Map_GPR_64bit(m_Section,Opcode.rt,-1); - MoveX86regPointerToX86reg(TempReg1, TempReg2,m_Section->MipsRegHi(Opcode.rt)); - MoveX86regPointerToX86regDisp8(TempReg1, TempReg2,m_Section->MipsRegLo(Opcode.rt),4); + Map_GPR_64bit(m_Section,m_Opcode.rt,-1); + MoveX86regPointerToX86reg(TempReg1, TempReg2,MipsRegHi(m_Opcode.rt)); + MoveX86regPointerToX86regDisp8(TempReg1, TempReg2,cMipsRegLo(m_Opcode.rt),4); } else { AndConstToX86Reg(TempReg1,0x1FFFFFFF); - Map_GPR_64bit(m_Section,Opcode.rt,-1); - MoveN64MemToX86reg(m_Section->MipsRegHi(Opcode.rt),TempReg1); - MoveN64MemDispToX86reg(m_Section->MipsRegLo(Opcode.rt),TempReg1,4); + Map_GPR_64bit(m_Section,m_Opcode.rt,-1); + MoveN64MemToX86reg(MipsRegHi(m_Opcode.rt),TempReg1); + MoveN64MemDispToX86reg(cMipsRegLo(m_Opcode.rt),TempReg1,4); } - if (SPHack && Opcode.rt == 29) { + if (SPHack && m_Opcode.rt == 29) { m_Section->ResetX86Protection(); _MMU->ResetMemoryStack(m_Section); } #endif } -void CRecompilerOps::Compile_SD (CCodeSection * m_Section){ +void CRecompilerOps::SD (void){ + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix DWORD TempReg1, TempReg2; - CPU_Message(" %X %s",m_Section->CompilePC,R4300iOpcodeName(Opcode.Hex,m_Section->CompilePC)); + CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC)); - if (m_Section->IsConst(Opcode.base)) { - DWORD Address = m_Section->MipsRegLo(Opcode.base) + (short)Opcode.offset; + if (IsConst(m_Opcode.base)) { + DWORD Address = cMipsRegLo(m_Opcode.base) + (short)m_Opcode.offset; - if (m_Section->IsConst(Opcode.rt)) { - if (m_Section->Is64Bit(Opcode.rt)) { - _MMU->Compile_SW_Const(m_Section->MipsRegHi(Opcode.rt), Address); + if (IsConst(m_Opcode.rt)) { + if (m_Section->Is64Bit(m_Opcode.rt)) { + _MMU->Compile_SW_Const(MipsRegHi(m_Opcode.rt), Address); } else { - _MMU->Compile_SW_Const((m_Section->MipsRegLo_S(Opcode.rt) >> 31), Address); + _MMU->Compile_SW_Const((m_Section->MipsRegLo_S(m_Opcode.rt) >> 31), Address); } - _MMU->Compile_SW_Const(m_Section->MipsRegLo(Opcode.rt), Address + 4); - } else if (m_Section->IsMapped(Opcode.rt)) { - if (m_Section->Is64Bit(Opcode.rt)) { - _MMU->Compile_SW_Register(m_Section,m_Section->MipsRegHi(Opcode.rt), Address); + _MMU->Compile_SW_Const(cMipsRegLo(m_Opcode.rt), Address + 4); + } else if (IsMapped(m_Opcode.rt)) { + if (m_Section->Is64Bit(m_Opcode.rt)) { + _MMU->Compile_SW_Register(m_Section,MipsRegHi(m_Opcode.rt), Address); } else { - _MMU->Compile_SW_Register(m_Section,Map_TempReg(m_Section,x86_Any,Opcode.rt,TRUE), Address); + _MMU->Compile_SW_Register(m_Section,m_Section->Map_TempReg(x86_Any,m_Opcode.rt,TRUE), Address); } - _MMU->Compile_SW_Register(m_Section,m_Section->MipsRegLo(Opcode.rt), Address + 4); + _MMU->Compile_SW_Register(m_Section,cMipsRegLo(m_Opcode.rt), Address + 4); } else { - _MMU->Compile_SW_Register(m_Section,TempReg1 = Map_TempReg(m_Section,x86_Any,Opcode.rt,TRUE), Address); - _MMU->Compile_SW_Register(m_Section,Map_TempReg(m_Section,TempReg1,Opcode.rt,FALSE), Address + 4); + _MMU->Compile_SW_Register(m_Section,TempReg1 = m_Section->Map_TempReg(x86_Any,m_Opcode.rt,TRUE), Address); + _MMU->Compile_SW_Register(m_Section,m_Section->Map_TempReg(TempReg1,m_Opcode.rt,FALSE), Address + 4); } return; } - if (m_Section->IsMapped(Opcode.rt)) { ProtectGPR(m_Section,Opcode.rt); } - if (m_Section->IsMapped(Opcode.base)) { - ProtectGPR(m_Section,Opcode.base); - if (Opcode.offset != 0) { - TempReg1 = Map_TempReg(m_Section,x86_Any,-1,FALSE); - LeaSourceAndOffset(TempReg1,m_Section->MipsRegLo(Opcode.base),(short)Opcode.offset); + if (IsMapped(m_Opcode.rt)) { ProtectGPR(m_Opcode.rt); } + if (IsMapped(m_Opcode.base)) { + ProtectGPR(m_Opcode.base); + if (m_Opcode.offset != 0) { + TempReg1 = m_Section->Map_TempReg(x86_Any,-1,FALSE); + LeaSourceAndOffset(TempReg1,cMipsRegLo(m_Opcode.base),(short)m_Opcode.offset); } else { - TempReg1 = Map_TempReg(m_Section,x86_Any,Opcode.base,FALSE); + TempReg1 = m_Section->Map_TempReg(x86_Any,m_Opcode.base,FALSE); } } else { - TempReg1 = Map_TempReg(m_Section,x86_Any,Opcode.base,FALSE); - if (Opcode.immediate == 0) { - } else if (Opcode.immediate == 1) { - IncX86reg(TempReg1); - } else if (Opcode.immediate == 0xFFFF) { - DecX86reg(TempReg1); - } else { - AddConstToX86Reg(TempReg1,(short)Opcode.immediate); - } + TempReg1 = m_Section->Map_TempReg(x86_Any,m_Opcode.base,FALSE); + AddConstToX86Reg(TempReg1,(short)m_Opcode.immediate); } - if (UseTlb) { - TempReg2 = Map_TempReg(m_Section,x86_Any,-1,FALSE); + if (g_UseTlb) { + TempReg2 = m_Section->Map_TempReg(x86_Any,-1,FALSE); MoveX86RegToX86Reg(TempReg1, TempReg2); ShiftRightUnsignImmed(TempReg2,12); MoveVariableDispToX86Reg(TLB_WriteMap,"TLB_WriteMap",TempReg2,TempReg2,4); @@ -2729,529 +2696,577 @@ void CRecompilerOps::Compile_SD (CCodeSection * m_Section){ //0041C522 85 C0 test eax,eax //0041C524 75 01 jne 0041C527 - if (m_Section->IsConst(Opcode.rt)) { - if (m_Section->Is64Bit(Opcode.rt)) { - MoveConstToX86regPointer(m_Section->MipsRegHi(Opcode.rt),TempReg1, TempReg2); + if (IsConst(m_Opcode.rt)) { + if (m_Section->Is64Bit(m_Opcode.rt)) { + MoveConstToX86regPointer(MipsRegHi(m_Opcode.rt),TempReg1, TempReg2); } else { - MoveConstToX86regPointer((m_Section->MipsRegLo_S(Opcode.rt) >> 31),TempReg1, TempReg2); + MoveConstToX86regPointer((m_Section->MipsRegLo_S(m_Opcode.rt) >> 31),TempReg1, TempReg2); } AddConstToX86Reg(TempReg1,4); - MoveConstToX86regPointer(m_Section->MipsRegLo(Opcode.rt),TempReg1, TempReg2); - } else if (m_Section->IsMapped(Opcode.rt)) { - if (m_Section->Is64Bit(Opcode.rt)) { - MoveX86regToX86regPointer(m_Section->MipsRegHi(Opcode.rt),TempReg1, TempReg2); + MoveConstToX86regPointer(cMipsRegLo(m_Opcode.rt),TempReg1, TempReg2); + } else if (IsMapped(m_Opcode.rt)) { + if (m_Section->Is64Bit(m_Opcode.rt)) { + MoveX86regToX86regPointer(MipsRegHi(m_Opcode.rt),TempReg1, TempReg2); } else { - MoveX86regToX86regPointer(Map_TempReg(m_Section,x86_Any,Opcode.rt,TRUE),TempReg1, TempReg2); + MoveX86regToX86regPointer(m_Section->Map_TempReg(x86_Any,m_Opcode.rt,TRUE),TempReg1, TempReg2); } AddConstToX86Reg(TempReg1,4); - MoveX86regToX86regPointer(m_Section->MipsRegLo(Opcode.rt),TempReg1, TempReg2); + MoveX86regToX86regPointer(cMipsRegLo(m_Opcode.rt),TempReg1, TempReg2); } else { - int X86Reg = Map_TempReg(m_Section,x86_Any,Opcode.rt,TRUE); + int X86Reg = m_Section->Map_TempReg(x86_Any,m_Opcode.rt,TRUE); MoveX86regToX86regPointer(X86Reg,TempReg1, TempReg2); AddConstToX86Reg(TempReg1,4); - MoveX86regToX86regPointer(Map_TempReg(m_Section,X86Reg,Opcode.rt,FALSE),TempReg1, TempReg2); + MoveX86regToX86regPointer(m_Section->Map_TempReg(X86Reg,m_Opcode.rt,FALSE),TempReg1, TempReg2); } } else { AndConstToX86Reg(TempReg1,0x1FFFFFFF); - if (m_Section->IsConst(Opcode.rt)) { - if (m_Section->Is64Bit(Opcode.rt)) { - MoveConstToN64Mem(m_Section->MipsRegHi(Opcode.rt),TempReg1); - } else if (m_Section->IsSigned(Opcode.rt)) { - MoveConstToN64Mem(((int)m_Section->MipsRegLo(Opcode.rt) >> 31),TempReg1); + if (IsConst(m_Opcode.rt)) { + if (m_Section->Is64Bit(m_Opcode.rt)) { + MoveConstToN64Mem(MipsRegHi(m_Opcode.rt),TempReg1); + } else if (m_Section->IsSigned(m_Opcode.rt)) { + MoveConstToN64Mem(((int)cMipsRegLo(m_Opcode.rt) >> 31),TempReg1); } else { MoveConstToN64Mem(0,TempReg1); } - MoveConstToN64MemDisp(m_Section->MipsRegLo(Opcode.rt),TempReg1,4); - } else if (m_Section->IsKnown(Opcode.rt) && m_Section->IsMapped(Opcode.rt)) { - if (m_Section->Is64Bit(Opcode.rt)) { - MoveX86regToN64Mem(m_Section->MipsRegHi(Opcode.rt),TempReg1); - } else if (m_Section->IsSigned(Opcode.rt)) { - MoveX86regToN64Mem(Map_TempReg(m_Section,x86_Any,Opcode.rt,TRUE), TempReg1); + MoveConstToN64MemDisp(cMipsRegLo(m_Opcode.rt),TempReg1,4); + } else if (m_Section->IsKnown(m_Opcode.rt) && IsMapped(m_Opcode.rt)) { + if (m_Section->Is64Bit(m_Opcode.rt)) { + MoveX86regToN64Mem(MipsRegHi(m_Opcode.rt),TempReg1); + } else if (m_Section->IsSigned(m_Opcode.rt)) { + MoveX86regToN64Mem(m_Section->Map_TempReg(x86_Any,m_Opcode.rt,TRUE), TempReg1); } else { MoveConstToN64Mem(0,TempReg1); } - MoveX86regToN64MemDisp(m_Section->MipsRegLo(Opcode.rt),TempReg1, 4); + MoveX86regToN64MemDisp(cMipsRegLo(m_Opcode.rt),TempReg1, 4); } else { int x86reg; - MoveX86regToN64Mem(x86reg = Map_TempReg(m_Section,x86_Any,Opcode.rt,TRUE), TempReg1); - MoveX86regToN64MemDisp(Map_TempReg(m_Section,x86reg,Opcode.rt,FALSE), TempReg1,4); + MoveX86regToN64Mem(x86reg = m_Section->Map_TempReg(x86_Any,m_Opcode.rt,TRUE), TempReg1); + MoveX86regToN64MemDisp(m_Section->Map_TempReg(x86reg,m_Opcode.rt,FALSE), TempReg1,4); } } +#endif } /********************** R4300i OpCodes: Special **********************/ -void CRecompilerOps::Compile_SPECIAL_SLL (CCodeSection * m_Section) { - CPU_Message(" %X %s",m_Section->CompilePC,R4300iOpcodeName(Opcode.Hex,m_Section->CompilePC)); +void CRecompilerOps::SPECIAL_SLL (void) { + CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC)); - if (Opcode.rd == 0) { return; } - if (m_Section->IsConst(Opcode.rt)) { - if (m_Section->IsMapped(Opcode.rd)) { UnMap_GPR(m_Section,Opcode.rd, FALSE); } - m_Section->MipsRegLo(Opcode.rd) = m_Section->MipsRegLo(Opcode.rt) << Opcode.sa; - m_Section->MipsRegState(Opcode.rd) = CRegInfo::STATE_CONST_32; + if (m_Opcode.rd == 0) { return; } + if (IsConst(m_Opcode.rt)) { + if (IsMapped(m_Opcode.rd)) { UnMap_GPR(m_Opcode.rd, FALSE); } + MipsRegLo(m_Opcode.rd) = cMipsRegLo(m_Opcode.rt) << m_Opcode.sa; + MipsRegState(m_Opcode.rd) = CRegInfo::STATE_CONST_32; return; } - if (Opcode.rd != Opcode.rt && m_Section->IsMapped(Opcode.rt)) { - switch (Opcode.sa) { + if (m_Opcode.rd != m_Opcode.rt && IsMapped(m_Opcode.rt)) { + switch (m_Opcode.sa) { case 0: - Map_GPR_32bit(m_Section,Opcode.rd,TRUE,Opcode.rt); + Map_GPR_32bit(m_Opcode.rd,TRUE,m_Opcode.rt); break; case 1: - ProtectGPR(m_Section,Opcode.rt); - Map_GPR_32bit(m_Section,Opcode.rd,TRUE,-1); - LeaRegReg(m_Section->MipsRegLo(Opcode.rd),m_Section->MipsRegLo(Opcode.rt), 2); + ProtectGPR(m_Opcode.rt); + Map_GPR_32bit(m_Opcode.rd,TRUE,-1); + LeaRegReg(cMipsRegMapLo(m_Opcode.rd),cMipsRegMapLo(m_Opcode.rt), 2); break; case 2: - ProtectGPR(m_Section,Opcode.rt); - Map_GPR_32bit(m_Section,Opcode.rd,TRUE,-1); - LeaRegReg(m_Section->MipsRegLo(Opcode.rd),m_Section->MipsRegLo(Opcode.rt), 4); + ProtectGPR(m_Opcode.rt); + Map_GPR_32bit(m_Opcode.rd,TRUE,-1); + LeaRegReg(cMipsRegMapLo(m_Opcode.rd),cMipsRegMapLo(m_Opcode.rt), 4); break; case 3: - ProtectGPR(m_Section,Opcode.rt); - Map_GPR_32bit(m_Section,Opcode.rd,TRUE,-1); - LeaRegReg(m_Section->MipsRegLo(Opcode.rd),m_Section->MipsRegLo(Opcode.rt), 8); + ProtectGPR(m_Opcode.rt); + Map_GPR_32bit(m_Opcode.rd,TRUE,-1); + LeaRegReg(cMipsRegMapLo(m_Opcode.rd),cMipsRegMapLo(m_Opcode.rt), 8); break; default: - Map_GPR_32bit(m_Section,Opcode.rd,TRUE,Opcode.rt); - ShiftLeftSignImmed(m_Section->MipsRegLo(Opcode.rd),(BYTE)Opcode.sa); + Map_GPR_32bit(m_Opcode.rd,TRUE,m_Opcode.rt); + ShiftLeftSignImmed(cMipsRegMapLo(m_Opcode.rd),(BYTE)m_Opcode.sa); } } else { - Map_GPR_32bit(m_Section,Opcode.rd,TRUE,Opcode.rt); - ShiftLeftSignImmed(m_Section->MipsRegLo(Opcode.rd),(BYTE)Opcode.sa); + Map_GPR_32bit(m_Opcode.rd,TRUE,m_Opcode.rt); + ShiftLeftSignImmed(cMipsRegMapLo(m_Opcode.rd),(BYTE)m_Opcode.sa); } } -void CRecompilerOps::Compile_SPECIAL_SRL (CCodeSection * m_Section) { - CPU_Message(" %X %s",m_Section->CompilePC,R4300iOpcodeName(Opcode.Hex,m_Section->CompilePC)); - if (Opcode.rd == 0) { return; } +void CRecompilerOps::SPECIAL_SRL (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC)); + if (m_Opcode.rd == 0) { return; } - if (m_Section->IsConst(Opcode.rt)) { - if (m_Section->IsMapped(Opcode.rd)) { UnMap_GPR(m_Section,Opcode.rd, FALSE); } - m_Section->MipsRegLo(Opcode.rd) = m_Section->MipsRegLo(Opcode.rt) >> Opcode.sa; - m_Section->MipsRegState(Opcode.rd) = CRegInfo::STATE_CONST_32; + if (IsConst(m_Opcode.rt)) { + if (IsMapped(m_Opcode.rd)) { UnMap_GPR(m_Opcode.rd, FALSE); } + cMipsRegLo(m_Opcode.rd) = cMipsRegLo(m_Opcode.rt) >> m_Opcode.sa; + MipsRegState(m_Opcode.rd) = CRegInfo::STATE_CONST_32; return; } - Map_GPR_32bit(m_Section,Opcode.rd,TRUE,Opcode.rt); - ShiftRightUnsignImmed(m_Section->MipsRegLo(Opcode.rd),(BYTE)Opcode.sa); + Map_GPR_32bit(m_Opcode.rd,TRUE,m_Opcode.rt); + ShiftRightUnsignImmed(cMipsRegLo(m_Opcode.rd),(BYTE)m_Opcode.sa); +#endif } -void CRecompilerOps::Compile_SPECIAL_SRA (CCodeSection * m_Section) { - CPU_Message(" %X %s",m_Section->CompilePC,R4300iOpcodeName(Opcode.Hex,m_Section->CompilePC)); - if (Opcode.rd == 0) { return; } +void CRecompilerOps::SPECIAL_SRA (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC)); + if (m_Opcode.rd == 0) { return; } - if (m_Section->IsConst(Opcode.rt)) { - if (m_Section->IsMapped(Opcode.rd)) { UnMap_GPR(m_Section,Opcode.rd, FALSE); } - m_Section->MipsRegLo(Opcode.rd) = m_Section->MipsRegLo_S(Opcode.rt) >> Opcode.sa; - m_Section->MipsRegState(Opcode.rd) = CRegInfo::STATE_CONST_32; + if (IsConst(m_Opcode.rt)) { + if (IsMapped(m_Opcode.rd)) { UnMap_GPR(m_Opcode.rd, FALSE); } + cMipsRegLo(m_Opcode.rd) = m_Section->MipsRegLo_S(m_Opcode.rt) >> m_Opcode.sa; + MipsRegState(m_Opcode.rd) = CRegInfo::STATE_CONST_32; return; } - Map_GPR_32bit(m_Section,Opcode.rd,TRUE,Opcode.rt); - ShiftRightSignImmed(m_Section->MipsRegLo(Opcode.rd),(BYTE)Opcode.sa); + Map_GPR_32bit(m_Opcode.rd,TRUE,m_Opcode.rt); + ShiftRightSignImmed(cMipsRegLo(m_Opcode.rd),(BYTE)m_Opcode.sa); +#endif } -void CRecompilerOps::Compile_SPECIAL_SLLV (CCodeSection * m_Section) { - CPU_Message(" %X %s",m_Section->CompilePC,R4300iOpcodeName(Opcode.Hex,m_Section->CompilePC)); - if (Opcode.rd == 0) { return; } +void CRecompilerOps::SPECIAL_SLLV (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC)); + if (m_Opcode.rd == 0) { return; } - if (m_Section->IsConst(Opcode.rs)) { - DWORD Shift = (m_Section->MipsRegLo(Opcode.rs) & 0x1F); - if (m_Section->IsConst(Opcode.rt)) { - if (m_Section->IsMapped(Opcode.rd)) { UnMap_GPR(m_Section,Opcode.rd, FALSE); } - m_Section->MipsRegLo(Opcode.rd) = m_Section->MipsRegLo(Opcode.rt) << Shift; - m_Section->MipsRegState(Opcode.rd) = CRegInfo::STATE_CONST_32; + if (IsConst(m_Opcode.rs)) { + DWORD Shift = (cMipsRegLo(m_Opcode.rs) & 0x1F); + if (IsConst(m_Opcode.rt)) { + if (IsMapped(m_Opcode.rd)) { UnMap_GPR(m_Opcode.rd, FALSE); } + cMipsRegLo(m_Opcode.rd) = cMipsRegLo(m_Opcode.rt) << Shift; + MipsRegState(m_Opcode.rd) = CRegInfo::STATE_CONST_32; } else { - Map_GPR_32bit(m_Section,Opcode.rd,TRUE,Opcode.rt); - ShiftLeftSignImmed(m_Section->MipsRegLo(Opcode.rd),(BYTE)Shift); + Map_GPR_32bit(m_Opcode.rd,TRUE,m_Opcode.rt); + ShiftLeftSignImmed(cMipsRegMapLo(m_Opcode.rd),(BYTE)Shift); } return; } - Map_TempReg(m_Section,x86_ECX,Opcode.rs,FALSE); + m_Section->Map_TempReg(x86_ECX,m_Opcode.rs,FALSE); AndConstToX86Reg(x86_ECX,0x1F); - Map_GPR_32bit(m_Section,Opcode.rd,TRUE,Opcode.rt); - ShiftLeftSign(m_Section->MipsRegLo(Opcode.rd)); + Map_GPR_32bit(m_Opcode.rd,TRUE,m_Opcode.rt); + ShiftLeftSign(cMipsRegLo(m_Opcode.rd)); +#endif } -void CRecompilerOps::Compile_SPECIAL_SRLV (CCodeSection * m_Section) { - CPU_Message(" %X %s",m_Section->CompilePC,R4300iOpcodeName(Opcode.Hex,m_Section->CompilePC)); - if (Opcode.rd == 0) { return; } +void CRecompilerOps::SPECIAL_SRLV (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC)); + if (m_Opcode.rd == 0) { return; } - if (m_Section->IsKnown(Opcode.rs) && m_Section->IsConst(Opcode.rs)) { - DWORD Shift = (m_Section->MipsRegLo(Opcode.rs) & 0x1F); - if (m_Section->IsConst(Opcode.rt)) { - if (m_Section->IsMapped(Opcode.rd)) { UnMap_GPR(m_Section,Opcode.rd, FALSE); } - m_Section->MipsRegLo(Opcode.rd) = m_Section->MipsRegLo(Opcode.rt) >> Shift; - m_Section->MipsRegState(Opcode.rd) = CRegInfo::STATE_CONST_32; + if (m_Section->IsKnown(m_Opcode.rs) && IsConst(m_Opcode.rs)) { + DWORD Shift = (cMipsRegLo(m_Opcode.rs) & 0x1F); + if (IsConst(m_Opcode.rt)) { + if (IsMapped(m_Opcode.rd)) { UnMap_GPR(m_Opcode.rd, FALSE); } + cMipsRegLo(m_Opcode.rd) = cMipsRegLo(m_Opcode.rt) >> Shift; + MipsRegState(m_Opcode.rd) = CRegInfo::STATE_CONST_32; return; } - Map_GPR_32bit(m_Section,Opcode.rd,TRUE,Opcode.rt); - ShiftRightUnsignImmed(m_Section->MipsRegLo(Opcode.rd),(BYTE)Shift); + Map_GPR_32bit(m_Opcode.rd,TRUE,m_Opcode.rt); + ShiftRightUnsignImmed(cMipsRegLo(m_Opcode.rd),(BYTE)Shift); return; } - Map_TempReg(m_Section,x86_ECX,Opcode.rs,FALSE); + m_Section->Map_TempReg(x86_ECX,m_Opcode.rs,FALSE); AndConstToX86Reg(x86_ECX,0x1F); - Map_GPR_32bit(m_Section,Opcode.rd,TRUE,Opcode.rt); - ShiftRightUnsign(m_Section->MipsRegLo(Opcode.rd)); + Map_GPR_32bit(m_Opcode.rd,TRUE,m_Opcode.rt); + ShiftRightUnsign(cMipsRegLo(m_Opcode.rd)); +#endif } -void CRecompilerOps::Compile_SPECIAL_SRAV (CCodeSection * m_Section) { - CPU_Message(" %X %s",m_Section->CompilePC,R4300iOpcodeName(Opcode.Hex,m_Section->CompilePC)); - if (Opcode.rd == 0) { return; } +void CRecompilerOps::SPECIAL_SRAV (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC)); + if (m_Opcode.rd == 0) { return; } - if (m_Section->IsKnown(Opcode.rs) && m_Section->IsConst(Opcode.rs)) { - DWORD Shift = (m_Section->MipsRegLo(Opcode.rs) & 0x1F); - if (m_Section->IsConst(Opcode.rt)) { - if (m_Section->IsMapped(Opcode.rd)) { UnMap_GPR(m_Section,Opcode.rd, FALSE); } - m_Section->MipsRegLo(Opcode.rd) = m_Section->MipsRegLo_S(Opcode.rt) >> Shift; - m_Section->MipsRegState(Opcode.rd) = CRegInfo::STATE_CONST_32; + if (m_Section->IsKnown(m_Opcode.rs) && IsConst(m_Opcode.rs)) { + DWORD Shift = (cMipsRegLo(m_Opcode.rs) & 0x1F); + if (IsConst(m_Opcode.rt)) { + if (IsMapped(m_Opcode.rd)) { UnMap_GPR(m_Opcode.rd, FALSE); } + cMipsRegLo(m_Opcode.rd) = m_Section->MipsRegLo_S(m_Opcode.rt) >> Shift; + MipsRegState(m_Opcode.rd) = CRegInfo::STATE_CONST_32; return; } - Map_GPR_32bit(m_Section,Opcode.rd,TRUE,Opcode.rt); - ShiftRightSignImmed(m_Section->MipsRegLo(Opcode.rd),(BYTE)Shift); + Map_GPR_32bit(m_Opcode.rd,TRUE,m_Opcode.rt); + ShiftRightSignImmed(cMipsRegLo(m_Opcode.rd),(BYTE)Shift); return; } - Map_TempReg(m_Section,x86_ECX,Opcode.rs,FALSE); + m_Section->Map_TempReg(x86_ECX,m_Opcode.rs,FALSE); AndConstToX86Reg(x86_ECX,0x1F); - Map_GPR_32bit(m_Section,Opcode.rd,TRUE,Opcode.rt); - ShiftRightSign(m_Section->MipsRegLo(Opcode.rd)); + Map_GPR_32bit(m_Opcode.rd,TRUE,m_Opcode.rt); + ShiftRightSign(cMipsRegLo(m_Opcode.rd)); +#endif } -void CRecompilerOps::Compile_SPECIAL_JR (CCodeSection * m_Section) { +void CRecompilerOps::SPECIAL_JR (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix static char JumpLabel[100]; - if ( NextInstruction == NORMAL ) { - CPU_Message(" %X %s",m_Section->CompilePC,R4300iOpcodeName(Opcode.Hex,m_Section->CompilePC)); - if (m_Section->IsConst(Opcode.rs)) { - sprintf(JumpLabel,"0x%08X",m_Section->MipsRegLo(Opcode.rs)); - m_Section->Jump.BranchLabel = JumpLabel; - m_Section->Jump.TargetPC = m_Section->MipsRegLo(Opcode.rs); - m_Section->Jump.FallThrough = TRUE; - m_Section->Jump.LinkLocation = NULL; - m_Section->Jump.LinkLocation2 = NULL; - m_Section->Cont.FallThrough = FALSE; - m_Section->Cont.LinkLocation = NULL; - m_Section->Cont.LinkLocation2 = NULL; - if ((m_Section->CompilePC & 0xFFC) == 0xFFC) { + if ( m_NextInstruction == NORMAL ) { + CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC)); + if (IsConst(m_Opcode.rs)) { + sprintf(JumpLabel,"0x%08X",cMipsRegLo(m_Opcode.rs)); + m_Section->m_Jump.BranchLabel = JumpLabel; + m_Section->m_Jump.TargetPC = cMipsRegLo(m_Opcode.rs); + m_Section->m_Jump.FallThrough = TRUE; + m_Section->m_Jump.LinkLocation = NULL; + m_Section->m_Jump.LinkLocation2 = NULL; + m_Section->m_Cont.FallThrough = FALSE; + m_Section->m_Cont.LinkLocation = NULL; + m_Section->m_Cont.LinkLocation2 = NULL; + if ((m_CompilePC & 0xFFC) == 0xFFC) { _N64System->GetRecompiler()->GenerateSectionLinkage(m_Section); - NextInstruction = END_BLOCK; + m_NextInstruction = END_BLOCK; return; } } - if ((m_Section->CompilePC & 0xFFC) == 0xFFC) { - if (m_Section->IsMapped(Opcode.rs)) { - MoveX86regToVariable(m_Section->MipsRegLo(Opcode.rs),&JumpToLocation, "JumpToLocation"); + if ((m_CompilePC & 0xFFC) == 0xFFC) { + if (IsMapped(m_Opcode.rs)) { + MoveX86regToVariable(cMipsRegLo(m_Opcode.rs),&JumpToLocation, "JumpToLocation"); } else { - MoveX86regToVariable(Map_TempReg(m_Section,x86_Any,Opcode.rs,FALSE),&JumpToLocation, "JumpToLocation"); + MoveX86regToVariable(m_Section->Map_TempReg(x86_Any,m_Opcode.rs,FALSE),&JumpToLocation, "JumpToLocation"); } - MoveConstToVariable(m_Section->CompilePC + 4,_PROGRAM_COUNTER,"PROGRAM_COUNTER"); - _N64System->GetRecompiler()->UpdateCounters(&m_Section->BlockCycleCount(),&m_Section->BlockRandomModifier(),FALSE); + MoveConstToVariable(m_CompilePC + 4,_PROGRAM_COUNTER,"PROGRAM_COUNTER"); + UpdateCounters(&m_RegWorkingSet.BlockCycleCount(),&m_RegWorkingSet.BlockRandomModifier(),FALSE); WriteBackRegisters(m_Section); if (CPU_Type == CPU_SyncCores) { Call_Direct(SyncToPC, "SyncToPC"); } - MoveConstToVariable(DELAY_SLOT,&NextInstruction,"NextInstruction"); + MoveConstToVariable(DELAY_SLOT,&m_NextInstruction,"m_NextInstruction"); Ret(); - NextInstruction = END_BLOCK; + m_NextInstruction = END_BLOCK; return; } - if (DelaySlotEffectsCompare(m_Section->CompilePC,Opcode.rs,0)) { - if (m_Section->IsConst(Opcode.rs)) { - MoveConstToVariable(m_Section->MipsRegLo(Opcode.rs),_PROGRAM_COUNTER, "PROGRAM_COUNTER"); - } else if (m_Section->IsMapped(Opcode.rs)) { - MoveX86regToVariable(m_Section->MipsRegLo(Opcode.rs),_PROGRAM_COUNTER, "PROGRAM_COUNTER"); + if (DelaySlotEffectsCompare(m_CompilePC,m_Opcode.rs,0)) { + if (IsConst(m_Opcode.rs)) { + MoveConstToVariable(cMipsRegLo(m_Opcode.rs),_PROGRAM_COUNTER, "PROGRAM_COUNTER"); + } else if (IsMapped(m_Opcode.rs)) { + MoveX86regToVariable(cMipsRegLo(m_Opcode.rs),_PROGRAM_COUNTER, "PROGRAM_COUNTER"); } else { - MoveX86regToVariable(Map_TempReg(m_Section,x86_Any,Opcode.rs,FALSE),_PROGRAM_COUNTER, "PROGRAM_COUNTER"); + MoveX86regToVariable(m_Section->Map_TempReg(x86_Any,m_Opcode.rs,FALSE),_PROGRAM_COUNTER, "PROGRAM_COUNTER"); } } - NextInstruction = DO_DELAY_SLOT; - } else if (NextInstruction == DELAY_SLOT_DONE ) { - if (DelaySlotEffectsCompare(m_Section->CompilePC,Opcode.rs,0)) { - _N64System->GetRecompiler()->CompileExit (m_Section,m_Section->CompilePC,(DWORD)-1,m_Section->RegWorking,CExitInfo::Normal,TRUE,NULL); + m_NextInstruction = DO_DELAY_SLOT; + } else if (m_NextInstruction == DELAY_SLOT_DONE ) { + if (DelaySlotEffectsCompare(m_CompilePC,m_Opcode.rs,0)) { + _N64System->GetRecompiler()->CompileExit (m_Section,m_CompilePC,(DWORD)-1,m_RegWorkingSet,CExitInfo::Normal,TRUE,NULL); } else { - if (m_Section->IsConst(Opcode.rs)) { - memcpy(&m_Section->Jump.RegSet,&m_Section->RegWorking,sizeof(CRegInfo)); + if (IsConst(m_Opcode.rs)) { + memcpy(&m_Section->m_Jump.RegSet,&m_RegWorkingSet,sizeof(CRegInfo)); _N64System->GetRecompiler()->GenerateSectionLinkage(m_Section); } else { - if (m_Section->IsMapped(Opcode.rs)) { - MoveX86regToVariable(m_Section->MipsRegLo(Opcode.rs),_PROGRAM_COUNTER, "PROGRAM_COUNTER"); + if (IsMapped(m_Opcode.rs)) { + MoveX86regToVariable(cMipsRegLo(m_Opcode.rs),_PROGRAM_COUNTER, "PROGRAM_COUNTER"); } else { - MoveX86regToVariable(Map_TempReg(m_Section,x86_Any,Opcode.rs,FALSE),_PROGRAM_COUNTER, "PROGRAM_COUNTER"); + MoveX86regToVariable(m_Section->Map_TempReg(x86_Any,m_Opcode.rs,FALSE),_PROGRAM_COUNTER, "PROGRAM_COUNTER"); } - _N64System->GetRecompiler()->CompileExit (m_Section,-1, (DWORD)-1,m_Section->RegWorking,CExitInfo::Normal,TRUE,NULL); + _N64System->GetRecompiler()->CompileExit (m_Section,-1, (DWORD)-1,m_RegWorkingSet,CExitInfo::Normal,TRUE,NULL); } } - NextInstruction = END_BLOCK; + m_NextInstruction = END_BLOCK; } else { #ifndef EXTERNAL_RELEASE - DisplayError("WTF\n\nBranch\nNextInstruction = %X", NextInstruction); + DisplayError("WTF\n\nBranch\nNextInstruction = %X", m_NextInstruction); #endif } +#endif } -void CRecompilerOps::Compile_SPECIAL_JALR (CCodeSection * m_Section) { +void CRecompilerOps::SPECIAL_JALR (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix static char JumpLabel[100]; - if ( NextInstruction == NORMAL ) { - CPU_Message(" %X %s",m_Section->CompilePC,R4300iOpcodeName(Opcode.Hex,m_Section->CompilePC)); - if (DelaySlotEffectsCompare(m_Section->CompilePC,Opcode.rs,0)) { - CRecompilerOps::Compile_UnknownOpcode(m_Section); + if ( m_NextInstruction == NORMAL ) { + CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC)); + if (DelaySlotEffectsCompare(m_CompilePC,m_Opcode.rs,0)) { + CRecompilerOps::UnknownOpcode(); } - UnMap_GPR(m_Section, Opcode.rd, FALSE); - m_Section->MipsRegLo(Opcode.rd) = m_Section->CompilePC + 8; - m_Section->MipsRegState(Opcode.rd) = CRegInfo::STATE_CONST_32; - if ((m_Section->CompilePC & 0xFFC) == 0xFFC) { - if (m_Section->IsMapped(Opcode.rs)) { - MoveX86regToVariable(m_Section->MipsRegLo(Opcode.rs),&JumpToLocation, "JumpToLocation"); + UnMap_GPR( m_Opcode.rd, FALSE); + cMipsRegLo(m_Opcode.rd) = m_CompilePC + 8; + MipsRegState(m_Opcode.rd) = CRegInfo::STATE_CONST_32; + if ((m_CompilePC & 0xFFC) == 0xFFC) { + if (IsMapped(m_Opcode.rs)) { + MoveX86regToVariable(cMipsRegLo(m_Opcode.rs),&JumpToLocation, "JumpToLocation"); } else { - MoveX86regToVariable(Map_TempReg(m_Section,x86_Any,Opcode.rs,FALSE),&JumpToLocation, "JumpToLocation"); + MoveX86regToVariable(m_Section->Map_TempReg(x86_Any,m_Opcode.rs,FALSE),&JumpToLocation, "JumpToLocation"); } - MoveConstToVariable(m_Section->CompilePC + 4,_PROGRAM_COUNTER,"PROGRAM_COUNTER"); - _N64System->GetRecompiler()->UpdateCounters(&m_Section->BlockCycleCount(),&m_Section->BlockRandomModifier(),FALSE); + MoveConstToVariable(m_CompilePC + 4,_PROGRAM_COUNTER,"PROGRAM_COUNTER"); + UpdateCounters(&m_RegWorkingSet.BlockCycleCount(),&m_RegWorkingSet.BlockRandomModifier(),FALSE); WriteBackRegisters(m_Section); if (CPU_Type == CPU_SyncCores) { Call_Direct(SyncToPC, "SyncToPC"); } - MoveConstToVariable(DELAY_SLOT,&NextInstruction,"NextInstruction"); + MoveConstToVariable(DELAY_SLOT,&m_NextInstruction,"m_NextInstruction"); Ret(); - NextInstruction = END_BLOCK; + m_NextInstruction = END_BLOCK; return; } - NextInstruction = DO_DELAY_SLOT; - } else if (NextInstruction == DELAY_SLOT_DONE ) { - if (m_Section->IsConst(Opcode.rs)) { - memcpy(&m_Section->Jump.RegSet,&m_Section->RegWorking,sizeof(CRegInfo)); - sprintf(JumpLabel,"0x%08X",m_Section->MipsRegLo(Opcode.rs)); - m_Section->Jump.BranchLabel = JumpLabel; - m_Section->Jump.TargetPC = m_Section->MipsRegLo(Opcode.rs); - m_Section->Jump.FallThrough = TRUE; - m_Section->Jump.LinkLocation = NULL; - m_Section->Jump.LinkLocation2 = NULL; - m_Section->Cont.FallThrough = FALSE; - m_Section->Cont.LinkLocation = NULL; - m_Section->Cont.LinkLocation2 = NULL; + m_NextInstruction = DO_DELAY_SLOT; + } else if (m_NextInstruction == DELAY_SLOT_DONE ) { + if (IsConst(m_Opcode.rs)) { + memcpy(&m_Section->m_Jump.RegSet,&m_RegWorkingSet,sizeof(CRegInfo)); + sprintf(JumpLabel,"0x%08X",cMipsRegLo(m_Opcode.rs)); + m_Section->m_Jump.BranchLabel = JumpLabel; + m_Section->m_Jump.TargetPC = cMipsRegLo(m_Opcode.rs); + m_Section->m_Jump.FallThrough = TRUE; + m_Section->m_Jump.LinkLocation = NULL; + m_Section->m_Jump.LinkLocation2 = NULL; + m_Section->m_Cont.FallThrough = FALSE; + m_Section->m_Cont.LinkLocation = NULL; + m_Section->m_Cont.LinkLocation2 = NULL; _N64System->GetRecompiler()->GenerateSectionLinkage(m_Section); } else { - if (m_Section->IsMapped(Opcode.rs)) { - MoveX86regToVariable(m_Section->MipsRegLo(Opcode.rs),_PROGRAM_COUNTER, "PROGRAM_COUNTER"); + if (IsMapped(m_Opcode.rs)) { + MoveX86regToVariable(cMipsRegLo(m_Opcode.rs),_PROGRAM_COUNTER, "PROGRAM_COUNTER"); } else { - MoveX86regToVariable(Map_TempReg(m_Section,x86_Any,Opcode.rs,FALSE),_PROGRAM_COUNTER, "PROGRAM_COUNTER"); + MoveX86regToVariable(m_Section->Map_TempReg(x86_Any,m_Opcode.rs,FALSE),_PROGRAM_COUNTER, "PROGRAM_COUNTER"); } - _N64System->GetRecompiler()->CompileExit (m_Section,m_Section->CompilePC, (DWORD)-1,m_Section->RegWorking,CExitInfo::Normal,TRUE,NULL); + _N64System->GetRecompiler()->CompileExit (m_Section,m_CompilePC, (DWORD)-1,m_RegWorkingSet,CExitInfo::Normal,TRUE,NULL); } - NextInstruction = END_BLOCK; + m_NextInstruction = END_BLOCK; } else { #ifndef EXTERNAL_RELEASE - DisplayError("WTF\n\nBranch\nNextInstruction = %X", NextInstruction); + DisplayError("WTF\n\nBranch\nNextInstruction = %X", m_NextInstruction); #endif } +#endif } -void CRecompilerOps::Compile_SPECIAL_SYSCALL (CCodeSection * m_Section) { - _N64System->GetRecompiler()->CompileExit (m_Section,m_Section->CompilePC,m_Section->CompilePC,m_Section->RegWorking,CExitInfo::DoSysCall,TRUE,NULL); +void CRecompilerOps::SPECIAL_SYSCALL (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + _N64System->GetRecompiler()->CompileExit (m_Section,m_CompilePC,m_CompilePC,m_RegWorkingSet,CExitInfo::DoSysCall,TRUE,NULL); +#endif } -void CRecompilerOps::Compile_SPECIAL_MFLO (CCodeSection * m_Section) { - CPU_Message(" %X %s",m_Section->CompilePC,R4300iOpcodeName(Opcode.Hex,m_Section->CompilePC)); - if (Opcode.rd == 0) { return; } +void CRecompilerOps::SPECIAL_MFLO (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC)); + if (m_Opcode.rd == 0) { return; } - Map_GPR_64bit(m_Section,Opcode.rd,-1); - MoveVariableToX86reg(&_RegLO->UW[0],"_RegLO->UW[0]",m_Section->MipsRegLo(Opcode.rd)); - MoveVariableToX86reg(&_RegLO->UW[1],"_RegLO->UW[1]",m_Section->MipsRegHi(Opcode.rd)); + Map_GPR_64bit(m_Section,m_Opcode.rd,-1); + MoveVariableToX86reg(&_RegLO->UW[0],"_RegLO->UW[0]",cMipsRegLo(m_Opcode.rd)); + MoveVariableToX86reg(&_RegLO->UW[1],"_RegLO->UW[1]",MipsRegHi(m_Opcode.rd)); +#endif } -void CRecompilerOps::Compile_SPECIAL_MTLO (CCodeSection * m_Section) { - CPU_Message(" %X %s",m_Section->CompilePC,R4300iOpcodeName(Opcode.Hex,m_Section->CompilePC)); +void CRecompilerOps::SPECIAL_MTLO (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC)); - if (m_Section->IsKnown(Opcode.rs) && m_Section->IsConst(Opcode.rs)) { - if (m_Section->Is64Bit(Opcode.rs)) { - MoveConstToVariable(m_Section->MipsRegHi(Opcode.rs),&_RegLO->UW[1],"_RegLO->UW[1]"); - } else if (m_Section->IsSigned(Opcode.rs) && ((m_Section->MipsRegLo(Opcode.rs) & 0x80000000) != 0)) { + if (m_Section->IsKnown(m_Opcode.rs) && IsConst(m_Opcode.rs)) { + if (m_Section->Is64Bit(m_Opcode.rs)) { + MoveConstToVariable(MipsRegHi(m_Opcode.rs),&_RegLO->UW[1],"_RegLO->UW[1]"); + } else if (m_Section->IsSigned(m_Opcode.rs) && ((cMipsRegLo(m_Opcode.rs) & 0x80000000) != 0)) { MoveConstToVariable(0xFFFFFFFF,&_RegLO->UW[1],"_RegLO->UW[1]"); } else { MoveConstToVariable(0,&_RegLO->UW[1],"_RegLO->UW[1]"); } - MoveConstToVariable(m_Section->MipsRegLo(Opcode.rs), &_RegLO->UW[0],"_RegLO->UW[0]"); - } else if (m_Section->IsKnown(Opcode.rs) && m_Section->IsMapped(Opcode.rs)) { - if (m_Section->Is64Bit(Opcode.rs)) { - MoveX86regToVariable(m_Section->MipsRegHi(Opcode.rs),&_RegLO->UW[1],"_RegLO->UW[1]"); - } else if (m_Section->IsSigned(Opcode.rs)) { - MoveX86regToVariable(Map_TempReg(m_Section,x86_Any,Opcode.rs,TRUE),&_RegLO->UW[1],"_RegLO->UW[1]"); + MoveConstToVariable(cMipsRegLo(m_Opcode.rs), &_RegLO->UW[0],"_RegLO->UW[0]"); + } else if (m_Section->IsKnown(m_Opcode.rs) && IsMapped(m_Opcode.rs)) { + if (m_Section->Is64Bit(m_Opcode.rs)) { + MoveX86regToVariable(MipsRegHi(m_Opcode.rs),&_RegLO->UW[1],"_RegLO->UW[1]"); + } else if (m_Section->IsSigned(m_Opcode.rs)) { + MoveX86regToVariable(m_Section->Map_TempReg(x86_Any,m_Opcode.rs,TRUE),&_RegLO->UW[1],"_RegLO->UW[1]"); } else { MoveConstToVariable(0,&_RegLO->UW[1],"_RegLO->UW[1]"); } - MoveX86regToVariable(m_Section->MipsRegLo(Opcode.rs), &_RegLO->UW[0],"_RegLO->UW[0]"); + MoveX86regToVariable(cMipsRegLo(m_Opcode.rs), &_RegLO->UW[0],"_RegLO->UW[0]"); } else { - int x86reg = Map_TempReg(m_Section,x86_Any,Opcode.rs,TRUE); + int x86reg = m_Section->Map_TempReg(x86_Any,m_Opcode.rs,TRUE); MoveX86regToVariable(x86reg,&_RegLO->UW[1],"_RegLO->UW[1]"); - MoveX86regToVariable(Map_TempReg(m_Section,x86reg,Opcode.rs,FALSE), &_RegLO->UW[0],"_RegLO->UW[0]"); + MoveX86regToVariable(m_Section->Map_TempReg(x86reg,m_Opcode.rs,FALSE), &_RegLO->UW[0],"_RegLO->UW[0]"); } +#endif } -void CRecompilerOps::Compile_SPECIAL_MFHI (CCodeSection * m_Section) { - CPU_Message(" %X %s",m_Section->CompilePC,R4300iOpcodeName(Opcode.Hex,m_Section->CompilePC)); - if (Opcode.rd == 0) { return; } +void CRecompilerOps::SPECIAL_MFHI (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC)); + if (m_Opcode.rd == 0) { return; } - Map_GPR_64bit(m_Section,Opcode.rd,-1); - MoveVariableToX86reg(&_RegHI->UW[0],"_RegHI->UW[0]",m_Section->MipsRegLo(Opcode.rd)); - MoveVariableToX86reg(&_RegHI->UW[1],"_RegHI->UW[1]",m_Section->MipsRegHi(Opcode.rd)); + Map_GPR_64bit(m_Section,m_Opcode.rd,-1); + MoveVariableToX86reg(&_RegHI->UW[0],"_RegHI->UW[0]",cMipsRegLo(m_Opcode.rd)); + MoveVariableToX86reg(&_RegHI->UW[1],"_RegHI->UW[1]",MipsRegHi(m_Opcode.rd)); +#endif } -void CRecompilerOps::Compile_SPECIAL_MTHI (CCodeSection * m_Section) { - CPU_Message(" %X %s",m_Section->CompilePC,R4300iOpcodeName(Opcode.Hex,m_Section->CompilePC)); - if (m_Section->IsKnown(Opcode.rs) && m_Section->IsConst(Opcode.rs)) { - if (m_Section->Is64Bit(Opcode.rs)) { - MoveConstToVariable(m_Section->MipsRegHi(Opcode.rs),&_RegHI->UW[1],"_RegHI->UW[1]"); - } else if (m_Section->IsSigned(Opcode.rs) && ((m_Section->MipsRegLo(Opcode.rs) & 0x80000000) != 0)) { +void CRecompilerOps::SPECIAL_MTHI (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC)); + if (m_Section->IsKnown(m_Opcode.rs) && IsConst(m_Opcode.rs)) { + if (m_Section->Is64Bit(m_Opcode.rs)) { + MoveConstToVariable(MipsRegHi(m_Opcode.rs),&_RegHI->UW[1],"_RegHI->UW[1]"); + } else if (m_Section->IsSigned(m_Opcode.rs) && ((cMipsRegLo(m_Opcode.rs) & 0x80000000) != 0)) { MoveConstToVariable(0xFFFFFFFF,&_RegHI->UW[1],"_RegHI->UW[1]"); } else { MoveConstToVariable(0,&_RegHI->UW[1],"_RegHI->UW[1]"); } - MoveConstToVariable(m_Section->MipsRegLo(Opcode.rs), &_RegHI->UW[0],"_RegHI->UW[0]"); - } else if (m_Section->IsKnown(Opcode.rs) && m_Section->IsMapped(Opcode.rs)) { - if (m_Section->Is64Bit(Opcode.rs)) { - MoveX86regToVariable(m_Section->MipsRegHi(Opcode.rs),&_RegHI->UW[1],"_RegHI->UW[1]"); - } else if (m_Section->IsSigned(Opcode.rs)) { - MoveX86regToVariable(Map_TempReg(m_Section,x86_Any,Opcode.rs,TRUE),&_RegHI->UW[1],"_RegHI->UW[1]"); + MoveConstToVariable(cMipsRegLo(m_Opcode.rs), &_RegHI->UW[0],"_RegHI->UW[0]"); + } else if (m_Section->IsKnown(m_Opcode.rs) && IsMapped(m_Opcode.rs)) { + if (m_Section->Is64Bit(m_Opcode.rs)) { + MoveX86regToVariable(MipsRegHi(m_Opcode.rs),&_RegHI->UW[1],"_RegHI->UW[1]"); + } else if (m_Section->IsSigned(m_Opcode.rs)) { + MoveX86regToVariable(m_Section->Map_TempReg(x86_Any,m_Opcode.rs,TRUE),&_RegHI->UW[1],"_RegHI->UW[1]"); } else { MoveConstToVariable(0,&_RegHI->UW[1],"_RegHI->UW[1]"); } - MoveX86regToVariable(m_Section->MipsRegLo(Opcode.rs), &_RegHI->UW[0],"_RegHI->UW[0]"); + MoveX86regToVariable(cMipsRegLo(m_Opcode.rs), &_RegHI->UW[0],"_RegHI->UW[0]"); } else { - int x86reg = Map_TempReg(m_Section,x86_Any,Opcode.rs,TRUE); + int x86reg = m_Section->Map_TempReg(x86_Any,m_Opcode.rs,TRUE); MoveX86regToVariable(x86reg,&_RegHI->UW[1],"_RegHI->UW[1]"); - MoveX86regToVariable(Map_TempReg(m_Section,x86reg,Opcode.rs,FALSE), &_RegHI->UW[0],"_RegHI->UW[0]"); + MoveX86regToVariable(m_Section->Map_TempReg(x86reg,m_Opcode.rs,FALSE), &_RegHI->UW[0],"_RegHI->UW[0]"); } +#endif } -void CRecompilerOps::Compile_SPECIAL_DSLLV (CCodeSection * m_Section) { +void CRecompilerOps::SPECIAL_DSLLV (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix BYTE * Jump[2]; - CPU_Message(" %X %s",m_Section->CompilePC,R4300iOpcodeName(Opcode.Hex,m_Section->CompilePC)); - if (Opcode.rd == 0) { return; } + CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC)); + if (m_Opcode.rd == 0) { return; } - if (m_Section->IsConst(Opcode.rs)) { - DWORD Shift = (m_Section->MipsRegLo(Opcode.rs) & 0x3F); - CRecompilerOps::Compile_UnknownOpcode(m_Section); + if (IsConst(m_Opcode.rs)) { + DWORD Shift = (cMipsRegLo(m_Opcode.rs) & 0x3F); + CRecompilerOps::UnknownOpcode(); return; } - Map_TempReg(m_Section,x86_ECX,Opcode.rs,FALSE); + m_Section->Map_TempReg(x86_ECX,m_Opcode.rs,FALSE); AndConstToX86Reg(x86_ECX,0x3F); - Map_GPR_64bit(m_Section,Opcode.rd,Opcode.rt); + Map_GPR_64bit(m_Section,m_Opcode.rd,m_Opcode.rt); CompConstToX86reg(x86_ECX,0x20); JaeLabel8("MORE32", 0); - Jump[0] = RecompPos - 1; - ShiftLeftDouble(m_Section->MipsRegHi(Opcode.rd),m_Section->MipsRegLo(Opcode.rd)); - ShiftLeftSign(m_Section->MipsRegLo(Opcode.rd)); + Jump[0] = m_RecompPos - 1; + ShiftLeftDouble(MipsRegHi(m_Opcode.rd),cMipsRegLo(m_Opcode.rd)); + ShiftLeftSign(cMipsRegLo(m_Opcode.rd)); JmpLabel8("continue", 0); - Jump[1] = RecompPos - 1; + Jump[1] = m_RecompPos - 1; //MORE32: CPU_Message(""); CPU_Message(" MORE32:"); - *((BYTE *)(Jump[0]))=(BYTE)(RecompPos - Jump[0] - 1); - MoveX86RegToX86Reg(m_Section->MipsRegLo(Opcode.rd),m_Section->MipsRegHi(Opcode.rd)); - XorX86RegToX86Reg(m_Section->MipsRegLo(Opcode.rd),m_Section->MipsRegLo(Opcode.rd)); + *((BYTE *)(Jump[0]))=(BYTE)(m_RecompPos - Jump[0] - 1); + MoveX86RegToX86Reg(cMipsRegLo(m_Opcode.rd),MipsRegHi(m_Opcode.rd)); + XorX86RegToX86Reg(cMipsRegLo(m_Opcode.rd),cMipsRegLo(m_Opcode.rd)); AndConstToX86Reg(x86_ECX,0x1F); - ShiftLeftSign(m_Section->MipsRegHi(Opcode.rd)); + ShiftLeftSign(MipsRegHi(m_Opcode.rd)); //continue: CPU_Message(""); CPU_Message(" continue:"); - *((BYTE *)(Jump[1]))=(BYTE)(RecompPos - Jump[1] - 1); + *((BYTE *)(Jump[1]))=(BYTE)(m_RecompPos - Jump[1] - 1); +#endif } -void CRecompilerOps::Compile_SPECIAL_DSRLV (CCodeSection * m_Section) { +void CRecompilerOps::SPECIAL_DSRLV (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix BYTE * Jump[2]; - CPU_Message(" %X %s",m_Section->CompilePC,R4300iOpcodeName(Opcode.Hex,m_Section->CompilePC)); - if (Opcode.rd == 0) { return; } + CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC)); + if (m_Opcode.rd == 0) { return; } - if (m_Section->IsConst(Opcode.rs)) { - DWORD Shift = (m_Section->MipsRegLo(Opcode.rs) & 0x3F); - if (m_Section->IsConst(Opcode.rt)) { - if (m_Section->IsMapped(Opcode.rd)) { UnMap_GPR(m_Section,Opcode.rd, FALSE); } - m_Section->MipsReg(Opcode.rd) = m_Section->Is64Bit(Opcode.rt)?m_Section->MipsReg(Opcode.rt):(_int64)m_Section->MipsRegLo_S(Opcode.rt); - m_Section->MipsReg(Opcode.rd) = m_Section->MipsReg(Opcode.rd) >> Shift; - if ((m_Section->MipsRegHi(Opcode.rd) == 0) && (m_Section->MipsRegLo(Opcode.rd) & 0x80000000) == 0) { - m_Section->MipsRegState(Opcode.rd) = CRegInfo::STATE_CONST_32; - } else if ((m_Section->MipsRegHi(Opcode.rd) == 0xFFFFFFFF) && (m_Section->MipsRegLo(Opcode.rd) & 0x80000000) != 0) { - m_Section->MipsRegState(Opcode.rd) = CRegInfo::STATE_CONST_32; + if (IsConst(m_Opcode.rs)) { + DWORD Shift = (cMipsRegLo(m_Opcode.rs) & 0x3F); + if (IsConst(m_Opcode.rt)) { + if (IsMapped(m_Opcode.rd)) { UnMap_GPR(m_Opcode.rd, FALSE); } + m_Section->MipsReg(m_Opcode.rd) = m_Section->Is64Bit(m_Opcode.rt)?m_Section->MipsReg(m_Opcode.rt):(_int64)m_Section->MipsRegLo_S(m_Opcode.rt); + m_Section->MipsReg(m_Opcode.rd) = m_Section->MipsReg(m_Opcode.rd) >> Shift; + if ((MipsRegHi(m_Opcode.rd) == 0) && (cMipsRegLo(m_Opcode.rd) & 0x80000000) == 0) { + MipsRegState(m_Opcode.rd) = CRegInfo::STATE_CONST_32; + } else if ((MipsRegHi(m_Opcode.rd) == 0xFFFFFFFF) && (cMipsRegLo(m_Opcode.rd) & 0x80000000) != 0) { + MipsRegState(m_Opcode.rd) = CRegInfo::STATE_CONST_32; } else { - m_Section->MipsRegState(Opcode.rd) = CRegInfo::STATE_CONST_64; + MipsRegState(m_Opcode.rd) = CRegInfo::STATE_CONST_64; } return; } //if (Shift < 0x20) { //} else { //} - //CRecompilerOps::Compile_UnknownOpcode(m_Section); + //CRecompilerOps::UnknownOpcode(); //return; } - Map_TempReg(m_Section,x86_ECX,Opcode.rs,FALSE); + m_Section->Map_TempReg(x86_ECX,m_Opcode.rs,FALSE); AndConstToX86Reg(x86_ECX,0x3F); - Map_GPR_64bit(m_Section,Opcode.rd,Opcode.rt); + Map_GPR_64bit(m_Section,m_Opcode.rd,m_Opcode.rt); CompConstToX86reg(x86_ECX,0x20); JaeLabel8("MORE32", 0); - Jump[0] = RecompPos - 1; - ShiftRightDouble(m_Section->MipsRegLo(Opcode.rd),m_Section->MipsRegHi(Opcode.rd)); - ShiftRightUnsign(m_Section->MipsRegHi(Opcode.rd)); + Jump[0] = m_RecompPos - 1; + ShiftRightDouble(cMipsRegLo(m_Opcode.rd),MipsRegHi(m_Opcode.rd)); + ShiftRightUnsign(MipsRegHi(m_Opcode.rd)); JmpLabel8("continue", 0); - Jump[1] = RecompPos - 1; + Jump[1] = m_RecompPos - 1; //MORE32: CPU_Message(""); CPU_Message(" MORE32:"); - *((BYTE *)(Jump[0]))=(BYTE)(RecompPos - Jump[0] - 1); - MoveX86RegToX86Reg(m_Section->MipsRegHi(Opcode.rd),m_Section->MipsRegLo(Opcode.rd)); - XorX86RegToX86Reg(m_Section->MipsRegHi(Opcode.rd),m_Section->MipsRegHi(Opcode.rd)); + *((BYTE *)(Jump[0]))=(BYTE)(m_RecompPos - Jump[0] - 1); + MoveX86RegToX86Reg(MipsRegHi(m_Opcode.rd),cMipsRegLo(m_Opcode.rd)); + XorX86RegToX86Reg(MipsRegHi(m_Opcode.rd),MipsRegHi(m_Opcode.rd)); AndConstToX86Reg(x86_ECX,0x1F); - ShiftRightUnsign(m_Section->MipsRegLo(Opcode.rd)); + ShiftRightUnsign(cMipsRegLo(m_Opcode.rd)); //continue: CPU_Message(""); CPU_Message(" continue:"); - *((BYTE *)(Jump[1]))=(BYTE)(RecompPos - Jump[1] - 1); + *((BYTE *)(Jump[1]))=(BYTE)(m_RecompPos - Jump[1] - 1); +#endif } -void CRecompilerOps::Compile_SPECIAL_DSRAV (CCodeSection * m_Section) { +void CRecompilerOps::SPECIAL_DSRAV (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix BYTE * Jump[2]; - CPU_Message(" %X %s",m_Section->CompilePC,R4300iOpcodeName(Opcode.Hex,m_Section->CompilePC)); - if (Opcode.rd == 0) { return; } + CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC)); + if (m_Opcode.rd == 0) { return; } - if (m_Section->IsConst(Opcode.rs)) { - DWORD Shift = (m_Section->MipsRegLo(Opcode.rs) & 0x3F); - CRecompilerOps::Compile_UnknownOpcode(m_Section); + if (IsConst(m_Opcode.rs)) { + DWORD Shift = (cMipsRegLo(m_Opcode.rs) & 0x3F); + CRecompilerOps::UnknownOpcode(); return; } - Map_TempReg(m_Section,x86_ECX,Opcode.rs,FALSE); + m_Section->Map_TempReg(x86_ECX,m_Opcode.rs,FALSE); AndConstToX86Reg(x86_ECX,0x3F); - Map_GPR_64bit(m_Section,Opcode.rd,Opcode.rt); + Map_GPR_64bit(m_Section,m_Opcode.rd,m_Opcode.rt); CompConstToX86reg(x86_ECX,0x20); JaeLabel8("MORE32", 0); - Jump[0] = RecompPos - 1; - ShiftRightDouble(m_Section->MipsRegLo(Opcode.rd),m_Section->MipsRegHi(Opcode.rd)); - ShiftRightSign(m_Section->MipsRegHi(Opcode.rd)); + Jump[0] = m_RecompPos - 1; + ShiftRightDouble(cMipsRegLo(m_Opcode.rd),MipsRegHi(m_Opcode.rd)); + ShiftRightSign(MipsRegHi(m_Opcode.rd)); JmpLabel8("continue", 0); - Jump[1] = RecompPos - 1; + Jump[1] = m_RecompPos - 1; //MORE32: CPU_Message(""); CPU_Message(" MORE32:"); - *((BYTE *)(Jump[0]))=(BYTE)(RecompPos - Jump[0] - 1); - MoveX86RegToX86Reg(m_Section->MipsRegHi(Opcode.rd),m_Section->MipsRegLo(Opcode.rd)); - ShiftRightSignImmed(m_Section->MipsRegHi(Opcode.rd),0x1F); + *((BYTE *)(Jump[0]))=(BYTE)(m_RecompPos - Jump[0] - 1); + MoveX86RegToX86Reg(MipsRegHi(m_Opcode.rd),cMipsRegLo(m_Opcode.rd)); + ShiftRightSignImmed(MipsRegHi(m_Opcode.rd),0x1F); AndConstToX86Reg(x86_ECX,0x1F); - ShiftRightSign(m_Section->MipsRegLo(Opcode.rd)); + ShiftRightSign(cMipsRegLo(m_Opcode.rd)); //continue: CPU_Message(""); CPU_Message(" continue:"); - *((BYTE *)(Jump[1]))=(BYTE)(RecompPos - Jump[1] - 1); + *((BYTE *)(Jump[1]))=(BYTE)(m_RecompPos - Jump[1] - 1); +#endif } -void CRecompilerOps::Compile_SPECIAL_MULT ( CCodeSection * m_Section) { - CPU_Message(" %X %s",m_Section->CompilePC,R4300iOpcodeName(Opcode.Hex,m_Section->CompilePC)); +void CRecompilerOps::SPECIAL_MULT ( void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC)); m_Section->x86Protected(x86_EDX) = TRUE; - Map_TempReg(m_Section,x86_EAX,Opcode.rs,FALSE); + m_Section->Map_TempReg(x86_EAX,m_Opcode.rs,FALSE); m_Section->x86Protected(x86_EDX) = FALSE; - Map_TempReg(m_Section,x86_EDX,Opcode.rt,FALSE); + m_Section->Map_TempReg(x86_EDX,m_Opcode.rt,FALSE); imulX86reg(x86_EDX); @@ -3261,15 +3276,18 @@ void CRecompilerOps::Compile_SPECIAL_MULT ( CCodeSection * m_Section) { ShiftRightSignImmed(x86_EDX,31); MoveX86regToVariable(x86_EAX,&_RegLO->UW[1],"_RegLO->UW[1]"); MoveX86regToVariable(x86_EDX,&_RegHI->UW[1],"_RegHI->UW[1]"); +#endif } -void CRecompilerOps::Compile_SPECIAL_MULTU (CCodeSection * m_Section) { - CPU_Message(" %X %s",m_Section->CompilePC,R4300iOpcodeName(Opcode.Hex,m_Section->CompilePC)); +void CRecompilerOps::SPECIAL_MULTU (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC)); m_Section->x86Protected(x86_EDX) = TRUE; - Map_TempReg(m_Section,x86_EAX,Opcode.rs,FALSE); + m_Section->Map_TempReg(x86_EAX,m_Opcode.rs,FALSE); m_Section->x86Protected(x86_EDX) = FALSE; - Map_TempReg(m_Section,x86_EDX,Opcode.rt,FALSE); + m_Section->Map_TempReg(x86_EDX,m_Opcode.rt,FALSE); MulX86reg(x86_EDX); @@ -3279,15 +3297,18 @@ void CRecompilerOps::Compile_SPECIAL_MULTU (CCodeSection * m_Section) { ShiftRightSignImmed(x86_EDX,31); MoveX86regToVariable(x86_EAX,&_RegLO->UW[1],"_RegLO->UW[1]"); MoveX86regToVariable(x86_EDX,&_RegHI->UW[1],"_RegHI->UW[1]"); +#endif } -void CRecompilerOps::Compile_SPECIAL_DIV (CCodeSection * m_Section) { +void CRecompilerOps::SPECIAL_DIV (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix BYTE *Jump[2]; - CPU_Message(" %X %s",m_Section->CompilePC,R4300iOpcodeName(Opcode.Hex,m_Section->CompilePC)); + CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC)); - if (m_Section->IsConst(Opcode.rt)) { - if (m_Section->MipsRegLo(Opcode.rt) == 0) { + if (IsConst(m_Opcode.rt)) { + if (cMipsRegLo(m_Opcode.rt) == 0) { MoveConstToVariable(0, &_RegLO->UW[0], "_RegLO->UW[0]"); MoveConstToVariable(0, &_RegLO->UW[1], "_RegLO->UW[1]"); MoveConstToVariable(0, &_RegHI->UW[0], "_RegHI->UW[0]"); @@ -3296,13 +3317,13 @@ void CRecompilerOps::Compile_SPECIAL_DIV (CCodeSection * m_Section) { } Jump[1] = NULL; } else { - if (m_Section->IsMapped(Opcode.rt)) { - CompConstToX86reg(m_Section->MipsRegLo(Opcode.rt),0); + if (IsMapped(m_Opcode.rt)) { + CompConstToX86reg(cMipsRegLo(m_Opcode.rt),0); } else { - CompConstToVariable(0, &_GPR[Opcode.rt].W[0], CRegName::GPR_Lo[Opcode.rt]); + CompConstToVariable(0, &_GPR[m_Opcode.rt].W[0], CRegName::GPR_Lo[m_Opcode.rt]); } JneLabel8("NoExcept", 0); - Jump[0] = RecompPos - 1; + Jump[0] = m_RecompPos - 1; MoveConstToVariable(0, &_RegLO->UW[0], "_RegLO->UW[0]"); MoveConstToVariable(0, &_RegLO->UW[1], "_RegLO->UW[1]"); @@ -3310,29 +3331,29 @@ void CRecompilerOps::Compile_SPECIAL_DIV (CCodeSection * m_Section) { MoveConstToVariable(0, &_RegHI->UW[1], "_RegHI->UW[1]"); JmpLabel8("EndDivu", 0); - Jump[1] = RecompPos - 1; + Jump[1] = m_RecompPos - 1; CPU_Message(""); CPU_Message(" NoExcept:"); - *((BYTE *)(Jump[0]))=(BYTE)(RecompPos - Jump[0] - 1); + *((BYTE *)(Jump[0]))=(BYTE)(m_RecompPos - Jump[0] - 1); } /* lo = (SD)rs / (SD)rt; hi = (SD)rs % (SD)rt; */ m_Section->x86Protected(x86_EDX) = TRUE; - Map_TempReg(m_Section,x86_EAX,Opcode.rs,FALSE); + m_Section->Map_TempReg(x86_EAX,m_Opcode.rs,FALSE); /* edx is the signed portion to eax */ m_Section->x86Protected(x86_EDX) = FALSE; - Map_TempReg(m_Section,x86_EDX, -1, FALSE); + m_Section->Map_TempReg(x86_EDX, -1, FALSE); MoveX86RegToX86Reg(x86_EAX, x86_EDX); ShiftRightSignImmed(x86_EDX,31); - if (m_Section->IsMapped(Opcode.rt)) { - idivX86reg(m_Section->MipsRegLo(Opcode.rt)); + if (IsMapped(m_Opcode.rt)) { + idivX86reg(cMipsRegLo(m_Opcode.rt)); } else { - idivX86reg(Map_TempReg(m_Section,x86_Any,Opcode.rt,FALSE)); + idivX86reg(m_Section->Map_TempReg(x86_Any,m_Opcode.rt,FALSE)); } @@ -3346,18 +3367,21 @@ void CRecompilerOps::Compile_SPECIAL_DIV (CCodeSection * m_Section) { if( Jump[1] != NULL ) { CPU_Message(""); CPU_Message(" EndDivu:"); - *((BYTE *)(Jump[1]))=(BYTE)(RecompPos - Jump[1] - 1); + *((BYTE *)(Jump[1]))=(BYTE)(m_RecompPos - Jump[1] - 1); } +#endif } -void CRecompilerOps::Compile_SPECIAL_DIVU ( CCodeSection * m_Section) { +void CRecompilerOps::SPECIAL_DIVU ( void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix BYTE *Jump[2]; int x86reg; - CPU_Message(" %X %s",m_Section->CompilePC,R4300iOpcodeName(Opcode.Hex,m_Section->CompilePC)); + CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC)); - if (m_Section->IsConst(Opcode.rt)) { - if (m_Section->MipsRegLo(Opcode.rt) == 0) { + if (IsConst(m_Opcode.rt)) { + if (cMipsRegLo(m_Opcode.rt) == 0) { MoveConstToVariable(0, &_RegLO->UW[0], "_RegLO->UW[0]"); MoveConstToVariable(0, &_RegLO->UW[1], "_RegLO->UW[1]"); MoveConstToVariable(0, &_RegHI->UW[0], "_RegHI->UW[0]"); @@ -3366,13 +3390,13 @@ void CRecompilerOps::Compile_SPECIAL_DIVU ( CCodeSection * m_Section) { } Jump[1] = NULL; } else { - if (m_Section->IsMapped(Opcode.rt)) { - CompConstToX86reg(m_Section->MipsRegLo(Opcode.rt),0); + if (IsMapped(m_Opcode.rt)) { + CompConstToX86reg(cMipsRegLo(m_Opcode.rt),0); } else { - CompConstToVariable(0, &_GPR[Opcode.rt].W[0], CRegName::GPR_Lo[Opcode.rt]); + CompConstToVariable(0, &_GPR[m_Opcode.rt].W[0], CRegName::GPR_Lo[m_Opcode.rt]); } JneLabel8("NoExcept", 0); - Jump[0] = RecompPos - 1; + Jump[0] = m_RecompPos - 1; MoveConstToVariable(0, &_RegLO->UW[0], "_RegLO->UW[0]"); MoveConstToVariable(0, &_RegLO->UW[1], "_RegLO->UW[1]"); @@ -3380,11 +3404,11 @@ void CRecompilerOps::Compile_SPECIAL_DIVU ( CCodeSection * m_Section) { MoveConstToVariable(0, &_RegHI->UW[1], "_RegHI->UW[1]"); JmpLabel8("EndDivu", 0); - Jump[1] = RecompPos - 1; + Jump[1] = m_RecompPos - 1; CPU_Message(""); CPU_Message(" NoExcept:"); - *((BYTE *)(Jump[0]))=(BYTE)(RecompPos - Jump[0] - 1); + *((BYTE *)(Jump[0]))=(BYTE)(m_RecompPos - Jump[0] - 1); } @@ -3392,11 +3416,11 @@ void CRecompilerOps::Compile_SPECIAL_DIVU ( CCodeSection * m_Section) { hi = (UD)rs % (UD)rt; */ m_Section->x86Protected(x86_EAX) = TRUE; - Map_TempReg(m_Section,x86_EDX, 0, FALSE); + m_Section->Map_TempReg(x86_EDX, 0, FALSE); m_Section->x86Protected(x86_EAX) = FALSE; - Map_TempReg(m_Section,x86_EAX,Opcode.rs,FALSE); - x86reg = Map_TempReg(m_Section,x86_Any,Opcode.rt,FALSE); + m_Section->Map_TempReg(x86_EAX,m_Opcode.rs,FALSE); + x86reg = m_Section->Map_TempReg(x86_Any,m_Opcode.rt,FALSE); DivX86reg(x86reg); @@ -3413,60 +3437,66 @@ void CRecompilerOps::Compile_SPECIAL_DIVU ( CCodeSection * m_Section) { if( Jump[1] != NULL ) { CPU_Message(""); CPU_Message(" EndDivu:"); - *((BYTE *)(Jump[1]))=(BYTE)(RecompPos - Jump[1] - 1); + *((BYTE *)(Jump[1]))=(BYTE)(m_RecompPos - Jump[1] - 1); } +#endif } -void CRecompilerOps::Compile_SPECIAL_DMULT (CCodeSection * m_Section) { - CPU_Message(" %X %s",m_Section->CompilePC,R4300iOpcodeName(Opcode.Hex,m_Section->CompilePC)); +void CRecompilerOps::SPECIAL_DMULT (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC)); - if (Opcode.rs != 0) { UnMap_GPR(m_Section,Opcode.rs,TRUE); } - if (Opcode.rs != 0) { UnMap_GPR(m_Section,Opcode.rt,TRUE); } + if (m_Opcode.rs != 0) { UnMap_GPR(m_Opcode.rs,TRUE); } + if (m_Opcode.rs != 0) { UnMap_GPR(m_Opcode.rt,TRUE); } Pushad(); MoveConstToVariable(Opcode.Hex, &Opcode.Hex, "Opcode.Hex" ); Call_Direct(R4300iOp::SPECIAL_DMULT, "R4300iOp::SPECIAL_DMULT"); Popad(); +#endif } -void CRecompilerOps::Compile_SPECIAL_DMULTU (CCodeSection * m_Section) { - CPU_Message(" %X %s",m_Section->CompilePC,R4300iOpcodeName(Opcode.Hex,m_Section->CompilePC)); +void CRecompilerOps::SPECIAL_DMULTU (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC)); - /* _RegLO->UDW = (uint64)_GPR[Opcode.rs].UW[0] * (uint64)_GPR[Opcode.rt].UW[0]; */ + /* _RegLO->UDW = (uint64)_GPR[m_Opcode.rs].UW[0] * (uint64)_GPR[m_Opcode.rt].UW[0]; */ m_Section->x86Protected(x86_EDX) = TRUE; - Map_TempReg(m_Section,x86_EAX,Opcode.rs,FALSE); + m_Section->Map_TempReg(x86_EAX,m_Opcode.rs,FALSE); m_Section->x86Protected(x86_EDX) = FALSE; - Map_TempReg(m_Section,x86_EDX,Opcode.rt,FALSE); + m_Section->Map_TempReg(x86_EDX,m_Opcode.rt,FALSE); MulX86reg(x86_EDX); MoveX86regToVariable(x86_EAX, &_RegLO->UW[0], "_RegLO->UW[0]"); MoveX86regToVariable(x86_EDX, &_RegLO->UW[1], "_RegLO->UW[1]"); - /* _RegHI->UDW = (uint64)_GPR[Opcode.rs].UW[1] * (uint64)_GPR[Opcode.rt].UW[1]; */ - Map_TempReg(m_Section,x86_EAX,Opcode.rs,TRUE); - Map_TempReg(m_Section,x86_EDX,Opcode.rt,TRUE); + /* _RegHI->UDW = (uint64)_GPR[m_Opcode.rs].UW[1] * (uint64)_GPR[m_Opcode.rt].UW[1]; */ + m_Section->Map_TempReg(x86_EAX,m_Opcode.rs,TRUE); + m_Section->Map_TempReg(x86_EDX,m_Opcode.rt,TRUE); MulX86reg(x86_EDX); MoveX86regToVariable(x86_EAX, &_RegHI->UW[0], "_RegHI->UW[0]"); MoveX86regToVariable(x86_EDX, &_RegHI->UW[1], "_RegHI->UW[1]"); - /* Tmp[0].UDW = (uint64)_GPR[Opcode.rs].UW[1] * (uint64)_GPR[Opcode.rt].UW[0]; */ - Map_TempReg(m_Section,x86_EAX,Opcode.rs,TRUE); - Map_TempReg(m_Section,x86_EDX,Opcode.rt,FALSE); + /* Tmp[0].UDW = (uint64)_GPR[m_Opcode.rs].UW[1] * (uint64)_GPR[m_Opcode.rt].UW[0]; */ + m_Section->Map_TempReg(x86_EAX,m_Opcode.rs,TRUE); + m_Section->Map_TempReg(x86_EDX,m_Opcode.rt,FALSE); - Map_TempReg(m_Section,x86_EBX,-1,FALSE); - Map_TempReg(m_Section,x86_ECX,-1,FALSE); + m_Section->Map_TempReg(x86_EBX,-1,FALSE); + m_Section->Map_TempReg(x86_ECX,-1,FALSE); MulX86reg(x86_EDX); MoveX86RegToX86Reg(x86_EAX, x86_EBX); /* EDX:EAX -> ECX:EBX */ MoveX86RegToX86Reg(x86_EDX, x86_ECX); - /* Tmp[1].UDW = (uint64)_GPR[Opcode.rs].UW[0] * (uint64)_GPR[Opcode.rt].UW[1]; */ - Map_TempReg(m_Section,x86_EAX,Opcode.rs,FALSE); - Map_TempReg(m_Section,x86_EDX,Opcode.rt,TRUE); + /* Tmp[1].UDW = (uint64)_GPR[m_Opcode.rs].UW[0] * (uint64)_GPR[m_Opcode.rt].UW[1]; */ + m_Section->Map_TempReg(x86_EAX,m_Opcode.rs,FALSE); + m_Section->Map_TempReg(x86_EDX,m_Opcode.rt,TRUE); MulX86reg(x86_EDX); - Map_TempReg(m_Section,x86_ESI,-1,FALSE); - Map_TempReg(m_Section,x86_EDI,-1,FALSE); + m_Section->Map_TempReg(x86_ESI,-1,FALSE); + m_Section->Map_TempReg(x86_EDI,-1,FALSE); MoveX86RegToX86Reg(x86_EAX, x86_ESI); /* EDX:EAX -> EDI:ESI */ MoveX86RegToX86Reg(x86_EDX, x86_EDI); @@ -3495,1294 +3525,1362 @@ void CRecompilerOps::Compile_SPECIAL_DMULTU (CCodeSection * m_Section) { AddX86regToVariable(x86_EDX, &_RegHI->UW[0], "_RegHI->UW[0]"); AdcConstToVariable(&_RegHI->UW[1], "_RegHI->UW[1]", 0); +#endif } -void CRecompilerOps::Compile_SPECIAL_DDIV (CCodeSection * m_Section) { - CPU_Message(" %X %s",m_Section->CompilePC,R4300iOpcodeName(Opcode.Hex,m_Section->CompilePC)); +void CRecompilerOps::SPECIAL_DDIV (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC)); - UnMap_GPR(m_Section,Opcode.rs,TRUE); - UnMap_GPR(m_Section,Opcode.rt,TRUE); + UnMap_GPR(m_Opcode.rs,TRUE); + UnMap_GPR(m_Opcode.rt,TRUE); Pushad(); MoveConstToVariable(Opcode.Hex, &Opcode.Hex, "Opcode.Hex" ); Call_Direct(R4300iOp::SPECIAL_DDIV, "R4300iOp::SPECIAL_DDIV"); Popad(); +#endif } -void CRecompilerOps::Compile_SPECIAL_DDIVU (CCodeSection * m_Section) { - CPU_Message(" %X %s",m_Section->CompilePC,R4300iOpcodeName(Opcode.Hex,m_Section->CompilePC)); +void CRecompilerOps::SPECIAL_DDIVU (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC)); - UnMap_GPR(m_Section,Opcode.rs,TRUE); - UnMap_GPR(m_Section,Opcode.rt,TRUE); + UnMap_GPR(m_Opcode.rs,TRUE); + UnMap_GPR(m_Opcode.rt,TRUE); Pushad(); MoveConstToVariable(Opcode.Hex, &Opcode.Hex, "Opcode.Hex" ); Call_Direct(R4300iOp::SPECIAL_DDIVU, "R4300iOp::SPECIAL_DDIVU"); Popad(); +#endif } -void CRecompilerOps::Compile_SPECIAL_ADD (CCodeSection * m_Section) { - int source1 = Opcode.rd == Opcode.rt?Opcode.rt:Opcode.rs; - int source2 = Opcode.rd == Opcode.rt?Opcode.rs:Opcode.rt; +void CRecompilerOps::SPECIAL_ADD (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + int source1 = m_Opcode.rd == m_Opcode.rt?m_Opcode.rt:m_Opcode.rs; + int source2 = m_Opcode.rd == m_Opcode.rt?m_Opcode.rs:m_Opcode.rt; - CPU_Message(" %X %s",m_Section->CompilePC,R4300iOpcodeName(Opcode.Hex,m_Section->CompilePC)); - if (Opcode.rd == 0) { return; } + CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC)); + if (m_Opcode.rd == 0) { return; } - if (m_Section->IsConst(source1) && m_Section->IsConst(source2)) { - DWORD temp = m_Section->MipsRegLo(source1) + m_Section->MipsRegLo(source2); - if (m_Section->IsMapped(Opcode.rd)) { UnMap_GPR(m_Section,Opcode.rd, FALSE); } - m_Section->MipsRegLo(Opcode.rd) = temp; - m_Section->MipsRegState(Opcode.rd) = CRegInfo::STATE_CONST_32; + if (IsConst(source1) && IsConst(source2)) { + DWORD temp = cMipsRegLo(source1) + cMipsRegLo(source2); + if (IsMapped(m_Opcode.rd)) { UnMap_GPR(m_Opcode.rd, FALSE); } + cMipsRegLo(m_Opcode.rd) = temp; + MipsRegState(m_Opcode.rd) = CRegInfo::STATE_CONST_32; return; } - Map_GPR_32bit(m_Section,Opcode.rd,TRUE, source1); - if (m_Section->IsConst(source2)) { - if (m_Section->MipsRegLo(source2) != 0) { - AddConstToX86Reg(m_Section->MipsRegLo(Opcode.rd),m_Section->MipsRegLo(source2)); - } - } else if (m_Section->IsKnown(source2) && m_Section->IsMapped(source2)) { - AddX86RegToX86Reg(m_Section->MipsRegLo(Opcode.rd),m_Section->MipsRegLo(source2)); + Map_GPR_32bit(m_Opcode.rd,TRUE, source1); + if (IsConst(source2)) { + AddConstToX86Reg(cMipsRegLo(m_Opcode.rd),cMipsRegLo(source2)); + } else if (m_Section->IsKnown(source2) && IsMapped(source2)) { + AddX86RegToX86Reg(cMipsRegLo(m_Opcode.rd),cMipsRegLo(source2)); } else { - AddVariableToX86reg(m_Section->MipsRegLo(Opcode.rd),&_GPR[source2].W[0],CRegName::GPR_Lo[source2]); + AddVariableToX86reg(cMipsRegLo(m_Opcode.rd),&_GPR[source2].W[0],CRegName::GPR_Lo[source2]); } +#endif } -void CRecompilerOps::Compile_SPECIAL_ADDU (CCodeSection * m_Section) { - int source1 = Opcode.rd == Opcode.rt?Opcode.rt:Opcode.rs; - int source2 = Opcode.rd == Opcode.rt?Opcode.rs:Opcode.rt; +void CRecompilerOps::SPECIAL_ADDU (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + int source1 = m_Opcode.rd == m_Opcode.rt?m_Opcode.rt:m_Opcode.rs; + int source2 = m_Opcode.rd == m_Opcode.rt?m_Opcode.rs:m_Opcode.rt; - CPU_Message(" %X %s",m_Section->CompilePC,R4300iOpcodeName(Opcode.Hex,m_Section->CompilePC)); - if (Opcode.rd == 0) { return; } + CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC)); + if (m_Opcode.rd == 0) { return; } - if (m_Section->IsConst(source1) && m_Section->IsConst(source2)) { - DWORD temp = m_Section->MipsRegLo(source1) + m_Section->MipsRegLo(source2); - if (m_Section->IsMapped(Opcode.rd)) { UnMap_GPR(m_Section,Opcode.rd, FALSE); } - m_Section->MipsRegLo(Opcode.rd) = temp; - m_Section->MipsRegState(Opcode.rd) = CRegInfo::STATE_CONST_32; + if (IsConst(source1) && IsConst(source2)) { + DWORD temp = cMipsRegLo(source1) + cMipsRegLo(source2); + if (IsMapped(m_Opcode.rd)) { UnMap_GPR(m_Opcode.rd, FALSE); } + cMipsRegLo(m_Opcode.rd) = temp; + MipsRegState(m_Opcode.rd) = CRegInfo::STATE_CONST_32; return; } - Map_GPR_32bit(m_Section,Opcode.rd,TRUE, source1); - if (m_Section->IsConst(source2)) { - if (m_Section->MipsRegLo(source2) != 0) { - AddConstToX86Reg(m_Section->MipsRegLo(Opcode.rd),m_Section->MipsRegLo(source2)); - } - } else if (m_Section->IsKnown(source2) && m_Section->IsMapped(source2)) { - AddX86RegToX86Reg(m_Section->MipsRegLo(Opcode.rd),m_Section->MipsRegLo(source2)); + Map_GPR_32bit(m_Opcode.rd,TRUE, source1); + if (IsConst(source2)) { + AddConstToX86Reg(cMipsRegLo(m_Opcode.rd),cMipsRegLo(source2)); + } else if (m_Section->IsKnown(source2) && IsMapped(source2)) { + AddX86RegToX86Reg(cMipsRegLo(m_Opcode.rd),cMipsRegLo(source2)); } else { - AddVariableToX86reg(m_Section->MipsRegLo(Opcode.rd),&_GPR[source2].W[0],CRegName::GPR_Lo[source2]); + AddVariableToX86reg(cMipsRegLo(m_Opcode.rd),&_GPR[source2].W[0],CRegName::GPR_Lo[source2]); } +#endif } -void CRecompilerOps::Compile_SPECIAL_SUB (CCodeSection * m_Section) { - CPU_Message(" %X %s",m_Section->CompilePC,R4300iOpcodeName(Opcode.Hex,m_Section->CompilePC)); - if (Opcode.rd == 0) { return; } +void CRecompilerOps::SPECIAL_SUB (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC)); + if (m_Opcode.rd == 0) { return; } - if (m_Section->IsConst(Opcode.rt) && m_Section->IsConst(Opcode.rs)) { - DWORD temp = m_Section->MipsRegLo(Opcode.rs) - m_Section->MipsRegLo(Opcode.rt); - if (m_Section->IsMapped(Opcode.rd)) { UnMap_GPR(m_Section,Opcode.rd, FALSE); } - m_Section->MipsRegLo(Opcode.rd) = temp; - m_Section->MipsRegState(Opcode.rd) = CRegInfo::STATE_CONST_32; + if (IsConst(m_Opcode.rt) && IsConst(m_Opcode.rs)) { + DWORD temp = cMipsRegLo(m_Opcode.rs) - cMipsRegLo(m_Opcode.rt); + if (IsMapped(m_Opcode.rd)) { UnMap_GPR(m_Opcode.rd, FALSE); } + cMipsRegLo(m_Opcode.rd) = temp; + MipsRegState(m_Opcode.rd) = CRegInfo::STATE_CONST_32; } else { - if (Opcode.rd == Opcode.rt) { - int x86Reg = Map_TempReg(m_Section,x86_Any,Opcode.rt,FALSE); - Map_GPR_32bit(m_Section,Opcode.rd,TRUE, Opcode.rs); - SubX86RegToX86Reg(m_Section->MipsRegLo(Opcode.rd),x86Reg); + if (m_Opcode.rd == m_Opcode.rt) { + int x86Reg = m_Section->Map_TempReg(x86_Any,m_Opcode.rt,FALSE); + Map_GPR_32bit(m_Opcode.rd,TRUE, m_Opcode.rs); + SubX86RegToX86Reg(cMipsRegLo(m_Opcode.rd),x86Reg); return; } - Map_GPR_32bit(m_Section,Opcode.rd,TRUE, Opcode.rs); - if (m_Section->IsConst(Opcode.rt)) { - SubConstFromX86Reg(m_Section->MipsRegLo(Opcode.rd),m_Section->MipsRegLo(Opcode.rt)); - } else if (m_Section->IsMapped(Opcode.rt)) { - SubX86RegToX86Reg(m_Section->MipsRegLo(Opcode.rd),m_Section->MipsRegLo(Opcode.rt)); + Map_GPR_32bit(m_Opcode.rd,TRUE, m_Opcode.rs); + if (IsConst(m_Opcode.rt)) { + SubConstFromX86Reg(cMipsRegLo(m_Opcode.rd),cMipsRegLo(m_Opcode.rt)); + } else if (IsMapped(m_Opcode.rt)) { + SubX86RegToX86Reg(cMipsRegLo(m_Opcode.rd),cMipsRegLo(m_Opcode.rt)); } else { - SubVariableFromX86reg(m_Section->MipsRegLo(Opcode.rd),&_GPR[Opcode.rt].W[0],CRegName::GPR_Lo[Opcode.rt]); + SubVariableFromX86reg(cMipsRegLo(m_Opcode.rd),&_GPR[m_Opcode.rt].W[0],CRegName::GPR_Lo[m_Opcode.rt]); } } +#endif } -void CRecompilerOps::Compile_SPECIAL_SUBU (CCodeSection * m_Section) { - CPU_Message(" %X %s",m_Section->CompilePC,R4300iOpcodeName(Opcode.Hex,m_Section->CompilePC)); - if (Opcode.rd == 0) { return; } +void CRecompilerOps::SPECIAL_SUBU (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC)); + if (m_Opcode.rd == 0) { return; } - if (m_Section->IsConst(Opcode.rt) && m_Section->IsConst(Opcode.rs)) { - DWORD temp = m_Section->MipsRegLo(Opcode.rs) - m_Section->MipsRegLo(Opcode.rt); - if (m_Section->IsMapped(Opcode.rd)) { UnMap_GPR(m_Section,Opcode.rd, FALSE); } - m_Section->MipsRegLo(Opcode.rd) = temp; - m_Section->MipsRegState(Opcode.rd) = CRegInfo::STATE_CONST_32; + if (IsConst(m_Opcode.rt) && IsConst(m_Opcode.rs)) { + DWORD temp = cMipsRegLo(m_Opcode.rs) - cMipsRegLo(m_Opcode.rt); + if (IsMapped(m_Opcode.rd)) { UnMap_GPR(m_Opcode.rd, FALSE); } + cMipsRegLo(m_Opcode.rd) = temp; + MipsRegState(m_Opcode.rd) = CRegInfo::STATE_CONST_32; } else { - if (Opcode.rd == Opcode.rt) { - int x86Reg = Map_TempReg(m_Section,x86_Any,Opcode.rt,FALSE); - Map_GPR_32bit(m_Section,Opcode.rd,TRUE, Opcode.rs); - SubX86RegToX86Reg(m_Section->MipsRegLo(Opcode.rd),x86Reg); + if (m_Opcode.rd == m_Opcode.rt) { + int x86Reg = m_Section->Map_TempReg(x86_Any,m_Opcode.rt,FALSE); + Map_GPR_32bit(m_Opcode.rd,TRUE, m_Opcode.rs); + SubX86RegToX86Reg(cMipsRegLo(m_Opcode.rd),x86Reg); return; } - Map_GPR_32bit(m_Section,Opcode.rd,TRUE, Opcode.rs); - if (m_Section->IsConst(Opcode.rt)) { - SubConstFromX86Reg(m_Section->MipsRegLo(Opcode.rd),m_Section->MipsRegLo(Opcode.rt)); - } else if (m_Section->IsMapped(Opcode.rt)) { - SubX86RegToX86Reg(m_Section->MipsRegLo(Opcode.rd),m_Section->MipsRegLo(Opcode.rt)); + Map_GPR_32bit(m_Opcode.rd,TRUE, m_Opcode.rs); + if (IsConst(m_Opcode.rt)) { + SubConstFromX86Reg(cMipsRegLo(m_Opcode.rd),cMipsRegLo(m_Opcode.rt)); + } else if (IsMapped(m_Opcode.rt)) { + SubX86RegToX86Reg(cMipsRegLo(m_Opcode.rd),cMipsRegLo(m_Opcode.rt)); } else { - SubVariableFromX86reg(m_Section->MipsRegLo(Opcode.rd),&_GPR[Opcode.rt].W[0],CRegName::GPR_Lo[Opcode.rt]); + SubVariableFromX86reg(cMipsRegLo(m_Opcode.rd),&_GPR[m_Opcode.rt].W[0],CRegName::GPR_Lo[m_Opcode.rt]); } } +#endif } -void CRecompilerOps::Compile_SPECIAL_AND (CCodeSection * m_Section) { - CPU_Message(" %X %s",m_Section->CompilePC,R4300iOpcodeName(Opcode.Hex,m_Section->CompilePC)); - if (m_Section->IsKnown(Opcode.rt) && m_Section->IsKnown(Opcode.rs)) { - if (m_Section->IsConst(Opcode.rt) && m_Section->IsConst(Opcode.rs)) { - if (m_Section->Is64Bit(Opcode.rt) || m_Section->Is64Bit(Opcode.rs)) { - m_Section->MipsReg(Opcode.rd) = - (m_Section->Is64Bit(Opcode.rt)?m_Section->MipsReg(Opcode.rt):(_int64)m_Section->MipsRegLo_S(Opcode.rt)) & - (m_Section->Is64Bit(Opcode.rs)?m_Section->MipsReg(Opcode.rs):(_int64)m_Section->MipsRegLo_S(Opcode.rs)); +void CRecompilerOps::SPECIAL_AND (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC)); + if (m_Section->IsKnown(m_Opcode.rt) && m_Section->IsKnown(m_Opcode.rs)) { + if (IsConst(m_Opcode.rt) && IsConst(m_Opcode.rs)) { + if (m_Section->Is64Bit(m_Opcode.rt) || m_Section->Is64Bit(m_Opcode.rs)) { + m_Section->MipsReg(m_Opcode.rd) = + (m_Section->Is64Bit(m_Opcode.rt)?m_Section->MipsReg(m_Opcode.rt):(_int64)m_Section->MipsRegLo_S(m_Opcode.rt)) & + (m_Section->Is64Bit(m_Opcode.rs)?m_Section->MipsReg(m_Opcode.rs):(_int64)m_Section->MipsRegLo_S(m_Opcode.rs)); - if (m_Section->MipsRegLo_S(Opcode.rd) < 0 && m_Section->MipsRegHi_S(Opcode.rd) == -1){ - m_Section->MipsRegState(Opcode.rd) = CRegInfo::STATE_CONST_32; - } else if (m_Section->MipsRegLo_S(Opcode.rd) >= 0 && m_Section->MipsRegHi_S(Opcode.rd) == 0){ - m_Section->MipsRegState(Opcode.rd) = CRegInfo::STATE_CONST_32; + if (m_Section->MipsRegLo_S(m_Opcode.rd) < 0 && MipsRegHi_S(m_Opcode.rd) == -1){ + MipsRegState(m_Opcode.rd) = CRegInfo::STATE_CONST_32; + } else if (m_Section->MipsRegLo_S(m_Opcode.rd) >= 0 && MipsRegHi_S(m_Opcode.rd) == 0){ + MipsRegState(m_Opcode.rd) = CRegInfo::STATE_CONST_32; } else { - m_Section->MipsRegState(Opcode.rd) = CRegInfo::STATE_CONST_64; + MipsRegState(m_Opcode.rd) = CRegInfo::STATE_CONST_64; } } else { - m_Section->MipsReg(Opcode.rd) = m_Section->MipsRegLo(Opcode.rt) & m_Section->MipsReg(Opcode.rs); - m_Section->MipsRegState(Opcode.rd) = CRegInfo::STATE_CONST_32; + m_Section->MipsReg(m_Opcode.rd) = cMipsRegLo(m_Opcode.rt) & m_Section->MipsReg(m_Opcode.rs); + MipsRegState(m_Opcode.rd) = CRegInfo::STATE_CONST_32; } - } else if (m_Section->IsMapped(Opcode.rt) && m_Section->IsMapped(Opcode.rs)) { - int source1 = Opcode.rd == Opcode.rt?Opcode.rt:Opcode.rs; - int source2 = Opcode.rd == Opcode.rt?Opcode.rs:Opcode.rt; + } else if (IsMapped(m_Opcode.rt) && IsMapped(m_Opcode.rs)) { + int source1 = m_Opcode.rd == m_Opcode.rt?m_Opcode.rt:m_Opcode.rs; + int source2 = m_Opcode.rd == m_Opcode.rt?m_Opcode.rs:m_Opcode.rt; - ProtectGPR(m_Section,source1); - ProtectGPR(m_Section,source2); + ProtectGPR(source1); + ProtectGPR(source2); if (m_Section->Is32Bit(source1) && m_Section->Is32Bit(source2)) { - int Sign = (m_Section->IsSigned(Opcode.rt) && m_Section->IsSigned(Opcode.rs))?TRUE:FALSE; - Map_GPR_32bit(m_Section,Opcode.rd,Sign,source1); - AndX86RegToX86Reg(m_Section->MipsRegLo(Opcode.rd),m_Section->MipsRegLo(source2)); + int Sign = (m_Section->IsSigned(m_Opcode.rt) && m_Section->IsSigned(m_Opcode.rs))?TRUE:FALSE; + Map_GPR_32bit(m_Opcode.rd,Sign,source1); + AndX86RegToX86Reg(cMipsRegLo(m_Opcode.rd),cMipsRegLo(source2)); } else if (m_Section->Is32Bit(source1) || m_Section->Is32Bit(source2)) { if (m_Section->IsUnsigned(m_Section->Is32Bit(source1)?source1:source2)) { - Map_GPR_32bit(m_Section,Opcode.rd,FALSE,source1); - AndX86RegToX86Reg(m_Section->MipsRegLo(Opcode.rd),m_Section->MipsRegLo(source2)); + Map_GPR_32bit(m_Opcode.rd,FALSE,source1); + AndX86RegToX86Reg(cMipsRegLo(m_Opcode.rd),cMipsRegLo(source2)); } else { - Map_GPR_64bit(m_Section,Opcode.rd,source1); + Map_GPR_64bit(m_Section,m_Opcode.rd,source1); if (m_Section->Is32Bit(source2)) { - AndX86RegToX86Reg(m_Section->MipsRegHi(Opcode.rd),Map_TempReg(m_Section,x86_Any,source2,TRUE)); + AndX86RegToX86Reg(MipsRegHi(m_Opcode.rd),m_Section->Map_TempReg(x86_Any,source2,TRUE)); } else { - AndX86RegToX86Reg(m_Section->MipsRegHi(Opcode.rd),m_Section->MipsRegHi(source2)); + AndX86RegToX86Reg(MipsRegHi(m_Opcode.rd),MipsRegHi(source2)); } - AndX86RegToX86Reg(m_Section->MipsRegLo(Opcode.rd),m_Section->MipsRegLo(source2)); + AndX86RegToX86Reg(cMipsRegLo(m_Opcode.rd),cMipsRegLo(source2)); } } else { - Map_GPR_64bit(m_Section,Opcode.rd,source1); - AndX86RegToX86Reg(m_Section->MipsRegHi(Opcode.rd),m_Section->MipsRegHi(source2)); - AndX86RegToX86Reg(m_Section->MipsRegLo(Opcode.rd),m_Section->MipsRegLo(source2)); + Map_GPR_64bit(m_Section,m_Opcode.rd,source1); + AndX86RegToX86Reg(MipsRegHi(m_Opcode.rd),MipsRegHi(source2)); + AndX86RegToX86Reg(cMipsRegLo(m_Opcode.rd),cMipsRegLo(source2)); } } else { - int ConstReg = m_Section->IsConst(Opcode.rt)?Opcode.rt:Opcode.rs; - int MappedReg = m_Section->IsConst(Opcode.rt)?Opcode.rs:Opcode.rt; + int ConstReg = IsConst(m_Opcode.rt)?m_Opcode.rt:m_Opcode.rs; + int MappedReg = IsConst(m_Opcode.rt)?m_Opcode.rs:m_Opcode.rt; if (m_Section->Is64Bit(ConstReg)) { if (m_Section->Is32Bit(MappedReg) && m_Section->IsUnsigned(MappedReg)) { - if (m_Section->MipsRegLo(ConstReg) == 0) { - Map_GPR_32bit(m_Section,Opcode.rd,FALSE, 0); + if (cMipsRegLo(ConstReg) == 0) { + Map_GPR_32bit(m_Opcode.rd,FALSE, 0); } else { - DWORD Value = m_Section->MipsRegLo(ConstReg); - Map_GPR_32bit(m_Section,Opcode.rd,FALSE, MappedReg); - AndConstToX86Reg(m_Section->MipsRegLo(Opcode.rd),Value); + DWORD Value = cMipsRegLo(ConstReg); + Map_GPR_32bit(m_Opcode.rd,FALSE, MappedReg); + AndConstToX86Reg(cMipsRegLo(m_Opcode.rd),Value); } } else { _int64 Value = m_Section->MipsReg(ConstReg); - Map_GPR_64bit(m_Section,Opcode.rd,MappedReg); - AndConstToX86Reg(m_Section->MipsRegHi(Opcode.rd),(DWORD)(Value >> 32)); - AndConstToX86Reg(m_Section->MipsRegLo(Opcode.rd),(DWORD)Value); + Map_GPR_64bit(m_Section,m_Opcode.rd,MappedReg); + AndConstToX86Reg(MipsRegHi(m_Opcode.rd),(DWORD)(Value >> 32)); + AndConstToX86Reg(cMipsRegLo(m_Opcode.rd),(DWORD)Value); } } else if (m_Section->Is64Bit(MappedReg)) { - DWORD Value = m_Section->MipsRegLo(ConstReg); + DWORD Value = cMipsRegLo(ConstReg); if (Value != 0) { - Map_GPR_32bit(m_Section,Opcode.rd,m_Section->IsSigned(ConstReg)?TRUE:FALSE,MappedReg); - AndConstToX86Reg(m_Section->MipsRegLo(Opcode.rd),(DWORD)Value); + Map_GPR_32bit(m_Opcode.rd,m_Section->IsSigned(ConstReg)?TRUE:FALSE,MappedReg); + AndConstToX86Reg(cMipsRegLo(m_Opcode.rd),(DWORD)Value); } else { - Map_GPR_32bit(m_Section,Opcode.rd,m_Section->IsSigned(ConstReg)?TRUE:FALSE, 0); + Map_GPR_32bit(m_Opcode.rd,m_Section->IsSigned(ConstReg)?TRUE:FALSE, 0); } } else { - DWORD Value = m_Section->MipsRegLo(ConstReg); + DWORD Value = cMipsRegLo(ConstReg); int Sign = FALSE; if (m_Section->IsSigned(ConstReg) && m_Section->IsSigned(MappedReg)) { Sign = TRUE; } if (Value != 0) { - Map_GPR_32bit(m_Section,Opcode.rd,Sign,MappedReg); - AndConstToX86Reg(m_Section->MipsRegLo(Opcode.rd),Value); + Map_GPR_32bit(m_Opcode.rd,Sign,MappedReg); + AndConstToX86Reg(cMipsRegLo(m_Opcode.rd),Value); } else { - Map_GPR_32bit(m_Section,Opcode.rd,FALSE, 0); + Map_GPR_32bit(m_Opcode.rd,FALSE, 0); } } } - } else if (m_Section->IsKnown(Opcode.rt) || m_Section->IsKnown(Opcode.rs)) { - DWORD KnownReg = m_Section->IsKnown(Opcode.rt)?Opcode.rt:Opcode.rs; - DWORD UnknownReg = m_Section->IsKnown(Opcode.rt)?Opcode.rs:Opcode.rt; + } else if (m_Section->IsKnown(m_Opcode.rt) || m_Section->IsKnown(m_Opcode.rs)) { + DWORD KnownReg = m_Section->IsKnown(m_Opcode.rt)?m_Opcode.rt:m_Opcode.rs; + DWORD UnknownReg = m_Section->IsKnown(m_Opcode.rt)?m_Opcode.rs:m_Opcode.rt; - if (m_Section->IsConst(KnownReg)) { + if (IsConst(KnownReg)) { if (m_Section->Is64Bit(KnownReg)) { unsigned __int64 Value = m_Section->MipsReg(KnownReg); - Map_GPR_64bit(m_Section,Opcode.rd,UnknownReg); - AndConstToX86Reg(m_Section->MipsRegHi(Opcode.rd),(DWORD)(Value >> 32)); - AndConstToX86Reg(m_Section->MipsRegLo(Opcode.rd),(DWORD)Value); + Map_GPR_64bit(m_Section,m_Opcode.rd,UnknownReg); + AndConstToX86Reg(MipsRegHi(m_Opcode.rd),(DWORD)(Value >> 32)); + AndConstToX86Reg(cMipsRegLo(m_Opcode.rd),(DWORD)Value); } else { - DWORD Value = m_Section->MipsRegLo(KnownReg); - Map_GPR_32bit(m_Section,Opcode.rd,m_Section->IsSigned(KnownReg),UnknownReg); - AndConstToX86Reg(m_Section->MipsRegLo(Opcode.rd),(DWORD)Value); + DWORD Value = cMipsRegLo(KnownReg); + Map_GPR_32bit(m_Opcode.rd,m_Section->IsSigned(KnownReg),UnknownReg); + AndConstToX86Reg(cMipsRegLo(m_Opcode.rd),(DWORD)Value); } } else { - ProtectGPR(m_Section,KnownReg); - if (KnownReg == Opcode.rd) { + ProtectGPR(KnownReg); + if (KnownReg == m_Opcode.rd) { if (m_Section->Is64Bit(KnownReg)) { - Map_GPR_64bit(m_Section,Opcode.rd,KnownReg); - AndVariableToX86Reg(&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg],m_Section->MipsRegHi(Opcode.rd)); - AndVariableToX86Reg(&_GPR[UnknownReg].W[0],CRegName::GPR_Lo[UnknownReg],m_Section->MipsRegLo(Opcode.rd)); + Map_GPR_64bit(m_Section,m_Opcode.rd,KnownReg); + AndVariableToX86Reg(&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg],MipsRegHi(m_Opcode.rd)); + AndVariableToX86Reg(&_GPR[UnknownReg].W[0],CRegName::GPR_Lo[UnknownReg],cMipsRegLo(m_Opcode.rd)); } else { - Map_GPR_32bit(m_Section,Opcode.rd,m_Section->IsSigned(KnownReg),KnownReg); - AndVariableToX86Reg(&_GPR[UnknownReg].W[0],CRegName::GPR_Lo[UnknownReg],m_Section->MipsRegLo(Opcode.rd)); + Map_GPR_32bit(m_Opcode.rd,m_Section->IsSigned(KnownReg),KnownReg); + AndVariableToX86Reg(&_GPR[UnknownReg].W[0],CRegName::GPR_Lo[UnknownReg],cMipsRegLo(m_Opcode.rd)); } } else { if (m_Section->Is64Bit(KnownReg)) { - Map_GPR_64bit(m_Section,Opcode.rd,UnknownReg); - AndX86RegToX86Reg(m_Section->MipsRegHi(Opcode.rd),m_Section->MipsRegHi(KnownReg)); - AndX86RegToX86Reg(m_Section->MipsRegLo(Opcode.rd),m_Section->MipsRegLo(KnownReg)); + Map_GPR_64bit(m_Section,m_Opcode.rd,UnknownReg); + AndX86RegToX86Reg(MipsRegHi(m_Opcode.rd),MipsRegHi(KnownReg)); + AndX86RegToX86Reg(cMipsRegLo(m_Opcode.rd),cMipsRegLo(KnownReg)); } else { - Map_GPR_32bit(m_Section,Opcode.rd,m_Section->IsSigned(KnownReg),UnknownReg); - AndX86RegToX86Reg(m_Section->MipsRegLo(Opcode.rd),m_Section->MipsRegLo(KnownReg)); + Map_GPR_32bit(m_Opcode.rd,m_Section->IsSigned(KnownReg),UnknownReg); + AndX86RegToX86Reg(cMipsRegLo(m_Opcode.rd),cMipsRegLo(KnownReg)); } } } } else { - Map_GPR_64bit(m_Section,Opcode.rd,Opcode.rt); - AndVariableToX86Reg(&_GPR[Opcode.rs].W[1],CRegName::GPR_Hi[Opcode.rs],m_Section->MipsRegHi(Opcode.rd)); - AndVariableToX86Reg(&_GPR[Opcode.rs].W[0],CRegName::GPR_Lo[Opcode.rs],m_Section->MipsRegLo(Opcode.rd)); + Map_GPR_64bit(m_Section,m_Opcode.rd,m_Opcode.rt); + AndVariableToX86Reg(&_GPR[m_Opcode.rs].W[1],CRegName::GPR_Hi[m_Opcode.rs],MipsRegHi(m_Opcode.rd)); + AndVariableToX86Reg(&_GPR[m_Opcode.rs].W[0],CRegName::GPR_Lo[m_Opcode.rs],cMipsRegLo(m_Opcode.rd)); } +#endif } -void CRecompilerOps::Compile_SPECIAL_OR (CCodeSection * m_Section) { - CPU_Message(" %X %s",m_Section->CompilePC,R4300iOpcodeName(Opcode.Hex,m_Section->CompilePC)); +void CRecompilerOps::SPECIAL_OR (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC)); - if (m_Section->IsKnown(Opcode.rt) && m_Section->IsKnown(Opcode.rs)) { - if (m_Section->IsConst(Opcode.rt) && m_Section->IsConst(Opcode.rs)) { - if (m_Section->IsMapped(Opcode.rd)) { UnMap_GPR(m_Section,Opcode.rd, FALSE); } - if (m_Section->Is64Bit(Opcode.rt) || m_Section->Is64Bit(Opcode.rs)) { - m_Section->MipsReg(Opcode.rd) = - (m_Section->Is64Bit(Opcode.rt)?m_Section->MipsReg(Opcode.rt):(_int64)m_Section->MipsRegLo_S(Opcode.rt)) | - (m_Section->Is64Bit(Opcode.rs)?m_Section->MipsReg(Opcode.rs):(_int64)m_Section->MipsRegLo_S(Opcode.rs)); - if (m_Section->MipsRegLo_S(Opcode.rd) < 0 && m_Section->MipsRegHi_S(Opcode.rd) == -1){ - m_Section->MipsRegState(Opcode.rd) = CRegInfo::STATE_CONST_32; - } else if (m_Section->MipsRegLo_S(Opcode.rd) >= 0 && m_Section->MipsRegHi_S(Opcode.rd) == 0){ - m_Section->MipsRegState(Opcode.rd) = CRegInfo::STATE_CONST_32; + if (m_Section->IsKnown(m_Opcode.rt) && m_Section->IsKnown(m_Opcode.rs)) { + if (IsConst(m_Opcode.rt) && IsConst(m_Opcode.rs)) { + if (IsMapped(m_Opcode.rd)) { UnMap_GPR(m_Opcode.rd, FALSE); } + if (m_Section->Is64Bit(m_Opcode.rt) || m_Section->Is64Bit(m_Opcode.rs)) { + m_Section->MipsReg(m_Opcode.rd) = + (m_Section->Is64Bit(m_Opcode.rt)?m_Section->MipsReg(m_Opcode.rt):(_int64)m_Section->MipsRegLo_S(m_Opcode.rt)) | + (m_Section->Is64Bit(m_Opcode.rs)?m_Section->MipsReg(m_Opcode.rs):(_int64)m_Section->MipsRegLo_S(m_Opcode.rs)); + if (m_Section->MipsRegLo_S(m_Opcode.rd) < 0 && MipsRegHi_S(m_Opcode.rd) == -1){ + MipsRegState(m_Opcode.rd) = CRegInfo::STATE_CONST_32; + } else if (m_Section->MipsRegLo_S(m_Opcode.rd) >= 0 && MipsRegHi_S(m_Opcode.rd) == 0){ + MipsRegState(m_Opcode.rd) = CRegInfo::STATE_CONST_32; } else { - m_Section->MipsRegState(Opcode.rd) = CRegInfo::STATE_CONST_64; + MipsRegState(m_Opcode.rd) = CRegInfo::STATE_CONST_64; } } else { - m_Section->MipsRegLo(Opcode.rd) = m_Section->MipsRegLo(Opcode.rt) | m_Section->MipsRegLo(Opcode.rs); - m_Section->MipsRegState(Opcode.rd) = CRegInfo::STATE_CONST_32; + cMipsRegLo(m_Opcode.rd) = cMipsRegLo(m_Opcode.rt) | cMipsRegLo(m_Opcode.rs); + MipsRegState(m_Opcode.rd) = CRegInfo::STATE_CONST_32; } - } else if (m_Section->IsMapped(Opcode.rt) && m_Section->IsMapped(Opcode.rs)) { - int source1 = Opcode.rd == Opcode.rt?Opcode.rt:Opcode.rs; - int source2 = Opcode.rd == Opcode.rt?Opcode.rs:Opcode.rt; + } else if (IsMapped(m_Opcode.rt) && IsMapped(m_Opcode.rs)) { + int source1 = m_Opcode.rd == m_Opcode.rt?m_Opcode.rt:m_Opcode.rs; + int source2 = m_Opcode.rd == m_Opcode.rt?m_Opcode.rs:m_Opcode.rt; - ProtectGPR(m_Section,Opcode.rt); - ProtectGPR(m_Section,Opcode.rs); - if (m_Section->Is64Bit(Opcode.rt) || m_Section->Is64Bit(Opcode.rs)) { - Map_GPR_64bit(m_Section,Opcode.rd,source1); + ProtectGPR(m_Opcode.rt); + ProtectGPR(m_Opcode.rs); + if (m_Section->Is64Bit(m_Opcode.rt) || m_Section->Is64Bit(m_Opcode.rs)) { + Map_GPR_64bit(m_Section,m_Opcode.rd,source1); if (m_Section->Is64Bit(source2)) { - OrX86RegToX86Reg(m_Section->MipsRegHi(Opcode.rd),m_Section->MipsRegHi(source2)); + OrX86RegToX86Reg(MipsRegHi(m_Opcode.rd),MipsRegHi(source2)); } else { - OrX86RegToX86Reg(m_Section->MipsRegHi(Opcode.rd),Map_TempReg(m_Section,x86_Any,source2,TRUE)); + OrX86RegToX86Reg(MipsRegHi(m_Opcode.rd),m_Section->Map_TempReg(x86_Any,source2,TRUE)); } } else { - ProtectGPR(m_Section,source2); - Map_GPR_32bit(m_Section,Opcode.rd,TRUE,source1); + ProtectGPR(source2); + Map_GPR_32bit(m_Opcode.rd,TRUE,source1); } - OrX86RegToX86Reg(m_Section->MipsRegLo(Opcode.rd),m_Section->MipsRegLo(source2)); + OrX86RegToX86Reg(cMipsRegLo(m_Opcode.rd),cMipsRegLo(source2)); } else { - DWORD ConstReg = m_Section->IsConst(Opcode.rt)?Opcode.rt:Opcode.rs; - DWORD MappedReg = m_Section->IsConst(Opcode.rt)?Opcode.rs:Opcode.rt; + DWORD ConstReg = IsConst(m_Opcode.rt)?m_Opcode.rt:m_Opcode.rs; + DWORD MappedReg = IsConst(m_Opcode.rt)?m_Opcode.rs:m_Opcode.rt; - if (m_Section->Is64Bit(Opcode.rt) || m_Section->Is64Bit(Opcode.rs)) { + if (m_Section->Is64Bit(m_Opcode.rt) || m_Section->Is64Bit(m_Opcode.rs)) { unsigned _int64 Value; if (m_Section->Is64Bit(ConstReg)) { Value = m_Section->MipsReg(ConstReg); } else { - Value = m_Section->IsSigned(ConstReg)?m_Section->MipsRegLo_S(ConstReg):m_Section->MipsRegLo(ConstReg); + Value = m_Section->IsSigned(ConstReg)?m_Section->MipsRegLo_S(ConstReg):cMipsRegLo(ConstReg); } - Map_GPR_64bit(m_Section,Opcode.rd,MappedReg); + Map_GPR_64bit(m_Section,m_Opcode.rd,MappedReg); if ((Value >> 32) != 0) { - OrConstToX86Reg((DWORD)(Value >> 32),m_Section->MipsRegHi(Opcode.rd)); + OrConstToX86Reg((DWORD)(Value >> 32),MipsRegHi(m_Opcode.rd)); } if ((DWORD)Value != 0) { - OrConstToX86Reg((DWORD)Value,m_Section->MipsRegLo(Opcode.rd)); + OrConstToX86Reg((DWORD)Value,cMipsRegLo(m_Opcode.rd)); } } else { - int Value = m_Section->MipsRegLo(ConstReg); - Map_GPR_32bit(m_Section,Opcode.rd,TRUE, MappedReg); - if (Value != 0) { OrConstToX86Reg(Value,m_Section->MipsRegLo(Opcode.rd)); } + int Value = cMipsRegLo(ConstReg); + Map_GPR_32bit(m_Opcode.rd,TRUE, MappedReg); + if (Value != 0) { OrConstToX86Reg(Value,cMipsRegLo(m_Opcode.rd)); } } } - } else if (m_Section->IsKnown(Opcode.rt) || m_Section->IsKnown(Opcode.rs)) { - int KnownReg = m_Section->IsKnown(Opcode.rt)?Opcode.rt:Opcode.rs; - int UnknownReg = m_Section->IsKnown(Opcode.rt)?Opcode.rs:Opcode.rt; + } else if (m_Section->IsKnown(m_Opcode.rt) || m_Section->IsKnown(m_Opcode.rs)) { + int KnownReg = m_Section->IsKnown(m_Opcode.rt)?m_Opcode.rt:m_Opcode.rs; + int UnknownReg = m_Section->IsKnown(m_Opcode.rt)?m_Opcode.rs:m_Opcode.rt; - if (m_Section->IsConst(KnownReg)) { + if (IsConst(KnownReg)) { unsigned _int64 Value; Value = m_Section->Is64Bit(KnownReg)?m_Section->MipsReg(KnownReg):m_Section->MipsRegLo_S(KnownReg); - Map_GPR_64bit(m_Section,Opcode.rd,UnknownReg); + Map_GPR_64bit(m_Section,m_Opcode.rd,UnknownReg); if ((Value >> 32) != 0) { - OrConstToX86Reg((DWORD)(Value >> 32),m_Section->MipsRegHi(Opcode.rd)); + OrConstToX86Reg((DWORD)(Value >> 32),MipsRegHi(m_Opcode.rd)); } if ((DWORD)Value != 0) { - OrConstToX86Reg((DWORD)Value,m_Section->MipsRegLo(Opcode.rd)); + OrConstToX86Reg((DWORD)Value,cMipsRegLo(m_Opcode.rd)); } } else { - Map_GPR_64bit(m_Section,Opcode.rd,KnownReg); - OrVariableToX86Reg(&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg],m_Section->MipsRegHi(Opcode.rd)); - OrVariableToX86Reg(&_GPR[UnknownReg].W[0],CRegName::GPR_Lo[UnknownReg],m_Section->MipsRegLo(Opcode.rd)); + Map_GPR_64bit(m_Section,m_Opcode.rd,KnownReg); + OrVariableToX86Reg(&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg],MipsRegHi(m_Opcode.rd)); + OrVariableToX86Reg(&_GPR[UnknownReg].W[0],CRegName::GPR_Lo[UnknownReg],cMipsRegLo(m_Opcode.rd)); } } else { - Map_GPR_64bit(m_Section,Opcode.rd,Opcode.rt); - OrVariableToX86Reg(&_GPR[Opcode.rs].W[1],CRegName::GPR_Hi[Opcode.rs],m_Section->MipsRegHi(Opcode.rd)); - OrVariableToX86Reg(&_GPR[Opcode.rs].W[0],CRegName::GPR_Lo[Opcode.rs],m_Section->MipsRegLo(Opcode.rd)); + Map_GPR_64bit(m_Section,m_Opcode.rd,m_Opcode.rt); + OrVariableToX86Reg(&_GPR[m_Opcode.rs].W[1],CRegName::GPR_Hi[m_Opcode.rs],MipsRegHi(m_Opcode.rd)); + OrVariableToX86Reg(&_GPR[m_Opcode.rs].W[0],CRegName::GPR_Lo[m_Opcode.rs],cMipsRegLo(m_Opcode.rd)); } _Notify->BreakPoint(__FILE__,__LINE__); #ifdef tofix - if (SPHack && Opcode.rd == 29) { + if (SPHack && m_Opcode.rd == 29) { m_Section->ResetX86Protection(); _MMU->ResetMemoryStack(m_Section); } #endif +#endif } -void CRecompilerOps::Compile_SPECIAL_XOR (CCodeSection * m_Section) { - CPU_Message(" %X %s",m_Section->CompilePC,R4300iOpcodeName(Opcode.Hex,m_Section->CompilePC)); - if (Opcode.rd == 0) { return; } +void CRecompilerOps::SPECIAL_XOR (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC)); + if (m_Opcode.rd == 0) { return; } - if (Opcode.rt == Opcode.rs) { - UnMap_GPR(m_Section, Opcode.rd, FALSE); - m_Section->MipsRegState(Opcode.rd) = CRegInfo::STATE_CONST_32; - m_Section->MipsRegLo(Opcode.rd) = 0; + if (m_Opcode.rt == m_Opcode.rs) { + UnMap_GPR( m_Opcode.rd, FALSE); + MipsRegState(m_Opcode.rd) = CRegInfo::STATE_CONST_32; + cMipsRegLo(m_Opcode.rd) = 0; return; } - if (m_Section->IsKnown(Opcode.rt) && m_Section->IsKnown(Opcode.rs)) { - if (m_Section->IsConst(Opcode.rt) && m_Section->IsConst(Opcode.rs)) { - if (m_Section->IsMapped(Opcode.rd)) { UnMap_GPR(m_Section,Opcode.rd, FALSE); } - if (m_Section->Is64Bit(Opcode.rt) || m_Section->Is64Bit(Opcode.rs)) { + if (m_Section->IsKnown(m_Opcode.rt) && m_Section->IsKnown(m_Opcode.rs)) { + if (IsConst(m_Opcode.rt) && IsConst(m_Opcode.rs)) { + if (IsMapped(m_Opcode.rd)) { UnMap_GPR(m_Opcode.rd, FALSE); } + if (m_Section->Is64Bit(m_Opcode.rt) || m_Section->Is64Bit(m_Opcode.rs)) { #ifndef EXTERNAL_RELEASE DisplayError("XOR 1"); #endif - CRecompilerOps::Compile_UnknownOpcode(m_Section); + CRecompilerOps::UnknownOpcode(); } else { - m_Section->MipsRegState(Opcode.rd) = CRegInfo::STATE_CONST_32; - m_Section->MipsRegLo(Opcode.rd) = m_Section->MipsRegLo(Opcode.rt) ^ m_Section->MipsRegLo(Opcode.rs); + MipsRegState(m_Opcode.rd) = CRegInfo::STATE_CONST_32; + cMipsRegLo(m_Opcode.rd) = cMipsRegLo(m_Opcode.rt) ^ cMipsRegLo(m_Opcode.rs); } - } else if (m_Section->IsMapped(Opcode.rt) && m_Section->IsMapped(Opcode.rs)) { - int source1 = Opcode.rd == Opcode.rt?Opcode.rt:Opcode.rs; - int source2 = Opcode.rd == Opcode.rt?Opcode.rs:Opcode.rt; + } else if (IsMapped(m_Opcode.rt) && IsMapped(m_Opcode.rs)) { + int source1 = m_Opcode.rd == m_Opcode.rt?m_Opcode.rt:m_Opcode.rs; + int source2 = m_Opcode.rd == m_Opcode.rt?m_Opcode.rs:m_Opcode.rt; - ProtectGPR(m_Section,source1); - ProtectGPR(m_Section,source2); - if (m_Section->Is64Bit(Opcode.rt) || m_Section->Is64Bit(Opcode.rs)) { - Map_GPR_64bit(m_Section,Opcode.rd,source1); + ProtectGPR(source1); + ProtectGPR(source2); + if (m_Section->Is64Bit(m_Opcode.rt) || m_Section->Is64Bit(m_Opcode.rs)) { + Map_GPR_64bit(m_Section,m_Opcode.rd,source1); if (m_Section->Is64Bit(source2)) { - XorX86RegToX86Reg(m_Section->MipsRegHi(Opcode.rd),m_Section->MipsRegHi(source2)); + XorX86RegToX86Reg(MipsRegHi(m_Opcode.rd),MipsRegHi(source2)); } else if (m_Section->IsSigned(source2)) { - XorX86RegToX86Reg(m_Section->MipsRegHi(Opcode.rd),Map_TempReg(m_Section,x86_Any,source2,TRUE)); + XorX86RegToX86Reg(MipsRegHi(m_Opcode.rd),m_Section->Map_TempReg(x86_Any,source2,TRUE)); } - XorX86RegToX86Reg(m_Section->MipsRegLo(Opcode.rd),m_Section->MipsRegLo(source2)); + XorX86RegToX86Reg(cMipsRegLo(m_Opcode.rd),cMipsRegLo(source2)); } else { - if (m_Section->IsSigned(Opcode.rt) != m_Section->IsSigned(Opcode.rs)) { - Map_GPR_32bit(m_Section,Opcode.rd,TRUE,source1); + if (m_Section->IsSigned(m_Opcode.rt) != m_Section->IsSigned(m_Opcode.rs)) { + Map_GPR_32bit(m_Opcode.rd,TRUE,source1); } else { - Map_GPR_32bit(m_Section,Opcode.rd,m_Section->IsSigned(Opcode.rt),source1); + Map_GPR_32bit(m_Opcode.rd,m_Section->IsSigned(m_Opcode.rt),source1); } - XorX86RegToX86Reg(m_Section->MipsRegLo(Opcode.rd),m_Section->MipsRegLo(source2)); + XorX86RegToX86Reg(cMipsRegLo(m_Opcode.rd),cMipsRegLo(source2)); } } else { - DWORD ConstReg = m_Section->IsConst(Opcode.rt)?Opcode.rt:Opcode.rs; - DWORD MappedReg = m_Section->IsConst(Opcode.rt)?Opcode.rs:Opcode.rt; + DWORD ConstReg = IsConst(m_Opcode.rt)?m_Opcode.rt:m_Opcode.rs; + DWORD MappedReg = IsConst(m_Opcode.rt)?m_Opcode.rs:m_Opcode.rt; - if (m_Section->Is64Bit(Opcode.rt) || m_Section->Is64Bit(Opcode.rs)) { + if (m_Section->Is64Bit(m_Opcode.rt) || m_Section->Is64Bit(m_Opcode.rs)) { DWORD ConstHi, ConstLo; - ConstHi = m_Section->Is32Bit(ConstReg)?(DWORD)(m_Section->MipsRegLo_S(ConstReg) >> 31):m_Section->MipsRegHi(ConstReg); - ConstLo = m_Section->MipsRegLo(ConstReg); - Map_GPR_64bit(m_Section,Opcode.rd,MappedReg); - if (ConstHi != 0) { XorConstToX86Reg(m_Section->MipsRegHi(Opcode.rd),ConstHi); } - if (ConstLo != 0) { XorConstToX86Reg(m_Section->MipsRegLo(Opcode.rd),ConstLo); } + ConstHi = m_Section->Is32Bit(ConstReg)?(DWORD)(m_Section->MipsRegLo_S(ConstReg) >> 31):MipsRegHi(ConstReg); + ConstLo = cMipsRegLo(ConstReg); + Map_GPR_64bit(m_Section,m_Opcode.rd,MappedReg); + if (ConstHi != 0) { XorConstToX86Reg(MipsRegHi(m_Opcode.rd),ConstHi); } + if (ConstLo != 0) { XorConstToX86Reg(cMipsRegLo(m_Opcode.rd),ConstLo); } } else { - int Value = m_Section->MipsRegLo(ConstReg); - if (m_Section->IsSigned(Opcode.rt) != m_Section->IsSigned(Opcode.rs)) { - Map_GPR_32bit(m_Section,Opcode.rd,TRUE, MappedReg); + int Value = cMipsRegLo(ConstReg); + if (m_Section->IsSigned(m_Opcode.rt) != m_Section->IsSigned(m_Opcode.rs)) { + Map_GPR_32bit(m_Opcode.rd,TRUE, MappedReg); } else { - Map_GPR_32bit(m_Section,Opcode.rd,m_Section->IsSigned(MappedReg)?TRUE:FALSE, MappedReg); + Map_GPR_32bit(m_Opcode.rd,m_Section->IsSigned(MappedReg)?TRUE:FALSE, MappedReg); } - if (Value != 0) { XorConstToX86Reg(m_Section->MipsRegLo(Opcode.rd),Value); } + if (Value != 0) { XorConstToX86Reg(cMipsRegLo(m_Opcode.rd),Value); } } } - } else if (m_Section->IsKnown(Opcode.rt) || m_Section->IsKnown(Opcode.rs)) { - int KnownReg = m_Section->IsKnown(Opcode.rt)?Opcode.rt:Opcode.rs; - int UnknownReg = m_Section->IsKnown(Opcode.rt)?Opcode.rs:Opcode.rt; + } else if (m_Section->IsKnown(m_Opcode.rt) || m_Section->IsKnown(m_Opcode.rs)) { + int KnownReg = m_Section->IsKnown(m_Opcode.rt)?m_Opcode.rt:m_Opcode.rs; + int UnknownReg = m_Section->IsKnown(m_Opcode.rt)?m_Opcode.rs:m_Opcode.rt; - if (m_Section->IsConst(KnownReg)) { + if (IsConst(KnownReg)) { unsigned _int64 Value; if (m_Section->Is64Bit(KnownReg)) { Value = m_Section->MipsReg(KnownReg); } else { if (m_Section->IsSigned(KnownReg)) { - Value = (int)m_Section->MipsRegLo(KnownReg); + Value = (int)cMipsRegLo(KnownReg); } else { - Value = m_Section->MipsRegLo(KnownReg); + Value = cMipsRegLo(KnownReg); } } - Map_GPR_64bit(m_Section,Opcode.rd,UnknownReg); + Map_GPR_64bit(m_Section,m_Opcode.rd,UnknownReg); if ((Value >> 32) != 0) { - XorConstToX86Reg(m_Section->MipsRegHi(Opcode.rd),(DWORD)(Value >> 32)); + XorConstToX86Reg(MipsRegHi(m_Opcode.rd),(DWORD)(Value >> 32)); } if ((DWORD)Value != 0) { - XorConstToX86Reg(m_Section->MipsRegLo(Opcode.rd),(DWORD)Value); + XorConstToX86Reg(cMipsRegLo(m_Opcode.rd),(DWORD)Value); } } else { - Map_GPR_64bit(m_Section,Opcode.rd,KnownReg); - XorVariableToX86reg(&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg],m_Section->MipsRegHi(Opcode.rd)); - XorVariableToX86reg(&_GPR[UnknownReg].W[0],CRegName::GPR_Lo[UnknownReg],m_Section->MipsRegLo(Opcode.rd)); + Map_GPR_64bit(m_Section,m_Opcode.rd,KnownReg); + XorVariableToX86reg(&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg],MipsRegHi(m_Opcode.rd)); + XorVariableToX86reg(&_GPR[UnknownReg].W[0],CRegName::GPR_Lo[UnknownReg],cMipsRegLo(m_Opcode.rd)); } } else { - Map_GPR_64bit(m_Section,Opcode.rd,Opcode.rt); - XorVariableToX86reg(&_GPR[Opcode.rs].W[1],CRegName::GPR_Hi[Opcode.rs],m_Section->MipsRegHi(Opcode.rd)); - XorVariableToX86reg(&_GPR[Opcode.rs].W[0],CRegName::GPR_Lo[Opcode.rs],m_Section->MipsRegLo(Opcode.rd)); + Map_GPR_64bit(m_Section,m_Opcode.rd,m_Opcode.rt); + XorVariableToX86reg(&_GPR[m_Opcode.rs].W[1],CRegName::GPR_Hi[m_Opcode.rs],MipsRegHi(m_Opcode.rd)); + XorVariableToX86reg(&_GPR[m_Opcode.rs].W[0],CRegName::GPR_Lo[m_Opcode.rs],cMipsRegLo(m_Opcode.rd)); } +#endif } -void CRecompilerOps::Compile_SPECIAL_NOR (CCodeSection * m_Section) { - CPU_Message(" %X %s",m_Section->CompilePC,R4300iOpcodeName(Opcode.Hex,m_Section->CompilePC)); +void CRecompilerOps::SPECIAL_NOR (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC)); - if (m_Section->IsKnown(Opcode.rt) && m_Section->IsKnown(Opcode.rs)) { - if (m_Section->IsConst(Opcode.rt) && m_Section->IsConst(Opcode.rs)) { - if (m_Section->IsMapped(Opcode.rd)) { UnMap_GPR(m_Section,Opcode.rd, FALSE); } - if (m_Section->Is64Bit(Opcode.rt) || m_Section->Is64Bit(Opcode.rs)) { - CRecompilerOps::Compile_UnknownOpcode(m_Section); + if (m_Section->IsKnown(m_Opcode.rt) && m_Section->IsKnown(m_Opcode.rs)) { + if (IsConst(m_Opcode.rt) && IsConst(m_Opcode.rs)) { + if (IsMapped(m_Opcode.rd)) { UnMap_GPR(m_Opcode.rd, FALSE); } + if (m_Section->Is64Bit(m_Opcode.rt) || m_Section->Is64Bit(m_Opcode.rs)) { + CRecompilerOps::UnknownOpcode(); } else { - m_Section->MipsRegLo(Opcode.rd) = ~(m_Section->MipsRegLo(Opcode.rt) | m_Section->MipsRegLo(Opcode.rs)); - m_Section->MipsRegState(Opcode.rd) = CRegInfo::STATE_CONST_32; + cMipsRegLo(m_Opcode.rd) = ~(cMipsRegLo(m_Opcode.rt) | cMipsRegLo(m_Opcode.rs)); + MipsRegState(m_Opcode.rd) = CRegInfo::STATE_CONST_32; } - } else if (m_Section->IsMapped(Opcode.rt) && m_Section->IsMapped(Opcode.rs)) { - int source1 = Opcode.rd == Opcode.rt?Opcode.rt:Opcode.rs; - int source2 = Opcode.rd == Opcode.rt?Opcode.rs:Opcode.rt; + } else if (IsMapped(m_Opcode.rt) && IsMapped(m_Opcode.rs)) { + int source1 = m_Opcode.rd == m_Opcode.rt?m_Opcode.rt:m_Opcode.rs; + int source2 = m_Opcode.rd == m_Opcode.rt?m_Opcode.rs:m_Opcode.rt; - ProtectGPR(m_Section,source1); - ProtectGPR(m_Section,source2); - if (m_Section->Is64Bit(Opcode.rt) || m_Section->Is64Bit(Opcode.rs)) { - Map_GPR_64bit(m_Section,Opcode.rd,source1); + ProtectGPR(source1); + ProtectGPR(source2); + if (m_Section->Is64Bit(m_Opcode.rt) || m_Section->Is64Bit(m_Opcode.rs)) { + Map_GPR_64bit(m_Section,m_Opcode.rd,source1); if (m_Section->Is64Bit(source2)) { - OrX86RegToX86Reg(m_Section->MipsRegHi(Opcode.rd),m_Section->MipsRegHi(source2)); + OrX86RegToX86Reg(MipsRegHi(m_Opcode.rd),MipsRegHi(source2)); } else { - OrX86RegToX86Reg(m_Section->MipsRegHi(Opcode.rd),Map_TempReg(m_Section,x86_Any,source2,TRUE)); + OrX86RegToX86Reg(MipsRegHi(m_Opcode.rd),m_Section->Map_TempReg(x86_Any,source2,TRUE)); } - OrX86RegToX86Reg(m_Section->MipsRegLo(Opcode.rd),m_Section->MipsRegLo(source2)); - NotX86Reg(m_Section->MipsRegHi(Opcode.rd)); - NotX86Reg(m_Section->MipsRegLo(Opcode.rd)); + OrX86RegToX86Reg(cMipsRegLo(m_Opcode.rd),cMipsRegLo(source2)); + NotX86Reg(MipsRegHi(m_Opcode.rd)); + NotX86Reg(cMipsRegLo(m_Opcode.rd)); } else { - ProtectGPR(m_Section,source2); - if (m_Section->IsSigned(Opcode.rt) != m_Section->IsSigned(Opcode.rs)) { - Map_GPR_32bit(m_Section,Opcode.rd,TRUE,source1); + ProtectGPR(source2); + if (m_Section->IsSigned(m_Opcode.rt) != m_Section->IsSigned(m_Opcode.rs)) { + Map_GPR_32bit(m_Opcode.rd,TRUE,source1); } else { - Map_GPR_32bit(m_Section,Opcode.rd,m_Section->IsSigned(Opcode.rt),source1); + Map_GPR_32bit(m_Opcode.rd,m_Section->IsSigned(m_Opcode.rt),source1); } - OrX86RegToX86Reg(m_Section->MipsRegLo(Opcode.rd),m_Section->MipsRegLo(source2)); - NotX86Reg(m_Section->MipsRegLo(Opcode.rd)); + OrX86RegToX86Reg(cMipsRegLo(m_Opcode.rd),cMipsRegLo(source2)); + NotX86Reg(cMipsRegLo(m_Opcode.rd)); } } else { - DWORD ConstReg = m_Section->IsConst(Opcode.rt)?Opcode.rt:Opcode.rs; - DWORD MappedReg = m_Section->IsConst(Opcode.rt)?Opcode.rs:Opcode.rt; + DWORD ConstReg = IsConst(m_Opcode.rt)?m_Opcode.rt:m_Opcode.rs; + DWORD MappedReg = IsConst(m_Opcode.rt)?m_Opcode.rs:m_Opcode.rt; - if (m_Section->Is64Bit(Opcode.rt) || m_Section->Is64Bit(Opcode.rs)) { + if (m_Section->Is64Bit(m_Opcode.rt) || m_Section->Is64Bit(m_Opcode.rs)) { unsigned _int64 Value; if (m_Section->Is64Bit(ConstReg)) { Value = m_Section->MipsReg(ConstReg); } else { - Value = m_Section->IsSigned(ConstReg)?m_Section->MipsRegLo_S(ConstReg):m_Section->MipsRegLo(ConstReg); + Value = m_Section->IsSigned(ConstReg)?m_Section->MipsRegLo_S(ConstReg):cMipsRegLo(ConstReg); } - Map_GPR_64bit(m_Section,Opcode.rd,MappedReg); + Map_GPR_64bit(m_Section,m_Opcode.rd,MappedReg); if ((Value >> 32) != 0) { - OrConstToX86Reg((DWORD)(Value >> 32),m_Section->MipsRegHi(Opcode.rd)); + OrConstToX86Reg((DWORD)(Value >> 32),MipsRegHi(m_Opcode.rd)); } if ((DWORD)Value != 0) { - OrConstToX86Reg((DWORD)Value,m_Section->MipsRegLo(Opcode.rd)); + OrConstToX86Reg((DWORD)Value,cMipsRegLo(m_Opcode.rd)); } - NotX86Reg(m_Section->MipsRegHi(Opcode.rd)); - NotX86Reg(m_Section->MipsRegLo(Opcode.rd)); + NotX86Reg(MipsRegHi(m_Opcode.rd)); + NotX86Reg(cMipsRegLo(m_Opcode.rd)); } else { - int Value = m_Section->MipsRegLo(ConstReg); - if (m_Section->IsSigned(Opcode.rt) != m_Section->IsSigned(Opcode.rs)) { - Map_GPR_32bit(m_Section,Opcode.rd,TRUE, MappedReg); + int Value = cMipsRegLo(ConstReg); + if (m_Section->IsSigned(m_Opcode.rt) != m_Section->IsSigned(m_Opcode.rs)) { + Map_GPR_32bit(m_Opcode.rd,TRUE, MappedReg); } else { - Map_GPR_32bit(m_Section,Opcode.rd,m_Section->IsSigned(MappedReg)?TRUE:FALSE, MappedReg); + Map_GPR_32bit(m_Opcode.rd,m_Section->IsSigned(MappedReg)?TRUE:FALSE, MappedReg); } - if (Value != 0) { OrConstToX86Reg(Value,m_Section->MipsRegLo(Opcode.rd)); } - NotX86Reg(m_Section->MipsRegLo(Opcode.rd)); + if (Value != 0) { OrConstToX86Reg(Value,cMipsRegLo(m_Opcode.rd)); } + NotX86Reg(cMipsRegLo(m_Opcode.rd)); } } - } else if (m_Section->IsKnown(Opcode.rt) || m_Section->IsKnown(Opcode.rs)) { - int KnownReg = m_Section->IsKnown(Opcode.rt)?Opcode.rt:Opcode.rs; - int UnknownReg = m_Section->IsKnown(Opcode.rt)?Opcode.rs:Opcode.rt; + } else if (m_Section->IsKnown(m_Opcode.rt) || m_Section->IsKnown(m_Opcode.rs)) { + int KnownReg = m_Section->IsKnown(m_Opcode.rt)?m_Opcode.rt:m_Opcode.rs; + int UnknownReg = m_Section->IsKnown(m_Opcode.rt)?m_Opcode.rs:m_Opcode.rt; - if (m_Section->IsConst(KnownReg)) { + if (IsConst(KnownReg)) { unsigned _int64 Value; Value = m_Section->Is64Bit(KnownReg)?m_Section->MipsReg(KnownReg):m_Section->MipsRegLo_S(KnownReg); - Map_GPR_64bit(m_Section,Opcode.rd,UnknownReg); + Map_GPR_64bit(m_Section,m_Opcode.rd,UnknownReg); if ((Value >> 32) != 0) { - OrConstToX86Reg((DWORD)(Value >> 32),m_Section->MipsRegHi(Opcode.rd)); + OrConstToX86Reg((DWORD)(Value >> 32),MipsRegHi(m_Opcode.rd)); } if ((DWORD)Value != 0) { - OrConstToX86Reg((DWORD)Value,m_Section->MipsRegLo(Opcode.rd)); + OrConstToX86Reg((DWORD)Value,cMipsRegLo(m_Opcode.rd)); } } else { - Map_GPR_64bit(m_Section,Opcode.rd,KnownReg); - OrVariableToX86Reg(&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg],m_Section->MipsRegHi(Opcode.rd)); - OrVariableToX86Reg(&_GPR[UnknownReg].W[0],CRegName::GPR_Lo[UnknownReg],m_Section->MipsRegLo(Opcode.rd)); + Map_GPR_64bit(m_Section,m_Opcode.rd,KnownReg); + OrVariableToX86Reg(&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg],MipsRegHi(m_Opcode.rd)); + OrVariableToX86Reg(&_GPR[UnknownReg].W[0],CRegName::GPR_Lo[UnknownReg],cMipsRegLo(m_Opcode.rd)); } - NotX86Reg(m_Section->MipsRegHi(Opcode.rd)); - NotX86Reg(m_Section->MipsRegLo(Opcode.rd)); + NotX86Reg(MipsRegHi(m_Opcode.rd)); + NotX86Reg(cMipsRegLo(m_Opcode.rd)); } else { - Map_GPR_64bit(m_Section,Opcode.rd,Opcode.rt); - OrVariableToX86Reg(&_GPR[Opcode.rs].W[1],CRegName::GPR_Hi[Opcode.rs],m_Section->MipsRegHi(Opcode.rd)); - OrVariableToX86Reg(&_GPR[Opcode.rs].W[0],CRegName::GPR_Lo[Opcode.rs],m_Section->MipsRegLo(Opcode.rd)); - NotX86Reg(m_Section->MipsRegHi(Opcode.rd)); - NotX86Reg(m_Section->MipsRegLo(Opcode.rd)); + Map_GPR_64bit(m_Section,m_Opcode.rd,m_Opcode.rt); + OrVariableToX86Reg(&_GPR[m_Opcode.rs].W[1],CRegName::GPR_Hi[m_Opcode.rs],MipsRegHi(m_Opcode.rd)); + OrVariableToX86Reg(&_GPR[m_Opcode.rs].W[0],CRegName::GPR_Lo[m_Opcode.rs],cMipsRegLo(m_Opcode.rd)); + NotX86Reg(MipsRegHi(m_Opcode.rd)); + NotX86Reg(cMipsRegLo(m_Opcode.rd)); } +#endif } -void CRecompilerOps::Compile_SPECIAL_SLT (CCodeSection * m_Section) { - CPU_Message(" %X %s",m_Section->CompilePC,R4300iOpcodeName(Opcode.Hex,m_Section->CompilePC)); +void CRecompilerOps::SPECIAL_SLT (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC)); - if (m_Section->IsKnown(Opcode.rt) && m_Section->IsKnown(Opcode.rs)) { - if (m_Section->IsConst(Opcode.rt) && m_Section->IsConst(Opcode.rs)) { - if (m_Section->Is64Bit(Opcode.rt) || m_Section->Is64Bit(Opcode.rs)) { + if (m_Section->IsKnown(m_Opcode.rt) && m_Section->IsKnown(m_Opcode.rs)) { + if (IsConst(m_Opcode.rt) && IsConst(m_Opcode.rs)) { + if (m_Section->Is64Bit(m_Opcode.rt) || m_Section->Is64Bit(m_Opcode.rs)) { DisplayError("1"); - CRecompilerOps::Compile_UnknownOpcode(m_Section); + CRecompilerOps::UnknownOpcode(); } else { - if (m_Section->IsMapped(Opcode.rd)) { UnMap_GPR(m_Section,Opcode.rd, FALSE); } - m_Section->MipsRegState(Opcode.rd) = CRegInfo::STATE_CONST_32; - if (m_Section->MipsRegLo_S(Opcode.rs) < m_Section->MipsRegLo_S(Opcode.rt)) { - m_Section->MipsRegLo(Opcode.rd) = 1; + if (IsMapped(m_Opcode.rd)) { UnMap_GPR(m_Opcode.rd, FALSE); } + MipsRegState(m_Opcode.rd) = CRegInfo::STATE_CONST_32; + if (m_Section->MipsRegLo_S(m_Opcode.rs) < m_Section->MipsRegLo_S(m_Opcode.rt)) { + cMipsRegLo(m_Opcode.rd) = 1; } else { - m_Section->MipsRegLo(Opcode.rd) = 0; + cMipsRegLo(m_Opcode.rd) = 0; } } - } else if (m_Section->IsMapped(Opcode.rt) && m_Section->IsMapped(Opcode.rs)) { - ProtectGPR(m_Section,Opcode.rt); - ProtectGPR(m_Section,Opcode.rs); - if (m_Section->Is64Bit(Opcode.rt) || m_Section->Is64Bit(Opcode.rs)) { + } else if (IsMapped(m_Opcode.rt) && IsMapped(m_Opcode.rs)) { + ProtectGPR(m_Opcode.rt); + ProtectGPR(m_Opcode.rs); + if (m_Section->Is64Bit(m_Opcode.rt) || m_Section->Is64Bit(m_Opcode.rs)) { BYTE *Jump[2]; CompX86RegToX86Reg( - m_Section->Is64Bit(Opcode.rs)?m_Section->MipsRegHi(Opcode.rs):Map_TempReg(m_Section,x86_Any,Opcode.rs,TRUE), - m_Section->Is64Bit(Opcode.rt)?m_Section->MipsRegHi(Opcode.rt):Map_TempReg(m_Section,x86_Any,Opcode.rt,TRUE) + m_Section->Is64Bit(m_Opcode.rs)?MipsRegHi(m_Opcode.rs):m_Section->Map_TempReg(x86_Any,m_Opcode.rs,TRUE), + m_Section->Is64Bit(m_Opcode.rt)?MipsRegHi(m_Opcode.rt):m_Section->Map_TempReg(x86_Any,m_Opcode.rt,TRUE) ); JeLabel8("Low Compare",0); - Jump[0] = RecompPos - 1; + Jump[0] = m_RecompPos - 1; SetlVariable(&BranchCompare,"BranchCompare"); JmpLabel8("Continue",0); - Jump[1] = RecompPos - 1; + Jump[1] = m_RecompPos - 1; CPU_Message(""); CPU_Message(" Low Compare:"); - *((BYTE *)(Jump[0]))=(BYTE)(RecompPos - Jump[0] - 1); - CompX86RegToX86Reg(m_Section->MipsRegLo(Opcode.rs), m_Section->MipsRegLo(Opcode.rt)); + *((BYTE *)(Jump[0]))=(BYTE)(m_RecompPos - Jump[0] - 1); + CompX86RegToX86Reg(cMipsRegLo(m_Opcode.rs), cMipsRegLo(m_Opcode.rt)); SetbVariable(&BranchCompare,"BranchCompare"); CPU_Message(""); CPU_Message(" Continue:"); - *((BYTE *)(Jump[1]))=(BYTE)(RecompPos - Jump[1] - 1); - Map_GPR_32bit(m_Section,Opcode.rd,TRUE, -1); - MoveVariableToX86reg(&BranchCompare,"BranchCompare",m_Section->MipsRegLo(Opcode.rd)); + *((BYTE *)(Jump[1]))=(BYTE)(m_RecompPos - Jump[1] - 1); + Map_GPR_32bit(m_Opcode.rd,TRUE, -1); + MoveVariableToX86reg(&BranchCompare,"BranchCompare",cMipsRegLo(m_Opcode.rd)); } else { - Map_GPR_32bit(m_Section,Opcode.rd,TRUE, -1); - CompX86RegToX86Reg(m_Section->MipsRegLo(Opcode.rs), m_Section->MipsRegLo(Opcode.rt)); + Map_GPR_32bit(m_Opcode.rd,TRUE, -1); + CompX86RegToX86Reg(cMipsRegLo(m_Opcode.rs), cMipsRegLo(m_Opcode.rt)); - if (m_Section->MipsRegLo(Opcode.rd) > x86_EDX) { + if (cMipsRegLo(m_Opcode.rd) > x86_EDX) { SetlVariable(&BranchCompare,"BranchCompare"); - MoveVariableToX86reg(&BranchCompare,"BranchCompare",m_Section->MipsRegLo(Opcode.rd)); + MoveVariableToX86reg(&BranchCompare,"BranchCompare",cMipsRegLo(m_Opcode.rd)); } else { - Setl(m_Section->MipsRegLo(Opcode.rd)); - AndConstToX86Reg(m_Section->MipsRegLo(Opcode.rd), 1); + Setl(cMipsRegLo(m_Opcode.rd)); + AndConstToX86Reg(cMipsRegLo(m_Opcode.rd), 1); } } } else { - DWORD ConstReg = m_Section->IsConst(Opcode.rs)?Opcode.rs:Opcode.rt; - DWORD MappedReg = m_Section->IsConst(Opcode.rs)?Opcode.rt:Opcode.rs; + DWORD ConstReg = IsConst(m_Opcode.rs)?m_Opcode.rs:m_Opcode.rt; + DWORD MappedReg = IsConst(m_Opcode.rs)?m_Opcode.rt:m_Opcode.rs; - ProtectGPR(m_Section,MappedReg); - if (m_Section->Is64Bit(Opcode.rt) || m_Section->Is64Bit(Opcode.rs)) { + ProtectGPR(MappedReg); + if (m_Section->Is64Bit(m_Opcode.rt) || m_Section->Is64Bit(m_Opcode.rs)) { BYTE *Jump[2]; CompConstToX86reg( - m_Section->Is64Bit(MappedReg)?m_Section->MipsRegHi(MappedReg):Map_TempReg(m_Section,x86_Any,MappedReg,TRUE), - m_Section->Is64Bit(ConstReg)?m_Section->MipsRegHi(ConstReg):(m_Section->MipsRegLo_S(ConstReg) >> 31) + m_Section->Is64Bit(MappedReg)?MipsRegHi(MappedReg):m_Section->Map_TempReg(x86_Any,MappedReg,TRUE), + m_Section->Is64Bit(ConstReg)?MipsRegHi(ConstReg):(m_Section->MipsRegLo_S(ConstReg) >> 31) ); JeLabel8("Low Compare",0); - Jump[0] = RecompPos - 1; - if (MappedReg == Opcode.rs) { + Jump[0] = m_RecompPos - 1; + if (MappedReg == m_Opcode.rs) { SetlVariable(&BranchCompare,"BranchCompare"); } else { SetgVariable(&BranchCompare,"BranchCompare"); } JmpLabel8("Continue",0); - Jump[1] = RecompPos - 1; + Jump[1] = m_RecompPos - 1; CPU_Message(""); CPU_Message(" Low Compare:"); - *((BYTE *)(Jump[0]))=(BYTE)(RecompPos - Jump[0] - 1); - CompConstToX86reg(m_Section->MipsRegLo(MappedReg), m_Section->MipsRegLo(ConstReg)); - if (MappedReg == Opcode.rs) { + *((BYTE *)(Jump[0]))=(BYTE)(m_RecompPos - Jump[0] - 1); + CompConstToX86reg(cMipsRegLo(MappedReg), cMipsRegLo(ConstReg)); + if (MappedReg == m_Opcode.rs) { SetbVariable(&BranchCompare,"BranchCompare"); } else { SetaVariable(&BranchCompare,"BranchCompare"); } CPU_Message(""); CPU_Message(" Continue:"); - *((BYTE *)(Jump[1]))=(BYTE)(RecompPos - Jump[1] - 1); - Map_GPR_32bit(m_Section,Opcode.rd,TRUE, -1); - MoveVariableToX86reg(&BranchCompare,"BranchCompare",m_Section->MipsRegLo(Opcode.rd)); + *((BYTE *)(Jump[1]))=(BYTE)(m_RecompPos - Jump[1] - 1); + Map_GPR_32bit(m_Opcode.rd,TRUE, -1); + MoveVariableToX86reg(&BranchCompare,"BranchCompare",cMipsRegLo(m_Opcode.rd)); } else { - DWORD Constant = m_Section->MipsRegLo(ConstReg); - Map_GPR_32bit(m_Section,Opcode.rd,TRUE, -1); - CompConstToX86reg(m_Section->MipsRegLo(MappedReg), Constant); + DWORD Constant = cMipsRegLo(ConstReg); + Map_GPR_32bit(m_Opcode.rd,TRUE, -1); + CompConstToX86reg(cMipsRegLo(MappedReg), Constant); - if (m_Section->MipsRegLo(Opcode.rd) > x86_EDX) { - if (MappedReg == Opcode.rs) { + if (cMipsRegLo(m_Opcode.rd) > x86_EDX) { + if (MappedReg == m_Opcode.rs) { SetlVariable(&BranchCompare,"BranchCompare"); } else { SetgVariable(&BranchCompare,"BranchCompare"); } - MoveVariableToX86reg(&BranchCompare,"BranchCompare",m_Section->MipsRegLo(Opcode.rd)); + MoveVariableToX86reg(&BranchCompare,"BranchCompare",cMipsRegLo(m_Opcode.rd)); } else { - if (MappedReg == Opcode.rs) { - Setl(m_Section->MipsRegLo(Opcode.rd)); + if (MappedReg == m_Opcode.rs) { + Setl(cMipsRegLo(m_Opcode.rd)); } else { - Setg(m_Section->MipsRegLo(Opcode.rd)); + Setg(cMipsRegLo(m_Opcode.rd)); } - AndConstToX86Reg(m_Section->MipsRegLo(Opcode.rd), 1); + AndConstToX86Reg(cMipsRegLo(m_Opcode.rd), 1); } } } - } else if (m_Section->IsKnown(Opcode.rt) || m_Section->IsKnown(Opcode.rs)) { - DWORD KnownReg = m_Section->IsKnown(Opcode.rt)?Opcode.rt:Opcode.rs; - DWORD UnknownReg = m_Section->IsKnown(Opcode.rt)?Opcode.rs:Opcode.rt; + } else if (m_Section->IsKnown(m_Opcode.rt) || m_Section->IsKnown(m_Opcode.rs)) { + DWORD KnownReg = m_Section->IsKnown(m_Opcode.rt)?m_Opcode.rt:m_Opcode.rs; + DWORD UnknownReg = m_Section->IsKnown(m_Opcode.rt)?m_Opcode.rs:m_Opcode.rt; BYTE *Jump[2]; - if (m_Section->IsConst(KnownReg)) { + if (IsConst(KnownReg)) { if (m_Section->Is64Bit(KnownReg)) { - CompConstToVariable(m_Section->MipsRegHi(KnownReg),&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg]); + CompConstToVariable(MipsRegHi(KnownReg),&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg]); } else { - CompConstToVariable(((int)m_Section->MipsRegLo(KnownReg) >> 31),&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg]); + CompConstToVariable(((int)cMipsRegLo(KnownReg) >> 31),&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg]); } } else { if (m_Section->Is64Bit(KnownReg)) { - CompX86regToVariable(m_Section->MipsRegHi(KnownReg),&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg]); + CompX86regToVariable(MipsRegHi(KnownReg),&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg]); } else { - ProtectGPR(m_Section,KnownReg); - CompX86regToVariable(Map_TempReg(m_Section,x86_Any,KnownReg,TRUE),&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg]); + ProtectGPR(KnownReg); + CompX86regToVariable(m_Section->Map_TempReg(x86_Any,KnownReg,TRUE),&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg]); } } JeLabel8("Low Compare",0); - Jump[0] = RecompPos - 1; - if (KnownReg == (m_Section->IsConst(KnownReg)?Opcode.rs:Opcode.rt)) { + Jump[0] = m_RecompPos - 1; + if (KnownReg == (IsConst(KnownReg)?m_Opcode.rs:m_Opcode.rt)) { SetgVariable(&BranchCompare,"BranchCompare"); } else { SetlVariable(&BranchCompare,"BranchCompare"); } JmpLabel8("Continue",0); - Jump[1] = RecompPos - 1; + Jump[1] = m_RecompPos - 1; CPU_Message(""); CPU_Message(" Low Compare:"); - *((BYTE *)(Jump[0]))=(BYTE)(RecompPos - Jump[0] - 1); - if (m_Section->IsConst(KnownReg)) { - CompConstToVariable(m_Section->MipsRegLo(KnownReg),&_GPR[UnknownReg].W[0],CRegName::GPR_Lo[UnknownReg]); + *((BYTE *)(Jump[0]))=(BYTE)(m_RecompPos - Jump[0] - 1); + if (IsConst(KnownReg)) { + CompConstToVariable(cMipsRegLo(KnownReg),&_GPR[UnknownReg].W[0],CRegName::GPR_Lo[UnknownReg]); } else { - CompX86regToVariable(m_Section->MipsRegLo(KnownReg),&_GPR[UnknownReg].W[0],CRegName::GPR_Lo[UnknownReg]); + CompX86regToVariable(cMipsRegMapLo(KnownReg),&_GPR[UnknownReg].W[0],CRegName::GPR_Lo[UnknownReg]); } - if (KnownReg == (m_Section->IsConst(KnownReg)?Opcode.rs:Opcode.rt)) { + if (KnownReg == (IsConst(KnownReg)?m_Opcode.rs:m_Opcode.rt)) { SetaVariable(&BranchCompare,"BranchCompare"); } else { SetbVariable(&BranchCompare,"BranchCompare"); } CPU_Message(""); CPU_Message(" Continue:"); - *((BYTE *)(Jump[1]))=(BYTE)(RecompPos - Jump[1] - 1); - Map_GPR_32bit(m_Section,Opcode.rd,TRUE, -1); - MoveVariableToX86reg(&BranchCompare,"BranchCompare",m_Section->MipsRegLo(Opcode.rd)); + *((BYTE *)(Jump[1]))=(BYTE)(m_RecompPos - Jump[1] - 1); + Map_GPR_32bit(m_Opcode.rd,TRUE, -1); + MoveVariableToX86reg(&BranchCompare,"BranchCompare",cMipsRegLo(m_Opcode.rd)); } else { BYTE *Jump[2]; int x86Reg; - x86Reg = Map_TempReg(m_Section,x86_Any,Opcode.rs,TRUE); - CompX86regToVariable(x86Reg,&_GPR[Opcode.rt].W[1],CRegName::GPR_Hi[Opcode.rt]); + x86Reg = m_Section->Map_TempReg(x86_Any,m_Opcode.rs,TRUE); + CompX86regToVariable(x86Reg,&_GPR[m_Opcode.rt].W[1],CRegName::GPR_Hi[m_Opcode.rt]); JeLabel8("Low Compare",0); - Jump[0] = RecompPos - 1; + Jump[0] = m_RecompPos - 1; SetlVariable(&BranchCompare,"BranchCompare"); JmpLabel8("Continue",0); - Jump[1] = RecompPos - 1; + Jump[1] = m_RecompPos - 1; CPU_Message(""); CPU_Message(" Low Compare:"); - *((BYTE *)(Jump[0]))=(BYTE)(RecompPos - Jump[0] - 1); - CompX86regToVariable(Map_TempReg(m_Section,x86Reg,Opcode.rs,FALSE),&_GPR[Opcode.rt].W[0],CRegName::GPR_Lo[Opcode.rt]); + *((BYTE *)(Jump[0]))=(BYTE)(m_RecompPos - Jump[0] - 1); + CompX86regToVariable(m_Section->Map_TempReg(x86Reg,m_Opcode.rs,FALSE),&_GPR[m_Opcode.rt].W[0],CRegName::GPR_Lo[m_Opcode.rt]); SetbVariable(&BranchCompare,"BranchCompare"); CPU_Message(""); CPU_Message(" Continue:"); - *((BYTE *)(Jump[1]))=(BYTE)(RecompPos - Jump[1] - 1); - Map_GPR_32bit(m_Section,Opcode.rd,TRUE, -1); - MoveVariableToX86reg(&BranchCompare,"BranchCompare",m_Section->MipsRegLo(Opcode.rd)); + *((BYTE *)(Jump[1]))=(BYTE)(m_RecompPos - Jump[1] - 1); + Map_GPR_32bit(m_Opcode.rd,TRUE, -1); + MoveVariableToX86reg(&BranchCompare,"BranchCompare",cMipsRegLo(m_Opcode.rd)); } +#endif } -void CRecompilerOps::Compile_SPECIAL_SLTU (CCodeSection * m_Section) { - CPU_Message(" %X %s",m_Section->CompilePC,R4300iOpcodeName(Opcode.Hex,m_Section->CompilePC)); - if (Opcode.rd == 0) { return; } +void CRecompilerOps::SPECIAL_SLTU (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC)); + if (m_Opcode.rd == 0) { return; } - if (m_Section->IsKnown(Opcode.rt) && m_Section->IsKnown(Opcode.rs)) { - if (m_Section->IsConst(Opcode.rt) && m_Section->IsConst(Opcode.rs)) { - if (m_Section->Is64Bit(Opcode.rt) || m_Section->Is64Bit(Opcode.rs)) { + if (m_Section->IsKnown(m_Opcode.rt) && m_Section->IsKnown(m_Opcode.rs)) { + if (IsConst(m_Opcode.rt) && IsConst(m_Opcode.rs)) { + if (m_Section->Is64Bit(m_Opcode.rt) || m_Section->Is64Bit(m_Opcode.rs)) { #ifndef EXTERNAL_RELEASE DisplayError("1"); #endif - CRecompilerOps::Compile_UnknownOpcode(m_Section); + CRecompilerOps::UnknownOpcode(); } else { - if (m_Section->IsMapped(Opcode.rd)) { UnMap_GPR(m_Section,Opcode.rd, FALSE); } - m_Section->MipsRegState(Opcode.rd) = CRegInfo::STATE_CONST_32; - if (m_Section->MipsRegLo(Opcode.rs) < m_Section->MipsRegLo(Opcode.rt)) { - m_Section->MipsRegLo(Opcode.rd) = 1; + if (IsMapped(m_Opcode.rd)) { UnMap_GPR(m_Opcode.rd, FALSE); } + MipsRegState(m_Opcode.rd) = CRegInfo::STATE_CONST_32; + if (cMipsRegLo(m_Opcode.rs) < cMipsRegLo(m_Opcode.rt)) { + cMipsRegLo(m_Opcode.rd) = 1; } else { - m_Section->MipsRegLo(Opcode.rd) = 0; + cMipsRegLo(m_Opcode.rd) = 0; } } - } else if (m_Section->IsMapped(Opcode.rt) && m_Section->IsMapped(Opcode.rs)) { - ProtectGPR(m_Section,Opcode.rt); - ProtectGPR(m_Section,Opcode.rs); - if (m_Section->Is64Bit(Opcode.rt) || m_Section->Is64Bit(Opcode.rs)) { + } else if (IsMapped(m_Opcode.rt) && IsMapped(m_Opcode.rs)) { + ProtectGPR(m_Opcode.rt); + ProtectGPR(m_Opcode.rs); + if (m_Section->Is64Bit(m_Opcode.rt) || m_Section->Is64Bit(m_Opcode.rs)) { BYTE *Jump[2]; CompX86RegToX86Reg( - m_Section->Is64Bit(Opcode.rs)?m_Section->MipsRegHi(Opcode.rs):Map_TempReg(m_Section,x86_Any,Opcode.rs,TRUE), - m_Section->Is64Bit(Opcode.rt)?m_Section->MipsRegHi(Opcode.rt):Map_TempReg(m_Section,x86_Any,Opcode.rt,TRUE) + m_Section->Is64Bit(m_Opcode.rs)?MipsRegHi(m_Opcode.rs):m_Section->Map_TempReg(x86_Any,m_Opcode.rs,TRUE), + m_Section->Is64Bit(m_Opcode.rt)?MipsRegHi(m_Opcode.rt):m_Section->Map_TempReg(x86_Any,m_Opcode.rt,TRUE) ); JeLabel8("Low Compare",0); - Jump[0] = RecompPos - 1; + Jump[0] = m_RecompPos - 1; SetbVariable(&BranchCompare,"BranchCompare"); JmpLabel8("Continue",0); - Jump[1] = RecompPos - 1; + Jump[1] = m_RecompPos - 1; CPU_Message(""); CPU_Message(" Low Compare:"); - *((BYTE *)(Jump[0]))=(BYTE)(RecompPos - Jump[0] - 1); - CompX86RegToX86Reg(m_Section->MipsRegLo(Opcode.rs), m_Section->MipsRegLo(Opcode.rt)); + *((BYTE *)(Jump[0]))=(BYTE)(m_RecompPos - Jump[0] - 1); + CompX86RegToX86Reg(cMipsRegLo(m_Opcode.rs), cMipsRegLo(m_Opcode.rt)); SetbVariable(&BranchCompare,"BranchCompare"); CPU_Message(""); CPU_Message(" Continue:"); - *((BYTE *)(Jump[1]))=(BYTE)(RecompPos - Jump[1] - 1); - Map_GPR_32bit(m_Section,Opcode.rd,TRUE, -1); - MoveVariableToX86reg(&BranchCompare,"BranchCompare",m_Section->MipsRegLo(Opcode.rd)); + *((BYTE *)(Jump[1]))=(BYTE)(m_RecompPos - Jump[1] - 1); + Map_GPR_32bit(m_Opcode.rd,TRUE, -1); + MoveVariableToX86reg(&BranchCompare,"BranchCompare",cMipsRegLo(m_Opcode.rd)); } else { - CompX86RegToX86Reg(m_Section->MipsRegLo(Opcode.rs), m_Section->MipsRegLo(Opcode.rt)); + CompX86RegToX86Reg(cMipsRegLo(m_Opcode.rs), cMipsRegLo(m_Opcode.rt)); SetbVariable(&BranchCompare,"BranchCompare"); - Map_GPR_32bit(m_Section,Opcode.rd,TRUE, -1); - MoveVariableToX86reg(&BranchCompare,"BranchCompare",m_Section->MipsRegLo(Opcode.rd)); + Map_GPR_32bit(m_Opcode.rd,TRUE, -1); + MoveVariableToX86reg(&BranchCompare,"BranchCompare",cMipsRegLo(m_Opcode.rd)); } } else { - if (m_Section->Is64Bit(Opcode.rt) || m_Section->Is64Bit(Opcode.rs)) { + if (m_Section->Is64Bit(m_Opcode.rt) || m_Section->Is64Bit(m_Opcode.rs)) { DWORD MappedRegHi, MappedRegLo, ConstHi, ConstLo, MappedReg, ConstReg; BYTE *Jump[2]; - ConstReg = m_Section->IsConst(Opcode.rt)?Opcode.rt:Opcode.rs; - MappedReg = m_Section->IsConst(Opcode.rt)?Opcode.rs:Opcode.rt; + ConstReg = IsConst(m_Opcode.rt)?m_Opcode.rt:m_Opcode.rs; + MappedReg = IsConst(m_Opcode.rt)?m_Opcode.rs:m_Opcode.rt; - ConstLo = m_Section->MipsRegLo(ConstReg); + ConstLo = cMipsRegLo(ConstReg); ConstHi = (int)ConstLo >> 31; - if (m_Section->Is64Bit(ConstReg)) { ConstHi = m_Section->MipsRegHi(ConstReg); } + if (m_Section->Is64Bit(ConstReg)) { ConstHi = MipsRegHi(ConstReg); } - ProtectGPR(m_Section,MappedReg); - MappedRegLo = m_Section->MipsRegLo(MappedReg); - MappedRegHi = m_Section->MipsRegHi(MappedReg); + ProtectGPR(MappedReg); + MappedRegLo = cMipsRegLo(MappedReg); + MappedRegHi = MipsRegHi(MappedReg); if (m_Section->Is32Bit(MappedReg)) { - MappedRegHi = Map_TempReg(m_Section,x86_Any,MappedReg,TRUE); + MappedRegHi = m_Section->Map_TempReg(x86_Any,MappedReg,TRUE); } - Map_GPR_32bit(m_Section,Opcode.rd,TRUE, -1); + Map_GPR_32bit(m_Opcode.rd,TRUE, -1); CompConstToX86reg(MappedRegHi, ConstHi); JeLabel8("Low Compare",0); - Jump[0] = RecompPos - 1; - if (MappedReg == Opcode.rs) { + Jump[0] = m_RecompPos - 1; + if (MappedReg == m_Opcode.rs) { SetbVariable(&BranchCompare,"BranchCompare"); } else { SetaVariable(&BranchCompare,"BranchCompare"); } JmpLabel8("Continue",0); - Jump[1] = RecompPos - 1; + Jump[1] = m_RecompPos - 1; CPU_Message(""); CPU_Message(" Low Compare:"); - *((BYTE *)(Jump[0]))=(BYTE)(RecompPos - Jump[0] - 1); + *((BYTE *)(Jump[0]))=(BYTE)(m_RecompPos - Jump[0] - 1); CompConstToX86reg(MappedRegLo, ConstLo); - if (MappedReg == Opcode.rs) { + if (MappedReg == m_Opcode.rs) { SetbVariable(&BranchCompare,"BranchCompare"); } else { SetaVariable(&BranchCompare,"BranchCompare"); } CPU_Message(""); CPU_Message(" Continue:"); - *((BYTE *)(Jump[1]))=(BYTE)(RecompPos - Jump[1] - 1); - Map_GPR_32bit(m_Section,Opcode.rd,TRUE, -1); - MoveVariableToX86reg(&BranchCompare,"BranchCompare",m_Section->MipsRegLo(Opcode.rd)); + *((BYTE *)(Jump[1]))=(BYTE)(m_RecompPos - Jump[1] - 1); + Map_GPR_32bit(m_Opcode.rd,TRUE, -1); + MoveVariableToX86reg(&BranchCompare,"BranchCompare",cMipsRegLo(m_Opcode.rd)); } else { - DWORD Const = m_Section->IsConst(Opcode.rs)?m_Section->MipsRegLo(Opcode.rs):m_Section->MipsRegLo(Opcode.rt); - DWORD MappedReg = m_Section->IsConst(Opcode.rt)?Opcode.rs:Opcode.rt; + DWORD Const = IsConst(m_Opcode.rs)?cMipsRegLo(m_Opcode.rs):cMipsRegLo(m_Opcode.rt); + DWORD MappedReg = IsConst(m_Opcode.rt)?m_Opcode.rs:m_Opcode.rt; - CompConstToX86reg(m_Section->MipsRegLo(MappedReg), Const); - if (MappedReg == Opcode.rs) { + CompConstToX86reg(cMipsRegLo(MappedReg), Const); + if (MappedReg == m_Opcode.rs) { SetbVariable(&BranchCompare,"BranchCompare"); } else { SetaVariable(&BranchCompare,"BranchCompare"); } - Map_GPR_32bit(m_Section,Opcode.rd,TRUE, -1); - MoveVariableToX86reg(&BranchCompare,"BranchCompare",m_Section->MipsRegLo(Opcode.rd)); + Map_GPR_32bit(m_Opcode.rd,TRUE, -1); + MoveVariableToX86reg(&BranchCompare,"BranchCompare",cMipsRegLo(m_Opcode.rd)); } } - } else if (m_Section->IsKnown(Opcode.rt) || m_Section->IsKnown(Opcode.rs)) { - DWORD KnownReg = m_Section->IsKnown(Opcode.rt)?Opcode.rt:Opcode.rs; - DWORD UnknownReg = m_Section->IsKnown(Opcode.rt)?Opcode.rs:Opcode.rt; + } else if (m_Section->IsKnown(m_Opcode.rt) || m_Section->IsKnown(m_Opcode.rs)) { + DWORD KnownReg = m_Section->IsKnown(m_Opcode.rt)?m_Opcode.rt:m_Opcode.rs; + DWORD UnknownReg = m_Section->IsKnown(m_Opcode.rt)?m_Opcode.rs:m_Opcode.rt; BYTE *Jump[2]; - if (m_Section->IsConst(KnownReg)) { + if (IsConst(KnownReg)) { if (m_Section->Is64Bit(KnownReg)) { - CompConstToVariable(m_Section->MipsRegHi(KnownReg),&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg]); + CompConstToVariable(MipsRegHi(KnownReg),&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg]); } else { - CompConstToVariable(((int)m_Section->MipsRegLo(KnownReg) >> 31),&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg]); + CompConstToVariable(((int)cMipsRegLo(KnownReg) >> 31),&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg]); } } else { if (m_Section->Is64Bit(KnownReg)) { - CompX86regToVariable(m_Section->MipsRegHi(KnownReg),&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg]); + CompX86regToVariable(MipsRegHi(KnownReg),&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg]); } else { - ProtectGPR(m_Section,KnownReg); - CompX86regToVariable(Map_TempReg(m_Section,x86_Any,KnownReg,TRUE),&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg]); + ProtectGPR(KnownReg); + CompX86regToVariable(m_Section->Map_TempReg(x86_Any,KnownReg,TRUE),&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg]); } } JeLabel8("Low Compare",0); - Jump[0] = RecompPos - 1; - if (KnownReg == (m_Section->IsConst(KnownReg)?Opcode.rs:Opcode.rt)) { + Jump[0] = m_RecompPos - 1; + if (KnownReg == (IsConst(KnownReg)?m_Opcode.rs:m_Opcode.rt)) { SetaVariable(&BranchCompare,"BranchCompare"); } else { SetbVariable(&BranchCompare,"BranchCompare"); } JmpLabel8("Continue",0); - Jump[1] = RecompPos - 1; + Jump[1] = m_RecompPos - 1; CPU_Message(""); CPU_Message(" Low Compare:"); - *((BYTE *)(Jump[0]))=(BYTE)(RecompPos - Jump[0] - 1); - if (m_Section->IsConst(KnownReg)) { - CompConstToVariable(m_Section->MipsRegLo(KnownReg),&_GPR[UnknownReg].W[0],CRegName::GPR_Lo[UnknownReg]); + *((BYTE *)(Jump[0]))=(BYTE)(m_RecompPos - Jump[0] - 1); + if (IsConst(KnownReg)) { + CompConstToVariable(cMipsRegLo(KnownReg),&_GPR[UnknownReg].W[0],CRegName::GPR_Lo[UnknownReg]); } else { - CompX86regToVariable(m_Section->MipsRegLo(KnownReg),&_GPR[UnknownReg].W[0],CRegName::GPR_Lo[UnknownReg]); + CompX86regToVariable(cMipsRegMapLo(KnownReg),&_GPR[UnknownReg].W[0],CRegName::GPR_Lo[UnknownReg]); } - if (KnownReg == (m_Section->IsConst(KnownReg)?Opcode.rs:Opcode.rt)) { + if (KnownReg == (IsConst(KnownReg)?m_Opcode.rs:m_Opcode.rt)) { SetaVariable(&BranchCompare,"BranchCompare"); } else { SetbVariable(&BranchCompare,"BranchCompare"); } CPU_Message(""); CPU_Message(" Continue:"); - *((BYTE *)(Jump[1]))=(BYTE)(RecompPos - Jump[1] - 1); - Map_GPR_32bit(m_Section,Opcode.rd,TRUE, -1); - MoveVariableToX86reg(&BranchCompare,"BranchCompare",m_Section->MipsRegLo(Opcode.rd)); + *((BYTE *)(Jump[1]))=(BYTE)(m_RecompPos - Jump[1] - 1); + Map_GPR_32bit(m_Opcode.rd,TRUE, -1); + MoveVariableToX86reg(&BranchCompare,"BranchCompare",cMipsRegLo(m_Opcode.rd)); } else { BYTE *Jump[2]; int x86Reg; - x86Reg = Map_TempReg(m_Section,x86_Any,Opcode.rs,TRUE); - CompX86regToVariable(x86Reg,&_GPR[Opcode.rt].W[1],CRegName::GPR_Hi[Opcode.rt]); + x86Reg = m_Section->Map_TempReg(x86_Any,m_Opcode.rs,TRUE); + CompX86regToVariable(x86Reg,&_GPR[m_Opcode.rt].W[1],CRegName::GPR_Hi[m_Opcode.rt]); JeLabel8("Low Compare",0); - Jump[0] = RecompPos - 1; + Jump[0] = m_RecompPos - 1; SetbVariable(&BranchCompare,"BranchCompare"); JmpLabel8("Continue",0); - Jump[1] = RecompPos - 1; + Jump[1] = m_RecompPos - 1; CPU_Message(""); CPU_Message(" Low Compare:"); - *((BYTE *)(Jump[0]))=(BYTE)(RecompPos - Jump[0] - 1); - CompX86regToVariable(Map_TempReg(m_Section,x86Reg,Opcode.rs,FALSE),&_GPR[Opcode.rt].W[0],CRegName::GPR_Lo[Opcode.rt]); + *((BYTE *)(Jump[0]))=(BYTE)(m_RecompPos - Jump[0] - 1); + CompX86regToVariable(m_Section->Map_TempReg(x86Reg,m_Opcode.rs,FALSE),&_GPR[m_Opcode.rt].W[0],CRegName::GPR_Lo[m_Opcode.rt]); SetbVariable(&BranchCompare,"BranchCompare"); CPU_Message(""); CPU_Message(" Continue:"); - *((BYTE *)(Jump[1]))=(BYTE)(RecompPos - Jump[1] - 1); - Map_GPR_32bit(m_Section,Opcode.rd,TRUE, -1); - MoveVariableToX86reg(&BranchCompare,"BranchCompare",m_Section->MipsRegLo(Opcode.rd)); + *((BYTE *)(Jump[1]))=(BYTE)(m_RecompPos - Jump[1] - 1); + Map_GPR_32bit(m_Opcode.rd,TRUE, -1); + MoveVariableToX86reg(&BranchCompare,"BranchCompare",cMipsRegLo(m_Opcode.rd)); } +#endif } -void CRecompilerOps::Compile_SPECIAL_DADD (CCodeSection * m_Section) { - CPU_Message(" %X %s",m_Section->CompilePC,R4300iOpcodeName(Opcode.Hex,m_Section->CompilePC)); - if (Opcode.rd == 0) { return; } +void CRecompilerOps::SPECIAL_DADD (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC)); + if (m_Opcode.rd == 0) { return; } - if (m_Section->IsConst(Opcode.rt) && m_Section->IsConst(Opcode.rs)) { - if (m_Section->IsMapped(Opcode.rd)) { UnMap_GPR(m_Section,Opcode.rd, FALSE); } - m_Section->MipsReg(Opcode.rd) = - m_Section->Is64Bit(Opcode.rs)?m_Section->MipsReg(Opcode.rs):(_int64)m_Section->MipsRegLo_S(Opcode.rs) + - m_Section->Is64Bit(Opcode.rt)?m_Section->MipsReg(Opcode.rt):(_int64)m_Section->MipsRegLo_S(Opcode.rt); - if (m_Section->MipsRegLo_S(Opcode.rd) < 0 && m_Section->MipsRegHi_S(Opcode.rd) == -1){ - m_Section->MipsRegState(Opcode.rd) = CRegInfo::STATE_CONST_32; - } else if (m_Section->MipsRegLo_S(Opcode.rd) >= 0 && m_Section->MipsRegHi_S(Opcode.rd) == 0){ - m_Section->MipsRegState(Opcode.rd) = CRegInfo::STATE_CONST_32; + if (IsConst(m_Opcode.rt) && IsConst(m_Opcode.rs)) { + if (IsMapped(m_Opcode.rd)) { UnMap_GPR(m_Opcode.rd, FALSE); } + m_Section->MipsReg(m_Opcode.rd) = + m_Section->Is64Bit(m_Opcode.rs)?m_Section->MipsReg(m_Opcode.rs):(_int64)m_Section->MipsRegLo_S(m_Opcode.rs) + + m_Section->Is64Bit(m_Opcode.rt)?m_Section->MipsReg(m_Opcode.rt):(_int64)m_Section->MipsRegLo_S(m_Opcode.rt); + if (m_Section->MipsRegLo_S(m_Opcode.rd) < 0 && MipsRegHi_S(m_Opcode.rd) == -1){ + MipsRegState(m_Opcode.rd) = CRegInfo::STATE_CONST_32; + } else if (m_Section->MipsRegLo_S(m_Opcode.rd) >= 0 && MipsRegHi_S(m_Opcode.rd) == 0){ + MipsRegState(m_Opcode.rd) = CRegInfo::STATE_CONST_32; } else { - m_Section->MipsRegState(Opcode.rd) = CRegInfo::STATE_CONST_64; + MipsRegState(m_Opcode.rd) = CRegInfo::STATE_CONST_64; } } else { - int source1 = Opcode.rd == Opcode.rt?Opcode.rt:Opcode.rs; - int source2 = Opcode.rd == Opcode.rt?Opcode.rs:Opcode.rt; + int source1 = m_Opcode.rd == m_Opcode.rt?m_Opcode.rt:m_Opcode.rs; + int source2 = m_Opcode.rd == m_Opcode.rt?m_Opcode.rs:m_Opcode.rt; - Map_GPR_64bit(m_Section,Opcode.rd,source1); - if (m_Section->IsConst(source2)) { - AddConstToX86Reg(m_Section->MipsRegLo(Opcode.rd),m_Section->MipsRegLo(source2)); - AddConstToX86Reg(m_Section->MipsRegHi(Opcode.rd),m_Section->MipsRegHi(source2)); - } else if (m_Section->IsMapped(source2)) { - int HiReg = m_Section->Is64Bit(source2)?m_Section->MipsRegHi(source2):Map_TempReg(m_Section,x86_Any,source2,TRUE); - ProtectGPR(m_Section,source2); - AddX86RegToX86Reg(m_Section->MipsRegLo(Opcode.rd),m_Section->MipsRegLo(source2)); - AdcX86RegToX86Reg(m_Section->MipsRegHi(Opcode.rd),HiReg); + Map_GPR_64bit(m_Section,m_Opcode.rd,source1); + if (IsConst(source2)) { + AddConstToX86Reg(cMipsRegLo(m_Opcode.rd),cMipsRegLo(source2)); + AddConstToX86Reg(MipsRegHi(m_Opcode.rd),MipsRegHi(source2)); + } else if (IsMapped(source2)) { + int HiReg = m_Section->Is64Bit(source2)?MipsRegHi(source2):m_Section->Map_TempReg(x86_Any,source2,TRUE); + ProtectGPR(source2); + AddX86RegToX86Reg(cMipsRegLo(m_Opcode.rd),cMipsRegLo(source2)); + AdcX86RegToX86Reg(MipsRegHi(m_Opcode.rd),HiReg); } else { - AddVariableToX86reg(m_Section->MipsRegLo(Opcode.rd),&_GPR[source2].W[0],CRegName::GPR_Lo[source2]); - AdcVariableToX86reg(m_Section->MipsRegHi(Opcode.rd),&_GPR[source2].W[1],CRegName::GPR_Hi[source2]); + AddVariableToX86reg(cMipsRegLo(m_Opcode.rd),&_GPR[source2].W[0],CRegName::GPR_Lo[source2]); + AdcVariableToX86reg(MipsRegHi(m_Opcode.rd),&_GPR[source2].W[1],CRegName::GPR_Hi[source2]); } } +#endif } -void CRecompilerOps::Compile_SPECIAL_DADDU (CCodeSection * m_Section) { - CPU_Message(" %X %s",m_Section->CompilePC,R4300iOpcodeName(Opcode.Hex,m_Section->CompilePC)); - if (Opcode.rd == 0) { return; } +void CRecompilerOps::SPECIAL_DADDU (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC)); + if (m_Opcode.rd == 0) { return; } - if (m_Section->IsConst(Opcode.rt) && m_Section->IsConst(Opcode.rs)) { - __int64 ValRs = m_Section->Is64Bit(Opcode.rs)?m_Section->MipsReg(Opcode.rs):(_int64)m_Section->MipsRegLo_S(Opcode.rs); - __int64 ValRt = m_Section->Is64Bit(Opcode.rt)?m_Section->MipsReg(Opcode.rt):(_int64)m_Section->MipsRegLo_S(Opcode.rt); - if (m_Section->IsMapped(Opcode.rd)) { UnMap_GPR(m_Section,Opcode.rd, FALSE); } - m_Section->MipsReg(Opcode.rd) = ValRs + ValRt; - if ((m_Section->MipsRegHi(Opcode.rd) == 0) && (m_Section->MipsRegLo(Opcode.rd) & 0x80000000) == 0) { - m_Section->MipsRegState(Opcode.rd) = CRegInfo::STATE_CONST_32; - } else if ((m_Section->MipsRegHi(Opcode.rd) == 0xFFFFFFFF) && (m_Section->MipsRegLo(Opcode.rd) & 0x80000000) != 0) { - m_Section->MipsRegState(Opcode.rd) = CRegInfo::STATE_CONST_32; + if (IsConst(m_Opcode.rt) && IsConst(m_Opcode.rs)) { + __int64 ValRs = m_Section->Is64Bit(m_Opcode.rs)?m_Section->MipsReg(m_Opcode.rs):(_int64)m_Section->MipsRegLo_S(m_Opcode.rs); + __int64 ValRt = m_Section->Is64Bit(m_Opcode.rt)?m_Section->MipsReg(m_Opcode.rt):(_int64)m_Section->MipsRegLo_S(m_Opcode.rt); + if (IsMapped(m_Opcode.rd)) { UnMap_GPR(m_Opcode.rd, FALSE); } + m_Section->MipsReg(m_Opcode.rd) = ValRs + ValRt; + if ((MipsRegHi(m_Opcode.rd) == 0) && (cMipsRegLo(m_Opcode.rd) & 0x80000000) == 0) { + MipsRegState(m_Opcode.rd) = CRegInfo::STATE_CONST_32; + } else if ((MipsRegHi(m_Opcode.rd) == 0xFFFFFFFF) && (cMipsRegLo(m_Opcode.rd) & 0x80000000) != 0) { + MipsRegState(m_Opcode.rd) = CRegInfo::STATE_CONST_32; } else { - m_Section->MipsRegState(Opcode.rd) = CRegInfo::STATE_CONST_64; + MipsRegState(m_Opcode.rd) = CRegInfo::STATE_CONST_64; } } else { - int source1 = Opcode.rd == Opcode.rt?Opcode.rt:Opcode.rs; - int source2 = Opcode.rd == Opcode.rt?Opcode.rs:Opcode.rt; + int source1 = m_Opcode.rd == m_Opcode.rt?m_Opcode.rt:m_Opcode.rs; + int source2 = m_Opcode.rd == m_Opcode.rt?m_Opcode.rs:m_Opcode.rt; - Map_GPR_64bit(m_Section,Opcode.rd,source1); - if (m_Section->IsConst(source2)) { - AddConstToX86Reg(m_Section->MipsRegLo(Opcode.rd),m_Section->MipsRegLo(source2)); - AddConstToX86Reg(m_Section->MipsRegHi(Opcode.rd),m_Section->MipsRegHi(source2)); - } else if (m_Section->IsMapped(source2)) { - int HiReg = m_Section->Is64Bit(source2)?m_Section->MipsRegHi(source2):Map_TempReg(m_Section,x86_Any,source2,TRUE); - ProtectGPR(m_Section,source2); - AddX86RegToX86Reg(m_Section->MipsRegLo(Opcode.rd),m_Section->MipsRegLo(source2)); - AdcX86RegToX86Reg(m_Section->MipsRegHi(Opcode.rd),HiReg); + Map_GPR_64bit(m_Section,m_Opcode.rd,source1); + if (IsConst(source2)) { + AddConstToX86Reg(cMipsRegLo(m_Opcode.rd),cMipsRegLo(source2)); + AddConstToX86Reg(MipsRegHi(m_Opcode.rd),MipsRegHi(source2)); + } else if (IsMapped(source2)) { + int HiReg = m_Section->Is64Bit(source2)?MipsRegHi(source2):m_Section->Map_TempReg(x86_Any,source2,TRUE); + ProtectGPR(source2); + AddX86RegToX86Reg(cMipsRegLo(m_Opcode.rd),cMipsRegLo(source2)); + AdcX86RegToX86Reg(MipsRegHi(m_Opcode.rd),HiReg); } else { - AddVariableToX86reg(m_Section->MipsRegLo(Opcode.rd),&_GPR[source2].W[0],CRegName::GPR_Lo[source2]); - AdcVariableToX86reg(m_Section->MipsRegHi(Opcode.rd),&_GPR[source2].W[1],CRegName::GPR_Hi[source2]); + AddVariableToX86reg(cMipsRegLo(m_Opcode.rd),&_GPR[source2].W[0],CRegName::GPR_Lo[source2]); + AdcVariableToX86reg(MipsRegHi(m_Opcode.rd),&_GPR[source2].W[1],CRegName::GPR_Hi[source2]); } } +#endif } -void CRecompilerOps::Compile_SPECIAL_DSUB (CCodeSection * m_Section) { - CPU_Message(" %X %s",m_Section->CompilePC,R4300iOpcodeName(Opcode.Hex,m_Section->CompilePC)); - if (Opcode.rd == 0) { return; } +void CRecompilerOps::SPECIAL_DSUB (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC)); + if (m_Opcode.rd == 0) { return; } - if (m_Section->IsConst(Opcode.rt) && m_Section->IsConst(Opcode.rs)) { - if (m_Section->IsMapped(Opcode.rd)) { UnMap_GPR(m_Section,Opcode.rd, FALSE); } - m_Section->MipsReg(Opcode.rd) = - m_Section->Is64Bit(Opcode.rs)?m_Section->MipsReg(Opcode.rs):(_int64)m_Section->MipsRegLo_S(Opcode.rs) - - m_Section->Is64Bit(Opcode.rt)?m_Section->MipsReg(Opcode.rt):(_int64)m_Section->MipsRegLo_S(Opcode.rt); - if (m_Section->MipsRegLo_S(Opcode.rd) < 0 && m_Section->MipsRegHi_S(Opcode.rd) == -1){ - m_Section->MipsRegState(Opcode.rd) = CRegInfo::STATE_CONST_32; - } else if (m_Section->MipsRegLo_S(Opcode.rd) >= 0 && m_Section->MipsRegHi_S(Opcode.rd) == 0){ - m_Section->MipsRegState(Opcode.rd) = CRegInfo::STATE_CONST_32; + if (IsConst(m_Opcode.rt) && IsConst(m_Opcode.rs)) { + if (IsMapped(m_Opcode.rd)) { UnMap_GPR(m_Opcode.rd, FALSE); } + m_Section->MipsReg(m_Opcode.rd) = + m_Section->Is64Bit(m_Opcode.rs)?m_Section->MipsReg(m_Opcode.rs):(_int64)m_Section->MipsRegLo_S(m_Opcode.rs) - + m_Section->Is64Bit(m_Opcode.rt)?m_Section->MipsReg(m_Opcode.rt):(_int64)m_Section->MipsRegLo_S(m_Opcode.rt); + if (m_Section->MipsRegLo_S(m_Opcode.rd) < 0 && MipsRegHi_S(m_Opcode.rd) == -1){ + MipsRegState(m_Opcode.rd) = CRegInfo::STATE_CONST_32; + } else if (m_Section->MipsRegLo_S(m_Opcode.rd) >= 0 && MipsRegHi_S(m_Opcode.rd) == 0){ + MipsRegState(m_Opcode.rd) = CRegInfo::STATE_CONST_32; } else { - m_Section->MipsRegState(Opcode.rd) = CRegInfo::STATE_CONST_64; + MipsRegState(m_Opcode.rd) = CRegInfo::STATE_CONST_64; } } else { - if (Opcode.rd == Opcode.rt) { - int HiReg = Map_TempReg(m_Section,x86_Any,Opcode.rt,TRUE); - int LoReg = Map_TempReg(m_Section,x86_Any,Opcode.rt,FALSE); - Map_GPR_64bit(m_Section,Opcode.rd,Opcode.rs); - SubX86RegToX86Reg(m_Section->MipsRegLo(Opcode.rd),LoReg); - SbbX86RegToX86Reg(m_Section->MipsRegHi(Opcode.rd),HiReg); + if (m_Opcode.rd == m_Opcode.rt) { + int HiReg = m_Section->Map_TempReg(x86_Any,m_Opcode.rt,TRUE); + int LoReg = m_Section->Map_TempReg(x86_Any,m_Opcode.rt,FALSE); + Map_GPR_64bit(m_Section,m_Opcode.rd,m_Opcode.rs); + SubX86RegToX86Reg(cMipsRegLo(m_Opcode.rd),LoReg); + SbbX86RegToX86Reg(MipsRegHi(m_Opcode.rd),HiReg); return; } - Map_GPR_64bit(m_Section,Opcode.rd,Opcode.rs); - if (m_Section->IsConst(Opcode.rt)) { - SubConstFromX86Reg(m_Section->MipsRegLo(Opcode.rd),m_Section->MipsRegLo(Opcode.rt)); - SbbConstFromX86Reg(m_Section->MipsRegHi(Opcode.rd),m_Section->MipsRegHi(Opcode.rt)); - } else if (m_Section->IsMapped(Opcode.rt)) { - int HiReg = m_Section->Is64Bit(Opcode.rt)?m_Section->MipsRegHi(Opcode.rt):Map_TempReg(m_Section,x86_Any,Opcode.rt,TRUE); - ProtectGPR(m_Section,Opcode.rt); - SubX86RegToX86Reg(m_Section->MipsRegLo(Opcode.rd),m_Section->MipsRegLo(Opcode.rt)); - SbbX86RegToX86Reg(m_Section->MipsRegHi(Opcode.rd),HiReg); + Map_GPR_64bit(m_Section,m_Opcode.rd,m_Opcode.rs); + if (IsConst(m_Opcode.rt)) { + SubConstFromX86Reg(cMipsRegLo(m_Opcode.rd),cMipsRegLo(m_Opcode.rt)); + SbbConstFromX86Reg(MipsRegHi(m_Opcode.rd),MipsRegHi(m_Opcode.rt)); + } else if (IsMapped(m_Opcode.rt)) { + int HiReg = m_Section->Is64Bit(m_Opcode.rt)?MipsRegHi(m_Opcode.rt):m_Section->Map_TempReg(x86_Any,m_Opcode.rt,TRUE); + ProtectGPR(m_Opcode.rt); + SubX86RegToX86Reg(cMipsRegLo(m_Opcode.rd),cMipsRegLo(m_Opcode.rt)); + SbbX86RegToX86Reg(MipsRegHi(m_Opcode.rd),HiReg); } else { - SubVariableFromX86reg(m_Section->MipsRegLo(Opcode.rd),&_GPR[Opcode.rt].W[0],CRegName::GPR_Lo[Opcode.rt]); - SbbVariableFromX86reg(m_Section->MipsRegHi(Opcode.rd),&_GPR[Opcode.rt].W[1],CRegName::GPR_Hi[Opcode.rt]); + SubVariableFromX86reg(cMipsRegLo(m_Opcode.rd),&_GPR[m_Opcode.rt].W[0],CRegName::GPR_Lo[m_Opcode.rt]); + SbbVariableFromX86reg(MipsRegHi(m_Opcode.rd),&_GPR[m_Opcode.rt].W[1],CRegName::GPR_Hi[m_Opcode.rt]); } } +#endif } -void CRecompilerOps::Compile_SPECIAL_DSUBU (CCodeSection * m_Section) { - CPU_Message(" %X %s",m_Section->CompilePC,R4300iOpcodeName(Opcode.Hex,m_Section->CompilePC)); - if (Opcode.rd == 0) { return; } +void CRecompilerOps::SPECIAL_DSUBU (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC)); + if (m_Opcode.rd == 0) { return; } - if (m_Section->IsConst(Opcode.rt) && m_Section->IsConst(Opcode.rs)) { - if (m_Section->IsMapped(Opcode.rd)) { UnMap_GPR(m_Section,Opcode.rd, FALSE); } - m_Section->MipsReg(Opcode.rd) = - m_Section->Is64Bit(Opcode.rs)?m_Section->MipsReg(Opcode.rs):(_int64)m_Section->MipsRegLo_S(Opcode.rs) - - m_Section->Is64Bit(Opcode.rt)?m_Section->MipsReg(Opcode.rt):(_int64)m_Section->MipsRegLo_S(Opcode.rt); - if (m_Section->MipsRegLo_S(Opcode.rd) < 0 && m_Section->MipsRegHi_S(Opcode.rd) == -1){ - m_Section->MipsRegState(Opcode.rd) = CRegInfo::STATE_CONST_32; - } else if (m_Section->MipsRegLo_S(Opcode.rd) >= 0 && m_Section->MipsRegHi_S(Opcode.rd) == 0){ - m_Section->MipsRegState(Opcode.rd) = CRegInfo::STATE_CONST_32; + if (IsConst(m_Opcode.rt) && IsConst(m_Opcode.rs)) { + if (IsMapped(m_Opcode.rd)) { UnMap_GPR(m_Opcode.rd, FALSE); } + m_Section->MipsReg(m_Opcode.rd) = + m_Section->Is64Bit(m_Opcode.rs)?m_Section->MipsReg(m_Opcode.rs):(_int64)m_Section->MipsRegLo_S(m_Opcode.rs) - + m_Section->Is64Bit(m_Opcode.rt)?m_Section->MipsReg(m_Opcode.rt):(_int64)m_Section->MipsRegLo_S(m_Opcode.rt); + if (m_Section->MipsRegLo_S(m_Opcode.rd) < 0 && MipsRegHi_S(m_Opcode.rd) == -1){ + MipsRegState(m_Opcode.rd) = CRegInfo::STATE_CONST_32; + } else if (m_Section->MipsRegLo_S(m_Opcode.rd) >= 0 && MipsRegHi_S(m_Opcode.rd) == 0){ + MipsRegState(m_Opcode.rd) = CRegInfo::STATE_CONST_32; } else { - m_Section->MipsRegState(Opcode.rd) = CRegInfo::STATE_CONST_64; + MipsRegState(m_Opcode.rd) = CRegInfo::STATE_CONST_64; } } else { - if (Opcode.rd == Opcode.rt) { - int HiReg = Map_TempReg(m_Section,x86_Any,Opcode.rt,TRUE); - int LoReg = Map_TempReg(m_Section,x86_Any,Opcode.rt,FALSE); - Map_GPR_64bit(m_Section,Opcode.rd,Opcode.rs); - SubX86RegToX86Reg(m_Section->MipsRegLo(Opcode.rd),LoReg); - SbbX86RegToX86Reg(m_Section->MipsRegHi(Opcode.rd),HiReg); + if (m_Opcode.rd == m_Opcode.rt) { + int HiReg = m_Section->Map_TempReg(x86_Any,m_Opcode.rt,TRUE); + int LoReg = m_Section->Map_TempReg(x86_Any,m_Opcode.rt,FALSE); + Map_GPR_64bit(m_Section,m_Opcode.rd,m_Opcode.rs); + SubX86RegToX86Reg(cMipsRegLo(m_Opcode.rd),LoReg); + SbbX86RegToX86Reg(MipsRegHi(m_Opcode.rd),HiReg); return; } - Map_GPR_64bit(m_Section,Opcode.rd,Opcode.rs); - if (m_Section->IsConst(Opcode.rt)) { - SubConstFromX86Reg(m_Section->MipsRegLo(Opcode.rd),m_Section->MipsRegLo(Opcode.rt)); - SbbConstFromX86Reg(m_Section->MipsRegHi(Opcode.rd),m_Section->MipsRegHi(Opcode.rt)); - } else if (m_Section->IsMapped(Opcode.rt)) { - int HiReg = m_Section->Is64Bit(Opcode.rt)?m_Section->MipsRegHi(Opcode.rt):Map_TempReg(m_Section,x86_Any,Opcode.rt,TRUE); - ProtectGPR(m_Section,Opcode.rt); - SubX86RegToX86Reg(m_Section->MipsRegLo(Opcode.rd),m_Section->MipsRegLo(Opcode.rt)); - SbbX86RegToX86Reg(m_Section->MipsRegHi(Opcode.rd),HiReg); + Map_GPR_64bit(m_Section,m_Opcode.rd,m_Opcode.rs); + if (IsConst(m_Opcode.rt)) { + SubConstFromX86Reg(cMipsRegLo(m_Opcode.rd),cMipsRegLo(m_Opcode.rt)); + SbbConstFromX86Reg(MipsRegHi(m_Opcode.rd),MipsRegHi(m_Opcode.rt)); + } else if (IsMapped(m_Opcode.rt)) { + int HiReg = m_Section->Is64Bit(m_Opcode.rt)?MipsRegHi(m_Opcode.rt):m_Section->Map_TempReg(x86_Any,m_Opcode.rt,TRUE); + ProtectGPR(m_Opcode.rt); + SubX86RegToX86Reg(cMipsRegLo(m_Opcode.rd),cMipsRegLo(m_Opcode.rt)); + SbbX86RegToX86Reg(MipsRegHi(m_Opcode.rd),HiReg); } else { - SubVariableFromX86reg(m_Section->MipsRegLo(Opcode.rd),&_GPR[Opcode.rt].W[0],CRegName::GPR_Lo[Opcode.rt]); - SbbVariableFromX86reg(m_Section->MipsRegHi(Opcode.rd),&_GPR[Opcode.rt].W[1],CRegName::GPR_Hi[Opcode.rt]); + SubVariableFromX86reg(cMipsRegLo(m_Opcode.rd),&_GPR[m_Opcode.rt].W[0],CRegName::GPR_Lo[m_Opcode.rt]); + SbbVariableFromX86reg(MipsRegHi(m_Opcode.rd),&_GPR[m_Opcode.rt].W[1],CRegName::GPR_Hi[m_Opcode.rt]); } } +#endif } -void CRecompilerOps::Compile_SPECIAL_DSLL (CCodeSection * m_Section) { - CPU_Message(" %X %s",m_Section->CompilePC,R4300iOpcodeName(Opcode.Hex,m_Section->CompilePC)); +void CRecompilerOps::SPECIAL_DSLL (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC)); - if (Opcode.rd == 0) { return; } - if (m_Section->IsConst(Opcode.rt)) { - if (m_Section->IsMapped(Opcode.rd)) { UnMap_GPR(m_Section,Opcode.rd, FALSE); } + if (m_Opcode.rd == 0) { return; } + if (IsConst(m_Opcode.rt)) { + if (IsMapped(m_Opcode.rd)) { UnMap_GPR(m_Opcode.rd, FALSE); } - m_Section->MipsReg(Opcode.rd) = m_Section->Is64Bit(Opcode.rt)?m_Section->MipsReg(Opcode.rt):(_int64)m_Section->MipsRegLo_S(Opcode.rt) << Opcode.sa; - if (m_Section->MipsRegLo_S(Opcode.rd) < 0 && m_Section->MipsRegHi_S(Opcode.rd) == -1){ - m_Section->MipsRegState(Opcode.rd) = CRegInfo::STATE_CONST_32; - } else if (m_Section->MipsRegLo_S(Opcode.rd) >= 0 && m_Section->MipsRegHi_S(Opcode.rd) == 0){ - m_Section->MipsRegState(Opcode.rd) = CRegInfo::STATE_CONST_32; + m_Section->MipsReg(m_Opcode.rd) = m_Section->Is64Bit(m_Opcode.rt)?m_Section->MipsReg(m_Opcode.rt):(_int64)m_Section->MipsRegLo_S(m_Opcode.rt) << m_Opcode.sa; + if (m_Section->MipsRegLo_S(m_Opcode.rd) < 0 && MipsRegHi_S(m_Opcode.rd) == -1){ + MipsRegState(m_Opcode.rd) = CRegInfo::STATE_CONST_32; + } else if (m_Section->MipsRegLo_S(m_Opcode.rd) >= 0 && MipsRegHi_S(m_Opcode.rd) == 0){ + MipsRegState(m_Opcode.rd) = CRegInfo::STATE_CONST_32; } else { - m_Section->MipsRegState(Opcode.rd) = CRegInfo::STATE_CONST_64; + MipsRegState(m_Opcode.rd) = CRegInfo::STATE_CONST_64; } return; } - Map_GPR_64bit(m_Section,Opcode.rd,Opcode.rt); - ShiftLeftDoubleImmed(m_Section->MipsRegHi(Opcode.rd),m_Section->MipsRegLo(Opcode.rd),(BYTE)Opcode.sa); - ShiftLeftSignImmed( m_Section->MipsRegLo(Opcode.rd),(BYTE)Opcode.sa); + Map_GPR_64bit(m_Section,m_Opcode.rd,m_Opcode.rt); + ShiftLeftDoubleImmed(MipsRegHi(m_Opcode.rd),cMipsRegLo(m_Opcode.rd),(BYTE)m_Opcode.sa); + ShiftLeftSignImmed( cMipsRegLo(m_Opcode.rd),(BYTE)m_Opcode.sa); +#endif } -void CRecompilerOps::Compile_SPECIAL_DSRL (CCodeSection * m_Section) { - CPU_Message(" %X %s",m_Section->CompilePC,R4300iOpcodeName(Opcode.Hex,m_Section->CompilePC)); +void CRecompilerOps::SPECIAL_DSRL (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC)); - if (Opcode.rd == 0) { return; } - if (m_Section->IsConst(Opcode.rt)) { - if (m_Section->IsMapped(Opcode.rd)) { UnMap_GPR(m_Section,Opcode.rd, FALSE); } + if (m_Opcode.rd == 0) { return; } + if (IsConst(m_Opcode.rt)) { + if (IsMapped(m_Opcode.rd)) { UnMap_GPR(m_Opcode.rd, FALSE); } - m_Section->MipsReg(Opcode.rd) = m_Section->Is64Bit(Opcode.rt)?m_Section->MipsReg(Opcode.rt):(QWORD)m_Section->MipsRegLo_S(Opcode.rt) >> Opcode.sa; - if (m_Section->MipsRegLo_S(Opcode.rd) < 0 && m_Section->MipsRegHi_S(Opcode.rd) == -1){ - m_Section->MipsRegState(Opcode.rd) = CRegInfo::STATE_CONST_32; - } else if (m_Section->MipsRegLo_S(Opcode.rd) >= 0 && m_Section->MipsRegHi_S(Opcode.rd) == 0){ - m_Section->MipsRegState(Opcode.rd) = CRegInfo::STATE_CONST_32; + m_Section->MipsReg(m_Opcode.rd) = m_Section->Is64Bit(m_Opcode.rt)?m_Section->MipsReg(m_Opcode.rt):(QWORD)m_Section->MipsRegLo_S(m_Opcode.rt) >> m_Opcode.sa; + if (m_Section->MipsRegLo_S(m_Opcode.rd) < 0 && MipsRegHi_S(m_Opcode.rd) == -1){ + MipsRegState(m_Opcode.rd) = CRegInfo::STATE_CONST_32; + } else if (m_Section->MipsRegLo_S(m_Opcode.rd) >= 0 && MipsRegHi_S(m_Opcode.rd) == 0){ + MipsRegState(m_Opcode.rd) = CRegInfo::STATE_CONST_32; } else { - m_Section->MipsRegState(Opcode.rd) = CRegInfo::STATE_CONST_64; + MipsRegState(m_Opcode.rd) = CRegInfo::STATE_CONST_64; } return; } - Map_GPR_64bit(m_Section,Opcode.rd,Opcode.rt); - ShiftRightDoubleImmed(m_Section->MipsRegLo(Opcode.rd),m_Section->MipsRegHi(Opcode.rd),(BYTE)Opcode.sa); - ShiftRightUnsignImmed(m_Section->MipsRegHi(Opcode.rd),(BYTE)Opcode.sa); + Map_GPR_64bit(m_Section,m_Opcode.rd,m_Opcode.rt); + ShiftRightDoubleImmed(cMipsRegLo(m_Opcode.rd),MipsRegHi(m_Opcode.rd),(BYTE)m_Opcode.sa); + ShiftRightUnsignImmed(MipsRegHi(m_Opcode.rd),(BYTE)m_Opcode.sa); +#endif } -void CRecompilerOps::Compile_SPECIAL_DSRA (CCodeSection * m_Section) { - CPU_Message(" %X %s",m_Section->CompilePC,R4300iOpcodeName(Opcode.Hex,m_Section->CompilePC)); +void CRecompilerOps::SPECIAL_DSRA (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC)); - if (Opcode.rd == 0) { return; } - if (m_Section->IsConst(Opcode.rt)) { - if (m_Section->IsMapped(Opcode.rd)) { UnMap_GPR(m_Section,Opcode.rd, FALSE); } + if (m_Opcode.rd == 0) { return; } + if (IsConst(m_Opcode.rt)) { + if (IsMapped(m_Opcode.rd)) { UnMap_GPR(m_Opcode.rd, FALSE); } - m_Section->MipsReg_S(Opcode.rd) = m_Section->Is64Bit(Opcode.rt)?m_Section->MipsReg_S(Opcode.rt):(_int64)m_Section->MipsRegLo_S(Opcode.rt) >> Opcode.sa; - if (m_Section->MipsRegLo_S(Opcode.rd) < 0 && m_Section->MipsRegHi_S(Opcode.rd) == -1){ - m_Section->MipsRegState(Opcode.rd) = CRegInfo::STATE_CONST_32; - } else if (m_Section->MipsRegLo_S(Opcode.rd) >= 0 && m_Section->MipsRegHi_S(Opcode.rd) == 0){ - m_Section->MipsRegState(Opcode.rd) = CRegInfo::STATE_CONST_32; + m_Section->MipsReg_S(m_Opcode.rd) = m_Section->Is64Bit(m_Opcode.rt)?m_Section->MipsReg_S(m_Opcode.rt):(_int64)m_Section->MipsRegLo_S(m_Opcode.rt) >> m_Opcode.sa; + if (m_Section->MipsRegLo_S(m_Opcode.rd) < 0 && MipsRegHi_S(m_Opcode.rd) == -1){ + MipsRegState(m_Opcode.rd) = CRegInfo::STATE_CONST_32; + } else if (m_Section->MipsRegLo_S(m_Opcode.rd) >= 0 && MipsRegHi_S(m_Opcode.rd) == 0){ + MipsRegState(m_Opcode.rd) = CRegInfo::STATE_CONST_32; } else { - m_Section->MipsRegState(Opcode.rd) = CRegInfo::STATE_CONST_64; + MipsRegState(m_Opcode.rd) = CRegInfo::STATE_CONST_64; } return; } - Map_GPR_64bit(m_Section,Opcode.rd,Opcode.rt); - ShiftRightDoubleImmed(m_Section->MipsRegLo(Opcode.rd),m_Section->MipsRegHi(Opcode.rd),(BYTE)Opcode.sa); - ShiftRightSignImmed(m_Section->MipsRegHi(Opcode.rd),(BYTE)Opcode.sa); + Map_GPR_64bit(m_Section,m_Opcode.rd,m_Opcode.rt); + ShiftRightDoubleImmed(cMipsRegLo(m_Opcode.rd),MipsRegHi(m_Opcode.rd),(BYTE)m_Opcode.sa); + ShiftRightSignImmed(MipsRegHi(m_Opcode.rd),(BYTE)m_Opcode.sa); +#endif } -void CRecompilerOps::Compile_SPECIAL_DSLL32 (CCodeSection * m_Section) { - CPU_Message(" %X %s",m_Section->CompilePC,R4300iOpcodeName(Opcode.Hex,m_Section->CompilePC)); +void CRecompilerOps::SPECIAL_DSLL32 (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC)); - if (Opcode.rd == 0) { return; } - if (m_Section->IsConst(Opcode.rt)) { - if (Opcode.rt != Opcode.rd) { UnMap_GPR(m_Section,Opcode.rd, FALSE); } - m_Section->MipsRegHi(Opcode.rd) = m_Section->MipsRegLo(Opcode.rt) << Opcode.sa; - m_Section->MipsRegLo(Opcode.rd) = 0; - if (m_Section->MipsRegLo_S(Opcode.rd) < 0 && m_Section->MipsRegHi_S(Opcode.rd) == -1){ - m_Section->MipsRegState(Opcode.rd) = CRegInfo::STATE_CONST_32; - } else if (m_Section->MipsRegLo_S(Opcode.rd) >= 0 && m_Section->MipsRegHi_S(Opcode.rd) == 0){ - m_Section->MipsRegState(Opcode.rd) = CRegInfo::STATE_CONST_32; + if (m_Opcode.rd == 0) { return; } + if (IsConst(m_Opcode.rt)) { + if (m_Opcode.rt != m_Opcode.rd) { UnMap_GPR(m_Opcode.rd, FALSE); } + MipsRegHi(m_Opcode.rd) = cMipsRegLo(m_Opcode.rt) << m_Opcode.sa; + cMipsRegLo(m_Opcode.rd) = 0; + if (m_Section->MipsRegLo_S(m_Opcode.rd) < 0 && MipsRegHi_S(m_Opcode.rd) == -1){ + MipsRegState(m_Opcode.rd) = CRegInfo::STATE_CONST_32; + } else if (m_Section->MipsRegLo_S(m_Opcode.rd) >= 0 && MipsRegHi_S(m_Opcode.rd) == 0){ + MipsRegState(m_Opcode.rd) = CRegInfo::STATE_CONST_32; } else { - m_Section->MipsRegState(Opcode.rd) = CRegInfo::STATE_CONST_64; + MipsRegState(m_Opcode.rd) = CRegInfo::STATE_CONST_64; } - } else if (m_Section->IsMapped(Opcode.rt)) { - ProtectGPR(m_Section,Opcode.rt); - Map_GPR_64bit(m_Section,Opcode.rd,-1); - if (Opcode.rt != Opcode.rd) { - MoveX86RegToX86Reg(m_Section->MipsRegLo(Opcode.rt),m_Section->MipsRegHi(Opcode.rd)); + } else if (IsMapped(m_Opcode.rt)) { + ProtectGPR(m_Opcode.rt); + Map_GPR_64bit(m_Section,m_Opcode.rd,-1); + if (m_Opcode.rt != m_Opcode.rd) { + MoveX86RegToX86Reg(cMipsRegLo(m_Opcode.rt),MipsRegHi(m_Opcode.rd)); } else { - int HiReg = m_Section->MipsRegHi(Opcode.rt); - m_Section->MipsRegHi(Opcode.rt) = m_Section->MipsRegLo(Opcode.rt); - m_Section->MipsRegLo(Opcode.rt) = HiReg; + int HiReg = MipsRegHi(m_Opcode.rt); + MipsRegHi(m_Opcode.rt) = cMipsRegLo(m_Opcode.rt); + cMipsRegLo(m_Opcode.rt) = HiReg; } - if ((BYTE)Opcode.sa != 0) { - ShiftLeftSignImmed(m_Section->MipsRegHi(Opcode.rd),(BYTE)Opcode.sa); + if ((BYTE)m_Opcode.sa != 0) { + ShiftLeftSignImmed(MipsRegHi(m_Opcode.rd),(BYTE)m_Opcode.sa); } - XorX86RegToX86Reg(m_Section->MipsRegLo(Opcode.rd),m_Section->MipsRegLo(Opcode.rd)); + XorX86RegToX86Reg(cMipsRegLo(m_Opcode.rd),cMipsRegLo(m_Opcode.rd)); } else { - Map_GPR_64bit(m_Section,Opcode.rd,-1); - MoveVariableToX86reg(&_GPR[Opcode.rt],CRegName::GPR_Hi[Opcode.rt],m_Section->MipsRegHi(Opcode.rd)); - if ((BYTE)Opcode.sa != 0) { - ShiftLeftSignImmed(m_Section->MipsRegHi(Opcode.rd),(BYTE)Opcode.sa); + Map_GPR_64bit(m_Section,m_Opcode.rd,-1); + MoveVariableToX86reg(&_GPR[m_Opcode.rt],CRegName::GPR_Hi[m_Opcode.rt],MipsRegHi(m_Opcode.rd)); + if ((BYTE)m_Opcode.sa != 0) { + ShiftLeftSignImmed(MipsRegHi(m_Opcode.rd),(BYTE)m_Opcode.sa); } - XorX86RegToX86Reg(m_Section->MipsRegLo(Opcode.rd),m_Section->MipsRegLo(Opcode.rd)); + XorX86RegToX86Reg(cMipsRegLo(m_Opcode.rd),cMipsRegLo(m_Opcode.rd)); } +#endif } -void CRecompilerOps::Compile_SPECIAL_DSRL32 (CCodeSection * m_Section) { - CPU_Message(" %X %s",m_Section->CompilePC,R4300iOpcodeName(Opcode.Hex,m_Section->CompilePC)); - if (m_Section->IsConst(Opcode.rt)) { - if (Opcode.rt != Opcode.rd) { UnMap_GPR(m_Section,Opcode.rd, FALSE); } - m_Section->MipsRegState(Opcode.rd) = CRegInfo::STATE_CONST_32; - m_Section->MipsRegLo(Opcode.rd) = (DWORD)(m_Section->MipsReg(Opcode.rt) >> (Opcode.sa + 32)); - } else if (m_Section->IsMapped(Opcode.rt)) { - ProtectGPR(m_Section,Opcode.rt); - if (m_Section->Is64Bit(Opcode.rt)) { - if (Opcode.rt == Opcode.rd) { - int HiReg = m_Section->MipsRegHi(Opcode.rt); - m_Section->MipsRegHi(Opcode.rt) = m_Section->MipsRegLo(Opcode.rt); - m_Section->MipsRegLo(Opcode.rt) = HiReg; - Map_GPR_32bit(m_Section,Opcode.rd,FALSE,-1); +void CRecompilerOps::SPECIAL_DSRL32 (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC)); + if (IsConst(m_Opcode.rt)) { + if (m_Opcode.rt != m_Opcode.rd) { UnMap_GPR(m_Opcode.rd, FALSE); } + MipsRegState(m_Opcode.rd) = CRegInfo::STATE_CONST_32; + cMipsRegLo(m_Opcode.rd) = (DWORD)(m_Section->MipsReg(m_Opcode.rt) >> (m_Opcode.sa + 32)); + } else if (IsMapped(m_Opcode.rt)) { + ProtectGPR(m_Opcode.rt); + if (m_Section->Is64Bit(m_Opcode.rt)) { + if (m_Opcode.rt == m_Opcode.rd) { + int HiReg = MipsRegHi(m_Opcode.rt); + MipsRegHi(m_Opcode.rt) = cMipsRegLo(m_Opcode.rt); + cMipsRegLo(m_Opcode.rt) = HiReg; + Map_GPR_32bit(m_Opcode.rd,FALSE,-1); } else { - Map_GPR_32bit(m_Section,Opcode.rd,FALSE,-1); - MoveX86RegToX86Reg(m_Section->MipsRegHi(Opcode.rt),m_Section->MipsRegLo(Opcode.rd)); + Map_GPR_32bit(m_Opcode.rd,FALSE,-1); + MoveX86RegToX86Reg(MipsRegHi(m_Opcode.rt),cMipsRegLo(m_Opcode.rd)); } - if ((BYTE)Opcode.sa != 0) { - ShiftRightUnsignImmed(m_Section->MipsRegLo(Opcode.rd),(BYTE)Opcode.sa); + if ((BYTE)m_Opcode.sa != 0) { + ShiftRightUnsignImmed(cMipsRegLo(m_Opcode.rd),(BYTE)m_Opcode.sa); } } else { - CRecompilerOps::Compile_UnknownOpcode(m_Section); + CRecompilerOps::UnknownOpcode(); } } else { - Map_GPR_32bit(m_Section,Opcode.rd,FALSE,-1); - MoveVariableToX86reg(&_GPR[Opcode.rt].UW[1],CRegName::GPR_Lo[Opcode.rt],m_Section->MipsRegLo(Opcode.rd)); - if ((BYTE)Opcode.sa != 0) { - ShiftRightUnsignImmed(m_Section->MipsRegLo(Opcode.rd),(BYTE)Opcode.sa); + Map_GPR_32bit(m_Opcode.rd,FALSE,-1); + MoveVariableToX86reg(&_GPR[m_Opcode.rt].UW[1],CRegName::GPR_Lo[m_Opcode.rt],cMipsRegLo(m_Opcode.rd)); + if ((BYTE)m_Opcode.sa != 0) { + ShiftRightUnsignImmed(cMipsRegLo(m_Opcode.rd),(BYTE)m_Opcode.sa); } } +#endif } -void CRecompilerOps::Compile_SPECIAL_DSRA32 (CCodeSection * m_Section) { - CPU_Message(" %X %s",m_Section->CompilePC,R4300iOpcodeName(Opcode.Hex,m_Section->CompilePC)); - if (m_Section->IsConst(Opcode.rt)) { - if (Opcode.rt != Opcode.rd) { UnMap_GPR(m_Section,Opcode.rd, FALSE); } - m_Section->MipsRegState(Opcode.rd) = CRegInfo::STATE_CONST_32; - m_Section->MipsRegLo(Opcode.rd) = (DWORD)(m_Section->MipsReg_S(Opcode.rt) >> (Opcode.sa + 32)); - } else if (m_Section->IsMapped(Opcode.rt)) { - ProtectGPR(m_Section,Opcode.rt); - if (m_Section->Is64Bit(Opcode.rt)) { - if (Opcode.rt == Opcode.rd) { - int HiReg = m_Section->MipsRegHi(Opcode.rt); - m_Section->MipsRegHi(Opcode.rt) = m_Section->MipsRegLo(Opcode.rt); - m_Section->MipsRegLo(Opcode.rt) = HiReg; - Map_GPR_32bit(m_Section,Opcode.rd,TRUE,-1); +void CRecompilerOps::SPECIAL_DSRA32 (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC)); + if (IsConst(m_Opcode.rt)) { + if (m_Opcode.rt != m_Opcode.rd) { UnMap_GPR(m_Opcode.rd, FALSE); } + MipsRegState(m_Opcode.rd) = CRegInfo::STATE_CONST_32; + cMipsRegLo(m_Opcode.rd) = (DWORD)(m_Section->MipsReg_S(m_Opcode.rt) >> (m_Opcode.sa + 32)); + } else if (IsMapped(m_Opcode.rt)) { + ProtectGPR(m_Opcode.rt); + if (m_Section->Is64Bit(m_Opcode.rt)) { + if (m_Opcode.rt == m_Opcode.rd) { + int HiReg = MipsRegHi(m_Opcode.rt); + MipsRegHi(m_Opcode.rt) = cMipsRegLo(m_Opcode.rt); + cMipsRegLo(m_Opcode.rt) = HiReg; + Map_GPR_32bit(m_Opcode.rd,TRUE,-1); } else { - Map_GPR_32bit(m_Section,Opcode.rd,TRUE,-1); - MoveX86RegToX86Reg(m_Section->MipsRegHi(Opcode.rt),m_Section->MipsRegLo(Opcode.rd)); + Map_GPR_32bit(m_Opcode.rd,TRUE,-1); + MoveX86RegToX86Reg(MipsRegHi(m_Opcode.rt),cMipsRegLo(m_Opcode.rd)); } - if ((BYTE)Opcode.sa != 0) { - ShiftRightSignImmed(m_Section->MipsRegLo(Opcode.rd),(BYTE)Opcode.sa); + if ((BYTE)m_Opcode.sa != 0) { + ShiftRightSignImmed(cMipsRegLo(m_Opcode.rd),(BYTE)m_Opcode.sa); } } else { - CRecompilerOps::Compile_UnknownOpcode(m_Section); + CRecompilerOps::UnknownOpcode(); } } else { - Map_GPR_32bit(m_Section,Opcode.rd,TRUE,-1); - MoveVariableToX86reg(&_GPR[Opcode.rt].UW[1],CRegName::GPR_Lo[Opcode.rt],m_Section->MipsRegLo(Opcode.rd)); - if ((BYTE)Opcode.sa != 0) { - ShiftRightSignImmed(m_Section->MipsRegLo(Opcode.rd),(BYTE)Opcode.sa); + Map_GPR_32bit(m_Opcode.rd,TRUE,-1); + MoveVariableToX86reg(&_GPR[m_Opcode.rt].UW[1],CRegName::GPR_Lo[m_Opcode.rt],cMipsRegLo(m_Opcode.rd)); + if ((BYTE)m_Opcode.sa != 0) { + ShiftRightSignImmed(cMipsRegLo(m_Opcode.rd),(BYTE)m_Opcode.sa); } } +#endif } /************************** COP0 functions **************************/ -void CRecompilerOps::Compile_COP0_MF(CCodeSection * m_Section) { - CPU_Message(" %X %s",m_Section->CompilePC,R4300iOpcodeName(Opcode.Hex,m_Section->CompilePC)); +void CRecompilerOps::COP0_MF(void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC)); - switch (Opcode.rd) { + switch (m_Opcode.rd) { case 9: //Count - _N64System->GetRecompiler()->UpdateCounters(&m_Section->BlockCycleCount(),&m_Section->BlockRandomModifier(),FALSE); - m_Section->BlockCycleCount() = 0; - m_Section->BlockRandomModifier() = 0; + UpdateCounters(&m_RegWorkingSet.BlockCycleCount(),&m_RegWorkingSet.BlockRandomModifier(),FALSE); + m_RegWorkingSet.BlockCycleCount() = 0; + m_RegWorkingSet.BlockRandomModifier() = 0; } - Map_GPR_32bit(m_Section,Opcode.rt,TRUE,-1); - MoveVariableToX86reg(&_CP0[Opcode.rd],CRegName::Cop0[Opcode.rd],m_Section->MipsRegLo(Opcode.rt)); + Map_GPR_32bit(m_Opcode.rt,TRUE,-1); + MoveVariableToX86reg(&_CP0[m_Opcode.rd],CRegName::Cop0[m_Opcode.rd],cMipsRegLo(m_Opcode.rt)); +#endif } -void CRecompilerOps::Compile_COP0_MT (CCodeSection * m_Section) { - int OldStatusReg; +void ChangeCompareTimer (void) { + _SystemTimer->SetTimer(CSystemTimer::CompareTimer, _Reg->COMPARE_REGISTER - _Reg->COUNT_REGISTER,false); +} + +void CRecompilerOps::COP0_MT (void) { + CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC)); + BYTE *Jump; - CPU_Message(" %X %s",m_Section->CompilePC,R4300iOpcodeName(Opcode.Hex,m_Section->CompilePC)); - - switch (Opcode.rd) { + switch (m_Opcode.rd) { case 0: //Index case 2: //EntryLo0 case 3: //EntryLo1 case 4: //Context case 5: //PageMask case 10: //Entry Hi - case 11: //Compare case 14: //EPC case 16: //Config case 18: //WatchLo @@ -4790,114 +4888,141 @@ void CRecompilerOps::Compile_COP0_MT (CCodeSection * m_Section) { case 28: //Tag lo case 29: //Tag Hi case 30: //ErrEPC - if (m_Section->IsConst(Opcode.rt)) { - MoveConstToVariable(m_Section->MipsRegLo(Opcode.rt), &_CP0[Opcode.rd], CRegName::Cop0[Opcode.rd]); - } else if (m_Section->IsMapped(Opcode.rt)) { - MoveX86regToVariable(m_Section->MipsRegLo(Opcode.rt), &_CP0[Opcode.rd], CRegName::Cop0[Opcode.rd]); + if (IsConst(m_Opcode.rt)) { + MoveConstToVariable(cMipsRegLo(m_Opcode.rt), &_CP0[m_Opcode.rd], CRegName::Cop0[m_Opcode.rd]); + } else if (IsMapped(m_Opcode.rt)) { + MoveX86regToVariable(cMipsRegMapLo(m_Opcode.rt), &_CP0[m_Opcode.rd], CRegName::Cop0[m_Opcode.rd]); } else { - MoveX86regToVariable(Map_TempReg(m_Section,x86_Any,Opcode.rt,FALSE), &_CP0[Opcode.rd], CRegName::Cop0[Opcode.rd]); + MoveX86regToVariable(Map_TempReg(x86_Any,m_Opcode.rt,FALSE), &_CP0[m_Opcode.rd], CRegName::Cop0[m_Opcode.rd]); } - switch (Opcode.rd) { - case 4: //Context - AndConstToVariable(0xFF800000,&_CP0[Opcode.rd], CRegName::Cop0[Opcode.rd]); - break; - case 11: //Compare - _N64System->GetRecompiler()->UpdateCounters(&m_Section->BlockCycleCount(),&m_Section->BlockRandomModifier(),FALSE); - m_Section->BlockCycleCount() = 0; - m_Section->BlockRandomModifier() = 0; - AndConstToVariable(~CAUSE_IP7,&_Reg->FAKE_CAUSE_REGISTER,"FAKE_CAUSE_REGISTER"); - Pushad(); - _Notify->BreakPoint(__FILE__,__LINE__); - //Call_Direct(ChangeCompareTimer,"ChangeCompareTimer"); - Popad(); + if (m_Opcode.rd == 4) //Context + { + AndConstToVariable(0xFF800000,&_CP0[m_Opcode.rd], CRegName::Cop0[m_Opcode.rd]); } break; - case 9: //Count - _N64System->GetRecompiler()->UpdateCounters(&m_Section->BlockCycleCount(),&m_Section->BlockRandomModifier(),FALSE); - m_Section->BlockCycleCount() = 0; - m_Section->BlockRandomModifier() = 0; - if (m_Section->IsConst(Opcode.rt)) { - MoveConstToVariable(m_Section->MipsRegLo(Opcode.rt), &_CP0[Opcode.rd], CRegName::Cop0[Opcode.rd]); - } else if (m_Section->IsMapped(Opcode.rt)) { - MoveX86regToVariable(m_Section->MipsRegLo(Opcode.rt), &_CP0[Opcode.rd], CRegName::Cop0[Opcode.rd]); + case 11: //Compare + UpdateCounters(m_RegWorkingSet,false,true); + Pushad(); + MoveConstToX86reg((DWORD)_SystemTimer,x86_ECX); + Call_Direct(AddressOf(CSystemTimer::UpdateTimers), "CSystemTimer::UpdateTimers"); + Popad(); + if (IsConst(m_Opcode.rt)) { + MoveConstToVariable(cMipsRegLo(m_Opcode.rt), &_CP0[m_Opcode.rd], CRegName::Cop0[m_Opcode.rd]); + } else if (IsMapped(m_Opcode.rt)) { + MoveX86regToVariable(cMipsRegMapLo(m_Opcode.rt), &_CP0[m_Opcode.rd], CRegName::Cop0[m_Opcode.rd]); } else { - MoveX86regToVariable(Map_TempReg(m_Section,x86_Any,Opcode.rt,FALSE), &_CP0[Opcode.rd], CRegName::Cop0[Opcode.rd]); + MoveX86regToVariable(Map_TempReg(x86_Any,m_Opcode.rt,FALSE), &_CP0[m_Opcode.rd], CRegName::Cop0[m_Opcode.rd]); + } + AndConstToVariable(~CAUSE_IP7,&_Reg->FAKE_CAUSE_REGISTER,"FAKE_CAUSE_REGISTER"); + Pushad(); + MoveConstToX86reg((DWORD)_SystemTimer,x86_ECX); + Call_Direct(AddressOf(CSystemTimer::UpdateCompareTimer), "CSystemTimer::UpdateCompareTimer"); + Popad(); + break; + case 9: //Count + UpdateCounters(m_RegWorkingSet,false,true); + Pushad(); + MoveConstToX86reg((DWORD)_SystemTimer,x86_ECX); + Call_Direct(AddressOf(CSystemTimer::UpdateTimers), "CSystemTimer::UpdateTimers"); + Popad(); + if (IsConst(m_Opcode.rt)) { + MoveConstToVariable(cMipsRegLo(m_Opcode.rt), &_CP0[m_Opcode.rd], CRegName::Cop0[m_Opcode.rd]); + } else if (IsMapped(m_Opcode.rt)) { + MoveX86regToVariable(cMipsRegMapLo(m_Opcode.rt), &_CP0[m_Opcode.rd], CRegName::Cop0[m_Opcode.rd]); + } else { + MoveX86regToVariable(m_Section->Map_TempReg(x86_Any,m_Opcode.rt,FALSE), &_CP0[m_Opcode.rd], CRegName::Cop0[m_Opcode.rd]); } Pushad(); - _Notify->BreakPoint(__FILE__,__LINE__); - //Call_Direct(ChangeCompareTimer,"ChangeCompareTimer"); + MoveConstToX86reg((DWORD)_SystemTimer,x86_ECX); + Call_Direct(AddressOf(CSystemTimer::UpdateCompareTimer), "CSystemTimer::UpdateCompareTimer"); Popad(); break; case 12: //Status - OldStatusReg = Map_TempReg(m_Section,x86_Any,-1,FALSE); - MoveVariableToX86reg(&_CP0[Opcode.rd],CRegName::Cop0[Opcode.rd],OldStatusReg); - if (m_Section->IsConst(Opcode.rt)) { - MoveConstToVariable(m_Section->MipsRegLo(Opcode.rt), &_CP0[Opcode.rd], CRegName::Cop0[Opcode.rd]); - } else if (m_Section->IsMapped(Opcode.rt)) { - MoveX86regToVariable(m_Section->MipsRegLo(Opcode.rt), &_CP0[Opcode.rd], CRegName::Cop0[Opcode.rd]); - } else { - MoveX86regToVariable(Map_TempReg(m_Section,x86_Any,Opcode.rt,FALSE), &_CP0[Opcode.rd], CRegName::Cop0[Opcode.rd]); + { + x86Reg OldStatusReg = m_Section->Map_TempReg(x86_Any,-1,FALSE); + MoveVariableToX86reg(&_CP0[m_Opcode.rd],CRegName::Cop0[m_Opcode.rd],OldStatusReg); + if (IsConst(m_Opcode.rt)) { + MoveConstToVariable(cMipsRegLo(m_Opcode.rt), &_CP0[m_Opcode.rd], CRegName::Cop0[m_Opcode.rd]); + } else if (IsMapped(m_Opcode.rt)) { + MoveX86regToVariable(cMipsRegMapLo(m_Opcode.rt), &_CP0[m_Opcode.rd], CRegName::Cop0[m_Opcode.rd]); + } else { + MoveX86regToVariable(m_Section->Map_TempReg(x86_Any,m_Opcode.rt,FALSE), &_CP0[m_Opcode.rd], CRegName::Cop0[m_Opcode.rd]); + } + XorVariableToX86reg(&_CP0[m_Opcode.rd], CRegName::Cop0[m_Opcode.rd],OldStatusReg); + TestConstToX86Reg(STATUS_FR,OldStatusReg); + JeLabel8("FpuFlagFine",0); + Jump = m_RecompPos - 1; + Pushad(); + Call_Direct(SetFpuLocations,"SetFpuLocations"); + Popad(); + *(BYTE *)(Jump)= (BYTE )(((BYTE )(m_RecompPos)) - (((BYTE )(Jump)) + 1)); + + //TestConstToX86Reg(STATUS_FR,OldStatusReg); + //BreakPoint(__FILE__,__LINE__); //_N64System->GetRecompiler()->CompileExit (m_Section,m_CompilePC+4,m_RegWorkingSet,ExitResetRecompCode,FALSE,JneLabel32); + Pushad(); + Call_Direct(CheckInterrupts,"CheckInterrupts"); + Popad(); } - XorVariableToX86reg(&_CP0[Opcode.rd], CRegName::Cop0[Opcode.rd],OldStatusReg); - TestConstToX86Reg(STATUS_FR,OldStatusReg); - JeLabel8("FpuFlagFine",0); - Jump = RecompPos - 1; - Pushad(); - Call_Direct(SetFpuLocations,"SetFpuLocations"); - Popad(); - *(BYTE *)(Jump)= (BYTE )(((BYTE )(RecompPos)) - (((BYTE )(Jump)) + 1)); - - //TestConstToX86Reg(STATUS_FR,OldStatusReg); - //BreakPoint(__FILE__,__LINE__); //_N64System->GetRecompiler()->CompileExit (m_Section,m_Section->CompilePC+4,m_Section->RegWorking,ExitResetRecompCode,FALSE,JneLabel32); - Pushad(); - Call_Direct(CheckInterrupts,"CheckInterrupts"); - Popad(); break; case 6: //Wired + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix Pushad(); - _N64System->GetRecompiler()->UpdateCounters(&m_Section->BlockCycleCount(),&m_Section->BlockRandomModifier(),FALSE); - m_Section->BlockCycleCount() = 0; - m_Section->BlockRandomModifier() = 0; + UpdateCounters(&m_RegWorkingSet.BlockCycleCount(),&m_RegWorkingSet.BlockRandomModifier(),FALSE); + m_RegWorkingSet.BlockCycleCount() = 0; + m_RegWorkingSet.BlockRandomModifier() = 0; Call_Direct(FixRandomReg,"FixRandomReg"); Popad(); - if (m_Section->IsConst(Opcode.rt)) { - MoveConstToVariable(m_Section->MipsRegLo(Opcode.rt), &_CP0[Opcode.rd], CRegName::Cop0[Opcode.rd]); - } else if (m_Section->IsMapped(Opcode.rt)) { - MoveX86regToVariable(m_Section->MipsRegLo(Opcode.rt), &_CP0[Opcode.rd], CRegName::Cop0[Opcode.rd]); + if (IsConst(m_Opcode.rt)) { + MoveConstToVariable(cMipsRegLo(m_Opcode.rt), &_CP0[m_Opcode.rd], CRegName::Cop0[m_Opcode.rd]); + } else if (IsMapped(m_Opcode.rt)) { + MoveX86regToVariable(cMipsRegLo(m_Opcode.rt), &_CP0[m_Opcode.rd], CRegName::Cop0[m_Opcode.rd]); } else { - MoveX86regToVariable(Map_TempReg(m_Section,x86_Any,Opcode.rt,FALSE), &_CP0[Opcode.rd], CRegName::Cop0[Opcode.rd]); + MoveX86regToVariable(m_Section->Map_TempReg(x86_Any,m_Opcode.rt,FALSE), &_CP0[m_Opcode.rd], CRegName::Cop0[m_Opcode.rd]); } +#endif break; case 13: //cause - if (m_Section->IsConst(Opcode.rt)) { - AndConstToVariable(0xFFFFCFF,&_CP0[Opcode.rd], CRegName::Cop0[Opcode.rd]); + if (IsConst(m_Opcode.rt)) { + AndConstToVariable(0xFFFFCFF,&_CP0[m_Opcode.rd], CRegName::Cop0[m_Opcode.rd]); #ifndef EXTERNAL_RELEASE - if ((m_Section->MipsRegLo(Opcode.rt) & 0x300) != 0 ){ DisplayError("Set IP0 or IP1"); } + if ((cMipsRegLo(m_Opcode.rt) & 0x300) != 0 ){ DisplayError("Set IP0 or IP1"); } #endif } else { - CRecompilerOps::Compile_UnknownOpcode(m_Section); + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + CRecompilerOps::UnknownOpcode(); +#endif } Pushad(); Call_Direct(CheckInterrupts,"CheckInterrupts"); Popad(); break; default: - CRecompilerOps::Compile_UnknownOpcode(m_Section); + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + CRecompilerOps::UnknownOpcode(); +#endif } } /************************** COP0 CO functions ***********************/ -void CRecompilerOps::Compile_COP0_CO_TLBR( CCodeSection * m_Section) { - CPU_Message(" %X %s",m_Section->CompilePC,R4300iOpcodeName(Opcode.Hex,m_Section->CompilePC)); - if (!UseTlb) { return; } +void CRecompilerOps::COP0_CO_TLBR( void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC)); + if (!g_UseTlb) { return; } Pushad(); Call_Direct(TLB_ReadEntry,"TLB_ReadEntry"); Popad(); +#endif } -void CRecompilerOps::Compile_COP0_CO_TLBWI( CCodeSection * m_Section) { - CPU_Message(" %X %s",m_Section->CompilePC,R4300iOpcodeName(Opcode.Hex,m_Section->CompilePC)); - if (!UseTlb) { return; } +void CRecompilerOps::COP0_CO_TLBWI( void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC)); + if (!g_UseTlb) { return; } Pushad(); PushImm32("FALSE",FALSE); MoveVariableToX86reg(&_Reg->INDEX_REGISTER,"INDEX_REGISTER",x86_ECX); @@ -4906,15 +5031,18 @@ void CRecompilerOps::Compile_COP0_CO_TLBWI( CCodeSection * m_Section) { Call_Direct(TLB_WriteEntry,"TLB_WriteEntry"); AddConstToX86Reg(x86_ESP,8); Popad(); +#endif } -void CRecompilerOps::Compile_COP0_CO_TLBWR( CCodeSection * m_Section) { - CPU_Message(" %X %s",m_Section->CompilePC,R4300iOpcodeName(Opcode.Hex,m_Section->CompilePC)); - if (!UseTlb) { return; } +void CRecompilerOps::COP0_CO_TLBWR( void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC)); + if (!g_UseTlb) { return; } - _N64System->GetRecompiler()->UpdateCounters(&m_Section->BlockCycleCount(),&m_Section->BlockRandomModifier(),FALSE); - m_Section->BlockCycleCount() = 0; - m_Section->BlockRandomModifier() = 0; + UpdateCounters(&m_RegWorkingSet.BlockCycleCount(),&m_RegWorkingSet.BlockRandomModifier(),FALSE); + m_RegWorkingSet.BlockCycleCount() = 0; + m_RegWorkingSet.BlockRandomModifier() = 0; Pushad(); Call_Direct(FixRandomReg,"FixRandomReg"); PushImm32("TRUE",TRUE); @@ -4924,19 +5052,25 @@ void CRecompilerOps::Compile_COP0_CO_TLBWR( CCodeSection * m_Section) { Call_Direct(TLB_WriteEntry,"TLB_WriteEntry"); AddConstToX86Reg(x86_ESP,8); Popad(); +#endif } -void CRecompilerOps::Compile_COP0_CO_TLBP( CCodeSection * m_Section) { - CPU_Message(" %X %s",m_Section->CompilePC,R4300iOpcodeName(Opcode.Hex,m_Section->CompilePC)); +void CRecompilerOps::COP0_CO_TLBP( void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC)); - if (!UseTlb) { return; } + if (!g_UseTlb) { return; } Pushad(); MoveConstToX86reg((DWORD)_TLB,x86_ECX); Call_Direct(AddressOf(CTLB::Probe), "CTLB::TLB_Probe"); Popad(); +#endif } void compiler_COP0_CO_ERET (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix if ((_Reg->STATUS_REGISTER & STATUS_ERL) != 0) { *_PROGRAM_COUNTER = _Reg->ERROREPC_REGISTER; _Reg->STATUS_REGISTER &= ~STATUS_ERL; @@ -4946,34 +5080,1372 @@ void compiler_COP0_CO_ERET (void) { } *_LLBit = 0; CheckInterrupts(); +#endif } -void CRecompilerOps::Compile_COP0_CO_ERET( CCodeSection * m_Section) { - CPU_Message(" %X %s",m_Section->CompilePC,R4300iOpcodeName(Opcode.Hex,m_Section->CompilePC)); +void CRecompilerOps::COP0_CO_ERET( void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC)); WriteBackRegisters(m_Section); Call_Direct(compiler_COP0_CO_ERET,"compiler_COP0_CO_ERET"); - _N64System->GetRecompiler()->CompileExit (m_Section,m_Section->CompilePC, (DWORD)-1,m_Section->RegWorking,CExitInfo::Normal,TRUE,NULL); - NextInstruction = END_BLOCK; + _N64System->GetRecompiler()->CompileExit (m_Section,m_CompilePC, (DWORD)-1,m_RegWorkingSet,CExitInfo::Normal,TRUE,NULL); + m_NextInstruction = END_BLOCK; +#endif +} + +/************************** FPU Options **************************/ +WORD FPU_RoundingMode = 0x0000;//_RC_NEAR +char Name[50]; + +void ChangeDefaultRoundingModel (void) { + switch((_FPCR[31] & 3)) { + case 0: FPU_RoundingMode = 0x0000; break; //_RC_NEAR + case 1: FPU_RoundingMode = 0x0C00; break; //_RC_CHOP + case 2: FPU_RoundingMode = 0x0800; break; //_RC_UP + case 3: FPU_RoundingMode = 0x0400; break; //_RC_UP + } +} + +void CompileCop1Test (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + if (Section->FpuBeenUsed()) { return; } + TestVariable(STATUS_CU1,&_Reg->STATUS_REGISTER,"STATUS_REGISTER"); + _N64System->GetRecompiler()->CompileExit(Section,Section->m_CompilePC,Section->m_CompilePC,Section->RegWorking,CExitInfo::COP1_Unuseable,FALSE,JeLabel32); + Section->FpuBeenUsed() = TRUE; +#endif +} + +/********************** Load/store functions ************************/ +void CRecompilerOps::LWC1 (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + DWORD TempReg1, TempReg2, TempReg3; + char Name[50]; + + CPU_Message(" %X %s",Section->m_CompilePC,R4300iOpcodeName(m_CompileOpcode.Hex,Section->m_CompilePC)); + + CompileCop1Test(Section); + if ((m_CompileOpcode.ft & 1) != 0) { + if (RegInStack(Section,m_CompileOpcode.ft-1,CRegInfo::FPU_Double) || RegInStack(Section,m_CompileOpcode.ft-1,CRegInfo::FPU_Qword)) { + UnMap_FPR(Section,m_CompileOpcode.ft-1,TRUE); + } + } + if (RegInStack(Section,m_CompileOpcode.ft,CRegInfo::FPU_Double) || RegInStack(Section,m_CompileOpcode.ft,CRegInfo::FPU_Qword)) { + UnMap_FPR(Section,m_CompileOpcode.ft,TRUE); + } else { + UnMap_FPR(Section,m_CompileOpcode.ft,FALSE); + } + if (Section->IsConst(m_CompileOpcode.base)) { + DWORD Address = Section->cMipsRegLo(m_CompileOpcode.base) + (short)m_CompileOpcode.offset; + + TempReg1 = Map_TempReg(Section,x86_Any,-1,FALSE); + _MMU->Compile_LW(Section, TempReg1,Address); + + TempReg2 = Map_TempReg(Section,x86_Any,-1,FALSE); + sprintf(Name,"_FPRFloatLocation[%d]",m_CompileOpcode.ft); + MoveVariableToX86reg(&_FPRFloatLocation[m_CompileOpcode.ft],Name,TempReg2); + MoveX86regToX86Pointer(TempReg1,TempReg2); + return; + } + if (Section->IsMapped(m_CompileOpcode.base) && m_CompileOpcode.offset == 0) { + if (g_UseTlb) { + ProtectGPR(Section,m_CompileOpcode.base); + TempReg1 = Section->cMipsRegLo(m_CompileOpcode.base); + } else { + TempReg1 = Map_TempReg(Section,x86_Any,m_CompileOpcode.base,FALSE); + } + } else { + if (Section->IsMapped(m_CompileOpcode.base)) { + ProtectGPR(Section,m_CompileOpcode.base); + if (m_CompileOpcode.offset != 0) { + TempReg1 = Map_TempReg(Section,x86_Any,-1,FALSE); + LeaSourceAndOffset(TempReg1,Section->cMipsRegLo(m_CompileOpcode.base),(short)m_CompileOpcode.offset); + } else { + TempReg1 = Map_TempReg(Section,x86_Any,m_CompileOpcode.base,FALSE); + } + UnProtectGPR(Section,m_CompileOpcode.base); + } else { + TempReg1 = Map_TempReg(Section,x86_Any,m_CompileOpcode.base,FALSE); + if (m_CompileOpcode.immediate == 0) { + } else if (m_CompileOpcode.immediate == 1) { + IncX86reg(TempReg1); + } else if (m_CompileOpcode.immediate == 0xFFFF) { + DecX86reg(TempReg1); + } else { + AddConstToX86Reg(TempReg1,(short)m_CompileOpcode.immediate); + } + } + } + TempReg2 = Map_TempReg(Section,x86_Any,-1,FALSE); + if (g_UseTlb) { + MoveX86RegToX86Reg(TempReg1, TempReg2); + ShiftRightUnsignImmed(TempReg2,12); + MoveVariableDispToX86Reg(TLB_ReadMap,"TLB_ReadMap",TempReg2,TempReg2,4); + CompileReadTLBMiss(Section,TempReg1,TempReg2); + + TempReg3 = Map_TempReg(Section,x86_Any,-1,FALSE); + MoveX86regPointerToX86reg(TempReg1, TempReg2,TempReg3); + } else { + AndConstToX86Reg(TempReg1,0x1FFFFFFF); + TempReg3 = Map_TempReg(Section,x86_Any,-1,FALSE); + MoveN64MemToX86reg(TempReg3,TempReg1); + } + sprintf(Name,"_FPRFloatLocation[%d]",m_CompileOpcode.ft); + MoveVariableToX86reg(&_FPRFloatLocation[m_CompileOpcode.ft],Name,TempReg2); + MoveX86regToX86Pointer(TempReg3,TempReg2); +#endif +} + +void CRecompilerOps::LDC1 (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + DWORD TempReg1, TempReg2, TempReg3; + + CPU_Message(" %X %s",Section->m_CompilePC,R4300iOpcodeName(m_CompileOpcode.Hex,Section->m_CompilePC)); + + CompileCop1Test(Section); + + UnMap_FPR(Section,m_CompileOpcode.ft,FALSE); + if (Section->IsConst(m_CompileOpcode.base)) { + DWORD Address = Section->cMipsRegLo(m_CompileOpcode.base) + (short)m_CompileOpcode.offset; + TempReg1 = Map_TempReg(Section,x86_Any,-1,FALSE); + _MMU->Compile_LW(Section, TempReg1,Address); + + TempReg2 = Map_TempReg(Section,x86_Any,-1,FALSE); + sprintf(Name,"_FPRDoubleLocation[%d]",m_CompileOpcode.ft); + MoveVariableToX86reg(&_FPRDoubleLocation[m_CompileOpcode.ft],Name,TempReg2); + AddConstToX86Reg(TempReg2,4); + MoveX86regToX86Pointer(TempReg1,TempReg2); + + _MMU->Compile_LW(Section,TempReg1,Address + 4); + sprintf(Name,"_FPRFloatLocation[%d]",m_CompileOpcode.ft); + MoveVariableToX86reg(&_FPRDoubleLocation[m_CompileOpcode.ft],Name,TempReg2); + MoveX86regToX86Pointer(TempReg1,TempReg2); + return; + } + if (Section->IsMapped(m_CompileOpcode.base) && m_CompileOpcode.offset == 0) { + if (g_UseTlb) { + ProtectGPR(Section,m_CompileOpcode.base); + TempReg1 = Section->cMipsRegLo(m_CompileOpcode.base); + } else { + TempReg1 = Map_TempReg(Section,x86_Any,m_CompileOpcode.base,FALSE); + } + } else { + if (Section->IsMapped(m_CompileOpcode.base)) { + ProtectGPR(Section,m_CompileOpcode.base); + if (m_CompileOpcode.offset != 0) { + TempReg1 = Map_TempReg(Section,x86_Any,-1,FALSE); + LeaSourceAndOffset(TempReg1,Section->cMipsRegLo(m_CompileOpcode.base),(short)m_CompileOpcode.offset); + } else { + TempReg1 = Map_TempReg(Section,x86_Any,m_CompileOpcode.base,FALSE); + } + } else { + TempReg1 = Map_TempReg(Section,x86_Any,m_CompileOpcode.base,FALSE); + if (m_CompileOpcode.immediate == 0) { + } else if (m_CompileOpcode.immediate == 1) { + IncX86reg(TempReg1); + } else if (m_CompileOpcode.immediate == 0xFFFF) { + DecX86reg(TempReg1); + } else { + AddConstToX86Reg(TempReg1,(short)m_CompileOpcode.immediate); + } + } + } + + TempReg2 = Map_TempReg(Section,x86_Any,-1,FALSE); + if (g_UseTlb) { + MoveX86RegToX86Reg(TempReg1, TempReg2); + ShiftRightUnsignImmed(TempReg2,12); + MoveVariableDispToX86Reg(TLB_ReadMap,"TLB_ReadMap",TempReg2,TempReg2,4); + CompileReadTLBMiss(Section,TempReg1,TempReg2); + TempReg3 = Map_TempReg(Section,x86_Any,-1,FALSE); + MoveX86regPointerToX86reg(TempReg1, TempReg2,TempReg3); + Push(TempReg2); + sprintf(Name,"_FPRFloatLocation[%d]",m_CompileOpcode.ft); + MoveVariableToX86reg(&_FPRDoubleLocation[m_CompileOpcode.ft],Name,TempReg2); + AddConstToX86Reg(TempReg2,4); + MoveX86regToX86Pointer(TempReg3,TempReg2); + Pop(TempReg2); + MoveX86regPointerToX86regDisp8(TempReg1, TempReg2,TempReg3,4); + sprintf(Name,"_FPRFloatLocation[%d]",m_CompileOpcode.ft); + MoveVariableToX86reg(&_FPRDoubleLocation[m_CompileOpcode.ft],Name,TempReg2); + MoveX86regToX86Pointer(TempReg3,TempReg2); + } else { + AndConstToX86Reg(TempReg1,0x1FFFFFFF); + TempReg3 = Map_TempReg(Section,x86_Any,-1,FALSE); + MoveN64MemToX86reg(TempReg3,TempReg1); + + sprintf(Name,"_FPRFloatLocation[%d]",m_CompileOpcode.ft); + MoveVariableToX86reg(&_FPRDoubleLocation[m_CompileOpcode.ft],Name,TempReg2); + AddConstToX86Reg(TempReg2,4); + MoveX86regToX86Pointer(TempReg3,TempReg2); + + MoveN64MemDispToX86reg(TempReg3,TempReg1,4); + sprintf(Name,"_FPRFloatLocation[%d]",m_CompileOpcode.ft); + MoveVariableToX86reg(&_FPRDoubleLocation[m_CompileOpcode.ft],Name,TempReg2); + MoveX86regToX86Pointer(TempReg3,TempReg2); + } +#endif +} + +void CRecompilerOps::SWC1 (void){ + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + DWORD TempReg1, TempReg2, TempReg3; + + CPU_Message(" %X %s",Section->m_CompilePC,R4300iOpcodeName(m_CompileOpcode.Hex,Section->m_CompilePC)); + + CompileCop1Test(Section); + + if (Section->IsConst(m_CompileOpcode.base)) { + DWORD Address = Section->cMipsRegLo(m_CompileOpcode.base) + (short)m_CompileOpcode.offset; + + UnMap_FPR(Section,m_CompileOpcode.ft,TRUE); + TempReg1 = Map_TempReg(Section,x86_Any,-1,FALSE); + + sprintf(Name,"_FPRFloatLocation[%d]",m_CompileOpcode.ft); + MoveVariableToX86reg(&_FPRFloatLocation[m_CompileOpcode.ft],Name,TempReg1); + MoveX86PointerToX86reg(TempReg1,TempReg1); + _MMU->Compile_SW_Register(Section,TempReg1, Address); + return; + } + if (Section->IsMapped(m_CompileOpcode.base)) { + ProtectGPR(Section,m_CompileOpcode.base); + if (m_CompileOpcode.offset != 0) { + TempReg1 = Map_TempReg(Section,x86_Any,-1,FALSE); + LeaSourceAndOffset(TempReg1,Section->cMipsRegLo(m_CompileOpcode.base),(short)m_CompileOpcode.offset); + } else { + TempReg1 = Map_TempReg(Section,x86_Any,m_CompileOpcode.base,FALSE); + } + } else { + TempReg1 = Map_TempReg(Section,x86_Any,m_CompileOpcode.base,FALSE); + if (m_CompileOpcode.immediate == 0) { + } else if (m_CompileOpcode.immediate == 1) { + IncX86reg(TempReg1); + } else if (m_CompileOpcode.immediate == 0xFFFF) { + DecX86reg(TempReg1); + } else { + AddConstToX86Reg(TempReg1,(short)m_CompileOpcode.immediate); + } + } + if (g_UseTlb) { + TempReg2 = Map_TempReg(Section,x86_Any,-1,FALSE); + MoveX86RegToX86Reg(TempReg1, TempReg2); + ShiftRightUnsignImmed(TempReg2,12); + MoveVariableDispToX86Reg(TLB_WriteMap,"TLB_WriteMap",TempReg2,TempReg2,4); + //For tlb miss + //0041C522 85 C0 test eax,eax + //0041C524 75 01 jne 0041C527 + + UnMap_FPR(Section,m_CompileOpcode.ft,TRUE); + TempReg3 = Map_TempReg(Section,x86_Any,-1,FALSE); + sprintf(Name,"_FPRFloatLocation[%d]",m_CompileOpcode.ft); + MoveVariableToX86reg(&_FPRFloatLocation[m_CompileOpcode.ft],Name,TempReg3); + MoveX86PointerToX86reg(TempReg3,TempReg3); + MoveX86regToX86regPointer(TempReg3,TempReg1, TempReg2); + } else { + TempReg2 = Map_TempReg(Section,x86_Any,-1,FALSE); + UnMap_FPR(Section,m_CompileOpcode.ft,TRUE); + sprintf(Name,"_FPRFloatLocation[%d]",m_CompileOpcode.ft); + MoveVariableToX86reg(&_FPRFloatLocation[m_CompileOpcode.ft],Name,TempReg2); + MoveX86PointerToX86reg(TempReg2,TempReg2); + AndConstToX86Reg(TempReg1,0x1FFFFFFF); + MoveX86regToN64Mem(TempReg2, TempReg1); + } +#endif +} + +void CRecompilerOps::SDC1 (void){ + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + DWORD TempReg1, TempReg2, TempReg3; + + CPU_Message(" %X %s",Section->m_CompilePC,R4300iOpcodeName(m_CompileOpcode.Hex,Section->m_CompilePC)); + + CompileCop1Test(Section); + + if (Section->IsConst(m_CompileOpcode.base)) { + DWORD Address = Section->cMipsRegLo(m_CompileOpcode.base) + (short)m_CompileOpcode.offset; + + TempReg1 = Map_TempReg(Section,x86_Any,-1,FALSE); + sprintf(Name,"_FPRDoubleLocation[%d]",m_CompileOpcode.ft); + MoveVariableToX86reg((BYTE *)&_FPRDoubleLocation[m_CompileOpcode.ft],Name,TempReg1); + AddConstToX86Reg(TempReg1,4); + MoveX86PointerToX86reg(TempReg1,TempReg1); + _MMU->Compile_SW_Register(Section,TempReg1, Address); + + sprintf(Name,"_FPRDoubleLocation[%d]",m_CompileOpcode.ft); + MoveVariableToX86reg(&_FPRDoubleLocation[m_CompileOpcode.ft],Name,TempReg1); + MoveX86PointerToX86reg(TempReg1,TempReg1); + _MMU->Compile_SW_Register(Section,TempReg1, Address + 4); + return; + } + if (Section->IsMapped(m_CompileOpcode.base)) { + ProtectGPR(Section,m_CompileOpcode.base); + if (m_CompileOpcode.offset != 0) { + TempReg1 = Map_TempReg(Section,x86_Any,-1,FALSE); + LeaSourceAndOffset(TempReg1,Section->cMipsRegLo(m_CompileOpcode.base),(short)m_CompileOpcode.offset); + } else { + TempReg1 = Map_TempReg(Section,x86_Any,m_CompileOpcode.base,FALSE); + } + } else { + TempReg1 = Map_TempReg(Section,x86_Any,m_CompileOpcode.base,FALSE); + if (m_CompileOpcode.immediate == 0) { + } else if (m_CompileOpcode.immediate == 1) { + IncX86reg(TempReg1); + } else if (m_CompileOpcode.immediate == 0xFFFF) { + DecX86reg(TempReg1); + } else { + AddConstToX86Reg(TempReg1,(short)m_CompileOpcode.immediate); + } + } + if (g_UseTlb) { + TempReg2 = Map_TempReg(Section,x86_Any,-1,FALSE); + MoveX86RegToX86Reg(TempReg1, TempReg2); + ShiftRightUnsignImmed(TempReg2,12); + MoveVariableDispToX86Reg(TLB_WriteMap,"TLB_WriteMap",TempReg2,TempReg2,4); + //For tlb miss + //0041C522 85 C0 test eax,eax + //0041C524 75 01 jne 0041C527 + + TempReg3 = Map_TempReg(Section,x86_Any,-1,FALSE); + sprintf(Name,"_FPRDoubleLocation[%d]",m_CompileOpcode.ft); + MoveVariableToX86reg((BYTE *)&_FPRDoubleLocation[m_CompileOpcode.ft],Name,TempReg3); + AddConstToX86Reg(TempReg3,4); + MoveX86PointerToX86reg(TempReg3,TempReg3); + MoveX86regToX86regPointer(TempReg3,TempReg1, TempReg2); + AddConstToX86Reg(TempReg1,4); + + sprintf(Name,"_FPRDoubleLocation[%d]",m_CompileOpcode.ft); + MoveVariableToX86reg((BYTE *)&_FPRDoubleLocation[m_CompileOpcode.ft],Name,TempReg3); + MoveX86PointerToX86reg(TempReg3,TempReg3); + MoveX86regToX86regPointer(TempReg3,TempReg1, TempReg2); + } else { + AndConstToX86Reg(TempReg1,0x1FFFFFFF); + TempReg3 = Map_TempReg(Section,x86_Any,-1,FALSE); + sprintf(Name,"_FPRDoubleLocation[%d]",m_CompileOpcode.ft); + MoveVariableToX86reg((BYTE *)&_FPRDoubleLocation[m_CompileOpcode.ft],Name,TempReg3); + AddConstToX86Reg(TempReg3,4); + MoveX86PointerToX86reg(TempReg3,TempReg3); + MoveX86regToN64Mem(TempReg3, TempReg1); + sprintf(Name,"_FPRDoubleLocation[%d]",m_CompileOpcode.ft); + MoveVariableToX86reg((BYTE *)&_FPRDoubleLocation[m_CompileOpcode.ft],Name,TempReg3); + MoveX86PointerToX86reg(TempReg3,TempReg3); + MoveX86regToN64MemDisp(TempReg3, TempReg1,4); + } +#endif +} + +/************************** COP1 functions **************************/ +void CRecompilerOps::COP1_MF (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + DWORD TempReg; + + CPU_Message(" %X %s",Section->m_CompilePC,R4300iOpcodeName(m_CompileOpcode.Hex,Section->m_CompilePC)); + CompileCop1Test(Section); + + UnMap_FPR(Section,m_CompileOpcode.fs,TRUE); + Map_GPR_32bit(Section,m_CompileOpcode.rt, TRUE, -1); + TempReg = Map_TempReg(Section,x86_Any,-1,FALSE); + sprintf(Name,"_FPRFloatLocation[%d]",m_CompileOpcode.fs); + MoveVariableToX86reg((BYTE *)&_FPRFloatLocation[m_CompileOpcode.fs],Name,TempReg); + MoveX86PointerToX86reg(Section->cMipsRegLo(m_CompileOpcode.rt),TempReg); +#endif +} + +void CRecompilerOps::COP1_DMF (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + DWORD TempReg; + + CPU_Message(" %X %s",Section->m_CompilePC,R4300iOpcodeName(m_CompileOpcode.Hex,Section->m_CompilePC)); + CompileCop1Test(Section); + + UnMap_FPR(Section,m_CompileOpcode.fs,TRUE); + Map_GPR_64bit(Section,m_CompileOpcode.rt, -1); + TempReg = Map_TempReg(Section,x86_Any,-1,FALSE); + sprintf(Name,"_FPRDoubleLocation[%d]",m_CompileOpcode.fs); + MoveVariableToX86reg((BYTE *)&_FPRDoubleLocation[m_CompileOpcode.fs],Name,TempReg); + AddConstToX86Reg(TempReg,4); + MoveX86PointerToX86reg(Section->MipsRegHi(m_CompileOpcode.rt),TempReg); + sprintf(Name,"_FPRDoubleLocation[%d]",m_CompileOpcode.fs); + MoveVariableToX86reg((BYTE *)&_FPRDoubleLocation[m_CompileOpcode.fs],Name,TempReg); + MoveX86PointerToX86reg(Section->cMipsRegLo(m_CompileOpcode.rt),TempReg); +#endif +} + +void CRecompilerOps::COP1_CF(void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + CPU_Message(" %X %s",Section->m_CompilePC,R4300iOpcodeName(m_CompileOpcode.Hex,Section->m_CompilePC)); + + CompileCop1Test(Section); + + if (m_CompileOpcode.fs != 31 && m_CompileOpcode.fs != 0) { CRecompilerOps::UnknownOpcode (Section); return; } + Map_GPR_32bit(Section,m_CompileOpcode.rt,TRUE,-1); + MoveVariableToX86reg(&_FPCR[m_CompileOpcode.fs],CRegName::FPR_Ctrl[m_CompileOpcode.fs],Section->cMipsRegLo(m_CompileOpcode.rt)); +#endif +} + +void CRecompilerOps::COP1_MT( void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + DWORD TempReg; + + CPU_Message(" %X %s",Section->m_CompilePC,R4300iOpcodeName(m_CompileOpcode.Hex,Section->m_CompilePC)); + CompileCop1Test(Section); + + if ((m_CompileOpcode.fs & 1) != 0) { + if (RegInStack(Section,m_CompileOpcode.fs-1,CRegInfo::FPU_Double) || RegInStack(Section,m_CompileOpcode.fs-1,CRegInfo::FPU_Qword)) { + UnMap_FPR(Section,m_CompileOpcode.fs-1,TRUE); + } + } + UnMap_FPR(Section,m_CompileOpcode.fs,TRUE); + TempReg = Map_TempReg(Section,x86_Any,-1,FALSE); + sprintf(Name,"_FPRFloatLocation[%d]",m_CompileOpcode.fs); + MoveVariableToX86reg((BYTE *)&_FPRFloatLocation[m_CompileOpcode.fs],Name,TempReg); + + if (Section->IsConst(m_CompileOpcode.rt)) { + MoveConstToX86Pointer(Section->cMipsRegLo(m_CompileOpcode.rt),TempReg); + } else if (Section->IsMapped(m_CompileOpcode.rt)) { + MoveX86regToX86Pointer(Section->cMipsRegLo(m_CompileOpcode.rt),TempReg); + } else { + MoveX86regToX86Pointer(Map_TempReg(Section,x86_Any, m_CompileOpcode.rt, FALSE),TempReg); + } +#endif +} + +void CRecompilerOps::COP1_DMT( void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + DWORD TempReg; + + CPU_Message(" %X %s",Section->m_CompilePC,R4300iOpcodeName(m_CompileOpcode.Hex,Section->m_CompilePC)); + CompileCop1Test(Section); + + if ((m_CompileOpcode.fs & 1) == 0) { + if (RegInStack(Section,m_CompileOpcode.fs+1,CRegInfo::FPU_Float) || RegInStack(Section,m_CompileOpcode.fs+1,CRegInfo::FPU_Dword)) { + UnMap_FPR(Section,m_CompileOpcode.fs+1,TRUE); + } + } + UnMap_FPR(Section,m_CompileOpcode.fs,TRUE); + TempReg = Map_TempReg(Section,x86_Any,-1,FALSE); + sprintf(Name,"_FPRDoubleLocation[%d]",m_CompileOpcode.fs); + MoveVariableToX86reg((BYTE *)&_FPRDoubleLocation[m_CompileOpcode.fs],Name,TempReg); + + if (Section->IsConst(m_CompileOpcode.rt)) { + MoveConstToX86Pointer(Section->cMipsRegLo(m_CompileOpcode.rt),TempReg); + AddConstToX86Reg(TempReg,4); + if (Section->Is64Bit(m_CompileOpcode.rt)) { + MoveConstToX86Pointer(Section->MipsRegHi(m_CompileOpcode.rt),TempReg); + } else { + MoveConstToX86Pointer(Section->MipsRegLo_S(m_CompileOpcode.rt) >> 31,TempReg); + } + } else if (Section->IsMapped(m_CompileOpcode.rt)) { + MoveX86regToX86Pointer(Section->cMipsRegLo(m_CompileOpcode.rt),TempReg); + AddConstToX86Reg(TempReg,4); + if (Section->Is64Bit(m_CompileOpcode.rt)) { + MoveX86regToX86Pointer(Section->MipsRegHi(m_CompileOpcode.rt),TempReg); + } else { + MoveX86regToX86Pointer(Map_TempReg(Section,x86_Any, m_CompileOpcode.rt, TRUE),TempReg); + } + } else { + int x86Reg = Map_TempReg(Section,x86_Any, m_CompileOpcode.rt, FALSE); + MoveX86regToX86Pointer(x86Reg,TempReg); + AddConstToX86Reg(TempReg,4); + MoveX86regToX86Pointer(Map_TempReg(Section,x86Reg, m_CompileOpcode.rt, TRUE),TempReg); + } +#endif +} + + +void CRecompilerOps::COP1_CT(void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + + CPU_Message(" %X %s",Section->m_CompilePC,R4300iOpcodeName(m_CompileOpcode.Hex,Section->m_CompilePC)); + CompileCop1Test(Section); + if (m_CompileOpcode.fs != 31) { CRecompilerOps::UnknownOpcode (Section); return; } + + if (Section->IsConst(m_CompileOpcode.rt)) { + MoveConstToVariable(Section->cMipsRegLo(m_CompileOpcode.rt),&_FPCR[m_CompileOpcode.fs],CRegName::FPR_Ctrl[m_CompileOpcode.fs]); + } else if (Section->IsMapped(m_CompileOpcode.rt)) { + MoveX86regToVariable(Section->cMipsRegLo(m_CompileOpcode.rt),&_FPCR[m_CompileOpcode.fs],CRegName::FPR_Ctrl[m_CompileOpcode.fs]); + } else { + MoveX86regToVariable(Map_TempReg(Section,x86_Any,m_CompileOpcode.rt,FALSE),&_FPCR[m_CompileOpcode.fs],CRegName::FPR_Ctrl[m_CompileOpcode.fs]); + } + Pushad(); + Call_Direct(ChangeDefaultRoundingModel, "ChangeDefaultRoundingModel"); + Popad(); + Section->CurrentRoundingModel() = CRegInfo::RoundUnknown; +#endif +} + +/************************** COP1: S functions ************************/ +void CRecompilerOps::COP1_S_ADD (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + DWORD Reg1 = m_CompileOpcode.ft == m_CompileOpcode.fd?m_CompileOpcode.ft:m_CompileOpcode.fs; + DWORD Reg2 = m_CompileOpcode.ft == m_CompileOpcode.fd?m_CompileOpcode.fs:m_CompileOpcode.ft; + + CPU_Message(" %X %s",Section->m_CompilePC,R4300iOpcodeName(m_CompileOpcode.Hex,Section->m_CompilePC)); + + CompileCop1Test(Section); + FixRoundModel(Section,CRegInfo::RoundDefault); + + Load_FPR_ToTop(Section,m_CompileOpcode.fd,Reg1, CRegInfo::FPU_Float); + if (RegInStack(Section,Reg2, CRegInfo::FPU_Float)) { + fpuAddReg(StackPosition(Section,Reg2)); + } else { + DWORD TempReg; + + UnMap_FPR(Section,Reg2,TRUE); + TempReg = Map_TempReg(Section,x86_Any,-1,FALSE); + sprintf(Name,"_FPRFloatLocation[%d]",Reg2); + MoveVariableToX86reg((BYTE *)&_FPRFloatLocation[Reg2],Name,TempReg); + Load_FPR_ToTop(Section,m_CompileOpcode.fd,m_CompileOpcode.fd, CRegInfo::FPU_Float); + fpuAddDwordRegPointer(TempReg); + } + UnMap_FPR(Section,m_CompileOpcode.fd,TRUE); +#endif +} + +void CRecompilerOps::COP1_S_SUB (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + DWORD Reg1 = m_CompileOpcode.ft == m_CompileOpcode.fd?m_CompileOpcode.ft:m_CompileOpcode.fs; + DWORD Reg2 = m_CompileOpcode.ft == m_CompileOpcode.fd?m_CompileOpcode.fs:m_CompileOpcode.ft; + DWORD TempReg; + + CPU_Message(" %X %s",Section->m_CompilePC,R4300iOpcodeName(m_CompileOpcode.Hex,Section->m_CompilePC)); + + CompileCop1Test(Section); + FixRoundModel(Section,CRegInfo::RoundDefault); + + if (m_CompileOpcode.fd == m_CompileOpcode.ft) { + UnMap_FPR(Section,m_CompileOpcode.fd,TRUE); + Load_FPR_ToTop(Section,m_CompileOpcode.fd,m_CompileOpcode.fs,CRegInfo::FPU_Float); + + TempReg = Map_TempReg(Section,x86_Any,-1,FALSE); + sprintf(Name,"_FPRFloatLocation[%d]",m_CompileOpcode.ft); + MoveVariableToX86reg((BYTE *)&_FPRFloatLocation[m_CompileOpcode.ft],Name,TempReg); + fpuSubDwordRegPointer(TempReg); + } else { + Load_FPR_ToTop(Section,m_CompileOpcode.fd,Reg1, CRegInfo::FPU_Float); + if (RegInStack(Section,Reg2, CRegInfo::FPU_Float)) { + fpuSubReg(StackPosition(Section,Reg2)); + } else { + UnMap_FPR(Section,Reg2,TRUE); + Load_FPR_ToTop(Section,m_CompileOpcode.fd,m_CompileOpcode.fd, CRegInfo::FPU_Float); + + TempReg = Map_TempReg(Section,x86_Any,-1,FALSE); + sprintf(Name,"_FPRFloatLocation[%d]",Reg2); + MoveVariableToX86reg((BYTE *)&_FPRFloatLocation[Reg2],Name,TempReg); + fpuSubDwordRegPointer(TempReg); + } + } + UnMap_FPR(Section,m_CompileOpcode.fd,TRUE); +#endif +} + +void CRecompilerOps::COP1_S_MUL (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + DWORD Reg1 = m_CompileOpcode.ft == m_CompileOpcode.fd?m_CompileOpcode.ft:m_CompileOpcode.fs; + DWORD Reg2 = m_CompileOpcode.ft == m_CompileOpcode.fd?m_CompileOpcode.fs:m_CompileOpcode.ft; + DWORD TempReg; + + CPU_Message(" %X %s",Section->m_CompilePC,R4300iOpcodeName(m_CompileOpcode.Hex,Section->m_CompilePC)); + + CompileCop1Test(Section); + FixRoundModel(Section,CRegInfo::RoundDefault); + + Load_FPR_ToTop(Section,m_CompileOpcode.fd,Reg1, CRegInfo::FPU_Float); + if (RegInStack(Section,Reg2, CRegInfo::FPU_Float)) { + fpuMulReg(StackPosition(Section,Reg2)); + } else { + UnMap_FPR(Section,Reg2,TRUE); + Load_FPR_ToTop(Section,m_CompileOpcode.fd,m_CompileOpcode.fd, CRegInfo::FPU_Float); + + TempReg = Map_TempReg(Section,x86_Any,-1,FALSE); + sprintf(Name,"_FPRFloatLocation[%d]",Reg2); + MoveVariableToX86reg((BYTE *)&_FPRFloatLocation[Reg2],Name,TempReg); + fpuMulDwordRegPointer(TempReg); + } + UnMap_FPR(Section,m_CompileOpcode.fd,TRUE); +#endif +} + +void CRecompilerOps::COP1_S_DIV (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + DWORD Reg1 = m_CompileOpcode.ft == m_CompileOpcode.fd?m_CompileOpcode.ft:m_CompileOpcode.fs; + DWORD Reg2 = m_CompileOpcode.ft == m_CompileOpcode.fd?m_CompileOpcode.fs:m_CompileOpcode.ft; + DWORD TempReg; + + CPU_Message(" %X %s",Section->m_CompilePC,R4300iOpcodeName(m_CompileOpcode.Hex,Section->m_CompilePC)); + + CompileCop1Test(Section); + FixRoundModel(Section,CRegInfo::RoundDefault); + + if (m_CompileOpcode.fd == m_CompileOpcode.ft) { + UnMap_FPR(Section,m_CompileOpcode.fd,TRUE); + Load_FPR_ToTop(Section,m_CompileOpcode.fd,m_CompileOpcode.fs,CRegInfo::FPU_Float); + + TempReg = Map_TempReg(Section,x86_Any,-1,FALSE); + sprintf(Name,"_FPRFloatLocation[%d]",m_CompileOpcode.ft); + MoveVariableToX86reg((BYTE *)&_FPRFloatLocation[m_CompileOpcode.ft],Name,TempReg); + fpuDivDwordRegPointer(TempReg); + } else { + Load_FPR_ToTop(Section,m_CompileOpcode.fd,Reg1, CRegInfo::FPU_Float); + if (RegInStack(Section,Reg2, CRegInfo::FPU_Float)) { + fpuDivReg(StackPosition(Section,Reg2)); + } else { + UnMap_FPR(Section,Reg2,TRUE); + Load_FPR_ToTop(Section,m_CompileOpcode.fd,m_CompileOpcode.fd, CRegInfo::FPU_Float); + + TempReg = Map_TempReg(Section,x86_Any,-1,FALSE); + sprintf(Name,"_FPRFloatLocation[%d]",Reg2); + MoveVariableToX86reg((BYTE *)&_FPRFloatLocation[Reg2],Name,TempReg); + fpuDivDwordRegPointer(TempReg); + } + } + + UnMap_FPR(Section,m_CompileOpcode.fd,TRUE); +#endif +} + +void CRecompilerOps::COP1_S_ABS (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + CPU_Message(" %X %s",Section->m_CompilePC,R4300iOpcodeName(m_CompileOpcode.Hex,Section->m_CompilePC)); + CompileCop1Test(Section); + FixRoundModel(Section,CRegInfo::RoundDefault); + Load_FPR_ToTop(Section,m_CompileOpcode.fd,m_CompileOpcode.fs,CRegInfo::FPU_Float); + fpuAbs(); + UnMap_FPR(Section,m_CompileOpcode.fd,TRUE); +#endif +} + +void CRecompilerOps::COP1_S_NEG (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + CPU_Message(" %X %s",Section->m_CompilePC,R4300iOpcodeName(m_CompileOpcode.Hex,Section->m_CompilePC)); + CompileCop1Test(Section); + FixRoundModel(Section,CRegInfo::RoundDefault); + Load_FPR_ToTop(Section,m_CompileOpcode.fd,m_CompileOpcode.fs,CRegInfo::FPU_Float); + fpuNeg(); + UnMap_FPR(Section,m_CompileOpcode.fd,TRUE); +#endif +} + +void CRecompilerOps::COP1_S_SQRT (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + CPU_Message(" %X %s",Section->m_CompilePC,R4300iOpcodeName(m_CompileOpcode.Hex,Section->m_CompilePC)); + CompileCop1Test(Section); + FixRoundModel(Section,CRegInfo::RoundDefault); + Load_FPR_ToTop(Section,m_CompileOpcode.fd,m_CompileOpcode.fs,CRegInfo::FPU_Float); + fpuSqrt(); + UnMap_FPR(Section,m_CompileOpcode.fd,TRUE); +#endif +} + +void CRecompilerOps::COP1_S_MOV (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + CPU_Message(" %X %s",Section->m_CompilePC,R4300iOpcodeName(m_CompileOpcode.Hex,Section->m_CompilePC)); + CompileCop1Test(Section); + FixRoundModel(Section,CRegInfo::RoundDefault); + Load_FPR_ToTop(Section,m_CompileOpcode.fd,m_CompileOpcode.fs,CRegInfo::FPU_Float); +#endif +} + +void CRecompilerOps::COP1_S_TRUNC_L (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + CPU_Message(" %X %s",Section->m_CompilePC,R4300iOpcodeName(m_CompileOpcode.Hex,Section->m_CompilePC)); + + CompileCop1Test(Section); + if (m_CompileOpcode.fd != m_CompileOpcode.fs || !RegInStack(Section,m_CompileOpcode.fd,CRegInfo::FPU_Float)) { + Load_FPR_ToTop(Section,m_CompileOpcode.fd,m_CompileOpcode.fs,CRegInfo::FPU_Float); + } + ChangeFPURegFormat(Section,m_CompileOpcode.fd,CRegInfo::FPU_Float,CRegInfo::FPU_Qword,CRegInfo::RoundTruncate); +#endif +} + +void CRecompilerOps::COP1_S_CEIL_L (void) { //added by Witten + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + CPU_Message(" %X %s",Section->m_CompilePC,R4300iOpcodeName(m_CompileOpcode.Hex,Section->m_CompilePC)); + + CompileCop1Test(Section); + if (m_CompileOpcode.fd != m_CompileOpcode.fs || !RegInStack(Section,m_CompileOpcode.fd,CRegInfo::FPU_Float)) { + Load_FPR_ToTop(Section,m_CompileOpcode.fd,m_CompileOpcode.fs,CRegInfo::FPU_Float); + } + ChangeFPURegFormat(Section,m_CompileOpcode.fd,CRegInfo::FPU_Float,CRegInfo::FPU_Qword,CRegInfo::RoundUp); +#endif +} + +void CRecompilerOps::COP1_S_FLOOR_L (void) { //added by Witten + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + CPU_Message(" %X %s",Section->m_CompilePC,R4300iOpcodeName(m_CompileOpcode.Hex,Section->m_CompilePC)); + + CompileCop1Test(Section); + if (m_CompileOpcode.fd != m_CompileOpcode.fs || !RegInStack(Section,m_CompileOpcode.fd,CRegInfo::FPU_Float)) { + Load_FPR_ToTop(Section,m_CompileOpcode.fd,m_CompileOpcode.fs,CRegInfo::FPU_Float); + } + ChangeFPURegFormat(Section,m_CompileOpcode.fd,CRegInfo::FPU_Float,CRegInfo::FPU_Qword,CRegInfo::RoundDown); +#endif +} + +void CRecompilerOps::COP1_S_ROUND_W (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + CPU_Message(" %X %s",Section->m_CompilePC,R4300iOpcodeName(m_CompileOpcode.Hex,Section->m_CompilePC)); + + CompileCop1Test(Section); + if (m_CompileOpcode.fd != m_CompileOpcode.fs || !RegInStack(Section,m_CompileOpcode.fd,CRegInfo::FPU_Float)) { + Load_FPR_ToTop(Section,m_CompileOpcode.fd,m_CompileOpcode.fs,CRegInfo::FPU_Float); + } + ChangeFPURegFormat(Section,m_CompileOpcode.fd,CRegInfo::FPU_Float,CRegInfo::FPU_Dword,CRegInfo::RoundNearest); +#endif +} + +void CRecompilerOps::COP1_S_TRUNC_W (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + CPU_Message(" %X %s",Section->m_CompilePC,R4300iOpcodeName(m_CompileOpcode.Hex,Section->m_CompilePC)); + + CompileCop1Test(Section); + if (m_CompileOpcode.fd != m_CompileOpcode.fs || !RegInStack(Section,m_CompileOpcode.fd,CRegInfo::FPU_Float)) { + Load_FPR_ToTop(Section,m_CompileOpcode.fd,m_CompileOpcode.fs,CRegInfo::FPU_Float); + } + ChangeFPURegFormat(Section,m_CompileOpcode.fd,CRegInfo::FPU_Float,CRegInfo::FPU_Dword,CRegInfo::RoundTruncate); +#endif +} + +void CRecompilerOps::COP1_S_CEIL_W (void) { // added by Witten + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + CPU_Message(" %X %s",Section->m_CompilePC,R4300iOpcodeName(m_CompileOpcode.Hex,Section->m_CompilePC)); + + CompileCop1Test(Section); + if (m_CompileOpcode.fd != m_CompileOpcode.fs || !RegInStack(Section,m_CompileOpcode.fd,CRegInfo::FPU_Float)) { + Load_FPR_ToTop(Section,m_CompileOpcode.fd,m_CompileOpcode.fs,CRegInfo::FPU_Float); + } + ChangeFPURegFormat(Section,m_CompileOpcode.fd,CRegInfo::FPU_Float,CRegInfo::FPU_Dword,CRegInfo::RoundUp); +#endif +} + +void CRecompilerOps::COP1_S_FLOOR_W (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + CPU_Message(" %X %s",Section->m_CompilePC,R4300iOpcodeName(m_CompileOpcode.Hex,Section->m_CompilePC)); + + CompileCop1Test(Section); + if (m_CompileOpcode.fd != m_CompileOpcode.fs || !RegInStack(Section,m_CompileOpcode.fd,CRegInfo::FPU_Float)) { + Load_FPR_ToTop(Section,m_CompileOpcode.fd,m_CompileOpcode.fs,CRegInfo::FPU_Float); + } + ChangeFPURegFormat(Section,m_CompileOpcode.fd,CRegInfo::FPU_Float,CRegInfo::FPU_Dword,CRegInfo::RoundDown); +#endif +} + +void CRecompilerOps::COP1_S_CVT_D (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + CPU_Message(" %X %s",Section->m_CompilePC,R4300iOpcodeName(m_CompileOpcode.Hex,Section->m_CompilePC)); + + CompileCop1Test(Section); + if (m_CompileOpcode.fd != m_CompileOpcode.fs || !RegInStack(Section,m_CompileOpcode.fd,CRegInfo::FPU_Float)) { + Load_FPR_ToTop(Section,m_CompileOpcode.fd,m_CompileOpcode.fs,CRegInfo::FPU_Float); + } + ChangeFPURegFormat(Section,m_CompileOpcode.fd,CRegInfo::FPU_Float,CRegInfo::FPU_Double,CRegInfo::RoundDefault); +#endif +} + +void CRecompilerOps::COP1_S_CVT_W (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + CPU_Message(" %X %s",Section->m_CompilePC,R4300iOpcodeName(m_CompileOpcode.Hex,Section->m_CompilePC)); + + CompileCop1Test(Section); + if (m_CompileOpcode.fd != m_CompileOpcode.fs || !RegInStack(Section,m_CompileOpcode.fd,CRegInfo::FPU_Float)) { + Load_FPR_ToTop(Section,m_CompileOpcode.fd,m_CompileOpcode.fs,CRegInfo::FPU_Float); + } + ChangeFPURegFormat(Section,m_CompileOpcode.fd,CRegInfo::FPU_Float,CRegInfo::FPU_Dword,CRegInfo::RoundDefault); +#endif +} + +void CRecompilerOps::COP1_S_CVT_L (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + CPU_Message(" %X %s",Section->m_CompilePC,R4300iOpcodeName(m_CompileOpcode.Hex,Section->m_CompilePC)); + + CompileCop1Test(Section); + if (m_CompileOpcode.fd != m_CompileOpcode.fs || !RegInStack(Section,m_CompileOpcode.fd,CRegInfo::FPU_Float)) { + Load_FPR_ToTop(Section,m_CompileOpcode.fd,m_CompileOpcode.fs,CRegInfo::FPU_Float); + } + ChangeFPURegFormat(Section,m_CompileOpcode.fd,CRegInfo::FPU_Float,CRegInfo::FPU_Qword,CRegInfo::RoundDefault); +#endif +} + +void CRecompilerOps::COP1_S_CMP (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + DWORD Reg1 = RegInStack(Section,m_CompileOpcode.ft, CRegInfo::FPU_Float)?m_CompileOpcode.ft:m_CompileOpcode.fs; + DWORD Reg2 = RegInStack(Section,m_CompileOpcode.ft, CRegInfo::FPU_Float)?m_CompileOpcode.fs:m_CompileOpcode.ft; + int x86reg, cmp = 0; + + + CPU_Message(" %X %s",Section->m_CompilePC,R4300iOpcodeName(m_CompileOpcode.Hex,Section->m_CompilePC)); + + CompileCop1Test(Section); + //if ((m_CompileOpcode.funct & 1) != 0) { CRecompilerOps::UnknownOpcode(Section); } + if ((m_CompileOpcode.funct & 2) != 0) { cmp |= 0x4000; } + if ((m_CompileOpcode.funct & 4) != 0) { cmp |= 0x0100; } + + Load_FPR_ToTop(Section,Reg1,Reg1, CRegInfo::FPU_Float); + Map_TempReg(Section,x86_EAX, 0, FALSE); + if (RegInStack(Section,Reg2, CRegInfo::FPU_Float)) { + fpuComReg(StackPosition(Section,Reg2),FALSE); + } else { + DWORD TempReg; + + UnMap_FPR(Section,Reg2,TRUE); + Load_FPR_ToTop(Section,Reg1,Reg1, CRegInfo::FPU_Float); + + TempReg = Map_TempReg(Section,x86_Any,-1,FALSE); + sprintf(Name,"_FPRFloatLocation[%d]",Reg2); + MoveVariableToX86reg((BYTE *)&_FPRFloatLocation[Reg2],Name,TempReg); + fpuComDwordRegPointer(TempReg,FALSE); + } + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + AndConstToVariable(~FPCSR_C, &FSTATUS_REGISTER, "FSTATUS_REGISTER"); +#endif + fpuStoreStatus(); + x86reg = Map_TempReg(Section,x86_Any8Bit, 0, FALSE); + TestConstToX86Reg(cmp,x86_EAX); + Setnz(x86reg); + + if (cmp != 0) { + TestConstToX86Reg(cmp,x86_EAX); + Setnz(x86reg); + + if ((m_CompileOpcode.funct & 1) != 0) { + int x86reg2 = Map_TempReg(Section,x86_Any8Bit, 0, FALSE); + AndConstToX86Reg(x86_EAX, 0x4300); + CompConstToX86reg(x86_EAX, 0x4300); + Setz(x86reg2); + + OrX86RegToX86Reg(x86reg, x86reg2); + } + } else if ((m_CompileOpcode.funct & 1) != 0) { + AndConstToX86Reg(x86_EAX, 0x4300); + CompConstToX86reg(x86_EAX, 0x4300); + Setz(x86reg); + } + ShiftLeftSignImmed(x86reg, 23); + OrX86RegToVariable(&_FPCR[31], "_FPCR[31]", x86reg); +#endif +} + +/************************** COP1: D functions ************************/ +void CRecompilerOps::COP1_D_ADD (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + DWORD Reg1 = m_CompileOpcode.ft == m_CompileOpcode.fd?m_CompileOpcode.ft:m_CompileOpcode.fs; + DWORD Reg2 = m_CompileOpcode.ft == m_CompileOpcode.fd?m_CompileOpcode.fs:m_CompileOpcode.ft; + + CPU_Message(" %X %s",Section->m_CompilePC,R4300iOpcodeName(m_CompileOpcode.Hex,Section->m_CompilePC)); + + CompileCop1Test(Section); + + Load_FPR_ToTop(Section,m_CompileOpcode.fd,Reg1, CRegInfo::FPU_Double); + if (RegInStack(Section,Reg2, CRegInfo::FPU_Double)) { + fpuAddReg(StackPosition(Section,Reg2)); + } else { + DWORD TempReg; + + UnMap_FPR(Section,Reg2,TRUE); + TempReg = Map_TempReg(Section,x86_Any,-1,FALSE); + sprintf(Name,"_FPRDoubleLocation[%d]",Reg2); + MoveVariableToX86reg((BYTE *)&_FPRDoubleLocation[Reg2],Name,TempReg); + Load_FPR_ToTop(Section,m_CompileOpcode.fd,m_CompileOpcode.fd, CRegInfo::FPU_Double); + fpuAddQwordRegPointer(TempReg); + } +#endif +} + +void CRecompilerOps::COP1_D_SUB (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + DWORD Reg1 = m_CompileOpcode.ft == m_CompileOpcode.fd?m_CompileOpcode.ft:m_CompileOpcode.fs; + DWORD Reg2 = m_CompileOpcode.ft == m_CompileOpcode.fd?m_CompileOpcode.fs:m_CompileOpcode.ft; + DWORD TempReg; + + CPU_Message(" %X %s",Section->m_CompilePC,R4300iOpcodeName(m_CompileOpcode.Hex,Section->m_CompilePC)); + + CompileCop1Test(Section); + + if (m_CompileOpcode.fd == m_CompileOpcode.ft) { + UnMap_FPR(Section,m_CompileOpcode.fd,TRUE); + TempReg = Map_TempReg(Section,x86_Any,-1,FALSE); + sprintf(Name,"_FPRDoubleLocation[%d]",m_CompileOpcode.ft); + MoveVariableToX86reg((BYTE *)&_FPRDoubleLocation[m_CompileOpcode.ft],Name,TempReg); + Load_FPR_ToTop(Section,m_CompileOpcode.fd,m_CompileOpcode.fs,CRegInfo::FPU_Double); + fpuSubQwordRegPointer(TempReg); + } else { + Load_FPR_ToTop(Section,m_CompileOpcode.fd,Reg1, CRegInfo::FPU_Double); + if (RegInStack(Section,Reg2, CRegInfo::FPU_Double)) { + fpuSubReg(StackPosition(Section,Reg2)); + } else { + UnMap_FPR(Section,Reg2,TRUE); + + TempReg = Map_TempReg(Section,x86_Any,-1,FALSE); + sprintf(Name,"_FPRDoubleLocation[%d]",Reg2); + MoveVariableToX86reg((BYTE *)&_FPRDoubleLocation[Reg2],Name,TempReg); + Load_FPR_ToTop(Section,m_CompileOpcode.fd,m_CompileOpcode.fd, CRegInfo::FPU_Double); + fpuSubQwordRegPointer(TempReg); + } + } +#endif +} + +void CRecompilerOps::COP1_D_MUL (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + DWORD Reg1 = m_CompileOpcode.ft == m_CompileOpcode.fd?m_CompileOpcode.ft:m_CompileOpcode.fs; + DWORD Reg2 = m_CompileOpcode.ft == m_CompileOpcode.fd?m_CompileOpcode.fs:m_CompileOpcode.ft; + DWORD TempReg; + + CPU_Message(" %X %s",Section->m_CompilePC,R4300iOpcodeName(m_CompileOpcode.Hex,Section->m_CompilePC)); + + CompileCop1Test(Section); + FixRoundModel(Section,CRegInfo::RoundDefault); + + Load_FPR_ToTop(Section,m_CompileOpcode.fd,Reg1, CRegInfo::FPU_Double); + if (RegInStack(Section,Reg2, CRegInfo::FPU_Double)) { + fpuMulReg(StackPosition(Section,Reg2)); + } else { + UnMap_FPR(Section,Reg2,TRUE); + Load_FPR_ToTop(Section,m_CompileOpcode.fd,m_CompileOpcode.fd, CRegInfo::FPU_Double); + TempReg = Map_TempReg(Section,x86_Any,-1,FALSE); + sprintf(Name,"_FPRDoubleLocation[%d]",Reg2); + MoveVariableToX86reg((BYTE *)&_FPRDoubleLocation[Reg2],Name,TempReg); + fpuMulQwordRegPointer(TempReg); + } +#endif +} + +void CRecompilerOps::COP1_D_DIV (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + DWORD Reg1 = m_CompileOpcode.ft == m_CompileOpcode.fd?m_CompileOpcode.ft:m_CompileOpcode.fs; + DWORD Reg2 = m_CompileOpcode.ft == m_CompileOpcode.fd?m_CompileOpcode.fs:m_CompileOpcode.ft; + DWORD TempReg; + + CPU_Message(" %X %s",Section->m_CompilePC,R4300iOpcodeName(m_CompileOpcode.Hex,Section->m_CompilePC)); + + CompileCop1Test(Section); + + if (m_CompileOpcode.fd == m_CompileOpcode.ft) { + UnMap_FPR(Section,m_CompileOpcode.fd,TRUE); + TempReg = Map_TempReg(Section,x86_Any,-1,FALSE); + sprintf(Name,"_FPRDoubleLocation[%d]",m_CompileOpcode.ft); + MoveVariableToX86reg((BYTE *)&_FPRDoubleLocation[m_CompileOpcode.ft],Name,TempReg); + Load_FPR_ToTop(Section,m_CompileOpcode.fd,m_CompileOpcode.fs,CRegInfo::FPU_Double); + fpuDivQwordRegPointer(TempReg); + } else { + Load_FPR_ToTop(Section,m_CompileOpcode.fd,Reg1, CRegInfo::FPU_Double); + if (RegInStack(Section,Reg2, CRegInfo::FPU_Double)) { + fpuDivReg(StackPosition(Section,Reg2)); + } else { + UnMap_FPR(Section,Reg2,TRUE); + TempReg = Map_TempReg(Section,x86_Any,-1,FALSE); + sprintf(Name,"_FPRDoubleLocation[%d]",Reg2); + MoveVariableToX86reg((BYTE *)&_FPRDoubleLocation[Reg2],Name,TempReg); + Load_FPR_ToTop(Section,m_CompileOpcode.fd,m_CompileOpcode.fd, CRegInfo::FPU_Double); + fpuDivQwordRegPointer(TempReg); + } + } +#endif +} + +void CRecompilerOps::COP1_D_ABS (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + CPU_Message(" %X %s",Section->m_CompilePC,R4300iOpcodeName(m_CompileOpcode.Hex,Section->m_CompilePC)); + Load_FPR_ToTop(Section,m_CompileOpcode.fd,m_CompileOpcode.fs,CRegInfo::FPU_Double); + fpuAbs(); +#endif +} + +void CRecompilerOps::COP1_D_NEG (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + CPU_Message(" %X %s",Section->m_CompilePC,R4300iOpcodeName(m_CompileOpcode.Hex,Section->m_CompilePC)); + Load_FPR_ToTop(Section,m_CompileOpcode.fd,m_CompileOpcode.fs,CRegInfo::FPU_Double); + fpuNeg(); +#endif +} + +void CRecompilerOps::COP1_D_SQRT (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + CPU_Message(" %X %s",Section->m_CompilePC,R4300iOpcodeName(m_CompileOpcode.Hex,Section->m_CompilePC)); + Load_FPR_ToTop(Section,m_CompileOpcode.fd,m_CompileOpcode.fs,CRegInfo::FPU_Double); + fpuSqrt(); +#endif +} + +void CRecompilerOps::COP1_D_MOV (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + CPU_Message(" %X %s",Section->m_CompilePC,R4300iOpcodeName(m_CompileOpcode.Hex,Section->m_CompilePC)); + Load_FPR_ToTop(Section,m_CompileOpcode.fd,m_CompileOpcode.fs,CRegInfo::FPU_Double); +#endif +} + +void CRecompilerOps::COP1_D_TRUNC_L (void) { //added by Witten + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + CPU_Message(" %X %s",Section->m_CompilePC,R4300iOpcodeName(m_CompileOpcode.Hex,Section->m_CompilePC)); + + CompileCop1Test(Section); + if (RegInStack(Section,m_CompileOpcode.fs,CRegInfo::FPU_Double) || RegInStack(Section,m_CompileOpcode.fs,CRegInfo::FPU_Qword)) { + UnMap_FPR(Section,m_CompileOpcode.fs,TRUE); + } + if (m_CompileOpcode.fd != m_CompileOpcode.fs || !RegInStack(Section,m_CompileOpcode.fd,CRegInfo::FPU_Double)) { + Load_FPR_ToTop(Section,m_CompileOpcode.fd,m_CompileOpcode.fs,CRegInfo::FPU_Double); + } + ChangeFPURegFormat(Section,m_CompileOpcode.fd,CRegInfo::FPU_Double,CRegInfo::FPU_Qword,CRegInfo::RoundTruncate); +#endif +} + +void CRecompilerOps::COP1_D_CEIL_L (void) { //added by Witten + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + CPU_Message(" %X %s",Section->m_CompilePC,R4300iOpcodeName(m_CompileOpcode.Hex,Section->m_CompilePC)); + + CompileCop1Test(Section); + if (RegInStack(Section,m_CompileOpcode.fs,CRegInfo::FPU_Double) || RegInStack(Section,m_CompileOpcode.fs,CRegInfo::FPU_Qword)) { + UnMap_FPR(Section,m_CompileOpcode.fs,TRUE); + } + if (m_CompileOpcode.fd != m_CompileOpcode.fs || !RegInStack(Section,m_CompileOpcode.fd,CRegInfo::FPU_Double)) { + Load_FPR_ToTop(Section,m_CompileOpcode.fd,m_CompileOpcode.fs,CRegInfo::FPU_Double); + } + ChangeFPURegFormat(Section,m_CompileOpcode.fd,CRegInfo::FPU_Double,CRegInfo::FPU_Qword,CRegInfo::RoundUp); +#endif +} + +void CRecompilerOps::COP1_D_FLOOR_L (void) { //added by Witten + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + CPU_Message(" %X %s",Section->m_CompilePC,R4300iOpcodeName(m_CompileOpcode.Hex,Section->m_CompilePC)); + + CompileCop1Test(Section); + if (RegInStack(Section,m_CompileOpcode.fs,CRegInfo::FPU_Double) || RegInStack(Section,m_CompileOpcode.fs,CRegInfo::FPU_Qword)) { + UnMap_FPR(Section,m_CompileOpcode.fs,TRUE); + } + if (m_CompileOpcode.fd != m_CompileOpcode.fs || !RegInStack(Section,m_CompileOpcode.fd,CRegInfo::FPU_Double)) { + Load_FPR_ToTop(Section,m_CompileOpcode.fd,m_CompileOpcode.fs,CRegInfo::FPU_Double); + } + ChangeFPURegFormat(Section,m_CompileOpcode.fd,CRegInfo::FPU_Double,CRegInfo::FPU_Qword,CRegInfo::RoundDown); +#endif +} + +void CRecompilerOps::COP1_D_ROUND_W (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + CPU_Message(" %X %s",Section->m_CompilePC,R4300iOpcodeName(m_CompileOpcode.Hex,Section->m_CompilePC)); + + CompileCop1Test(Section); + if (RegInStack(Section,m_CompileOpcode.fs,CRegInfo::FPU_Double) || RegInStack(Section,m_CompileOpcode.fs,CRegInfo::FPU_Qword)) { + UnMap_FPR(Section,m_CompileOpcode.fs,TRUE); + } + if (m_CompileOpcode.fd != m_CompileOpcode.fs || !RegInStack(Section,m_CompileOpcode.fd,CRegInfo::FPU_Double)) { + Load_FPR_ToTop(Section,m_CompileOpcode.fd,m_CompileOpcode.fs,CRegInfo::FPU_Double); + } + ChangeFPURegFormat(Section,m_CompileOpcode.fd,CRegInfo::FPU_Double,CRegInfo::FPU_Dword,CRegInfo::RoundNearest); +#endif +} + +void CRecompilerOps::COP1_D_TRUNC_W (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + CPU_Message(" %X %s",Section->m_CompilePC,R4300iOpcodeName(m_CompileOpcode.Hex,Section->m_CompilePC)); + + CompileCop1Test(Section); + if (RegInStack(Section,m_CompileOpcode.fs,CRegInfo::FPU_Double) || RegInStack(Section,m_CompileOpcode.fs,CRegInfo::FPU_Qword)) { + UnMap_FPR(Section,m_CompileOpcode.fs,TRUE); + } + if (m_CompileOpcode.fd != m_CompileOpcode.fs || !RegInStack(Section,m_CompileOpcode.fd,CRegInfo::FPU_Double)) { + Load_FPR_ToTop(Section,m_CompileOpcode.fd,m_CompileOpcode.fs,CRegInfo::FPU_Double); + } + ChangeFPURegFormat(Section,m_CompileOpcode.fd,CRegInfo::FPU_Double,CRegInfo::FPU_Dword,CRegInfo::RoundTruncate); +#endif +} + +void CRecompilerOps::COP1_D_CEIL_W (void) { // added by Witten + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + CPU_Message(" %X %s",Section->m_CompilePC,R4300iOpcodeName(m_CompileOpcode.Hex,Section->m_CompilePC)); + + CompileCop1Test(Section); + if (RegInStack(Section,m_CompileOpcode.fs,CRegInfo::FPU_Double) || RegInStack(Section,m_CompileOpcode.fs,CRegInfo::FPU_Qword)) { + UnMap_FPR(Section,m_CompileOpcode.fs,TRUE); + } + if (m_CompileOpcode.fd != m_CompileOpcode.fs || !RegInStack(Section,m_CompileOpcode.fd,CRegInfo::FPU_Double)) { + Load_FPR_ToTop(Section,m_CompileOpcode.fd,m_CompileOpcode.fs,CRegInfo::FPU_Double); + } + ChangeFPURegFormat(Section,m_CompileOpcode.fd,CRegInfo::FPU_Double,CRegInfo::FPU_Dword,CRegInfo::RoundUp); +#endif +} + +void CRecompilerOps::COP1_D_FLOOR_W (void) { //added by Witten + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + CPU_Message(" %X %s",Section->m_CompilePC,R4300iOpcodeName(m_CompileOpcode.Hex,Section->m_CompilePC)); + + CompileCop1Test(Section); + if (RegInStack(Section,m_CompileOpcode.fs,CRegInfo::FPU_Double) || RegInStack(Section,m_CompileOpcode.fs,CRegInfo::FPU_Qword)) { + UnMap_FPR(Section,m_CompileOpcode.fs,TRUE); + } + if (m_CompileOpcode.fd != m_CompileOpcode.fs || !RegInStack(Section,m_CompileOpcode.fd,CRegInfo::FPU_Double)) { + Load_FPR_ToTop(Section,m_CompileOpcode.fd,m_CompileOpcode.fs,CRegInfo::FPU_Double); + } + ChangeFPURegFormat(Section,m_CompileOpcode.fd,CRegInfo::FPU_Double,CRegInfo::FPU_Dword,CRegInfo::RoundDown); +#endif +} + +void CRecompilerOps::COP1_D_CVT_S (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + CPU_Message(" %X %s",Section->m_CompilePC,R4300iOpcodeName(m_CompileOpcode.Hex,Section->m_CompilePC)); + + CompileCop1Test(Section); + if (RegInStack(Section,m_CompileOpcode.fs,CRegInfo::FPU_Double) || RegInStack(Section,m_CompileOpcode.fs,CRegInfo::FPU_Qword)) { + UnMap_FPR(Section,m_CompileOpcode.fs,TRUE); + } + if (m_CompileOpcode.fd != m_CompileOpcode.fs || !RegInStack(Section,m_CompileOpcode.fd,CRegInfo::FPU_Double)) { + Load_FPR_ToTop(Section,m_CompileOpcode.fd,m_CompileOpcode.fs,CRegInfo::FPU_Double); + } + ChangeFPURegFormat(Section,m_CompileOpcode.fd,CRegInfo::FPU_Double,CRegInfo::FPU_Float,CRegInfo::RoundDefault); +#endif +} + +void CRecompilerOps::COP1_D_CVT_W (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + CPU_Message(" %X %s",Section->m_CompilePC,R4300iOpcodeName(m_CompileOpcode.Hex,Section->m_CompilePC)); + + CompileCop1Test(Section); + if (RegInStack(Section,m_CompileOpcode.fs,CRegInfo::FPU_Double) || RegInStack(Section,m_CompileOpcode.fs,CRegInfo::FPU_Qword)) { + UnMap_FPR(Section,m_CompileOpcode.fs,TRUE); + } + if (m_CompileOpcode.fd != m_CompileOpcode.fs || !RegInStack(Section,m_CompileOpcode.fd,CRegInfo::FPU_Double)) { + Load_FPR_ToTop(Section,m_CompileOpcode.fd,m_CompileOpcode.fs,CRegInfo::FPU_Double); + } + ChangeFPURegFormat(Section,m_CompileOpcode.fd,CRegInfo::FPU_Double,CRegInfo::FPU_Dword,CRegInfo::RoundDefault); +#endif +} + +void CRecompilerOps::COP1_D_CVT_L (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + CPU_Message(" %X %s",Section->m_CompilePC,R4300iOpcodeName(m_CompileOpcode.Hex,Section->m_CompilePC)); + + CompileCop1Test(Section); + if (RegInStack(Section,m_CompileOpcode.fs,CRegInfo::FPU_Double) || RegInStack(Section,m_CompileOpcode.fs,CRegInfo::FPU_Qword)) { + UnMap_FPR(Section,m_CompileOpcode.fs,TRUE); + } + if (m_CompileOpcode.fd != m_CompileOpcode.fs || !RegInStack(Section,m_CompileOpcode.fd,CRegInfo::FPU_Double)) { + Load_FPR_ToTop(Section,m_CompileOpcode.fd,m_CompileOpcode.fs,CRegInfo::FPU_Double); + } + ChangeFPURegFormat(Section,m_CompileOpcode.fd,CRegInfo::FPU_Double,CRegInfo::FPU_Qword,CRegInfo::RoundDefault); +#endif +} + +void CRecompilerOps::COP1_D_CMP (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + DWORD Reg1 = RegInStack(Section,m_CompileOpcode.ft, CRegInfo::FPU_Float)?m_CompileOpcode.ft:m_CompileOpcode.fs; + DWORD Reg2 = RegInStack(Section,m_CompileOpcode.ft, CRegInfo::FPU_Float)?m_CompileOpcode.fs:m_CompileOpcode.ft; + int x86reg, cmp = 0; + + + CPU_Message(" %X %s",Section->m_CompilePC,R4300iOpcodeName(m_CompileOpcode.Hex,Section->m_CompilePC)); + + CompileCop1Test(Section); + //if ((m_CompileOpcode.funct & 1) != 0) { CRecompilerOps::UnknownOpcode(Section); } + if ((m_CompileOpcode.funct & 2) != 0) { cmp |= 0x4000; } + if ((m_CompileOpcode.funct & 4) != 0) { cmp |= 0x0100; } + + Load_FPR_ToTop(Section,Reg1,Reg1, CRegInfo::FPU_Double); + Map_TempReg(Section,x86_EAX, 0, FALSE); + if (RegInStack(Section,Reg2, CRegInfo::FPU_Double)) { + fpuComReg(StackPosition(Section,Reg2),FALSE); + } else { + DWORD TempReg; + + UnMap_FPR(Section,Reg2,TRUE); + TempReg = Map_TempReg(Section,x86_Any,-1,FALSE); + sprintf(Name,"_FPRDoubleLocation[%d]",Reg2); + MoveVariableToX86reg((BYTE *)&_FPRDoubleLocation[Reg2],Name,TempReg); + Load_FPR_ToTop(Section,Reg1,Reg1, CRegInfo::FPU_Double); + fpuComQwordRegPointer(TempReg,FALSE); + } + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + AndConstToVariable(~FPCSR_C, &FSTATUS_REGISTER, "FSTATUS_REGISTER"); +#endif + fpuStoreStatus(); + x86reg = Map_TempReg(Section,x86_Any8Bit, 0, FALSE); + TestConstToX86Reg(cmp,x86_EAX); + Setnz(x86reg); + if (cmp != 0) { + TestConstToX86Reg(cmp,x86_EAX); + Setnz(x86reg); + + if ((m_CompileOpcode.funct & 1) != 0) { + int x86reg2 = Map_TempReg(Section,x86_Any8Bit, 0, FALSE); + AndConstToX86Reg(x86_EAX, 0x4300); + CompConstToX86reg(x86_EAX, 0x4300); + Setz(x86reg2); + + OrX86RegToX86Reg(x86reg, x86reg2); + } + } else if ((m_CompileOpcode.funct & 1) != 0) { + AndConstToX86Reg(x86_EAX, 0x4300); + CompConstToX86reg(x86_EAX, 0x4300); + Setz(x86reg); + } + ShiftLeftSignImmed(x86reg, 23); + OrX86RegToVariable(&_FPCR[31], "_FPCR[31]", x86reg); +#endif +} + +/************************** COP1: W functions ************************/ +void CRecompilerOps::COP1_W_CVT_S (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + CPU_Message(" %X %s",Section->m_CompilePC,R4300iOpcodeName(m_CompileOpcode.Hex,Section->m_CompilePC)); + + CompileCop1Test(Section); + if (m_CompileOpcode.fd != m_CompileOpcode.fs || !RegInStack(Section,m_CompileOpcode.fd,CRegInfo::FPU_Dword)) { + Load_FPR_ToTop(Section,m_CompileOpcode.fd,m_CompileOpcode.fs,CRegInfo::FPU_Dword); + } + ChangeFPURegFormat(Section,m_CompileOpcode.fd,CRegInfo::FPU_Dword,CRegInfo::FPU_Float,CRegInfo::RoundDefault); +#endif +} + +void CRecompilerOps::COP1_W_CVT_D (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + CPU_Message(" %X %s",Section->m_CompilePC,R4300iOpcodeName(m_CompileOpcode.Hex,Section->m_CompilePC)); + + CompileCop1Test(Section); + if (m_CompileOpcode.fd != m_CompileOpcode.fs || !RegInStack(Section,m_CompileOpcode.fd,CRegInfo::FPU_Dword)) { + Load_FPR_ToTop(Section,m_CompileOpcode.fd,m_CompileOpcode.fs,CRegInfo::FPU_Dword); + } + ChangeFPURegFormat(Section,m_CompileOpcode.fd,CRegInfo::FPU_Dword,CRegInfo::FPU_Double,CRegInfo::RoundDefault); +#endif +} + +/************************** COP1: L functions ************************/ +void CRecompilerOps::COP1_L_CVT_S (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + CPU_Message(" %X %s",Section->m_CompilePC,R4300iOpcodeName(m_CompileOpcode.Hex,Section->m_CompilePC)); + + CompileCop1Test(Section); + if (m_CompileOpcode.fd != m_CompileOpcode.fs || !RegInStack(Section,m_CompileOpcode.fd,CRegInfo::FPU_Qword)) { + Load_FPR_ToTop(Section,m_CompileOpcode.fd,m_CompileOpcode.fs,CRegInfo::FPU_Qword); + } + ChangeFPURegFormat(Section,m_CompileOpcode.fd,CRegInfo::FPU_Qword,CRegInfo::FPU_Float,CRegInfo::RoundDefault); +#endif +} + +void CRecompilerOps::COP1_L_CVT_D (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + CPU_Message(" %X %s",Section->m_CompilePC,R4300iOpcodeName(m_CompileOpcode.Hex,Section->m_CompilePC)); + + CompileCop1Test(Section); + if (m_CompileOpcode.fd != m_CompileOpcode.fs || !RegInStack(Section,m_CompileOpcode.fd,CRegInfo::FPU_Qword)) { + Load_FPR_ToTop(Section,m_CompileOpcode.fd,m_CompileOpcode.fs,CRegInfo::FPU_Qword); + } + ChangeFPURegFormat(Section,m_CompileOpcode.fd,CRegInfo::FPU_Qword,CRegInfo::FPU_Double,CRegInfo::RoundDefault); +#endif } /************************** Other functions **************************/ -void CRecompilerOps::Compile_UnknownOpcode (CCodeSection * m_Section) { - CPU_Message(" %X Unhandled Opcode: %s",m_Section->CompilePC, R4300iOpcodeName(Opcode.Hex,m_Section->CompilePC)); +void CRecompilerOps::UnknownOpcode (void) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + CPU_Message(" %X Unhandled Opcode: %s",m_CompilePC, R4300iOpcodeName(Opcode.Hex,m_CompilePC)); -// FreeSection(m_Section->ContinueSection,m_Section); -// FreeSection(m_Section->JumpSection,m_Section); - m_Section->BlockCycleCount() -= CountPerOp; - m_Section->BlockRandomModifier() -= 1; - MoveConstToVariable(m_Section->CompilePC,_PROGRAM_COUNTER,"PROGRAM_COUNTER"); +// FreeSection(m_Section->m_ContinueSection,m_Section); +// FreeSection(m_Section->m_JumpSection,m_Section); + m_RegWorkingSet.BlockCycleCount() -= CountPerOp; + m_RegWorkingSet.BlockRandomModifier() -= 1; + MoveConstToVariable(m_CompilePC,_PROGRAM_COUNTER,"PROGRAM_COUNTER"); WriteBackRegisters(m_Section); - _N64System->GetRecompiler()->UpdateCounters(&m_Section->BlockCycleCount(),&m_Section->BlockRandomModifier(),FALSE); + UpdateCounters(&m_RegWorkingSet.BlockCycleCount(),&m_RegWorkingSet.BlockRandomModifier(),FALSE); if (CPU_Type == CPU_SyncCores) { Call_Direct(SyncToPC, "SyncToPC"); } MoveConstToVariable(Opcode.Hex,&Opcode.Hex,"Opcode.Hex"); Call_Direct(R4300iOp::UnknownOpcode, "R4300iOp::UnknownOpcode"); Ret(); - if (NextInstruction == NORMAL) { NextInstruction = END_BLOCK; } + if (m_NextInstruction == NORMAL) { m_NextInstruction = END_BLOCK; } +#endif } +void CRecompilerOps::UpdateCounters ( CRegInfo & RegSet, bool CheckTimer, bool ClearValues ) +{ + if (RegSet.GetBlockCycleCount() != 0) + { +#ifdef tofix + if (m_SyncSystem) { + char text[100]; + + WriteX86Comment("Updating Sync CPU"); + Pushad(); + sprintf(text,"%d",(DWORD)*Cycles); + PushImm32(text,(DWORD)*Cycles); + Call_Direct(UpdateSyncCPU,"UpdateSyncCPU"); + Popad(); + } +#endif + WriteX86Comment("Update Counter"); + SubConstFromVariable(RegSet.GetBlockCycleCount(),_NextTimer,"_NextTimer"); // updates compare flag + if (ClearValues) + { + RegSet.SetBlockCycleCount(0); + } + } else if (CheckTimer) { + CompConstToVariable(0,_NextTimer,"_NextTimer"); + } + + if (CheckTimer) + { + JnsLabel8("Continue_From_Timer_Test",0); + BYTE * Jump = m_RecompPos - 1; + Pushad(); + X86BreakPoint(__FILE__,__LINE__); + MoveConstToX86reg((DWORD)_SystemTimer,x86_ECX); + Call_Direct(AddressOf(CSystemTimer::TimerDone),"CSystemTimer::TimerDone"); + Popad(); + + CPU_Message(""); + CPU_Message(" $Continue_From_Timer_Test:"); + SetJump8(Jump,m_RecompPos); + } +} -#endif \ No newline at end of file diff --git a/Source/Project64/N64 System/Recompiler/Recompiler Ops.h b/Source/Project64/N64 System/Recompiler/Recompiler Ops.h index 0fc4842f1..9e760eab7 100644 --- a/Source/Project64/N64 System/Recompiler/Recompiler Ops.h +++ b/Source/Project64/N64 System/Recompiler/Recompiler Ops.h @@ -1,188 +1,272 @@ -class CRecompilerOps -{ - CRecompilerOps(); +class CCodeSection; +class CRecompilerOps : + protected CX86Ops +{ protected: enum BRANCH_TYPE { BranchTypeCop1, BranchTypeRs, BranchTypeRsRt }; - typedef void (CRecompilerOps::* BranchFunction) (void); + typedef void ( * BranchFunction )(); - CRecompilerOps( CCodeSection * Section ); - /************************** Branch functions ************************/ - void Compile_Branch ( BranchFunction CompareFunc, BRANCH_TYPE BranchType, BOOL Link); - void Compile_BranchLikely ( BranchFunction CompareFunc, BOOL Link); - void BNE_Compare ( void ); - void BEQ_Compare ( void ); - void BGTZ_Compare ( void ); - void BLEZ_Compare ( void ); - void BLTZ_Compare ( void ); - void BGEZ_Compare ( void ); - void COP1_BCF_Compare ( void ); - void COP1_BCT_Compare ( void ); + static void Compile_Branch ( BranchFunction CompareFunc, BRANCH_TYPE BranchType, BOOL Link); + static void Compile_BranchLikely ( BranchFunction CompareFunc, BOOL Link); + static void BNE_Compare ( void ); + static void BEQ_Compare ( void ); + static void BGTZ_Compare ( void ); + static void BLEZ_Compare ( void ); + static void BLTZ_Compare ( void ); + static void BGEZ_Compare ( void ); + static void COP1_BCF_Compare ( void ); + static void COP1_BCT_Compare ( void ); /************************* OpCode functions *************************/ - void Compile_J ( void ); - void Compile_JAL ( void ); - void Compile_ADDI ( void ); - void Compile_ADDIU ( void ); - void Compile_SLTI ( void ); - void Compile_SLTIU ( void ); - void Compile_ANDI ( void ); - void Compile_ORI ( void ); - void Compile_XORI ( void ); - void Compile_LUI ( void ); - void Compile_DADDIU ( void ); - void Compile_LDL ( void ); - void Compile_LDR ( void ); - void Compile_LB ( void ); - void Compile_LH ( void ); - void Compile_LWL ( void ); - void Compile_LW ( void ); - void Compile_LBU ( void ); - void Compile_LHU ( void ); - void Compile_LWR ( void ); - void Compile_LWU ( void ); //added by Witten - void Compile_SB ( void ); - void Compile_SH ( void ); - void Compile_SWL ( void ); - void Compile_SW ( void ); - void Compile_SWR ( void ); - void Compile_SDL ( void ); - void Compile_SDR ( void ); - void Compile_CACHE ( void ); - void Compile_LL ( void ); - void Compile_LWC1 ( void ); - void Compile_LDC1 ( void ); - void Compile_LD ( void ); - void Compile_SC ( void ); - void Compile_SWC1 ( void ); - void Compile_SDC1 ( void ); - void Compile_SD ( void ); + static void J ( void ); + static void JAL ( void ); + static void ADDI ( void ); + static void ADDIU ( void ); + static void SLTI ( void ); + static void SLTIU ( void ); + static void ANDI ( void ); + static void ORI ( void ); + static void XORI ( void ); + static void LUI ( void ); + static void DADDIU ( void ); + static void LDL ( void ); + static void LDR ( void ); + static void LB ( void ); + static void LH ( void ); + static void LWL ( void ); + static void LW ( void ); + static void LBU ( void ); + static void LHU ( void ); + static void LWR ( void ); + static void LWU ( void ); //added by Witten + static void SB ( void ); + static void SH ( void ); + static void SWL ( void ); + static void SW ( void ); + static void SWR ( void ); + static void SDL ( void ); + static void SDR ( void ); + static void CACHE ( void ); + static void LL ( void ); + static void LWC1 ( void ); + static void LDC1 ( void ); + static void LD ( void ); + static void SC ( void ); + static void SWC1 ( void ); + static void SDC1 ( void ); + static void SD ( void ); /********************** R4300i OpCodes: Special **********************/ - void Compile_SPECIAL_SLL ( void ); - void Compile_SPECIAL_SRL ( void ); - void Compile_SPECIAL_SRA ( void ); - void Compile_SPECIAL_SLLV ( void ); - void Compile_SPECIAL_SRLV ( void ); - void Compile_SPECIAL_SRAV ( void ); - void Compile_SPECIAL_JR ( void ); - void Compile_SPECIAL_JALR ( void ); - void Compile_SPECIAL_SYSCALL( void ); - void Compile_SPECIAL_MFLO ( void ); - void Compile_SPECIAL_MTLO ( void ); - void Compile_SPECIAL_MFHI ( void ); - void Compile_SPECIAL_MTHI ( void ); - void Compile_SPECIAL_DSLLV ( void ); - void Compile_SPECIAL_DSRLV ( void ); - void Compile_SPECIAL_DSRAV ( void ); - void Compile_SPECIAL_MULT ( void ); - void Compile_SPECIAL_MULTU ( void ); - void Compile_SPECIAL_DIV ( void ); - void Compile_SPECIAL_DIVU ( void ); - void Compile_SPECIAL_DMULT ( void ); - void Compile_SPECIAL_DMULTU ( void ); - void Compile_SPECIAL_DDIV ( void ); - void Compile_SPECIAL_DDIVU ( void ); - void Compile_SPECIAL_ADD ( void ); - void Compile_SPECIAL_ADDU ( void ); - void Compile_SPECIAL_SUB ( void ); - void Compile_SPECIAL_SUBU ( void ); - void Compile_SPECIAL_AND ( void ); - void Compile_SPECIAL_OR ( void ); - void Compile_SPECIAL_XOR ( void ); - void Compile_SPECIAL_NOR ( void ); - void Compile_SPECIAL_SLT ( void ); - void Compile_SPECIAL_SLTU ( void ); - void Compile_SPECIAL_DADD ( void ); - void Compile_SPECIAL_DADDU ( void ); - void Compile_SPECIAL_DSUB ( void ); - void Compile_SPECIAL_DSUBU ( void ); - void Compile_SPECIAL_DSLL ( void ); - void Compile_SPECIAL_DSRL ( void ); - void Compile_SPECIAL_DSRA ( void ); - void Compile_SPECIAL_DSLL32 ( void ); - void Compile_SPECIAL_DSRL32 ( void ); - void Compile_SPECIAL_DSRA32 ( void ); + static void SPECIAL_SLL ( void ); + static void SPECIAL_SRL ( void ); + static void SPECIAL_SRA ( void ); + static void SPECIAL_SLLV ( void ); + static void SPECIAL_SRLV ( void ); + static void SPECIAL_SRAV ( void ); + static void SPECIAL_JR ( void ); + static void SPECIAL_JALR ( void ); + static void SPECIAL_SYSCALL( void ); + static void SPECIAL_MFLO ( void ); + static void SPECIAL_MTLO ( void ); + static void SPECIAL_MFHI ( void ); + static void SPECIAL_MTHI ( void ); + static void SPECIAL_DSLLV ( void ); + static void SPECIAL_DSRLV ( void ); + static void SPECIAL_DSRAV ( void ); + static void SPECIAL_MULT ( void ); + static void SPECIAL_MULTU ( void ); + static void SPECIAL_DIV ( void ); + static void SPECIAL_DIVU ( void ); + static void SPECIAL_DMULT ( void ); + static void SPECIAL_DMULTU ( void ); + static void SPECIAL_DDIV ( void ); + static void SPECIAL_DDIVU ( void ); + static void SPECIAL_ADD ( void ); + static void SPECIAL_ADDU ( void ); + static void SPECIAL_SUB ( void ); + static void SPECIAL_SUBU ( void ); + static void SPECIAL_AND ( void ); + static void SPECIAL_OR ( void ); + static void SPECIAL_XOR ( void ); + static void SPECIAL_NOR ( void ); + static void SPECIAL_SLT ( void ); + static void SPECIAL_SLTU ( void ); + static void SPECIAL_DADD ( void ); + static void SPECIAL_DADDU ( void ); + static void SPECIAL_DSUB ( void ); + static void SPECIAL_DSUBU ( void ); + static void SPECIAL_DSLL ( void ); + static void SPECIAL_DSRL ( void ); + static void SPECIAL_DSRA ( void ); + static void SPECIAL_DSLL32 ( void ); + static void SPECIAL_DSRL32 ( void ); + static void SPECIAL_DSRA32 ( void ); /************************** COP0 functions **************************/ - void Compile_COP0_MF ( void ); - void Compile_COP0_MT ( void ); + static void COP0_MF ( void ); + static void COP0_MT ( void ); /************************** COP0 CO functions ***********************/ - void Compile_COP0_CO_TLBR ( void ); - void Compile_COP0_CO_TLBWI ( void ); - void Compile_COP0_CO_TLBWR ( void ); - void Compile_COP0_CO_TLBP ( void ); - void Compile_COP0_CO_ERET ( void ); + static void COP0_CO_TLBR ( void ); + static void COP0_CO_TLBWI ( void ); + static void COP0_CO_TLBWR ( void ); + static void COP0_CO_TLBP ( void ); + static void COP0_CO_ERET ( void ); /************************** COP1 functions **************************/ - void Compile_COP1_MF ( void ); - void Compile_COP1_DMF ( void ); - void Compile_COP1_CF ( void ); - void Compile_COP1_MT ( void ); - void Compile_COP1_DMT ( void ); - void Compile_COP1_CT ( void ); + static void COP1_MF ( void ); + static void COP1_DMF ( void ); + static void COP1_CF ( void ); + static void COP1_MT ( void ); + static void COP1_DMT ( void ); + static void COP1_CT ( void ); /************************** COP1: S functions ************************/ - void Compile_COP1_S_ADD ( void ); - void Compile_COP1_S_SUB ( void ); - void Compile_COP1_S_MUL ( void ); - void Compile_COP1_S_DIV ( void ); - void Compile_COP1_S_ABS ( void ); - void Compile_COP1_S_NEG ( void ); - void Compile_COP1_S_SQRT ( void ); - void Compile_COP1_S_MOV ( void ); - void Compile_COP1_S_TRUNC_L ( void ); - void Compile_COP1_S_CEIL_L ( void ); //added by Witten - void Compile_COP1_S_FLOOR_L ( void ); //added by Witten - void Compile_COP1_S_ROUND_W ( void ); - void Compile_COP1_S_TRUNC_W ( void ); - void Compile_COP1_S_CEIL_W ( void ); //added by Witten - void Compile_COP1_S_FLOOR_W ( void ); - void Compile_COP1_S_CVT_D ( void ); - void Compile_COP1_S_CVT_W ( void ); - void Compile_COP1_S_CVT_L ( void ); - void Compile_COP1_S_CMP ( void ); + static void COP1_S_ADD ( void ); + static void COP1_S_SUB ( void ); + static void COP1_S_MUL ( void ); + static void COP1_S_DIV ( void ); + static void COP1_S_ABS ( void ); + static void COP1_S_NEG ( void ); + static void COP1_S_SQRT ( void ); + static void COP1_S_MOV ( void ); + static void COP1_S_TRUNC_L ( void ); + static void COP1_S_CEIL_L ( void ); //added by Witten + static void COP1_S_FLOOR_L ( void ); //added by Witten + static void COP1_S_ROUND_W ( void ); + static void COP1_S_TRUNC_W ( void ); + static void COP1_S_CEIL_W ( void ); //added by Witten + static void COP1_S_FLOOR_W ( void ); + static void COP1_S_CVT_D ( void ); + static void COP1_S_CVT_W ( void ); + static void COP1_S_CVT_L ( void ); + static void COP1_S_CMP ( void ); /************************** COP1: D functions ************************/ - void Compile_COP1_D_ADD ( void ); - void Compile_COP1_D_SUB ( void ); - void Compile_COP1_D_MUL ( void ); - void Compile_COP1_D_DIV ( void ); - void Compile_COP1_D_ABS ( void ); - void Compile_COP1_D_NEG ( void ); - void Compile_COP1_D_SQRT ( void ); - void Compile_COP1_D_MOV ( void ); - void Compile_COP1_D_TRUNC_L ( void ); //added by Witten - void Compile_COP1_D_CEIL_L ( void ); //added by Witten - void Compile_COP1_D_FLOOR_L ( void ); //added by Witten - void Compile_COP1_D_ROUND_W ( void ); - void Compile_COP1_D_TRUNC_W ( void ); - void Compile_COP1_D_CEIL_W ( void ); //added by Witten - void Compile_COP1_D_FLOOR_W ( void ); //added by Witten - void Compile_COP1_D_CVT_S ( void ); - void Compile_COP1_D_CVT_W ( void ); - void Compile_COP1_D_CVT_L ( void ); - void Compile_COP1_D_CMP ( void ); + static void COP1_D_ADD ( void ); + static void COP1_D_SUB ( void ); + static void COP1_D_MUL ( void ); + static void COP1_D_DIV ( void ); + static void COP1_D_ABS ( void ); + static void COP1_D_NEG ( void ); + static void COP1_D_SQRT ( void ); + static void COP1_D_MOV ( void ); + static void COP1_D_TRUNC_L ( void ); //added by Witten + static void COP1_D_CEIL_L ( void ); //added by Witten + static void COP1_D_FLOOR_L ( void ); //added by Witten + static void COP1_D_ROUND_W ( void ); + static void COP1_D_TRUNC_W ( void ); + static void COP1_D_CEIL_W ( void ); //added by Witten + static void COP1_D_FLOOR_W ( void ); //added by Witten + static void COP1_D_CVT_S ( void ); + static void COP1_D_CVT_W ( void ); + static void COP1_D_CVT_L ( void ); + static void COP1_D_CMP ( void ); /************************** COP1: W functions ************************/ - void Compile_COP1_W_CVT_S ( void ); - void Compile_COP1_W_CVT_D ( void ); + static void COP1_W_CVT_S ( void ); + static void COP1_W_CVT_D ( void ); /************************** COP1: L functions ************************/ - void Compile_COP1_L_CVT_S ( void ); - void Compile_COP1_L_CVT_D ( void ); + static void COP1_L_CVT_S ( void ); + static void COP1_L_CVT_D ( void ); /************************** Other functions **************************/ - void Compile_UnknownOpcode ( void ); - void CompileReadTLBMiss (CCodeSection * Section, int AddressReg, int LookUpReg ); - void CompileWriteTLBMiss (CCodeSection * Section, int AddressReg, int LookUpReg ); + static void UnknownOpcode ( void ); + + static void CompileReadTLBMiss (CCodeSection * Section, int AddressReg, int LookUpReg ); + static void CompileWriteTLBMiss (CCodeSection * Section, int AddressReg, int LookUpReg ); + static void UpdateCounters (CRegInfo & RegSet, bool CheckTimer, bool ClearValues = false ); -private: - CCodeSection * m_Section; + + + static STEP_TYPE m_NextInstruction; + static DWORD m_CompilePC; + static OPCODE m_Opcode; + static CRegInfo m_RegWorkingSet; + static CCodeSection * m_Section; + + /********* Helper Functions *********/ + typedef CRegInfo::REG_STATE REG_STATE; + + static inline REG_STATE cMipsRegState ( int Reg ) { return m_RegWorkingSet.cMipsRegState(Reg); } + static inline unsigned __int64 cMipsReg ( int Reg ) { return m_RegWorkingSet.cMipsReg(Reg); } + static inline __int64 cMipsReg_S ( int Reg ) { return m_RegWorkingSet.cMipsReg_S(Reg); } + static inline DWORD cMipsRegLo ( int Reg ) { return m_RegWorkingSet.cMipsRegLo(Reg); } + static inline long cMipsRegLo_S ( int Reg ) { return m_RegWorkingSet.cMipsRegLo_S(Reg); } + static inline DWORD cMipsRegHi ( int Reg ) { return m_RegWorkingSet.cMipsRegHi(Reg); } + static inline long cMipsRegHi_S ( int Reg ) { return m_RegWorkingSet.cMipsRegHi_S(Reg); } + static inline CX86Ops::x86Reg cMipsRegMapLo ( int Reg ) { return m_RegWorkingSet.cMipsRegMapLo(Reg); } + static inline CX86Ops::x86Reg cMipsRegMapHi ( int Reg ) { return m_RegWorkingSet.cMipsRegMapHi(Reg); } + + static inline REG_STATE & MipsRegState ( int Reg ) { return m_RegWorkingSet.MipsRegState(Reg); } + static inline unsigned _int64 & MipsReg ( int Reg ) { return m_RegWorkingSet.MipsReg(Reg); } + static inline _int64 & MipsReg_S ( int Reg ) { return m_RegWorkingSet.MipsReg_S(Reg); } + static inline DWORD & MipsRegLo ( int Reg ) { return m_RegWorkingSet.MipsRegLo(Reg); } + static inline long & MipsRegLo_S ( int Reg ) { return m_RegWorkingSet.MipsRegLo_S(Reg); } + static inline DWORD & MipsRegHi ( int Reg ) { return m_RegWorkingSet.MipsRegHi(Reg); } + static inline long & MipsRegHi_S ( int Reg ) { return m_RegWorkingSet.MipsRegHi_S(Reg); } + static inline CX86Ops::x86Reg & MipsRegMapLo ( int Reg ) { return m_RegWorkingSet.MipsRegMapLo(Reg); } + static inline CX86Ops::x86Reg & MipsRegMapHi ( int Reg ) { return m_RegWorkingSet.MipsRegMapHi(Reg); } + + static inline bool IsKnown ( int Reg ) { return m_RegWorkingSet.IsKnown(Reg); } + static inline bool IsUnknown ( int Reg ) { return m_RegWorkingSet.IsUnknown(Reg); } + static inline bool IsMapped ( int Reg ) { return m_RegWorkingSet.IsMapped(Reg); } + static inline bool IsConst ( int Reg ) { return m_RegWorkingSet.IsConst(Reg); } + static inline bool IsSigned ( int Reg ) { return m_RegWorkingSet.IsSigned(Reg); } + static inline bool IsUnsigned ( int Reg ) { return m_RegWorkingSet.IsUnsigned(Reg); } + static inline bool Is32Bit ( int Reg ) { return m_RegWorkingSet.Is32Bit(Reg); } + static inline bool Is64Bit ( int Reg ) { return m_RegWorkingSet.Is64Bit(Reg); } + static inline bool Is32BitMapped ( int Reg ) { return m_RegWorkingSet.Is32BitMapped(Reg); } + static inline bool Is64BitMapped ( int Reg ) { return m_RegWorkingSet.Is64BitMapped(Reg); } + + static inline x86Reg FreeX86Reg ( void ) + { + return m_RegWorkingSet.FreeX86Reg(); + } + static inline x86Reg Free8BitX86Reg ( void ) + { + return m_RegWorkingSet.Free8BitX86Reg(); + } + static inline void Map_GPR_32bit ( int Reg, BOOL SignValue, int MipsRegToLoad ) + { + m_RegWorkingSet.Map_GPR_32bit(Reg,SignValue,MipsRegToLoad); + } + static inline void Map_GPR_64bit ( int Reg, int MipsRegToLoad ) + { + m_RegWorkingSet.Map_GPR_64bit(Reg,MipsRegToLoad); + } + static inline x86Reg Map_TempReg ( x86Reg Reg, int MipsReg, BOOL LoadHiWord ) + { + return m_RegWorkingSet.Map_TempReg(Reg,MipsReg,LoadHiWord); + } + static inline void ProtectGPR ( DWORD Reg ) + { + m_RegWorkingSet.ProtectGPR(Reg); + } + static inline void ResetX86Protection ( void ) + { + m_RegWorkingSet.ResetX86Protection(); + } + static inline x86Reg UnMap_TempReg ( void ) + { + return m_RegWorkingSet.UnMap_TempReg(); + } + static inline void UnMap_GPR ( DWORD Reg, bool WriteBackValue ) + { + m_RegWorkingSet.UnMap_GPR(Reg,WriteBackValue); + } + static inline bool UnMap_X86reg ( x86Reg Reg ) + { + return m_RegWorkingSet.UnMap_X86reg(Reg); + } + +public: + static DWORD CompilePC ( void ) { return m_CompilePC; } }; \ No newline at end of file diff --git a/Source/Project64/N64 System/Recompiler/Reg Info.cpp b/Source/Project64/N64 System/Recompiler/Reg Info.cpp new file mode 100644 index 000000000..4f3839fac --- /dev/null +++ b/Source/Project64/N64 System/Recompiler/Reg Info.cpp @@ -0,0 +1,771 @@ +#include "stdafx.h" + +unsigned int CRegInfo::m_fpuControl = 0; + +void CRegInfo::Initilize ( void ) +{ + int count; + + MIPS_RegState[0] = STATE_CONST_32; + MIPS_RegVal[0].DW = 0; + RegMapLo[0] = x86_Unknown; + RegMapHi[0] = x86_Unknown; + + for (count = 1; count < 32; count ++ ) { + MIPS_RegState[count] = STATE_UNKNOWN; + MIPS_RegVal[count].DW = 0; + RegMapLo[count] = x86_Unknown; + RegMapHi[count] = x86_Unknown; + } + for (count = 0; count < 10; count ++ ) { + x86reg_MappedTo[count] = NotMapped; + x86reg_Protected[count] = false; + x86reg_MapOrder[count] = 0; + } + m_CycleCount = 0; + + Stack_TopPos = 0; + for (count = 0; count < 8; count ++ ) { + x86fpu_MappedTo[count] = -1; + x86fpu_State[count] = FPU_Unkown; + x86fpu_RoundingModel[count] = RoundDefault; + } + Fpu_Used = false; + RoundingModel = RoundUnknown; +} + +void CRegInfo::FixRoundModel(FPU_ROUND RoundMethod ) +{ + if (CurrentRoundingModel() == RoundMethod) + { + return; + } + + m_fpuControl = 0; + fpuStoreControl(&m_fpuControl, "m_fpuControl"); + x86Reg reg = Map_TempReg(x86_Any,-1,FALSE); + MoveVariableToX86reg(&m_fpuControl, "m_fpuControl", reg); + AndConstToX86Reg(reg, 0xF3FF); + + switch (RoundMethod) { + case CRegInfo::RoundDefault: OrVariableToX86Reg(&_Reg->m_RoundingModel,"FPU_RoundingMode", reg); break; + case CRegInfo::RoundTruncate: OrConstToX86Reg(0x0C00, reg); break; + case CRegInfo::RoundNearest: /*OrConstToX86Reg(0x0000, reg);*/ break; + case CRegInfo::RoundDown: OrConstToX86Reg(0x0400, reg); break; + case CRegInfo::RoundUp: OrConstToX86Reg(0x0800, reg); break; + default: + DisplayError("Unknown Rounding model"); + } + MoveX86regToVariable(reg, &m_fpuControl, "m_fpuControl"); + fpuLoadControl(&m_fpuControl, "m_fpuControl"); + CurrentRoundingModel() = RoundMethod; +} + +CX86Ops::x86Reg CRegInfo::FreeX86Reg ( void ) +{ + if (x86Mapped(x86_EDI) == NotMapped && !x86Protected(x86_EDI)) { return x86_EDI; } + if (x86Mapped(x86_ESI) == NotMapped && !x86Protected(x86_ESI)) { return x86_ESI; } + if (x86Mapped(x86_EBX) == NotMapped && !x86Protected(x86_EBX)) { return x86_EBX; } + if (x86Mapped(x86_EAX) == NotMapped && !x86Protected(x86_EAX)) { return x86_EAX; } + if (x86Mapped(x86_EDX) == NotMapped && !x86Protected(x86_EDX)) { return x86_EDX; } + if (x86Mapped(x86_ECX) == NotMapped && !x86Protected(x86_ECX)) { return x86_ECX; } + + x86Reg Reg = UnMap_TempReg(); + if (Reg != x86_Unknown) { return Reg; } + + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + int count, MapCount[10], MapReg[10]; + for (count = 0; count < 10; count ++) + { + MapCount[count] = x86MapOrder(count); + MapReg[count] = count; + } + for (count = 0; count < 10; count ++) { + int i; + + for (i = 0; i < 9; i ++) { + int temp; + + if (MapCount[i] < MapCount[i+1]) { + temp = MapCount[i]; + MapCount[i] = MapCount[i+1]; + MapCount[i+1] = temp; + temp = MapReg[i]; + MapReg[i] = MapReg[i+1]; + MapReg[i+1] = temp; + } + } + + } + + x86Reg StackReg = x86_Unknown; + for (count = 0; count < 10; count ++) + { + if (MapCount[count] > 0 && x86Mapped(MapReg[count]) != CRegInfo::Stack_Mapped) + { + if (UnMap_X86reg((x86Reg)MapReg[count])) + { + return (x86Reg)MapReg[count]; + } + } + if (x86Mapped(MapReg[count]) == CRegInfo::Stack_Mapped) { StackReg = MapReg[count]; } + } + if (StackReg != x86_Unknown) { + UnMap_X86reg(StackReg); + return StackReg; + } +#endif + return x86_Unknown; +} + +CX86Ops::x86Reg CRegInfo::Free8BitX86Reg ( void ) +{ + + if (x86Mapped(x86_EBX) == NotMapped && !x86Protected(x86_EBX)) {return x86_EBX; } + if (x86Mapped(x86_EAX) == NotMapped && !x86Protected(x86_EAX)) {return x86_EAX; } + if (x86Mapped(x86_EDX) == NotMapped && !x86Protected(x86_EDX)) {return x86_EDX; } + if (x86Mapped(x86_ECX) == NotMapped && !x86Protected(x86_ECX)) {return x86_ECX; } + + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + int x86Reg, count, MapCount[10], MapReg[10]; + + x86Reg = UnMap_8BitTempReg(Section); + if (x86Reg > 0) { return x86Reg; } + + for (count = 0; count < 10; count ++) { + MapCount[count] = x86MapOrder(count); + MapReg[count] = count; + } + for (count = 0; count < 10; count ++) { + int i; + + for (i = 0; i < 9; i ++) { + int temp; + + if (MapCount[i] < MapCount[i+1]) { + temp = MapCount[i]; + MapCount[i] = MapCount[i+1]; + MapCount[i+1] = temp; + temp = MapReg[i]; + MapReg[i] = MapReg[i+1]; + MapReg[i+1] = temp; + } + } + + } + for (count = 0; count < 10; count ++) { + if (MapCount[count] > 0) { + if (!Is8BitReg(count)) { continue; } + if (UnMap_X86reg(Section,count)) { + return count; + } + } + } + +#endif + return x86_Unknown; +} + +void CRegInfo::Map_GPR_32bit (int MipsReg, BOOL SignValue, int MipsRegToLoad) +{ + int count; + + x86Reg Reg; + if (MipsReg == 0) { +#ifndef EXTERNAL_RELEASE + DisplayError("Map_GPR_32bit\n\nWhy are you trying to map reg 0"); +#endif + return; + } + + if (IsUnknown(MipsReg) || IsConst(MipsReg)) { + Reg = FreeX86Reg(); + if (Reg < 0) { +#ifndef EXTERNAL_RELEASE + DisplayError("Map_GPR_32bit\n\nOut of registers"); + BreakPoint(__FILE__,__LINE__); +#endif + return; + } + CPU_Message(" regcache: allocate %s to %s",x86_Name(Reg),CRegName::GPR[MipsReg]); + } else { + if (Is64Bit(MipsReg)) { + CPU_Message(" regcache: unallocate %s from high 32bit of %s",x86_Name(MipsRegMapHi(MipsReg)),CRegName::GPR_Hi[MipsReg]); + x86MapOrder(MipsRegHi(MipsReg)) = 0; + x86Mapped(MipsRegHi(MipsReg)) = CRegInfo::NotMapped; + x86Protected(MipsRegHi(MipsReg)) = FALSE; + MipsRegHi(MipsReg) = 0; + } + Reg = MipsRegMapLo(MipsReg); + } + for (count = 0; count < 10; count ++) { + if (x86MapOrder(count) > 0) { + x86MapOrder(count) += 1; + } + } + x86MapOrder(Reg) = 1; + + if (MipsRegToLoad > 0) { + if (IsUnknown(MipsRegToLoad)) { + MoveVariableToX86reg(&_GPR[MipsRegToLoad].UW[0],CRegName::GPR_Lo[MipsRegToLoad],Reg); + } else if (IsMapped(MipsRegToLoad)) { + if (MipsReg != MipsRegToLoad) { + MoveX86RegToX86Reg(MipsRegMapLo(MipsRegToLoad),Reg); + } + } else { + MoveConstToX86reg(MipsRegLo(MipsRegToLoad),Reg); + } + } else if (MipsRegToLoad == 0) { + XorX86RegToX86Reg(Reg,Reg); + } + x86Mapped(Reg) = CRegInfo::GPR_Mapped; + x86Protected(Reg) = TRUE; + MipsRegMapLo(MipsReg) = Reg; + MipsRegState(MipsReg) = SignValue ? CRegInfo::STATE_MAPPED_32_SIGN : CRegInfo::STATE_MAPPED_32_ZERO; +} + +void CRegInfo::Map_GPR_64bit ( int MipsReg, int MipsRegToLoad) +{ + x86Reg x86Hi, x86lo; + int count; + + if (MipsReg == 0) { +#ifndef EXTERNAL_RELEASE + DisplayError("Map_GPR_32bit\n\nWhy are you trying to map reg 0"); +#endif + return; + } + + ProtectGPR(MipsReg); + if (IsUnknown(MipsReg) || IsConst(MipsReg)) { + x86Hi = FreeX86Reg(); + if (x86Hi < 0) { DisplayError("Map_GPR_64bit\n\nOut of registers"); return; } + x86Protected(x86Hi) = TRUE; + + x86lo = FreeX86Reg(); + if (x86lo < 0) { DisplayError("Map_GPR_64bit\n\nOut of registers"); return; } + x86Protected(x86lo) = TRUE; + + CPU_Message(" regcache: allocate %s to hi word of %s",x86_Name(x86Hi),CRegName::GPR[MipsReg]); + CPU_Message(" regcache: allocate %s to low word of %s",x86_Name(x86lo),CRegName::GPR[MipsReg]); + } else { + x86lo = MipsRegMapLo(MipsReg); + if (Is32Bit(MipsReg)) { + x86Protected(x86lo) = TRUE; + x86Hi = FreeX86Reg(); + if (x86Hi < 0) { DisplayError("Map_GPR_64bit\n\nOut of registers"); return; } + x86Protected(x86Hi) = TRUE; + } else { + x86Hi = MipsRegMapHi(MipsReg); + } + } + + for (count = 0; count < 10; count ++) { + if (x86MapOrder(count) > 0) { x86MapOrder(count) += 1; } + } + + x86MapOrder(x86Hi) = 1; + x86MapOrder(x86lo) = 1; + if (MipsRegToLoad > 0) { + if (IsUnknown(MipsRegToLoad)) { + MoveVariableToX86reg(&_GPR[MipsRegToLoad].UW[1],CRegName::GPR_Hi[MipsRegToLoad],x86Hi); + MoveVariableToX86reg(&_GPR[MipsRegToLoad].UW[0],CRegName::GPR_Lo[MipsRegToLoad],x86lo); + } else if (IsMapped(MipsRegToLoad)) { + if (Is32Bit(MipsRegToLoad)) { + if (IsSigned(MipsRegToLoad)) { + MoveX86RegToX86Reg(MipsRegMapLo(MipsRegToLoad),x86Hi); + ShiftRightSignImmed(x86Hi,31); + } else { + XorX86RegToX86Reg(x86Hi,x86Hi); + } + if (MipsReg != MipsRegToLoad) { + MoveX86RegToX86Reg(MipsRegMapLo(MipsRegToLoad),x86lo); + } + } else { + if (MipsReg != MipsRegToLoad) { + MoveX86RegToX86Reg(MipsRegMapHi(MipsRegToLoad),x86Hi); + MoveX86RegToX86Reg(MipsRegMapLo(MipsRegToLoad),x86lo); + } + } + } else { +CPU_Message("Map_GPR_64bit 11"); + if (Is32Bit(MipsRegToLoad)) { + if (IsSigned(MipsRegToLoad)) { + MoveConstToX86reg((int)MipsRegLo(MipsRegToLoad) >> 31,x86Hi); + } else { + MoveConstToX86reg(0,x86Hi); + } + } else { + MoveConstToX86reg(MipsRegHi(MipsRegToLoad),x86Hi); + } + MoveConstToX86reg(MipsRegLo(MipsRegToLoad),x86lo); + } + } else if (MipsRegToLoad == 0) { + XorX86RegToX86Reg(x86Hi,x86Hi); + XorX86RegToX86Reg(x86lo,x86lo); + } + x86Mapped(x86Hi) = CRegInfo::GPR_Mapped; + x86Mapped(x86lo) = CRegInfo::GPR_Mapped; + MipsRegMapHi(MipsReg) = x86Hi; + MipsRegMapLo(MipsReg) = x86lo; + MipsRegState(MipsReg) = CRegInfo::STATE_MAPPED_64; +} + +CX86Ops::x86Reg CRegInfo::Map_TempReg (CX86Ops::x86Reg Reg, int MipsReg, BOOL LoadHiWord) +{ + int count; + + if (Reg == x86_Any) + { + if (x86Mapped(x86_EAX) == Temp_Mapped && !x86Protected(x86_EAX)) { Reg = x86_EAX; } + else if (x86Mapped(x86_EBX) == Temp_Mapped && !x86Protected(x86_EBX)) { Reg = x86_EBX; } + else if (x86Mapped(x86_ECX) == Temp_Mapped && !x86Protected(x86_ECX)) { Reg = x86_ECX; } + else if (x86Mapped(x86_EDX) == Temp_Mapped && !x86Protected(x86_EDX)) { Reg = x86_EDX; } + else if (x86Mapped(x86_ESI) == Temp_Mapped && !x86Protected(x86_ESI)) { Reg = x86_ESI; } + else if (x86Mapped(x86_EDI) == Temp_Mapped && !x86Protected(x86_EDI)) { Reg = x86_EDI; } + else if (x86Mapped(x86_EBP) == Temp_Mapped && !x86Protected(x86_EBP)) { Reg = x86_EBP; } + else if (x86Mapped(x86_ESP) == Temp_Mapped && !x86Protected(x86_ESP)) { Reg = x86_ESP; } + + if (Reg == x86_Any) { + Reg = FreeX86Reg(); + if (Reg == x86_Unknown) + { + WriteTrace(TraceError,"CRegInfo::Map_TempReg: Failed to find a free register"); + _Notify->BreakPoint(__FILE__,__LINE__); + return x86_Unknown; + } + CPU_Message(" regcache: allocate %s as temp storage",x86_Name(Reg)); + } + } + else if (Reg == x86_Any8Bit) + { + if (x86Mapped(x86_EAX) == Temp_Mapped && !x86Protected(x86_EAX)) { Reg = x86_EAX; } + else if (x86Mapped(x86_EBX) == Temp_Mapped && !x86Protected(x86_EBX)) { Reg = x86_EBX; } + else if (x86Mapped(x86_ECX) == Temp_Mapped && !x86Protected(x86_ECX)) { Reg = x86_ECX; } + else if (x86Mapped(x86_EDX) == Temp_Mapped && !x86Protected(x86_EDX)) { Reg = x86_EDX; } + + if (Reg == x86_Any8Bit) + { + Reg = Free8BitX86Reg(); + if (Reg < 0) { + WriteTrace(TraceError,"CRegInfo::Map_TempReg: Failed to find a free 8 bit register"); + _Notify->BreakPoint(__FILE__,__LINE__); + return x86_Unknown; + } + } + } else if (x86Mapped(Reg) == GPR_Mapped) { + if (x86Protected(Reg)) + { + WriteTrace(TraceError,"CRegInfo::Map_TempReg: Register is protected"); + _Notify->BreakPoint(__FILE__,__LINE__); + return x86_Unknown; + } + + x86Protected(Reg) = true; + x86Reg NewReg = FreeX86Reg(); + for (count = 1; count < 32; count ++) + { + if (!IsMapped(count)) + { + continue; + } + if (cMipsRegMapLo(count) == Reg) + { + if (NewReg == x86_Unknown) + { + UnMap_GPR(count,TRUE); + break; + } + CPU_Message(" regcache: change allocation of %s from %s to %s",CRegName::GPR[count],x86_Name(Reg),x86_Name(NewReg)); + x86Mapped(NewReg) = GPR_Mapped; + x86MapOrder(NewReg) = x86MapOrder(Reg); + MipsRegMapLo(count) = NewReg; + MoveX86RegToX86Reg(Reg,NewReg); + if (MipsReg == count && LoadHiWord == FALSE) { MipsReg = -1; } + break; + } + if (Is64Bit(count) && cMipsRegMapHi(count) == Reg) + { + if (NewReg == x86_Unknown) + { + UnMap_GPR(count,TRUE); + break; + } + CPU_Message(" regcache: change allocation of %s from %s to %s",CRegName::GPR_Hi[count],x86_Name(Reg),x86_Name(NewReg)); + x86Mapped(NewReg) = GPR_Mapped; + x86MapOrder(NewReg) = x86MapOrder(Reg); + MipsRegMapHi(count) = NewReg; + MoveX86RegToX86Reg(Reg,NewReg); + if (MipsReg == count && LoadHiWord == TRUE) { MipsReg = -1; } + break; + } + } + } + else if (x86Mapped(Reg) == Stack_Mapped) + { + UnMap_X86reg(Reg); + } + CPU_Message(" regcache: allocate %s as temp storage",x86_Name(Reg)); + + if (MipsReg >= 0) { + if (LoadHiWord) { + if (IsUnknown(MipsReg)) + { + MoveVariableToX86reg(&_GPR[MipsReg].UW[1],CRegName::GPR_Hi[MipsReg],Reg); + } + else if (IsMapped(MipsReg)) + { + if (Is64Bit(MipsReg)) { + MoveX86RegToX86Reg(cMipsRegMapHi(MipsReg),Reg); + } else if (IsSigned(MipsReg)){ + MoveX86RegToX86Reg(cMipsRegMapLo(MipsReg),Reg); + ShiftRightSignImmed(Reg,31); + } else { + MoveConstToX86reg(0,Reg); + } + } else { + if (Is64Bit(MipsReg)) + { + MoveConstToX86reg(MipsRegHi(MipsReg),Reg); + } else { + MoveConstToX86reg((int)MipsRegLo(MipsReg) >> 31,Reg); + } + } + } else { + if (IsUnknown(MipsReg)) { + MoveVariableToX86reg(&_GPR[MipsReg].UW[0],CRegName::GPR_Lo[MipsReg],Reg); + } else if (IsMapped(MipsReg)) { + MoveX86RegToX86Reg(MipsRegMapLo(MipsReg),Reg); + } else { + MoveConstToX86reg(MipsRegMapLo(MipsReg),Reg); + } + } + } + x86Mapped(Reg) = Temp_Mapped; + x86Protected(Reg) = TRUE; + for (count = 0; count < 10; count ++) { + if (x86MapOrder(count) > 0) { + x86MapOrder(count) += 1; + } + } + x86MapOrder(Reg) = 1; + return Reg; +} + +void CRegInfo::ProtectGPR(DWORD Reg) { + if (IsUnknown(Reg)) { return; } + if (IsConst(Reg)) { return; } + if (Is64Bit(Reg)) { + x86Protected(MipsRegMapHi(Reg)) = TRUE; + } + x86Protected(MipsRegMapLo(Reg)) = TRUE; +} + +void CRegInfo::ResetX86Protection (void) +{ + for (int count = 1; count < 10; count ++) + { + x86Protected(count) = false; + } +} + +void CRegInfo::UnMap_AllFPRs ( void ) +{ + DWORD StackPos; + + for (;;) { + int i, StartPos; + StackPos = StackTopPos(); + if (FpuMappedTo(StackTopPos()) != -1 ) { + UnMap_FPR(FpuMappedTo(StackTopPos()),TRUE); + continue; + } + //see if any more registers mapped + StartPos = StackTopPos(); + for (i = 0; i < 8; i++) { + if (FpuMappedTo((StartPos + i) & 7) != -1 ) { fpuIncStack(&StackTopPos()); } + } + if (StackPos != StackTopPos()) { continue; } + return; + } +} + +void CRegInfo::UnMap_FPR (int Reg, int WriteBackValue ) +{ + char Name[50]; + int i; + + if (Reg < 0) { return; } + for (i = 0; i < 8; i++) { + if (FpuMappedTo(i) != (DWORD)Reg) { continue; } + CPU_Message(" regcache: unallocate %s from ST(%d)",CRegName::FPR[Reg],(i - StackTopPos() + 8) & 7); + if (WriteBackValue) { + int RegPos; + + if (((i - StackTopPos() + 8) & 7) != 0) { + CRegInfo::FPU_ROUND RoundingModel = FpuRoundingModel(StackTopPos()); + CRegInfo::FPU_STATE RegState = FpuState(StackTopPos()); + DWORD MappedTo = FpuMappedTo(StackTopPos()); + FpuRoundingModel(StackTopPos()) = FpuRoundingModel(i); + FpuMappedTo(StackTopPos()) = FpuMappedTo(i); + FpuState(StackTopPos()) = FpuState(i); + FpuRoundingModel(i) = RoundingModel; + FpuMappedTo(i) = MappedTo; + FpuState(i) = RegState; + fpuExchange((x86FpuValues)((i - StackTopPos()) & 7)); + } + + CPU_Message("CurrentRoundingModel: %d FpuRoundingModel(i): %d", + CurrentRoundingModel(),FpuRoundingModel(i)); + + FixRoundModel(FpuRoundingModel(i)); + + RegPos = StackTopPos(); + x86Reg TempReg = Map_TempReg(x86_Any,-1,FALSE); + switch (FpuState(StackTopPos())) { + case CRegInfo::FPU_Dword: + sprintf(Name,"_FPRFloatLocation[%d]",FpuMappedTo(StackTopPos())); + MoveVariableToX86reg(&_FPRFloatLocation[FpuMappedTo(StackTopPos())],Name,TempReg); + fpuStoreIntegerDwordFromX86Reg(&StackTopPos(),TempReg, TRUE); + break; + case CRegInfo::FPU_Qword: + sprintf(Name,"_FPRDoubleLocation[%d]",FpuMappedTo(StackTopPos())); + MoveVariableToX86reg(&_FPRDoubleLocation[FpuMappedTo(StackTopPos())],Name,TempReg); + fpuStoreIntegerQwordFromX86Reg(&StackTopPos(),TempReg, TRUE); + break; + case CRegInfo::FPU_Float: + sprintf(Name,"_FPRFloatLocation[%d]",FpuMappedTo(StackTopPos())); + MoveVariableToX86reg(&_FPRFloatLocation[FpuMappedTo(StackTopPos())],Name,TempReg); + fpuStoreDwordFromX86Reg(&StackTopPos(),TempReg, TRUE); + break; + case CRegInfo::FPU_Double: + sprintf(Name,"_FPRDoubleLocation[%d]",FpuMappedTo(StackTopPos())); + MoveVariableToX86reg(&_FPRDoubleLocation[FpuMappedTo(StackTopPos())],Name,TempReg); + fpuStoreQwordFromX86Reg(&StackTopPos(),TempReg, TRUE); + break; +#ifndef EXTERNAL_RELEASE + default: + DisplayError("UnMap_FPR\nUnknown format to load %d",FpuState(StackTopPos())); +#endif + } + x86Protected(TempReg) = FALSE; + FpuRoundingModel(RegPos) = CRegInfo::RoundDefault; + FpuMappedTo(RegPos) = -1; + FpuState(RegPos) = CRegInfo::FPU_Unkown; + } else { + fpuFree((x86FpuValues)((i - StackTopPos()) & 7)); + FpuRoundingModel(i) = CRegInfo::RoundDefault; + FpuMappedTo(i) = -1; + FpuState(i) = CRegInfo::FPU_Unkown; + } + return; + } +} + +void CRegInfo::UnMap_GPR (DWORD Reg, bool WriteBackValue) +{ + if (Reg == 0) { +#ifndef EXTERNAL_RELEASE + DisplayError("UnMap_GPR\n\nWhy are you trying to unmap reg 0"); +#endif + return; + } + + if (IsUnknown(Reg)) { return; } + //CPU_Message("UnMap_GPR: State: %X\tReg: %s\tWriteBack: %s",State,CRegName::GPR[Reg],WriteBackValue?"TRUE":"FALSE"); + if (IsConst(Reg)) { + if (!WriteBackValue) { + MipsRegState(Reg) = CRegInfo::STATE_UNKNOWN; + return; + } + if (Is64Bit(Reg)) { + MoveConstToVariable(MipsRegHi(Reg),&_GPR[Reg].UW[1],CRegName::GPR_Hi[Reg]); + MoveConstToVariable(MipsRegLo(Reg),&_GPR[Reg].UW[0],CRegName::GPR_Lo[Reg]); + MipsRegState(Reg) = CRegInfo::STATE_UNKNOWN; + return; + } + if ((MipsRegLo(Reg) & 0x80000000) != 0) { + MoveConstToVariable(0xFFFFFFFF,&_GPR[Reg].UW[1],CRegName::GPR_Hi[Reg]); + } else { + MoveConstToVariable(0,&_GPR[Reg].UW[1],CRegName::GPR_Hi[Reg]); + } + MoveConstToVariable(MipsRegLo(Reg),&_GPR[Reg].UW[0],CRegName::GPR_Lo[Reg]); + MipsRegState(Reg) = CRegInfo::STATE_UNKNOWN; + return; + } + if (Is64Bit(Reg)) { + CPU_Message(" regcache: unallocate %s from %s",x86_Name(MipsRegMapHi(Reg)),CRegName::GPR_Hi[Reg]); + x86Mapped(MipsRegHi(Reg)) = NotMapped; + x86Protected(MipsRegHi(Reg)) = FALSE; + } + CPU_Message(" regcache: unallocate %s from %s",x86_Name(MipsRegMapLo(Reg)),CRegName::GPR_Lo[Reg]); + x86Mapped(MipsRegLo(Reg)) = NotMapped; + x86Protected(MipsRegLo(Reg)) = FALSE; + if (!WriteBackValue) { + MipsRegState(Reg) = CRegInfo::STATE_UNKNOWN; + return; + } + MoveX86regToVariable(MipsRegMapLo(Reg),&_GPR[Reg].UW[0],CRegName::GPR_Lo[Reg]); + if (Is64Bit(Reg)) { + MoveX86regToVariable(MipsRegMapHi(Reg),&_GPR[Reg].UW[1],CRegName::GPR_Hi[Reg]); + } else { + if (IsSigned(Reg)) { + ShiftRightSignImmed(MipsRegMapLo(Reg),31); + MoveX86regToVariable(MipsRegMapLo(Reg),&_GPR[Reg].UW[1],CRegName::GPR_Hi[Reg]); + } else { + MoveConstToVariable(0,&_GPR[Reg].UW[1],CRegName::GPR_Hi[Reg]); + } + } + MipsRegState(Reg) = CRegInfo::STATE_UNKNOWN; +} + +CX86Ops::x86Reg CRegInfo::UnMap_TempReg ( void ) +{ + CX86Ops::x86Reg Reg = x86_Unknown; + + if (x86Mapped(x86_EAX) == Temp_Mapped && !x86Protected(x86_EAX)) { Reg = x86_EAX; } + else if (x86Mapped(x86_EBX) == Temp_Mapped && !x86Protected(x86_EBX)) { Reg = x86_EBX; } + else if (x86Mapped(x86_ECX) == Temp_Mapped && !x86Protected(x86_ECX)) { Reg = x86_ECX; } + else if (x86Mapped(x86_EDX) == Temp_Mapped && !x86Protected(x86_EDX)) { Reg = x86_EDX; } + else if (x86Mapped(x86_ESI) == Temp_Mapped && !x86Protected(x86_ESI)) { Reg = x86_ESI; } + else if (x86Mapped(x86_EDI) == Temp_Mapped && !x86Protected(x86_EDI)) { Reg = x86_EDI; } + else if (x86Mapped(x86_EBP) == Temp_Mapped && !x86Protected(x86_EBP)) { Reg = x86_EBP; } + else if (x86Mapped(x86_ESP) == Temp_Mapped && !x86Protected(x86_ESP)) { Reg = x86_ESP; } + + if (Reg != x86_Unknown) + { + CPU_Message(" regcache: unallocate %s from temp storage",x86_Name(Reg)); + x86Mapped(Reg) = NotMapped; + } + return Reg; +} + +bool CRegInfo::UnMap_X86reg ( CX86Ops::x86Reg Reg ) +{ + int count; + + if (x86Mapped(Reg) == NotMapped && x86Protected(Reg) == FALSE) { return TRUE; } + if (x86Mapped(Reg) == CRegInfo::Temp_Mapped) { + if (x86Protected(Reg) == FALSE) { + CPU_Message(" regcache: unallocate %s from temp storage",x86_Name(Reg)); + x86Mapped(Reg) = NotMapped; + return TRUE; + } + return FALSE; + } + for (count = 1; count < 32; count ++) + { + if (!IsMapped(count)) + { + continue; + } + if (Is64Bit(count) && MipsRegMapHi(count) == Reg) + { + if (x86Protected(Reg) == FALSE) + { + UnMap_GPR(count,TRUE); + return TRUE; + } + break; + } + if (MipsRegMapLo(count) == Reg) + { + if (x86Protected(Reg) == FALSE) + { + UnMap_GPR(count,TRUE); + return TRUE; + } + break; + } + } + if (x86Mapped(Reg) == CRegInfo::Stack_Mapped) { + _Notify->BreakPoint(__FILE__,__LINE__); +#ifdef tofix + CPU_Message(" regcache: unallocate %s from Memory Stack",x86_Name(Reg)); + MoveX86regToVariable(Reg,g_MemoryStack,"MemoryStack"); + x86Mapped(Reg) = NotMapped; + return TRUE; +#endif + } + return FALSE; +} + +void CRegInfo::WriteBackRegisters (void) +{ + int count; + BOOL bEdiZero = FALSE; + BOOL bEsiSign = FALSE; + /*** coming soon ***/ + BOOL bEaxGprLo = FALSE; + BOOL bEbxGprHi = FALSE; + + for (count = 1; count < 10; count ++) { x86Protected(count) = FALSE; } + for (count = 1; count < 10; count ++) { UnMap_X86reg ((CX86Ops::x86Reg)count); } + + /*************************************/ + + for (count = 1; count < 32; count ++) { + switch (MipsRegState(count)) { + case CRegInfo::STATE_UNKNOWN: break; + case CRegInfo::STATE_CONST_32: + if (!bEdiZero && (!MipsRegLo(count) || !(MipsRegLo(count) & 0x80000000))) { + XorX86RegToX86Reg(x86_EDI, x86_EDI); + bEdiZero = TRUE; + } + if (!bEsiSign && (MipsRegLo(count) & 0x80000000)) { + MoveConstToX86reg(0xFFFFFFFF, x86_ESI); + bEsiSign = TRUE; + } + + if ((MipsRegLo(count) & 0x80000000) != 0) { + MoveX86regToVariable(x86_ESI,&_GPR[count].UW[1],CRegName::GPR_Hi[count]); + } else { + MoveX86regToVariable(x86_EDI,&_GPR[count].UW[1],CRegName::GPR_Hi[count]); + } + + if (MipsRegLo(count) == 0) { + MoveX86regToVariable(x86_EDI,&_GPR[count].UW[0],CRegName::GPR_Lo[count]); + } else if (MipsRegLo(count) == 0xFFFFFFFF) { + MoveX86regToVariable(x86_ESI,&_GPR[count].UW[0],CRegName::GPR_Lo[count]); + } else + MoveConstToVariable(MipsRegLo(count),&_GPR[count].UW[0],CRegName::GPR_Lo[count]); + + MipsRegState(count) = CRegInfo::STATE_UNKNOWN; + break; + case CRegInfo::STATE_CONST_64: + if (MipsRegLo(count) == 0 || MipsRegHi(count) == 0) { + XorX86RegToX86Reg(x86_EDI, x86_EDI); + bEdiZero = TRUE; + } + if (MipsRegLo(count) == 0xFFFFFFFF || MipsRegHi(count) == 0xFFFFFFFF) { + MoveConstToX86reg(0xFFFFFFFF, x86_ESI); + bEsiSign = TRUE; + } + + if (MipsRegHi(count) == 0) { + MoveX86regToVariable(x86_EDI,&_GPR[count].UW[1],CRegName::GPR_Hi[count]); + } else if (MipsRegLo(count) == 0xFFFFFFFF) { + MoveX86regToVariable(x86_ESI,&_GPR[count].UW[1],CRegName::GPR_Hi[count]); + } else { + MoveConstToVariable(MipsRegHi(count),&_GPR[count].UW[1],CRegName::GPR_Hi[count]); + } + + if (MipsRegLo(count) == 0) { + MoveX86regToVariable(x86_EDI,&_GPR[count].UW[0],CRegName::GPR_Lo[count]); + } else if (MipsRegLo(count) == 0xFFFFFFFF) { + MoveX86regToVariable(x86_ESI,&_GPR[count].UW[0],CRegName::GPR_Lo[count]); + } else { + MoveConstToVariable(MipsRegLo(count),&_GPR[count].UW[0],CRegName::GPR_Lo[count]); + } + MipsRegState(count) = CRegInfo::STATE_UNKNOWN; + break; +#ifndef EXTERNAL_RELEASE + default: + DisplayError("Unknown State: %d\nin WriteBackRegisters",MipsRegState(count)); +#endif + } + } + UnMap_AllFPRs(); +} diff --git a/Source/Project64/N64 System/Recompiler/Reg Info.h b/Source/Project64/N64 System/Recompiler/Reg Info.h new file mode 100644 index 000000000..c77de9037 --- /dev/null +++ b/Source/Project64/N64 System/Recompiler/Reg Info.h @@ -0,0 +1,132 @@ +class CRegInfo : + private CX86Ops +{ +public: + //enums + enum REG_STATE { + STATE_UNKNOWN = 0, + STATE_KNOWN_VALUE = 1, + STATE_X86_MAPPED = 2, + STATE_SIGN = 4, + STATE_32BIT = 8, + + STATE_MAPPED_64 = (STATE_KNOWN_VALUE | STATE_X86_MAPPED), // = 3 + STATE_MAPPED_32_ZERO = (STATE_KNOWN_VALUE | STATE_X86_MAPPED | STATE_32BIT), // = 11 + STATE_MAPPED_32_SIGN = (STATE_KNOWN_VALUE | STATE_X86_MAPPED | STATE_32BIT | STATE_SIGN), // = 15 + + STATE_CONST_32 = (STATE_KNOWN_VALUE | STATE_32BIT | STATE_SIGN), // = 13 + STATE_CONST_64 = (STATE_KNOWN_VALUE), // = 1 + }; + + enum REG_MAPPED { + NotMapped = 0, + GPR_Mapped = 1, + Temp_Mapped = 2, + Stack_Mapped = 3, + }; + + enum FPU_STATE { + FPU_Unkown,FPU_Dword, FPU_Qword, FPU_Float, FPU_Double + }; + + enum FPU_ROUND { + RoundUnknown, RoundDefault, RoundTruncate, RoundNearest, RoundDown, RoundUp + }; +public: + bool operator==(const CRegInfo& right) const; + bool operator!=(const CRegInfo& right) const; + + static REG_STATE ConstantsType ( __int64 Value ); + + void Initilize ( void ); + + void FixRoundModel ( FPU_ROUND RoundMethod ); + x86Reg FreeX86Reg ( void ); + x86Reg Free8BitX86Reg ( void ); + void Map_GPR_32bit ( int MipsReg, BOOL SignValue, int MipsRegToLoad ); + void Map_GPR_64bit ( int MipsReg, int MipsRegToLoad ); + x86Reg Map_TempReg ( x86Reg Reg, int MipsReg, BOOL LoadHiWord ); + void ProtectGPR ( DWORD Reg ); + void ResetX86Protection ( void ); + void UnMap_AllFPRs ( void ); + void UnMap_FPR ( int Reg, int WriteBackValue ); + x86Reg UnMap_TempReg ( void ); + void UnMap_GPR ( DWORD Reg, bool WriteBackValue ); + bool UnMap_X86reg ( x86Reg Reg ); + void WriteBackRegisters ( void ); + + inline bool IsKnown(int Reg) const { return ((cMipsRegState(Reg) & STATE_KNOWN_VALUE) != 0); } + inline bool IsUnknown(int Reg) const { return ((cMipsRegState(Reg) & STATE_KNOWN_VALUE) == 0); } + + inline bool IsMapped(int Reg) const { return ((cMipsRegState(Reg) & (STATE_KNOWN_VALUE | STATE_X86_MAPPED)) == (STATE_KNOWN_VALUE | STATE_X86_MAPPED)); } + inline bool IsConst(int Reg) const { return ((cMipsRegState(Reg) & (STATE_KNOWN_VALUE | STATE_X86_MAPPED)) == STATE_KNOWN_VALUE); } + + inline bool IsSigned(int Reg) const { return ((cMipsRegState(Reg) & (STATE_KNOWN_VALUE | STATE_SIGN)) == (STATE_KNOWN_VALUE | STATE_SIGN)); } + inline bool IsUnsigned(int Reg) const { return ((cMipsRegState(Reg) & (STATE_KNOWN_VALUE | STATE_SIGN)) == STATE_KNOWN_VALUE); } + + inline bool Is32Bit(int Reg) const { return ((cMipsRegState(Reg) & (STATE_KNOWN_VALUE | STATE_32BIT)) == (STATE_KNOWN_VALUE | STATE_32BIT)); } + inline bool Is64Bit(int Reg) const { return ((cMipsRegState(Reg) & (STATE_KNOWN_VALUE | STATE_32BIT)) == STATE_KNOWN_VALUE); } + + inline bool Is32BitMapped(int Reg) const { return ((cMipsRegState(Reg) & (STATE_KNOWN_VALUE | STATE_32BIT | STATE_X86_MAPPED)) == (STATE_KNOWN_VALUE | STATE_32BIT | STATE_X86_MAPPED)); } + inline bool Is64BitMapped(int Reg) const { return ((cMipsRegState(Reg) & (STATE_KNOWN_VALUE | STATE_32BIT | STATE_X86_MAPPED)) == (STATE_KNOWN_VALUE | STATE_X86_MAPPED)); } + + inline REG_STATE cMipsRegState ( int Reg ) const { return MIPS_RegState[Reg]; } + inline unsigned _int64 cMipsReg ( int Reg ) const { return MIPS_RegVal[Reg].UDW; } + inline _int64 cMipsReg_S ( int Reg ) const { return MIPS_RegVal[Reg].DW; } + inline DWORD cMipsRegLo ( int Reg ) const { return MIPS_RegVal[Reg].UW[0]; } + inline long cMipsRegLo_S ( int Reg ) const { return MIPS_RegVal[Reg].W[0]; } + inline DWORD cMipsRegHi ( int Reg ) const { return MIPS_RegVal[Reg].UW[1]; } + inline long cMipsRegHi_S ( int Reg ) const { return MIPS_RegVal[Reg].W[1]; } + inline CX86Ops::x86Reg cMipsRegMapLo ( int Reg ) const { return RegMapLo[Reg]; } + inline CX86Ops::x86Reg cMipsRegMapHi ( int Reg ) const { return RegMapHi[Reg]; } + + inline REG_STATE & MipsRegState ( int Reg ) { return MIPS_RegState[Reg]; } + inline unsigned _int64 & MipsReg ( int Reg ) { return MIPS_RegVal[Reg].UDW; } + inline _int64 & MipsReg_S ( int Reg ) { return MIPS_RegVal[Reg].DW; } + inline DWORD & MipsRegLo ( int Reg ) { return MIPS_RegVal[Reg].UW[0]; } + inline long & MipsRegLo_S ( int Reg ) { return MIPS_RegVal[Reg].W[0]; } + inline DWORD & MipsRegHi ( int Reg ) { return MIPS_RegVal[Reg].UW[1]; } + inline long & MipsRegHi_S ( int Reg ) { return MIPS_RegVal[Reg].W[1]; } + inline CX86Ops::x86Reg & MipsRegMapLo ( int Reg ) { return RegMapLo[Reg]; } + inline CX86Ops::x86Reg & MipsRegMapHi ( int Reg ) { return RegMapHi[Reg]; } + + inline DWORD & x86MapOrder( int Reg ) { return x86reg_MapOrder[Reg]; } + inline bool & x86Protected( int Reg ) { return x86reg_Protected[Reg]; } + inline REG_MAPPED & x86Mapped(int Reg) { return x86reg_MappedTo[Reg]; } + + inline DWORD GetBlockCycleCount ( void ) const { return m_CycleCount; } + inline void SetBlockCycleCount ( DWORD CyleCount ) { m_CycleCount = CyleCount; } + + inline int & StackTopPos ( void ) { return Stack_TopPos; } + inline DWORD & FpuMappedTo( int Reg) { return x86fpu_MappedTo[Reg]; } + inline FPU_STATE & FpuState(int Reg) { return x86fpu_State[Reg]; } + inline FPU_ROUND & FpuRoundingModel(int Reg) { return x86fpu_RoundingModel[Reg]; } + inline bool & FpuBeenUsed (void ) { return Fpu_Used; } + inline FPU_ROUND & CurrentRoundingModel ( void ) { return RoundingModel; } + +private: + //r4k + REG_STATE MIPS_RegState[32]; + MIPS_DWORD MIPS_RegVal[32]; + x86Reg RegMapHi[32]; + x86Reg RegMapLo[32]; + + REG_MAPPED x86reg_MappedTo[10]; + DWORD x86reg_MapOrder[10]; + bool x86reg_Protected[10]; + + DWORD m_CycleCount; + + //FPU + int Stack_TopPos; + DWORD x86fpu_MappedTo[8]; + FPU_STATE x86fpu_State[8]; + FPU_ROUND x86fpu_RoundingModel[8]; + + bool Fpu_Used; + FPU_ROUND RoundingModel; + + bool compare(const CRegInfo& right) const; + + static unsigned int m_fpuControl; +}; diff --git a/Source/Project64/N64 System/Recompiler/Section Info.cpp b/Source/Project64/N64 System/Recompiler/Section Info.cpp index 42b643ed4..e05057ec9 100644 --- a/Source/Project64/N64 System/Recompiler/Section Info.cpp +++ b/Source/Project64/N64 System/Recompiler/Section Info.cpp @@ -1,20 +1,17 @@ -#include "..\..\N64 System.h" -#pragma warning(disable:4355) // Disable 'this' : used in base member initializer list +#include "stdafx.h" -CBlockInfo::CBlockInfo(DWORD VAddr, BYTE * RecompPos) : - StartVAddr(VAddr), - EndVAddr(VAddr), - CompiledLocation(RecompPos), - NoOfSections(1), - ParentSection(this, VAddr,1) +CCodeBlock::CCodeBlock(DWORD VAddrEnter, BYTE * RecompPos) : + m_VAddrEnter(VAddrEnter), + m_VAddrFirst(VAddrEnter), + m_VAddrLast(VAddrEnter), + m_CompiledLocation(RecompPos), + m_NoOfSections(1), + m_EnterSection(this, VAddrEnter, 1) { - ParentSection.AddParent(NULL); - ParentSection.LinkAllowed = false; - AnalyseBlock(); } -void CBlockInfo::AnalyseBlock ( void ) +void CCodeBlock::AnalyseBlock ( void ) { /*if (bLinkBlocks()) { @@ -26,6 +23,39 @@ void CBlockInfo::AnalyseBlock ( void ) return true;*/ } +bool CCodeBlock::Compile() +{ + CPU_Message("====== Code Block ======"); + CPU_Message("x86 code at: %X",CompiledLocation()); + CPU_Message("Start of Block: %X",VAddrEnter() ); + CPU_Message("No of Sections: %d",NoOfSections() ); + CPU_Message("====== recompiled code ======"); +#ifdef tofix + if (bLinkBlocks()) { + for (int count = 0; count < BlockInfo.NoOfSections; count ++) { + DisplaySectionInformation(&BlockInfo.ParentSection,count + 1,CBlockSection::GetNewTestValue()); + } + } + if (m_SyncSystem) { + //if ((DWORD)BlockInfo.CompiledLocation == 0x60A7B73B) { X86BreakPoint(__FILE__,__LINE__); } + //MoveConstToVariable((DWORD)BlockInfo.CompiledLocation,&CurrentBlock,"CurrentBlock"); + } +#endif + +#ifdef tofix + if (bLinkBlocks()) { + while (GenerateX86Code(BlockInfo,&BlockInfo.ParentSection,CBlockSection::GetNewTestValue())); + } else { +#endif + m_EnterSection.GenerateX86Code(m_EnterSection.m_Test + 1); +#ifdef tofix + } + CompileExitCode(BlockInfo); +#endif + + return false; +} + CJumpInfo::CJumpInfo() { TargetPC = (DWORD)-1; @@ -37,23 +67,7 @@ CJumpInfo::CJumpInfo() DoneDelaySlot = false; } -CCodeSection::CCodeSection( CBlockInfo * _BlockInfo, DWORD StartAddr, DWORD ID) : - BlockInfo(_BlockInfo) -{ - JumpSection = NULL; - ContinueSection = NULL; - CompiledLocation = NULL; - - SectionID = ID; - Test = 0; - Test2 = 0; - InLoop = false; - LinkAllowed = true; - DelaySlotSection = false; - - StartPC = StartAddr; - m_CompilePC = StartAddr; -} +#ifdef tofix bool CCodeSection::IsAllParentLoops(CCodeSection * Parent, bool IgnoreIfCompiled, DWORD Test) { @@ -234,14 +248,6 @@ void CCodeSection::AddParent(CCodeSection * Parent ) } } -void CCodeSection::ResetX86Protection (void) -{ - for (int count = 1; count < 10; count ++) - { - RegWorking.x86Protected(count) = false; - } -} - void CRegInfo::Initilize ( void ) { int count; @@ -271,6 +277,8 @@ void CRegInfo::Initilize ( void ) RoundingModel = RoundUnknown; } +#endif + CRegInfo::REG_STATE CRegInfo::ConstantsType (__int64 Value) { if (((Value >> 32) == -1) && ((Value & 0x80000000) != 0)) { return STATE_CONST_32; } @@ -301,8 +309,7 @@ bool CRegInfo::compare(const CRegInfo& right) const if (x86reg_Protected[count] != right.x86reg_Protected[count]) { return false; } if (x86reg_MapOrder[count] != right.x86reg_MapOrder[count]) { return false; } } - if (CycleCount != right.CycleCount) { return false; } - if (RandomModifier != right.RandomModifier) { return false; } + if (m_CycleCount != right.m_CycleCount) { return false; } if (Stack_TopPos != right.Stack_TopPos) { return false; } for (count = 0; count < 8; count ++ ) { @@ -319,3 +326,5 @@ bool CRegInfo::operator!=(const CRegInfo& right) const { return !compare(right); } + + diff --git a/Source/Project64/N64 System/Recompiler/Section Info.h b/Source/Project64/N64 System/Recompiler/Section Info.h index 6f88c5664..0bb97bf2e 100644 --- a/Source/Project64/N64 System/Recompiler/Section Info.h +++ b/Source/Project64/N64 System/Recompiler/Section Info.h @@ -1,248 +1,9 @@ class CCodeSection; typedef std::list SECTION_LIST; -class CRegInfo -{ -public: - //enums - enum REG_STATE { - STATE_UNKNOWN = 0, - STATE_KNOWN_VALUE = 1, - STATE_X86_MAPPED = 2, - STATE_SIGN = 4, - STATE_32BIT = 8, - STATE_MAPPED_64 = (STATE_KNOWN_VALUE | STATE_X86_MAPPED), // = 3 - STATE_MAPPED_32_ZERO = (STATE_KNOWN_VALUE | STATE_X86_MAPPED | STATE_32BIT), // = 11 - STATE_MAPPED_32_SIGN = (STATE_KNOWN_VALUE | STATE_X86_MAPPED | STATE_32BIT | STATE_SIGN), // = 15 +class CCodeBlock; - STATE_CONST_32 = (STATE_KNOWN_VALUE | STATE_32BIT | STATE_SIGN), // = 13 - STATE_CONST_64 = (STATE_KNOWN_VALUE), // = 1 - }; - - enum REG_MAPPED { - NotMapped = 0, - GPR_Mapped = 1, - Temp_Mapped = 2, - Stack_Mapped = 3, - }; - - enum FPU_STATE { - FPU_Unkown,FPU_Dword, FPU_Qword, FPU_Float, FPU_Double - }; - - enum FPU_ROUND { - RoundUnknown, RoundDefault, RoundTruncate, RoundNearest, RoundDown, RoundUp - }; - -private: - //r4k - REG_STATE MIPS_RegState[32]; - MIPS_DWORD MIPS_RegVal[32]; - - REG_MAPPED x86reg_MappedTo[10]; - DWORD x86reg_MapOrder[10]; - bool x86reg_Protected[10]; - - DWORD CycleCount; - DWORD RandomModifier; - - //FPU - int Stack_TopPos; - DWORD x86fpu_MappedTo[8]; - FPU_STATE x86fpu_State[8]; - FPU_ROUND x86fpu_RoundingModel[8]; - - bool Fpu_Used; - FPU_ROUND RoundingModel; - - bool compare(const CRegInfo& right) const; - -public: - bool operator==(const CRegInfo& right) const; - bool operator!=(const CRegInfo& right) const; - - static REG_STATE ConstantsType ( __int64 Value ); - - void Initilize ( void ); - - inline bool IsKnown(int Reg) { return ((MipsRegState(Reg) & STATE_KNOWN_VALUE) != 0); } - inline bool IsUnknown(int Reg) { return (!IsKnown(Reg)); } - - inline bool IsMapped(int Reg) { return (IsKnown(Reg) && (MipsRegState(Reg) & STATE_X86_MAPPED) != 0); } - inline bool IsConst(int Reg) { return (IsKnown(Reg) && !IsMapped(Reg)); } - - inline bool IsSigned(int Reg) { return (IsKnown(Reg) && (MipsRegState(Reg) & STATE_SIGN) != 0); } - inline bool IsUnsigned(int Reg) { return (IsKnown(Reg) && !IsSigned(Reg)); } - - inline bool Is32Bit(int Reg) { return (IsKnown(Reg) && (MipsRegState(Reg) & STATE_32BIT) != 0); } - inline bool Is64Bit(int Reg) { return (IsKnown(Reg) && !Is32Bit(Reg)); } - - inline bool Is32BitMapped(int Reg) { return (Is32Bit(Reg) && (MipsRegState(Reg) & STATE_X86_MAPPED) != 0); } - inline bool Is64BitMapped(int Reg) { return (Is64Bit(Reg) && !Is32BitMapped(Reg)); } - - inline REG_STATE & MipsRegState ( int Reg ) { return MIPS_RegState[Reg]; } - inline unsigned _int64 & MipsReg ( int Reg ) { return MIPS_RegVal[Reg].UDW; } - inline _int64 & MipsReg_S ( int Reg ) { return MIPS_RegVal[Reg].DW; } - inline DWORD & MipsRegLo ( int Reg ) { return MIPS_RegVal[Reg].UW[0]; } - inline long & MipsRegLo_S ( int Reg ) { return MIPS_RegVal[Reg].W[0]; } - inline DWORD & MipsRegHi ( int Reg ) { return MIPS_RegVal[Reg].UW[1]; } - inline long & MipsRegHi_S ( int Reg ) { return MIPS_RegVal[Reg].W[1]; } - - inline DWORD & x86MapOrder( int Reg ) { return x86reg_MapOrder[Reg]; } - inline bool & x86Protected( int Reg ) { return x86reg_Protected[Reg]; } - inline REG_MAPPED & x86Mapped(int Reg) { return x86reg_MappedTo[Reg]; } - - inline DWORD & BlockCycleCount(void) { return CycleCount; } - inline DWORD & BlockRandomModifier(void) { return RandomModifier; } - - - inline int & StackTopPos ( void ) { return Stack_TopPos; } - inline DWORD & FpuMappedTo( int Reg) { return x86fpu_MappedTo[Reg]; } - inline FPU_STATE & FpuState(int Reg) { return x86fpu_State[Reg]; } - inline FPU_ROUND & FpuRoundingModel(int Reg) { return x86fpu_RoundingModel[Reg]; } - inline bool & FpuBeenUsed (void ) { return Fpu_Used; } - inline FPU_ROUND & CurrentRoundingModel ( void ) { return RoundingModel; } - -}; - -class CJumpInfo -{ -public: - CJumpInfo(); - - DWORD TargetPC; - char * BranchLabel; - BYTE * LinkLocation; - BYTE * LinkLocation2; - BOOL FallThrough; - BOOL PermLoop; - BOOL DoneDelaySlot; - CRegInfo RegSet; -}; - -class CBlockInfo; -class CCodeSection -{ -public: - CCodeSection( CBlockInfo * _BlockInfo, DWORD StartAddr, DWORD ID); - ~CCodeSection( void ); - - CBlockInfo * const BlockInfo; - - /* Block Connection info */ - SECTION_LIST ParentSection; - CCodeSection * ContinueSection; - CCodeSection * JumpSection; - BYTE * CompiledLocation; - - DWORD SectionID; - DWORD Test; - DWORD Test2; - bool InLoop; - bool LinkAllowed; // are other sections allowed to find block to link to it - bool DelaySlotSection; - - DWORD StartPC; - - /* Register Info */ - CRegInfo RegStart; - CRegInfo RegWorking; - - /* Jump Info */ - CJumpInfo Jump; - CJumpInfo Cont; - - //Information about the opcode current being compiled - DWORD m_CompilePC; - OPCODE m_CompileOpcode; - - void AddParent ( CCodeSection * Parent ); - void UnlinkParent ( CCodeSection * Parent, bool AllowDelete, bool ContinueLink ); - bool IsAllParentLoops ( CCodeSection * Parent, bool IgnoreIfCompiled, DWORD Test ); - void ResetX86Protection ( void ); - static DWORD GetNewTestValue ( void ); - - static void TestRegConstantStates ( CRegInfo & Base, CRegInfo & Reg ); - - //Handy Functions - inline CRegInfo::REG_STATE & MipsRegState ( int Reg ) { return RegWorking.MipsRegState(Reg); } - inline unsigned _int64 & MipsReg ( int Reg ) { return RegWorking.MipsReg(Reg); } - inline _int64 & MipsReg_S ( int Reg ) { return RegWorking.MipsReg_S(Reg); } - inline DWORD & MipsRegLo ( int Reg ) { return RegWorking.MipsRegLo(Reg); } - inline long & MipsRegLo_S ( int Reg ) { return RegWorking.MipsRegLo_S(Reg); } - inline DWORD & MipsRegHi ( int Reg ) { return RegWorking.MipsRegHi(Reg); } - inline long & MipsRegHi_S ( int Reg ) { return RegWorking.MipsRegHi_S(Reg); } - inline DWORD & BlockCycleCount(void) { return RegWorking.BlockCycleCount(); } - inline DWORD & BlockRandomModifier(void) { return RegWorking.BlockRandomModifier(); } - - inline DWORD & x86MapOrder( int Reg ) { return RegWorking.x86MapOrder(Reg); } - inline bool & x86Protected( int Reg ) { return RegWorking.x86Protected(Reg); } - inline CRegInfo::REG_MAPPED & x86Mapped(int Reg) { return RegWorking.x86Mapped(Reg); } - - inline bool IsKnown(int Reg) { return RegWorking.IsKnown(Reg); } - inline bool IsUnknown(int Reg) { return RegWorking.IsUnknown(Reg); } - - inline bool IsMapped(int Reg) { return RegWorking.IsMapped(Reg); } - inline bool IsConst(int Reg) { return RegWorking.IsConst(Reg); } - - inline bool IsSigned(int Reg) { return RegWorking.IsSigned(Reg); } - inline bool IsUnsigned(int Reg) { return RegWorking.IsUnsigned(Reg); } - - inline bool Is32Bit(int Reg) { return RegWorking.Is32Bit(Reg); } - inline bool Is64Bit(int Reg) { return RegWorking.Is64Bit(Reg); } - - inline bool Is32BitMapped(int Reg) { return RegWorking.Is32BitMapped(Reg); } - inline bool Is64BitMapped(int Reg) { return RegWorking.Is64BitMapped(Reg); } - - inline int & StackTopPos ( void ) { return RegWorking.StackTopPos(); } - inline DWORD & FpuMappedTo( int Reg) { return RegWorking.FpuMappedTo(Reg); } - inline CRegInfo::FPU_STATE & FpuState(int Reg) { return RegWorking.FpuState(Reg); } - inline CRegInfo::FPU_ROUND & FpuRoundingModel(int Reg) { return RegWorking.FpuRoundingModel(Reg); } - inline bool & FpuBeenUsed (void ) { return RegWorking.FpuBeenUsed(); } - inline CRegInfo::FPU_ROUND & CurrentRoundingModel ( void ) { return RegWorking.CurrentRoundingModel(); } -}; - -class CExitInfo -{ -public: - enum EXIT_REASON - { - Normal = 0, - Normal_NoSysCheck = 1, - DoCPU_Action = 2, - COP1_Unuseable = 3, - DoSysCall = 4, - TLBReadMiss = 5, - TLBWriteMiss = 6, - ExitResetRecompCode = 7, - }; - - DWORD ID; - DWORD TargetPC; - CRegInfo ExitRegSet; - EXIT_REASON reason; - STEP_TYPE NextInstruction; - BYTE * JumpLoc; //32bit jump -}; - -typedef std::list EXIT_LIST; - -class CBlockInfo -{ -public: - CBlockInfo(DWORD VAddr, BYTE * RecompPos); - - DWORD StartVAddr; - DWORD EndVAddr; - BYTE * CompiledLocation; - int NoOfSections; - CCodeSection ParentSection; - EXIT_LIST ExitInfo; - -private: - void AnalyseBlock ( void ); -}; typedef struct { CCodeSection * Parent; diff --git a/Source/Project64/N64 System/Recompiler/X86ops.cpp b/Source/Project64/N64 System/Recompiler/X86ops.cpp new file mode 100644 index 000000000..dedbd8f97 --- /dev/null +++ b/Source/Project64/N64 System/Recompiler/X86ops.cpp @@ -0,0 +1,3577 @@ +#include "stdafx.h" + +#define PUTDST8(dest,value) (*((BYTE *)(dest))=(BYTE)(value)); dest += 1; +#define PUTDST16(dest,value) (*((WORD *)(dest))=(WORD)(value)); dest += 2; +#define PUTDST32(dest,value) (*((DWORD *)(dest))=(DWORD)(value)); dest += 4; + +BYTE * CX86Ops::m_RecompPos; + +char CX86Ops::m_fpupop[2][2] = { + "", "p" +}; + +/************************************************************************** +* Logging Functions * +**************************************************************************/ +void CX86Ops::WriteX86Comment ( LPCSTR Comment ) +{ + CPU_Message(""); + CPU_Message(" // %s",Comment); +} + +void CX86Ops::WriteX86Label ( LPCSTR Label ) +{ + CPU_Message(""); + CPU_Message(" %s:",Label); +} + +void CX86Ops::AdcX86regToVariable(x86Reg reg, void * Variable, const char * VariableName) { + CPU_Message(" adc dword ptr [%s], %s",VariableName, x86_Name(reg)); + PUTDST16(m_RecompPos,0x0511 + (reg * 0x100)); + PUTDST32(m_RecompPos,Variable); +} + +void CX86Ops::AdcConstToVariable(void *Variable, const char * VariableName, BYTE Constant) { + CPU_Message(" adc dword ptr [%s], %Xh", VariableName, Constant); + PUTDST16(m_RecompPos,0x1583); + PUTDST32(m_RecompPos,Variable); + PUTDST8(m_RecompPos,Constant); +} + +void CX86Ops::AdcConstToX86Reg (x86Reg reg, DWORD Const) { + CPU_Message(" adc %s, %Xh",x86_Name(reg),Const); + if ((Const & 0xFFFFFF80) != 0 && (Const & 0xFFFFFF80) != 0xFFFFFF80) { + PUTDST16(m_RecompPos,0xD081 + (reg * 0x100)); + PUTDST32(m_RecompPos, Const); + } else { + PUTDST16(m_RecompPos,0xD083 + (reg * 0x100)); + PUTDST8(m_RecompPos, Const); + } +} + +void CX86Ops::AdcVariableToX86reg(x86Reg reg, void * Variable, const char * VariableName) { + CPU_Message(" adc %s, dword ptr [%s]",x86_Name(reg),VariableName); + PUTDST16(m_RecompPos,0x0513 + (reg * 0x100)); + PUTDST32(m_RecompPos,Variable); +} + +void CX86Ops::AdcX86RegToX86Reg(x86Reg Destination, x86Reg Source) { + CPU_Message(" adc %s, %s",x86_Name(Destination),x86_Name(Source)); + PUTDST16(m_RecompPos,0xC013 + (Source * 0x100) + (Destination * 0x800)); +} + +void CX86Ops::AddConstToVariable (DWORD Const, void *Variable, const char * VariableName) { + CPU_Message(" add dword ptr [%s], 0x%X",VariableName, Const);\ + PUTDST16(m_RecompPos,0x0581); + PUTDST32(m_RecompPos,Variable); + PUTDST32(m_RecompPos,Const); +} + +void CX86Ops::AddConstToX86Reg (x86Reg reg, DWORD Const) { + if (Const == 0) + { + } else if (Const == 1) { + IncX86reg(reg); + } else if (Const == 0xFFFFFFFF) { + DecX86reg(reg); + } else if ((Const & 0xFFFFFF80) != 0 && (Const & 0xFFFFFF80) != 0xFFFFFF80) { + CPU_Message(" add %s, %Xh",x86_Name(reg),Const); + PUTDST16(m_RecompPos,0xC081 + (reg * 0x100)); + PUTDST32(m_RecompPos, Const); + } else { + CPU_Message(" add %s, %Xh",x86_Name(reg),Const); + PUTDST16(m_RecompPos,0xC083 + (reg * 0x100)); + PUTDST8(m_RecompPos, Const); + } +} + +void CX86Ops::AddVariableToX86reg(x86Reg reg, void * Variable, const char * VariableName) { + CPU_Message(" add %s, dword ptr [%s]",x86_Name(reg),VariableName); + PUTDST16(m_RecompPos,0x0503 + (reg * 0x800)); + PUTDST32(m_RecompPos,Variable); +} + +void CX86Ops::AddX86regToVariable(x86Reg reg, void * Variable, const char * VariableName) { + CPU_Message(" add dword ptr [%s], %s",VariableName, x86_Name(reg)); + PUTDST16(m_RecompPos,0x0501 + (reg * 0x800)); + PUTDST32(m_RecompPos,Variable); +} + +void CX86Ops::AddX86RegToX86Reg(x86Reg Destination, x86Reg Source) { + CPU_Message(" add %s, %s",x86_Name(Destination),x86_Name(Source)); + PUTDST16(m_RecompPos,0xC003 + (Source * 0x100) + (Destination * 0x800)); +} + +void CX86Ops::AndConstToVariable (DWORD Const, void *Variable, const char * VariableName) +{ + CPU_Message(" and dword ptr [%s], 0x%X",VariableName, Const); + PUTDST16(m_RecompPos,0x2581); + PUTDST32(m_RecompPos,Variable); + PUTDST32(m_RecompPos,Const); +} + +void CX86Ops::AndConstToX86Reg(x86Reg reg, DWORD Const) { + CPU_Message(" and %s, %Xh",x86_Name(reg),Const); + if ((Const & 0xFFFFFF80) != 0 && (Const & 0xFFFFFF80) != 0xFFFFFF80) { + PUTDST16(m_RecompPos,0xE081 + (reg * 0x100)); + PUTDST32(m_RecompPos, Const); + } else { + PUTDST16(m_RecompPos,0xE083 + (reg * 0x100)); + PUTDST8(m_RecompPos, Const); + } +} + +void CX86Ops::AndVariableDispToX86Reg(void *Variable, const char * VariableName, x86Reg reg, x86Reg AddrReg, Multipler Multiply) +{ + CPU_Message(" and %s, dword ptr [%s+%s*%i]",x86_Name(reg),VariableName, x86_Name(AddrReg), Multiply); + + PUTDST16(m_RecompPos,0x0423 + (reg * 0x100)); + PUTDST16(m_RecompPos,0x0505 + CalcMultiplyCode(Multiply) + (AddrReg * 0x100)); + PUTDST32(m_RecompPos,Variable); +} + +void CX86Ops::AndVariableToX86Reg(void * Variable, const char * VariableName, x86Reg reg) { + CPU_Message(" and %s, dword ptr [%s]",x86_Name(reg),VariableName); + PUTDST16(m_RecompPos,0x0523 + (reg * 0x800)); + PUTDST32(m_RecompPos,Variable); +} + +void CX86Ops::AndX86RegToX86Reg(x86Reg Destination, x86Reg Source) { + CPU_Message(" and %s, %s",x86_Name(Destination),x86_Name(Source)); + PUTDST16(m_RecompPos,0x0021 + (Destination * 0x100) + (Source * 0x800)); +} + +void CX86Ops::BreakPointNotification (const char * const FileName, const int LineNumber) +{ + _Notify->BreakPoint(FileName,LineNumber); +} + +void CX86Ops::X86BreakPoint (LPCSTR FileName, int LineNumber) +{ + Pushad(); + PushImm32("LineNumber",LineNumber); + PushImm32("FileName",(DWORD)FileName); + Call_Direct(BreakPointNotification,"BreakPointNotification"); + AddConstToX86Reg(x86_ESP, 8); + Popad(); +} + +void CX86Ops::Call_Direct(void * FunctAddress, const char * FunctName) +{ + CPU_Message(" call offset %s",FunctName); + PUTDST8(m_RecompPos,0xE8); + PUTDST32(m_RecompPos,(DWORD)FunctAddress-(DWORD)m_RecompPos - 4); +} + +void CX86Ops::Call_Indirect(void * FunctAddress, const char * FunctName) +{ + CPU_Message(" call [%s]",FunctName); + PUTDST16(m_RecompPos,0x15FF); + PUTDST32(m_RecompPos,FunctAddress); +} + +void CX86Ops::CompConstToVariable(DWORD Const, void * Variable, const char * VariableName) { + CPU_Message(" cmp dword ptr [%s], 0x%X",VariableName, Const); + PUTDST16(m_RecompPos,0x3D81); + PUTDST32(m_RecompPos,Variable); + PUTDST32(m_RecompPos,Const); +} + +void CX86Ops::CompConstToX86reg(x86Reg reg, DWORD Const) { + if (Const == 0) + { + OrX86RegToX86Reg(reg,reg); + } else { + CPU_Message(" cmp %s, %Xh",x86_Name(reg),Const); + if ((Const & 0xFFFFFF80) != 0 && (Const & 0xFFFFFF80) != 0xFFFFFF80) + { + PUTDST16(m_RecompPos,0xF881 + (reg * 0x100)); + PUTDST32(m_RecompPos,Const); + } else { + PUTDST16(m_RecompPos,0xF883 + (reg * 0x100)); + PUTDST8(m_RecompPos, Const); + } + } +} + +void CX86Ops::CompX86regToVariable(x86Reg reg, void * Variable, const char * VariableName) { + CPU_Message(" cmp %s, dword ptr [%s]",x86_Name(reg),VariableName); + PUTDST16(m_RecompPos,0x053B + (reg * 0x800)); + PUTDST32(m_RecompPos,Variable); +} + +void CX86Ops::CompVariableToX86reg(x86Reg reg, void * Variable, const char * VariableName) { + CPU_Message(" cmp dword ptr [%s], %s",VariableName, x86_Name(reg)); + PUTDST16(m_RecompPos,0x0539 + (reg * 0x800)); + PUTDST32(m_RecompPos,Variable); +} + +void CX86Ops::CompX86RegToX86Reg(x86Reg Destination, x86Reg Source) { + WORD x86Command; + + CPU_Message(" cmp %s, %s",x86_Name(Destination),x86_Name(Source)); + + switch (Source) { + case x86_EAX: x86Command = 0x003B; break; + case x86_EBX: x86Command = 0x033B; break; + case x86_ECX: x86Command = 0x013B; break; + case x86_EDX: x86Command = 0x023B; break; + case x86_ESI: x86Command = 0x063B; break; + case x86_EDI: x86Command = 0x073B; break; + case x86_ESP: x86Command = 0x043B; break; + case x86_EBP: x86Command = 0x053B; break; + } + switch (Destination) { + case x86_EAX: x86Command += 0xC000; break; + case x86_EBX: x86Command += 0xD800; break; + case x86_ECX: x86Command += 0xC800; break; + case x86_EDX: x86Command += 0xD000; break; + case x86_ESI: x86Command += 0xF000; break; + case x86_EDI: x86Command += 0xF800; break; + case x86_ESP: x86Command += 0xE000; break; + case x86_EBP: x86Command += 0xE800; break; + } + PUTDST16(m_RecompPos,x86Command); +} + +void CX86Ops::DecX86reg(x86Reg reg) { + CPU_Message(" dec %s",x86_Name(reg)); + + switch (reg) { + case x86_EAX: PUTDST16(m_RecompPos,0xC8FF); break; + case x86_EBX: PUTDST16(m_RecompPos,0xCBFF); break; + case x86_ECX: PUTDST16(m_RecompPos,0xC9FF); break; + case x86_EDX: PUTDST16(m_RecompPos,0xCAFF); break; + case x86_ESI: PUTDST16(m_RecompPos,0xCEFF); break; + case x86_EDI: PUTDST16(m_RecompPos,0xCFFF); break; + case x86_ESP: PUTDST8 (m_RecompPos,0x4C); break; + case x86_EBP: PUTDST8 (m_RecompPos,0x4D); break; + default: + DisplayError("DecX86reg\nUnknown x86 Register"); + } +} + +void CX86Ops::DivX86reg(x86Reg reg) { + CPU_Message(" div %s",x86_Name(reg)); + switch (reg) { + case x86_EBX: PUTDST16(m_RecompPos,0xf3F7); break; + case x86_ECX: PUTDST16(m_RecompPos,0xf1F7); break; + case x86_EDX: PUTDST16(m_RecompPos,0xf2F7); break; + case x86_ESI: PUTDST16(m_RecompPos,0xf6F7); break; + case x86_EDI: PUTDST16(m_RecompPos,0xf7F7); break; + case x86_ESP: PUTDST16(m_RecompPos,0xf4F7); break; + case x86_EBP: PUTDST16(m_RecompPos,0xf5F7); break; + default: + DisplayError("divX86reg\nUnknown x86 Register"); + } +} + +void CX86Ops::idivX86reg(x86Reg reg) { + CPU_Message(" idiv %s",x86_Name(reg));\ + switch (reg) { + case x86_EBX: PUTDST16(m_RecompPos,0xfbF7); break; + case x86_ECX: PUTDST16(m_RecompPos,0xf9F7); break; + case x86_EDX: PUTDST16(m_RecompPos,0xfaF7); break; + case x86_ESI: PUTDST16(m_RecompPos,0xfeF7); break; + case x86_EDI: PUTDST16(m_RecompPos,0xffF7); break; + case x86_ESP: PUTDST16(m_RecompPos,0xfcF7); break; + case x86_EBP: PUTDST16(m_RecompPos,0xfdF7); break; + default: + DisplayError("idivX86reg\nUnknown x86 Register"); + } +} + +void CX86Ops::imulX86reg(x86Reg reg) { + CPU_Message(" imul %s",x86_Name(reg)); + switch (reg) { + case x86_EAX: PUTDST16(m_RecompPos,0xE8F7); break; + case x86_EBX: PUTDST16(m_RecompPos,0xEBF7); break; + case x86_ECX: PUTDST16(m_RecompPos,0xE9F7); break; + case x86_EDX: PUTDST16(m_RecompPos,0xEAF7); break; + case x86_ESI: PUTDST16(m_RecompPos,0xEEF7); break; + case x86_EDI: PUTDST16(m_RecompPos,0xEFF7); break; + case x86_ESP: PUTDST16(m_RecompPos,0xECF7); break; + case x86_EBP: PUTDST16(m_RecompPos,0xEDF7); break; + default: + DisplayError("imulX86reg\nUnknown x86 Register"); + } +} + +void CX86Ops::IncX86reg(x86Reg reg) { + CPU_Message(" inc %s",x86_Name(reg)); + switch (reg) { + case x86_EAX: PUTDST16(m_RecompPos,0xC0FF); break; + case x86_EBX: PUTDST16(m_RecompPos,0xC3FF); break; + case x86_ECX: PUTDST16(m_RecompPos,0xC1FF); break; + case x86_EDX: PUTDST16(m_RecompPos,0xC2FF); break; + case x86_ESI: PUTDST16(m_RecompPos,0xC6FF); break; + case x86_EDI: PUTDST16(m_RecompPos,0xC7FF); break; + case x86_ESP: PUTDST8 (m_RecompPos,0x44); break; + case x86_EBP: PUTDST8 (m_RecompPos,0x45); break; + default: + DisplayError("IncX86reg\nUnknown x86 Register"); + } +} + +void CX86Ops::JaeLabel8(char * Label, BYTE Value) { + CPU_Message(" jae $%s",Label); + PUTDST8(m_RecompPos,0x73); + PUTDST8(m_RecompPos,Value); +} + +void CX86Ops::JaeLabel32(char * Label,DWORD Value) { + CPU_Message(" jae $%s",Label); + PUTDST16(m_RecompPos,0x830F); + PUTDST32(m_RecompPos,Value); +} + +void CX86Ops::JaLabel8(char * Label, BYTE Value) { + CPU_Message(" ja $%s",Label); + PUTDST8(m_RecompPos,0x77); + PUTDST8(m_RecompPos,Value); +} + +void CX86Ops::JaLabel32(char * Label,DWORD Value) { + CPU_Message(" ja $%s",Label); + PUTDST16(m_RecompPos,0x870F); + PUTDST32(m_RecompPos,Value); +} + +void CX86Ops::JbLabel8(char * Label, BYTE Value) { + CPU_Message(" jb $%s",Label); + PUTDST8(m_RecompPos,0x72); + PUTDST8(m_RecompPos,Value); +} + +void CX86Ops::JbLabel32(char * Label,DWORD Value) { + CPU_Message(" jb $%s",Label); + PUTDST16(m_RecompPos,0x820F); + PUTDST32(m_RecompPos,Value); +} + +void CX86Ops::JecxzLabel8(char * Label, BYTE Value) { + CPU_Message(" jecxz $%s",Label); + PUTDST8(m_RecompPos,0xE3); + PUTDST8(m_RecompPos,Value); +} + +void CX86Ops::JeLabel8(char * Label, BYTE Value) { + CPU_Message(" je $%s",Label); + PUTDST8(m_RecompPos,0x74); + PUTDST8(m_RecompPos,Value); +} + +void CX86Ops::JeLabel32(char * Label,DWORD Value) { + CPU_Message(" je $%s",Label); + PUTDST16(m_RecompPos,0x840F); + PUTDST32(m_RecompPos,Value); +} + +void CX86Ops::JgeLabel32(char * Label,DWORD Value) { + CPU_Message(" jge $%s",Label); + PUTDST16(m_RecompPos,0x8D0F); + PUTDST32(m_RecompPos,Value); +} + +void CX86Ops::JgLabel8(char * Label, BYTE Value) { + CPU_Message(" jg $%s",Label); + PUTDST8(m_RecompPos,0x7F); + PUTDST8(m_RecompPos,Value); +} + +void CX86Ops::JgLabel32(char * Label,DWORD Value) { + CPU_Message(" jg $%s",Label); + PUTDST16(m_RecompPos,0x8F0F); + PUTDST32(m_RecompPos,Value); +} + +void CX86Ops::JleLabel8(char * Label, BYTE Value) { + CPU_Message(" jle $%s",Label); + PUTDST8(m_RecompPos,0x7E); + PUTDST8(m_RecompPos,Value); +} + +void CX86Ops::JleLabel32(char * Label,DWORD Value) { + CPU_Message(" jle $%s",Label); + PUTDST16(m_RecompPos,0x8E0F); + PUTDST32(m_RecompPos,Value); +} + +void CX86Ops::JlLabel8(char * Label, BYTE Value) { + CPU_Message(" jl $%s",Label); + PUTDST8(m_RecompPos,0x7C); + PUTDST8(m_RecompPos,Value); +} + +void CX86Ops::JlLabel32(char * Label,DWORD Value) { + CPU_Message(" jl $%s",Label); + PUTDST16(m_RecompPos,0x8C0F); + PUTDST32(m_RecompPos,Value); +} + +void CX86Ops::JmpDirectReg( x86Reg reg ) { + CPU_Message(" jmp %s",x86_Name(reg)); + + switch (reg) { + case x86_EAX: PUTDST16(m_RecompPos,0xE0ff); break; + case x86_EBX: PUTDST16(m_RecompPos,0xE3ff); break; + case x86_ECX: PUTDST16(m_RecompPos,0xE1ff); break; + case x86_EDX: PUTDST16(m_RecompPos,0xE2ff); break; + case x86_ESI: PUTDST16(m_RecompPos,0xE6ff); break; + case x86_EDI: PUTDST16(m_RecompPos,0xE7ff); break; + default: + DisplayError("JmpDirectReg\nUnknown x86 Register"); + break; + } +} + +void CX86Ops::JmpIndirectLabel32(char * Label,DWORD location) { + CPU_Message(" jmp dword ptr [%s]", Label); + PUTDST16(m_RecompPos, 0x25ff); + PUTDST32(m_RecompPos, location); +} + +void CX86Ops::JmpIndirectReg( x86Reg reg ) { + CPU_Message(" jmp dword ptr [%s]",x86_Name(reg)); + + switch (reg) { + case x86_EAX: PUTDST16(m_RecompPos,0x20ff); break; + case x86_EBX: PUTDST16(m_RecompPos,0x23ff); break; + case x86_ECX: PUTDST16(m_RecompPos,0x21ff); break; + case x86_EDX: PUTDST16(m_RecompPos,0x22ff); break; + case x86_ESI: PUTDST16(m_RecompPos,0x26ff); break; + case x86_EDI: PUTDST16(m_RecompPos,0x27ff); break; + case x86_ESP: + PUTDST8(m_RecompPos,0xff); + PUTDST16(m_RecompPos,0x2434); + /* BreakPoint(__FILE__,__LINE__); */ + break; + case x86_EBP: + PUTDST8(m_RecompPos,0xff); + PUTDST16(m_RecompPos,0x0065); + /* BreakPoint(__FILE__,__LINE__); */ + break; + } +} + +void CX86Ops::JmpLabel8(char * Label, BYTE Value) { + CPU_Message(" jmp $%s",Label); + PUTDST8(m_RecompPos,0xEB); + PUTDST8(m_RecompPos,Value); +} + +void CX86Ops::JmpLabel32(char * Label, DWORD Value) { + CPU_Message(" jmp $%s",Label); + PUTDST8(m_RecompPos,0xE9); + PUTDST32(m_RecompPos,Value); +} + +void CX86Ops::JneLabel8(char * Label, BYTE Value) { + CPU_Message(" jne $%s",Label); + PUTDST8(m_RecompPos,0x75); + PUTDST8(m_RecompPos,Value); +} + +void CX86Ops::JneLabel32(char *Label, DWORD Value) { + CPU_Message(" jne $%s",Label); + PUTDST16(m_RecompPos,0x850F); + PUTDST32(m_RecompPos,Value); +} + +void CX86Ops::JnsLabel8(char * Label, BYTE Value) { + CPU_Message(" jns $%s",Label); + PUTDST8(m_RecompPos,0x79); + PUTDST8(m_RecompPos,Value); +} + +void CX86Ops::JnsLabel32(char *Label, DWORD Value) { + CPU_Message(" jns $%s",Label); + PUTDST16(m_RecompPos,0x890F); + PUTDST32(m_RecompPos,Value); +} + +void CX86Ops::JsLabel32(char *Label, DWORD Value) { + CPU_Message(" js $%s",Label); + PUTDST16(m_RecompPos,0x880F); + PUTDST32(m_RecompPos,Value); +} + +void CX86Ops::LeaRegReg(x86Reg regDest, x86Reg regSrc, int multiplier) { + int s; + CPU_Message(" lea %s, [%s*%i]", x86_Name(regDest), x86_Name(regSrc), multiplier); + + PUTDST8(m_RecompPos,0x8D); + switch (regDest) { + case x86_EAX: PUTDST8(m_RecompPos,0x04); break; + case x86_EBX: PUTDST8(m_RecompPos,0x1C); break; + case x86_ECX: PUTDST8(m_RecompPos,0x0C); break; + case x86_EDX: PUTDST8(m_RecompPos,0x14); break; + case x86_ESI: PUTDST8(m_RecompPos,0x34); break; + case x86_EDI: PUTDST8(m_RecompPos,0x3C); break; + case x86_ESP: PUTDST8(m_RecompPos,0x24); break; + case x86_EBP: PUTDST8(m_RecompPos,0x2C); break; + default: + DisplayError("LEA\nUnknown x86 Register"); + } + + /* put in shifter 2(01), 4(10), 8(11) */ + switch(multiplier) { + case 2: s = 0x40; break; + case 4: s = 0x80; break; + case 8: s = 0xC0; break; + default: + DisplayError("LEA\nInvalid x86 multiplier"); + } + + /* format ss|000000 */ + switch (regSrc) { + case x86_EAX: PUTDST8(m_RecompPos,0x05|s); break; + case x86_EBX: PUTDST8(m_RecompPos,0x1D|s); break; + case x86_ECX: PUTDST8(m_RecompPos,0x0D|s); break; + case x86_EDX: PUTDST8(m_RecompPos,0x15|s); break; + case x86_ESI: PUTDST8(m_RecompPos,0x35|s); break; + case x86_EDI: PUTDST8(m_RecompPos,0x3D|s); break; + case x86_EBP: PUTDST8(m_RecompPos,0x2D|s); break; + case x86_ESP: + DisplayError("LEA\nESP is invalid"); break; + default: + DisplayError("LEA\nUnknown x86 Register"); + } + + PUTDST32(m_RecompPos,0x00000000); +} + +void CX86Ops::LeaSourceAndOffset(x86Reg x86DestReg, x86Reg x86SourceReg, int offset) { + WORD x86Command; + + CPU_Message(" lea %s, [%s + %0Xh]",x86_Name(x86DestReg),x86_Name(x86SourceReg),offset); + +// if ((offset & 0xFFFFFF80) != 0 && (offset & 0xFFFFFF80) != 0xFFFFFF80) { + if (1) { + switch (x86DestReg) { + case x86_EAX: x86Command = 0x808D; break; + case x86_EBX: x86Command = 0x988D; break; + case x86_ECX: x86Command = 0x888D; break; + case x86_EDX: x86Command = 0x908D; break; + case x86_ESI: x86Command = 0xB08D; break; + case x86_EDI: x86Command = 0xB88D; break; + case x86_ESP: x86Command = 0xA08D; break; + case x86_EBP: x86Command = 0xA88D; break; + default: + DisplayError("LeaSourceAndOffset\nUnknown x86 Register"); + } + switch (x86SourceReg) { + case x86_EAX: x86Command += 0x0000; break; + case x86_EBX: x86Command += 0x0300; break; + case x86_ECX: x86Command += 0x0100; break; + case x86_EDX: x86Command += 0x0200; break; + case x86_ESI: x86Command += 0x0600; break; + case x86_EDI: x86Command += 0x0700; break; + case x86_ESP: x86Command += 0x0400; break; + case x86_EBP: x86Command += 0x0500; break; + default: + DisplayError("LeaSourceAndOffset\nUnknown x86 Register"); + } + PUTDST16(m_RecompPos,x86Command); + PUTDST32(m_RecompPos,offset); + } else { + switch (x86DestReg) { + case x86_EAX: x86Command = 0x408D; break; + case x86_EBX: x86Command = 0x588D; break; + case x86_ECX: x86Command = 0x488D; break; + case x86_EDX: x86Command = 0x508D; break; + case x86_ESI: x86Command = 0x708D; break; + case x86_EDI: x86Command = 0x788D; break; + case x86_ESP: x86Command = 0x608D; break; + case x86_EBP: x86Command = 0x688D; break; + default: + DisplayError("LeaSourceAndOffset\nUnknown x86 Register"); + } + switch (x86SourceReg) { + case x86_EAX: x86Command += 0x0000; break; + case x86_EBX: x86Command += 0x0300; break; + case x86_ECX: x86Command += 0x0100; break; + case x86_EDX: x86Command += 0x0200; break; + case x86_ESI: x86Command += 0x0600; break; + case x86_EDI: x86Command += 0x0700; break; + case x86_ESP: x86Command += 0x0400; break; + case x86_EBP: x86Command += 0x0500; break; + default: + DisplayError("LeaSourceAndOffset\nUnknown x86 Register"); + } + PUTDST16(m_RecompPos,x86Command); + PUTDST8(m_RecompPos,offset); + } +} + +void CX86Ops::MoveConstByteToN64Mem(BYTE Const, x86Reg AddrReg) { + CPU_Message(" mov byte ptr [%s+N64mem], %Xh",x86_Name(AddrReg),Const); + switch (AddrReg) { + case x86_EAX: PUTDST16(m_RecompPos,0x80C6); break; + case x86_EBX: PUTDST16(m_RecompPos,0x83C6); break; + case x86_ECX: PUTDST16(m_RecompPos,0x81C6); break; + case x86_EDX: PUTDST16(m_RecompPos,0x82C6); break; + case x86_ESI: PUTDST16(m_RecompPos,0x86C6); break; + case x86_EDI: PUTDST16(m_RecompPos,0x87C6); break; + case x86_ESP: PUTDST16(m_RecompPos,0x84C6); break; + case x86_EBP: PUTDST16(m_RecompPos,0x85C6); break; + default: + DisplayError("MoveConstByteToN64Mem\nUnknown x86 Register"); + } + PUTDST32(m_RecompPos,_MMU->Rdram()); + PUTDST8(m_RecompPos,Const); +} + +void CX86Ops::MoveConstByteToVariable (BYTE Const,void *Variable, const char * VariableName) { + CPU_Message(" mov byte ptr [%s], %Xh",VariableName,Const); + PUTDST16(m_RecompPos,0x05C6); + PUTDST32(m_RecompPos,Variable); + PUTDST8(m_RecompPos,Const); +} + +void CX86Ops::MoveConstHalfToN64Mem(WORD Const, x86Reg AddrReg) { + CPU_Message(" mov word ptr [%s+N64mem], %Xh",x86_Name(AddrReg),Const); + PUTDST8(m_RecompPos,0x66); + switch (AddrReg) { + case x86_EAX: PUTDST16(m_RecompPos,0x80C7); break; + case x86_EBX: PUTDST16(m_RecompPos,0x83C7); break; + case x86_ECX: PUTDST16(m_RecompPos,0x81C7); break; + case x86_EDX: PUTDST16(m_RecompPos,0x82C7); break; + case x86_ESI: PUTDST16(m_RecompPos,0x86C7); break; + case x86_EDI: PUTDST16(m_RecompPos,0x87C7); break; + case x86_ESP: PUTDST16(m_RecompPos,0x84C7); break; + case x86_EBP: PUTDST16(m_RecompPos,0x85C7); break; + default: + DisplayError("MoveConstToN64Mem\nUnknown x86 Register"); + } + PUTDST32(m_RecompPos,_MMU->Rdram()); + PUTDST16(m_RecompPos,Const); +} + +void CX86Ops::MoveConstHalfToVariable (WORD Const,void *Variable, const char * VariableName) { + CPU_Message(" mov word ptr [%s], %Xh",VariableName,Const); + PUTDST8(m_RecompPos,0x66); + PUTDST16(m_RecompPos,0x05C7); + PUTDST32(m_RecompPos,Variable); + PUTDST16(m_RecompPos,Const); +} + +void CX86Ops::MoveConstHalfToX86regPointer(WORD Const, x86Reg AddrReg1, x86Reg AddrReg2) { + BYTE Param; + + CPU_Message(" mov word ptr [%s+%s],%Xh",x86_Name(AddrReg1), x86_Name(AddrReg2), Const); + + PUTDST8(m_RecompPos,0x66); + PUTDST16(m_RecompPos,0x04C7); + + switch (AddrReg1) { + case x86_EAX: Param = 0x00; break; + case x86_EBX: Param = 0x03; break; + case x86_ECX: Param = 0x01; break; + case x86_EDX: Param = 0x02; break; + case x86_ESI: Param = 0x06; break; + case x86_EDI: Param = 0x07; break; + default: + DisplayError("MoveConstToX86regPointer\nUnhandled x86 Register"); + } + + switch (AddrReg2) { + case x86_EAX: Param += 0x00; break; + case x86_EBX: Param += 0x18; break; + case x86_ECX: Param += 0x08; break; + case x86_EDX: Param += 0x10; break; + case x86_ESI: Param += 0x30; break; + case x86_EDI: Param += 0x38; break; + case x86_ESP: Param += 0x20; break; + case x86_EBP: Param += 0x28; break; + default: + DisplayError("MoveConstToX86regPointer\nUnhandled x86 Register"); + } + PUTDST8(m_RecompPos,Param); + PUTDST16(m_RecompPos,Const); +} + +void CX86Ops::MoveConstToMemoryDisp (DWORD Const, x86Reg AddrReg, DWORD Disp) { + CPU_Message(" mov dword ptr [%s+%Xh], %Xh",x86_Name(AddrReg),Disp,Const); + switch (AddrReg) { + case x86_EAX: PUTDST16(m_RecompPos,0x80C7); break; + case x86_EBX: PUTDST16(m_RecompPos,0x83C7); break; + case x86_ECX: PUTDST16(m_RecompPos,0x81C7); break; + case x86_EDX: PUTDST16(m_RecompPos,0x82C7); break; + case x86_ESI: PUTDST16(m_RecompPos,0x86C7); break; + case x86_EDI: PUTDST16(m_RecompPos,0x87C7); break; + case x86_ESP: PUTDST16(m_RecompPos,0x84C7); break; + case x86_EBP: PUTDST16(m_RecompPos,0x85C7); break; + default: + DisplayError("MoveConstToN64Mem\nUnknown x86 Register"); + } + PUTDST32(m_RecompPos,Disp); + PUTDST32(m_RecompPos,Const); +} + +void CX86Ops::MoveConstToN64Mem(DWORD Const, x86Reg AddrReg) { + CPU_Message(" mov dword ptr [%s+N64mem], %Xh",x86_Name(AddrReg),Const); + switch (AddrReg) { + case x86_EAX: PUTDST16(m_RecompPos,0x80C7); break; + case x86_EBX: PUTDST16(m_RecompPos,0x83C7); break; + case x86_ECX: PUTDST16(m_RecompPos,0x81C7); break; + case x86_EDX: PUTDST16(m_RecompPos,0x82C7); break; + case x86_ESI: PUTDST16(m_RecompPos,0x86C7); break; + case x86_EDI: PUTDST16(m_RecompPos,0x87C7); break; + case x86_ESP: PUTDST16(m_RecompPos,0x84C7); break; + case x86_EBP: PUTDST16(m_RecompPos,0x85C7); break; + default: + DisplayError("MoveConstToN64Mem\nUnknown x86 Register"); + } + PUTDST32(m_RecompPos,_MMU->Rdram()); + PUTDST32(m_RecompPos,Const); +} + +void CX86Ops::MoveConstToN64MemDisp (DWORD Const, x86Reg AddrReg, BYTE Disp) { + CPU_Message(" mov dword ptr [%s+N64mem+%Xh], %Xh",x86_Name(AddrReg),Const,Disp); + switch (AddrReg) { + case x86_EAX: PUTDST16(m_RecompPos,0x80C7); break; + case x86_EBX: PUTDST16(m_RecompPos,0x83C7); break; + case x86_ECX: PUTDST16(m_RecompPos,0x81C7); break; + case x86_EDX: PUTDST16(m_RecompPos,0x82C7); break; + case x86_ESI: PUTDST16(m_RecompPos,0x86C7); break; + case x86_EDI: PUTDST16(m_RecompPos,0x87C7); break; + case x86_ESP: PUTDST16(m_RecompPos,0x84C7); break; + case x86_EBP: PUTDST16(m_RecompPos,0x85C7); break; + default: + DisplayError("MoveConstToN64Mem\nUnknown x86 Register"); + } + PUTDST32(m_RecompPos,_MMU->Rdram() + Disp); + PUTDST32(m_RecompPos,Const); +} + +void CX86Ops::MoveConstToVariable (DWORD Const,void *Variable, const char * VariableName) { + CPU_Message(" mov dword ptr [%s], %Xh",VariableName,Const); + PUTDST16(m_RecompPos,0x05C7); + PUTDST32(m_RecompPos,Variable); + PUTDST32(m_RecompPos,Const); +} + +void CX86Ops::MoveConstToX86Pointer(DWORD Const, x86Reg X86Pointer) { + WORD x86Command; + + CPU_Message(" mov dword ptr [%s], %Xh",x86_Name(X86Pointer),Const); + + switch (X86Pointer) { + case x86_EAX: x86Command = 0x00C7; break; + case x86_EBX: x86Command = 0x03C7; break; + case x86_ECX: x86Command = 0x01C7; break; + case x86_EDX: x86Command = 0x02C7; break; + case x86_ESI: x86Command = 0x06C7; break; + case x86_EDI: x86Command = 0x07C7; break; + } + PUTDST16(m_RecompPos,x86Command); + PUTDST32(m_RecompPos,Const); +} + + +void CX86Ops::MoveConstToX86reg(DWORD Const, x86Reg reg) { + if (Const == 0) + { + XorX86RegToX86Reg(reg,reg); + } else { + CPU_Message(" mov %s, %Xh",x86_Name(reg),Const); + PUTDST16(m_RecompPos,0xC0C7 + (reg * 0x100)); + PUTDST32(m_RecompPos,Const); + } +} + +void CX86Ops::MoveConstByteToX86regPointer(BYTE Const, x86Reg AddrReg1, x86Reg AddrReg2) { + BYTE Param; + + CPU_Message(" mov byte ptr [%s+%s],%Xh",x86_Name(AddrReg1), x86_Name(AddrReg2), Const); + + PUTDST16(m_RecompPos,0x04C6); + + switch (AddrReg1) { + case x86_EAX: Param = 0x00; break; + case x86_EBX: Param = 0x03; break; + case x86_ECX: Param = 0x01; break; + case x86_EDX: Param = 0x02; break; + case x86_ESI: Param = 0x06; break; + case x86_EDI: Param = 0x07; break; + default: + DisplayError("MoveConstByteToX86regPointer\nUnhandled x86 Register"); + } + + switch (AddrReg2) { + case x86_EAX: Param += 0x00; break; + case x86_EBX: Param += 0x18; break; + case x86_ECX: Param += 0x08; break; + case x86_EDX: Param += 0x10; break; + case x86_ESI: Param += 0x30; break; + case x86_EDI: Param += 0x38; break; + case x86_ESP: Param += 0x20; break; + case x86_EBP: Param += 0x28; break; + default: + DisplayError("MoveConstByteToX86regPointer\nUnhandled x86 Register"); + } + PUTDST8(m_RecompPos,Param); + PUTDST8(m_RecompPos,Const); +} + +void CX86Ops::MoveConstToX86regPointer(DWORD Const, x86Reg AddrReg1, x86Reg AddrReg2) { + BYTE Param; + + CPU_Message(" mov dword ptr [%s+%s],%Xh",x86_Name(AddrReg1), x86_Name(AddrReg2), Const); + + PUTDST16(m_RecompPos,0x04C7); + + switch (AddrReg1) { + case x86_EAX: Param = 0x00; break; + case x86_EBX: Param = 0x03; break; + case x86_ECX: Param = 0x01; break; + case x86_EDX: Param = 0x02; break; + case x86_ESI: Param = 0x06; break; + case x86_EDI: Param = 0x07; break; + default: + DisplayError("MoveConstToX86regPointer\nUnhandled x86 Register"); + } + + switch (AddrReg2) { + case x86_EAX: Param += 0x00; break; + case x86_EBX: Param += 0x18; break; + case x86_ECX: Param += 0x08; break; + case x86_EDX: Param += 0x10; break; + case x86_ESI: Param += 0x30; break; + case x86_EDI: Param += 0x38; break; + case x86_ESP: Param += 0x20; break; + case x86_EBP: Param += 0x28; break; + default: + DisplayError("MoveConstToX86regPointer\nUnhandled x86 Register"); + } + PUTDST8(m_RecompPos,Param); + PUTDST32(m_RecompPos,Const); +} + +void CX86Ops::MoveN64MemDispToX86reg(x86Reg reg, x86Reg AddrReg, BYTE Disp) { + WORD x86Command; + + CPU_Message(" mov %s, dword ptr [%s+N64mem+%Xh]",x86_Name(reg),x86_Name(AddrReg),Disp); + switch (AddrReg) { + case x86_EAX: x86Command = 0x008B; break; + case x86_EBX: x86Command = 0x038B; break; + case x86_ECX: x86Command = 0x018B; break; + case x86_EDX: x86Command = 0x028B; break; + case x86_ESI: x86Command = 0x068B; break; + case x86_EDI: x86Command = 0x078B; break; + case x86_ESP: x86Command = 0x048B; break; + case x86_EBP: x86Command = 0x058B; break; + } + switch (reg) { + case x86_EAX: x86Command += 0x8000; break; + case x86_EBX: x86Command += 0x9800; break; + case x86_ECX: x86Command += 0x8800; break; + case x86_EDX: x86Command += 0x9000; break; + case x86_ESI: x86Command += 0xB000; break; + case x86_EDI: x86Command += 0xB800; break; + case x86_ESP: x86Command += 0xA000; break; + case x86_EBP: x86Command += 0xA800; break; + } + PUTDST16(m_RecompPos,x86Command); + PUTDST32(m_RecompPos,_MMU->Rdram() + Disp); +} + +void CX86Ops::MoveN64MemToX86reg(x86Reg reg, x86Reg AddrReg) { + WORD x86Command; + + CPU_Message(" mov %s, dword ptr [%s+N64mem]",x86_Name(reg),x86_Name(AddrReg)); + + switch (AddrReg) { + case x86_EAX: x86Command = 0x008B; break; + case x86_EBX: x86Command = 0x038B; break; + case x86_ECX: x86Command = 0x018B; break; + case x86_EDX: x86Command = 0x028B; break; + case x86_ESI: x86Command = 0x068B; break; + case x86_EDI: x86Command = 0x078B; break; + case x86_ESP: x86Command = 0x048B; break; + case x86_EBP: x86Command = 0x058B; break; + } + switch (reg) { + case x86_EAX: x86Command += 0x8000; break; + case x86_EBX: x86Command += 0x9800; break; + case x86_ECX: x86Command += 0x8800; break; + case x86_EDX: x86Command += 0x9000; break; + case x86_ESI: x86Command += 0xB000; break; + case x86_EDI: x86Command += 0xB800; break; + case x86_ESP: x86Command += 0xA000; break; + case x86_EBP: x86Command += 0xA800; break; + } + PUTDST16(m_RecompPos,x86Command); + PUTDST32(m_RecompPos,_MMU->Rdram()); +} + +void CX86Ops::MoveN64MemToX86regByte(x86Reg reg, x86Reg AddrReg) { + WORD x86Command; + + CPU_Message(" mov %s, byte ptr [%s+N64mem]",x86_ByteName(reg),x86_Name(AddrReg)); + switch (AddrReg) { + case x86_EAX: x86Command = 0x008A; break; + case x86_EBX: x86Command = 0x038A; break; + case x86_ECX: x86Command = 0x018A; break; + case x86_EDX: x86Command = 0x028A; break; + case x86_ESI: x86Command = 0x068A; break; + case x86_EDI: x86Command = 0x078A; break; + case x86_ESP: x86Command = 0x048A; break; + case x86_EBP: x86Command = 0x058A; break; + } + switch (reg) { + case x86_EAX: x86Command += 0x8000; break; + case x86_EBX: x86Command += 0x9800; break; + case x86_ECX: x86Command += 0x8800; break; + case x86_EDX: x86Command += 0x9000; break; +/* case x86_ESI: x86Command += 0xB000; break; */ +/* case x86_EDI: x86Command += 0xB800; break; */ +/* case x86_ESP: case x86_EBP: */ + default: + DisplayError("MoveN64MemToX86regByte\nInvalid x86 Register"); + break; + } + PUTDST16(m_RecompPos,x86Command); + PUTDST32(m_RecompPos,_MMU->Rdram()); +} + +void CX86Ops::MoveN64MemToX86regHalf(x86Reg reg, x86Reg AddrReg) { + WORD x86Command; + + CPU_Message(" mov %s, word ptr [%s+N64mem]",x86_HalfName(reg),x86_Name(AddrReg)); + + PUTDST8(m_RecompPos,0x66); + switch (AddrReg) { + case x86_EAX: x86Command = 0x008B; break; + case x86_EBX: x86Command = 0x038B; break; + case x86_ECX: x86Command = 0x018B; break; + case x86_EDX: x86Command = 0x028B; break; + case x86_ESI: x86Command = 0x068B; break; + case x86_EDI: x86Command = 0x078B; break; + case x86_ESP: x86Command = 0x048B; break; + case x86_EBP: x86Command = 0x058B; break; + } + switch (reg) { + case x86_EAX: x86Command += 0x8000; break; + case x86_EBX: x86Command += 0x9800; break; + case x86_ECX: x86Command += 0x8800; break; + case x86_EDX: x86Command += 0x9000; break; + case x86_ESI: x86Command += 0xB000; break; + case x86_EDI: x86Command += 0xB800; break; + case x86_ESP: x86Command += 0xA000; break; + case x86_EBP: x86Command += 0xA800; break; + } + PUTDST16(m_RecompPos,x86Command); + PUTDST32(m_RecompPos,_MMU->Rdram()); +} + +void CX86Ops::MoveSxByteX86regPointerToX86reg(x86Reg AddrReg1, x86Reg AddrReg2, x86Reg reg) { + BYTE Param; + + CPU_Message(" movsx %s, byte ptr [%s+%s]",x86_Name(reg),x86_Name(AddrReg1), x86_Name(AddrReg2)); + + PUTDST16(m_RecompPos,0xBE0F); + switch (reg) { + case x86_EAX: PUTDST8(m_RecompPos,0x04); break; + case x86_EBX: PUTDST8(m_RecompPos,0x1C); break; + case x86_ECX: PUTDST8(m_RecompPos,0x0C); break; + case x86_EDX: PUTDST8(m_RecompPos,0x14); break; + case x86_ESI: PUTDST8(m_RecompPos,0x34); break; + case x86_EDI: PUTDST8(m_RecompPos,0x3C); break; + case x86_ESP: PUTDST8(m_RecompPos,0x24); break; + case x86_EBP: PUTDST8(m_RecompPos,0x2C); break; + default: + DisplayError("MoveZxByteX86regPointerToX86reg\nUnhandled x86 Register"); + } + + switch (AddrReg1) { + case x86_EAX: Param = 0x00; break; + case x86_EBX: Param = 0x03; break; + case x86_ECX: Param = 0x01; break; + case x86_EDX: Param = 0x02; break; + case x86_ESI: Param = 0x06; break; + case x86_EDI: Param = 0x07; break; + default: + DisplayError("MoveZxByteX86regPointerToX86reg\nUnhandled x86 Register"); + } + + switch (AddrReg2) { + case x86_EAX: Param += 0x00; break; + case x86_EBX: Param += 0x18; break; + case x86_ECX: Param += 0x08; break; + case x86_EDX: Param += 0x10; break; + case x86_ESI: Param += 0x30; break; + case x86_EDI: Param += 0x38; break; + case x86_ESP: Param += 0x20; break; + case x86_EBP: Param += 0x28; break; + default: + DisplayError("MoveZxByteX86regPointerToX86reg\nUnhandled x86 Register"); + } + PUTDST8(m_RecompPos,Param); +} + +void CX86Ops::MoveSxHalfX86regPointerToX86reg(x86Reg AddrReg1, x86Reg AddrReg2, x86Reg reg) { + BYTE Param; + + CPU_Message(" movsx %s, word ptr [%s+%s]",x86_Name(reg),x86_Name(AddrReg1), x86_Name(AddrReg2)); + + PUTDST16(m_RecompPos,0xBF0F); + switch (reg) { + case x86_EAX: PUTDST8(m_RecompPos,0x04); break; + case x86_EBX: PUTDST8(m_RecompPos,0x1C); break; + case x86_ECX: PUTDST8(m_RecompPos,0x0C); break; + case x86_EDX: PUTDST8(m_RecompPos,0x14); break; + case x86_ESI: PUTDST8(m_RecompPos,0x34); break; + case x86_EDI: PUTDST8(m_RecompPos,0x3C); break; + case x86_ESP: PUTDST8(m_RecompPos,0x24); break; + case x86_EBP: PUTDST8(m_RecompPos,0x2C); break; + default: + DisplayError("MoveZxHalfX86regPointerToX86reg\nUnhandled x86 Register"); + } + + switch (AddrReg1) { + case x86_EAX: Param = 0x00; break; + case x86_EBX: Param = 0x03; break; + case x86_ECX: Param = 0x01; break; + case x86_EDX: Param = 0x02; break; + case x86_ESI: Param = 0x06; break; + case x86_EDI: Param = 0x07; break; + default: + DisplayError("MoveZxHalfX86regPointerToX86reg\nUnhandled x86 Register"); + } + + switch (AddrReg2) { + case x86_EAX: Param += 0x00; break; + case x86_EBX: Param += 0x18; break; + case x86_ECX: Param += 0x08; break; + case x86_EDX: Param += 0x10; break; + case x86_ESI: Param += 0x30; break; + case x86_EDI: Param += 0x38; break; + case x86_ESP: Param += 0x20; break; + case x86_EBP: Param += 0x28; break; + default: + DisplayError("MoveZxHalfX86regPointerToX86reg\nUnhandled x86 Register"); + } + PUTDST8(m_RecompPos,Param); +} + +void CX86Ops::MoveSxN64MemToX86regByte(x86Reg reg, x86Reg AddrReg) { + WORD x86Command; + + CPU_Message(" movsx %s, byte ptr [%s+Dmem]",x86_Name(reg),x86_Name(AddrReg)); + switch (AddrReg) { + case x86_EAX: x86Command = 0x00BE; break; + case x86_EBX: x86Command = 0x03BE; break; + case x86_ECX: x86Command = 0x01BE; break; + case x86_EDX: x86Command = 0x02BE; break; + case x86_ESI: x86Command = 0x06BE; break; + case x86_EDI: x86Command = 0x07BE; break; + case x86_ESP: x86Command = 0x04BE; break; + case x86_EBP: x86Command = 0x05BE; break; + } + switch (reg) { + case x86_EAX: x86Command += 0x8000; break; + case x86_EBX: x86Command += 0x9800; break; + case x86_ECX: x86Command += 0x8800; break; + case x86_EDX: x86Command += 0x9000; break; + case x86_ESI: x86Command += 0xB000; break; + case x86_EDI: x86Command += 0xB800; break; + case x86_ESP: x86Command += 0xA000; break; + case x86_EBP: x86Command += 0xA800; break; + default: + DisplayError("MoveSxN64MemToX86regByte\nInvalid x86 Register"); + break; + } + PUTDST8(m_RecompPos,0x0f); + PUTDST16(m_RecompPos,x86Command); + PUTDST32(m_RecompPos,_MMU->Rdram()); +} + +void CX86Ops::MoveSxN64MemToX86regHalf(x86Reg reg, x86Reg AddrReg) { + WORD x86Command; + + CPU_Message(" movsx %s, word ptr [%s+Dmem]",x86_Name(reg),x86_Name(AddrReg)); + + switch (AddrReg) { + case x86_EAX: x86Command = 0x00BF; break; + case x86_EBX: x86Command = 0x03BF; break; + case x86_ECX: x86Command = 0x01BF; break; + case x86_EDX: x86Command = 0x02BF; break; + case x86_ESI: x86Command = 0x06BF; break; + case x86_EDI: x86Command = 0x07BF; break; + case x86_ESP: x86Command = 0x04BF; break; + case x86_EBP: x86Command = 0x05BF; break; + } + switch (reg) { + case x86_EAX: x86Command += 0x8000; break; + case x86_EBX: x86Command += 0x9800; break; + case x86_ECX: x86Command += 0x8800; break; + case x86_EDX: x86Command += 0x9000; break; + case x86_ESI: x86Command += 0xB000; break; + case x86_EDI: x86Command += 0xB800; break; + case x86_ESP: x86Command += 0xA000; break; + case x86_EBP: x86Command += 0xA800; break; + } + + PUTDST8(m_RecompPos, 0x0f); + PUTDST16(m_RecompPos,x86Command); + PUTDST32(m_RecompPos,_MMU->Rdram()); +} + +void CX86Ops::MoveSxVariableToX86regByte(void *Variable, const char * VariableName, x86Reg reg) { + CPU_Message(" movsx %s, byte ptr [%s]",x86_Name(reg),VariableName); + + PUTDST16(m_RecompPos, 0xbe0f); + + switch (reg) { + case x86_EAX: PUTDST8(m_RecompPos,0x05); break; + case x86_EBX: PUTDST8(m_RecompPos,0x1D); break; + case x86_ECX: PUTDST8(m_RecompPos,0x0D); break; + case x86_EDX: PUTDST8(m_RecompPos,0x15); break; + case x86_ESI: PUTDST8(m_RecompPos,0x35); break; + case x86_EDI: PUTDST8(m_RecompPos,0x3D); break; + case x86_ESP: PUTDST8(m_RecompPos,0x25); break; + case x86_EBP: PUTDST8(m_RecompPos,0x2D); break; + default: DisplayError("MoveSxVariableToX86regHalf\nUnknown x86 Register"); + } + PUTDST32(m_RecompPos,Variable); +} + +void CX86Ops::MoveSxVariableToX86regHalf(void *Variable, const char * VariableName, x86Reg reg) { + CPU_Message(" movsx %s, word ptr [%s]",x86_Name(reg),VariableName); + + PUTDST16(m_RecompPos, 0xbf0f); + + switch (reg) { + case x86_EAX: PUTDST8(m_RecompPos,0x05); break; + case x86_EBX: PUTDST8(m_RecompPos,0x1D); break; + case x86_ECX: PUTDST8(m_RecompPos,0x0D); break; + case x86_EDX: PUTDST8(m_RecompPos,0x15); break; + case x86_ESI: PUTDST8(m_RecompPos,0x35); break; + case x86_EDI: PUTDST8(m_RecompPos,0x3D); break; + case x86_ESP: PUTDST8(m_RecompPos,0x25); break; + case x86_EBP: PUTDST8(m_RecompPos,0x2D); break; + default: DisplayError("MoveSxVariableToX86regHalf\nUnknown x86 Register"); + } + PUTDST32(m_RecompPos,Variable); +} + +void CX86Ops::MoveVariableToX86reg(void *Variable, const char * VariableName, x86Reg reg) { + CPU_Message(" mov %s, dword ptr [%s]",x86_Name(reg),VariableName); + switch (reg) { + case x86_EAX: PUTDST16(m_RecompPos,0x058B); break; + case x86_EBX: PUTDST16(m_RecompPos,0x1D8B); break; + case x86_ECX: PUTDST16(m_RecompPos,0x0D8B); break; + case x86_EDX: PUTDST16(m_RecompPos,0x158B); break; + case x86_ESI: PUTDST16(m_RecompPos,0x358B); break; + case x86_EDI: PUTDST16(m_RecompPos,0x3D8B); break; + case x86_ESP: PUTDST16(m_RecompPos,0x258B); break; + case x86_EBP: PUTDST16(m_RecompPos,0x2D8B); break; + default: DisplayError("MoveVariableToX86reg\nUnknown x86 Register"); + } + PUTDST32(m_RecompPos,Variable); +} + +void CX86Ops::MoveVariableDispToX86Reg(void *Variable, const char * VariableName, x86Reg reg, x86Reg AddrReg, int Multiplier) { + int x; + CPU_Message(" mov %s, dword ptr [%s+%s*%i]",x86_Name(reg),VariableName, x86_Name(AddrReg), Multiplier); + + PUTDST8(m_RecompPos,0x8B); + + switch (reg) { + case x86_EAX: PUTDST8(m_RecompPos,0x04); break; + case x86_EBX: PUTDST8(m_RecompPos,0x1C); break; + case x86_ECX: PUTDST8(m_RecompPos,0x0C); break; + case x86_EDX: PUTDST8(m_RecompPos,0x14); break; + case x86_ESI: PUTDST8(m_RecompPos,0x34); break; + case x86_EDI: PUTDST8(m_RecompPos,0x3C); break; + case x86_ESP: PUTDST8(m_RecompPos,0x24); break; + case x86_EBP: PUTDST8(m_RecompPos,0x2C); break; + } + + /* put in shifter 2(01), 4(10), 8(11) */ + switch (Multiplier) { + case 1: x = 0; break; + case 2: x = 0x40; break; + case 4: x = 0x80; break; + case 8: x = 0xC0; break; + default: DisplayError("Move\nInvalid x86 multiplier"); + } + + /* format xx|000000 */ + switch (AddrReg) { + case x86_EAX: PUTDST8(m_RecompPos,0x05|x); break; + case x86_EBX: PUTDST8(m_RecompPos,0x1D|x); break; + case x86_ECX: PUTDST8(m_RecompPos,0x0D|x); break; + case x86_EDX: PUTDST8(m_RecompPos,0x15|x); break; + case x86_ESI: PUTDST8(m_RecompPos,0x35|x); break; + case x86_EDI: PUTDST8(m_RecompPos,0x3D|x); break; + case x86_ESP: PUTDST8(m_RecompPos,0x25|x); break; + case x86_EBP: PUTDST8(m_RecompPos,0x2D|x); break; + } + + PUTDST32(m_RecompPos,Variable); +} + +void CX86Ops::MoveVariableToX86regByte(void *Variable, const char * VariableName, x86Reg reg) { + CPU_Message(" mov %s, byte ptr [%s]",x86_ByteName(reg),VariableName); + switch (reg) { + case x86_EAX: PUTDST16(m_RecompPos,0x058A); break; + case x86_EBX: PUTDST16(m_RecompPos,0x1D8A); break; + case x86_ECX: PUTDST16(m_RecompPos,0x0D8A); break; + case x86_EDX: PUTDST16(m_RecompPos,0x158A); break; + default: DisplayError("MoveVariableToX86regByte\nUnknown x86 Register"); + } + PUTDST32(m_RecompPos,Variable); +} + +void CX86Ops::MoveVariableToX86regHalf(void *Variable, const char * VariableName, x86Reg reg) { + CPU_Message(" mov %s, word ptr [%s]",x86_HalfName(reg),VariableName); + PUTDST8(m_RecompPos,0x66); + switch (reg) { + case x86_EAX: PUTDST16(m_RecompPos,0x058B); break; + case x86_EBX: PUTDST16(m_RecompPos,0x1D8B); break; + case x86_ECX: PUTDST16(m_RecompPos,0x0D8B); break; + case x86_EDX: PUTDST16(m_RecompPos,0x158B); break; + case x86_ESI: PUTDST16(m_RecompPos,0x358B); break; + case x86_EDI: PUTDST16(m_RecompPos,0x3D8B); break; + case x86_ESP: PUTDST16(m_RecompPos,0x258B); break; + case x86_EBP: PUTDST16(m_RecompPos,0x2D8B); break; + default: DisplayError("MoveVariableToX86reg\nUnknown x86 Register"); + } + PUTDST32(m_RecompPos,Variable); +} + +void CX86Ops::MoveX86regByteToN64Mem(x86Reg reg, x86Reg AddrReg) { + WORD x86Command; + + CPU_Message(" mov byte ptr [%s+N64mem], %s",x86_Name(AddrReg),x86_ByteName(reg)); + + switch (AddrReg) { + case x86_EAX: x86Command = 0x0088; break; + case x86_EBX: x86Command = 0x0388; break; + case x86_ECX: x86Command = 0x0188; break; + case x86_EDX: x86Command = 0x0288; break; + case x86_ESI: x86Command = 0x0688; break; + case x86_EDI: x86Command = 0x0788; break; + } + switch (reg) { + case x86_EAX: x86Command += 0x8000; break; + case x86_EBX: x86Command += 0x9800; break; + case x86_ECX: x86Command += 0x8800; break; + case x86_EDX: x86Command += 0x9000; break; + } + PUTDST16(m_RecompPos,x86Command); + PUTDST32(m_RecompPos,_MMU->Rdram()); +} + +void CX86Ops::MoveX86regByteToVariable(x86Reg reg, void * Variable, const char * VariableName) { + CPU_Message(" mov byte ptr [%s], %s",VariableName,x86_ByteName(reg)); + switch (reg) { + case x86_EAX: PUTDST16(m_RecompPos,0x0588); break; + case x86_EBX: PUTDST16(m_RecompPos,0x1D88); break; + case x86_ECX: PUTDST16(m_RecompPos,0x0D88); break; + case x86_EDX: PUTDST16(m_RecompPos,0x1588); break; + default: + DisplayError("MoveX86regByteToVariable\nUnknown x86 Register"); + } + PUTDST32(m_RecompPos,Variable); +} + +void CX86Ops::MoveX86regByteToX86regPointer(x86Reg reg, x86Reg AddrReg1, x86Reg AddrReg2) { + BYTE Param; + + CPU_Message(" mov byte ptr [%s+%s],%s",x86_Name(AddrReg1), x86_Name(AddrReg2), x86_ByteName(reg)); + + switch (reg) { + case x86_EAX: PUTDST16(m_RecompPos,0x0488); break; + case x86_EBX: PUTDST16(m_RecompPos,0x1C88); break; + case x86_ECX: PUTDST16(m_RecompPos,0x0C88); break; + case x86_EDX: PUTDST16(m_RecompPos,0x1488); break; + case x86_ESI: PUTDST16(m_RecompPos,0x3488); break; + case x86_EDI: PUTDST16(m_RecompPos,0x3C88); break; + case x86_ESP: PUTDST16(m_RecompPos,0x2488); break; + case x86_EBP: PUTDST16(m_RecompPos,0x2C88); break; + default: + DisplayError("MoveX86regToX86regPointer\nUnhandled x86 Register"); + } + + switch (AddrReg1) { + case x86_EAX: Param = 0x00; break; + case x86_EBX: Param = 0x03; break; + case x86_ECX: Param = 0x01; break; + case x86_EDX: Param = 0x02; break; + case x86_ESI: Param = 0x06; break; + case x86_EDI: Param = 0x07; break; + default: + DisplayError("MoveX86regToX86regPointer\nUnhandled x86 Register"); + } + + switch (AddrReg2) { + case x86_EAX: Param += 0x00; break; + case x86_EBX: Param += 0x18; break; + case x86_ECX: Param += 0x08; break; + case x86_EDX: Param += 0x10; break; + case x86_ESI: Param += 0x30; break; + case x86_EDI: Param += 0x38; break; + case x86_ESP: Param += 0x20; break; + case x86_EBP: Param += 0x28; break; + default: + DisplayError("MoveX86regByteToX86regPointer\nUnhandled x86 Register"); + } + PUTDST8(m_RecompPos,Param); +} + +void CX86Ops::MoveX86regHalfToN64Mem(x86Reg reg, x86Reg AddrReg) { + WORD x86Command; + + CPU_Message(" mov word ptr [%s+N64mem], %s",x86_Name(AddrReg),x86_HalfName(reg)); + + PUTDST8(m_RecompPos,0x66); + switch (AddrReg) { + case x86_EAX: x86Command = 0x0089; break; + case x86_EBX: x86Command = 0x0389; break; + case x86_ECX: x86Command = 0x0189; break; + case x86_EDX: x86Command = 0x0289; break; + case x86_ESI: x86Command = 0x0689; break; + case x86_EDI: x86Command = 0x0789; break; + case x86_ESP: x86Command = 0x0489; break; + case x86_EBP: x86Command = 0x0589; break; + } + switch (reg) { + case x86_EAX: x86Command += 0x8000; break; + case x86_EBX: x86Command += 0x9800; break; + case x86_ECX: x86Command += 0x8800; break; + case x86_EDX: x86Command += 0x9000; break; + case x86_ESI: x86Command += 0xB000; break; + case x86_EDI: x86Command += 0xB800; break; + case x86_ESP: x86Command += 0xA000; break; + case x86_EBP: x86Command += 0xA800; break; + } + PUTDST16(m_RecompPos,x86Command); + PUTDST32(m_RecompPos,_MMU->Rdram()); +} + +void CX86Ops::MoveX86regHalfToVariable(x86Reg reg, void * Variable, const char * VariableName) { + CPU_Message(" mov word ptr [%s], %s",VariableName,x86_HalfName(reg)); + PUTDST8(m_RecompPos,0x66); + switch (reg) { + case x86_EAX: PUTDST16(m_RecompPos,0x0589); break; + case x86_EBX: PUTDST16(m_RecompPos,0x1D89); break; + case x86_ECX: PUTDST16(m_RecompPos,0x0D89); break; + case x86_EDX: PUTDST16(m_RecompPos,0x1589); break; + case x86_ESI: PUTDST16(m_RecompPos,0x3589); break; + case x86_EDI: PUTDST16(m_RecompPos,0x3D89); break; + case x86_ESP: PUTDST16(m_RecompPos,0x2589); break; + case x86_EBP: PUTDST16(m_RecompPos,0x2D89); break; + default: + DisplayError("MoveX86regToVariable\nUnknown x86 Register"); + } + PUTDST32(m_RecompPos,Variable); +} + +void CX86Ops::MoveX86regHalfToX86regPointer(x86Reg reg, x86Reg AddrReg1, x86Reg AddrReg2) { + BYTE Param; + + CPU_Message(" mov word ptr [%s+%s],%s",x86_Name(AddrReg1), x86_Name(AddrReg2), x86_HalfName(reg)); + + PUTDST8(m_RecompPos,0x66); + switch (reg) { + case x86_EAX: PUTDST16(m_RecompPos,0x0489); break; + case x86_EBX: PUTDST16(m_RecompPos,0x1C89); break; + case x86_ECX: PUTDST16(m_RecompPos,0x0C89); break; + case x86_EDX: PUTDST16(m_RecompPos,0x1489); break; + case x86_ESI: PUTDST16(m_RecompPos,0x3489); break; + case x86_EDI: PUTDST16(m_RecompPos,0x3C89); break; + case x86_ESP: PUTDST16(m_RecompPos,0x2489); break; + case x86_EBP: PUTDST16(m_RecompPos,0x2C89); break; + default: + DisplayError("MoveX86regHalfToX86regPointer\nUnhandled x86 Register"); + } + + switch (AddrReg1) { + case x86_EAX: Param = 0x00; break; + case x86_EBX: Param = 0x03; break; + case x86_ECX: Param = 0x01; break; + case x86_EDX: Param = 0x02; break; + case x86_ESI: Param = 0x06; break; + case x86_EDI: Param = 0x07; break; + default: + DisplayError("MoveX86regHalfToX86regPointer\nUnhandled x86 Register"); + } + + switch (AddrReg2) { + case x86_EAX: Param += 0x00; break; + case x86_EBX: Param += 0x18; break; + case x86_ECX: Param += 0x08; break; + case x86_EDX: Param += 0x10; break; + case x86_ESI: Param += 0x30; break; + case x86_EDI: Param += 0x38; break; + case x86_ESP: Param += 0x20; break; + case x86_EBP: Param += 0x28; break; + default: + DisplayError("MoveX86regHalfToX86regPointer\nUnhandled x86 Register"); + } + PUTDST8(m_RecompPos,Param); +} + +void CX86Ops::MoveX86PointerToX86reg(x86Reg reg, x86Reg X86Pointer) { + WORD x86Command; + + CPU_Message(" mov %s, dword ptr [%s]",x86_Name(reg),x86_Name(X86Pointer)); + + switch (X86Pointer) { + case x86_EAX: x86Command = 0x008B; break; + case x86_EBX: x86Command = 0x038B; break; + case x86_ECX: x86Command = 0x018B; break; + case x86_EDX: x86Command = 0x028B; break; + case x86_ESI: x86Command = 0x068B; break; + case x86_EDI: x86Command = 0x078B; break; + } + + switch (reg) { + case x86_EAX: x86Command += 0x0000; break; + case x86_EBX: x86Command += 0x1800; break; + case x86_ECX: x86Command += 0x0800; break; + case x86_EDX: x86Command += 0x1000; break; + case x86_ESI: x86Command += 0x3000; break; + case x86_EDI: x86Command += 0x3800; break; + case x86_ESP: x86Command += 0x2000; break; + case x86_EBP: x86Command += 0x2800; break; + } + PUTDST16(m_RecompPos,x86Command); +} + +void CX86Ops::MoveX86PointerToX86regDisp(x86Reg reg, x86Reg X86Pointer, BYTE Disp) { + WORD x86Command; + + CPU_Message(" mov %s, dword ptr [%s] + %d",x86_Name(reg),x86_Name(X86Pointer),Disp); + + switch (X86Pointer) { + case x86_EAX: x86Command = 0x408B; break; + case x86_EBX: x86Command = 0x438B; break; + case x86_ECX: x86Command = 0x418B; break; + case x86_EDX: x86Command = 0x428B; break; + case x86_ESI: x86Command = 0x468B; break; + case x86_EDI: x86Command = 0x478B; break; + } + + switch (reg) { + case x86_EAX: x86Command += 0x0000; break; + case x86_EBX: x86Command += 0x1800; break; + case x86_ECX: x86Command += 0x0800; break; + case x86_EDX: x86Command += 0x1000; break; + case x86_ESI: x86Command += 0x3000; break; + case x86_EDI: x86Command += 0x3800; break; + case x86_ESP: x86Command += 0x2000; break; + case x86_EBP: x86Command += 0x2800; break; + } + PUTDST16(m_RecompPos,x86Command); + PUTDST8(m_RecompPos,Disp); +} + +void CX86Ops::MoveX86regPointerToX86reg(x86Reg AddrReg1, x86Reg AddrReg2, x86Reg reg) { + BYTE Param; + + CPU_Message(" mov %s, dword ptr [%s+%s]",x86_Name(reg),x86_Name(AddrReg1), x86_Name(AddrReg2)); + + switch (reg) { + case x86_EAX: PUTDST16(m_RecompPos,0x048B); break; + case x86_EBX: PUTDST16(m_RecompPos,0x1C8B); break; + case x86_ECX: PUTDST16(m_RecompPos,0x0C8B); break; + case x86_EDX: PUTDST16(m_RecompPos,0x148B); break; + case x86_ESI: PUTDST16(m_RecompPos,0x348B); break; + case x86_EDI: PUTDST16(m_RecompPos,0x3C8B); break; + case x86_ESP: PUTDST16(m_RecompPos,0x248B); break; + case x86_EBP: PUTDST16(m_RecompPos,0x2C8B); break; + default: + DisplayError("MoveX86regPointerToX86reg\nUnhandled x86 Register"); + } + + switch (AddrReg1) { + case x86_EAX: Param = 0x00; break; + case x86_EBX: Param = 0x03; break; + case x86_ECX: Param = 0x01; break; + case x86_EDX: Param = 0x02; break; + case x86_ESI: Param = 0x06; break; + case x86_EDI: Param = 0x07; break; + default: + DisplayError("MoveX86regPointerToX86reg\nUnhandled x86 Register"); + } + + switch (AddrReg2) { + case x86_EAX: Param += 0x00; break; + case x86_EBX: Param += 0x18; break; + case x86_ECX: Param += 0x08; break; + case x86_EDX: Param += 0x10; break; + case x86_ESI: Param += 0x30; break; + case x86_EDI: Param += 0x38; break; + case x86_ESP: Param += 0x20; break; + case x86_EBP: Param += 0x28; break; + default: + DisplayError("MoveX86regPointerToX86reg\nUnhandled x86 Register"); + } + PUTDST8(m_RecompPos,Param); +} + +void CX86Ops::MoveX86regPointerToX86regDisp8(x86Reg AddrReg1, x86Reg AddrReg2, x86Reg reg, BYTE offset) { + BYTE Param; + + CPU_Message(" mov %s, dword ptr [%s+%s]",x86_Name(reg),x86_Name(AddrReg1), x86_Name(AddrReg2)); + + switch (reg) { + case x86_EAX: PUTDST16(m_RecompPos,0x448B); break; + case x86_EBX: PUTDST16(m_RecompPos,0x5C8B); break; + case x86_ECX: PUTDST16(m_RecompPos,0x4C8B); break; + case x86_EDX: PUTDST16(m_RecompPos,0x548B); break; + case x86_ESI: PUTDST16(m_RecompPos,0x748B); break; + case x86_EDI: PUTDST16(m_RecompPos,0x7C8B); break; + case x86_ESP: PUTDST16(m_RecompPos,0x648B); break; + case x86_EBP: PUTDST16(m_RecompPos,0x6C8B); break; + default: + DisplayError("MoveX86regPointerToX86reg\nUnhandled x86 Register"); + } + + switch (AddrReg1) { + case x86_EAX: Param = 0x00; break; + case x86_EBX: Param = 0x03; break; + case x86_ECX: Param = 0x01; break; + case x86_EDX: Param = 0x02; break; + case x86_ESI: Param = 0x06; break; + case x86_EDI: Param = 0x07; break; + default: + DisplayError("MoveX86regPointerToX86reg\nUnhandled x86 Register"); + } + + switch (AddrReg2) { + case x86_EAX: Param += 0x00; break; + case x86_EBX: Param += 0x18; break; + case x86_ECX: Param += 0x08; break; + case x86_EDX: Param += 0x10; break; + case x86_ESI: Param += 0x30; break; + case x86_EDI: Param += 0x38; break; + case x86_ESP: Param += 0x20; break; + case x86_EBP: Param += 0x28; break; + default: + DisplayError("MoveX86regPointerToX86reg\nUnhandled x86 Register"); + } + PUTDST8(m_RecompPos,Param); + PUTDST8(m_RecompPos,offset); +} + +void CX86Ops::MoveX86regToMemory(x86Reg reg, x86Reg AddrReg, DWORD Disp) { + WORD x86Command; + + CPU_Message(" mov dword ptr [%s+%X], %s",x86_Name(AddrReg),Disp,x86_Name(reg)); + switch (AddrReg) { + case x86_EAX: x86Command = 0x0089; break; + case x86_EBX: x86Command = 0x0389; break; + case x86_ECX: x86Command = 0x0189; break; + case x86_EDX: x86Command = 0x0289; break; + case x86_ESI: x86Command = 0x0689; break; + case x86_EDI: x86Command = 0x0789; break; + case x86_ESP: x86Command = 0x0489; break; + case x86_EBP: x86Command = 0x0589; break; + } + switch (reg) { + case x86_EAX: x86Command += 0x8000; break; + case x86_EBX: x86Command += 0x9800; break; + case x86_ECX: x86Command += 0x8800; break; + case x86_EDX: x86Command += 0x9000; break; + case x86_ESI: x86Command += 0xB000; break; + case x86_EDI: x86Command += 0xB800; break; + case x86_ESP: x86Command += 0xA000; break; + case x86_EBP: x86Command += 0xA800; break; + } + PUTDST16(m_RecompPos,x86Command); + PUTDST32(m_RecompPos,Disp); +} + +void CX86Ops::MoveX86regToN64Mem(x86Reg reg, x86Reg AddrReg) { + WORD x86Command; + + CPU_Message(" mov dword ptr [%s+N64mem], %s",x86_Name(AddrReg),x86_Name(reg));\ + switch (AddrReg) { + case x86_EAX: x86Command = 0x0089; break; + case x86_EBX: x86Command = 0x0389; break; + case x86_ECX: x86Command = 0x0189; break; + case x86_EDX: x86Command = 0x0289; break; + case x86_ESI: x86Command = 0x0689; break; + case x86_EDI: x86Command = 0x0789; break; + case x86_ESP: x86Command = 0x0489; break; + case x86_EBP: x86Command = 0x0589; break; + } + switch (reg) { + case x86_EAX: x86Command += 0x8000; break; + case x86_EBX: x86Command += 0x9800; break; + case x86_ECX: x86Command += 0x8800; break; + case x86_EDX: x86Command += 0x9000; break; + case x86_ESI: x86Command += 0xB000; break; + case x86_EDI: x86Command += 0xB800; break; + case x86_ESP: x86Command += 0xA000; break; + case x86_EBP: x86Command += 0xA800; break; + } + PUTDST16(m_RecompPos,x86Command); + PUTDST32(m_RecompPos,_MMU->Rdram()); +} + +void CX86Ops::MoveX86regToN64MemDisp(x86Reg reg, x86Reg AddrReg, BYTE Disp) { + WORD x86Command; + + CPU_Message(" mov dword ptr [%s+N64mem+%d], %s",x86_Name(AddrReg),Disp,x86_Name(reg));\ + switch (AddrReg) { + case x86_EAX: x86Command = 0x0089; break; + case x86_EBX: x86Command = 0x0389; break; + case x86_ECX: x86Command = 0x0189; break; + case x86_EDX: x86Command = 0x0289; break; + case x86_ESI: x86Command = 0x0689; break; + case x86_EDI: x86Command = 0x0789; break; + case x86_ESP: x86Command = 0x0489; break; + case x86_EBP: x86Command = 0x0589; break; + } + switch (reg) { + case x86_EAX: x86Command += 0x8000; break; + case x86_EBX: x86Command += 0x9800; break; + case x86_ECX: x86Command += 0x8800; break; + case x86_EDX: x86Command += 0x9000; break; + case x86_ESI: x86Command += 0xB000; break; + case x86_EDI: x86Command += 0xB800; break; + case x86_ESP: x86Command += 0xA000; break; + case x86_EBP: x86Command += 0xA800; break; + } + PUTDST16(m_RecompPos,x86Command); + PUTDST32(m_RecompPos,_MMU->Rdram()+Disp); +} + +void CX86Ops::MoveX86regToVariable(x86Reg reg, void * Variable, const char * VariableName) { + CPU_Message(" mov dword ptr [%s], %s",VariableName,x86_Name(reg)); + switch (reg) { + case x86_EAX: PUTDST16(m_RecompPos,0x0589); break; + case x86_EBX: PUTDST16(m_RecompPos,0x1D89); break; + case x86_ECX: PUTDST16(m_RecompPos,0x0D89); break; + case x86_EDX: PUTDST16(m_RecompPos,0x1589); break; + case x86_ESI: PUTDST16(m_RecompPos,0x3589); break; + case x86_EDI: PUTDST16(m_RecompPos,0x3D89); break; + case x86_ESP: PUTDST16(m_RecompPos,0x2589); break; + case x86_EBP: PUTDST16(m_RecompPos,0x2D89); break; + default: + DisplayError("MoveX86regToVariable\nUnknown x86 Register"); + } + PUTDST32(m_RecompPos,Variable); +} + +void CX86Ops::MoveX86RegToX86Reg(x86Reg Source, x86Reg Destination) { + WORD x86Command; + + if (Source == Destination) + { + return; + } + CPU_Message(" mov %s, %s",x86_Name(Destination),x86_Name(Source)); + + switch (Destination) {\ + case x86_EAX: x86Command = 0x0089; break; + case x86_EBX: x86Command = 0x0389; break; + case x86_ECX: x86Command = 0x0189; break; + case x86_EDX: x86Command = 0x0289; break; + case x86_ESI: x86Command = 0x0689; break; + case x86_EDI: x86Command = 0x0789; break; + case x86_ESP: x86Command = 0x0489; break; + case x86_EBP: x86Command = 0x0589; break; + } + + switch (Source) { + case x86_EAX: x86Command += 0xC000; break; + case x86_EBX: x86Command += 0xD800; break; + case x86_ECX: x86Command += 0xC800; break; + case x86_EDX: x86Command += 0xD000; break; + case x86_ESI: x86Command += 0xF000; break; + case x86_EDI: x86Command += 0xF800; break; + case x86_ESP: x86Command += 0xE000; break; + case x86_EBP: x86Command += 0xE800; break; + } + PUTDST16(m_RecompPos,x86Command); +} + +void CX86Ops::MoveX86regToX86Pointer(x86Reg reg, x86Reg X86Pointer) { + WORD x86Command; + + CPU_Message(" mov dword ptr [%s], %s",x86_Name(X86Pointer),x86_Name(reg)); + + switch (X86Pointer) { + case x86_EAX: x86Command = 0x0089; break; + case x86_EBX: x86Command = 0x0389; break; + case x86_ECX: x86Command = 0x0189; break; + case x86_EDX: x86Command = 0x0289; break; + case x86_ESI: x86Command = 0x0689; break; + case x86_EDI: x86Command = 0x0789; break; + } + + switch (reg) { + case x86_EAX: x86Command += 0x0000; break; + case x86_EBX: x86Command += 0x1800; break; + case x86_ECX: x86Command += 0x0800; break; + case x86_EDX: x86Command += 0x1000; break; + case x86_ESI: x86Command += 0x3000; break; + case x86_EDI: x86Command += 0x3800; break; + case x86_ESP: x86Command += 0x2000; break; + case x86_EBP: x86Command += 0x2800; break; + } + PUTDST16(m_RecompPos,x86Command); +} + +void CX86Ops::MoveX86regToX86regPointer(x86Reg reg, x86Reg AddrReg1, x86Reg AddrReg2) { + BYTE Param; + + CPU_Message(" mov dword ptr [%s+%s],%s",x86_Name(AddrReg1), x86_Name(AddrReg2), x86_Name(reg)); + + switch (reg) { + case x86_EAX: PUTDST16(m_RecompPos,0x0489); break; + case x86_EBX: PUTDST16(m_RecompPos,0x1C89); break; + case x86_ECX: PUTDST16(m_RecompPos,0x0C89); break; + case x86_EDX: PUTDST16(m_RecompPos,0x1489); break; + case x86_ESI: PUTDST16(m_RecompPos,0x3489); break; + case x86_EDI: PUTDST16(m_RecompPos,0x3C89); break; + case x86_ESP: PUTDST16(m_RecompPos,0x2489); break; + case x86_EBP: PUTDST16(m_RecompPos,0x2C89); break; + default: + DisplayError("MoveX86regToX86regPointer\nUnhandled x86 Register"); + } + + switch (AddrReg1) { + case x86_EAX: Param = 0x00; break; + case x86_EBX: Param = 0x03; break; + case x86_ECX: Param = 0x01; break; + case x86_EDX: Param = 0x02; break; + case x86_ESI: Param = 0x06; break; + case x86_EDI: Param = 0x07; break; + default: + DisplayError("MoveX86regToX86regPointer\nUnhandled x86 Register"); + } + + switch (AddrReg2) { + case x86_EAX: Param += 0x00; break; + case x86_EBX: Param += 0x18; break; + case x86_ECX: Param += 0x08; break; + case x86_EDX: Param += 0x10; break; + case x86_ESI: Param += 0x30; break; + case x86_EDI: Param += 0x38; break; + case x86_ESP: Param += 0x20; break; + case x86_EBP: Param += 0x28; break; + default: + DisplayError("MoveX86regToX86regPointer\nUnhandled x86 Register"); + } + PUTDST8(m_RecompPos,Param); +} + +void CX86Ops::MoveZxByteX86regPointerToX86reg(x86Reg AddrReg1, x86Reg AddrReg2, x86Reg reg) { + BYTE Param; + + CPU_Message(" movzx %s, byte ptr [%s+%s]",x86_Name(reg),x86_Name(AddrReg1), x86_Name(AddrReg2)); + + PUTDST16(m_RecompPos,0xB60F); + switch (reg) { + case x86_EAX: PUTDST8(m_RecompPos,0x04); break; + case x86_EBX: PUTDST8(m_RecompPos,0x1C); break; + case x86_ECX: PUTDST8(m_RecompPos,0x0C); break; + case x86_EDX: PUTDST8(m_RecompPos,0x14); break; + case x86_ESI: PUTDST8(m_RecompPos,0x34); break; + case x86_EDI: PUTDST8(m_RecompPos,0x3C); break; + case x86_ESP: PUTDST8(m_RecompPos,0x24); break; + case x86_EBP: PUTDST8(m_RecompPos,0x2C); break; + default: + DisplayError("MoveZxByteX86regPointerToX86reg\nUnhandled x86 Register"); + } + + switch (AddrReg1) { + case x86_EAX: Param = 0x00; break; + case x86_EBX: Param = 0x03; break; + case x86_ECX: Param = 0x01; break; + case x86_EDX: Param = 0x02; break; + case x86_ESI: Param = 0x06; break; + case x86_EDI: Param = 0x07; break; + default: + DisplayError("MoveZxByteX86regPointerToX86reg\nUnhandled x86 Register"); + } + + switch (AddrReg2) { + case x86_EAX: Param += 0x00; break; + case x86_EBX: Param += 0x18; break; + case x86_ECX: Param += 0x08; break; + case x86_EDX: Param += 0x10; break; + case x86_ESI: Param += 0x30; break; + case x86_EDI: Param += 0x38; break; + case x86_ESP: Param += 0x20; break; + case x86_EBP: Param += 0x28; break; + default: + DisplayError("MoveZxByteX86regPointerToX86reg\nUnhandled x86 Register"); + } + PUTDST8(m_RecompPos,Param); +} + +void CX86Ops::MoveZxHalfX86regPointerToX86reg(x86Reg AddrReg1, x86Reg AddrReg2, x86Reg reg) { + BYTE Param; + + CPU_Message(" movzx %s, word ptr [%s+%s]",x86_Name(reg),x86_Name(AddrReg1), x86_Name(AddrReg2)); + + PUTDST16(m_RecompPos,0xB70F); + switch (reg) { + case x86_EAX: PUTDST8(m_RecompPos,0x04); break; + case x86_EBX: PUTDST8(m_RecompPos,0x1C); break; + case x86_ECX: PUTDST8(m_RecompPos,0x0C); break; + case x86_EDX: PUTDST8(m_RecompPos,0x14); break; + case x86_ESI: PUTDST8(m_RecompPos,0x34); break; + case x86_EDI: PUTDST8(m_RecompPos,0x3C); break; + case x86_ESP: PUTDST8(m_RecompPos,0x24); break; + case x86_EBP: PUTDST8(m_RecompPos,0x2C); break; + default: + DisplayError("MoveZxHalfX86regPointerToX86reg\nUnhandled x86 Register"); + } + + switch (AddrReg1) { + case x86_EAX: Param = 0x00; break; + case x86_EBX: Param = 0x03; break; + case x86_ECX: Param = 0x01; break; + case x86_EDX: Param = 0x02; break; + case x86_ESI: Param = 0x06; break; + case x86_EDI: Param = 0x07; break; + default: + DisplayError("MoveZxHalfX86regPointerToX86reg\nUnhandled x86 Register"); + } + + switch (AddrReg2) { + case x86_EAX: Param += 0x00; break; + case x86_EBX: Param += 0x18; break; + case x86_ECX: Param += 0x08; break; + case x86_EDX: Param += 0x10; break; + case x86_ESI: Param += 0x30; break; + case x86_EDI: Param += 0x38; break; + case x86_ESP: Param += 0x20; break; + case x86_EBP: Param += 0x28; break; + default: + DisplayError("MoveZxHalfX86regPointerToX86reg\nUnhandled x86 Register"); + } + PUTDST8(m_RecompPos,Param); +} + +void CX86Ops::MoveZxN64MemToX86regByte(x86Reg reg, x86Reg AddrReg) { + WORD x86Command; + + CPU_Message(" movzx %s, byte ptr [%s+_MMU->Rdram()]",x86_Name(reg),x86_Name(AddrReg)); + switch (AddrReg) { + case x86_EAX: x86Command = 0x00B6; break; + case x86_EBX: x86Command = 0x03B6; break; + case x86_ECX: x86Command = 0x01B6; break; + case x86_EDX: x86Command = 0x02B6; break; + case x86_ESI: x86Command = 0x06B6; break; + case x86_EDI: x86Command = 0x07B6; break; + case x86_ESP: x86Command = 0x04B6; break; + case x86_EBP: x86Command = 0x05B6; break; + } + switch (reg) { + case x86_EAX: x86Command += 0x8000; break; + case x86_EBX: x86Command += 0x9800; break; + case x86_ECX: x86Command += 0x8800; break; + case x86_EDX: x86Command += 0x9000; break; + case x86_ESI: x86Command += 0xB000; break; + case x86_EDI: x86Command += 0xB800; break; + case x86_ESP: x86Command += 0xA000; break; + case x86_EBP: x86Command += 0xA800; break; + default: + DisplayError("MoveZxN64MemToX86regByte\nInvalid x86 Register"); + break; + } + PUTDST8(m_RecompPos,0x0f); + PUTDST16(m_RecompPos,x86Command); + PUTDST32(m_RecompPos,_MMU->Rdram()); +} + +void CX86Ops::MoveZxN64MemToX86regHalf(x86Reg reg, x86Reg AddrReg) { + WORD x86Command; + + CPU_Message(" movzx %s, word ptr [%s+_MMU->Rdram()]",x86_Name(reg),x86_Name(AddrReg)); + + switch (AddrReg) { + case x86_EAX: x86Command = 0x00B7; break; + case x86_EBX: x86Command = 0x03B7; break; + case x86_ECX: x86Command = 0x01B7; break; + case x86_EDX: x86Command = 0x02B7; break; + case x86_ESI: x86Command = 0x06B7; break; + case x86_EDI: x86Command = 0x07B7; break; + case x86_ESP: x86Command = 0x04B7; break; + case x86_EBP: x86Command = 0x05B7; break; + } + switch (reg) { + case x86_EAX: x86Command += 0x8000; break; + case x86_EBX: x86Command += 0x9800; break; + case x86_ECX: x86Command += 0x8800; break; + case x86_EDX: x86Command += 0x9000; break; + case x86_ESI: x86Command += 0xB000; break; + case x86_EDI: x86Command += 0xB800; break; + case x86_ESP: x86Command += 0xA000; break; + case x86_EBP: x86Command += 0xA800; break; + } + + PUTDST8(m_RecompPos, 0x0f); + PUTDST16(m_RecompPos,x86Command); + PUTDST32(m_RecompPos,_MMU->Rdram()); +} + +void CX86Ops::MoveZxVariableToX86regByte(void *Variable, const char * VariableName, x86Reg reg) { + CPU_Message(" movzx %s, byte ptr [%s]",x86_Name(reg),VariableName); + + PUTDST16(m_RecompPos, 0xb60f); + + switch (reg) { + case x86_EAX: PUTDST8(m_RecompPos,0x05); break; + case x86_EBX: PUTDST8(m_RecompPos,0x1D); break; + case x86_ECX: PUTDST8(m_RecompPos,0x0D); break; + case x86_EDX: PUTDST8(m_RecompPos,0x15); break; + case x86_ESI: PUTDST8(m_RecompPos,0x35); break; + case x86_EDI: PUTDST8(m_RecompPos,0x3D); break; + case x86_ESP: PUTDST8(m_RecompPos,0x25); break; + case x86_EBP: PUTDST8(m_RecompPos,0x2D); break; + default: DisplayError("MoveZxVariableToX86regHalf\nUnknown x86 Register"); + } + PUTDST32(m_RecompPos,Variable); +} + +void CX86Ops::MoveZxVariableToX86regHalf(void *Variable, const char * VariableName, x86Reg reg) { + CPU_Message(" movzx %s, word ptr [%s]",x86_Name(reg),VariableName); + + PUTDST16(m_RecompPos, 0xb70f); + + switch (reg) { + case x86_EAX: PUTDST8(m_RecompPos,0x05); break; + case x86_EBX: PUTDST8(m_RecompPos,0x1D); break; + case x86_ECX: PUTDST8(m_RecompPos,0x0D); break; + case x86_EDX: PUTDST8(m_RecompPos,0x15); break; + case x86_ESI: PUTDST8(m_RecompPos,0x35); break; + case x86_EDI: PUTDST8(m_RecompPos,0x3D); break; + case x86_ESP: PUTDST8(m_RecompPos,0x25); break; + case x86_EBP: PUTDST8(m_RecompPos,0x2D); break; + default: DisplayError("MoveZxVariableToX86regHalf\nUnknown x86 Register"); + } + PUTDST32(m_RecompPos,Variable); +} + +void CX86Ops::MulX86reg(x86Reg reg) { + CPU_Message(" mul %s",x86_Name(reg));\ + switch (reg) { + case x86_EAX: PUTDST16(m_RecompPos,0xE0F7); break; + case x86_EBX: PUTDST16(m_RecompPos,0xE3F7); break; + case x86_ECX: PUTDST16(m_RecompPos,0xE1F7); break; + case x86_EDX: PUTDST16(m_RecompPos,0xE2F7); break; + case x86_ESI: PUTDST16(m_RecompPos,0xE6F7); break; + case x86_EDI: PUTDST16(m_RecompPos,0xE7F7); break; + case x86_ESP: PUTDST16(m_RecompPos,0xE4F7); break; + case x86_EBP: PUTDST16(m_RecompPos,0xE5F7); break; + default: + DisplayError("MulX86reg\nUnknown x86 Register"); + } +} + +void CX86Ops::NotX86Reg(x86Reg reg) { + CPU_Message(" not %s",x86_Name(reg)); + switch (reg) { + case x86_EAX: PUTDST16(m_RecompPos,0xD0F7); break; + case x86_EBX: PUTDST16(m_RecompPos,0xD3F7); break; + case x86_ECX: PUTDST16(m_RecompPos,0xD1F7); break; + case x86_EDX: PUTDST16(m_RecompPos,0xD2F7); break; + case x86_ESI: PUTDST16(m_RecompPos,0xD6F7); break; + case x86_EDI: PUTDST16(m_RecompPos,0xD7F7); break; + case x86_ESP: PUTDST16(m_RecompPos,0xD4F7); break; + case x86_EBP: PUTDST16(m_RecompPos,0xD5F7); break; + } +} + +void CX86Ops::OrConstToVariable(DWORD Const, void * Variable, const char * VariableName) { + CPU_Message(" or dword ptr [%s], 0x%X",VariableName, Const); + PUTDST16(m_RecompPos,0x0D81); + PUTDST32(m_RecompPos,Variable); + PUTDST32(m_RecompPos,Const); +} + +void CX86Ops::OrConstToX86Reg(DWORD Const, x86Reg reg) { + CPU_Message(" or %s, %Xh",x86_Name(reg),Const); + if ((Const & 0xFFFFFF80) != 0 && (Const & 0xFFFFFF80) != 0xFFFFFF80) { + switch (reg) { + case x86_EAX: PUTDST16(m_RecompPos,0xC881); break; + case x86_EBX: PUTDST16(m_RecompPos,0xCB81); break; + case x86_ECX: PUTDST16(m_RecompPos,0xC981); break; + case x86_EDX: PUTDST16(m_RecompPos,0xCA81); break; + case x86_ESI: PUTDST16(m_RecompPos,0xCE81); break; + case x86_EDI: PUTDST16(m_RecompPos,0xCF81); break; + case x86_ESP: PUTDST16(m_RecompPos,0xCC81); break; + case x86_EBP: PUTDST16(m_RecompPos,0xCD81); break; + } + PUTDST32(m_RecompPos, Const); + } else { + switch (reg) { + case x86_EAX: PUTDST16(m_RecompPos,0xC883); break; + case x86_EBX: PUTDST16(m_RecompPos,0xCB83); break; + case x86_ECX: PUTDST16(m_RecompPos,0xC983); break; + case x86_EDX: PUTDST16(m_RecompPos,0xCA83); break; + case x86_ESI: PUTDST16(m_RecompPos,0xCE83); break; + case x86_EDI: PUTDST16(m_RecompPos,0xCF83); break; + case x86_ESP: PUTDST16(m_RecompPos,0xCC83); break; + case x86_EBP: PUTDST16(m_RecompPos,0xCD83); break; + } + PUTDST8(m_RecompPos, Const); + } +} + +void CX86Ops::OrVariableToX86Reg(void * Variable, const char * VariableName, x86Reg reg) { + CPU_Message(" or %s, dword ptr [%s]",x86_Name(reg),VariableName); + switch (reg) { + case x86_EAX: PUTDST16(m_RecompPos,0x050B); break; + case x86_EBX: PUTDST16(m_RecompPos,0x1D0B); break; + case x86_ECX: PUTDST16(m_RecompPos,0x0D0B); break; + case x86_EDX: PUTDST16(m_RecompPos,0x150B); break; + case x86_ESI: PUTDST16(m_RecompPos,0x350B); break; + case x86_EDI: PUTDST16(m_RecompPos,0x3D0B); break; + case x86_ESP: PUTDST16(m_RecompPos,0x250B); break; + case x86_EBP: PUTDST16(m_RecompPos,0x2D0B); break; + } + PUTDST32(m_RecompPos,Variable); +} + +void CX86Ops::OrX86RegToVariable(void * Variable, const char * VariableName, x86Reg reg) { + CPU_Message(" or dword ptr [%s], %s",VariableName, x86_Name(reg)); + switch (reg) { + case x86_EAX: PUTDST16(m_RecompPos,0x0509); break; + case x86_EBX: PUTDST16(m_RecompPos,0x1D09); break; + case x86_ECX: PUTDST16(m_RecompPos,0x0D09); break; + case x86_EDX: PUTDST16(m_RecompPos,0x1509); break; + case x86_ESI: PUTDST16(m_RecompPos,0x3509); break; + case x86_EDI: PUTDST16(m_RecompPos,0x3D09); break; + case x86_ESP: PUTDST16(m_RecompPos,0x2509); break; + case x86_EBP: PUTDST16(m_RecompPos,0x2D09); break; + } + PUTDST32(m_RecompPos,Variable); +} + +void CX86Ops::OrX86RegToX86Reg(x86Reg Destination, x86Reg Source) { + WORD x86Command; + + CPU_Message(" or %s, %s",x86_Name(Destination),x86_Name(Source)); + switch (Source) { + case x86_EAX: x86Command = 0x000B; break; + case x86_EBX: x86Command = 0x030B; break; + case x86_ECX: x86Command = 0x010B; break; + case x86_EDX: x86Command = 0x020B; break; + case x86_ESI: x86Command = 0x060B; break; + case x86_EDI: x86Command = 0x070B; break; + case x86_ESP: x86Command = 0x040B; break; + case x86_EBP: x86Command = 0x050B; break; + } + switch (Destination) { + case x86_EAX: x86Command += 0xC000; break; + case x86_EBX: x86Command += 0xD800; break; + case x86_ECX: x86Command += 0xC800; break; + case x86_EDX: x86Command += 0xD000; break; + case x86_ESI: x86Command += 0xF000; break; + case x86_EDI: x86Command += 0xF800; break; + case x86_ESP: x86Command += 0xE000; break; + case x86_EBP: x86Command += 0xE800; break; + } + PUTDST16(m_RecompPos,x86Command); +} + +void CX86Ops::Popad(void) { + CPU_Message(" popad"); + PUTDST8(m_RecompPos,0x61); +} + +void CX86Ops::Pushad(void) { + CPU_Message(" pushad"); + PUTDST8(m_RecompPos,0x60); +} + +void CX86Ops::Push(x86Reg reg) { + CPU_Message(" push %s", x86_Name(reg)); + + switch(reg) { + case x86_EAX: PUTDST8(m_RecompPos, 0x50); break; + case x86_EBX: PUTDST8(m_RecompPos, 0x53); break; + case x86_ECX: PUTDST8(m_RecompPos, 0x51); break; + case x86_EDX: PUTDST8(m_RecompPos, 0x52); break; + case x86_ESI: PUTDST8(m_RecompPos, 0x56); break; + case x86_EDI: PUTDST8(m_RecompPos, 0x57); break; + case x86_ESP: PUTDST8(m_RecompPos, 0x54); break; + case x86_EBP: PUTDST8(m_RecompPos, 0x55); break; + } +} + +void CX86Ops::Pop(x86Reg reg) { + CPU_Message(" pop %s", x86_Name(reg)); + + switch(reg) { + case x86_EAX: PUTDST8(m_RecompPos, 0x58); break; + case x86_EBX: PUTDST8(m_RecompPos, 0x5B); break; + case x86_ECX: PUTDST8(m_RecompPos, 0x59); break; + case x86_EDX: PUTDST8(m_RecompPos, 0x5A); break; + case x86_ESI: PUTDST8(m_RecompPos, 0x5E); break; + case x86_EDI: PUTDST8(m_RecompPos, 0x5F); break; + case x86_ESP: PUTDST8(m_RecompPos, 0x5C); break; + case x86_EBP: PUTDST8(m_RecompPos, 0x5D); break; + } +} + +void CX86Ops::PushImm32(char * String, DWORD Value) { + CPU_Message(" push %s",String); + PUTDST8(m_RecompPos,0x68); + PUTDST32(m_RecompPos,Value); +} + +void CX86Ops::Ret(void) { + CPU_Message(" ret"); + PUTDST8(m_RecompPos,0xC3); +} + +void CX86Ops::Seta(x86Reg reg) { + CPU_Message(" seta %s",x86_ByteName(reg)); + PUTDST16(m_RecompPos,0x970F); + switch (reg) { + case x86_EAX: PUTDST8(m_RecompPos,0xC0); break; + case x86_EBX: PUTDST8(m_RecompPos,0xC3); break; + case x86_ECX: PUTDST8(m_RecompPos,0xC1); break; + case x86_EDX: PUTDST8(m_RecompPos,0xC2); break; + default: + DisplayError("Seta\nUnknown x86 Register"); + } +} + +void CX86Ops::SetaVariable(void * Variable, const char * VariableName) { + CPU_Message(" seta byte ptr [%s]",VariableName); + PUTDST16(m_RecompPos,0x970F); + PUTDST8(m_RecompPos,0x05); + PUTDST32(m_RecompPos,Variable); +} + +void CX86Ops::Setae(x86Reg reg) { + CPU_Message(" setae %s",x86_ByteName(reg)); + PUTDST16(m_RecompPos,0x930F); + switch (reg) { + case x86_EAX: PUTDST8(m_RecompPos,0xC0); break; + case x86_EBX: PUTDST8(m_RecompPos,0xC3); break; + case x86_ECX: PUTDST8(m_RecompPos,0xC1); break; + case x86_EDX: PUTDST8(m_RecompPos,0xC2); break; + default: + DisplayError("Seta\nUnknown x86 Register"); + } +} + +void CX86Ops::Setb(x86Reg reg) { + CPU_Message(" setb %s",x86_ByteName(reg)); + PUTDST16(m_RecompPos,0x920F); + switch (reg) { + case x86_EAX: PUTDST8(m_RecompPos,0xC0); break; + case x86_EBX: PUTDST8(m_RecompPos,0xC3); break; + case x86_ECX: PUTDST8(m_RecompPos,0xC1); break; + case x86_EDX: PUTDST8(m_RecompPos,0xC2); break; + default: + DisplayError("Setb\nUnknown x86 Register"); + } +} + +void CX86Ops::SetbVariable(void * Variable, const char * VariableName) { + CPU_Message(" setb byte ptr [%s]",VariableName); + PUTDST16(m_RecompPos,0x920F); + PUTDST8(m_RecompPos,0x05); + PUTDST32(m_RecompPos,Variable); +} + +void CX86Ops::Setg(x86Reg reg) { + CPU_Message(" setg %s",x86_ByteName(reg)); + PUTDST16(m_RecompPos,0x9F0F); + switch (reg) { + case x86_EAX: PUTDST8(m_RecompPos,0xC0); break; + case x86_EBX: PUTDST8(m_RecompPos,0xC3); break; + case x86_ECX: PUTDST8(m_RecompPos,0xC1); break; + case x86_EDX: PUTDST8(m_RecompPos,0xC2); break; + default: + DisplayError("Setg\nUnknown x86 Register"); + } +} + +void CX86Ops::SetgVariable(void * Variable, const char * VariableName) { + CPU_Message(" setg byte ptr [%s]",VariableName); + PUTDST16(m_RecompPos,0x9F0F); + PUTDST8(m_RecompPos,0x05); + PUTDST32(m_RecompPos,Variable); +} + +void CX86Ops::Setl(x86Reg reg) { + CPU_Message(" setl %s",x86_ByteName(reg)); + PUTDST16(m_RecompPos,0x9C0F); + switch (reg) { + case x86_EAX: PUTDST8(m_RecompPos,0xC0); break; + case x86_EBX: PUTDST8(m_RecompPos,0xC3); break; + case x86_ECX: PUTDST8(m_RecompPos,0xC1); break; + case x86_EDX: PUTDST8(m_RecompPos,0xC2); break; + default: + DisplayError("Setl\nUnknown x86 Register"); + } +} + +void CX86Ops::SetlVariable(void * Variable, const char * VariableName) { + CPU_Message(" setl byte ptr [%s]",VariableName); + PUTDST16(m_RecompPos,0x9C0F); + PUTDST8(m_RecompPos,0x05); + PUTDST32(m_RecompPos,Variable); +} + + +void CX86Ops::Setz(x86Reg reg) { + CPU_Message(" setz %s",x86_ByteName(reg)); + PUTDST16(m_RecompPos,0x940F); + switch (reg) { + case x86_EAX: PUTDST8(m_RecompPos,0xC0); break; + case x86_EBX: PUTDST8(m_RecompPos,0xC3); break; + case x86_ECX: PUTDST8(m_RecompPos,0xC1); break; + case x86_EDX: PUTDST8(m_RecompPos,0xC2); break; + default: + DisplayError("Setz\nUnknown x86 Register"); + } +} + +void CX86Ops::Setnz(x86Reg reg) { + CPU_Message(" setnz %s",x86_ByteName(reg)); + PUTDST16(m_RecompPos,0x950F); + switch (reg) { + case x86_EAX: PUTDST8(m_RecompPos,0xC0); break; + case x86_EBX: PUTDST8(m_RecompPos,0xC3); break; + case x86_ECX: PUTDST8(m_RecompPos,0xC1); break; + case x86_EDX: PUTDST8(m_RecompPos,0xC2); break; + default: + DisplayError("Setnz\nUnknown x86 Register"); + } +} + +void CX86Ops::ShiftLeftDouble(x86Reg Destination, x86Reg Source) { + unsigned char s = 0xC0; + + CPU_Message(" shld %s, %s, cl", x86_Name(Destination),x86_Name(Source)); + PUTDST16(m_RecompPos,0xA50F); + + switch (Destination) { + case x86_EAX: s |= 0x00; break; + case x86_EBX: s |= 0x03; break; + case x86_ECX: s |= 0x01; break; + case x86_EDX: s |= 0x02; break; + case x86_ESI: s |= 0x06; break; + case x86_EDI: s |= 0x07; break; + case x86_ESP: s |= 0x04; break; + case x86_EBP: s |= 0x05; break; + } + + switch (Source) { + case x86_EAX: s |= 0x00 << 3; break; + case x86_EBX: s |= 0x03 << 3; break; + case x86_ECX: s |= 0x01 << 3; break; + case x86_EDX: s |= 0x02 << 3; break; + case x86_ESI: s |= 0x06 << 3; break; + case x86_EDI: s |= 0x07 << 3; break; + case x86_ESP: s |= 0x04 << 3; break; + case x86_EBP: s |= 0x05 << 3; break; + } + + PUTDST8(m_RecompPos,s); +} + +void CX86Ops::ShiftLeftDoubleImmed(x86Reg Destination, x86Reg Source, BYTE Immediate) { + unsigned char s = 0xC0; + + CPU_Message(" shld %s, %s, %Xh", x86_Name(Destination),x86_Name(Source), Immediate); + PUTDST16(m_RecompPos,0xA40F); + + switch (Destination) { + case x86_EAX: s |= 0x00; break; + case x86_EBX: s |= 0x03; break; + case x86_ECX: s |= 0x01; break; + case x86_EDX: s |= 0x02; break; + case x86_ESI: s |= 0x06; break; + case x86_EDI: s |= 0x07; break; + case x86_ESP: s |= 0x04; break; + case x86_EBP: s |= 0x05; break; + } + + switch (Source) { + case x86_EAX: s |= 0x00 << 3; break; + case x86_EBX: s |= 0x03 << 3; break; + case x86_ECX: s |= 0x01 << 3; break; + case x86_EDX: s |= 0x02 << 3; break; + case x86_ESI: s |= 0x06 << 3; break; + case x86_EDI: s |= 0x07 << 3; break; + case x86_ESP: s |= 0x04 << 3; break; + case x86_EBP: s |= 0x05 << 3; break; + } + + PUTDST8(m_RecompPos,s); + PUTDST8(m_RecompPos,Immediate); +} + +void CX86Ops::ShiftLeftSign(x86Reg reg) { + CPU_Message(" shl %s, cl",x86_Name(reg)); + switch (reg) { + case x86_EAX: PUTDST16(m_RecompPos,0xE0D3); break; + case x86_EBX: PUTDST16(m_RecompPos,0xE3D3); break; + case x86_ECX: PUTDST16(m_RecompPos,0xE1D3); break; + case x86_EDX: PUTDST16(m_RecompPos,0xE2D3); break; + case x86_ESI: PUTDST16(m_RecompPos,0xE6D3); break; + case x86_EDI: PUTDST16(m_RecompPos,0xE7D3); break; + case x86_ESP: PUTDST16(m_RecompPos,0xE4D3); break; + case x86_EBP: PUTDST16(m_RecompPos,0xE5D3); break; + } +} + +void CX86Ops::ShiftLeftSignImmed(x86Reg reg, BYTE Immediate) { + CPU_Message(" shl %s, %Xh",x86_Name(reg),Immediate); + switch (reg) { + case x86_EAX: PUTDST16(m_RecompPos,0xE0C1); break; + case x86_EBX: PUTDST16(m_RecompPos,0xE3C1); break; + case x86_ECX: PUTDST16(m_RecompPos,0xE1C1); break; + case x86_EDX: PUTDST16(m_RecompPos,0xE2C1); break; + case x86_ESI: PUTDST16(m_RecompPos,0xE6C1); break; + case x86_EDI: PUTDST16(m_RecompPos,0xE7C1); break; + case x86_ESP: PUTDST16(m_RecompPos,0xE4C1); break; + case x86_EBP: PUTDST16(m_RecompPos,0xE5C1); break; + } + PUTDST8(m_RecompPos,Immediate); +} + +void CX86Ops::ShiftRightSign(x86Reg reg) { + CPU_Message(" sar %s, cl",x86_Name(reg)); + switch (reg) { + case x86_EAX: PUTDST16(m_RecompPos,0xF8D3); break; + case x86_EBX: PUTDST16(m_RecompPos,0xFBD3); break; + case x86_ECX: PUTDST16(m_RecompPos,0xF9D3); break; + case x86_EDX: PUTDST16(m_RecompPos,0xFAD3); break; + case x86_ESI: PUTDST16(m_RecompPos,0xFED3); break; + case x86_EDI: PUTDST16(m_RecompPos,0xFFD3); break; + case x86_ESP: PUTDST16(m_RecompPos,0xFCD3); break; + case x86_EBP: PUTDST16(m_RecompPos,0xFDD3); break; + } +} + +void CX86Ops::ShiftRightSignImmed(x86Reg reg, BYTE Immediate) { + CPU_Message(" sar %s, %Xh",x86_Name(reg),Immediate); + switch (reg) { + case x86_EAX: PUTDST16(m_RecompPos,0xF8C1); break; + case x86_EBX: PUTDST16(m_RecompPos,0xFBC1); break; + case x86_ECX: PUTDST16(m_RecompPos,0xF9C1); break; + case x86_EDX: PUTDST16(m_RecompPos,0xFAC1); break; + case x86_ESI: PUTDST16(m_RecompPos,0xFEC1); break; + case x86_EDI: PUTDST16(m_RecompPos,0xFFC1); break; + case x86_ESP: PUTDST16(m_RecompPos,0xFCC1); break; + case x86_EBP: PUTDST16(m_RecompPos,0xFDC1); break; + default: + DisplayError("ShiftRightSignImmed\nUnknown x86 Register"); + } + PUTDST8(m_RecompPos,Immediate); +} + +void CX86Ops::ShiftRightUnsign(x86Reg reg) { + CPU_Message(" shr %s, cl",x86_Name(reg)); + switch (reg) { + case x86_EAX: PUTDST16(m_RecompPos,0xE8D3); break; + case x86_EBX: PUTDST16(m_RecompPos,0xEBD3); break; + case x86_ECX: PUTDST16(m_RecompPos,0xE9D3); break; + case x86_EDX: PUTDST16(m_RecompPos,0xEAD3); break; + case x86_ESI: PUTDST16(m_RecompPos,0xEED3); break; + case x86_EDI: PUTDST16(m_RecompPos,0xEFD3); break; + case x86_ESP: PUTDST16(m_RecompPos,0xECD3); break; + case x86_EBP: PUTDST16(m_RecompPos,0xEDD3); break; + } +} + +void CX86Ops::ShiftRightDouble(x86Reg Destination, x86Reg Source) { + unsigned char s = 0xC0; + + CPU_Message(" shrd %s, %s, cl", x86_Name(Destination),x86_Name(Source)); + PUTDST16(m_RecompPos,0xAD0F); + + switch (Destination) { + case x86_EAX: s |= 0x00; break; + case x86_EBX: s |= 0x03; break; + case x86_ECX: s |= 0x01; break; + case x86_EDX: s |= 0x02; break; + case x86_ESI: s |= 0x06; break; + case x86_EDI: s |= 0x07; break; + case x86_ESP: s |= 0x04; break; + case x86_EBP: s |= 0x05; break; + } + + switch (Source) { + case x86_EAX: s |= 0x00 << 3; break; + case x86_EBX: s |= 0x03 << 3; break; + case x86_ECX: s |= 0x01 << 3; break; + case x86_EDX: s |= 0x02 << 3; break; + case x86_ESI: s |= 0x06 << 3; break; + case x86_EDI: s |= 0x07 << 3; break; + case x86_ESP: s |= 0x04 << 3; break; + case x86_EBP: s |= 0x05 << 3; break; + } + + PUTDST8(m_RecompPos,s); +} + +void CX86Ops::ShiftRightDoubleImmed(x86Reg Destination, x86Reg Source, BYTE Immediate) { + unsigned char s = 0xC0; + + CPU_Message(" shrd %s, %s, %Xh", x86_Name(Destination),x86_Name(Source), Immediate); + PUTDST16(m_RecompPos,0xAC0F); + + switch (Destination) { + case x86_EAX: s |= 0x00; break; + case x86_EBX: s |= 0x03; break; + case x86_ECX: s |= 0x01; break; + case x86_EDX: s |= 0x02; break; + case x86_ESI: s |= 0x06; break; + case x86_EDI: s |= 0x07; break; + case x86_ESP: s |= 0x04; break; + case x86_EBP: s |= 0x05; break; + } + + switch (Source) { + case x86_EAX: s |= 0x00 << 3; break; + case x86_EBX: s |= 0x03 << 3; break; + case x86_ECX: s |= 0x01 << 3; break; + case x86_EDX: s |= 0x02 << 3; break; + case x86_ESI: s |= 0x06 << 3; break; + case x86_EDI: s |= 0x07 << 3; break; + case x86_ESP: s |= 0x04 << 3; break; + case x86_EBP: s |= 0x05 << 3; break; + } + + PUTDST8(m_RecompPos,s); + PUTDST8(m_RecompPos,Immediate); +} + +void CX86Ops::ShiftRightUnsignImmed(x86Reg reg, BYTE Immediate) { + CPU_Message(" shr %s, %Xh",x86_Name(reg),Immediate); + switch (reg) { + case x86_EAX: PUTDST16(m_RecompPos,0xE8C1); break; + case x86_EBX: PUTDST16(m_RecompPos,0xEBC1); break; + case x86_ECX: PUTDST16(m_RecompPos,0xE9C1); break; + case x86_EDX: PUTDST16(m_RecompPos,0xEAC1); break; + case x86_ESI: PUTDST16(m_RecompPos,0xEEC1); break; + case x86_EDI: PUTDST16(m_RecompPos,0xEFC1); break; + case x86_ESP: PUTDST16(m_RecompPos,0xECC1); break; + case x86_EBP: PUTDST16(m_RecompPos,0xEDC1); break; + } + PUTDST8(m_RecompPos,Immediate); +} + +void CX86Ops::SbbConstFromX86Reg (x86Reg reg, DWORD Const) { + CPU_Message(" sbb %s, %Xh",x86_Name(reg),Const); + if ((Const & 0xFFFFFF80) != 0 && (Const & 0xFFFFFF80) != 0xFFFFFF80) { + switch (reg) { + case x86_EAX: PUTDST16(m_RecompPos,0xD881); break; + case x86_EBX: PUTDST16(m_RecompPos,0xDB81); break; + case x86_ECX: PUTDST16(m_RecompPos,0xD981); break; + case x86_EDX: PUTDST16(m_RecompPos,0xDA81); break; + case x86_ESI: PUTDST16(m_RecompPos,0xDE81); break; + case x86_EDI: PUTDST16(m_RecompPos,0xDF81); break; + case x86_ESP: PUTDST16(m_RecompPos,0xDC81); break; + case x86_EBP: PUTDST16(m_RecompPos,0xDD81); break; + } + PUTDST32(m_RecompPos, Const); + } else { + switch (reg) { + case x86_EAX: PUTDST16(m_RecompPos,0xD883); break; + case x86_EBX: PUTDST16(m_RecompPos,0xDB83); break; + case x86_ECX: PUTDST16(m_RecompPos,0xD983); break; + case x86_EDX: PUTDST16(m_RecompPos,0xDA83); break; + case x86_ESI: PUTDST16(m_RecompPos,0xDE83); break; + case x86_EDI: PUTDST16(m_RecompPos,0xDF83); break; + case x86_ESP: PUTDST16(m_RecompPos,0xDC83); break; + case x86_EBP: PUTDST16(m_RecompPos,0xDD83); break; + } + PUTDST8(m_RecompPos, Const); + } +} + +void CX86Ops::SbbVariableFromX86reg(x86Reg reg, void * Variable, const char * VariableName) { + CPU_Message(" sbb %s, dword ptr [%s]",x86_Name(reg),VariableName); + switch (reg) { + case x86_EAX: PUTDST16(m_RecompPos,0x051B); break; + case x86_EBX: PUTDST16(m_RecompPos,0x1D1B); break; + case x86_ECX: PUTDST16(m_RecompPos,0x0D1B); break; + case x86_EDX: PUTDST16(m_RecompPos,0x151B); break; + case x86_ESI: PUTDST16(m_RecompPos,0x351B); break; + case x86_EDI: PUTDST16(m_RecompPos,0x3D1B); break; + case x86_ESP: PUTDST16(m_RecompPos,0x251B); break; + case x86_EBP: PUTDST16(m_RecompPos,0x2D1B); break; + default: + DisplayError("SbbVariableFromX86reg\nUnknown x86 Register"); + } + PUTDST32(m_RecompPos,Variable); +} + +void CX86Ops::SbbX86RegToX86Reg(x86Reg Destination, x86Reg Source) { + WORD x86Command; + CPU_Message(" sbb %s, %s",x86_Name(Destination),x86_Name(Source)); + switch (Source) { + case x86_EAX: x86Command = 0x001B; break; + case x86_EBX: x86Command = 0x031B; break; + case x86_ECX: x86Command = 0x011B; break; + case x86_EDX: x86Command = 0x021B; break; + case x86_ESI: x86Command = 0x061B; break; + case x86_EDI: x86Command = 0x071B; break; + case x86_ESP: x86Command = 0x041B; break; + case x86_EBP: x86Command = 0x051B; break; + } + switch (Destination) { + case x86_EAX: x86Command += 0xC000; break; + case x86_EBX: x86Command += 0xD800; break; + case x86_ECX: x86Command += 0xC800; break; + case x86_EDX: x86Command += 0xD000; break; + case x86_ESI: x86Command += 0xF000; break; + case x86_EDI: x86Command += 0xF800; break; + case x86_ESP: x86Command += 0xE000; break; + case x86_EBP: x86Command += 0xE800; break; + } + PUTDST16(m_RecompPos,x86Command); +} + +void CX86Ops::SubConstFromVariable (DWORD Const, void *Variable, const char * VariableName) { + CPU_Message(" sub dword ptr [%s], 0x%X",VariableName, Const);\ + PUTDST16(m_RecompPos,0x2D81); + PUTDST32(m_RecompPos,Variable); + PUTDST32(m_RecompPos,Const); +} + +void CX86Ops::SubConstFromX86Reg (x86Reg reg, DWORD Const) { + CPU_Message(" sub %s, %Xh",x86_Name(reg),Const); + if ((Const & 0xFFFFFF80) != 0 && (Const & 0xFFFFFF80) != 0xFFFFFF80) { + switch (reg) { + case x86_EAX: PUTDST16(m_RecompPos,0xE881); break; + case x86_EBX: PUTDST16(m_RecompPos,0xEB81); break; + case x86_ECX: PUTDST16(m_RecompPos,0xE981); break; + case x86_EDX: PUTDST16(m_RecompPos,0xEA81); break; + case x86_ESI: PUTDST16(m_RecompPos,0xEE81); break; + case x86_EDI: PUTDST16(m_RecompPos,0xEF81); break; + case x86_ESP: PUTDST16(m_RecompPos,0xEC81); break; + case x86_EBP: PUTDST16(m_RecompPos,0xED81); break; + } + PUTDST32(m_RecompPos, Const); + } else { + switch (reg) { + case x86_EAX: PUTDST16(m_RecompPos,0xE883); break; + case x86_EBX: PUTDST16(m_RecompPos,0xEB83); break; + case x86_ECX: PUTDST16(m_RecompPos,0xE983); break; + case x86_EDX: PUTDST16(m_RecompPos,0xEA83); break; + case x86_ESI: PUTDST16(m_RecompPos,0xEE83); break; + case x86_EDI: PUTDST16(m_RecompPos,0xEF83); break; + case x86_ESP: PUTDST16(m_RecompPos,0xEC83); break; + case x86_EBP: PUTDST16(m_RecompPos,0xED83); break; + } + PUTDST8(m_RecompPos, Const); + } +} + +void CX86Ops::SubVariableFromX86reg(x86Reg reg, void * Variable, const char * VariableName) { + CPU_Message(" sub %s, dword ptr [%s]",x86_Name(reg),VariableName); + switch (reg) { + case x86_EAX: PUTDST16(m_RecompPos,0x052B); break; + case x86_EBX: PUTDST16(m_RecompPos,0x1D2B); break; + case x86_ECX: PUTDST16(m_RecompPos,0x0D2B); break; + case x86_EDX: PUTDST16(m_RecompPos,0x152B); break; + case x86_ESI: PUTDST16(m_RecompPos,0x352B); break; + case x86_EDI: PUTDST16(m_RecompPos,0x3D2B); break; + case x86_ESP: PUTDST16(m_RecompPos,0x252B); break; + case x86_EBP: PUTDST16(m_RecompPos,0x2D2B); break; + default: + DisplayError("SubVariableFromX86reg\nUnknown x86 Register"); + } + PUTDST32(m_RecompPos,Variable); +} + +void CX86Ops::SubX86RegToX86Reg(x86Reg Destination, x86Reg Source) { + WORD x86Command; + CPU_Message(" sub %s, %s",x86_Name(Destination),x86_Name(Source)); + switch (Source) { + case x86_EAX: x86Command = 0x002B; break; + case x86_EBX: x86Command = 0x032B; break; + case x86_ECX: x86Command = 0x012B; break; + case x86_EDX: x86Command = 0x022B; break; + case x86_ESI: x86Command = 0x062B; break; + case x86_EDI: x86Command = 0x072B; break; + case x86_ESP: x86Command = 0x042B; break; + case x86_EBP: x86Command = 0x052B; break; + } + switch (Destination) { + case x86_EAX: x86Command += 0xC000; break; + case x86_EBX: x86Command += 0xD800; break; + case x86_ECX: x86Command += 0xC800; break; + case x86_EDX: x86Command += 0xD000; break; + case x86_ESI: x86Command += 0xF000; break; + case x86_EDI: x86Command += 0xF800; break; + case x86_ESP: x86Command += 0xE000; break; + case x86_EBP: x86Command += 0xE800; break; + } + PUTDST16(m_RecompPos,x86Command); +} + +void CX86Ops::TestConstToX86Reg(DWORD Const, x86Reg reg) { + CPU_Message(" test %s, 0x%X",x86_Name(reg), Const); + + switch (reg) { + case x86_EAX: PUTDST8 (m_RecompPos,0xA9); break; + case x86_EBX: PUTDST16(m_RecompPos,0xC3F7); break; + case x86_ECX: PUTDST16(m_RecompPos,0xC1F7); break; + case x86_EDX: PUTDST16(m_RecompPos,0xC2F7); break; + case x86_ESI: PUTDST16(m_RecompPos,0xC6F7); break; + case x86_EDI: PUTDST16(m_RecompPos,0xC7F7); break; + case x86_ESP: PUTDST16(m_RecompPos,0xC4F7); break; + case x86_EBP: PUTDST16(m_RecompPos,0xC5F7); break; + } + PUTDST32(m_RecompPos,Const); +} + +void CX86Ops::TestVariable(DWORD Const, void * Variable, const char * VariableName) { + CPU_Message(" test dword ptr ds:[%s], 0x%X",VariableName, Const); + PUTDST16(m_RecompPos,0x05F7); + PUTDST32(m_RecompPos,Variable); + PUTDST32(m_RecompPos,Const); +} + +void CX86Ops::TestX86RegToX86Reg(x86Reg Destination, x86Reg Source) { + WORD x86Command; + CPU_Message(" test %s, %s",x86_Name(Destination),x86_Name(Source)); + switch (Source) { + case x86_EAX: x86Command = 0x0085; break; + case x86_EBX: x86Command = 0x0385; break; + case x86_ECX: x86Command = 0x0185; break; + case x86_EDX: x86Command = 0x0285; break; + case x86_ESI: x86Command = 0x0685; break; + case x86_EDI: x86Command = 0x0785; break; + case x86_ESP: x86Command = 0x0485; break; + case x86_EBP: x86Command = 0x0585; break; + } + switch (Destination) { + case x86_EAX: x86Command += 0xC000; break; + case x86_EBX: x86Command += 0xD800; break; + case x86_ECX: x86Command += 0xC800; break; + case x86_EDX: x86Command += 0xD000; break; + case x86_ESI: x86Command += 0xF000; break; + case x86_EDI: x86Command += 0xF800; break; + case x86_ESP: x86Command += 0xE000; break; + case x86_EBP: x86Command += 0xE800; break; + } + PUTDST16(m_RecompPos,x86Command); +} + +void CX86Ops::XorConstToX86Reg(x86Reg reg, DWORD Const) { + CPU_Message(" xor %s, %Xh",x86_Name(reg),Const); + if ((Const & 0xFFFFFF80) != 0 && (Const & 0xFFFFFF80) != 0xFFFFFF80) { + switch (reg) { + case x86_EAX: PUTDST16(m_RecompPos,0xF081); break; + case x86_EBX: PUTDST16(m_RecompPos,0xF381); break; + case x86_ECX: PUTDST16(m_RecompPos,0xF181); break; + case x86_EDX: PUTDST16(m_RecompPos,0xF281); break; + case x86_ESI: PUTDST16(m_RecompPos,0xF681); break; + case x86_EDI: PUTDST16(m_RecompPos,0xF781); break; + case x86_ESP: PUTDST16(m_RecompPos,0xF481); break; + case x86_EBP: PUTDST16(m_RecompPos,0xF581); break; + } + PUTDST32(m_RecompPos, Const); + } else { + switch (reg) { + case x86_EAX: PUTDST16(m_RecompPos,0xF083); break; + case x86_EBX: PUTDST16(m_RecompPos,0xF383); break; + case x86_ECX: PUTDST16(m_RecompPos,0xF183); break; + case x86_EDX: PUTDST16(m_RecompPos,0xF283); break; + case x86_ESI: PUTDST16(m_RecompPos,0xF683); break; + case x86_EDI: PUTDST16(m_RecompPos,0xF783); break; + case x86_ESP: PUTDST16(m_RecompPos,0xF483); break; + case x86_EBP: PUTDST16(m_RecompPos,0xF583); break; + } + PUTDST8(m_RecompPos, Const); + } +} + +void CX86Ops::XorX86RegToX86Reg(x86Reg Source, x86Reg Destination) { + WORD x86Command; + + CPU_Message(" xor %s, %s",x86_Name(Source),x86_Name(Destination)); + + switch (Source) { + case x86_EAX: x86Command = 0x0031; break; + case x86_EBX: x86Command = 0x0331; break; + case x86_ECX: x86Command = 0x0131; break; + case x86_EDX: x86Command = 0x0231; break; + case x86_ESI: x86Command = 0x0631; break; + case x86_EDI: x86Command = 0x0731; break; + case x86_ESP: x86Command = 0x0431; break; + case x86_EBP: x86Command = 0x0531; break; + } + switch (Destination) { + case x86_EAX: x86Command += 0xC000; break; + case x86_EBX: x86Command += 0xD800; break; + case x86_ECX: x86Command += 0xC800; break; + case x86_EDX: x86Command += 0xD000; break; + case x86_ESI: x86Command += 0xF000; break; + case x86_EDI: x86Command += 0xF800; break; + case x86_ESP: x86Command += 0xE000; break; + case x86_EBP: x86Command += 0xE800; break; + } + PUTDST16(m_RecompPos,x86Command); +} + +void CX86Ops::XorVariableToX86reg(void *Variable, const char * VariableName, x86Reg reg) { + CPU_Message(" Xor %s, dword ptr [%s]",x86_Name(reg),VariableName); + switch (reg) { + case x86_EAX: PUTDST16(m_RecompPos,0x0533); break; + case x86_EBX: PUTDST16(m_RecompPos,0x1D33); break; + case x86_ECX: PUTDST16(m_RecompPos,0x0D33); break; + case x86_EDX: PUTDST16(m_RecompPos,0x1533); break; + case x86_ESI: PUTDST16(m_RecompPos,0x3533); break; + case x86_EDI: PUTDST16(m_RecompPos,0x3D33); break; + case x86_ESP: PUTDST16(m_RecompPos,0x2533); break; + case x86_EBP: PUTDST16(m_RecompPos,0x2D33); break; + default: DisplayError("XorVariableToX86reg\nUnknown x86 Register"); + } + PUTDST32(m_RecompPos,Variable); +} + +void CX86Ops::fpuAbs(void) { + CPU_Message(" fabs ST(0)"); + PUTDST16(m_RecompPos,0xE1D9); +} + +void CX86Ops::fpuAddDword(void *Variable, const char * VariableName) { + CPU_Message(" fadd ST(0), dword ptr [%s]", VariableName); + PUTDST16(m_RecompPos,0x05D8); + PUTDST32(m_RecompPos,Variable); +} + +void CX86Ops::fpuAddDwordRegPointer(x86Reg x86Pointer) { + CPU_Message(" fadd ST(0), dword ptr [%s]",x86_Name(x86Pointer)); + switch (x86Pointer) { + case x86_EAX: PUTDST16(m_RecompPos,0x00D8); break; + case x86_EBX: PUTDST16(m_RecompPos,0x03D8); break; + case x86_ECX: PUTDST16(m_RecompPos,0x01D8); break; + case x86_EDX: PUTDST16(m_RecompPos,0x02D8); break; + case x86_ESI: PUTDST16(m_RecompPos,0x06D8); break; + case x86_EDI: PUTDST16(m_RecompPos,0x07D8); break; + default: + DisplayError("fpuAddDwordRegPointer\nUnknown x86 Register"); + break; + } +} + +void CX86Ops::fpuAddQword(void *Variable, const char * VariableName) { + CPU_Message(" fadd ST(0), qword ptr [%s]", VariableName); + PUTDST16(m_RecompPos,0x05DC); + PUTDST32(m_RecompPos,Variable); +} + +void CX86Ops::fpuAddQwordRegPointer(x86Reg x86Pointer) { + CPU_Message(" fadd ST(0), qword ptr [%s]",x86_Name(x86Pointer)); + switch (x86Pointer) { + case x86_EAX: PUTDST16(m_RecompPos,0x00DC); break; + case x86_EBX: PUTDST16(m_RecompPos,0x03DC); break; + case x86_ECX: PUTDST16(m_RecompPos,0x01DC); break; + case x86_EDX: PUTDST16(m_RecompPos,0x02DC); break; + case x86_ESI: PUTDST16(m_RecompPos,0x06DC); break; + case x86_EDI: PUTDST16(m_RecompPos,0x07DC); break; + default: + DisplayError("fpuAddQwordRegPointer\nUnknown x86 Register"); + break; + } +} + +void CX86Ops::fpuAddReg(x86FpuValues x86reg) { + CPU_Message(" fadd ST(0), %s",fpu_Name(x86reg)); + switch (x86reg) { + case x86_ST0: PUTDST16(m_RecompPos,0xC0D8); break; + case x86_ST1: PUTDST16(m_RecompPos,0xC1D8); break; + case x86_ST2: PUTDST16(m_RecompPos,0xC2D8); break; + case x86_ST3: PUTDST16(m_RecompPos,0xC3D8); break; + case x86_ST4: PUTDST16(m_RecompPos,0xC4D8); break; + case x86_ST5: PUTDST16(m_RecompPos,0xC5D8); break; + case x86_ST6: PUTDST16(m_RecompPos,0xC6D8); break; + case x86_ST7: PUTDST16(m_RecompPos,0xC7D8); break; + default: + DisplayError("fpuAddReg\nUnknown x86 Register"); + break; + } +} + +void CX86Ops::fpuAddRegPop(int * StackPos, x86FpuValues reg) { + CPU_Message(" faddp ST(0), %s",fpu_Name(reg)); + *StackPos = (*StackPos + 1) & 7; + switch (reg) { + case x86_ST0: PUTDST16(m_RecompPos,0xC0DE); break; + case x86_ST1: PUTDST16(m_RecompPos,0xC1DE); break; + case x86_ST2: PUTDST16(m_RecompPos,0xC2DE); break; + case x86_ST3: PUTDST16(m_RecompPos,0xC3DE); break; + case x86_ST4: PUTDST16(m_RecompPos,0xC4DE); break; + case x86_ST5: PUTDST16(m_RecompPos,0xC5DE); break; + case x86_ST6: PUTDST16(m_RecompPos,0xC6DE); break; + case x86_ST7: PUTDST16(m_RecompPos,0xC7DE); break; + default: + DisplayError("fpuAddReg\nUnknown x86 Register"); + break; + } +} + +void CX86Ops::fpuComDword(void *Variable, const char * VariableName, BOOL Pop) { + CPU_Message(" fcom%s ST(0), dword ptr [%s]", m_fpupop[Pop], VariableName); + PUTDST16(m_RecompPos, (Pop == TRUE) ? 0x1DD8 : 0x15D8); + PUTDST32(m_RecompPos,Variable); +} + +void CX86Ops::fpuComDwordRegPointer(x86Reg x86Pointer, BOOL Pop) { + WORD x86Command; + + CPU_Message(" fcom%s ST(0), dword ptr [%s]",m_fpupop[Pop],x86_Name(x86Pointer)); + switch (x86Pointer) { + case x86_EAX: x86Command = 0x10D8; break; + case x86_EBX: x86Command = 0x13D8; break; + case x86_ECX: x86Command = 0x11D8; break; + case x86_EDX: x86Command = 0x12D8; break; + case x86_ESI: x86Command = 0x16D8; break; + case x86_EDI: x86Command = 0x17D8; break; + } + if (Pop) { x86Command |= 0x0800; } + PUTDST16(m_RecompPos,x86Command); +} + +void CX86Ops::fpuComQword(void *Variable, const char * VariableName, BOOL Pop) { + CPU_Message(" fcom%s ST(0), qword ptr [%s]", m_fpupop[Pop], VariableName); + PUTDST16(m_RecompPos, (Pop == TRUE) ? 0x1DDC : 0x15DC); + PUTDST32(m_RecompPos,Variable); +} + +void CX86Ops::fpuComQwordRegPointer(x86Reg x86Pointer, BOOL Pop) { + WORD x86Command; + + CPU_Message(" fcom%s ST(0), qword ptr [%s]",m_fpupop[Pop],x86_Name(x86Pointer)); + switch (x86Pointer) { + case x86_EAX: x86Command = 0x10DC; break; + case x86_EBX: x86Command = 0x13DC; break; + case x86_ECX: x86Command = 0x11DC; break; + case x86_EDX: x86Command = 0x12DC; break; + case x86_ESI: x86Command = 0x16DC; break; + case x86_EDI: x86Command = 0x17DC; break; + } + if (Pop) { x86Command |= 0x0800; } + PUTDST16(m_RecompPos,x86Command); +} + +void CX86Ops::fpuComReg(x86FpuValues x86reg, BOOL Pop) { + int s = (Pop == TRUE) ? 0x0800 : 0x0000; + CPU_Message(" fcom%s ST(0), %s", m_fpupop[Pop], fpu_Name(x86reg)); + + switch (x86reg) { + case x86_ST0: PUTDST16(m_RecompPos,0xD0D8|s); break; + case x86_ST1: PUTDST16(m_RecompPos,0xD1D8|s); break; + case x86_ST2: PUTDST16(m_RecompPos,0xD2D8|s); break; + case x86_ST3: PUTDST16(m_RecompPos,0xD3D8|s); break; + case x86_ST4: PUTDST16(m_RecompPos,0xD4D8|s); break; + case x86_ST5: PUTDST16(m_RecompPos,0xD5D8|s); break; + case x86_ST6: PUTDST16(m_RecompPos,0xD6D8|s); break; + case x86_ST7: PUTDST16(m_RecompPos,0xD7D8|s); break; + default: + DisplayError("fpuComReg\nUnknown x86 Register"); + break; + } +} + +void CX86Ops::fpuDivDword(void *Variable, const char * VariableName) { + CPU_Message(" fdiv ST(0), dword ptr [%s]", VariableName); + PUTDST16(m_RecompPos,0x35D8); + PUTDST32(m_RecompPos,Variable); +} + +void CX86Ops::fpuDivDwordRegPointer(x86Reg x86Pointer) { + CPU_Message(" fdiv ST(0), dword ptr [%s]",x86_Name(x86Pointer)); + switch (x86Pointer) { + case x86_EAX: PUTDST16(m_RecompPos,0x30D8); break; + case x86_EBX: PUTDST16(m_RecompPos,0x33D8); break; + case x86_ECX: PUTDST16(m_RecompPos,0x31D8); break; + case x86_EDX: PUTDST16(m_RecompPos,0x32D8); break; + case x86_ESI: PUTDST16(m_RecompPos,0x36D8); break; + case x86_EDI: PUTDST16(m_RecompPos,0x37D8); break; + default: + DisplayError("fpuDivDwordRegPointer\nUnknown x86 Register"); + break; + } +} + +void CX86Ops::fpuDivQword(void *Variable, const char * VariableName) { + CPU_Message(" fdiv ST(0), qword ptr [%s]", VariableName); + PUTDST16(m_RecompPos,0x35DC); + PUTDST32(m_RecompPos,Variable); +} + +void CX86Ops::fpuDivQwordRegPointer(x86Reg x86Pointer) { + CPU_Message(" fdiv ST(0), qword ptr [%s]",x86_Name(x86Pointer)); + switch (x86Pointer) { + case x86_EAX: PUTDST16(m_RecompPos,0x30DC); break; + case x86_EBX: PUTDST16(m_RecompPos,0x33DC); break; + case x86_ECX: PUTDST16(m_RecompPos,0x31DC); break; + case x86_EDX: PUTDST16(m_RecompPos,0x32DC); break; + case x86_ESI: PUTDST16(m_RecompPos,0x36DC); break; + case x86_EDI: PUTDST16(m_RecompPos,0x37DC); break; + default: + DisplayError("fpuDivQwordRegPointer\nUnknown x86 Register"); + break; + } +} + +void CX86Ops::fpuDivReg(x86FpuValues Reg) { + CPU_Message(" fdiv ST(0), %s", fpu_Name(Reg)); + switch (Reg) { + case x86_ST0: PUTDST16(m_RecompPos,0xF0D8); break; + case x86_ST1: PUTDST16(m_RecompPos,0xF1D8); break; + case x86_ST2: PUTDST16(m_RecompPos,0xF2D8); break; + case x86_ST3: PUTDST16(m_RecompPos,0xF3D8); break; + case x86_ST4: PUTDST16(m_RecompPos,0xF4D8); break; + case x86_ST5: PUTDST16(m_RecompPos,0xF5D8); break; + case x86_ST6: PUTDST16(m_RecompPos,0xF6D8); break; + case x86_ST7: PUTDST16(m_RecompPos,0xF7D8); break; + default: + DisplayError("fpuDivReg\nUnknown x86 Register"); + break; + } +} + +void CX86Ops::fpuDivRegPop(x86FpuValues reg) { + CPU_Message(" fdivp ST(0), %s",fpu_Name(reg)); + switch (reg) { + case x86_ST0: PUTDST16(m_RecompPos,0xF8DE); break; + case x86_ST1: PUTDST16(m_RecompPos,0xF9DE); break; + case x86_ST2: PUTDST16(m_RecompPos,0xFADE); break; + case x86_ST3: PUTDST16(m_RecompPos,0xFBDE); break; + case x86_ST4: PUTDST16(m_RecompPos,0xFCDE); break; + case x86_ST5: PUTDST16(m_RecompPos,0xFDDE); break; + case x86_ST6: PUTDST16(m_RecompPos,0xFEDE); break; + case x86_ST7: PUTDST16(m_RecompPos,0xFFDE); break; + default: + DisplayError("fpuDivReg\nUnknown x86 Register"); + break; + } +} + +void CX86Ops::fpuExchange(x86FpuValues Reg) { + CPU_Message(" fxch ST(0), %s",fpu_Name(Reg)); + switch (Reg) { + case x86_ST0: PUTDST16(m_RecompPos,0xC8D9); break; + case x86_ST1: PUTDST16(m_RecompPos,0xC9D9); break; + case x86_ST2: PUTDST16(m_RecompPos,0xCAD9); break; + case x86_ST3: PUTDST16(m_RecompPos,0xCBD9); break; + case x86_ST4: PUTDST16(m_RecompPos,0xCCD9); break; + case x86_ST5: PUTDST16(m_RecompPos,0xCDD9); break; + case x86_ST6: PUTDST16(m_RecompPos,0xCED9); break; + case x86_ST7: PUTDST16(m_RecompPos,0xCFD9); break; + default: + DisplayError("fpuExchange\nUnknown x86 Register: %i", Reg); + break; + } +} + +void CX86Ops::fpuFree(x86FpuValues Reg) { + CPU_Message(" ffree %s",fpu_Name(Reg)); + switch (Reg) { + case x86_ST0: PUTDST16(m_RecompPos,0xC0DD); break; + case x86_ST1: PUTDST16(m_RecompPos,0xC1DD); break; + case x86_ST2: PUTDST16(m_RecompPos,0xC2DD); break; + case x86_ST3: PUTDST16(m_RecompPos,0xC3DD); break; + case x86_ST4: PUTDST16(m_RecompPos,0xC4DD); break; + case x86_ST5: PUTDST16(m_RecompPos,0xC5DD); break; + case x86_ST6: PUTDST16(m_RecompPos,0xC6DD); break; + case x86_ST7: PUTDST16(m_RecompPos,0xC7DD); break; + default: + DisplayError("fpuFree\nUnknown x86 Register"); + break; + } +} + +void CX86Ops::fpuDecStack(int * StackPos) { + CPU_Message(" fdecstp"); + *StackPos = (*StackPos - 1) & 7; + PUTDST16(m_RecompPos,0xF6D9); +} + +void CX86Ops::fpuIncStack(int * StackPos) { + CPU_Message(" fincstp"); + *StackPos = (*StackPos + 1) & 7; + PUTDST16(m_RecompPos,0xF7D9); +} + +void CX86Ops::fpuLoadControl(void *Variable, const char * VariableName) { + CPU_Message(" fldcw [%s]",VariableName); + PUTDST16(m_RecompPos,0x2DD9); + PUTDST32(m_RecompPos,Variable); +} + +void CX86Ops::fpuLoadDword(int * StackPos,void *Variable, const char * VariableName) { + CPU_Message(" fld dword ptr [%s]",VariableName); + *StackPos = (*StackPos - 1) & 7; + PUTDST16(m_RecompPos,0x05D9); + PUTDST32(m_RecompPos,Variable); +} + +void CX86Ops::fpuLoadDwordFromX86Reg(int * StackPos, x86Reg x86reg) { + CPU_Message(" fld dword ptr [%s]",x86_Name(x86reg)); + *StackPos = (*StackPos - 1) & 7; + PUTDST8(m_RecompPos,0xD9); + switch (x86reg) { + case x86_EAX: PUTDST8(m_RecompPos,0x00); break; + case x86_EBX: PUTDST8(m_RecompPos,0x03); break; + case x86_ECX: PUTDST8(m_RecompPos,0x01); break; + case x86_EDX: PUTDST8(m_RecompPos,0x02); break; + case x86_ESI: PUTDST8(m_RecompPos,0x06); break; + case x86_EDI: PUTDST8(m_RecompPos,0x07); break; + default: + DisplayError("fpuLoadDwordFromX86Reg\nUnknown x86 Register"); + } +} + +void CX86Ops::fpuLoadDwordFromN64Mem(int * StackPos,x86Reg x86reg) { + CPU_Message(" fld dword ptr [%s+N64mem]",x86_Name(x86reg)); + *StackPos = (*StackPos - 1) & 7; + switch (x86reg) { + case x86_EAX: PUTDST16(m_RecompPos,0x80D9); break; + case x86_EBX: PUTDST16(m_RecompPos,0x83D9); break; + case x86_ECX: PUTDST16(m_RecompPos,0x81D9); break; + case x86_EDX: PUTDST16(m_RecompPos,0x82D9); break; + case x86_ESI: PUTDST16(m_RecompPos,0x86D9); break; + case x86_EDI: PUTDST16(m_RecompPos,0x87D9); break; + case x86_EBP: PUTDST16(m_RecompPos,0x85D9); break; + default: + DisplayError("fpuLoadDwordFromN64Mem\nUnknown x86 Register"); + } + PUTDST32(m_RecompPos,_MMU->Rdram()); +} + +void CX86Ops::fpuLoadInt32bFromN64Mem(int * StackPos,x86Reg x86reg) { + CPU_Message(" fild dword ptr [%s+N64mem]",x86_Name(x86reg)); + *StackPos = (*StackPos - 1) & 7; + switch (x86reg) { + case x86_EAX: PUTDST16(m_RecompPos,0x80DB); break; + case x86_EBX: PUTDST16(m_RecompPos,0x83DB); break; + case x86_ECX: PUTDST16(m_RecompPos,0x81DB); break; + case x86_EDX: PUTDST16(m_RecompPos,0x82DB); break; + case x86_ESI: PUTDST16(m_RecompPos,0x86DB); break; + case x86_EDI: PUTDST16(m_RecompPos,0x87DB); break; + case x86_EBP: PUTDST16(m_RecompPos,0x85DB); break; + default: + DisplayError("fpuLoadIntDwordFromN64Mem\nUnknown x86 Register"); + } + PUTDST32(m_RecompPos,_MMU->Rdram()); +} + +void CX86Ops::fpuLoadIntegerDword(int * StackPos,void *Variable, const char * VariableName) { + CPU_Message(" fild dword ptr [%s]",VariableName); + *StackPos = (*StackPos - 1) & 7; + PUTDST16(m_RecompPos,0x05DB); + PUTDST32(m_RecompPos,Variable); +} + +void CX86Ops::fpuLoadIntegerDwordFromX86Reg(int * StackPos,x86Reg x86reg) { + CPU_Message(" fild dword ptr [%s]",x86_Name(x86reg)); + *StackPos = (*StackPos - 1) & 7; + PUTDST8(m_RecompPos,0xDB); + switch (x86reg) { + case x86_EAX: PUTDST8(m_RecompPos,0x00); break; + case x86_EBX: PUTDST8(m_RecompPos,0x03); break; + case x86_ECX: PUTDST8(m_RecompPos,0x01); break; + case x86_EDX: PUTDST8(m_RecompPos,0x02); break; + case x86_ESI: PUTDST8(m_RecompPos,0x06); break; + case x86_EDI: PUTDST8(m_RecompPos,0x07); break; + default: + DisplayError("fpuLoadIntegerDwordFromX86Reg\nUnknown x86 Register"); + } +} + +void CX86Ops::fpuLoadIntegerQword(int * StackPos,void *Variable, const char * VariableName) { + CPU_Message(" fild qword ptr [%s]",VariableName); + *StackPos = (*StackPos - 1) & 7; + PUTDST16(m_RecompPos,0x2DDF); + PUTDST32(m_RecompPos,Variable); +} + +void CX86Ops::fpuLoadIntegerQwordFromX86Reg(int * StackPos,x86Reg x86reg) { + CPU_Message(" fild qword ptr [%s]",x86_Name(x86reg)); + *StackPos = (*StackPos - 1) & 7; + PUTDST8(m_RecompPos,0xDF); + switch (x86reg) { + case x86_EAX: PUTDST8(m_RecompPos,0x28); break; + case x86_EBX: PUTDST8(m_RecompPos,0x2B); break; + case x86_ECX: PUTDST8(m_RecompPos,0x29); break; + case x86_EDX: PUTDST8(m_RecompPos,0x2A); break; + case x86_ESI: PUTDST8(m_RecompPos,0x2E); break; + case x86_EDI: PUTDST8(m_RecompPos,0x2F); break; + default: + DisplayError("fpuLoadIntegerDwordFromX86Reg\nUnknown x86 Register"); + } +} + +void CX86Ops::fpuLoadQword(int * StackPos,void *Variable, const char * VariableName) { + CPU_Message(" fld qword ptr [%s]",VariableName); + *StackPos = (*StackPos - 1) & 7; + PUTDST16(m_RecompPos,0x05DD); + PUTDST32(m_RecompPos,Variable); +} + +void CX86Ops::fpuLoadQwordFromX86Reg(int * StackPos, x86Reg x86reg) { + CPU_Message(" fld qword ptr [%s]",x86_Name(x86reg)); + *StackPos = (*StackPos - 1) & 7; + PUTDST8(m_RecompPos,0xDD); + switch (x86reg) { + case x86_EAX: PUTDST8(m_RecompPos,0x00); break; + case x86_EBX: PUTDST8(m_RecompPos,0x03); break; + case x86_ECX: PUTDST8(m_RecompPos,0x01); break; + case x86_EDX: PUTDST8(m_RecompPos,0x02); break; + case x86_ESI: PUTDST8(m_RecompPos,0x06); break; + case x86_EDI: PUTDST8(m_RecompPos,0x07); break; + default: + DisplayError("fpuLoadQwordFromX86Reg\nUnknown x86 Register"); + } +} + +void CX86Ops::fpuLoadQwordFromN64Mem(int * StackPos,x86Reg x86reg) { + CPU_Message(" fld qword ptr [%s+N64mem]",x86_Name(x86reg)); + *StackPos = (*StackPos - 1) & 7; + switch (x86reg) { + case x86_EAX: PUTDST16(m_RecompPos,0x80DD); break; + case x86_EBX: PUTDST16(m_RecompPos,0x83DD); break; + case x86_ECX: PUTDST16(m_RecompPos,0x81DD); break; + case x86_EDX: PUTDST16(m_RecompPos,0x82DD); break; + case x86_ESI: PUTDST16(m_RecompPos,0x86DD); break; + case x86_EDI: PUTDST16(m_RecompPos,0x87DD); break; + case x86_EBP: PUTDST16(m_RecompPos,0x85DD); break; + default: + DisplayError("fpuLoadQwordFromN64Mem\nUnknown x86 Register"); + } + PUTDST32(m_RecompPos,_MMU->Rdram()); +} + +void CX86Ops::fpuLoadReg(int * StackPos,x86FpuValues Reg) { + CPU_Message(" fld ST(0), %s",fpu_Name(Reg)); + *StackPos = (*StackPos - 1) & 7; + switch (Reg) { + case x86_ST0: PUTDST16(m_RecompPos,0xC0D9); break; + case x86_ST1: PUTDST16(m_RecompPos,0xC1D9); break; + case x86_ST2: PUTDST16(m_RecompPos,0xC2D9); break; + case x86_ST3: PUTDST16(m_RecompPos,0xC3D9); break; + case x86_ST4: PUTDST16(m_RecompPos,0xC4D9); break; + case x86_ST5: PUTDST16(m_RecompPos,0xC5D9); break; + case x86_ST6: PUTDST16(m_RecompPos,0xC6D9); break; + case x86_ST7: PUTDST16(m_RecompPos,0xC7D9); break; + default: + DisplayError("fpuLoadReg\nUnknown x86 Register:%i", Reg); + break; + } +} + +void CX86Ops::fpuMulDword(void *Variable, const char * VariableName) { + CPU_Message(" fmul ST(0), dword ptr [%s]", VariableName); + PUTDST16(m_RecompPos,0x0DD8); + PUTDST32(m_RecompPos,Variable); +} + +void CX86Ops::fpuMulDwordRegPointer(x86Reg x86Pointer) { + CPU_Message(" fmul ST(0), dword ptr [%s]",x86_Name(x86Pointer)); + switch (x86Pointer) { + case x86_EAX: PUTDST16(m_RecompPos,0x08D8); break; + case x86_EBX: PUTDST16(m_RecompPos,0x0BD8); break; + case x86_ECX: PUTDST16(m_RecompPos,0x09D8); break; + case x86_EDX: PUTDST16(m_RecompPos,0x0AD8); break; + case x86_ESI: PUTDST16(m_RecompPos,0x0ED8); break; + case x86_EDI: PUTDST16(m_RecompPos,0x0FD8); break; + default: + DisplayError("fpuMulDwordRegPointer\nUnknown x86 Register"); + break; + } +} + +void CX86Ops::fpuMulQword(void *Variable, const char * VariableName) { + CPU_Message(" fmul ST(0), qword ptr [%s]", VariableName); + PUTDST16(m_RecompPos,0x0DDC); + PUTDST32(m_RecompPos,Variable); +} + +void CX86Ops::fpuMulQwordRegPointer(x86Reg x86Pointer) { + CPU_Message(" fmul ST(0), qword ptr [%s]",x86_Name(x86Pointer)); + switch (x86Pointer) { + case x86_EAX: PUTDST16(m_RecompPos,0x08DC); break; + case x86_EBX: PUTDST16(m_RecompPos,0x0BDC); break; + case x86_ECX: PUTDST16(m_RecompPos,0x09DC); break; + case x86_EDX: PUTDST16(m_RecompPos,0x0ADC); break; + case x86_ESI: PUTDST16(m_RecompPos,0x0EDC); break; + case x86_EDI: PUTDST16(m_RecompPos,0x0FDC); break; + default: + DisplayError("fpuMulQwordRegPointer\nUnknown x86 Register"); + break; + } +} + +void CX86Ops::fpuMulReg(x86FpuValues x86reg) { + CPU_Message(" fmul ST(0), %s",fpu_Name(x86reg)); + switch (x86reg) { + case x86_ST0: PUTDST16(m_RecompPos,0xC8D8); break; + case x86_ST1: PUTDST16(m_RecompPos,0xC9D8); break; + case x86_ST2: PUTDST16(m_RecompPos,0xCAD8); break; + case x86_ST3: PUTDST16(m_RecompPos,0xCBD8); break; + case x86_ST4: PUTDST16(m_RecompPos,0xCCD8); break; + case x86_ST5: PUTDST16(m_RecompPos,0xCDD8); break; + case x86_ST6: PUTDST16(m_RecompPos,0xCED8); break; + case x86_ST7: PUTDST16(m_RecompPos,0xCFD8); break; + default: + DisplayError("fpuMulReg\nUnknown x86 Register"); + break; + } +} + +void CX86Ops::fpuMulRegPop(x86FpuValues x86reg) { + CPU_Message(" fmulp ST(0), %s",fpu_Name(x86reg)); + switch (x86reg) { + case x86_ST0: PUTDST16(m_RecompPos,0xC8DE); break; + case x86_ST1: PUTDST16(m_RecompPos,0xC9DE); break; + case x86_ST2: PUTDST16(m_RecompPos,0xCADE); break; + case x86_ST3: PUTDST16(m_RecompPos,0xCBDE); break; + case x86_ST4: PUTDST16(m_RecompPos,0xCCDE); break; + case x86_ST5: PUTDST16(m_RecompPos,0xCDDE); break; + case x86_ST6: PUTDST16(m_RecompPos,0xCEDE); break; + case x86_ST7: PUTDST16(m_RecompPos,0xCFDE); break; + default: + DisplayError("fpuMulReg\nUnknown x86 Register"); + break; + } +} + +void CX86Ops::fpuNeg(void) { + CPU_Message(" fchs ST(0)"); + PUTDST16(m_RecompPos,0xE0D9); +} + +void CX86Ops::fpuRound(void) { + CPU_Message(" frndint ST(0)"); + PUTDST16(m_RecompPos,0xFCD9); +} + +void CX86Ops::fpuSqrt(void) { + CPU_Message(" fsqrt ST(0)"); + PUTDST16(m_RecompPos,0xFAD9); +} + +void CX86Ops::fpuStoreControl(void *Variable, const char * VariableName) { + CPU_Message(" fnstcw [%s]",VariableName); + PUTDST16(m_RecompPos,0x3DD9); + PUTDST32(m_RecompPos,Variable); +} + +void CX86Ops::fpuStoreDword(int * StackPos,void *Variable, const char * VariableName, BOOL pop) { + CPU_Message(" fst%s dword ptr [%s]", m_fpupop[pop], VariableName); + if (pop) { *StackPos = (*StackPos + 1) & 7; } + PUTDST16(m_RecompPos,(pop == FALSE) ? 0x15D9 : 0x1DD9); + PUTDST32(m_RecompPos,Variable); +} + +void CX86Ops::fpuStoreDwordFromX86Reg(int * StackPos,x86Reg x86reg, BOOL pop) { + BYTE Command; + + CPU_Message(" fst%s dword ptr [%s]", m_fpupop[pop], x86_Name(x86reg)); + if (pop) { *StackPos = (*StackPos + 1) & 7; } + PUTDST8(m_RecompPos,0xD9); + + switch (x86reg) { + case x86_EAX: Command = 0x10; break; + case x86_EBX: Command = 0x13; break; + case x86_ECX: Command = 0x11; break; + case x86_EDX: Command = 0x12; break; + case x86_ESI: Command = 0x16; break; + case x86_EDI: Command = 0x17; break; + default: + DisplayError("fpuStoreIntegerQwordFromX86Reg\nUnknown x86 Register"); + } + PUTDST8(m_RecompPos, (pop == FALSE) ? Command : (Command + 0x8)); +} + +void CX86Ops::fpuStoreDwordToN64Mem(int * StackPos,x86Reg x86reg, BOOL Pop) { + int s = (Pop == TRUE) ? 0x0800 : 0; + + CPU_Message(" fst%s dword ptr [%s+N64mem]", m_fpupop[Pop], x86_Name(x86reg)); + if (Pop) { *StackPos = (*StackPos + 1) & 7; } + + switch (x86reg) { + case x86_EAX: PUTDST16(m_RecompPos,0x90D9|s); break; + case x86_EBX: PUTDST16(m_RecompPos,0x93D9|s); break; + case x86_ECX: PUTDST16(m_RecompPos,0x91D9|s); break; + case x86_EDX: PUTDST16(m_RecompPos,0x92D9|s); break; + case x86_ESI: PUTDST16(m_RecompPos,0x96D9|s); break; + case x86_EDI: PUTDST16(m_RecompPos,0x97D9|s); break; + case x86_EBP: PUTDST16(m_RecompPos,0x95D9|s); break; + default: + DisplayError("fpuStoreDwordToN64Mem\nUnknown x86 Register"); + } + PUTDST32(m_RecompPos,_MMU->Rdram()); +} + +void CX86Ops::fpuStoreIntegerDword(int * StackPos,void *Variable, const char * VariableName, BOOL pop) { + CPU_Message(" fist%s dword ptr [%s]", m_fpupop[pop], VariableName); + if (pop) { *StackPos = (*StackPos + 1) & 7; } + PUTDST16(m_RecompPos, (pop == FALSE) ? 0x15DB : 0x1DDB); + PUTDST32(m_RecompPos,Variable); +} + +void CX86Ops::fpuStoreIntegerDwordFromX86Reg(int * StackPos,x86Reg x86reg, BOOL pop) { + BYTE Command; + + CPU_Message(" fist%s dword ptr [%s]", m_fpupop[pop], x86_Name(x86reg)); + if (pop) { *StackPos = (*StackPos + 1) & 7; } + PUTDST8(m_RecompPos,0xDB); + + switch (x86reg) { + case x86_EAX: Command = 0x10; break; + case x86_EBX: Command = 0x13; break; + case x86_ECX: Command = 0x11; break; + case x86_EDX: Command = 0x12; break; + case x86_ESI: Command = 0x16; break; + case x86_EDI: Command = 0x17; break; + default: + DisplayError("fpuStoreIntegerDwordFromX86Reg\nUnknown x86 Register"); + } + PUTDST8(m_RecompPos, (pop == FALSE) ? Command : (Command + 0x8)); +} + +void CX86Ops::fpuStoreIntegerQword(int * StackPos,void *Variable, const char * VariableName, BOOL pop) { + CPU_Message(" fist%s qword ptr [%s]", m_fpupop[pop], VariableName); + if (pop) { *StackPos = (*StackPos + 1) & 7; } + PUTDST16(m_RecompPos, (pop == FALSE) ? 0x35DF : 0x3DDF); + PUTDST32(m_RecompPos,Variable); + if (!pop) { X86BreakPoint(__FILE__,__LINE__); } +} + +void CX86Ops::fpuStoreIntegerQwordFromX86Reg(int * StackPos, x86Reg x86reg, BOOL pop) { + BYTE Command; + + CPU_Message(" fist%s qword ptr [%s]", m_fpupop[pop], x86_Name(x86reg)); + if (pop) { *StackPos = (*StackPos + 1) & 7; } + PUTDST8(m_RecompPos,0xDF); + + switch (x86reg) { + case x86_EAX: Command = 0x30; break; + case x86_EBX: Command = 0x33; break; + case x86_ECX: Command = 0x31; break; + case x86_EDX: Command = 0x32; break; + case x86_ESI: Command = 0x36; break; + case x86_EDI: Command = 0x37; break; + default: + DisplayError("fpuStoreIntegerQwordFromX86Reg\nUnknown x86 Register"); + } + PUTDST8(m_RecompPos, (pop == FALSE) ? Command : (Command + 0x8)); +} + +void CX86Ops::fpuStoreQwordFromX86Reg(int * StackPos, x86Reg x86reg, BOOL pop) { + BYTE Command; + + CPU_Message(" fst%s qword ptr [%s]", m_fpupop[pop], x86_Name(x86reg)); + if (pop) { *StackPos = (*StackPos + 1) & 7; } + PUTDST8(m_RecompPos,0xDD); + + switch (x86reg) { + case x86_EAX: Command = 0x10; break; + case x86_EBX: Command = 0x13; break; + case x86_ECX: Command = 0x11; break; + case x86_EDX: Command = 0x12; break; + case x86_ESI: Command = 0x16; break; + case x86_EDI: Command = 0x17; break; + default: + DisplayError("fpuStoreQwordFromX86Reg\nUnknown x86 Register"); + } + PUTDST8(m_RecompPos, (pop == FALSE) ? Command : (Command + 0x8)); +} + +void CX86Ops::fpuStoreStatus(void) { + CPU_Message(" fnstsw ax"); + PUTDST16(m_RecompPos,0xE0DF); +} + +void CX86Ops::fpuSubDword(void *Variable, const char * VariableName) { + CPU_Message(" fsub ST(0), dword ptr [%s]", VariableName); + PUTDST16(m_RecompPos,0x25D8); + PUTDST32(m_RecompPos,Variable); +} + +void CX86Ops::fpuSubDwordRegPointer(x86Reg x86Pointer) { + CPU_Message(" fsub ST(0), dword ptr [%s]",x86_Name(x86Pointer)); + switch (x86Pointer) { + case x86_EAX: PUTDST16(m_RecompPos,0x20D8); break; + case x86_EBX: PUTDST16(m_RecompPos,0x23D8); break; + case x86_ECX: PUTDST16(m_RecompPos,0x21D8); break; + case x86_EDX: PUTDST16(m_RecompPos,0x22D8); break; + case x86_ESI: PUTDST16(m_RecompPos,0x26D8); break; + case x86_EDI: PUTDST16(m_RecompPos,0x27D8); break; + default: + DisplayError("fpuSubDwordRegPointer\nUnknown x86 Register"); + break; + } +} + +void CX86Ops::fpuSubDwordReverse(void *Variable, const char * VariableName) { + CPU_Message(" fsubr ST(0), dword ptr [%s]", VariableName); + PUTDST16(m_RecompPos,0x2DD8); + PUTDST32(m_RecompPos,Variable); +} + +void CX86Ops::fpuSubQword(void *Variable, const char * VariableName) { + CPU_Message(" fsub ST(0), qword ptr [%s]", VariableName); + PUTDST16(m_RecompPos,0x25DC); + PUTDST32(m_RecompPos,Variable); +} + +void CX86Ops::fpuSubQwordRegPointer(x86Reg x86Pointer) { + CPU_Message(" fsub ST(0), qword ptr [%s]",x86_Name(x86Pointer)); + switch (x86Pointer) { + case x86_EAX: PUTDST16(m_RecompPos,0x20DC); break; + case x86_EBX: PUTDST16(m_RecompPos,0x23DC); break; + case x86_ECX: PUTDST16(m_RecompPos,0x21DC); break; + case x86_EDX: PUTDST16(m_RecompPos,0x22DC); break; + case x86_ESI: PUTDST16(m_RecompPos,0x26DC); break; + case x86_EDI: PUTDST16(m_RecompPos,0x27DC); break; + default: + DisplayError("fpuSubQwordRegPointer\nUnknown x86 Register"); + break; + } +} + +void CX86Ops::fpuSubQwordReverse(void *Variable, const char * VariableName) { + CPU_Message(" fsubr ST(0), qword ptr [%s]", VariableName); + PUTDST16(m_RecompPos,0x2DDC); + PUTDST32(m_RecompPos,Variable); +} + +void CX86Ops::fpuSubReg(x86FpuValues x86reg) { + CPU_Message(" fsub ST(0), %s",fpu_Name(x86reg)); + switch (x86reg) { + case x86_ST0: PUTDST16(m_RecompPos,0xE0D8); break; + case x86_ST1: PUTDST16(m_RecompPos,0xE1D8); break; + case x86_ST2: PUTDST16(m_RecompPos,0xE2D8); break; + case x86_ST3: PUTDST16(m_RecompPos,0xE3D8); break; + case x86_ST4: PUTDST16(m_RecompPos,0xE4D8); break; + case x86_ST5: PUTDST16(m_RecompPos,0xE5D8); break; + case x86_ST6: PUTDST16(m_RecompPos,0xE6D8); break; + case x86_ST7: PUTDST16(m_RecompPos,0xE7D8); break; + default: + DisplayError("fpuSubReg\nUnknown x86 Register"); + break; + } +} + +void CX86Ops::fpuSubRegPop(x86FpuValues x86reg) { + CPU_Message(" fsubp ST(0), %s",fpu_Name(x86reg)); + switch (x86reg) { + case x86_ST0: PUTDST16(m_RecompPos,0xE8DE); break; + case x86_ST1: PUTDST16(m_RecompPos,0xE9DE); break; + case x86_ST2: PUTDST16(m_RecompPos,0xEADE); break; + case x86_ST3: PUTDST16(m_RecompPos,0xEBDE); break; + case x86_ST4: PUTDST16(m_RecompPos,0xECDE); break; + case x86_ST5: PUTDST16(m_RecompPos,0xEDDE); break; + case x86_ST6: PUTDST16(m_RecompPos,0xEEDE); break; + case x86_ST7: PUTDST16(m_RecompPos,0xEFDE); break; + default: + DisplayError("fpuSubRegPop\nUnknown x86 Register"); + break; + } +} + +const char * CX86Ops::x86_Name ( x86Reg Reg ) { + switch (Reg) { + case x86_EAX: return "eax"; + case x86_EBX: return "ebx"; + case x86_ECX: return "ecx"; + case x86_EDX: return "edx"; + case x86_ESI: return "esi"; + case x86_EDI: return "edi"; + case x86_EBP: return "ebp"; + case x86_ESP: return "esp"; + } + return "???"; +} + +const char * CX86Ops::x86_ByteName ( x86Reg Reg ) { + switch (Reg) { + case x86_AL: return "al"; + case x86_BL: return "bl"; + case x86_CL: return "cl"; + case x86_DL: return "dl"; + case x86_AH: return "ah"; + case x86_BH: return "bh"; + case x86_CH: return "ch"; + case x86_DH: return "dh"; + } + return "???"; +} + +const char * CX86Ops::x86_HalfName ( x86Reg Reg ) { + switch (Reg) { + case x86_EAX: return "ax"; + case x86_EBX: return "bx"; + case x86_ECX: return "cx"; + case x86_EDX: return "dx"; + case x86_ESI: return "si"; + case x86_EDI: return "di"; + case x86_EBP: return "bp"; + case x86_ESP: return "sp"; + } + return "???"; +} + +const char * CX86Ops::fpu_Name ( x86FpuValues Reg ) { + switch (Reg) { + case x86_ST0: return "ST(0)"; + case x86_ST1: return "ST(1)"; + case x86_ST2: return "ST(2)"; + case x86_ST3: return "ST(3)"; + case x86_ST4: return "ST(4)"; + case x86_ST5: return "ST(5)"; + case x86_ST6: return "ST(6)"; + case x86_ST7: return "ST(7)"; + } + return "???"; +} + +BYTE CX86Ops::CalcMultiplyCode (Multipler Multiply) +{ + switch (Multiply) { + case Multip_x2: return 0x40; + case Multip_x4: return 0x80; + case Multip_x8: return 0xC0; + default: return 0; + } +} + +//#define SetJump32(Loc,JumpLoc) *(DWORD *)(Loc)= (DWORD)(((DWORD)(JumpLoc)) - (((DWORD)(Loc)) + 4)); +//#define SetJump8(Loc,JumpLoc) *(BYTE *)(Loc)= (BYTE )(((BYTE )(JumpLoc)) - (((BYTE )(Loc)) + 1)); + +void CX86Ops::SetJump32(DWORD * Loc, DWORD * JumpLoc) +{ + *Loc = (DWORD)(((DWORD)JumpLoc) - (((DWORD)(Loc)) + 4));; +} + +void CX86Ops::SetJump8(BYTE * Loc, BYTE * JumpLoc) +{ + *Loc = (BYTE )(((BYTE)JumpLoc - (BYTE)Loc) + 1); +} + + +void * CX86Ops::GetAddressOf(int value, ...) { + void * Address; + + va_list ap; + va_start( ap, value ); + Address = va_arg(ap,void *); + va_end( ap ); + + return Address; +} + diff --git a/Source/Project64/N64 System/Recompiler/X86ops.h b/Source/Project64/N64 System/Recompiler/X86ops.h new file mode 100644 index 000000000..554949432 --- /dev/null +++ b/Source/Project64/N64 System/Recompiler/X86ops.h @@ -0,0 +1,281 @@ +class CX86Ops +{ +public: + enum x86Reg { + x86_EAX = 0, + x86_EBX = 3, + x86_ECX = 1, + x86_EDX = 2, + x86_ESI = 6, + x86_EDI = 7, + x86_EBP = 5, + x86_ESP = 4, + x86_Any8Bit = -3, + x86_Any = -2, + x86_Unknown = -1, + + x86_AL = 0, x86_BL = 3, x86_CL = 1, x86_DL = 2, + x86_AH = 4, x86_BH = 7, x86_CH = 5, x86_DH = 6 + }; + + enum x86FpuValues { + x86_ST0 = 0, + x86_ST1 = 1, + x86_ST2 = 2, + x86_ST3 = 3, + x86_ST4 = 4, + x86_ST5 = 5, + x86_ST6 = 6, + x86_ST7 = 7 + }; + + enum Multipler + { + Multip_x1 = 1, + Multip_x2 = 2, + Multip_x4 = 4, + Multip_x8 = 8 + }; + + static const char * x86_Name ( x86Reg Reg ); + static const char * x86_ByteName ( x86Reg Reg ); + static const char * x86_HalfName ( x86Reg Reg ); + static const char * fpu_Name ( x86FpuValues Reg ); + +protected: + //Logging Functions + static void WriteX86Comment ( LPCSTR Comment ); + static void WriteX86Label ( LPCSTR Label ); + + static void AdcX86regToVariable ( x86Reg reg, void * Variable, const char * VariableName ); + static void AdcConstToVariable ( void *Variable, const char * VariableName, BYTE Constant ); + static void AdcConstToX86Reg ( x86Reg Reg, DWORD Const ); + static void AdcVariableToX86reg ( x86Reg reg, void * Variable, const char * VariableName ); + static void AdcX86RegToX86Reg ( x86Reg Destination, x86Reg Source ); + static void AddConstToVariable ( DWORD Const, void *Variable, const char * VariableName ); + static void AddConstToX86Reg ( x86Reg Reg, DWORD Const ); + static void AddVariableToX86reg ( x86Reg reg, void * Variable, const char * VariableName ); + static void AddX86regToVariable ( x86Reg reg, void * Variable, const char * VariableName ); + static void AddX86RegToX86Reg ( x86Reg Destination, x86Reg Source ); + static void AndConstToVariable ( DWORD Const, void *Variable, const char * VariableName ); + static void AndConstToX86Reg ( x86Reg Reg, DWORD Const ); + static void AndVariableToX86Reg ( void * Variable, const char * VariableName, x86Reg Reg ); + static void AndVariableDispToX86Reg ( void * Variable, const char * VariableName, x86Reg Reg, x86Reg AddrReg, Multipler Multiply); + static void AndX86RegToX86Reg ( x86Reg Destination, x86Reg Source ); + static void X86BreakPoint ( LPCSTR FileName, int LineNumber ); + static void Call_Direct ( void * FunctAddress, const char * FunctName ); + static void Call_Indirect ( void * FunctAddress, const char * FunctName ); + static void CompConstToVariable ( DWORD Const, void * Variable, const char * VariableName ); + static void CompConstToX86reg ( x86Reg Reg, DWORD Const ); + static void CompX86regToVariable ( x86Reg Reg, void * Variable, const char * VariableName ); + static void CompVariableToX86reg ( x86Reg Reg, void * Variable, const char * VariableName ); + static void CompX86RegToX86Reg ( x86Reg Destination, x86Reg Source ); + static void DecX86reg ( x86Reg Reg ); + static void DivX86reg ( x86Reg reg ); + static void idivX86reg ( x86Reg reg ); + static void imulX86reg ( x86Reg reg ); + static void IncX86reg ( x86Reg Reg ); + static void JaeLabel8 ( char * Label, BYTE Value ); + static void JaeLabel32 ( char * Label, DWORD Value ); + static void JaLabel8 ( char * Label, BYTE Value ); + static void JaLabel32 ( char * Label, DWORD Value ); + static void JbLabel8 ( char * Label, BYTE Value ); + static void JbLabel32 ( char * Label, DWORD Value ); + static void JecxzLabel8 ( char * Label, BYTE Value ); + static void JeLabel8 ( char * Label, BYTE Value ); + static void JeLabel32 ( char * Label, DWORD Value ); + static void JgeLabel32 ( char * Label, DWORD Value ); + static void JgLabel8 ( char * Label, BYTE Value ); + static void JgLabel32 ( char * Label, DWORD Value ); + static void JleLabel8 ( char * Label, BYTE Value ); + static void JleLabel32 ( char * Label, DWORD Value ); + static void JlLabel8 ( char * Label, BYTE Value ); + static void JlLabel32 ( char * Label, DWORD Value ); + static void JmpDirectReg ( x86Reg reg ); + static void JmpIndirectLabel32 ( char * Label, DWORD location ); + static void JmpIndirectReg ( x86Reg reg ); + static void JmpLabel8 ( char * Label, BYTE Value ); + static void JmpLabel32 ( char * Label, DWORD Value ); + static void JneLabel8 ( char * Label, BYTE Value ); + static void JneLabel32 ( char * Label, DWORD Value ); + static void JnsLabel8 ( char * Label, BYTE Value ); + static void JnsLabel32 ( char * Label, DWORD Value ); + static void JsLabel32 ( char * Label, DWORD Value ); + static void LeaRegReg ( x86Reg RegDest, x86Reg RegSrc, int multiplier ); + static void LeaSourceAndOffset ( x86Reg x86DestReg, x86Reg x86SourceReg, int offset ); + static void MoveConstByteToN64Mem ( BYTE Const, x86Reg AddrReg ); + static void MoveConstHalfToN64Mem ( WORD Const, x86Reg AddrReg ); + static void MoveConstByteToVariable ( BYTE Const, void * Variable, const char * VariableName ); + static void MoveConstByteToX86regPointer ( BYTE Const, x86Reg AddrReg1, x86Reg AddrReg2 ); + static void MoveConstHalfToVariable ( WORD Const, void * Variable, const char * VariableName ); + static void MoveConstHalfToX86regPointer ( WORD Const, x86Reg AddrReg1, x86Reg AddrReg2 ); + static void MoveConstToMemoryDisp ( DWORD Const, x86Reg AddrReg, DWORD Disp ); + static void MoveConstToN64Mem ( DWORD Const, x86Reg AddrReg ); + static void MoveConstToN64MemDisp ( DWORD Const, x86Reg AddrReg, BYTE Disp ); + static void MoveConstToVariable ( DWORD Const, void * Variable, const char * VariableName ); + static void MoveConstToX86Pointer ( DWORD Const, x86Reg X86Pointer ); + static void MoveConstToX86reg ( DWORD Const, x86Reg reg ); + static void MoveConstToX86regPointer ( DWORD Const, x86Reg AddrReg1, x86Reg AddrReg2 ); + static void MoveN64MemDispToX86reg ( x86Reg reg, x86Reg AddrReg, BYTE Disp ); + static void MoveN64MemToX86reg ( x86Reg reg, x86Reg AddrReg ); + static void MoveN64MemToX86regByte ( x86Reg reg, x86Reg AddrReg ); + static void MoveN64MemToX86regHalf ( x86Reg reg, x86Reg AddrReg ); + static void MoveSxByteX86regPointerToX86reg ( x86Reg AddrReg1, x86Reg AddrReg2, x86Reg reg ); + static void MoveSxHalfX86regPointerToX86reg ( x86Reg AddrReg1, x86Reg AddrReg2, x86Reg reg ); + static void MoveSxN64MemToX86regByte ( x86Reg reg, x86Reg AddrReg ); + static void MoveSxN64MemToX86regHalf ( x86Reg reg, x86Reg AddrReg ); + static void MoveSxVariableToX86regByte ( void * Variable, const char * VariableName, x86Reg reg ); + static void MoveSxVariableToX86regHalf ( void * Variable, const char * VariableName, x86Reg reg ); + static void MoveVariableDispToX86Reg ( void * Variable, const char * VariableName, x86Reg Reg, x86Reg AddrReg, int Multiplier ); + static void MoveVariableToX86reg ( void * Variable, const char * VariableName, x86Reg reg ); + static void MoveVariableToX86regByte ( void * Variable, const char * VariableName, x86Reg reg ); + static void MoveVariableToX86regHalf ( void * Variable, const char * VariableName, x86Reg reg ); + static void MoveX86PointerToX86reg ( x86Reg reg, x86Reg X86Pointer ); + static void MoveX86PointerToX86regDisp ( x86Reg reg, x86Reg X86Pointer, BYTE Disp ); + static void MoveX86regByteToN64Mem ( x86Reg reg, x86Reg AddrReg ); + static void MoveX86regByteToVariable ( x86Reg reg, void * Variable, const char * VariableName ); + static void MoveX86regByteToX86regPointer ( x86Reg reg, x86Reg AddrReg1, x86Reg AddrReg2 ); + static void MoveX86regHalfToN64Mem ( x86Reg reg, x86Reg AddrReg ); + static void MoveX86regHalfToVariable ( x86Reg reg, void * Variable, const char * VariableName ); + static void MoveX86regHalfToX86regPointer ( x86Reg reg, x86Reg AddrReg1, x86Reg AddrReg2 ); + static void MoveX86regPointerToX86reg ( x86Reg AddrReg1, x86Reg AddrReg2, x86Reg reg ); + static void MoveX86regPointerToX86regDisp8 ( x86Reg AddrReg1, x86Reg AddrReg2, x86Reg reg, BYTE offset ); + static void MoveX86regToMemory ( x86Reg reg, x86Reg AddrReg, DWORD Disp ); + static void MoveX86regToN64Mem ( x86Reg reg, x86Reg AddrReg ); + static void MoveX86regToN64MemDisp ( x86Reg reg, x86Reg AddrReg, BYTE Disp ); + static void MoveX86regToVariable ( x86Reg reg, void * Variable, const char * VariableName ); + static void MoveX86RegToX86Reg ( x86Reg Source, x86Reg Destination ); + static void MoveX86regToX86Pointer ( x86Reg reg, x86Reg X86Pointer ); + static void MoveX86regToX86regPointer ( x86Reg reg, x86Reg AddrReg1, x86Reg AddrReg2 ); + static void MoveZxByteX86regPointerToX86reg ( x86Reg AddrReg1, x86Reg AddrReg2, x86Reg reg ); + static void MoveZxHalfX86regPointerToX86reg ( x86Reg AddrReg1, x86Reg AddrReg2, x86Reg reg ); + static void MoveZxN64MemToX86regByte ( x86Reg reg, x86Reg AddrReg ); + static void MoveZxN64MemToX86regHalf ( x86Reg reg, x86Reg AddrReg ); + static void MoveZxVariableToX86regByte ( void * Variable, const char * VariableName, x86Reg reg ); + static void MoveZxVariableToX86regHalf ( void * Variable, const char * VariableName, x86Reg reg ); + static void MulX86reg ( x86Reg reg ); + static void NotX86Reg ( x86Reg Reg ); + static void OrConstToVariable ( DWORD Const, void * Variable, const char * VariableName ); + static void OrConstToX86Reg ( DWORD Const, x86Reg reg ); + static void OrVariableToX86Reg ( void * Variable, const char * VariableName, x86Reg Reg ); + static void OrX86RegToVariable ( void * Variable, const char * VariableName, x86Reg Reg ); + static void OrX86RegToX86Reg ( x86Reg Destination, x86Reg Source ); + static void Popad ( void ); + static void Pushad ( void ); + static void Push ( x86Reg reg ); + static void Pop ( x86Reg reg ); + static void PushImm32 ( char * String, DWORD Value ); + static void Ret ( void ); + static void Seta ( x86Reg reg ); + static void Setae ( x86Reg reg ); + static void SetaVariable ( void * Variable, const char * VariableName ); + static void Setb ( x86Reg reg ); + static void SetbVariable ( void * Variable, const char * VariableName ); + static void Setg ( x86Reg reg ); + static void SetgVariable ( void * Variable, const char * VariableName ); + static void Setl ( x86Reg reg ); + static void SetlVariable ( void * Variable, const char * VariableName ); + static void Setz ( x86Reg reg ); + static void Setnz ( x86Reg reg ); + static void ShiftLeftDouble ( x86Reg Destination, x86Reg Source ); + static void ShiftLeftDoubleImmed ( x86Reg Destination, x86Reg Source, BYTE Immediate ); + static void ShiftLeftSign ( x86Reg reg ); + static void ShiftLeftSignImmed ( x86Reg reg, BYTE Immediate ); + static void ShiftRightDouble ( x86Reg Destination, x86Reg Source ); + static void ShiftRightDoubleImmed ( x86Reg Destination, x86Reg Source, BYTE Immediate ); + static void ShiftRightSign ( x86Reg reg ); + static void ShiftRightSignImmed ( x86Reg reg, BYTE Immediate ); + static void ShiftRightUnsign ( x86Reg reg ); + static void ShiftRightUnsignImmed ( x86Reg reg, BYTE Immediate ); + static void SbbConstFromX86Reg ( x86Reg Reg, DWORD Const ); + static void SbbVariableFromX86reg ( x86Reg reg, void * Variable, const char * VariableName ); + static void SbbX86RegToX86Reg ( x86Reg Destination, x86Reg Source ); + static void SubConstFromVariable ( DWORD Const, void * Variable, const char * VariableName ); + static void SubConstFromX86Reg ( x86Reg Reg, DWORD Const ); + static void SubVariableFromX86reg ( x86Reg reg, void * Variable, const char * VariableName ); + static void SubX86RegToX86Reg ( x86Reg Destination, x86Reg Source ); + static void TestConstToX86Reg ( DWORD Const, x86Reg reg ); + static void TestVariable ( DWORD Const, void * Variable, const char * VariableName ); + static void TestX86RegToX86Reg ( x86Reg Destination, x86Reg Source ); + static void XorConstToX86Reg ( x86Reg Reg, DWORD Const ); + static void XorX86RegToX86Reg ( x86Reg Source, x86Reg Destination ); + static void XorVariableToX86reg ( void * Variable, const char * VariableName, x86Reg reg ); + + + static void fpuAbs ( void ); + static void fpuAddDword ( void * Variable, const char * VariableName ); + static void fpuAddDwordRegPointer ( x86Reg x86Pointer ); + static void fpuAddQword ( void * Variable, const char * VariableName ); + static void fpuAddQwordRegPointer ( x86Reg X86Pointer ); + static void fpuAddReg ( x86FpuValues reg ); + static void fpuAddRegPop ( int * StackPos, x86FpuValues reg ); + static void fpuComDword ( void * Variable, const char * VariableName, BOOL Pop ); + static void fpuComDwordRegPointer ( x86Reg X86Pointer, BOOL Pop ); + static void fpuComQword ( void * Variable, const char * VariableName, BOOL Pop ); + static void fpuComQwordRegPointer ( x86Reg X86Pointer, BOOL Pop ); + static void fpuComReg ( x86FpuValues reg, BOOL Pop ); + static void fpuDivDword ( void * Variable, const char * VariableName ); + static void fpuDivDwordRegPointer ( x86Reg X86Pointer ); + static void fpuDivQword ( void * Variable, const char * VariableName ); + static void fpuDivQwordRegPointer ( x86Reg X86Pointer ); + static void fpuDivReg ( x86FpuValues Reg ); + static void fpuDivRegPop ( x86FpuValues reg ); + static void fpuExchange ( x86FpuValues Reg ); + static void fpuFree ( x86FpuValues Reg ); + static void fpuDecStack ( int * StackPos ); + static void fpuIncStack ( int * StackPos ); + static void fpuLoadControl ( void * Variable, const char * VariableName ); + static void fpuLoadDword ( int * StackPos, void * Variable, const char * VariableName ); + static void fpuLoadDwordFromX86Reg ( int * StackPos, x86Reg reg ); + static void fpuLoadDwordFromN64Mem ( int * StackPos, x86Reg reg ); + static void fpuLoadInt32bFromN64Mem ( int * StackPos, x86Reg reg ); + static void fpuLoadIntegerDword ( int * StackPos, void * Variable, const char * VariableName ); + static void fpuLoadIntegerDwordFromX86Reg ( int * StackPos,x86Reg Reg ); + static void fpuLoadIntegerQword ( int * StackPos, void * Variable, const char * VariableName ); + static void fpuLoadIntegerQwordFromX86Reg ( int * StackPos,x86Reg Reg ); + static void fpuLoadQword ( int * StackPos, void * Variable, const char * VariableName ); + static void fpuLoadQwordFromX86Reg ( int * StackPos, x86Reg Reg ); + static void fpuLoadQwordFromN64Mem ( int * StackPos, x86Reg reg ); + static void fpuLoadReg ( int * StackPos, x86FpuValues Reg ); + static void fpuMulDword ( void * Variable, const char * VariableName); + static void fpuMulDwordRegPointer ( x86Reg X86Pointer ); + static void fpuMulQword ( void * Variable, const char * VariableName); + static void fpuMulQwordRegPointer ( x86Reg X86Pointer ); + static void fpuMulReg ( x86FpuValues reg ); + static void fpuMulRegPop ( x86FpuValues reg ); + static void fpuNeg ( void ); + static void fpuRound ( void ); + static void fpuSqrt ( void ); + static void fpuStoreControl ( void * Variable, const char * VariableName ); + static void fpuStoreDword ( int * StackPos, void * Variable, const char * VariableName, BOOL pop ); + static void fpuStoreDwordFromX86Reg ( int * StackPos,x86Reg Reg, BOOL pop ); + static void fpuStoreDwordToN64Mem ( int * StackPos, x86Reg reg, BOOL Pop ); + static void fpuStoreIntegerDword ( int * StackPos, void * Variable, const char * VariableName, BOOL pop ); + static void fpuStoreIntegerDwordFromX86Reg ( int * StackPos,x86Reg Reg, BOOL pop ); + static void fpuStoreIntegerQword ( int * StackPos, void * Variable, const char * VariableName, BOOL pop ); + static void fpuStoreIntegerQwordFromX86Reg ( int * StackPos, x86Reg Reg, BOOL pop ); + static void fpuStoreQword ( int * StackPos, void * Variable, const char * VariableName, BOOL pop ); + static void fpuStoreQwordFromX86Reg ( int * StackPos, x86Reg Reg, BOOL pop ); + static void fpuStoreStatus ( void ); + static void fpuSubDword ( void * Variable, const char * VariableName ); + static void fpuSubDwordRegPointer ( x86Reg X86Pointer ); + static void fpuSubDwordReverse ( void * Variable, const char * VariableName ); + static void fpuSubQword ( void * Variable, const char * VariableName ); + static void fpuSubQwordRegPointer ( x86Reg X86Pointer ); + static void fpuSubQwordReverse ( void * Variable, const char * VariableName ); + static void fpuSubReg ( x86FpuValues reg ); + static void fpuSubRegPop ( x86FpuValues reg ); + + static BYTE CalcMultiplyCode ( Multipler Multiply ); + static BYTE * m_RecompPos; + + static void * GetAddressOf(int value, ...); + static void SetJump32(DWORD * Loc, DWORD * JumpLoc ); + static void SetJump8(BYTE * Loc, BYTE * JumpLoc); + +private: + static void BreakPointNotification (const char * const FileName, const int LineNumber); + static char m_fpupop[2][2]; +}; + +#define AddressOf(Addr) CX86Ops::GetAddressOf(5,(Addr)) diff --git a/Source/Project64/Project64.dsp b/Source/Project64/Project64.dsp index 00ab0b995..15afabc4d 100644 --- a/Source/Project64/Project64.dsp +++ b/Source/Project64/Project64.dsp @@ -498,6 +498,14 @@ SOURCE=".\N64 System\C Core\X86.cpp" # PROP Default_Filter "" # Begin Source File +SOURCE=".\N64 System\Recompiler\Code Block.cpp" +# End Source File +# Begin Source File + +SOURCE=".\N64 System\Recompiler\Code Section.cpp" +# End Source File +# Begin Source File + SOURCE="N64 System\Recompiler\Delay Slot Map Class.cpp" # End Source File # Begin Source File @@ -510,6 +518,10 @@ SOURCE="N64 System\Recompiler\Function Map Class.cpp" # End Source File # Begin Source File +SOURCE=".\N64 System\Recompiler\Jump Info.cpp" +# End Source File +# Begin Source File + SOURCE="N64 System\Recompiler\Recompiler Class.cpp" # End Source File # Begin Source File @@ -522,8 +534,16 @@ SOURCE=".\N64 System\Recompiler\Recompiler Ops.cpp" # End Source File # Begin Source File +SOURCE=".\N64 System\Recompiler\Reg Info.cpp" +# End Source File +# Begin Source File + SOURCE="N64 System\Recompiler\Section Info.cpp" # End Source File +# Begin Source File + +SOURCE=".\N64 System\Recompiler\X86ops.cpp" +# End Source File # End Group # Begin Group "Interpreter Files" @@ -1130,10 +1150,22 @@ SOURCE="N64 System\Debugger\debugger.h" # PROP Default_Filter "" # Begin Source File +SOURCE=".\N64 System\Recompiler\Code Block.h" +# End Source File +# Begin Source File + +SOURCE=".\N64 System\Recompiler\Code Section.h" +# End Source File +# Begin Source File + SOURCE="N64 System\Recompiler\Delay Slot Map Class.h" # End Source File # Begin Source File +SOURCE=".\N64 System\Recompiler\Exit Info.h" +# End Source File +# Begin Source File + SOURCE="N64 System\Recompiler\Function Info.h" # End Source File # Begin Source File @@ -1142,6 +1174,10 @@ SOURCE="N64 System\Recompiler\Function Map Class.h" # End Source File # Begin Source File +SOURCE=".\N64 System\Recompiler\Jump Info.h" +# End Source File +# Begin Source File + SOURCE="N64 System\Recompiler\Recompiler Class.h" # End Source File # Begin Source File @@ -1154,8 +1190,16 @@ SOURCE=".\N64 System\Recompiler\Recompiler Ops.h" # End Source File # Begin Source File +SOURCE=".\N64 System\Recompiler\Reg Info.h" +# End Source File +# Begin Source File + SOURCE="N64 System\Recompiler\Section Info.h" # End Source File +# Begin Source File + +SOURCE=".\N64 System\Recompiler\X86ops.h" +# End Source File # End Group # Begin Group "Interpreter Headers"