[Project64] Remove CRecompilerOps from CMipsMemoryVM
This commit is contained in:
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c46e8ccd8f
commit
cd0f305124
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@ -35,9 +35,6 @@
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<AdditionalInputs>$(OutDir)Project64.exe;%(AdditionalInputs)</AdditionalInputs>
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<Outputs>$(OutDir)Setup Project64 2.2.exe;%(Outputs)</Outputs>
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</CustomBuild>
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<None Include="binno\binno.iss" />
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<None Include="binno\it_download.iss" />
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<None Include="binno\it_download_u.iss" />
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</ItemGroup>
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<ItemGroup>
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<ProjectReference Include="..\Project64\Project64.vcxproj">
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@ -4,20 +4,6 @@
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<Filter Include="Source Files">
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<UniqueIdentifier>{93ba3998-9310-4111-bfd3-a907e3452213}</UniqueIdentifier>
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</Filter>
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<Filter Include="Source Files\binno">
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<UniqueIdentifier>{389ec096-ad75-499a-82a2-f6b5dbe0ed90}</UniqueIdentifier>
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</Filter>
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</ItemGroup>
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<ItemGroup>
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<None Include="binno\binno.iss">
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<Filter>Source Files\binno</Filter>
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</None>
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<None Include="binno\it_download.iss">
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<Filter>Source Files\binno</Filter>
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</None>
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<None Include="binno\it_download_u.iss">
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<Filter>Source Files\binno</Filter>
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</None>
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</ItemGroup>
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<ItemGroup>
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<CustomBuild Include="Installer.iss">
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@ -15,11 +15,11 @@
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#include <Common/path.h>
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CFlashram::CFlashram(bool ReadOnly) :
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m_FlashRamPointer(NULL),
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m_FlashFlag(FLASHRAM_MODE_NOPES),
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m_FlashStatus(0),
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m_FlashRAM_Offset(0),
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m_ReadOnly(ReadOnly)
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m_FlashRamPointer(NULL),
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m_FlashFlag(FLASHRAM_MODE_NOPES),
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m_FlashStatus(0),
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m_FlashRAM_Offset(0),
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m_ReadOnly(ReadOnly)
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{
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}
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@ -176,7 +176,6 @@ void CFlashram::WriteToFlashCommand(uint32_t FlashRAM_Command)
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}
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{
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uint8_t FlipBuffer[sizeof(EmptyBlock)];
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register size_t edx;
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uint8_t * FlashRamPointer = m_FlashRamPointer;
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memset(FlipBuffer, 0, sizeof(FlipBuffer));
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@ -22,8 +22,6 @@
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#include <stdio.h>
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#include <Common/MemoryManagement.h>
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uint8_t * CMipsMemoryVM::m_Reserve1 = NULL;
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uint8_t * CMipsMemoryVM::m_Reserve2 = NULL;
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uint32_t CMipsMemoryVM::m_MemLookupAddress = 0;
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@ -34,20 +32,20 @@ uint32_t CMipsMemoryVM::RegModValue;
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#pragma warning(disable:4355) // Disable 'this' : used in base member initializer list
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CMipsMemoryVM::CMipsMemoryVM(bool SavesReadOnly) :
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CPifRam(SavesReadOnly),
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CFlashram(SavesReadOnly),
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CSram(SavesReadOnly),
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CDMA(*this, *this),
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m_RomMapped(false),
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m_Rom(NULL),
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m_RomSize(0),
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m_RomWrittenTo(false),
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m_RomWroteValue(0),
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m_HalfLine(0),
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m_HalfLineCheck(false),
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m_FieldSerration(0),
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m_TLB_ReadMap(NULL),
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m_TLB_WriteMap(NULL)
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CPifRam(SavesReadOnly),
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CFlashram(SavesReadOnly),
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CSram(SavesReadOnly),
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CDMA(*this, *this),
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m_RomMapped(false),
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m_Rom(NULL),
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m_RomSize(0),
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m_RomWrittenTo(false),
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m_RomWroteValue(0),
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m_HalfLine(0),
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m_HalfLineCheck(false),
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m_FieldSerration(0),
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m_TLB_ReadMap(NULL),
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m_TLB_WriteMap(NULL)
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{
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g_Settings->RegisterChangeCB(Game_RDRamSize, this, (CSettings::SettingChangedFunc)RdramChanged);
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m_RDRAM = NULL;
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@ -592,49 +590,6 @@ bool CMipsMemoryVM::TranslateVaddr(uint32_t VAddr, uint32_t &PAddr) const
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return true;
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}
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void CMipsMemoryVM::ResetMemoryStack()
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{
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x86Reg Reg, TempReg;
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int32_t MipsReg = 29;
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CPU_Message(" ResetMemoryStack");
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Reg = Get_MemoryStack();
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if (Reg == x86_Unknown)
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{
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Reg = Map_TempReg(x86_Any, MipsReg, false);
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}
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else
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{
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if (IsUnknown(MipsReg))
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{
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MoveVariableToX86reg(&_GPR[MipsReg].UW[0], CRegName::GPR_Lo[MipsReg], Reg);
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}
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else if (IsMapped(MipsReg))
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{
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MoveX86RegToX86Reg(GetMipsRegMapLo(MipsReg), Reg);
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}
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else
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{
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MoveConstToX86reg(GetMipsRegLo(MipsReg), Reg);
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}
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}
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if (g_System->bUseTlb())
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{
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TempReg = Map_TempReg(x86_Any, -1, false);
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MoveX86RegToX86Reg(Reg, TempReg);
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ShiftRightUnsignImmed(TempReg, 12);
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MoveVariableDispToX86Reg(m_TLB_ReadMap, "m_TLB_ReadMap", TempReg, TempReg, 4);
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AddX86RegToX86Reg(Reg, TempReg);
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}
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else
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{
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AndConstToX86Reg(Reg, 0x1FFFFFFF);
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AddConstToX86Reg(Reg, (uint32_t)m_RDRAM);
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}
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MoveX86regToVariable(Reg, &(g_Recompiler->MemoryStackPos()), "MemoryStack");
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}
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bool CMipsMemoryVM::LB_NonMemory(uint32_t PAddr, uint32_t* Value, bool /*SignExtend*/)
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{
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if (PAddr < 0x800000)
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@ -2224,10 +2179,10 @@ void CMipsMemoryVM::Write32CartridgeDomain2Address2(void)
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}
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/*if ((m_MemLookupAddress & 0x1FFFFFFF) != 0x08010000)
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{
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if (bHaveDebugger())
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{
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g_Notify->BreakPoint(__FILE__, __LINE__);
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}
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if (bHaveDebugger())
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{
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g_Notify->BreakPoint(__FILE__, __LINE__);
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}
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}*/
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if (g_System->m_SaveUsing == SaveChip_Auto)
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{
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@ -60,7 +60,6 @@
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class CMipsMemoryVM :
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public CTransVaddr,
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private CRecompilerOps,
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private R4300iOp,
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private CPifRam,
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private CFlashram,
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@ -114,10 +113,6 @@ public:
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void ProtectMemory(uint32_t StartVaddr, uint32_t EndVaddr);
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void UnProtectMemory(uint32_t StartVaddr, uint32_t EndVaddr);
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//Compilation Functions
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void ResetMemoryStack();
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void ResetMemoryStack(CRegInfo& RegInfo);
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//Functions for TLB notification
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void TLB_Mapped(uint32_t VAddr, uint32_t Len, uint32_t PAddr, bool bReadOnly);
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void TLB_Unmaped(uint32_t Vaddr, uint32_t Len);
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@ -2057,7 +2057,7 @@ void CRecompilerOps::ADDI()
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if (g_System->bFastSP() && m_Opcode.rt == 29 && m_Opcode.rs != 29)
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{
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ResetX86Protection();
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g_MMU->ResetMemoryStack();
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ResetMemoryStack();
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}
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}
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@ -2097,7 +2097,7 @@ void CRecompilerOps::ADDIU()
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if (g_System->bFastSP() && m_Opcode.rt == 29 && m_Opcode.rs != 29)
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{
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ResetX86Protection();
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g_MMU->ResetMemoryStack();
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ResetMemoryStack();
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}
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}
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@ -2366,7 +2366,7 @@ void CRecompilerOps::ORI()
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if (g_System->bFastSP() && m_Opcode.rt == 29 && m_Opcode.rs != 29)
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{
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ResetX86Protection();
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g_MMU->ResetMemoryStack();
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ResetMemoryStack();
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}
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}
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@ -3004,7 +3004,7 @@ void CRecompilerOps::LW(bool ResultSigned, bool bRecordLLBit)
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if (g_System->bFastSP() && m_Opcode.rt == 29)
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{
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ResetX86Protection();
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g_MMU->ResetMemoryStack();
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ResetMemoryStack();
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}
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}
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@ -4316,7 +4316,7 @@ void CRecompilerOps::LD()
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LW_KnownAddress(GetMipsRegMapLo(m_Opcode.rt), Address + 4);
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if (g_System->bFastSP() && m_Opcode.rt == 29)
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{
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g_MMU->ResetMemoryStack();
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ResetMemoryStack();
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}
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return;
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}
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@ -4378,7 +4378,7 @@ void CRecompilerOps::LD()
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if (g_System->bFastSP() && m_Opcode.rt == 29)
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{
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ResetX86Protection();
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g_MMU->ResetMemoryStack();
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ResetMemoryStack();
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}
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}
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@ -5685,7 +5685,7 @@ void CRecompilerOps::SPECIAL_ADD()
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}
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if (g_System->bFastSP() && m_Opcode.rd == 29)
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{
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g_MMU->ResetMemoryStack();
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ResetMemoryStack();
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}
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}
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@ -5727,7 +5727,7 @@ void CRecompilerOps::SPECIAL_ADDU()
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}
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if (g_System->bFastSP() && m_Opcode.rd == 29)
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{
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g_MMU->ResetMemoryStack();
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ResetMemoryStack();
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}
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}
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@ -5776,7 +5776,7 @@ void CRecompilerOps::SPECIAL_SUB()
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}
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if (g_System->bFastSP() && m_Opcode.rd == 29)
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{
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g_MMU->ResetMemoryStack();
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ResetMemoryStack();
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}
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}
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@ -5826,7 +5826,7 @@ void CRecompilerOps::SPECIAL_SUBU()
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if (g_System->bFastSP() && m_Opcode.rd == 29)
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{
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g_MMU->ResetMemoryStack();
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ResetMemoryStack();
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}
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}
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@ -6200,7 +6200,7 @@ void CRecompilerOps::SPECIAL_OR()
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if (g_System->bFastSP() && m_Opcode.rd == 29)
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{
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ResetX86Protection();
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g_MMU->ResetMemoryStack();
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ResetMemoryStack();
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}
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}
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@ -11286,3 +11286,46 @@ void CRecompilerOps::SW_Register(x86Reg Reg, uint32_t VAddr)
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}
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}
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}
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void CRecompilerOps::ResetMemoryStack()
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{
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x86Reg Reg, TempReg;
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int32_t MipsReg = 29;
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CPU_Message(" ResetMemoryStack");
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Reg = Get_MemoryStack();
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if (Reg == x86_Unknown)
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{
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Reg = Map_TempReg(x86_Any, MipsReg, false);
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}
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else
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{
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if (IsUnknown(MipsReg))
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{
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MoveVariableToX86reg(&_GPR[MipsReg].UW[0], CRegName::GPR_Lo[MipsReg], Reg);
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}
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else if (IsMapped(MipsReg))
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{
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MoveX86RegToX86Reg(GetMipsRegMapLo(MipsReg), Reg);
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}
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else
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{
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MoveConstToX86reg(GetMipsRegLo(MipsReg), Reg);
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}
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}
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if (g_System->bUseTlb())
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{
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TempReg = Map_TempReg(x86_Any, -1, false);
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MoveX86RegToX86Reg(Reg, TempReg);
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ShiftRightUnsignImmed(TempReg, 12);
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MoveVariableDispToX86Reg(g_MMU->m_TLB_ReadMap, "MMU->TLB_ReadMap", TempReg, TempReg, 4);
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AddX86RegToX86Reg(Reg, TempReg);
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}
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else
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{
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AndConstToX86Reg(Reg, 0x1FFFFFFF);
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AddConstToX86Reg(Reg, (uint32_t)g_MMU->Rdram());
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}
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MoveX86regToVariable(Reg, &(g_Recompiler->MemoryStackPos()), "MemoryStack");
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}
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@ -244,7 +244,6 @@ public:
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const OPCODE & GetOpcode ( void ) const;
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void PreCompileOpcode(void);
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void PostCompileOpcode ( void );
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void Compile_StoreInstructClean(x86Reg AddressReg, int32_t Length);
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void CompileExit(uint32_t JumpPC, uint32_t TargetPC, CRegInfo &ExitRegSet, CExitInfo::EXIT_REASON reason, bool CompileNow);
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void CompileReadTLBMiss(uint32_t VirtualAddress, x86Reg LookUpReg);
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@ -379,6 +378,8 @@ private:
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void LW(bool ResultSigned, bool bRecordLLBit);
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void SW(bool bCheckLLbit);
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void CompileExit(uint32_t JumpPC, uint32_t TargetPC, CRegInfo &ExitRegSet, CExitInfo::EXIT_REASON reason, bool CompileNow, void(*x86Jmp)(const char * Label, uint32_t Value));
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void Compile_StoreInstructClean(x86Reg AddressReg, int32_t Length);
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void ResetMemoryStack();
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EXIT_LIST m_ExitInfo;
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static STEP_TYPE m_NextInstruction;
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