Core: Mask COP1_CT reg 31
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@ -1900,7 +1900,7 @@ void R4300iOp::COP1_CT()
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TEST_COP1_USABLE_EXCEPTION();
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if (m_Opcode.fs == 31)
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{
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_FPCR[m_Opcode.fs] = _GPR[m_Opcode.rt].W[0];
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_FPCR[m_Opcode.fs] = (_GPR[m_Opcode.rt].W[0] & 0x183FFFF);
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switch ((_FPCR[m_Opcode.fs] & 3))
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{
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case 0: *_RoundingModel = FE_TONEAREST; break;
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@ -1910,10 +1910,6 @@ void R4300iOp::COP1_CT()
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}
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return;
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}
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if (HaveDebugger())
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{
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g_Notify->DisplayError("CTC1: what register are you writing to?");
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}
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}
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// COP1: BC1 functions
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