ShuriZma
/
project64
mirror of https://github.com/project64/project64.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

[Android] Cleanup/fixup CArmOps::MoveConstToArmReg

This commit is contained in:
zilmar 2016-11-28 07:40:57 +11:00
parent cc4a4ab207
commit c408ba9c17
1 changed files with 31 additions and 45 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

34
Source/Project64-core/N64System/Recompiler/Arm/ArmOps.cpp
View File

@ -324,12 +324,9 @@ void CArmOps::MoveConstToArmReg(ArmReg Reg, uint16_t value, const char * comment
ArmNop();
}
PreOpCheck(true,__FILE__,__LINE__);
if (mInItBlock)
if ((value & 0xFF00) == 0 && Reg <= 7)
{
if ((value & 0xF0) == 0 && Reg <= 7)
{
CPU_Message(" mov%s\t%s, #0x%X\t; %s", ArmCurrentItCondition(), ArmRegName(Reg), (uint32_t)value, comment != NULL ? comment : stdstr_f("0x%X",(uint32_t)value).c_str());
CPU_Message(" mov%s\t%s, #0x%X\t; %s", mInItBlock ? ArmCurrentItCondition() : "s", ArmRegName(Reg), (uint32_t)value, comment != NULL ? comment : stdstr_f("0x%X", (uint32_t)value).c_str());
ArmThumbOpcode op = { 0 };
op.Imm8.imm8 = value;
op.Imm8.rdn = Reg;
@ -338,7 +335,7 @@ void CArmOps::MoveConstToArmReg(ArmReg Reg, uint16_t value, const char * comment
}
else if (CanThumbCompressConst(value))
{
CPU_Message(" mov%s.w\t%s, #0x%X\t; %s", ArmCurrentItCondition(), ArmRegName(Reg), (uint32_t)value, comment != NULL ? comment : stdstr_f("0x%X",(uint32_t)value).c_str());
CPU_Message(" mov%s.w\t%s, #0x%X\t; %s", mInItBlock ? ArmCurrentItCondition() : "", ArmRegName(Reg), (uint32_t)value, comment != NULL ? comment : stdstr_f("0x%X", (uint32_t)value).c_str());
uint16_t CompressedValue = ThumbCompressConst(value);
Arm32Opcode op = { 0 };
op.imm8_3_1.rn = 0xF;
@ -355,24 +352,8 @@ void CArmOps::MoveConstToArmReg(ArmReg Reg, uint16_t value, const char * comment
}
else
{
g_Notify->BreakPoint(__FILE__,__LINE__);
}
ProgressItBlock();
}
else
{
if (bHaveDebugger() && value & 0xF0 == 0)
{
g_Notify->BreakPoint(__FILE__,__LINE__);
}
if (comment != NULL)
{
CPU_Message(" movw\t%s, #0x%X\t; %s", ArmRegName(Reg), (uint32_t)value, comment);
}
else
{
CPU_Message(" movw\t%s, #%d\t; 0x%X", ArmRegName(Reg), (uint32_t)value, (uint32_t)value);
}
CPU_Message(" movw%s\t%s, #0x%X\t; %s", mInItBlock ? ArmCurrentItCondition() : "", ArmRegName(Reg), (uint32_t)value, comment != NULL ? comment : stdstr_f("0x%X", (uint32_t)value).c_str());
Arm32Opcode op = { 0 };
op.imm16.opcode = ArmMOV_IMM16;
op.imm16.i = ((value >> 11) & 0x1);
@ -384,6 +365,11 @@ void CArmOps::MoveConstToArmReg(ArmReg Reg, uint16_t value, const char * comment
op.imm16.imm8 = (value & 0xFF);
AddCode32(op.Hex);
}
if (mInItBlock)
{
ProgressItBlock();
}
}
void CArmOps::MoveConstToArmRegTop(ArmReg DestReg, uint16_t Const, const char * comment)