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Update CArmRecompilerOps::BEQ_Compare

This commit is contained in:
zilmar 2016-11-22 21:22:39 +11:00
parent b9d21af5b5
commit c166c307a2
1 changed files with 9 additions and 7 deletions
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10
Source/Project64-core/N64System/Recompiler/Arm/ArmRecompilerOps.cpp
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@ -35,7 +35,7 @@ void CArmRecompilerOps::PreCompileOpcode(void)
MoveConstToVariable(m_CompilePC, &g_Reg->m_PROGRAM_COUNTER, "PROGRAM_COUNTER"); MoveConstToVariable(m_CompilePC, &g_Reg->m_PROGRAM_COUNTER, "PROGRAM_COUNTER");
if (g_SyncSystem) if (g_SyncSystem)
{ {
MoveConstToArmReg((uint32_t)g_BaseSystem, Arm_R0, "g_BaseSystem"); MoveConstToArmReg(Arm_R0, (uint32_t)g_BaseSystem, "g_BaseSystem");
CallFunction(AddressOf(&CN64System::SyncSystem), "CN64System::SyncSystem"); CallFunction(AddressOf(&CN64System::SyncSystem), "CN64System::SyncSystem");
} }
}*/ }*/
@ -933,7 +933,7 @@ void CArmRecompilerOps::BEQ_Compare()
uint32_t ConstReg = IsConst(m_Opcode.rt) ? m_Opcode.rt : m_Opcode.rs; uint32_t ConstReg = IsConst(m_Opcode.rt) ? m_Opcode.rt : m_Opcode.rs;
uint32_t MappedReg = IsConst(m_Opcode.rt) ? m_Opcode.rs : m_Opcode.rt; uint32_t MappedReg = IsConst(m_Opcode.rt) ? m_Opcode.rs : m_Opcode.rt;
if (Is64Bit(ConstReg) || Is64Bit(MappedReg)) if (!g_System->b32BitCore() && (Is64Bit(ConstReg) || Is64Bit(MappedReg)))
{ {
if (Is32Bit(ConstReg) || Is32Bit(MappedReg)) if (Is32Bit(ConstReg) || Is32Bit(MappedReg))
{ {
@ -1011,9 +1011,10 @@ void CArmRecompilerOps::BEQ_Compare()
uint32_t KnownReg = IsKnown(m_Opcode.rt) ? m_Opcode.rt : m_Opcode.rs; uint32_t KnownReg = IsKnown(m_Opcode.rt) ? m_Opcode.rt : m_Opcode.rs;
uint32_t UnknownReg = IsKnown(m_Opcode.rt) ? m_Opcode.rs : m_Opcode.rt; uint32_t UnknownReg = IsKnown(m_Opcode.rt) ? m_Opcode.rs : m_Opcode.rt;
ArmReg TempReg = Arm_Any;
if (!g_System->b32BitCore()) if (!g_System->b32BitCore())
{ {
ArmReg TempReg = Map_TempReg(Arm_Any, UnknownReg, true); TempReg = Map_TempReg(Arm_Any, UnknownReg, true);
if (IsConst(KnownReg)) if (IsConst(KnownReg))
{ {
if (Is32Bit(KnownReg) && IsSigned(KnownReg)) if (Is32Bit(KnownReg) && IsSigned(KnownReg))
@ -1044,8 +1045,9 @@ void CArmRecompilerOps::BEQ_Compare()
BranchLabel20(ArmBranch_Notequal, m_Section->m_Cont.BranchLabel.c_str()); BranchLabel20(ArmBranch_Notequal, m_Section->m_Cont.BranchLabel.c_str());
m_Section->m_Cont.LinkLocation = (uint32_t *)(*g_RecompPos - 4); m_Section->m_Cont.LinkLocation = (uint32_t *)(*g_RecompPos - 4);
} }
m_RegWorkingSet.SetArmRegProtected(TempReg, false);
} }
ArmReg TempReg = Map_TempReg(Arm_Any, UnknownReg, false); TempReg = Map_TempReg(TempReg, UnknownReg, false);
if (IsConst(KnownReg)) if (IsConst(KnownReg))
{ {
CompareArmRegToConst(TempReg, GetMipsRegLo(KnownReg)); CompareArmRegToConst(TempReg, GetMipsRegLo(KnownReg));