[Project64] Rename RegInfo.cpp to x86/x86/x86RegInfo.cpp
This commit is contained in:
parent
53e5ec1866
commit
b2bc2245d7
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@ -43,6 +43,7 @@ LOCAL_SRC_FILES := \
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$(SRCDIR)/N64System/Mips/TLBclass.cpp \
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$(SRCDIR)/N64System/Mips/TLBclass.cpp \
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$(SRCDIR)/N64System/Recompiler/x86/x86RecompilerOps.cpp \
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$(SRCDIR)/N64System/Recompiler/x86/x86RecompilerOps.cpp \
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$(SRCDIR)/N64System/Recompiler/x86/x86ops.cpp \
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$(SRCDIR)/N64System/Recompiler/x86/x86ops.cpp \
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$(SRCDIR)/N64System/Recompiler/x86/x86RegInfo.cpp \
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$(SRCDIR)/N64System/Recompiler/LoopAnalysis.cpp \
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$(SRCDIR)/N64System/Recompiler/LoopAnalysis.cpp \
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$(SRCDIR)/N64System/Recompiler/CodeBlock.cpp \
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$(SRCDIR)/N64System/Recompiler/CodeBlock.cpp \
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$(SRCDIR)/N64System/Recompiler/SectionInfo.cpp \
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$(SRCDIR)/N64System/Recompiler/SectionInfo.cpp \
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@ -52,7 +53,6 @@ LOCAL_SRC_FILES := \
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$(SRCDIR)/N64System/Recompiler/RecompilerCodeLog.cpp \
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$(SRCDIR)/N64System/Recompiler/RecompilerCodeLog.cpp \
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$(SRCDIR)/N64System/Recompiler/RecompilerMemory.cpp \
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$(SRCDIR)/N64System/Recompiler/RecompilerMemory.cpp \
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$(SRCDIR)/N64System/Recompiler/CodeSection.cpp \
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$(SRCDIR)/N64System/Recompiler/CodeSection.cpp \
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$(SRCDIR)/N64System/Recompiler/RegInfo.cpp \
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$(SRCDIR)/N64System/CheatClass.cpp \
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$(SRCDIR)/N64System/CheatClass.cpp \
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$(SRCDIR)/N64System/FramePerSecondClass.cpp \
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$(SRCDIR)/N64System/FramePerSecondClass.cpp \
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$(SRCDIR)/N64System/N64Class.cpp \
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$(SRCDIR)/N64System/N64Class.cpp \
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@ -11,7 +11,8 @@
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#include "stdafx.h"
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#include "stdafx.h"
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#include <string.h>
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#include <string.h>
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#include <Project64-core/N64System/Recompiler/CodeBlock.h>
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#include <Project64-core/N64System/Recompiler/CodeBlock.h>
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#include "RecompilerCodeLog.h"
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#include <Project64-core/N64System/Recompiler/RecompilerCodeLog.h>
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#include <Project64-core/N64System/Recompiler/x86/x86RecompilerOps.h>
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#include <Project64-core/N64System/SystemGlobals.h>
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#include <Project64-core/N64System/SystemGlobals.h>
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#include <Project64-core/N64System/Mips/TranslateVaddr.h>
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#include <Project64-core/N64System/Mips/TranslateVaddr.h>
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#include <Project64-core/N64System/N64Class.h>
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#include <Project64-core/N64System/N64Class.h>
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@ -19,11 +20,11 @@
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bool DelaySlotEffectsCompare (uint32_t PC, uint32_t Reg1, uint32_t Reg2);
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bool DelaySlotEffectsCompare (uint32_t PC, uint32_t Reg1, uint32_t Reg2);
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CCodeBlock::CCodeBlock(uint32_t VAddrEnter, uint8_t * RecompPos) :
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CCodeBlock::CCodeBlock(uint32_t VAddrEnter, uint8_t * CompiledLocation) :
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m_VAddrEnter(VAddrEnter),
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m_VAddrEnter(VAddrEnter),
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m_VAddrFirst(VAddrEnter),
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m_VAddrFirst(VAddrEnter),
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m_VAddrLast(VAddrEnter),
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m_VAddrLast(VAddrEnter),
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m_CompiledLocation(RecompPos),
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m_CompiledLocation(CompiledLocation),
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m_EnterSection(NULL),
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m_EnterSection(NULL),
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m_Test(1)
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m_Test(1)
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{
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{
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@ -45,7 +46,6 @@ CCodeBlock::CCodeBlock(uint32_t VAddrEnter, uint8_t * RecompPos) :
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g_Notify->BreakPoint(__FILE__, __LINE__);
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g_Notify->BreakPoint(__FILE__, __LINE__);
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}
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}
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baseSection->m_ContinueSection = m_EnterSection;
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baseSection->m_ContinueSection = m_EnterSection;
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m_EnterSection->AddParent(baseSection);
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m_EnterSection->AddParent(baseSection);
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m_Sections.push_back(m_EnterSection);
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m_Sections.push_back(m_EnterSection);
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m_SectionMap.insert(SectionMap::value_type(VAddrEnter,m_EnterSection));
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m_SectionMap.insert(SectionMap::value_type(VAddrEnter,m_EnterSection));
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@ -61,6 +61,7 @@ CCodeBlock::CCodeBlock(uint32_t VAddrEnter, uint8_t * RecompPos) :
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memset(m_MemLocation,0,sizeof(m_MemLocation));
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memset(m_MemLocation,0,sizeof(m_MemLocation));
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memset(m_MemContents,0,sizeof(m_MemContents));
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memset(m_MemContents,0,sizeof(m_MemContents));
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}
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}
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AnalyseBlock();
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AnalyseBlock();
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}
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}
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@ -726,11 +727,11 @@ bool CCodeBlock::Compile()
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if (g_System->bLinkBlocks())
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if (g_System->bLinkBlocks())
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{
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{
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while (m_EnterSection->GenerateX86Code(NextTest()));
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while (m_EnterSection->GenerateNativeCode(NextTest()));
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}
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}
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else
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else
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{
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{
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if (!m_EnterSection->GenerateX86Code(NextTest()))
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if (!m_EnterSection->GenerateNativeCode(NextTest()))
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{
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{
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return false;
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return false;
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}
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}
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@ -648,7 +648,7 @@ void CCodeSection::GenerateSectionLinkage()
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for (i = 0; i < 2; i++)
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for (i = 0; i < 2; i++)
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{
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{
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if (JumpInfo[i]->FallThrough && !TargetSection[i]->GenerateX86Code(m_BlockInfo->NextTest()))
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if (JumpInfo[i]->FallThrough && !TargetSection[i]->GenerateNativeCode(m_BlockInfo->NextTest()))
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{
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{
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JumpInfo[i]->FallThrough = false;
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JumpInfo[i]->FallThrough = false;
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JmpLabel32(JumpInfo[i]->BranchLabel.c_str(), 0);
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JmpLabel32(JumpInfo[i]->BranchLabel.c_str(), 0);
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@ -679,7 +679,7 @@ void CCodeSection::GenerateSectionLinkage()
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}
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}
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if (TargetSection[i]->m_CompiledLocation == NULL)
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if (TargetSection[i]->m_CompiledLocation == NULL)
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{
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{
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TargetSection[i]->GenerateX86Code(m_BlockInfo->NextTest());
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TargetSection[i]->GenerateNativeCode(m_BlockInfo->NextTest());
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}
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}
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else
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else
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{
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{
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@ -1001,7 +1001,7 @@ g_Notify->BreakPoint(__FILE__, __LINE__);
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}
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}
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}*/
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}*/
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bool CCodeSection::GenerateX86Code(uint32_t Test)
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bool CCodeSection::GenerateNativeCode(uint32_t Test)
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{
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{
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if (this == NULL) { return false; }
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if (this == NULL) { return false; }
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@ -1012,8 +1012,8 @@ bool CCodeSection::GenerateX86Code(uint32_t Test)
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return false;
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return false;
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}
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}
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m_Test = Test;
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m_Test = Test;
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if (m_ContinueSection->GenerateX86Code(Test)) { return true; }
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if (m_ContinueSection->GenerateNativeCode(Test)) { return true; }
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if (m_JumpSection->GenerateX86Code(Test)) { return true; }
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if (m_JumpSection->GenerateNativeCode(Test)) { return true; }
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return false;
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return false;
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}
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}
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@ -27,7 +27,7 @@ public:
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void SetJumpAddress(uint32_t JumpPC, uint32_t TargetPC, bool PermLoop);
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void SetJumpAddress(uint32_t JumpPC, uint32_t TargetPC, bool PermLoop);
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void SetContinueAddress(uint32_t JumpPC, uint32_t TargetPC);
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void SetContinueAddress(uint32_t JumpPC, uint32_t TargetPC);
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void CompileCop1Test();
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void CompileCop1Test();
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bool GenerateX86Code(uint32_t Test);
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bool GenerateNativeCode(uint32_t Test);
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void GenerateSectionLinkage();
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void GenerateSectionLinkage();
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void CompileExit(uint32_t JumpPC, uint32_t TargetPC, CRegInfo &ExitRegSet, CExitInfo::EXIT_REASON reason, bool CompileNow, void(*x86Jmp)(const char * Label, uint32_t Value));
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void CompileExit(uint32_t JumpPC, uint32_t TargetPC, CRegInfo &ExitRegSet, CExitInfo::EXIT_REASON reason, bool CompileNow, void(*x86Jmp)(const char * Label, uint32_t Value));
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void DetermineLoop(uint32_t Test, uint32_t Test2, uint32_t TestID);
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void DetermineLoop(uint32_t Test, uint32_t Test2, uint32_t TestID);
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@ -9,178 +9,7 @@
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* *
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* *
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****************************************************************************/
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****************************************************************************/
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#pragma once
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#pragma once
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#include <Project64-core/Settings/DebugSettings.h>
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#include <Project64-core/N64System/Mips/RegisterClass.h>
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#include <Project64-core/N64System/Recompiler/x86/x86ops.h>
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class CRegInfo :
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#include <Project64-core/N64System/Recompiler/x86/x86RegInfo.h>
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private CDebugSettings,
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private CX86Ops,
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private CSystemRegisters
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{
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public:
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//enums
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enum REG_STATE
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{
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STATE_UNKNOWN = 0x00,
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STATE_KNOWN_VALUE = 0x01,
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STATE_X86_MAPPED = 0x02,
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STATE_SIGN = 0x04,
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STATE_32BIT = 0x08,
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STATE_MODIFIED = 0x10,
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STATE_MAPPED_64 = (STATE_KNOWN_VALUE | STATE_X86_MAPPED), // = 3
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typedef CX86RegInfo CRegInfo;
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STATE_MAPPED_32_ZERO = (STATE_KNOWN_VALUE | STATE_X86_MAPPED | STATE_32BIT), // = 11
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STATE_MAPPED_32_SIGN = (STATE_KNOWN_VALUE | STATE_X86_MAPPED | STATE_32BIT | STATE_SIGN), // = 15
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STATE_CONST_32_ZERO = (STATE_KNOWN_VALUE | STATE_32BIT), // = 9
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STATE_CONST_32_SIGN = (STATE_KNOWN_VALUE | STATE_32BIT | STATE_SIGN), // = 13
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STATE_CONST_64 = (STATE_KNOWN_VALUE), // = 1
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};
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enum REG_MAPPED
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{
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NotMapped = 0,
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GPR_Mapped = 1,
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Temp_Mapped = 2,
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Stack_Mapped = 3,
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};
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enum FPU_STATE
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{
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FPU_Any = -1,
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FPU_Unknown = 0,
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FPU_Dword = 1,
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FPU_Qword = 2,
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FPU_Float = 3,
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FPU_Double = 4,
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};
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enum FPU_ROUND
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{
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RoundUnknown = -1,
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RoundDefault = 0,
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RoundTruncate = 1,
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RoundNearest = 2,
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RoundDown = 3,
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RoundUp = 4,
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};
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public:
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CRegInfo();
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CRegInfo(const CRegInfo&);
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~CRegInfo();
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CRegInfo& operator=(const CRegInfo&);
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bool operator==(const CRegInfo& right) const;
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bool operator!=(const CRegInfo& right) const;
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static REG_STATE ConstantsType(int64_t Value);
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void FixRoundModel(FPU_ROUND RoundMethod);
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void ChangeFPURegFormat(int32_t Reg, FPU_STATE OldFormat, FPU_STATE NewFormat, FPU_ROUND RoundingModel);
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void Load_FPR_ToTop(int32_t Reg, int32_t RegToLoad, FPU_STATE Format);
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bool RegInStack(int32_t Reg, FPU_STATE Format);
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void UnMap_AllFPRs();
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void UnMap_FPR(int32_t Reg, bool WriteBackValue);
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x86FpuValues StackPosition(int32_t Reg);
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x86Reg FreeX86Reg();
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x86Reg Free8BitX86Reg();
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void Map_GPR_32bit(int32_t MipsReg, bool SignValue, int32_t MipsRegToLoad);
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void Map_GPR_64bit(int32_t MipsReg, int32_t MipsRegToLoad);
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x86Reg Get_MemoryStack() const;
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x86Reg Map_MemoryStack(x86Reg Reg, bool bMapRegister, bool LoadValue = true);
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x86Reg Map_TempReg(x86Reg Reg, int32_t MipsReg, bool LoadHiWord);
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void ProtectGPR(uint32_t Reg);
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void UnProtectGPR(uint32_t Reg);
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void ResetX86Protection();
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x86Reg UnMap_TempReg();
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void UnMap_GPR(uint32_t Reg, bool WriteBackValue);
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bool UnMap_X86reg(x86Reg Reg);
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void WriteBackRegisters();
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bool IsKnown(int32_t Reg) const { return ((GetMipsRegState(Reg) & STATE_KNOWN_VALUE) != 0); }
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bool IsUnknown(int32_t Reg) const { return ((GetMipsRegState(Reg) & STATE_KNOWN_VALUE) == 0); }
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bool IsModified(int32_t Reg) const { return ((GetMipsRegState(Reg) & STATE_MODIFIED) != 0); }
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bool IsMapped(int32_t Reg) const { return ((GetMipsRegState(Reg) & (STATE_KNOWN_VALUE | STATE_X86_MAPPED)) == (STATE_KNOWN_VALUE | STATE_X86_MAPPED)); }
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bool IsConst(int32_t Reg) const { return ((GetMipsRegState(Reg) & (STATE_KNOWN_VALUE | STATE_X86_MAPPED)) == STATE_KNOWN_VALUE); }
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bool IsSigned(int32_t Reg) const { return ((GetMipsRegState(Reg) & (STATE_KNOWN_VALUE | STATE_SIGN)) == (STATE_KNOWN_VALUE | STATE_SIGN)); }
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bool IsUnsigned(int32_t Reg) const { return ((GetMipsRegState(Reg) & (STATE_KNOWN_VALUE | STATE_SIGN)) == STATE_KNOWN_VALUE); }
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bool Is32Bit(int32_t Reg) const { return ((GetMipsRegState(Reg) & (STATE_KNOWN_VALUE | STATE_32BIT)) == (STATE_KNOWN_VALUE | STATE_32BIT)); }
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bool Is64Bit(int32_t Reg) const { return ((GetMipsRegState(Reg) & (STATE_KNOWN_VALUE | STATE_32BIT)) == STATE_KNOWN_VALUE); }
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bool Is32BitMapped(int32_t Reg) const { return ((GetMipsRegState(Reg) & (STATE_KNOWN_VALUE | STATE_32BIT | STATE_X86_MAPPED)) == (STATE_KNOWN_VALUE | STATE_32BIT | STATE_X86_MAPPED)); }
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bool Is64BitMapped(int32_t Reg) const { return ((GetMipsRegState(Reg) & (STATE_KNOWN_VALUE | STATE_32BIT | STATE_X86_MAPPED)) == (STATE_KNOWN_VALUE | STATE_X86_MAPPED)); }
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REG_STATE GetMipsRegState(int32_t Reg) const { return m_MIPS_RegState[Reg]; }
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uint64_t GetMipsReg(int32_t Reg) const { return m_MIPS_RegVal[Reg].UDW; }
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int64_t GetMipsReg_S(int32_t Reg) const { return m_MIPS_RegVal[Reg].DW; }
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uint32_t GetMipsRegLo(int32_t Reg) const { return m_MIPS_RegVal[Reg].UW[0]; }
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int32_t GetMipsRegLo_S(int32_t Reg) const { return m_MIPS_RegVal[Reg].W[0]; }
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uint32_t GetMipsRegHi(int32_t Reg) const { return m_MIPS_RegVal[Reg].UW[1]; }
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int32_t GetMipsRegHi_S(int32_t Reg) const { return m_MIPS_RegVal[Reg].W[1]; }
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CX86Ops::x86Reg GetMipsRegMapLo(int32_t Reg) const { return m_RegMapLo[Reg]; }
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CX86Ops::x86Reg GetMipsRegMapHi(int32_t Reg) const { return m_RegMapHi[Reg]; }
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uint32_t GetX86MapOrder(x86Reg Reg) const { return m_x86reg_MapOrder[Reg]; }
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bool GetX86Protected(x86Reg Reg) const { return m_x86reg_Protected[Reg]; }
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REG_MAPPED GetX86Mapped(x86Reg Reg) const { return m_x86reg_MappedTo[Reg]; }
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uint32_t GetBlockCycleCount() const { return m_CycleCount; }
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void SetMipsReg(int32_t Reg, uint64_t Value) { m_MIPS_RegVal[Reg].UDW = Value; }
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void SetMipsReg_S(int32_t Reg, int64_t Value) { m_MIPS_RegVal[Reg].DW = Value; }
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void SetMipsRegLo(int32_t Reg, uint32_t Value) { m_MIPS_RegVal[Reg].UW[0] = Value; }
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void SetMipsRegHi(int32_t Reg, uint32_t Value) { m_MIPS_RegVal[Reg].UW[1] = Value; }
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void SetMipsRegMapLo(int32_t GetMipsReg, x86Reg Reg) { m_RegMapLo[GetMipsReg] = Reg; }
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void SetMipsRegMapHi(int32_t GetMipsReg, x86Reg Reg) { m_RegMapHi[GetMipsReg] = Reg; }
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void SetMipsRegState(int32_t GetMipsReg, REG_STATE State) { m_MIPS_RegState[GetMipsReg] = State; }
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void SetX86MapOrder(x86Reg Reg, uint32_t Order) { m_x86reg_MapOrder[Reg] = Order; }
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void SetX86Protected(x86Reg Reg, bool Protected) { m_x86reg_Protected[Reg] = Protected; }
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void SetX86Mapped(x86Reg Reg, REG_MAPPED Mapping) { m_x86reg_MappedTo[Reg] = Mapping; }
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void SetBlockCycleCount(uint32_t CyleCount) { m_CycleCount = CyleCount; }
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int32_t & StackTopPos() { return m_Stack_TopPos; }
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int32_t & FpuMappedTo(int32_t Reg) { return m_x86fpu_MappedTo[Reg]; }
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FPU_STATE & FpuState(int32_t Reg) { return m_x86fpu_State[Reg]; }
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FPU_ROUND & FpuRoundingModel(int32_t Reg) { return m_x86fpu_RoundingModel[Reg]; }
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bool & FpuBeenUsed() { return m_Fpu_Used; }
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FPU_ROUND GetRoundingModel() const { return m_RoundingModel; }
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void SetRoundingModel(FPU_ROUND RoundingModel) { m_RoundingModel = RoundingModel; }
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private:
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const char * RoundingModelName(FPU_ROUND RoundType);
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|
||||||
x86Reg UnMap_8BitTempReg();
|
|
||||||
|
|
||||||
//r4k
|
|
||||||
REG_STATE m_MIPS_RegState[32];
|
|
||||||
MIPS_DWORD m_MIPS_RegVal[32];
|
|
||||||
x86Reg m_RegMapHi[32];
|
|
||||||
x86Reg m_RegMapLo[32];
|
|
||||||
|
|
||||||
REG_MAPPED m_x86reg_MappedTo[10];
|
|
||||||
uint32_t m_x86reg_MapOrder[10];
|
|
||||||
bool m_x86reg_Protected[10];
|
|
||||||
|
|
||||||
uint32_t m_CycleCount;
|
|
||||||
|
|
||||||
//FPU
|
|
||||||
int32_t m_Stack_TopPos;
|
|
||||||
int32_t m_x86fpu_MappedTo[8];
|
|
||||||
FPU_STATE m_x86fpu_State[8];
|
|
||||||
bool m_x86fpu_StateChanged[8];
|
|
||||||
FPU_ROUND m_x86fpu_RoundingModel[8];
|
|
||||||
|
|
||||||
bool m_Fpu_Used;
|
|
||||||
FPU_ROUND m_RoundingModel;
|
|
||||||
|
|
||||||
static uint32_t m_fpuControl;
|
|
||||||
};
|
|
|
@ -206,8 +206,8 @@ protected:
|
||||||
/************************** Other functions **************************/
|
/************************** Other functions **************************/
|
||||||
static void UnknownOpcode ();
|
static void UnknownOpcode ();
|
||||||
|
|
||||||
static void BeforeCallDirect(CRegInfo & RegSet);
|
static void BeforeCallDirect(CRegInfo & RegSet);
|
||||||
static void AfterCallDirect(CRegInfo & RegSet);
|
static void AfterCallDirect(CRegInfo & RegSet);
|
||||||
static void EnterCodeBlock();
|
static void EnterCodeBlock();
|
||||||
static void ExitCodeBlock();
|
static void ExitCodeBlock();
|
||||||
static void CompileReadTLBMiss(uint32_t VirtualAddress, x86Reg LookUpReg);
|
static void CompileReadTLBMiss(uint32_t VirtualAddress, x86Reg LookUpReg);
|
||||||
|
@ -222,7 +222,7 @@ protected:
|
||||||
static STEP_TYPE m_NextInstruction;
|
static STEP_TYPE m_NextInstruction;
|
||||||
static uint32_t m_CompilePC;
|
static uint32_t m_CompilePC;
|
||||||
static OPCODE m_Opcode;
|
static OPCODE m_Opcode;
|
||||||
static CRegInfo m_RegWorkingSet;
|
static CX86RegInfo m_RegWorkingSet;
|
||||||
static uint32_t m_BranchCompare;
|
static uint32_t m_BranchCompare;
|
||||||
static CCodeSection * m_Section;
|
static CCodeSection * m_Section;
|
||||||
|
|
||||||
|
|
|
@ -12,22 +12,22 @@
|
||||||
#include <Project64-core/N64System/SystemGlobals.h>
|
#include <Project64-core/N64System/SystemGlobals.h>
|
||||||
#include <Project64-core/N64System/N64Class.h>
|
#include <Project64-core/N64System/N64Class.h>
|
||||||
#include <Project64-core/N64System/Recompiler/RecompilerClass.h>
|
#include <Project64-core/N64System/Recompiler/RecompilerClass.h>
|
||||||
#include <Project64-core/N64System/Recompiler/RegInfo.h>
|
#include <Project64-core/N64System/Recompiler/RecompilerCodeLog.h>
|
||||||
|
#include <Project64-core/N64System/Recompiler/x86/x86RegInfo.h>
|
||||||
|
|
||||||
#include <stdio.h>
|
#include <stdio.h>
|
||||||
#include <string.h>
|
#include <string.h>
|
||||||
#include <float.h>
|
#include <float.h>
|
||||||
#include "RecompilerCodeLog.h"
|
|
||||||
|
|
||||||
uint32_t CRegInfo::m_fpuControl = 0;
|
uint32_t CX86RegInfo::m_fpuControl = 0;
|
||||||
|
|
||||||
const char *Format_Name[] = { "Unknown", "dword", "qword", "float", "double" };
|
const char *Format_Name[] = { "Unknown", "dword", "qword", "float", "double" };
|
||||||
|
|
||||||
CRegInfo::CRegInfo() :
|
CX86RegInfo::CX86RegInfo() :
|
||||||
m_CycleCount(0),
|
m_CycleCount(0),
|
||||||
m_Stack_TopPos(0),
|
m_Stack_TopPos(0),
|
||||||
m_Fpu_Used(false),
|
m_Fpu_Used(false),
|
||||||
m_RoundingModel(RoundUnknown)
|
m_RoundingModel(RoundUnknown)
|
||||||
{
|
{
|
||||||
m_MIPS_RegState[0] = STATE_CONST_32_SIGN;
|
m_MIPS_RegState[0] = STATE_CONST_32_SIGN;
|
||||||
m_MIPS_RegVal[0].DW = 0;
|
m_MIPS_RegVal[0].DW = 0;
|
||||||
|
@ -56,16 +56,16 @@ m_RoundingModel(RoundUnknown)
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
CRegInfo::CRegInfo(const CRegInfo& rhs)
|
CX86RegInfo::CX86RegInfo(const CX86RegInfo& rhs)
|
||||||
{
|
{
|
||||||
*this = rhs;
|
*this = rhs;
|
||||||
}
|
}
|
||||||
|
|
||||||
CRegInfo::~CRegInfo()
|
CX86RegInfo::~CX86RegInfo()
|
||||||
{
|
{
|
||||||
}
|
}
|
||||||
|
|
||||||
CRegInfo& CRegInfo::operator=(const CRegInfo& right)
|
CX86RegInfo& CX86RegInfo::operator=(const CX86RegInfo& right)
|
||||||
{
|
{
|
||||||
m_CycleCount = right.m_CycleCount;
|
m_CycleCount = right.m_CycleCount;
|
||||||
m_Stack_TopPos = right.m_Stack_TopPos;
|
m_Stack_TopPos = right.m_Stack_TopPos;
|
||||||
|
@ -94,7 +94,7 @@ CRegInfo& CRegInfo::operator=(const CRegInfo& right)
|
||||||
return *this;
|
return *this;
|
||||||
}
|
}
|
||||||
|
|
||||||
bool CRegInfo::operator==(const CRegInfo& right) const
|
bool CX86RegInfo::operator==(const CX86RegInfo& right) const
|
||||||
{
|
{
|
||||||
int32_t count;
|
int32_t count;
|
||||||
|
|
||||||
|
@ -133,19 +133,19 @@ bool CRegInfo::operator==(const CRegInfo& right) const
|
||||||
return true;
|
return true;
|
||||||
}
|
}
|
||||||
|
|
||||||
bool CRegInfo::operator!=(const CRegInfo& right) const
|
bool CX86RegInfo::operator!=(const CX86RegInfo& right) const
|
||||||
{
|
{
|
||||||
return !(right == *this);
|
return !(right == *this);
|
||||||
}
|
}
|
||||||
|
|
||||||
CRegInfo::REG_STATE CRegInfo::ConstantsType(int64_t Value)
|
CX86RegInfo::REG_STATE CX86RegInfo::ConstantsType(int64_t Value)
|
||||||
{
|
{
|
||||||
if (((Value >> 32) == -1) && ((Value & 0x80000000) != 0)) { return STATE_CONST_32_SIGN; }
|
if (((Value >> 32) == -1) && ((Value & 0x80000000) != 0)) { return STATE_CONST_32_SIGN; }
|
||||||
if (((Value >> 32) == 0) && ((Value & 0x80000000) == 0)) { return STATE_CONST_32_SIGN; }
|
if (((Value >> 32) == 0) && ((Value & 0x80000000) == 0)) { return STATE_CONST_32_SIGN; }
|
||||||
return STATE_CONST_64;
|
return STATE_CONST_64;
|
||||||
}
|
}
|
||||||
|
|
||||||
void CRegInfo::FixRoundModel(FPU_ROUND RoundMethod)
|
void CX86RegInfo::FixRoundModel(FPU_ROUND RoundMethod)
|
||||||
{
|
{
|
||||||
if (GetRoundingModel() == RoundMethod)
|
if (GetRoundingModel() == RoundMethod)
|
||||||
{
|
{
|
||||||
|
@ -161,13 +161,13 @@ void CRegInfo::FixRoundModel(FPU_ROUND RoundMethod)
|
||||||
|
|
||||||
if (RoundMethod == RoundDefault)
|
if (RoundMethod == RoundDefault)
|
||||||
{
|
{
|
||||||
static const unsigned int msRound[4] =
|
static const unsigned int msRound[4] =
|
||||||
{
|
{
|
||||||
0x00000000, //_RC_NEAR
|
0x00000000, //_RC_NEAR
|
||||||
0x00000300, //_RC_CHOP
|
0x00000300, //_RC_CHOP
|
||||||
0x00000200, //_RC_UP
|
0x00000200, //_RC_UP
|
||||||
0x00000100, //_RC_DOWN
|
0x00000100, //_RC_DOWN
|
||||||
};
|
};
|
||||||
|
|
||||||
x86Reg RoundReg = Map_TempReg(x86_Any, -1, false);
|
x86Reg RoundReg = Map_TempReg(x86_Any, -1, false);
|
||||||
MoveVariableToX86reg(&g_Reg->m_RoundingModel, "m_RoundingModel", RoundReg);
|
MoveVariableToX86reg(&g_Reg->m_RoundingModel, "m_RoundingModel", RoundReg);
|
||||||
|
@ -195,7 +195,7 @@ void CRegInfo::FixRoundModel(FPU_ROUND RoundMethod)
|
||||||
SetRoundingModel(RoundMethod);
|
SetRoundingModel(RoundMethod);
|
||||||
}
|
}
|
||||||
|
|
||||||
void CRegInfo::ChangeFPURegFormat(int32_t Reg, FPU_STATE OldFormat, FPU_STATE NewFormat, FPU_ROUND RoundingModel)
|
void CX86RegInfo::ChangeFPURegFormat(int32_t Reg, FPU_STATE OldFormat, FPU_STATE NewFormat, FPU_ROUND RoundingModel)
|
||||||
{
|
{
|
||||||
for (uint32_t i = 0; i < 8; i++)
|
for (uint32_t i = 0; i < 8; i++)
|
||||||
{
|
{
|
||||||
|
@ -224,7 +224,7 @@ void CRegInfo::ChangeFPURegFormat(int32_t Reg, FPU_STATE OldFormat, FPU_STATE Ne
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
void CRegInfo::Load_FPR_ToTop(int32_t Reg, int32_t RegToLoad, FPU_STATE Format)
|
void CX86RegInfo::Load_FPR_ToTop(int32_t Reg, int32_t RegToLoad, FPU_STATE Format)
|
||||||
{
|
{
|
||||||
if (GetRoundingModel() != RoundDefault)
|
if (GetRoundingModel() != RoundDefault)
|
||||||
{
|
{
|
||||||
|
@ -405,7 +405,7 @@ void CRegInfo::Load_FPR_ToTop(int32_t Reg, int32_t RegToLoad, FPU_STATE Format)
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
CRegInfo::x86FpuValues CRegInfo::StackPosition(int32_t Reg)
|
CX86RegInfo::x86FpuValues CX86RegInfo::StackPosition(int32_t Reg)
|
||||||
{
|
{
|
||||||
int32_t i;
|
int32_t i;
|
||||||
|
|
||||||
|
@ -419,7 +419,7 @@ CRegInfo::x86FpuValues CRegInfo::StackPosition(int32_t Reg)
|
||||||
return x86_ST_Unknown;
|
return x86_ST_Unknown;
|
||||||
}
|
}
|
||||||
|
|
||||||
CX86Ops::x86Reg CRegInfo::FreeX86Reg()
|
CX86Ops::x86Reg CX86RegInfo::FreeX86Reg()
|
||||||
{
|
{
|
||||||
if (GetX86Mapped(x86_EDI) == NotMapped && !GetX86Protected(x86_EDI)) { return x86_EDI; }
|
if (GetX86Mapped(x86_EDI) == NotMapped && !GetX86Protected(x86_EDI)) { return x86_EDI; }
|
||||||
if (GetX86Mapped(x86_ESI) == NotMapped && !GetX86Protected(x86_ESI)) { return x86_ESI; }
|
if (GetX86Mapped(x86_ESI) == NotMapped && !GetX86Protected(x86_ESI)) { return x86_ESI; }
|
||||||
|
@ -481,7 +481,7 @@ CX86Ops::x86Reg CRegInfo::FreeX86Reg()
|
||||||
return x86_Unknown;
|
return x86_Unknown;
|
||||||
}
|
}
|
||||||
|
|
||||||
CX86Ops::x86Reg CRegInfo::Free8BitX86Reg()
|
CX86Ops::x86Reg CX86RegInfo::Free8BitX86Reg()
|
||||||
{
|
{
|
||||||
if (GetX86Mapped(x86_EBX) == NotMapped && !GetX86Protected(x86_EBX)) { return x86_EBX; }
|
if (GetX86Mapped(x86_EBX) == NotMapped && !GetX86Protected(x86_EBX)) { return x86_EBX; }
|
||||||
if (GetX86Mapped(x86_EAX) == NotMapped && !GetX86Protected(x86_EAX)) { return x86_EAX; }
|
if (GetX86Mapped(x86_EAX) == NotMapped && !GetX86Protected(x86_EAX)) { return x86_EAX; }
|
||||||
|
@ -530,7 +530,7 @@ CX86Ops::x86Reg CRegInfo::Free8BitX86Reg()
|
||||||
return x86_Unknown;
|
return x86_Unknown;
|
||||||
}
|
}
|
||||||
|
|
||||||
CX86Ops::x86Reg CRegInfo::UnMap_8BitTempReg()
|
CX86Ops::x86Reg CX86RegInfo::UnMap_8BitTempReg()
|
||||||
{
|
{
|
||||||
int32_t count;
|
int32_t count;
|
||||||
|
|
||||||
|
@ -542,7 +542,7 @@ CX86Ops::x86Reg CRegInfo::UnMap_8BitTempReg()
|
||||||
if (GetX86Protected((x86Reg)count) == false)
|
if (GetX86Protected((x86Reg)count) == false)
|
||||||
{
|
{
|
||||||
CPU_Message(" regcache: unallocate %s from temp storage", x86_Name((x86Reg)count));
|
CPU_Message(" regcache: unallocate %s from temp storage", x86_Name((x86Reg)count));
|
||||||
SetX86Mapped((x86Reg)count, CRegInfo::NotMapped);
|
SetX86Mapped((x86Reg)count, CX86RegInfo::NotMapped);
|
||||||
return (x86Reg)count;
|
return (x86Reg)count;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
@ -550,7 +550,7 @@ CX86Ops::x86Reg CRegInfo::UnMap_8BitTempReg()
|
||||||
return x86_Unknown;
|
return x86_Unknown;
|
||||||
}
|
}
|
||||||
|
|
||||||
CRegInfo::x86Reg CRegInfo::Get_MemoryStack() const
|
CX86RegInfo::x86Reg CX86RegInfo::Get_MemoryStack() const
|
||||||
{
|
{
|
||||||
for (int32_t i = 0, n = sizeof(x86_Registers) / sizeof(x86_Registers[0]); i < n; i++)
|
for (int32_t i = 0, n = sizeof(x86_Registers) / sizeof(x86_Registers[0]); i < n; i++)
|
||||||
{
|
{
|
||||||
|
@ -562,7 +562,7 @@ CRegInfo::x86Reg CRegInfo::Get_MemoryStack() const
|
||||||
return x86_Unknown;
|
return x86_Unknown;
|
||||||
}
|
}
|
||||||
|
|
||||||
CRegInfo::x86Reg CRegInfo::Map_MemoryStack(x86Reg Reg, bool bMapRegister, bool LoadValue)
|
CX86RegInfo::x86Reg CX86RegInfo::Map_MemoryStack(x86Reg Reg, bool bMapRegister, bool LoadValue)
|
||||||
{
|
{
|
||||||
x86Reg CurrentMap = Get_MemoryStack();
|
x86Reg CurrentMap = Get_MemoryStack();
|
||||||
if (!bMapRegister)
|
if (!bMapRegister)
|
||||||
|
@ -589,7 +589,7 @@ CRegInfo::x86Reg CRegInfo::Map_MemoryStack(x86Reg Reg, bool bMapRegister, bool L
|
||||||
g_Notify->DisplayError("Map_MemoryStack\n\nOut of registers");
|
g_Notify->DisplayError("Map_MemoryStack\n\nOut of registers");
|
||||||
g_Notify->BreakPoint(__FILE__, __LINE__);
|
g_Notify->BreakPoint(__FILE__, __LINE__);
|
||||||
}
|
}
|
||||||
SetX86Mapped(Reg, CRegInfo::Stack_Mapped);
|
SetX86Mapped(Reg, CX86RegInfo::Stack_Mapped);
|
||||||
CPU_Message(" regcache: allocate %s as Memory Stack", x86_Name(Reg));
|
CPU_Message(" regcache: allocate %s as Memory Stack", x86_Name(Reg));
|
||||||
if (LoadValue)
|
if (LoadValue)
|
||||||
{
|
{
|
||||||
|
@ -603,13 +603,13 @@ CRegInfo::x86Reg CRegInfo::Map_MemoryStack(x86Reg Reg, bool bMapRegister, bool L
|
||||||
if (CurrentMap != x86_Unknown)
|
if (CurrentMap != x86_Unknown)
|
||||||
{
|
{
|
||||||
CPU_Message(" regcache: change allocation of Memory Stack from %s to %s", x86_Name(CurrentMap), x86_Name(Reg));
|
CPU_Message(" regcache: change allocation of Memory Stack from %s to %s", x86_Name(CurrentMap), x86_Name(Reg));
|
||||||
SetX86Mapped(Reg, CRegInfo::Stack_Mapped);
|
SetX86Mapped(Reg, CX86RegInfo::Stack_Mapped);
|
||||||
SetX86Mapped(CurrentMap, CRegInfo::NotMapped);
|
SetX86Mapped(CurrentMap, CX86RegInfo::NotMapped);
|
||||||
MoveX86RegToX86Reg(CurrentMap, Reg);
|
MoveX86RegToX86Reg(CurrentMap, Reg);
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
SetX86Mapped(Reg, CRegInfo::Stack_Mapped);
|
SetX86Mapped(Reg, CX86RegInfo::Stack_Mapped);
|
||||||
CPU_Message(" regcache: allocate %s as Memory Stack", x86_Name(Reg));
|
CPU_Message(" regcache: allocate %s as Memory Stack", x86_Name(Reg));
|
||||||
if (LoadValue)
|
if (LoadValue)
|
||||||
{
|
{
|
||||||
|
@ -619,7 +619,7 @@ CRegInfo::x86Reg CRegInfo::Map_MemoryStack(x86Reg Reg, bool bMapRegister, bool L
|
||||||
return Reg;
|
return Reg;
|
||||||
}
|
}
|
||||||
|
|
||||||
void CRegInfo::Map_GPR_32bit(int32_t MipsReg, bool SignValue, int32_t MipsRegToLoad)
|
void CX86RegInfo::Map_GPR_32bit(int32_t MipsReg, bool SignValue, int32_t MipsRegToLoad)
|
||||||
{
|
{
|
||||||
int32_t count;
|
int32_t count;
|
||||||
|
|
||||||
|
@ -691,7 +691,7 @@ void CRegInfo::Map_GPR_32bit(int32_t MipsReg, bool SignValue, int32_t MipsRegToL
|
||||||
SetMipsRegState(MipsReg, SignValue ? STATE_MAPPED_32_SIGN : STATE_MAPPED_32_ZERO);
|
SetMipsRegState(MipsReg, SignValue ? STATE_MAPPED_32_SIGN : STATE_MAPPED_32_ZERO);
|
||||||
}
|
}
|
||||||
|
|
||||||
void CRegInfo::Map_GPR_64bit(int32_t MipsReg, int32_t MipsRegToLoad)
|
void CX86RegInfo::Map_GPR_64bit(int32_t MipsReg, int32_t MipsRegToLoad)
|
||||||
{
|
{
|
||||||
x86Reg x86Hi, x86lo;
|
x86Reg x86Hi, x86lo;
|
||||||
int32_t count;
|
int32_t count;
|
||||||
|
@ -820,7 +820,7 @@ void CRegInfo::Map_GPR_64bit(int32_t MipsReg, int32_t MipsRegToLoad)
|
||||||
SetMipsRegState(MipsReg, STATE_MAPPED_64);
|
SetMipsRegState(MipsReg, STATE_MAPPED_64);
|
||||||
}
|
}
|
||||||
|
|
||||||
CX86Ops::x86Reg CRegInfo::Map_TempReg(CX86Ops::x86Reg Reg, int32_t MipsReg, bool LoadHiWord)
|
CX86Ops::x86Reg CX86RegInfo::Map_TempReg(CX86Ops::x86Reg Reg, int32_t MipsReg, bool LoadHiWord)
|
||||||
{
|
{
|
||||||
int32_t count;
|
int32_t count;
|
||||||
|
|
||||||
|
@ -991,7 +991,7 @@ CX86Ops::x86Reg CRegInfo::Map_TempReg(CX86Ops::x86Reg Reg, int32_t MipsReg, bool
|
||||||
return Reg;
|
return Reg;
|
||||||
}
|
}
|
||||||
|
|
||||||
void CRegInfo::ProtectGPR(uint32_t Reg)
|
void CX86RegInfo::ProtectGPR(uint32_t Reg)
|
||||||
{
|
{
|
||||||
if (IsUnknown(Reg) || IsConst(Reg))
|
if (IsUnknown(Reg) || IsConst(Reg))
|
||||||
{
|
{
|
||||||
|
@ -1004,7 +1004,7 @@ void CRegInfo::ProtectGPR(uint32_t Reg)
|
||||||
SetX86Protected(GetMipsRegMapLo(Reg), true);
|
SetX86Protected(GetMipsRegMapLo(Reg), true);
|
||||||
}
|
}
|
||||||
|
|
||||||
void CRegInfo::UnProtectGPR(uint32_t Reg)
|
void CX86RegInfo::UnProtectGPR(uint32_t Reg)
|
||||||
{
|
{
|
||||||
if (IsUnknown(Reg) || IsConst(Reg))
|
if (IsUnknown(Reg) || IsConst(Reg))
|
||||||
{
|
{
|
||||||
|
@ -1017,7 +1017,7 @@ void CRegInfo::UnProtectGPR(uint32_t Reg)
|
||||||
SetX86Protected(GetMipsRegMapLo(Reg), false);
|
SetX86Protected(GetMipsRegMapLo(Reg), false);
|
||||||
}
|
}
|
||||||
|
|
||||||
void CRegInfo::ResetX86Protection()
|
void CX86RegInfo::ResetX86Protection()
|
||||||
{
|
{
|
||||||
for (int32_t count = 0; count < 10; count++)
|
for (int32_t count = 0; count < 10; count++)
|
||||||
{
|
{
|
||||||
|
@ -1025,7 +1025,7 @@ void CRegInfo::ResetX86Protection()
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
bool CRegInfo::RegInStack(int32_t Reg, FPU_STATE Format)
|
bool CX86RegInfo::RegInStack(int32_t Reg, FPU_STATE Format)
|
||||||
{
|
{
|
||||||
for (int32_t i = 0; i < 8; i++)
|
for (int32_t i = 0; i < 8; i++)
|
||||||
{
|
{
|
||||||
|
@ -1041,7 +1041,7 @@ bool CRegInfo::RegInStack(int32_t Reg, FPU_STATE Format)
|
||||||
return false;
|
return false;
|
||||||
}
|
}
|
||||||
|
|
||||||
void CRegInfo::UnMap_AllFPRs()
|
void CX86RegInfo::UnMap_AllFPRs()
|
||||||
{
|
{
|
||||||
for (;;)
|
for (;;)
|
||||||
{
|
{
|
||||||
|
@ -1062,7 +1062,7 @@ void CRegInfo::UnMap_AllFPRs()
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
void CRegInfo::UnMap_FPR(int32_t Reg, bool WriteBackValue)
|
void CX86RegInfo::UnMap_FPR(int32_t Reg, bool WriteBackValue)
|
||||||
{
|
{
|
||||||
char Name[50];
|
char Name[50];
|
||||||
int32_t i;
|
int32_t i;
|
||||||
|
@ -1084,7 +1084,7 @@ void CRegInfo::UnMap_FPR(int32_t Reg, bool WriteBackValue)
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
CRegInfo::FPU_ROUND RoundingModel = FpuRoundingModel(StackTopPos());
|
CX86RegInfo::FPU_ROUND RoundingModel = FpuRoundingModel(StackTopPos());
|
||||||
FPU_STATE RegState = m_x86fpu_State[StackTopPos()];
|
FPU_STATE RegState = m_x86fpu_State[StackTopPos()];
|
||||||
bool Changed = m_x86fpu_StateChanged[StackTopPos()];
|
bool Changed = m_x86fpu_StateChanged[StackTopPos()];
|
||||||
uint32_t MappedTo = m_x86fpu_MappedTo[StackTopPos()];
|
uint32_t MappedTo = m_x86fpu_MappedTo[StackTopPos()];
|
||||||
|
@ -1150,7 +1150,7 @@ void CRegInfo::UnMap_FPR(int32_t Reg, bool WriteBackValue)
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
void CRegInfo::UnMap_GPR(uint32_t Reg, bool WriteBackValue)
|
void CX86RegInfo::UnMap_GPR(uint32_t Reg, bool WriteBackValue)
|
||||||
{
|
{
|
||||||
if (Reg == 0)
|
if (Reg == 0)
|
||||||
{
|
{
|
||||||
|
@ -1229,7 +1229,7 @@ void CRegInfo::UnMap_GPR(uint32_t Reg, bool WriteBackValue)
|
||||||
SetMipsRegState(Reg, STATE_UNKNOWN);
|
SetMipsRegState(Reg, STATE_UNKNOWN);
|
||||||
}
|
}
|
||||||
|
|
||||||
CX86Ops::x86Reg CRegInfo::UnMap_TempReg()
|
CX86Ops::x86Reg CX86RegInfo::UnMap_TempReg()
|
||||||
{
|
{
|
||||||
CX86Ops::x86Reg Reg = x86_Unknown;
|
CX86Ops::x86Reg Reg = x86_Unknown;
|
||||||
|
|
||||||
|
@ -1253,7 +1253,7 @@ CX86Ops::x86Reg CRegInfo::UnMap_TempReg()
|
||||||
return Reg;
|
return Reg;
|
||||||
}
|
}
|
||||||
|
|
||||||
bool CRegInfo::UnMap_X86reg(CX86Ops::x86Reg Reg)
|
bool CX86RegInfo::UnMap_X86reg(CX86Ops::x86Reg Reg)
|
||||||
{
|
{
|
||||||
int32_t count;
|
int32_t count;
|
||||||
|
|
||||||
|
@ -1264,7 +1264,7 @@ bool CRegInfo::UnMap_X86reg(CX86Ops::x86Reg Reg)
|
||||||
return true;
|
return true;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
else if (GetX86Mapped(Reg) == CRegInfo::GPR_Mapped)
|
else if (GetX86Mapped(Reg) == CX86RegInfo::GPR_Mapped)
|
||||||
{
|
{
|
||||||
for (count = 1; count < 32; count++)
|
for (count = 1; count < 32; count++)
|
||||||
{
|
{
|
||||||
|
@ -1293,7 +1293,7 @@ bool CRegInfo::UnMap_X86reg(CX86Ops::x86Reg Reg)
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
else if (GetX86Mapped(Reg) == CRegInfo::Temp_Mapped)
|
else if (GetX86Mapped(Reg) == CX86RegInfo::Temp_Mapped)
|
||||||
{
|
{
|
||||||
if (!GetX86Protected(Reg))
|
if (!GetX86Protected(Reg))
|
||||||
{
|
{
|
||||||
|
@ -1302,7 +1302,7 @@ bool CRegInfo::UnMap_X86reg(CX86Ops::x86Reg Reg)
|
||||||
return true;
|
return true;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
else if (GetX86Mapped(Reg) == CRegInfo::Stack_Mapped)
|
else if (GetX86Mapped(Reg) == CX86RegInfo::Stack_Mapped)
|
||||||
{
|
{
|
||||||
CPU_Message(" regcache: unallocate %s from Memory Stack", x86_Name(Reg));
|
CPU_Message(" regcache: unallocate %s from Memory Stack", x86_Name(Reg));
|
||||||
MoveX86regToVariable(Reg, &(g_Recompiler->MemoryStackPos()), "MemoryStack");
|
MoveX86regToVariable(Reg, &(g_Recompiler->MemoryStackPos()), "MemoryStack");
|
||||||
|
@ -1313,7 +1313,7 @@ bool CRegInfo::UnMap_X86reg(CX86Ops::x86Reg Reg)
|
||||||
return false;
|
return false;
|
||||||
}
|
}
|
||||||
|
|
||||||
void CRegInfo::WriteBackRegisters()
|
void CX86RegInfo::WriteBackRegisters()
|
||||||
{
|
{
|
||||||
UnMap_AllFPRs();
|
UnMap_AllFPRs();
|
||||||
|
|
||||||
|
@ -1331,8 +1331,8 @@ void CRegInfo::WriteBackRegisters()
|
||||||
{
|
{
|
||||||
switch (GetMipsRegState(count))
|
switch (GetMipsRegState(count))
|
||||||
{
|
{
|
||||||
case CRegInfo::STATE_UNKNOWN: break;
|
case CX86RegInfo::STATE_UNKNOWN: break;
|
||||||
case CRegInfo::STATE_CONST_32_SIGN:
|
case CX86RegInfo::STATE_CONST_32_SIGN:
|
||||||
if (!g_System->b32BitCore())
|
if (!g_System->b32BitCore())
|
||||||
{
|
{
|
||||||
if (!bEdiZero && (!GetMipsRegLo(count) || !(GetMipsRegLo(count) & 0x80000000)))
|
if (!bEdiZero && (!GetMipsRegLo(count) || !(GetMipsRegLo(count) & 0x80000000)))
|
||||||
|
@ -1384,9 +1384,9 @@ void CRegInfo::WriteBackRegisters()
|
||||||
MoveConstToVariable(GetMipsRegLo(count), &_GPR[count].UW[0], CRegName::GPR_Lo[count]);
|
MoveConstToVariable(GetMipsRegLo(count), &_GPR[count].UW[0], CRegName::GPR_Lo[count]);
|
||||||
}
|
}
|
||||||
|
|
||||||
SetMipsRegState(count, CRegInfo::STATE_UNKNOWN);
|
SetMipsRegState(count, CX86RegInfo::STATE_UNKNOWN);
|
||||||
break;
|
break;
|
||||||
case CRegInfo::STATE_CONST_32_ZERO:
|
case CX86RegInfo::STATE_CONST_32_ZERO:
|
||||||
if (!g_System->b32BitCore())
|
if (!g_System->b32BitCore())
|
||||||
{
|
{
|
||||||
if (!bEdiZero)
|
if (!bEdiZero)
|
||||||
|
@ -1413,9 +1413,9 @@ void CRegInfo::WriteBackRegisters()
|
||||||
{
|
{
|
||||||
MoveConstToVariable(GetMipsRegLo(count), &_GPR[count].UW[0], CRegName::GPR_Lo[count]);
|
MoveConstToVariable(GetMipsRegLo(count), &_GPR[count].UW[0], CRegName::GPR_Lo[count]);
|
||||||
}
|
}
|
||||||
SetMipsRegState(count, CRegInfo::STATE_UNKNOWN);
|
SetMipsRegState(count, CX86RegInfo::STATE_UNKNOWN);
|
||||||
break;
|
break;
|
||||||
case CRegInfo::STATE_CONST_64:
|
case CX86RegInfo::STATE_CONST_64:
|
||||||
if (GetMipsRegLo(count) == 0 || GetMipsRegHi(count) == 0)
|
if (GetMipsRegLo(count) == 0 || GetMipsRegHi(count) == 0)
|
||||||
{
|
{
|
||||||
XorX86RegToX86Reg(x86_EDI, x86_EDI);
|
XorX86RegToX86Reg(x86_EDI, x86_EDI);
|
||||||
|
@ -1452,7 +1452,7 @@ void CRegInfo::WriteBackRegisters()
|
||||||
{
|
{
|
||||||
MoveConstToVariable(GetMipsRegLo(count), &_GPR[count].UW[0], CRegName::GPR_Lo[count]);
|
MoveConstToVariable(GetMipsRegLo(count), &_GPR[count].UW[0], CRegName::GPR_Lo[count]);
|
||||||
}
|
}
|
||||||
SetMipsRegState(count, CRegInfo::STATE_UNKNOWN);
|
SetMipsRegState(count, CX86RegInfo::STATE_UNKNOWN);
|
||||||
break;
|
break;
|
||||||
default:
|
default:
|
||||||
CPU_Message("%s: Unknown State: %d reg %d (%s)", __FUNCTION__, GetMipsRegState(count), count, CRegName::GPR[count]);
|
CPU_Message("%s: Unknown State: %d reg %d (%s)", __FUNCTION__, GetMipsRegState(count), count, CRegName::GPR[count]);
|
||||||
|
@ -1461,7 +1461,7 @@ void CRegInfo::WriteBackRegisters()
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
const char * CRegInfo::RoundingModelName(FPU_ROUND RoundType)
|
const char * CX86RegInfo::RoundingModelName(FPU_ROUND RoundType)
|
||||||
{
|
{
|
||||||
switch (RoundType)
|
switch (RoundType)
|
||||||
{
|
{
|
|
@ -0,0 +1,186 @@
|
||||||
|
/****************************************************************************
|
||||||
|
* *
|
||||||
|
* Project64 - A Nintendo 64 emulator. *
|
||||||
|
* http://www.pj64-emu.com/ *
|
||||||
|
* Copyright (C) 2012 Project64. All rights reserved. *
|
||||||
|
* *
|
||||||
|
* License: *
|
||||||
|
* GNU/GPLv2 http://www.gnu.org/licenses/gpl-2.0.html *
|
||||||
|
* *
|
||||||
|
****************************************************************************/
|
||||||
|
#pragma once
|
||||||
|
#include <Project64-core/Settings/DebugSettings.h>
|
||||||
|
#include <Project64-core/N64System/Mips/RegisterClass.h>
|
||||||
|
#include <Project64-core/N64System/Recompiler/x86/x86ops.h>
|
||||||
|
|
||||||
|
class CX86RegInfo :
|
||||||
|
private CDebugSettings,
|
||||||
|
private CX86Ops,
|
||||||
|
private CSystemRegisters
|
||||||
|
{
|
||||||
|
public:
|
||||||
|
//enums
|
||||||
|
enum REG_STATE
|
||||||
|
{
|
||||||
|
STATE_UNKNOWN = 0x00,
|
||||||
|
STATE_KNOWN_VALUE = 0x01,
|
||||||
|
STATE_X86_MAPPED = 0x02,
|
||||||
|
STATE_SIGN = 0x04,
|
||||||
|
STATE_32BIT = 0x08,
|
||||||
|
STATE_MODIFIED = 0x10,
|
||||||
|
|
||||||
|
STATE_MAPPED_64 = (STATE_KNOWN_VALUE | STATE_X86_MAPPED), // = 3
|
||||||
|
STATE_MAPPED_32_ZERO = (STATE_KNOWN_VALUE | STATE_X86_MAPPED | STATE_32BIT), // = 11
|
||||||
|
STATE_MAPPED_32_SIGN = (STATE_KNOWN_VALUE | STATE_X86_MAPPED | STATE_32BIT | STATE_SIGN), // = 15
|
||||||
|
|
||||||
|
STATE_CONST_32_ZERO = (STATE_KNOWN_VALUE | STATE_32BIT), // = 9
|
||||||
|
STATE_CONST_32_SIGN = (STATE_KNOWN_VALUE | STATE_32BIT | STATE_SIGN), // = 13
|
||||||
|
STATE_CONST_64 = (STATE_KNOWN_VALUE), // = 1
|
||||||
|
};
|
||||||
|
|
||||||
|
enum REG_MAPPED
|
||||||
|
{
|
||||||
|
NotMapped = 0,
|
||||||
|
GPR_Mapped = 1,
|
||||||
|
Temp_Mapped = 2,
|
||||||
|
Stack_Mapped = 3,
|
||||||
|
};
|
||||||
|
|
||||||
|
enum FPU_STATE
|
||||||
|
{
|
||||||
|
FPU_Any = -1,
|
||||||
|
FPU_Unknown = 0,
|
||||||
|
FPU_Dword = 1,
|
||||||
|
FPU_Qword = 2,
|
||||||
|
FPU_Float = 3,
|
||||||
|
FPU_Double = 4,
|
||||||
|
};
|
||||||
|
|
||||||
|
enum FPU_ROUND
|
||||||
|
{
|
||||||
|
RoundUnknown = -1,
|
||||||
|
RoundDefault = 0,
|
||||||
|
RoundTruncate = 1,
|
||||||
|
RoundNearest = 2,
|
||||||
|
RoundDown = 3,
|
||||||
|
RoundUp = 4,
|
||||||
|
};
|
||||||
|
|
||||||
|
public:
|
||||||
|
CX86RegInfo();
|
||||||
|
CX86RegInfo(const CX86RegInfo&);
|
||||||
|
~CX86RegInfo();
|
||||||
|
|
||||||
|
CX86RegInfo& operator=(const CX86RegInfo&);
|
||||||
|
|
||||||
|
bool operator==(const CX86RegInfo& right) const;
|
||||||
|
bool operator!=(const CX86RegInfo& right) const;
|
||||||
|
|
||||||
|
static REG_STATE ConstantsType(int64_t Value);
|
||||||
|
|
||||||
|
void FixRoundModel(FPU_ROUND RoundMethod);
|
||||||
|
void ChangeFPURegFormat(int32_t Reg, FPU_STATE OldFormat, FPU_STATE NewFormat, FPU_ROUND RoundingModel);
|
||||||
|
void Load_FPR_ToTop(int32_t Reg, int32_t RegToLoad, FPU_STATE Format);
|
||||||
|
bool RegInStack(int32_t Reg, FPU_STATE Format);
|
||||||
|
void UnMap_AllFPRs();
|
||||||
|
void UnMap_FPR(int32_t Reg, bool WriteBackValue);
|
||||||
|
x86FpuValues StackPosition(int32_t Reg);
|
||||||
|
|
||||||
|
x86Reg FreeX86Reg();
|
||||||
|
x86Reg Free8BitX86Reg();
|
||||||
|
void Map_GPR_32bit(int32_t MipsReg, bool SignValue, int32_t MipsRegToLoad);
|
||||||
|
void Map_GPR_64bit(int32_t MipsReg, int32_t MipsRegToLoad);
|
||||||
|
x86Reg Get_MemoryStack() const;
|
||||||
|
x86Reg Map_MemoryStack(x86Reg Reg, bool bMapRegister, bool LoadValue = true);
|
||||||
|
x86Reg Map_TempReg(x86Reg Reg, int32_t MipsReg, bool LoadHiWord);
|
||||||
|
void ProtectGPR(uint32_t Reg);
|
||||||
|
void UnProtectGPR(uint32_t Reg);
|
||||||
|
void ResetX86Protection();
|
||||||
|
x86Reg UnMap_TempReg();
|
||||||
|
void UnMap_GPR(uint32_t Reg, bool WriteBackValue);
|
||||||
|
bool UnMap_X86reg(x86Reg Reg);
|
||||||
|
void WriteBackRegisters();
|
||||||
|
|
||||||
|
bool IsKnown(int32_t Reg) const { return ((GetMipsRegState(Reg) & STATE_KNOWN_VALUE) != 0); }
|
||||||
|
bool IsUnknown(int32_t Reg) const { return ((GetMipsRegState(Reg) & STATE_KNOWN_VALUE) == 0); }
|
||||||
|
bool IsModified(int32_t Reg) const { return ((GetMipsRegState(Reg) & STATE_MODIFIED) != 0); }
|
||||||
|
|
||||||
|
bool IsMapped(int32_t Reg) const { return ((GetMipsRegState(Reg) & (STATE_KNOWN_VALUE | STATE_X86_MAPPED)) == (STATE_KNOWN_VALUE | STATE_X86_MAPPED)); }
|
||||||
|
bool IsConst(int32_t Reg) const { return ((GetMipsRegState(Reg) & (STATE_KNOWN_VALUE | STATE_X86_MAPPED)) == STATE_KNOWN_VALUE); }
|
||||||
|
|
||||||
|
bool IsSigned(int32_t Reg) const { return ((GetMipsRegState(Reg) & (STATE_KNOWN_VALUE | STATE_SIGN)) == (STATE_KNOWN_VALUE | STATE_SIGN)); }
|
||||||
|
bool IsUnsigned(int32_t Reg) const { return ((GetMipsRegState(Reg) & (STATE_KNOWN_VALUE | STATE_SIGN)) == STATE_KNOWN_VALUE); }
|
||||||
|
|
||||||
|
bool Is32Bit(int32_t Reg) const { return ((GetMipsRegState(Reg) & (STATE_KNOWN_VALUE | STATE_32BIT)) == (STATE_KNOWN_VALUE | STATE_32BIT)); }
|
||||||
|
bool Is64Bit(int32_t Reg) const { return ((GetMipsRegState(Reg) & (STATE_KNOWN_VALUE | STATE_32BIT)) == STATE_KNOWN_VALUE); }
|
||||||
|
|
||||||
|
bool Is32BitMapped(int32_t Reg) const { return ((GetMipsRegState(Reg) & (STATE_KNOWN_VALUE | STATE_32BIT | STATE_X86_MAPPED)) == (STATE_KNOWN_VALUE | STATE_32BIT | STATE_X86_MAPPED)); }
|
||||||
|
bool Is64BitMapped(int32_t Reg) const { return ((GetMipsRegState(Reg) & (STATE_KNOWN_VALUE | STATE_32BIT | STATE_X86_MAPPED)) == (STATE_KNOWN_VALUE | STATE_X86_MAPPED)); }
|
||||||
|
|
||||||
|
REG_STATE GetMipsRegState(int32_t Reg) const { return m_MIPS_RegState[Reg]; }
|
||||||
|
uint64_t GetMipsReg(int32_t Reg) const { return m_MIPS_RegVal[Reg].UDW; }
|
||||||
|
int64_t GetMipsReg_S(int32_t Reg) const { return m_MIPS_RegVal[Reg].DW; }
|
||||||
|
uint32_t GetMipsRegLo(int32_t Reg) const { return m_MIPS_RegVal[Reg].UW[0]; }
|
||||||
|
int32_t GetMipsRegLo_S(int32_t Reg) const { return m_MIPS_RegVal[Reg].W[0]; }
|
||||||
|
uint32_t GetMipsRegHi(int32_t Reg) const { return m_MIPS_RegVal[Reg].UW[1]; }
|
||||||
|
int32_t GetMipsRegHi_S(int32_t Reg) const { return m_MIPS_RegVal[Reg].W[1]; }
|
||||||
|
CX86Ops::x86Reg GetMipsRegMapLo(int32_t Reg) const { return m_RegMapLo[Reg]; }
|
||||||
|
CX86Ops::x86Reg GetMipsRegMapHi(int32_t Reg) const { return m_RegMapHi[Reg]; }
|
||||||
|
|
||||||
|
uint32_t GetX86MapOrder(x86Reg Reg) const { return m_x86reg_MapOrder[Reg]; }
|
||||||
|
bool GetX86Protected(x86Reg Reg) const { return m_x86reg_Protected[Reg]; }
|
||||||
|
REG_MAPPED GetX86Mapped(x86Reg Reg) const { return m_x86reg_MappedTo[Reg]; }
|
||||||
|
|
||||||
|
uint32_t GetBlockCycleCount() const { return m_CycleCount; }
|
||||||
|
|
||||||
|
void SetMipsReg(int32_t Reg, uint64_t Value) { m_MIPS_RegVal[Reg].UDW = Value; }
|
||||||
|
void SetMipsReg_S(int32_t Reg, int64_t Value) { m_MIPS_RegVal[Reg].DW = Value; }
|
||||||
|
void SetMipsRegLo(int32_t Reg, uint32_t Value) { m_MIPS_RegVal[Reg].UW[0] = Value; }
|
||||||
|
void SetMipsRegHi(int32_t Reg, uint32_t Value) { m_MIPS_RegVal[Reg].UW[1] = Value; }
|
||||||
|
void SetMipsRegMapLo(int32_t GetMipsReg, x86Reg Reg) { m_RegMapLo[GetMipsReg] = Reg; }
|
||||||
|
void SetMipsRegMapHi(int32_t GetMipsReg, x86Reg Reg) { m_RegMapHi[GetMipsReg] = Reg; }
|
||||||
|
void SetMipsRegState(int32_t GetMipsReg, REG_STATE State) { m_MIPS_RegState[GetMipsReg] = State; }
|
||||||
|
|
||||||
|
void SetX86MapOrder(x86Reg Reg, uint32_t Order) { m_x86reg_MapOrder[Reg] = Order; }
|
||||||
|
void SetX86Protected(x86Reg Reg, bool Protected) { m_x86reg_Protected[Reg] = Protected; }
|
||||||
|
void SetX86Mapped(x86Reg Reg, REG_MAPPED Mapping) { m_x86reg_MappedTo[Reg] = Mapping; }
|
||||||
|
|
||||||
|
void SetBlockCycleCount(uint32_t CyleCount) { m_CycleCount = CyleCount; }
|
||||||
|
|
||||||
|
int32_t & StackTopPos() { return m_Stack_TopPos; }
|
||||||
|
int32_t & FpuMappedTo(int32_t Reg) { return m_x86fpu_MappedTo[Reg]; }
|
||||||
|
FPU_STATE & FpuState(int32_t Reg) { return m_x86fpu_State[Reg]; }
|
||||||
|
FPU_ROUND & FpuRoundingModel(int32_t Reg) { return m_x86fpu_RoundingModel[Reg]; }
|
||||||
|
bool & FpuBeenUsed() { return m_Fpu_Used; }
|
||||||
|
|
||||||
|
FPU_ROUND GetRoundingModel() const { return m_RoundingModel; }
|
||||||
|
void SetRoundingModel(FPU_ROUND RoundingModel) { m_RoundingModel = RoundingModel; }
|
||||||
|
|
||||||
|
private:
|
||||||
|
const char * RoundingModelName(FPU_ROUND RoundType);
|
||||||
|
x86Reg UnMap_8BitTempReg();
|
||||||
|
|
||||||
|
//r4k
|
||||||
|
REG_STATE m_MIPS_RegState[32];
|
||||||
|
MIPS_DWORD m_MIPS_RegVal[32];
|
||||||
|
x86Reg m_RegMapHi[32];
|
||||||
|
x86Reg m_RegMapLo[32];
|
||||||
|
|
||||||
|
REG_MAPPED m_x86reg_MappedTo[10];
|
||||||
|
uint32_t m_x86reg_MapOrder[10];
|
||||||
|
bool m_x86reg_Protected[10];
|
||||||
|
|
||||||
|
uint32_t m_CycleCount;
|
||||||
|
|
||||||
|
//FPU
|
||||||
|
int32_t m_Stack_TopPos;
|
||||||
|
int32_t m_x86fpu_MappedTo[8];
|
||||||
|
FPU_STATE m_x86fpu_State[8];
|
||||||
|
bool m_x86fpu_StateChanged[8];
|
||||||
|
FPU_ROUND m_x86fpu_RoundingModel[8];
|
||||||
|
|
||||||
|
bool m_Fpu_Used;
|
||||||
|
FPU_ROUND m_RoundingModel;
|
||||||
|
|
||||||
|
static uint32_t m_fpuControl;
|
||||||
|
};
|
|
@ -74,10 +74,10 @@
|
||||||
<ClCompile Include="N64System\Recompiler\RecompilerClass.cpp" />
|
<ClCompile Include="N64System\Recompiler\RecompilerClass.cpp" />
|
||||||
<ClCompile Include="N64System\Recompiler\RecompilerCodeLog.cpp" />
|
<ClCompile Include="N64System\Recompiler\RecompilerCodeLog.cpp" />
|
||||||
<ClCompile Include="N64System\Recompiler\RecompilerMemory.cpp" />
|
<ClCompile Include="N64System\Recompiler\RecompilerMemory.cpp" />
|
||||||
<ClCompile Include="N64System\Recompiler\RegInfo.cpp" />
|
|
||||||
<ClCompile Include="N64System\Recompiler\SectionInfo.cpp" />
|
<ClCompile Include="N64System\Recompiler\SectionInfo.cpp" />
|
||||||
<ClCompile Include="N64System\Recompiler\x86\x86ops.cpp" />
|
<ClCompile Include="N64System\Recompiler\x86\x86ops.cpp" />
|
||||||
<ClCompile Include="N64System\Recompiler\x86\x86RecompilerOps.cpp" />
|
<ClCompile Include="N64System\Recompiler\x86\x86RecompilerOps.cpp" />
|
||||||
|
<ClCompile Include="N64System\Recompiler\x86\x86RegInfo.cpp" />
|
||||||
<ClCompile Include="N64System\SpeedLimiterClass.cpp" />
|
<ClCompile Include="N64System\SpeedLimiterClass.cpp" />
|
||||||
<ClCompile Include="N64System\SystemGlobals.cpp" />
|
<ClCompile Include="N64System\SystemGlobals.cpp" />
|
||||||
<ClCompile Include="Plugins\AudioPlugin.cpp" />
|
<ClCompile Include="Plugins\AudioPlugin.cpp" />
|
||||||
|
@ -174,6 +174,7 @@
|
||||||
<ClInclude Include="N64System\Recompiler\X86ops.h" />
|
<ClInclude Include="N64System\Recompiler\X86ops.h" />
|
||||||
<ClInclude Include="N64System\Recompiler\x86\x86ops.h" />
|
<ClInclude Include="N64System\Recompiler\x86\x86ops.h" />
|
||||||
<ClInclude Include="N64System\Recompiler\x86\x86RecompilerOps.h" />
|
<ClInclude Include="N64System\Recompiler\x86\x86RecompilerOps.h" />
|
||||||
|
<ClInclude Include="N64System\Recompiler\x86\x86RegInfo.h" />
|
||||||
<ClInclude Include="N64System\SpeedLimiterClass.h" />
|
<ClInclude Include="N64System\SpeedLimiterClass.h" />
|
||||||
<ClInclude Include="N64System\SystemGlobals.h" />
|
<ClInclude Include="N64System\SystemGlobals.h" />
|
||||||
<ClInclude Include="Notification.h" />
|
<ClInclude Include="Notification.h" />
|
||||||
|
|
|
@ -237,9 +237,6 @@
|
||||||
<ClCompile Include="N64System\Recompiler\RecompilerMemory.cpp">
|
<ClCompile Include="N64System\Recompiler\RecompilerMemory.cpp">
|
||||||
<Filter>Source Files\N64 System\Recompiler</Filter>
|
<Filter>Source Files\N64 System\Recompiler</Filter>
|
||||||
</ClCompile>
|
</ClCompile>
|
||||||
<ClCompile Include="N64System\Recompiler\RegInfo.cpp">
|
|
||||||
<Filter>Source Files\N64 System\Recompiler</Filter>
|
|
||||||
</ClCompile>
|
|
||||||
<ClCompile Include="N64System\Recompiler\SectionInfo.cpp">
|
<ClCompile Include="N64System\Recompiler\SectionInfo.cpp">
|
||||||
<Filter>Source Files\N64 System\Recompiler</Filter>
|
<Filter>Source Files\N64 System\Recompiler</Filter>
|
||||||
</ClCompile>
|
</ClCompile>
|
||||||
|
@ -324,6 +321,9 @@
|
||||||
<ClCompile Include="N64System\Recompiler\x86\x86ops.cpp">
|
<ClCompile Include="N64System\Recompiler\x86\x86ops.cpp">
|
||||||
<Filter>Source Files\N64 System\Recompiler\x86</Filter>
|
<Filter>Source Files\N64 System\Recompiler\x86</Filter>
|
||||||
</ClCompile>
|
</ClCompile>
|
||||||
|
<ClCompile Include="N64System\Recompiler\x86\x86RegInfo.cpp">
|
||||||
|
<Filter>Source Files\N64 System\Recompiler\x86</Filter>
|
||||||
|
</ClCompile>
|
||||||
</ItemGroup>
|
</ItemGroup>
|
||||||
<ItemGroup>
|
<ItemGroup>
|
||||||
<ClInclude Include="stdafx.h">
|
<ClInclude Include="stdafx.h">
|
||||||
|
@ -623,5 +623,8 @@
|
||||||
<ClInclude Include="N64System\Recompiler\x86\x86ops.h">
|
<ClInclude Include="N64System\Recompiler\x86\x86ops.h">
|
||||||
<Filter>Header Files\N64 System\Recompiler\x86</Filter>
|
<Filter>Header Files\N64 System\Recompiler\x86</Filter>
|
||||||
</ClInclude>
|
</ClInclude>
|
||||||
|
<ClInclude Include="N64System\Recompiler\x86\x86RegInfo.h">
|
||||||
|
<Filter>Header Files\N64 System\Recompiler\x86</Filter>
|
||||||
|
</ClInclude>
|
||||||
</ItemGroup>
|
</ItemGroup>
|
||||||
</Project>
|
</Project>
|
Loading…
Reference in New Issue