From b175442aacedf3c830e50664b8429247a2cfb6e5 Mon Sep 17 00:00:00 2001
From: zilmar <zilmar@pj64-emu.com>
Date: Thu, 29 Sep 2016 21:58:10 +1000
Subject: [PATCH] [Android] Add Arm32Opcode handling for
 CArmOps::AddArmRegToArmReg

---
 .../N64System/Recompiler/Arm/ArmOps.cpp       | 36 ++++++++++++++-----
 .../N64System/Recompiler/Arm/ArmOps.h         |  2 +-
 2 files changed, 28 insertions(+), 10 deletions(-)

diff --git a/Source/Project64-core/N64System/Recompiler/Arm/ArmOps.cpp b/Source/Project64-core/N64System/Recompiler/Arm/ArmOps.cpp
index a0e72d0cb..f1208c9bb 100644
--- a/Source/Project64-core/N64System/Recompiler/Arm/ArmOps.cpp
+++ b/Source/Project64-core/N64System/Recompiler/Arm/ArmOps.cpp
@@ -31,17 +31,35 @@ void CArmOps::WriteArmLabel(const char * Label)
     CPU_Message("      %s:", Label);
 }
 
-void CArmOps::AddArmRegToArmReg(ArmReg SourceReg1, ArmReg SourceReg2, ArmReg DestReg)
+void CArmOps::AddArmRegToArmReg(ArmReg DestReg, ArmReg SourceReg1, ArmReg SourceReg2)
 {
-    CPU_Message("      add\t%s,%s,%s", ArmRegName(DestReg), ArmRegName(SourceReg1), ArmRegName(SourceReg2));
-    ArmThumbOpcode op = {0};
-    op.Reg.rt = DestReg;
-    op.Reg.rn = SourceReg1;
-    op.Reg.rm = SourceReg2;
-    op.Reg.opcode = 0xC;
-    AddCode16(op.Hex);
-}
+    if (DestReg <= 7 && SourceReg1 <=7 && SourceReg2 <= 7)
+    {
+        CPU_Message("      add\t%s,%s,%s", ArmRegName(DestReg), ArmRegName(SourceReg1), ArmRegName(SourceReg2));
+        ArmThumbOpcode op = {0};
+        op.Reg.rt = DestReg;
+        op.Reg.rn = SourceReg1;
+        op.Reg.rm = SourceReg2;
+        op.Reg.opcode = 0xC;
+        AddCode16(op.Hex);
+    }
+    else
+    {
+        CPU_Message("      add.w\t%s,%s,%s", ArmRegName(DestReg), ArmRegName(SourceReg1), ArmRegName(SourceReg2));
+        Arm32Opcode op = {0};
+        op.imm5.rn = SourceReg1;
+        op.imm5.s = 0;
+        op.imm5.opcode = 0x758;
 
+        op.imm5.rm = SourceReg2;
+        op.imm5.type = 0;
+        op.imm5.imm2 = 0;
+        op.imm5.rd = DestReg;
+        op.imm5.imm3 = 0;
+        op.imm5.opcode2 = 0;
+        AddCode32(op.Hex);
+    }
+}
 void CArmOps::AndArmRegToArmReg(ArmReg SourceReg, ArmReg DestReg)
 {
     CPU_Message("      and\t%s, %s", ArmRegName(DestReg), ArmRegName(SourceReg));
diff --git a/Source/Project64-core/N64System/Recompiler/Arm/ArmOps.h b/Source/Project64-core/N64System/Recompiler/Arm/ArmOps.h
index 1e1abbf68..9dfcae0af 100644
--- a/Source/Project64-core/N64System/Recompiler/Arm/ArmOps.h
+++ b/Source/Project64-core/N64System/Recompiler/Arm/ArmOps.h
@@ -132,7 +132,7 @@ protected:
     static void WriteArmComment(const char * Comment);
     static void WriteArmLabel(const char * Label);
 
-    static void AddArmRegToArmReg(ArmReg SourceReg1, ArmReg SourceReg2, ArmReg DestReg);
+    static void AddArmRegToArmReg(ArmReg DestReg, ArmReg SourceReg1, ArmReg SourceReg2);
     static void AndArmRegToArmReg(ArmReg SourceReg, ArmReg DestReg);
     static void BranchLabel8(ArmBranchCompare CompareType, const char * Label);
     static void BranchLabel20(ArmBranchCompare CompareType, const char * Label);