Add reset SP when SP is the target for ADD, ADDU, SUB

This commit is contained in:
zilmar 2012-09-28 09:02:01 +10:00
parent 48f661a6d6
commit b0c2626137
1 changed files with 12 additions and 0 deletions

View File

@ -2633,6 +2633,10 @@ void CRecompilerOps::SPECIAL_ADD (void) {
} else { } else {
AddVariableToX86reg(cMipsRegMapLo(m_Opcode.rd),&_GPR[source2].W[0],CRegName::GPR_Lo[source2]); AddVariableToX86reg(cMipsRegMapLo(m_Opcode.rd),&_GPR[source2].W[0],CRegName::GPR_Lo[source2]);
} }
if (bFastSP() && m_Opcode.rd == 29)
{
_MMU->ResetMemoryStack();
}
} }
void CRecompilerOps::SPECIAL_ADDU (void) { void CRecompilerOps::SPECIAL_ADDU (void) {
@ -2658,6 +2662,10 @@ void CRecompilerOps::SPECIAL_ADDU (void) {
} else { } else {
AddVariableToX86reg(cMipsRegMapLo(m_Opcode.rd),&_GPR[source2].W[0],CRegName::GPR_Lo[source2]); AddVariableToX86reg(cMipsRegMapLo(m_Opcode.rd),&_GPR[source2].W[0],CRegName::GPR_Lo[source2]);
} }
if (bFastSP() && m_Opcode.rd == 29)
{
_MMU->ResetMemoryStack();
}
} }
void CRecompilerOps::SPECIAL_SUB (void) { void CRecompilerOps::SPECIAL_SUB (void) {
@ -2685,6 +2693,10 @@ void CRecompilerOps::SPECIAL_SUB (void) {
SubVariableFromX86reg(cMipsRegMapLo(m_Opcode.rd),&_GPR[m_Opcode.rt].W[0],CRegName::GPR_Lo[m_Opcode.rt]); SubVariableFromX86reg(cMipsRegMapLo(m_Opcode.rd),&_GPR[m_Opcode.rt].W[0],CRegName::GPR_Lo[m_Opcode.rt]);
} }
} }
if (bFastSP() && m_Opcode.rd == 29)
{
_MMU->ResetMemoryStack();
}
} }
void CRecompilerOps::SPECIAL_SUBU (void) { void CRecompilerOps::SPECIAL_SUBU (void) {