RSP: Add Compile_Vector_VRNDP, Compile_Vector_VMULQ, Compile_Opcode_LWV

Source/Project64-rsp-core/Recompiler/RspRecompilerCPU.cpp

@@ -264,8 +264,8 @@ void BuildRecompilerCPU(void)
 
     RSP_Vector[0] = Compile_Vector_VMULF;
     RSP_Vector[1] = Compile_Vector_VMULU;
-    RSP_Vector[2] = Compile_UnknownOpcode;
+    RSP_Vector[2] = Compile_Vector_VRNDP;
-    RSP_Vector[3] = Compile_UnknownOpcode;
+    RSP_Vector[3] = Compile_Vector_VMULQ;
     RSP_Vector[4] = Compile_Vector_VMUDL;
     RSP_Vector[5] = Compile_Vector_VMUDM;
     RSP_Vector[6] = Compile_Vector_VMUDN;
@@ -337,7 +337,7 @@ void BuildRecompilerCPU(void)
     RSP_Lc2[7] = Compile_Opcode_LUV;
     RSP_Lc2[8] = Compile_Opcode_LHV;
     RSP_Lc2[9] = Compile_Opcode_LFV;
-    RSP_Lc2[10] = Compile_UnknownOpcode;
+    RSP_Lc2[10] = Compile_Opcode_LWV;
     RSP_Lc2[11] = Compile_Opcode_LTV;
     RSP_Lc2[12] = Compile_UnknownOpcode;
     RSP_Lc2[13] = Compile_UnknownOpcode;

Source/Project64-rsp-core/Recompiler/RspRecompilerOps.cpp

@@ -583,7 +583,6 @@ void Compile_ADDIU(void)
 #else
     CPU_Message("  %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
 
-
     int Immediate = (short)RSPOpC.immediate;
 
     if (RSPOpC.rt == RSPOpC.rs)
@@ -651,7 +650,6 @@ void Compile_SLTIU(void)
 
     CPU_Message("  %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
 
-
     Immediate = (short)RSPOpC.immediate;
     XorX86RegToX86Reg(x86_ECX, x86_ECX);
     CompConstToVariable(Immediate, &RSP_GPR[RSPOpC.rs].UW, GPR_Name(RSPOpC.rs));
@@ -672,7 +670,6 @@ void Compile_ANDI(void)
 #else
     CPU_Message("  %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
 
-
     int Immediate = (unsigned short)RSPOpC.immediate;
     if (RSPOpC.rt == RSPOpC.rs)
     {
@@ -2209,6 +2206,18 @@ void Compile_Cop0_MF(void)
         Call_Direct(AddressOf(&RSPRegisterHandlerPlugin::ReadReg), "RSPRegisterHandlerPlugin::ReadReg");
         MoveX86regToVariable(x86_EAX, &RSP_GPR[RSPOpC.rt].UW, GPR_Name(RSPOpC.rt));
         break;
+    case 2:
+        MoveConstToX86reg((uint32_t)(g_RSPRegisterHandler.get()), x86_ECX);
+        PushImm32("RSPRegister_RD_LEN", RSPRegister_RD_LEN);
+        Call_Direct(AddressOf(&RSPRegisterHandlerPlugin::ReadReg), "RSPRegisterHandlerPlugin::ReadReg");
+        MoveX86regToVariable(x86_EAX, &RSP_GPR[RSPOpC.rt].UW, GPR_Name(RSPOpC.rt));
+        break;
+    case 3:
+        MoveConstToX86reg((uint32_t)(g_RSPRegisterHandler.get()), x86_ECX);
+        PushImm32("RSPRegister_WR_LEN", RSPRegister_WR_LEN);
+        Call_Direct(AddressOf(&RSPRegisterHandlerPlugin::ReadReg), "RSPRegisterHandlerPlugin::ReadReg");
+        MoveX86regToVariable(x86_EAX, &RSP_GPR[RSPOpC.rt].UW, GPR_Name(RSPOpC.rt));
+        break;
     case 4:
         MoveConstToX86reg((uint32_t)(g_RSPRegisterHandler.get()), x86_ECX);
         PushImm32("RSPRegister_STATUS", RSPRegister_STATUS);
@@ -2863,6 +2872,16 @@ void Compile_Vector_VMULU(void)
     Cheat_r4300iOpcode(RSP_Vector_VMULU, "RSP_Vector_VMULU");
 }
 
+void Compile_Vector_VRNDP(void)
+{
+    Cheat_r4300iOpcode(RSP_Vector_VRNDP, "RSP_Vector_VRNDP");
+}
+
+void Compile_Vector_VMULQ(void)
+{
+    Cheat_r4300iOpcode(RSP_Vector_VMULQ, "RSP_Vector_VMULQ");
+}
+
 bool Compile_Vector_VMUDL_MMX(void)
 {
     char Reg[256];
@@ -6070,12 +6089,6 @@ void Compile_Opcode_LSV(void)
     char Reg[256];
     int offset = (RSPOpC.voffset << 1);
 
-    if (RSPOpC.del > 14)
-    {
-        rsp_UnknownOpcode();
-        return;
-    }
-
 #ifndef CompileLsv
     Cheat_r4300iOpcode(RSP_Opcode_LSV, "RSP_Opcode_LSV");
     return;
@@ -6442,7 +6455,7 @@ void Compile_Opcode_LRV(void)
 
     if (RSPOpC.del != 0)
     {
-        rsp_UnknownOpcode();
+        Cheat_r4300iOpcode(RSP_Opcode_LRV, "RSP_Opcode_LRV");
         return;
     }
 
@@ -6840,6 +6853,11 @@ void Compile_Opcode_LFV(void)
     Cheat_r4300iOpcode(RSP_Opcode_LFV, "RSP_Opcode_LFV");
 }
 
+void Compile_Opcode_LWV(void)
+{
+    Cheat_r4300iOpcode(RSP_Opcode_LWV, "RSP_Opcode_LWV");
+}
+
 void Compile_Opcode_LTV(void)
 {
     Cheat_r4300iOpcode(RSP_Opcode_LTV, "RSP_Opcode_LTV");

Source/Project64-rsp-core/Recompiler/RspRecompilerOps.h

@@ -76,6 +76,8 @@ void Compile_COP2_VECTOR(void);
 
 void Compile_Vector_VMULF(void);
 void Compile_Vector_VMULU(void);
+void Compile_Vector_VRNDP(void);
+void Compile_Vector_VMULQ(void);
 void Compile_Vector_VMUDL(void);
 void Compile_Vector_VMUDM(void);
 void Compile_Vector_VMUDN(void);
@@ -128,6 +130,7 @@ void Compile_Opcode_LPV(void);
 void Compile_Opcode_LUV(void);
 void Compile_Opcode_LHV(void);
 void Compile_Opcode_LFV(void);
+void Compile_Opcode_LWV(void);
 void Compile_Opcode_LTV(void);
 
 // SC2 functions