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[Project64] Add CArmOps::StoreArmRegToArmRegPointer

This commit is contained in:
zilmar 2016-11-22 18:00:45 +11:00
parent 7ea5418168
commit abb764d0c4
2 changed files with 29 additions and 0 deletions
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28
Source/Project64-core/N64System/Recompiler/Arm/ArmOps.cpp
View File

@ -1019,6 +1019,34 @@ void CArmOps::StoreArmRegToArmRegPointer(ArmReg Reg, ArmReg RegPointer, uint8_t
}
}
void CArmOps::StoreArmRegToArmRegPointer(ArmReg DestReg, ArmReg RegPointer, ArmReg RegPointer2, uint8_t shift)
{
if (mInItBlock) { g_Notify->BreakPoint(__FILE__, __LINE__); }
if (DestReg > 0x7 || RegPointer > 0x7 || RegPointer2 > 0x7 || shift != 0)
{
CPU_Message(" str.w\t%s, [%s, %s%s]", ArmRegName(DestReg), ArmRegName(RegPointer), ArmRegName(RegPointer2), shift != 0 ? stdstr_f(", lsl #%d", shift).c_str() : "");
Arm32Opcode op = { 0 };
op.imm2.rm = RegPointer2;
op.imm2.imm = shift;
op.imm2.Opcode2 = 0;
op.imm2.rt = DestReg;
op.imm2.rn = RegPointer;
op.imm2.opcode = 0xF84;
AddCode32(op.Hex);
}
else
{
CPU_Message(" str\t%s, [%s, %s]", ArmRegName(DestReg), ArmRegName(RegPointer), ArmRegName(RegPointer2));
ArmThumbOpcode op = { 0 };
op.Reg.rt = DestReg;
op.Reg.rn = RegPointer;
op.Reg.rm = RegPointer2;
op.Reg.opcode = 0x28;
AddCode16(op.Hex);
}
}
void CArmOps::StoreFloatingPointControlReg(ArmReg SourceReg)
{
if (mInItBlock) { g_Notify->BreakPoint(__FILE__,__LINE__); }

1
Source/Project64-core/N64System/Recompiler/Arm/ArmOps.h
View File

@ -193,6 +193,7 @@ protected:
static void ShiftRightUnsignImmed(ArmReg DestReg, ArmReg SourceReg, uint32_t shift);
static void ShiftLeftImmed(ArmReg DestReg, ArmReg SourceReg, uint32_t shift);
static void SignExtendByte(ArmReg Reg);
static void StoreArmRegToArmRegPointer(ArmReg DestReg, ArmReg RegPointer, uint8_t Offset, const char * comment = NULL);
static void StoreArmRegToArmRegPointer(ArmReg Reg, ArmReg RegPointer, uint8_t Offset);
static void StoreFloatingPointControlReg(ArmReg SourceReg);
static void StoreFloatRegToArmRegPointer(ArmFpuSingle Reg, ArmReg RegPointer, uint8_t Offset);