diff --git a/Source/Project64-core/N64System/MemoryHandler/CartridgeDomain2Address1Handler.cpp b/Source/Project64-core/N64System/MemoryHandler/CartridgeDomain2Address1Handler.cpp new file mode 100644 index 000000000..d4cc71042 --- /dev/null +++ b/Source/Project64-core/N64System/MemoryHandler/CartridgeDomain2Address1Handler.cpp @@ -0,0 +1,112 @@ +#include "stdafx.h" +#include "CartridgeDomain2Address1Handler.h" +#include +#include + +DiskInterfaceReg::DiskInterfaceReg(uint32_t * DiskInterface) : + ASIC_DATA(DiskInterface[0]), + ASIC_MISC_REG(DiskInterface[1]), + ASIC_STATUS(DiskInterface[2]), + ASIC_CUR_TK(DiskInterface[3]), + ASIC_BM_STATUS(DiskInterface[4]), + ASIC_ERR_SECTOR(DiskInterface[5]), + ASIC_SEQ_STATUS(DiskInterface[6]), + ASIC_CUR_SECTOR(DiskInterface[7]), + ASIC_HARD_RESET(DiskInterface[8]), + ASIC_C1_S0(DiskInterface[9]), + ASIC_HOST_SECBYTE(DiskInterface[10]), + ASIC_C1_S2(DiskInterface[11]), + ASIC_SEC_BYTE(DiskInterface[12]), + ASIC_C1_S4(DiskInterface[13]), + ASIC_C1_S6(DiskInterface[14]), + ASIC_CUR_ADDR(DiskInterface[15]), + ASIC_ID_REG(DiskInterface[16]), + ASIC_TEST_REG(DiskInterface[17]), + ASIC_TEST_PIN_SEL(DiskInterface[18]), + ASIC_CMD(DiskInterface[19]), + ASIC_BM_CTL(DiskInterface[20]), + ASIC_SEQ_CTL(DiskInterface[21]) +{ +} + +CartridgeDomain2Address1Handler::CartridgeDomain2Address1Handler(CRegisters & Reg) : + DiskInterfaceReg(Reg.m_DiskInterface) +{ +} + +bool CartridgeDomain2Address1Handler::Read32(uint32_t Address, uint32_t & Value) +{ + // 64DD registers + if (EnableDisk()) + { + switch (Address & 0x1FFFFFFF) + { + case 0x05000500: Value = ASIC_DATA; break; + case 0x05000504: Value = ASIC_MISC_REG; break; + case 0x05000508: + Value = ASIC_STATUS; + DiskGapSectorCheck(); + break; + case 0x0500050C: Value = ASIC_CUR_TK; break; + case 0x05000510: Value = ASIC_BM_STATUS; break; + case 0x05000514: Value = ASIC_ERR_SECTOR; break; + case 0x05000518: Value = ASIC_SEQ_STATUS; break; + case 0x0500051C: Value = ASIC_CUR_SECTOR; break; + case 0x05000520: Value = ASIC_HARD_RESET; break; + case 0x05000524: Value = ASIC_C1_S0; break; + case 0x05000528: Value = ASIC_HOST_SECBYTE; break; + case 0x0500052C: Value = ASIC_C1_S2; break; + case 0x05000530: Value = ASIC_SEC_BYTE; break; + case 0x05000534: Value = ASIC_C1_S4; break; + case 0x05000538: Value = ASIC_C1_S6; break; + case 0x0500053C: Value = ASIC_CUR_ADDR; break; + case 0x05000540: Value = ASIC_ID_REG; break; + case 0x05000544: Value = ASIC_TEST_REG; break; + case 0x05000548: Value = ASIC_TEST_PIN_SEL; break; + default: + Value = (Address << 16) | (Address & 0xFFFF); + if (HaveDebugger()) + { + g_Notify->BreakPoint(__FILE__, __LINE__); + } + } + } + else + { + Value = (Address << 16) | (Address & 0xFFFF); + } + return true; +} + +bool CartridgeDomain2Address1Handler::Write32(uint32_t Address, uint32_t Value, uint32_t Mask) +{ + if (EnableDisk()) + { + switch (Address & 0xFFFFFFF) + { + case 0x05000500: ASIC_DATA = (ASIC_DATA & ~Mask) | (Value & Mask); break; + case 0x05000508: + ASIC_CMD = (ASIC_CMD & ~Mask) | (Value & Mask); + DiskCommand(); + break; + case 0x05000510: + //ASIC_BM_STATUS_CTL + ASIC_BM_CTL = (ASIC_BM_CTL & ~Mask) | (Value & Mask); + DiskBMControl(); + break; + case 0x05000518: + //ASIC_SEQ_STATUS_CTL + break; + case 0x05000520: DiskReset(); break; + case 0x05000528: ASIC_HOST_SECBYTE = (ASIC_HOST_SECBYTE & ~Mask) | (Value & Mask); break; + case 0x05000530: ASIC_SEC_BYTE = (ASIC_SEC_BYTE & ~Mask) | (Value & Mask); break; + case 0x05000548: ASIC_TEST_PIN_SEL = (ASIC_TEST_PIN_SEL & ~Mask) | (Value & Mask); break; + default: + if (HaveDebugger()) + { + g_Notify->BreakPoint(__FILE__, __LINE__); + } + } + } + return true; +} diff --git a/Source/Project64-core/N64System/MemoryHandler/CartridgeDomain2Address1Handler.h b/Source/Project64-core/N64System/MemoryHandler/CartridgeDomain2Address1Handler.h new file mode 100644 index 000000000..6d2fa1a80 --- /dev/null +++ b/Source/Project64-core/N64System/MemoryHandler/CartridgeDomain2Address1Handler.h @@ -0,0 +1,87 @@ +#pragma once +#include "MemoryHandler.h" +#include +#include + +enum +{ + DD_STATUS_DATA_RQ = 0x40000000, + DD_STATUS_C2_XFER = 0x10000000, + DD_STATUS_BM_ERR = 0x08000000, + DD_STATUS_BM_INT = 0x04000000, + DD_STATUS_MECHA_INT = 0x02000000, + DD_STATUS_DISK_PRES = 0x01000000, + DD_STATUS_BUSY_STATE = 0x00800000, + DD_STATUS_RST_STATE = 0x00400000, + DD_STATUS_MTR_N_SPIN = 0x00100000, + DD_STATUS_HEAD_RTRCT = 0x00080000, + DD_STATUS_WR_PR_ERR = 0x00040000, + DD_STATUS_MECHA_ERR = 0x00020000, + DD_STATUS_DISK_CHNG = 0x00010000, + + DD_BM_STATUS_RUNNING = 0x80000000, + DD_BM_STATUS_ERROR = 0x04000000, + DD_BM_STATUS_MICRO = 0x02000000, + DD_BM_STATUS_BLOCK = 0x01000000, + + DD_BM_CTL_START = 0x80000000, + DD_BM_CTL_MNGRMODE = 0x40000000, + DD_BM_CTL_INTMASK = 0x20000000, + DD_BM_CTL_RESET = 0x10000000, + DD_BM_CTL_BLK_TRANS = 0x02000000, + DD_BM_CTL_MECHA_RST = 0x01000000 +}; + +class DiskInterfaceReg +{ +protected: + DiskInterfaceReg(uint32_t * DiskInterface); + +public: + uint32_t & ASIC_DATA; + uint32_t & ASIC_MISC_REG; + uint32_t & ASIC_STATUS; + uint32_t & ASIC_CMD; + uint32_t & ASIC_CUR_TK; + uint32_t & ASIC_BM_STATUS; + uint32_t & ASIC_BM_CTL; + uint32_t & ASIC_ERR_SECTOR; + uint32_t & ASIC_SEQ_STATUS; + uint32_t & ASIC_SEQ_CTL; + uint32_t & ASIC_CUR_SECTOR; + uint32_t & ASIC_HARD_RESET; + uint32_t & ASIC_C1_S0; + uint32_t & ASIC_HOST_SECBYTE; + uint32_t & ASIC_C1_S2; + uint32_t & ASIC_SEC_BYTE; + uint32_t & ASIC_C1_S4; + uint32_t & ASIC_C1_S6; + uint32_t & ASIC_CUR_ADDR; + uint32_t & ASIC_ID_REG; + uint32_t & ASIC_TEST_REG; + uint32_t & ASIC_TEST_PIN_SEL; + +private: + DiskInterfaceReg(); + DiskInterfaceReg(const DiskInterfaceReg&); + DiskInterfaceReg& operator=(const DiskInterfaceReg&); +}; + +class CRegisters; + +class CartridgeDomain2Address1Handler : + public MemoryHandler, + private DiskInterfaceReg, + private CDebugSettings, + private CGameSettings +{ +public: + CartridgeDomain2Address1Handler(CRegisters & Reg); + bool Read32(uint32_t Address, uint32_t & Value); + bool Write32(uint32_t Address, uint32_t Value, uint32_t Mask); + +private: + CartridgeDomain2Address1Handler(); + CartridgeDomain2Address1Handler(const CartridgeDomain2Address1Handler &); + CartridgeDomain2Address1Handler & operator=(const CartridgeDomain2Address1Handler &); +}; diff --git a/Source/Project64-core/N64System/Mips/MemoryVirtualMem.cpp b/Source/Project64-core/N64System/Mips/MemoryVirtualMem.cpp index 988a3ba54..75a764395 100755 --- a/Source/Project64-core/N64System/Mips/MemoryVirtualMem.cpp +++ b/Source/Project64-core/N64System/Mips/MemoryVirtualMem.cpp @@ -28,6 +28,7 @@ CMipsMemoryVM::CMipsMemoryVM(CN64System & System, bool SavesReadOnly) : CDMA(*this, *this), m_Reg(System.m_Reg), m_AudioInterfaceHandler(System, System.m_Reg), + m_CartridgeDomain2Address1Handler(System.m_Reg), m_RDRAMRegistersHandler(System.m_Reg), m_RomMapped(false), m_DPCommandRegistersHandler(System, System.GetPlugins(), System.m_Reg), @@ -651,7 +652,7 @@ bool CMipsMemoryVM::LW_NonMemory(uint32_t PAddr, uint32_t* Value) case 0x04600000: m_PeripheralInterfaceHandler.Read32(PAddr, m_MemLookupValue.UW[0]); break; case 0x04700000: m_RDRAMInterfaceHandler.Read32(PAddr, m_MemLookupValue.UW[0]); break; case 0x04800000: m_SerialInterfaceHandler.Read32(PAddr, m_MemLookupValue.UW[0]); break; - case 0x05000000: Load32CartridgeDomain2Address1(); break; + case 0x05000000: m_CartridgeDomain2Address1Handler.Read32(PAddr, m_MemLookupValue.UW[0]); break; case 0x06000000: Load32CartridgeDomain1Address1(); break; case 0x08000000: Load32CartridgeDomain2Address2(); break; case 0x1FC00000: Load32PifRam(); break; @@ -771,7 +772,7 @@ bool CMipsMemoryVM::SW_NonMemory(uint32_t PAddr, uint32_t Value) case 0x04600000: m_PeripheralInterfaceHandler.Write32(PAddr, Value, 0xFFFFFFFF); break; case 0x04700000: m_RDRAMInterfaceHandler.Write32(PAddr, Value, 0xFFFFFFFF); break; case 0x04800000: m_SerialInterfaceHandler.Write32(PAddr, Value, 0xFFFFFFFF); break; - case 0x05000000: Write32CartridgeDomain2Address1(); break; + case 0x05000000: m_CartridgeDomain2Address1Handler.Write32(PAddr, Value, 0xFFFFFFFF); break; case 0x08000000: Write32CartridgeDomain2Address2(); break; case 0x1FC00000: Write32PifRam(); break; default: @@ -1107,51 +1108,6 @@ void CMipsMemoryVM::Load32CartridgeDomain1Address3(void) m_MemLookupValue.UW[0] = (m_MemLookupValue.UW[0] << 16) | m_MemLookupValue.UW[0]; } -void CMipsMemoryVM::Load32CartridgeDomain2Address1(void) -{ - // 64DD registers - if (EnableDisk()) - { - switch (m_MemLookupAddress & 0x1FFFFFFF) - { - case 0x05000500: m_MemLookupValue.UW[0] = g_Reg->ASIC_DATA; break; - case 0x05000504: m_MemLookupValue.UW[0] = g_Reg->ASIC_MISC_REG; break; - case 0x05000508: - m_MemLookupValue.UW[0] = g_Reg->ASIC_STATUS; - DiskGapSectorCheck(); - break; - case 0x0500050C: m_MemLookupValue.UW[0] = g_Reg->ASIC_CUR_TK; break; - case 0x05000510: m_MemLookupValue.UW[0] = g_Reg->ASIC_BM_STATUS; break; - case 0x05000514: m_MemLookupValue.UW[0] = g_Reg->ASIC_ERR_SECTOR; break; - case 0x05000518: m_MemLookupValue.UW[0] = g_Reg->ASIC_SEQ_STATUS; break; - case 0x0500051C: m_MemLookupValue.UW[0] = g_Reg->ASIC_CUR_SECTOR; break; - case 0x05000520: m_MemLookupValue.UW[0] = g_Reg->ASIC_HARD_RESET; break; - case 0x05000524: m_MemLookupValue.UW[0] = g_Reg->ASIC_C1_S0; break; - case 0x05000528: m_MemLookupValue.UW[0] = g_Reg->ASIC_HOST_SECBYTE; break; - case 0x0500052C: m_MemLookupValue.UW[0] = g_Reg->ASIC_C1_S2; break; - case 0x05000530: m_MemLookupValue.UW[0] = g_Reg->ASIC_SEC_BYTE; break; - case 0x05000534: m_MemLookupValue.UW[0] = g_Reg->ASIC_C1_S4; break; - case 0x05000538: m_MemLookupValue.UW[0] = g_Reg->ASIC_C1_S6; break; - case 0x0500053C: m_MemLookupValue.UW[0] = g_Reg->ASIC_CUR_ADDR; break; - case 0x05000540: m_MemLookupValue.UW[0] = g_Reg->ASIC_ID_REG; break; - case 0x05000544: m_MemLookupValue.UW[0] = g_Reg->ASIC_TEST_REG; break; - case 0x05000548: m_MemLookupValue.UW[0] = g_Reg->ASIC_TEST_PIN_SEL; break; - default: - m_MemLookupValue.UW[0] = m_MemLookupAddress & 0xFFFF; - m_MemLookupValue.UW[0] = (m_MemLookupValue.UW[0] << 16) | m_MemLookupValue.UW[0]; - if (HaveDebugger()) - { - g_Notify->BreakPoint(__FILE__, __LINE__); - } - } - } - else - { - m_MemLookupValue.UW[0] = m_MemLookupAddress & 0xFFFF; - m_MemLookupValue.UW[0] = (m_MemLookupValue.UW[0] << 16) | m_MemLookupValue.UW[0]; - } -} - void CMipsMemoryVM::Load32CartridgeDomain2Address2(void) { uint32_t offset = (m_MemLookupAddress & 0x1FFFFFFF) - 0x08000000; @@ -1232,39 +1188,6 @@ void CMipsMemoryVM::Load32Rom(void) } } -void CMipsMemoryVM::Write32CartridgeDomain2Address1(void) -{ - // 64DD registers - if (EnableDisk()) - { - switch (m_MemLookupAddress & 0xFFFFFFF) - { - case 0x05000500: g_Reg->ASIC_DATA = m_MemLookupValue.UW[0]; break; - case 0x05000508: - g_Reg->ASIC_CMD = m_MemLookupValue.UW[0]; - DiskCommand(); - break; - case 0x05000510: - //ASIC_BM_STATUS_CTL - g_Reg->ASIC_BM_CTL = m_MemLookupValue.UW[0]; - DiskBMControl(); - break; - case 0x05000518: - //ASIC_SEQ_STATUS_CTL - break; - case 0x05000520: DiskReset(); break; - case 0x05000528: g_Reg->ASIC_HOST_SECBYTE = m_MemLookupValue.UW[0]; break; - case 0x05000530: g_Reg->ASIC_SEC_BYTE = m_MemLookupValue.UW[0]; break; - case 0x05000548: g_Reg->ASIC_TEST_PIN_SEL = m_MemLookupValue.UW[0]; break; - default: - if (HaveDebugger()) - { - g_Notify->BreakPoint(__FILE__, __LINE__); - } - } - } -} - void CMipsMemoryVM::Write32CartridgeDomain2Address2(void) { uint32_t offset = (m_MemLookupAddress & 0x1FFFFFFF) - 0x08000000; diff --git a/Source/Project64-core/N64System/Mips/MemoryVirtualMem.h b/Source/Project64-core/N64System/Mips/MemoryVirtualMem.h index 1bd2c2872..a9646c92d 100644 --- a/Source/Project64-core/N64System/Mips/MemoryVirtualMem.h +++ b/Source/Project64-core/N64System/Mips/MemoryVirtualMem.h @@ -7,6 +7,7 @@ #include #include #include +#include #include #include #include @@ -142,12 +143,10 @@ private: static void Load32CartridgeDomain1Address1(void); static void Load32CartridgeDomain1Address3(void); - static void Load32CartridgeDomain2Address1(void); static void Load32CartridgeDomain2Address2(void); static void Load32PifRam(void); static void Load32Rom(void); - static void Write32CartridgeDomain2Address1(void); static void Write32CartridgeDomain2Address2(void); static void Write32PifRam(void); @@ -177,6 +176,7 @@ private: static uint8_t * m_Reserve1, *m_Reserve2; CRegisters & m_Reg; AudioInterfaceHandler m_AudioInterfaceHandler; + CartridgeDomain2Address1Handler m_CartridgeDomain2Address1Handler; DisplayControlRegHandler m_DPCommandRegistersHandler; MIPSInterfaceHandler m_MIPSInterfaceHandler; PeripheralInterfaceHandler m_PeripheralInterfaceHandler; diff --git a/Source/Project64-core/N64System/Mips/Register.cpp b/Source/Project64-core/N64System/Mips/Register.cpp index dd01a50f4..ac1cc4a2d 100644 --- a/Source/Project64-core/N64System/Mips/Register.cpp +++ b/Source/Project64-core/N64System/Mips/Register.cpp @@ -87,32 +87,6 @@ DisplayControlReg::DisplayControlReg(uint32_t * _DisplayProcessor) : { } -Disk_InterfaceReg::Disk_InterfaceReg(uint32_t * DiskInterface) : - ASIC_DATA(DiskInterface[0]), - ASIC_MISC_REG(DiskInterface[1]), - ASIC_STATUS(DiskInterface[2]), - ASIC_CUR_TK(DiskInterface[3]), - ASIC_BM_STATUS(DiskInterface[4]), - ASIC_ERR_SECTOR(DiskInterface[5]), - ASIC_SEQ_STATUS(DiskInterface[6]), - ASIC_CUR_SECTOR(DiskInterface[7]), - ASIC_HARD_RESET(DiskInterface[8]), - ASIC_C1_S0(DiskInterface[9]), - ASIC_HOST_SECBYTE(DiskInterface[10]), - ASIC_C1_S2(DiskInterface[11]), - ASIC_SEC_BYTE(DiskInterface[12]), - ASIC_C1_S4(DiskInterface[13]), - ASIC_C1_S6(DiskInterface[14]), - ASIC_CUR_ADDR(DiskInterface[15]), - ASIC_ID_REG(DiskInterface[16]), - ASIC_TEST_REG(DiskInterface[17]), - ASIC_TEST_PIN_SEL(DiskInterface[18]), - ASIC_CMD(DiskInterface[19]), - ASIC_BM_CTL(DiskInterface[20]), - ASIC_SEQ_CTL(DiskInterface[21]) -{ -} - CRegisters::CRegisters(CN64System * System, CSystemEvents * SystemEvents) : CP0registers(m_CP0), RDRAMRegistersReg(m_RDRAM_Registers), @@ -124,7 +98,7 @@ CRegisters::CRegisters(CN64System * System, CSystemEvents * SystemEvents) : SPRegistersReg(m_SigProcessor_Interface), DisplayControlReg(m_Display_ControlReg), SerialInterfaceReg(m_SerialInterface), - Disk_InterfaceReg(m_DiskInterface), + DiskInterfaceReg(m_DiskInterface), m_System(System), m_SystemEvents(SystemEvents) { diff --git a/Source/Project64-core/N64System/Mips/Register.h b/Source/Project64-core/N64System/Mips/Register.h index 17c34dfed..12bc6111f 100644 --- a/Source/Project64-core/N64System/Mips/Register.h +++ b/Source/Project64-core/N64System/Mips/Register.h @@ -3,6 +3,7 @@ #include #include #include +#include #include #include #include @@ -222,72 +223,6 @@ enum PI_CLR_INTR = 0x02, }; -// Disk interface -class Disk_InterfaceReg -{ -protected: - Disk_InterfaceReg (uint32_t * Disk_Interface); - -public: - uint32_t & ASIC_DATA; - uint32_t & ASIC_MISC_REG; - uint32_t & ASIC_STATUS; - uint32_t & ASIC_CMD; - uint32_t & ASIC_CUR_TK; - uint32_t & ASIC_BM_STATUS; - uint32_t & ASIC_BM_CTL; - uint32_t & ASIC_ERR_SECTOR; - uint32_t & ASIC_SEQ_STATUS; - uint32_t & ASIC_SEQ_CTL; - uint32_t & ASIC_CUR_SECTOR; - uint32_t & ASIC_HARD_RESET; - uint32_t & ASIC_C1_S0; - uint32_t & ASIC_HOST_SECBYTE; - uint32_t & ASIC_C1_S2; - uint32_t & ASIC_SEC_BYTE; - uint32_t & ASIC_C1_S4; - uint32_t & ASIC_C1_S6; - uint32_t & ASIC_CUR_ADDR; - uint32_t & ASIC_ID_REG; - uint32_t & ASIC_TEST_REG; - uint32_t & ASIC_TEST_PIN_SEL; - -private: - Disk_InterfaceReg(); - Disk_InterfaceReg(const Disk_InterfaceReg&); - Disk_InterfaceReg& operator=(const Disk_InterfaceReg&); -}; - -// Disk interface flags -enum -{ - DD_STATUS_DATA_RQ = 0x40000000, - DD_STATUS_C2_XFER = 0x10000000, - DD_STATUS_BM_ERR = 0x08000000, - DD_STATUS_BM_INT = 0x04000000, - DD_STATUS_MECHA_INT = 0x02000000, - DD_STATUS_DISK_PRES = 0x01000000, - DD_STATUS_BUSY_STATE = 0x00800000, - DD_STATUS_RST_STATE = 0x00400000, - DD_STATUS_MTR_N_SPIN = 0x00100000, - DD_STATUS_HEAD_RTRCT = 0x00080000, - DD_STATUS_WR_PR_ERR = 0x00040000, - DD_STATUS_MECHA_ERR = 0x00020000, - DD_STATUS_DISK_CHNG = 0x00010000, - - DD_BM_STATUS_RUNNING = 0x80000000, - DD_BM_STATUS_ERROR = 0x04000000, - DD_BM_STATUS_MICRO = 0x02000000, - DD_BM_STATUS_BLOCK = 0x01000000, - - DD_BM_CTL_START = 0x80000000, - DD_BM_CTL_MNGRMODE = 0x40000000, - DD_BM_CTL_INTMASK = 0x20000000, - DD_BM_CTL_RESET = 0x10000000, - DD_BM_CTL_BLK_TRANS = 0x02000000, - DD_BM_CTL_MECHA_RST = 0x01000000 -}; - class CRegName { public: @@ -333,7 +268,7 @@ class CRegisters : public SPRegistersReg, public DisplayControlReg, public SerialInterfaceReg, - public Disk_InterfaceReg + public DiskInterfaceReg { public: CRegisters(CN64System * System, CSystemEvents * SystemEvents); @@ -386,7 +321,7 @@ private: CRegisters(const CRegisters&); CRegisters& operator=(const CRegisters&); - bool m_FirstInterupt; - CN64System * m_System; + bool m_FirstInterupt; + CN64System * m_System; CSystemEvents * m_SystemEvents; }; diff --git a/Source/Project64-core/Project64-core.vcxproj b/Source/Project64-core/Project64-core.vcxproj index 1908be0ab..d92508eaa 100644 --- a/Source/Project64-core/Project64-core.vcxproj +++ b/Source/Project64-core/Project64-core.vcxproj @@ -54,6 +54,7 @@ + @@ -157,6 +158,7 @@ + diff --git a/Source/Project64-core/Project64-core.vcxproj.filters b/Source/Project64-core/Project64-core.vcxproj.filters index b944060ac..ee3919ee1 100644 --- a/Source/Project64-core/Project64-core.vcxproj.filters +++ b/Source/Project64-core/Project64-core.vcxproj.filters @@ -381,6 +381,9 @@ Source Files\N64 System\MemoryHandler + + Source Files\N64 System\MemoryHandler + @@ -728,6 +731,9 @@ Header Files\N64 System\MemoryHandler + + Header Files\N64 System\MemoryHandler +