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Rsp: Change RSPOpC to be a class member

This commit is contained in:
zilmar 2024-08-08 12:55:54 +09:30
parent 762d1b1566
commit 9f98f4d4cd
16 changed files with 1889 additions and 1877 deletions
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9
Source/Project64-rsp-core/Recompiler/RspRecompilerCPU.cpp
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@ -41,7 +41,8 @@ p_Recompfunc RSP_Recomp_Lc2[32];
p_Recompfunc RSP_Recomp_Sc2[32];
CRSPRecompiler::CRSPRecompiler(CRSPSystem & System) :
m_System(System)
m_System(System),
m_OpCode(System.m_OpCode)
{
}
@ -871,7 +872,7 @@ void CRSPRecompiler::CompilerRSPBlock(void)
CPU_Message("X86 Address: %08X", RecompPos);
}
#endif
RSP_LW_IMEM(CompilePC, &RSPOpC.Value);
RSP_LW_IMEM(CompilePC, &m_OpCode.Value);
if (LogRDP && NextInstruction != RSPPIPELINE_DELAY_SLOT_DONE)
{
@ -882,14 +883,14 @@ void CRSPRecompiler::CompilerRSPBlock(void)
AddConstToX86Reg(x86_ESP, 4);
}
if (RSPOpC.Value == 0xFFFFFFFF)
if (m_OpCode.Value == 0xFFFFFFFF)
{
// I think this pops up an unknown OP dialog
// NextInstruction = RSPPIPELINE_FINISH_BLOCK;
}
else
{
(RecompilerOps.*RSP_Recomp_Opcode[RSPOpC.op])();
(RecompilerOps.*RSP_Recomp_Opcode[m_OpCode.op])();
}
switch (NextInstruction)

1
Source/Project64-rsp-core/Recompiler/RspRecompilerCPU.h
View File

@ -40,6 +40,7 @@ private:
void ReOrderSubBlock(RSP_BLOCK * Block);
CRSPSystem & m_System;
RSPOpcode & m_OpCode;
RSP_BLOCK m_CurrentBlock;
};

2919
Source/Project64-rsp-core/Recompiler/RspRecompilerOps.cpp
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File diff suppressed because it is too large Load Diff

1
Source/Project64-rsp-core/Recompiler/RspRecompilerOps.h
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@ -204,6 +204,7 @@ private:
CRSPSystem & m_System;
CRSPRegisters & m_Reg;
CRSPRecompiler & m_Recompiler;
RSPOpcode & m_OpCode;
UWORD32 * m_GPR;
UDWORD * m_ACCUM;
UWORD32 * m_Flags;

46
Source/Project64-rsp-core/Recompiler/RspRecompilerSections.cpp
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@ -23,7 +23,7 @@ void CRSPRecompilerOps::RSP_Sections_VMUDH(RSPOpcode RspOp, uint32_t AccumStyle)
return;
}
RSPOpC = RspOp;
m_OpCode = RspOp;
// Load source registers
sprintf(Reg, "m_Vect[%i].HW[0]", RspOp.rd);
@ -91,7 +91,7 @@ void CRSPRecompilerOps::RSP_Sections_VMADH(RSPOpcode RspOp, uint32_t AccumStyle)
return;
}
RSPOpC = RspOp;
m_OpCode = RspOp;
// Load source registers
sprintf(Reg, "m_Vect[%i].HW[0]", RspOp.rd);
@ -164,7 +164,7 @@ void CRSPRecompilerOps::RSP_Sections_VMUDL(RSPOpcode RspOp, uint32_t AccumStyle)
return;
}
RSPOpC = RspOp;
m_OpCode = RspOp;
// Load source registers
sprintf(Reg, "m_Vect[%i].HW[0]", RspOp.rd);
@ -210,7 +210,7 @@ void CRSPRecompilerOps::RSP_Sections_VMUDN(RSPOpcode RspOp, uint32_t AccumStyle)
return;
}
RSPOpC = RspOp;
m_OpCode = RspOp;
// VMUDN
if (AccumStyle != Middle16BitAccum)
@ -259,14 +259,14 @@ void CRSPRecompilerOps::RSP_Sections_VMUDN(RSPOpcode RspOp, uint32_t AccumStyle)
sprintf(Reg, "m_Vect[%i].HW[4]", RspOp.rd);
MmxMoveQwordVariableToReg(x86_MM5, &m_Vect[RspOp.rd].s16(4), Reg);
if ((RSPOpC.rs & 0xF) < 2)
if ((m_OpCode.rs & 0xF) < 2)
{
sprintf(Reg, "m_Vect[%i].UHW[0]", RSPOpC.rt);
MmxMoveQwordVariableToReg(x86_MM0, &m_Vect[RSPOpC.vt].u16(0), Reg);
sprintf(Reg, "m_Vect[%i].UHW[4]", RSPOpC.rt);
MmxMoveQwordVariableToReg(x86_MM1, &m_Vect[RSPOpC.vt].u16(4), Reg);
sprintf(Reg, "m_Vect[%i].UHW[0]", m_OpCode.rt);
MmxMoveQwordVariableToReg(x86_MM0, &m_Vect[m_OpCode.vt].u16(0), Reg);
sprintf(Reg, "m_Vect[%i].UHW[4]", m_OpCode.rt);
MmxMoveQwordVariableToReg(x86_MM1, &m_Vect[m_OpCode.vt].u16(4), Reg);
}
else if ((RSPOpC.rs & 0xF) >= 8)
else if ((m_OpCode.rs & 0xF) >= 8)
{
RSP_Element2Mmx(x86_MM0);
MmxMoveRegToReg(x86_MM1, x86_MM0);
@ -307,7 +307,7 @@ void CRSPRecompilerOps::RSP_Sections_VMADN(RSPOpcode RspOp, uint32_t AccumStyle)
return;
}
RSPOpC = RspOp;
m_OpCode = RspOp;
// VMADN
if (AccumStyle != Middle16BitAccum)
@ -355,14 +355,14 @@ void CRSPRecompilerOps::RSP_Sections_VMADN(RSPOpcode RspOp, uint32_t AccumStyle)
sprintf(Reg, "m_Vect[%i].HW[4]", RspOp.rd);
MmxMoveQwordVariableToReg(x86_MM5 + 2, &m_Vect[RspOp.rd].s16(4), Reg);
if ((RSPOpC.rs & 0xF) < 2)
if ((m_OpCode.rs & 0xF) < 2)
{
sprintf(Reg, "m_Vect[%i].UHW[0]", RSPOpC.rt);
MmxMoveQwordVariableToReg(x86_MM0 + 2, &m_Vect[RSPOpC.vt].u16(0), Reg);
sprintf(Reg, "m_Vect[%i].UHW[4]", RSPOpC.rt);
MmxMoveQwordVariableToReg(x86_MM1 + 2, &m_Vect[RSPOpC.vt].u16(4), Reg);
sprintf(Reg, "m_Vect[%i].UHW[0]", m_OpCode.rt);
MmxMoveQwordVariableToReg(x86_MM0 + 2, &m_Vect[m_OpCode.vt].u16(0), Reg);
sprintf(Reg, "m_Vect[%i].UHW[4]", m_OpCode.rt);
MmxMoveQwordVariableToReg(x86_MM1 + 2, &m_Vect[m_OpCode.vt].u16(4), Reg);
}
else if ((RSPOpC.rs & 0xF) >= 8)
else if ((m_OpCode.rs & 0xF) >= 8)
{
RSP_Element2Mmx(x86_MM0 + 2);
MmxMoveRegToReg(x86_MM1 + 2, x86_MM0 + 2);
@ -411,7 +411,7 @@ void CRSPRecompilerOps::RSP_Sections_VMULF(RSPOpcode RspOp, uint32_t AccumStyle)
return;
}
RSPOpC = RspOp;
m_OpCode = RspOp;
// Load source registers
sprintf(Reg, "m_Vect[%i].HW[0]", RspOp.rd);
@ -482,7 +482,7 @@ void CRSPRecompilerOps::RSP_Sections_VMACF(RSPOpcode RspOp, uint32_t AccumStyle)
return;
}
RSPOpC = RspOp;
m_OpCode = RspOp;
// Load source registers
sprintf(Reg, "m_Vect[%i].HW[0]", RspOp.rd);
@ -871,15 +871,15 @@ void CRSPRecompilerOps::Compile_Section_002(void)
// VSAWs
vsaw = op[10];
MmxXorRegToReg(x86_MM4, x86_MM4);
sprintf(Reg, "m_Vect[%i].HW[0]", RSPOpC.sa);
sprintf(Reg, "m_Vect[%i].HW[0]", m_OpCode.sa);
MmxMoveQwordRegToVariable(x86_MM4, &m_Vect[vsaw.sa].s16(0), Reg);
sprintf(Reg, "m_Vect[%i].HW[4]", RSPOpC.sa);
sprintf(Reg, "m_Vect[%i].HW[4]", m_OpCode.sa);
MmxMoveQwordRegToVariable(x86_MM4, &m_Vect[vsaw.sa].s16(4), Reg);
vsaw = op[11];
sprintf(Reg, "m_Vect[%i].HW[0]", RSPOpC.sa);
sprintf(Reg, "m_Vect[%i].HW[0]", m_OpCode.sa);
MmxMoveQwordRegToVariable(x86_MM0, &m_Vect[vsaw.sa].s16(0), Reg);
sprintf(Reg, "m_Vect[%i].HW[4]", RSPOpC.sa);
sprintf(Reg, "m_Vect[%i].HW[4]", m_OpCode.sa);
MmxMoveQwordRegToVariable(x86_MM1, &m_Vect[vsaw.sa].s16(4), Reg);
MmxEmptyMultimediaState();

1
Source/Project64-rsp-core/cpu/RSPCpu.cpp
View File

@ -12,7 +12,6 @@
class RSPRegisterHandler;
UDWORD EleSpec[16], Indx[16];
RSPOpcode RSPOpC;
uint32_t *PrgCount, NextInstruction, RSP_Running;
void BuildRecompilerCPU(void);

1
Source/Project64-rsp-core/cpu/RSPCpu.h
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@ -14,7 +14,6 @@ enum RSPCpuType
extern UDWORD EleSpec[16], Indx[16];
extern uint32_t *PrgCount, RSP_Running;
extern RSPOpcode RSPOpC;
void SetCPU(RSPCpuType core);
void Build_RSP(void);

15
Source/Project64-rsp-core/cpu/RSPInterpreterCPU.cpp
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@ -9,18 +9,3 @@
RSPPIPELINE_STAGE RSP_NextInstruction;
uint32_t RSP_JumpTo;
unsigned int RSP_branch_if(int condition)
{
unsigned int new_PC;
if (condition)
{
new_PC = *PrgCount + 4 + ((short)RSPOpC.offset << 2);
}
else
{
new_PC = *PrgCount + 4 + 4;
}
return (new_PC & 0xFFC);
}

5
Source/Project64-rsp-core/cpu/RSPInterpreterCPU.h
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@ -17,8 +17,3 @@ enum RSPPIPELINE_STAGE
extern RSPPIPELINE_STAGE RSP_NextInstruction;
extern uint32_t RSP_JumpTo;
// Standard MIPS PC-relative branch
// Returns the new PC, based on whether the condition passes
unsigned int RSP_branch_if(int condition);

726
Source/Project64-rsp-core/cpu/RSPInterpreterOps.cpp
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File diff suppressed because it is too large Load Diff

3
Source/Project64-rsp-core/cpu/RSPInterpreterOps.h
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@ -1,4 +1,5 @@
#pragma once
#include <Project64-rsp-core/cpu/RSPOpcode.h>
#include <Project64-rsp-core/cpu/RspTypes.h>
class CRSPSystem;
@ -167,6 +168,7 @@ private:
// Other functions
void UnknownOpcode(void);
uint32_t BranchIf(bool Condition);
typedef void (RSPOp::*Func)();
@ -180,6 +182,7 @@ private:
Func Jump_Sc2[32];
CRSPSystem & m_System;
RSPOpcode & m_OpCode;
CRSPRegisters & m_Reg;
UWORD32 * m_GPR;
UDWORD * m_ACCUM;

6
Source/Project64-rsp-core/cpu/RspSystem.cpp
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@ -8,7 +8,7 @@
CRSPSystem RSPSystem;
CRSPSystem::CRSPSystem() :
m_OpCodes(*this)
m_Op(*this)
{
}
@ -34,8 +34,8 @@ uint32_t CRSPSystem::RunInterpreterCPU(uint32_t Cycles)
{
g_RSPDebugger->BeforeExecuteOp();
}
RSPOpC.Value = *(uint32_t *)(RSPInfo.IMEM + (*PrgCount & 0xFFC));
(m_OpCodes.*(m_OpCodes.Jump_Opcode[RSPOpC.op]))();
m_OpCode.Value = *(uint32_t *)(RSPInfo.IMEM + (*PrgCount & 0xFFC));
(m_Op.*(m_Op.Jump_Opcode[m_OpCode.op]))();
GprR0 = 0x00000000; // MIPS $zero hard-wired to 0
switch (RSP_NextInstruction)

6
Source/Project64-rsp-core/cpu/RspSystem.h
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@ -1,5 +1,6 @@
#pragma once
#include <Project64-rsp-core/cpu/RSPInterpreterOps.h>
#include <Project64-rsp-core/cpu/RSPRegisters.h>
#include <Project64-rsp-core/cpu/RspTypes.h>
#include <stdint.h>
@ -7,6 +8,8 @@ class CRSPSystem
{
friend class RSPOp;
friend class CRSPRecompilerOps;
friend class CRSPRecompiler;
friend class RSPDebuggerUI;
friend void UpdateRSPRegistersScreen(void);
public:
@ -18,7 +21,8 @@ public:
private:
CRSPRegisters m_Reg;
RSPOp m_OpCodes;
RSPOp m_Op;
RSPOpcode m_OpCode;
};
extern CRSPSystem RSPSystem;

11
Source/Project64-rsp/Debugger/RSPDebuggerUI.cpp
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@ -6,12 +6,19 @@
#include <Project64-rsp-core/cpu/RSPCpu.h>
#include <Project64-rsp-core/cpu/RSPInstruction.h>
#include <Project64-rsp-core/cpu/RspLog.h>
#include <Project64-rsp-core/cpu/RspSystem.h>
#include <Project64-rsp/RSP Command.h>
#include <Project64-rsp/breakpoint.h>
void UpdateRSPRegistersScreen(void);
void RDP_LogLoc(DWORD /*PC*/);
RSPDebuggerUI::RSPDebuggerUI(CRSPSystem & System) :
m_System(System),
m_OpCode(System.m_OpCode)
{
}
void RSPDebuggerUI::ResetTimerList(void)
{
::ResetTimerList();
@ -98,12 +105,12 @@ void RSPDebuggerUI::UnknownOpcode(void)
if (InRSPCommandsWindow)
{
SetRSPCommandViewto(*RSPInfo.SP_PC_REG);
DisplayError("Unhandled Opcode\n%s\n\nStopping emulation", RSPInstruction(*RSPInfo.SP_PC_REG, RSPOpC.Value).NameAndParam().c_str());
DisplayError("Unhandled Opcode\n%s\n\nStopping emulation", RSPInstruction(*RSPInfo.SP_PC_REG, m_OpCode.Value).NameAndParam().c_str());
}
else
{
sprintf(Message, "Unhandled Opcode\n%s\n\nStopping emulation.\n\nWould you like to open the debugger?",
RSPInstruction(*RSPInfo.SP_PC_REG, RSPOpC.Value).NameAndParam().c_str());
RSPInstruction(*RSPInfo.SP_PC_REG, m_OpCode.Value).NameAndParam().c_str());
response = MessageBoxA(NULL, Message, "Error", MB_YESNO | MB_ICONERROR);
if (response == IDYES)
{

11
Source/Project64-rsp/Debugger/RSPDebuggerUI.h
View File

@ -1,10 +1,15 @@
#pragma once
#include <Project64-rsp-core\RSPDebugger.h>
#include <Project64-rsp-core/RSPDebugger.h>
#include <Project64-rsp-core/cpu/RSPOpcode.h>
class CRSPSystem;
class RSPDebuggerUI :
public RSPDebugger
{
public:
RSPDebuggerUI(CRSPSystem & System);
void ResetTimerList(void);
void StartingCPU(void);
void RspCyclesStart(void);
@ -12,4 +17,8 @@ public:
void BeforeExecuteOp(void);
void UnknownOpcode(void);
void RDP_LogMF0(uint32_t PC, uint32_t Reg);
private:
CRSPSystem & m_System;
RSPOpcode & m_OpCode;
};

3
Source/Project64-rsp/Main.cpp
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@ -31,6 +31,7 @@
#include <Project64-rsp-core/cpu/RSPRegisters.h>
#include <Project64-rsp-core/cpu/RspLog.h>
#include <Project64-rsp-core/cpu/RspMemory.h>
#include <Project64-rsp-core/cpu/RspSystem.h>
#include <Project64-rsp-core/cpu/RspTypes.h>
void ProcessMenuItem(int32_t ID);
@ -257,7 +258,7 @@ Output: None
*/
EXPORT void InitiateRSP(RSP_INFO Rsp_Info, uint32_t * CycleCount)
{
g_RSPDebuggerUI.reset(new RSPDebuggerUI);
g_RSPDebuggerUI.reset(new RSPDebuggerUI(RSPSystem));
g_RSPDebugger = g_RSPDebuggerUI.get();
InitilizeRSP(Rsp_Info);
*CycleCount = 0;