Core: Get tlb addresses to be 64bit

Source/Project64-core/N64System/Mips/MemoryVirtualMem.cpp

@@ -1030,34 +1030,43 @@ const char * CMipsMemoryVM::LabelName(uint32_t Address) const
     return m_strLabelName;
 }
 
-void CMipsMemoryVM::TLB_Mapped(uint32_t VAddr, uint32_t Len, uint32_t PAddr, bool bReadOnly)
+void CMipsMemoryVM::TLB_Mapped(uint64_t VAddr, uint32_t Len, uint32_t PAddr, bool bReadOnly)
 {
-    uint32_t VEnd = VAddr + Len;
+    uint64_t VEnd = VAddr + Len;
-    for (uint32_t Address = VAddr; Address < VEnd; Address += 0x1000)
+    for (uint64_t Address = VAddr; Address < VEnd; Address += 0x1000)
     {
-        size_t Index = Address >> 12;
+        if ((uint64_t)((int32_t)Address) != Address)
+        {
+            break;
+        }
+
+        size_t Index = (size_t)(Address >> 12);
         if ((Address - VAddr + PAddr) < m_AllocatedRdramSize)
         {
             m_MemoryReadMap[Index] = (size_t)((m_RDRAM + (Address - VAddr + PAddr)) - Address);
         }
-        m_TLB_ReadMap[Index] = ((size_t)(Address - VAddr + PAddr)) - Address;
+        m_TLB_ReadMap[Index] = (size_t)((Address - VAddr + PAddr) - Address);
         if (!bReadOnly)
         {
             if ((Address - VAddr + PAddr) < m_AllocatedRdramSize)
             {
                 m_MemoryWriteMap[Index] = (size_t)((m_RDRAM + (Address - VAddr + PAddr)) - Address);
             }
-            m_TLB_WriteMap[Index] = ((size_t)(Address - VAddr + PAddr)) - Address;
+            m_TLB_WriteMap[Index] = (size_t)((Address - VAddr + PAddr) - Address);
         }
     }
 }
 
-void CMipsMemoryVM::TLB_Unmaped(uint32_t Vaddr, uint32_t Len)
+void CMipsMemoryVM::TLB_Unmaped(uint64_t Vaddr, uint32_t Len)
 {
-    uint32_t End = Vaddr + Len;
+    uint64_t End = Vaddr + Len;
-    for (uint32_t Address = Vaddr; Address < End; Address += 0x1000)
+    for (uint64_t Address = Vaddr; Address < End && Address >= Vaddr; Address += 0x1000)
     {
-        size_t Index = Address >> 12;
+        if ((uint64_t)((int32_t)Address) != Address)
+        {
+            continue;
+        }
+        size_t Index = (size_t)(Address >> 12);
         m_MemoryReadMap[Index] = (size_t)-1;
         m_MemoryWriteMap[Index] = (size_t)-1;
         m_TLB_ReadMap[Index] = (uint32_t)-1;

Source/Project64-core/N64System/Mips/MemoryVirtualMem.h

@@ -122,8 +122,8 @@ public:
     void UnProtectMemory(uint32_t StartVaddr, uint32_t EndVaddr);
 
     // Functions for TLB notification
-    void TLB_Mapped(uint32_t VAddr, uint32_t Len, uint32_t PAddr, bool bReadOnly);
+    void TLB_Mapped(uint64_t VAddr, uint32_t Len, uint32_t PAddr, bool bReadOnly);
-    void TLB_Unmaped(uint32_t Vaddr, uint32_t Len);
+    void TLB_Unmaped(uint64_t Vaddr, uint32_t Len);
 
     bool ValidVaddr(uint32_t VAddr) const;
     bool VAddrToPAddr(uint32_t VAddr, uint32_t & PAddr) const;

Source/Project64-core/N64System/Mips/Register.cpp

@@ -232,10 +232,10 @@ uint32_t * CSystemRegisters::_LLBit = nullptr;
 CP0registers::CP0registers(uint64_t * _CP0) :
     INDEX_REGISTER(_CP0[0]),
     RANDOM_REGISTER(_CP0[1]),
-    ENTRYLO0_REGISTER(_CP0[2]),
+    ENTRYLO0_REGISTER((COP0EntryLo &)_CP0[2]),
-    ENTRYLO1_REGISTER(_CP0[3]),
+    ENTRYLO1_REGISTER((COP0EntryLo &)_CP0[3]),
     CONTEXT_REGISTER((COP0Context &)_CP0[4]),
-    PAGE_MASK_REGISTER(_CP0[5]),
+    PAGE_MASK_REGISTER((COP0PageMask &)_CP0[5]),
     WIRED_REGISTER(_CP0[6]),
     BAD_VADDR_REGISTER(_CP0[8]),
     COUNT_REGISTER(_CP0[9]),

Source/Project64-core/N64System/Mips/Register.h

@@ -124,10 +124,10 @@ union COP0Context
 
     struct
     {
-        unsigned : 4;
+        uint64_t : 4;
-        unsigned BadVPN2 : 19;
+        uint64_t BadVPN2 : 19;
-        unsigned PTEBaseHi : 9;
+        uint64_t PTEBaseHi : 9;
-        unsigned PTEBaseLo : 32;
+        uint64_t PTEBaseLo : 32;
     };
 };
 
@@ -210,10 +210,10 @@ protected:
 public:
     uint64_t & INDEX_REGISTER;
     uint64_t & RANDOM_REGISTER;
-    uint64_t & ENTRYLO0_REGISTER;
+    COP0EntryLo & ENTRYLO0_REGISTER;
-    uint64_t & ENTRYLO1_REGISTER;
+    COP0EntryLo & ENTRYLO1_REGISTER;
     COP0Context & CONTEXT_REGISTER;
-    uint64_t & PAGE_MASK_REGISTER;
+    COP0PageMask & PAGE_MASK_REGISTER;
     uint64_t & WIRED_REGISTER;
     uint64_t & BAD_VADDR_REGISTER;
     uint64_t & COUNT_REGISTER;

Source/Project64-core/N64System/Mips/TLB.cpp

@@ -76,19 +76,17 @@ TLB_ENTRY & CTLB::TlbEntry(int32_t Entry)
 
 void CTLB::Probe()
 {
-    int Counter;
-
     WriteTrace(TraceTLB, TraceDebug, "Start");
-    m_Reg.INDEX_REGISTER |= 0x80000000;
+    m_Reg.INDEX_REGISTER = 0x80000000;
-    for (Counter = 0; Counter < 32; Counter++)
+    for (uint32_t i = 0; i < 32; i++)
     {
-        if (!m_tlb[Counter].EntryDefined)
+        if (!m_tlb[i].EntryDefined)
         {
             continue;
         }
 
-        uint64_t & TlbEntryHiValue = m_tlb[Counter].EntryHi.Value;
+        uint64_t & TlbEntryHiValue = m_tlb[i].EntryHi.Value;
-        uint32_t Mask = (uint32_t)(~m_tlb[Counter].PageMask.Mask << 13);
+        uint32_t Mask = (uint32_t)(~m_tlb[i].PageMask.Mask << 13);
         uint32_t TlbValueMasked = TlbEntryHiValue & Mask;
         uint32_t EntryHiMasked = m_Reg.ENTRYHI_REGISTER.Value & Mask;
 
@@ -97,8 +95,8 @@ void CTLB::Probe()
             if ((TlbEntryHiValue & 0x100) != 0 ||                                    // Global
                 ((TlbEntryHiValue & 0xFF) == (m_Reg.ENTRYHI_REGISTER.Value & 0xFF))) // SameAsid
             {
-                m_Reg.INDEX_REGISTER = Counter;
+                m_Reg.INDEX_REGISTER = i;
-                int FastIndx = Counter << 1;
+                uint32_t FastIndx = i << 1;
                 m_FastTlb[FastIndx].Probed = true;
                 m_FastTlb[FastIndx + 1].Probed = true;
                 return;
@@ -112,27 +110,25 @@ void CTLB::ReadEntry()
 {
     uint32_t Index = m_Reg.INDEX_REGISTER & 0x1F;
 
-    m_Reg.PAGE_MASK_REGISTER = m_tlb[Index].PageMask.Value;
+    m_Reg.PAGE_MASK_REGISTER.Value = m_tlb[Index].PageMask.Value;
     m_Reg.ENTRYHI_REGISTER.Value = (m_tlb[Index].EntryHi.Value & ~m_tlb[Index].PageMask.Value);
-    m_Reg.ENTRYLO0_REGISTER = m_tlb[Index].EntryLo0.Value;
+    m_Reg.ENTRYLO0_REGISTER.Value = m_tlb[Index].EntryLo0.Value;
-    m_Reg.ENTRYLO1_REGISTER = m_tlb[Index].EntryLo1.Value;
+    m_Reg.ENTRYLO1_REGISTER.Value = m_tlb[Index].EntryLo1.Value;
 }
 
 void CTLB::WriteEntry(uint32_t Index, bool Random)
 {
-    uint32_t FastIndx;
+    WriteTrace(TraceTLB, TraceDebug, "%02d %d %I64X %I64X %I64X %I64X", Index, Random, m_Reg.PAGE_MASK_REGISTER, m_Reg.ENTRYHI_REGISTER, m_Reg.ENTRYLO0_REGISTER, m_Reg.ENTRYLO1_REGISTER);
-
-    WriteTrace(TraceTLB, TraceDebug, "%02d %d %08X %08X %08X %08X ", Index, Random, m_Reg.PAGE_MASK_REGISTER, m_Reg.ENTRYHI_REGISTER, m_Reg.ENTRYLO0_REGISTER, m_Reg.ENTRYLO1_REGISTER);
 
     // Check to see if entry is unmapping itself
     if (m_tlb[Index].EntryDefined)
     {
-        FastIndx = Index << 1;
+        uint32_t FastIndx = Index << 1;
         if (*_PROGRAM_COUNTER >= m_FastTlb[FastIndx].VSTART &&
             *_PROGRAM_COUNTER < m_FastTlb[FastIndx].VEND &&
             m_FastTlb[FastIndx].ValidEntry && m_FastTlb[FastIndx].VALID)
         {
-            WriteTrace(TraceTLB, TraceDebug, "Ignored PC: %X VAddr Start: %X VEND: %X", *_PROGRAM_COUNTER, m_FastTlb[FastIndx].VSTART, m_FastTlb[FastIndx].VEND);
+            WriteTrace(TraceTLB, TraceDebug, "Ignored PC: %X VAddr Start: %I64X VEND: %I64X", *_PROGRAM_COUNTER, m_FastTlb[FastIndx].VSTART, m_FastTlb[FastIndx].VEND);
             return;
         }
         if (*_PROGRAM_COUNTER >= m_FastTlb[FastIndx + 1].VSTART &&
@@ -147,7 +143,7 @@ void CTLB::WriteEntry(uint32_t Index, bool Random)
     // Reset old addresses
     if (m_tlb[Index].EntryDefined)
     {
-        for (FastIndx = Index << 1; FastIndx <= (Index << 1) + 1; FastIndx++)
+        for (uint32_t FastIndx = Index << 1; FastIndx <= (Index << 1) + 1; FastIndx++)
         {
             if (!m_FastTlb[FastIndx].ValidEntry)
             {
@@ -157,14 +153,14 @@ void CTLB::WriteEntry(uint32_t Index, bool Random)
             {
                 continue;
             }
-            if (m_tlb[Index].PageMask.Value == m_Reg.PAGE_MASK_REGISTER &&
+            if (m_tlb[Index].PageMask.Value == m_Reg.PAGE_MASK_REGISTER.Value &&
                 m_tlb[Index].EntryHi.Value == m_Reg.ENTRYHI_REGISTER.Value)
             {
-                if (FastIndx == (Index << 1) && m_tlb[Index].EntryLo0.Value == m_Reg.ENTRYLO0_REGISTER)
+                if (FastIndx == (Index << 1) && m_tlb[Index].EntryLo0.Value == m_Reg.ENTRYLO0_REGISTER.Value)
                 {
                     continue;
                 }
-                if (FastIndx != (Index << 1) && m_tlb[Index].EntryLo1.Value == m_Reg.ENTRYLO1_REGISTER)
+                if (FastIndx != (Index << 1) && m_tlb[Index].EntryLo1.Value == m_Reg.ENTRYLO1_REGISTER.Value)
                 {
                     continue;
                 }
@@ -174,10 +170,16 @@ void CTLB::WriteEntry(uint32_t Index, bool Random)
     }
 
     // Fill in m_tlb entry
-    m_tlb[Index].PageMask.Value = (uint32_t)m_Reg.PAGE_MASK_REGISTER;
+    bool Gloabl = m_Reg.ENTRYLO0_REGISTER.GLOBAL & m_Reg.ENTRYLO1_REGISTER.GLOBAL;
-    m_tlb[Index].EntryHi.Value = (uint32_t)m_Reg.ENTRYHI_REGISTER.Value;
+    m_tlb[Index].PageMask.Value = m_Reg.PAGE_MASK_REGISTER.Value & 0x01554000;
-    m_tlb[Index].EntryLo0.Value = (uint32_t)m_Reg.ENTRYLO0_REGISTER;
+    m_tlb[Index].PageMask.Value |= m_tlb[Index].PageMask.Value >> 1;
-    m_tlb[Index].EntryLo1.Value = (uint32_t)m_Reg.ENTRYLO1_REGISTER;
+    m_tlb[Index].EntryHi = m_Reg.ENTRYHI_REGISTER;
+    m_tlb[Index].EntryLo0 = m_Reg.ENTRYLO0_REGISTER;
+    m_tlb[Index].EntryLo0.PFN = m_Reg.ENTRYLO0_REGISTER.PFN & 0xFFFFF;
+    m_tlb[Index].EntryLo0.GLOBAL = Gloabl;
+    m_tlb[Index].EntryLo1 = m_Reg.ENTRYLO1_REGISTER;
+    m_tlb[Index].EntryLo1.PFN = m_Reg.ENTRYLO1_REGISTER.PFN & 0xFFFFF;
+    m_tlb[Index].EntryLo1.GLOBAL = Gloabl;
     m_tlb[Index].EntryDefined = true;
     SetupTLB_Entry(Index, Random);
     if (g_Debugger != nullptr)
@@ -199,10 +201,10 @@ void CTLB::SetupTLB_Entry(uint32_t Index, bool Random)
     {
         TLB_Unmaped(m_FastTlb[FastIndx].VSTART, m_FastTlb[FastIndx].Length);
     }
-    m_FastTlb[FastIndx].Length = (uint32_t)((m_tlb[Index].PageMask.Mask << 12) + 0xFFF);
+    m_FastTlb[FastIndx].Length = (m_tlb[Index].PageMask.Mask << 12) + 0xFFF;
-    m_FastTlb[FastIndx].VSTART = (uint32_t)(m_tlb[Index].EntryHi.VPN2 << 13);
+    m_FastTlb[FastIndx].VSTART = m_tlb[Index].EntryHi.R << 62 | m_tlb[Index].EntryHi.VPN2 << 13;
     m_FastTlb[FastIndx].VEND = m_FastTlb[FastIndx].VSTART + m_FastTlb[FastIndx].Length;
-    m_FastTlb[FastIndx].PHYSSTART = (uint32_t)(m_tlb[Index].EntryLo0.PFN << 12);
+    m_FastTlb[FastIndx].PHYSSTART = m_tlb[Index].EntryLo0.PFN << 12;
     m_FastTlb[FastIndx].PHYSEND = m_FastTlb[FastIndx].PHYSSTART + m_FastTlb[FastIndx].Length;
     m_FastTlb[FastIndx].VALID = m_tlb[Index].EntryLo0.V;
     m_FastTlb[FastIndx].DIRTY = m_tlb[Index].EntryLo0.D;
@@ -216,10 +218,10 @@ void CTLB::SetupTLB_Entry(uint32_t Index, bool Random)
     {
         TLB_Unmaped(m_FastTlb[FastIndx].VSTART, m_FastTlb[FastIndx].Length);
     }
-    m_FastTlb[FastIndx].Length = (uint32_t)((m_tlb[Index].PageMask.Mask << 12) + 0xFFF);
+    m_FastTlb[FastIndx].Length = (m_tlb[Index].PageMask.Mask << 12) + 0xFFF;
-    m_FastTlb[FastIndx].VSTART = (uint32_t)((m_tlb[Index].EntryHi.VPN2 << 13) + (m_FastTlb[FastIndx].Length + 1));
+    m_FastTlb[FastIndx].VSTART = (m_tlb[Index].EntryHi.R << 62 | (m_tlb[Index].EntryHi.VPN2 << 13)) + (m_FastTlb[FastIndx].Length + 1);
     m_FastTlb[FastIndx].VEND = m_FastTlb[FastIndx].VSTART + m_FastTlb[FastIndx].Length;
-    m_FastTlb[FastIndx].PHYSSTART = (uint32_t)(m_tlb[Index].EntryLo1.PFN << 12);
+    m_FastTlb[FastIndx].PHYSSTART = m_tlb[Index].EntryLo1.PFN << 12;
     m_FastTlb[FastIndx].PHYSEND = m_FastTlb[FastIndx].PHYSSTART + m_FastTlb[FastIndx].Length;
     m_FastTlb[FastIndx].VALID = m_tlb[Index].EntryLo1.V;
     m_FastTlb[FastIndx].DIRTY = m_tlb[Index].EntryLo1.D;

Source/Project64-core/N64System/Mips/TLB.h

@@ -26,8 +26,8 @@ class CTLB :
 
     struct FASTTLB
     {
-        uint32_t VSTART;
+        uint64_t VSTART;
-        uint32_t VEND;
+        uint64_t VEND;
         uint32_t PHYSSTART;
         uint32_t PHYSEND;
         uint32_t Length;
@@ -46,9 +46,10 @@ public:
     void Reset(bool InvalidateTLB);
     void Probe();
     void ReadEntry();
-    void WriteEntry(uint32_t index, bool Random);
+    void WriteEntry(uint32_t Index, bool Random);
     bool AddressDefined(uint64_t VAddr);
     TLB_ENTRY & TlbEntry(int32_t Entry);
+
     bool PAddrToVAddr(uint32_t PAddr, uint32_t & VAddr, uint32_t & Index);
     void RecordDifference(CLog & LogFile, const CTLB & rTLB);
 
@@ -60,7 +61,7 @@ private:
     CTLB(const CTLB &);
     CTLB & operator=(const CTLB &);
 
-    void SetupTLB_Entry(uint32_t index, bool Random);
+    void SetupTLB_Entry(uint32_t Index, bool Random);
     void TLB_Unmaped(uint32_t VAddr, uint32_t Len);
 
     CMipsMemoryVM & m_MMU;

Source/Project64/UserInterface/Debugger/Debugger-RegisterTabs.cpp

@@ -134,10 +134,10 @@ void CRegisterTabs::RefreshEdits()
 
     m_COP0Edits[0].SetValue((uint32_t)g_Reg->INDEX_REGISTER, DisplayMode::ZeroExtend);
     m_COP0Edits[1].SetValue((uint32_t)g_Reg->RANDOM_REGISTER, DisplayMode::ZeroExtend);
-    m_COP0Edits[2].SetValue((uint32_t)g_Reg->ENTRYLO0_REGISTER, DisplayMode::ZeroExtend);
+    m_COP0Edits[2].SetValue((uint32_t)g_Reg->ENTRYLO0_REGISTER.Value, DisplayMode::ZeroExtend);
-    m_COP0Edits[3].SetValue((uint32_t)g_Reg->ENTRYLO1_REGISTER, DisplayMode::ZeroExtend);
+    m_COP0Edits[3].SetValue((uint32_t)g_Reg->ENTRYLO1_REGISTER.Value, DisplayMode::ZeroExtend);
     m_COP0Edits[4].SetValue((uint32_t)g_Reg->CONTEXT_REGISTER.Value, DisplayMode::ZeroExtend);
-    m_COP0Edits[5].SetValue((uint32_t)g_Reg->PAGE_MASK_REGISTER, DisplayMode::ZeroExtend);
+    m_COP0Edits[5].SetValue((uint32_t)g_Reg->PAGE_MASK_REGISTER.Value, DisplayMode::ZeroExtend);
     m_COP0Edits[6].SetValue((uint32_t)g_Reg->WIRED_REGISTER, DisplayMode::ZeroExtend);
     m_COP0Edits[7].SetValue((uint32_t)g_Reg->BAD_VADDR_REGISTER, DisplayMode::ZeroExtend);
     m_COP0Edits[8].SetValue((uint32_t)g_Reg->COUNT_REGISTER, DisplayMode::ZeroExtend);
@@ -313,10 +313,10 @@ void CRegisterTabs::RegisterChanged(HWND hDlg, TAB_ID srcTabId, WPARAM wParam)
     {
     case IDC_COP0_0_EDIT: g_Reg->INDEX_REGISTER = value; break;
     case IDC_COP0_1_EDIT: g_Reg->RANDOM_REGISTER = value; break;
-    case IDC_COP0_2_EDIT: g_Reg->ENTRYLO0_REGISTER = value; break;
+    case IDC_COP0_2_EDIT: g_Reg->ENTRYLO0_REGISTER.Value = value; break;
-    case IDC_COP0_3_EDIT: g_Reg->ENTRYLO1_REGISTER = value; break;
+    case IDC_COP0_3_EDIT: g_Reg->ENTRYLO1_REGISTER.Value = value; break;
     case IDC_COP0_4_EDIT: g_Reg->CONTEXT_REGISTER.Value = value; break;
-    case IDC_COP0_5_EDIT: g_Reg->PAGE_MASK_REGISTER = value; break;
+    case IDC_COP0_5_EDIT: g_Reg->PAGE_MASK_REGISTER.Value = value; break;
     case IDC_COP0_6_EDIT: g_Reg->WIRED_REGISTER = value; break;
     case IDC_COP0_7_EDIT: g_Reg->BAD_VADDR_REGISTER = value; break;
     case IDC_COP0_8_EDIT: g_Reg->COUNT_REGISTER = value; break;

Source/Project64/UserInterface/Debugger/Debugger-TLB.cpp

@@ -265,7 +265,7 @@ void CDebugTlb::RefreshTLBWindow(void)
 
         if (FastTlb[count].ValidEntry && FastTlb[count].VALID)
         {
-            swprintf(Output, sizeof(Output), L"%08X:%08X -> %08X:%08X", FastTlb[count].VSTART, FastTlb[count].VEND,
+            swprintf(Output, sizeof(Output), L"%I64X:%I64X -> %08X:%08X", FastTlb[count].VSTART, FastTlb[count].VEND,
                      FastTlb[count].PHYSSTART, FastTlb[count].PHYSEND);
         }
         else