From 9e53b161a4a4b5f5755528b6d74df2a4d980f703 Mon Sep 17 00:00:00 2001
From: zilmar <zilmar@pj64-emu.com>
Date: Thu, 3 Oct 2024 14:38:04 +0930
Subject: [PATCH] Cote Update PeripheralInterfaceHandler::PI_DMA_WRITE to
 handle misaligned, end of page test

---
 .../MemoryHandler/PeripheralInterfaceHandler.cpp      | 11 +++++++++--
 1 file changed, 9 insertions(+), 2 deletions(-)

diff --git a/Source/Project64-core/N64System/MemoryHandler/PeripheralInterfaceHandler.cpp b/Source/Project64-core/N64System/MemoryHandler/PeripheralInterfaceHandler.cpp
index 2c0e99f68..36f80338a 100644
--- a/Source/Project64-core/N64System/MemoryHandler/PeripheralInterfaceHandler.cpp
+++ b/Source/Project64-core/N64System/MemoryHandler/PeripheralInterfaceHandler.cpp
@@ -390,15 +390,21 @@ void PeripheralInterfaceHandler::PI_DMA_WRITE()
         uint8_t * Rdram = m_MMU.Rdram();
         uint32_t RdramSize = m_MMU.RdramSize();
         uint32_t TransferLen = 0;
+        int32_t MaxBlockSize = 128;
         while (Length > 0)
         {
-            int32_t BlockAlign = PI_DRAM_ADDR_REG & 6;
-            int32_t BlockSize = 128 - BlockAlign;
+            int32_t BlockAlign = PI_DRAM_ADDR_REG & 7;
+            int32_t BlockSize = MaxBlockSize - BlockAlign;
             int32_t BlockLen = BlockSize;
             if (Length < BlockLen)
             {
                 BlockLen = Length;
             }
+            int32_t EndOfRow = 0x800 - (PI_DRAM_ADDR_REG & 0x7ff);
+            if (EndOfRow < BlockLen)
+            {
+                BlockLen = EndOfRow;
+            }
             Length -= BlockLen;
             if (Length < 0)
             {
@@ -440,6 +446,7 @@ void PeripheralInterfaceHandler::PI_DMA_WRITE()
             }
             PI_DRAM_ADDR_REG = (PI_DRAM_ADDR_REG + BlockLen + 7) & ~7;
             TransferLen += (BlockLen + 7) & ~7;
+            MaxBlockSize = EndOfRow < 8 ? 128 - BlockAlign : 128;
             FirstBlock = false;
         }