From 9e4f3d2e0f8f876a00df61035fcf2c868b5b92b4 Mon Sep 17 00:00:00 2001 From: LegendOfDragoon Date: Sun, 1 Mar 2015 03:18:17 -0800 Subject: [PATCH] Small optimization to VMUDL --- Source/RSP/Recompiler Ops.c | 19 ++++++++++++------- 1 file changed, 12 insertions(+), 7 deletions(-) diff --git a/Source/RSP/Recompiler Ops.c b/Source/RSP/Recompiler Ops.c index 2e4fbb425..724799252 100644 --- a/Source/RSP/Recompiler Ops.c +++ b/Source/RSP/Recompiler Ops.c @@ -2116,13 +2116,18 @@ BOOL Compile_Vector_VMUDL_MMX ( void ) { MmxMoveQwordVariableToReg(x86_MM1, &RSP_Vect[RSPOpC.rd].UHW[4], Reg); if ((RSPOpC.rs & 0xF) < 2) { - sprintf(Reg, "RSP_Vect[%i].UHW[0]", RSPOpC.rt); - MmxMoveQwordVariableToReg(x86_MM2, &RSP_Vect[RSPOpC.rt].UHW[0], Reg); - sprintf(Reg, "RSP_Vect[%i].UHW[4]", RSPOpC.rt); - MmxMoveQwordVariableToReg(x86_MM3, &RSP_Vect[RSPOpC.rt].UHW[4], Reg); - - MmxPmulhuwRegToReg(x86_MM0, x86_MM2); - MmxPmulhuwRegToReg(x86_MM1, x86_MM3); + if (RSPOpC.rd == RSPOpC.rt){ + MmxPmulhuwRegToReg(x86_MM0, x86_MM0); + MmxPmulhuwRegToReg(x86_MM1, x86_MM1); + } else { + sprintf(Reg, "RSP_Vect[%i].UHW[0]", RSPOpC.rt); + MmxMoveQwordVariableToReg(x86_MM2, &RSP_Vect[RSPOpC.rt].UHW[0], Reg); + sprintf(Reg, "RSP_Vect[%i].UHW[4]", RSPOpC.rt); + MmxMoveQwordVariableToReg(x86_MM3, &RSP_Vect[RSPOpC.rt].UHW[4], Reg); + + MmxPmulhuwRegToReg(x86_MM0, x86_MM2); + MmxPmulhuwRegToReg(x86_MM1, x86_MM3); + } } else if ((RSPOpC.rs & 0xF) >= 8) { RSP_Element2Mmx(x86_MM2); MmxPmulhuwRegToReg(x86_MM0, x86_MM2);