Core: Allow LW to R0 be able to generate an exception
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@ -3237,9 +3237,7 @@ void CX86RecompilerOps::LW()
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void CX86RecompilerOps::LW(bool ResultSigned, bool bRecordLLBit)
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{
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if (m_Opcode.rt == 0) return;
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if (!HaveReadBP() && m_Opcode.base == 29 && g_System->bFastSP())
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if (!HaveReadBP() && m_Opcode.base == 29 && g_System->bFastSP() && m_Opcode.rt != 0)
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{
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m_RegWorkingSet.Map_GPR_32bit(m_Opcode.rt, ResultSigned, -1);
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asmjit::x86::Gp TempReg1 = m_RegWorkingSet.Map_MemoryStack(x86Reg_Unknown, true);
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@ -3252,6 +3250,16 @@ void CX86RecompilerOps::LW(bool ResultSigned, bool bRecordLLBit)
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else if (m_RegWorkingSet.IsConst(m_Opcode.base) && m_RegWorkingSet.Is32Bit(m_Opcode.base))
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{
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uint32_t Address = m_RegWorkingSet.GetMipsRegLo(m_Opcode.base) + (int16_t)m_Opcode.offset;
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if ((Address & 3) != 0)
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{
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g_Notify->BreakPoint(__FILE__, __LINE__);
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//m_Reg.TriggerAddressException(VAddr, EXC_RADE);
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return;
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}
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if (m_Opcode.rt == 0)
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{
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return;
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}
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if (HaveReadBP() && g_Debugger->ReadBP32(Address))
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{
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FoundMemoryBreakpoint();
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@ -3816,6 +3824,10 @@ void CX86RecompilerOps::SW(bool bCheckLLbit)
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if (m_RegWorkingSet.IsConst(m_Opcode.base))
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{
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uint32_t Address = m_RegWorkingSet.GetMipsRegLo(m_Opcode.base) + (int16_t)m_Opcode.offset;
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if ((Address & 3) != 0)
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{
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g_Notify->BreakPoint(__FILE__, __LINE__);
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}
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if (HaveWriteBP() && g_Debugger->WriteBP32(Address))
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{
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FoundMemoryBreakpoint();
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@ -10011,7 +10023,11 @@ void CX86RecompilerOps::CompileLoadMemoryValue(asmjit::x86::Gp & AddressReg, asm
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m_CodeBlock.Log("");
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m_Assembler.bind(JumpFound);
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if (ValueSize == 8)
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if (m_Opcode.rt == 0)
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{
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//ignore load to R0
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}
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else if (ValueSize == 8)
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{
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m_Assembler.xor_(AddressReg, 3);
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if (!ValueReg.isValid())
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