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Fix PI_DMA_READ 

fix PI_DMA_READ like a PI_DMA_WRITE.
This commit is contained in:
Nekokabu 2015-08-01 18:16:11 +09:00
parent 91b643bfe1
commit 936db1c3f4
1 changed files with 12 additions and 6 deletions
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18
Source/Project64/N64 System/Mips/Dma.cpp
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@ -35,12 +35,18 @@ void CDMA::OnFirstDMA()
void CDMA::PI_DMA_READ() void CDMA::PI_DMA_READ()
{ {
// PI_STATUS_REG |= PI_STATUS_DMA_BUSY; // PI_STATUS_REG |= PI_STATUS_DMA_BUSY;
DWORD PI_RD_LEN_REG = ((g_Reg->PI_RD_LEN_REG) & 0x00FFFFFFul) + 1;
if ( g_Reg->PI_DRAM_ADDR_REG + g_Reg->PI_RD_LEN_REG + 1 > g_MMU->RdramSize()) if ((PI_RD_LEN_REG & 1) != 0)
{
PI_RD_LEN_REG += 1;
}
if ( g_Reg->PI_DRAM_ADDR_REG + PI_RD_LEN_REG > g_MMU->RdramSize())
{ {
if (bHaveDebugger()) if (bHaveDebugger())
{ {
g_Notify->DisplayError(L"PI_DMA_READ not in Memory: %08X", g_Reg->PI_DRAM_ADDR_REG + g_Reg->PI_RD_LEN_REG + 1); g_Notify->DisplayError(L"PI_DMA_READ not in Memory: %08X", g_Reg->PI_DRAM_ADDR_REG + PI_RD_LEN_REG);
} }
g_Reg->PI_STATUS_REG &= ~PI_STATUS_DMA_BUSY; g_Reg->PI_STATUS_REG &= ~PI_STATUS_DMA_BUSY;
g_Reg->MI_INTR_REG |= MI_INTR_PI; g_Reg->MI_INTR_REG |= MI_INTR_PI;
@ -58,9 +64,9 @@ void CDMA::PI_DMA_READ()
VirtualProtect(ROM, g_Rom->GetRomSize(), PAGE_READWRITE, &OldProtect); VirtualProtect(ROM, g_Rom->GetRomSize(), PAGE_READWRITE, &OldProtect);
g_Reg->PI_CART_ADDR_REG -= 0x10000000; g_Reg->PI_CART_ADDR_REG -= 0x10000000;
if (g_Reg->PI_CART_ADDR_REG + g_Reg->PI_RD_LEN_REG < g_Rom->GetRomSize()) if (g_Reg->PI_CART_ADDR_REG + PI_RD_LEN_REG < g_Rom->GetRomSize())
{ {
for (i = 0; i < g_Reg->PI_RD_LEN_REG; i++) for (i = 0; i < PI_RD_LEN_REG; i++)
{ {
*(ROM + ((g_Reg->PI_CART_ADDR_REG + i) ^ 3)) = *(RDRAM + ((g_Reg->PI_DRAM_ADDR_REG + i) ^ 3)); *(ROM + ((g_Reg->PI_CART_ADDR_REG + i) ^ 3)) = *(RDRAM + ((g_Reg->PI_DRAM_ADDR_REG + i) ^ 3));
} }
@ -100,7 +106,7 @@ void CDMA::PI_DMA_READ()
m_Sram.DmaToSram( m_Sram.DmaToSram(
g_MMU->Rdram() + g_Reg->PI_DRAM_ADDR_REG, g_MMU->Rdram() + g_Reg->PI_DRAM_ADDR_REG,
g_Reg->PI_CART_ADDR_REG - 0x08000000, g_Reg->PI_CART_ADDR_REG - 0x08000000,
g_Reg->PI_RD_LEN_REG + 1 PI_RD_LEN_REG
); );
g_Reg->PI_STATUS_REG &= ~PI_STATUS_DMA_BUSY; g_Reg->PI_STATUS_REG &= ~PI_STATUS_DMA_BUSY;
g_Reg->MI_INTR_REG |= MI_INTR_PI; g_Reg->MI_INTR_REG |= MI_INTR_PI;
@ -112,7 +118,7 @@ void CDMA::PI_DMA_READ()
m_FlashRam.DmaToFlashram( m_FlashRam.DmaToFlashram(
g_MMU->Rdram()+g_Reg->PI_DRAM_ADDR_REG, g_MMU->Rdram()+g_Reg->PI_DRAM_ADDR_REG,
g_Reg->PI_CART_ADDR_REG - 0x08000000, g_Reg->PI_CART_ADDR_REG - 0x08000000,
g_Reg->PI_RD_LEN_REG + 1 PI_RD_LEN_REG
); );
g_Reg->PI_STATUS_REG &= ~PI_STATUS_DMA_BUSY; g_Reg->PI_STATUS_REG &= ~PI_STATUS_DMA_BUSY;
g_Reg->MI_INTR_REG |= MI_INTR_PI; g_Reg->MI_INTR_REG |= MI_INTR_PI;