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Core: Change the Program counter to be 64bit

This commit is contained in:
zilmar 2024-06-06 14:09:12 +09:30
parent 77ac4744a5
commit 91f9cdaaa7
45 changed files with 421 additions and 389 deletions
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41
Source/Project64-core/N64System/Interpreter/InterpreterOps.cpp
View File

@ -79,8 +79,8 @@ void R4300iOp::ExecuteCPU()
bool & Done = m_System.m_EndEmulation; bool & Done = m_System.m_EndEmulation;
PIPELINE_STAGE & PipelineStage = m_System.m_PipelineStage; PIPELINE_STAGE & PipelineStage = m_System.m_PipelineStage;
uint32_t & JumpToLocation = m_System.m_JumpToLocation; uint64_t & JumpToLocation = m_System.m_JumpToLocation;
uint32_t & JumpDelayLocation = m_System.m_JumpDelayLocation; uint64_t & JumpDelayLocation = m_System.m_JumpDelayLocation;
bool & TestTimer = m_System.m_TestTimer; bool & TestTimer = m_System.m_TestTimer;
CSystemEvents & SystemEvents = m_System.m_SystemEvents; CSystemEvents & SystemEvents = m_System.m_SystemEvents;
const bool & DoSomething = SystemEvents.DoSomething(); const bool & DoSomething = SystemEvents.DoSomething();
@ -90,7 +90,20 @@ void R4300iOp::ExecuteCPU()
while (!Done) while (!Done)
{ {
if (!m_MMU.MemoryValue32(m_PROGRAM_COUNTER, m_Opcode.Value)) if ((uint64_t)((int32_t)m_PROGRAM_COUNTER) != m_PROGRAM_COUNTER)
{
uint32_t PAddr;
bool MemoryUnused;
if (!m_TLB.VAddrToPAddr(m_PROGRAM_COUNTER, PAddr, MemoryUnused))
{
m_Reg.TriggerAddressException(m_PROGRAM_COUNTER, MemoryUnused ? EXC_RADE : EXC_RMISS);
m_PROGRAM_COUNTER = JumpToLocation;
PipelineStage = PIPELINE_STAGE_NORMAL;
continue;
}
m_MMU.LW_PhysicalAddress(PAddr, m_Opcode.Value);
}
else if (!m_MMU.MemoryValue32((uint32_t)m_PROGRAM_COUNTER, m_Opcode.Value))
{ {
m_Reg.TriggerAddressException((int32_t)m_PROGRAM_COUNTER, EXC_RMISS); m_Reg.TriggerAddressException((int32_t)m_PROGRAM_COUNTER, EXC_RMISS);
m_PROGRAM_COUNTER = JumpToLocation; m_PROGRAM_COUNTER = JumpToLocation;
@ -100,7 +113,7 @@ void R4300iOp::ExecuteCPU()
if (HaveDebugger()) if (HaveDebugger())
{ {
if (HaveExecutionBP() && g_Debugger->ExecutionBP(m_PROGRAM_COUNTER)) if (HaveExecutionBP() && g_Debugger->ExecutionBP((uint32_t)m_PROGRAM_COUNTER))
{ {
g_Settings->SaveBool(Debugger_SteppingOps, true); g_Settings->SaveBool(Debugger_SteppingOps, true);
} }
@ -199,8 +212,8 @@ void R4300iOp::ExecuteOps(int32_t Cycles)
{ {
bool & Done = m_System.m_EndEmulation; bool & Done = m_System.m_EndEmulation;
PIPELINE_STAGE & PipelineStage = m_System.m_PipelineStage; PIPELINE_STAGE & PipelineStage = m_System.m_PipelineStage;
uint32_t & JumpDelayLocation = m_System.m_JumpDelayLocation; uint64_t & JumpDelayLocation = m_System.m_JumpDelayLocation;
uint32_t & JumpToLocation = m_System.m_JumpToLocation; uint64_t & JumpToLocation = m_System.m_JumpToLocation;
bool & TestTimer = m_System.m_TestTimer; bool & TestTimer = m_System.m_TestTimer;
CSystemEvents & SystemEvents = m_System.m_SystemEvents; CSystemEvents & SystemEvents = m_System.m_SystemEvents;
const bool & DoSomething = SystemEvents.DoSomething(); const bool & DoSomething = SystemEvents.DoSomething();
@ -215,7 +228,7 @@ void R4300iOp::ExecuteOps(int32_t Cycles)
return; return;
} }
if (m_MMU.MemoryValue32(m_PROGRAM_COUNTER, m_Opcode.Value)) if (m_MMU.MemoryValue32((uint32_t)m_PROGRAM_COUNTER, m_Opcode.Value))
{ {
/*if (PROGRAM_COUNTER > 0x80000300 && PROGRAM_COUNTER< 0x80380000) /*if (PROGRAM_COUNTER > 0x80000300 && PROGRAM_COUNTER< 0x80380000)
{ {
@ -989,12 +1002,12 @@ void R4300iOp::BuildInterpreter()
void R4300iOp::J() void R4300iOp::J()
{ {
m_System.DelayedJump((m_PROGRAM_COUNTER & 0xF0000000) + (m_Opcode.target << 2)); m_System.DelayedJump((m_PROGRAM_COUNTER & 0xFFFFFFFFF0000000) + (m_Opcode.target << 2));
} }
void R4300iOp::JAL() void R4300iOp::JAL()
{ {
m_System.DelayedJump((m_PROGRAM_COUNTER & 0xF0000000) + (m_Opcode.target << 2)); m_System.DelayedJump((m_PROGRAM_COUNTER & 0xFFFFFFFFF0000000) + (m_Opcode.target << 2));
m_GPR[31].DW = (int32_t)(m_System.m_PipelineStage == PIPELINE_STAGE_JUMP_DELAY_SLOT ? m_System.m_JumpToLocation + 4 : m_PROGRAM_COUNTER + 8); m_GPR[31].DW = (int32_t)(m_System.m_PipelineStage == PIPELINE_STAGE_JUMP_DELAY_SLOT ? m_System.m_JumpToLocation + 4 : m_PROGRAM_COUNTER + 8);
} }
@ -1441,7 +1454,7 @@ void R4300iOp::CACHE()
{ {
return; return;
} }
LogMessage("%08X: Cache operation %d, 0x%08X", (m_PROGRAM_COUNTER), m_Opcode.rt, m_GPR[m_Opcode.base].UW[0] + (int16_t)m_Opcode.offset); LogMessage("%016llX: Cache operation %d, 0x%08X", (m_PROGRAM_COUNTER), m_Opcode.rt, m_GPR[m_Opcode.base].UW[0] + (int16_t)m_Opcode.offset);
} }
void R4300iOp::LL() void R4300iOp::LL()
@ -1577,13 +1590,13 @@ void R4300iOp::SPECIAL_SRAV()
void R4300iOp::SPECIAL_JR() void R4300iOp::SPECIAL_JR()
{ {
m_System.DelayedJump(m_GPR[m_Opcode.rs].UW[0]); m_System.DelayedJump(m_GPR[m_Opcode.rs].DW);
m_System.m_TestTimer = true; m_System.m_TestTimer = true;
} }
void R4300iOp::SPECIAL_JALR() void R4300iOp::SPECIAL_JALR()
{ {
m_System.DelayedJump(m_GPR[m_Opcode.rs].UW[0]); m_System.DelayedJump(m_GPR[m_Opcode.rs].DW);
m_GPR[m_Opcode.rd].DW = (int32_t)(m_System.m_PipelineStage == PIPELINE_STAGE_JUMP_DELAY_SLOT ? m_System.m_JumpToLocation + 4 : m_PROGRAM_COUNTER + 8); m_GPR[m_Opcode.rd].DW = (int32_t)(m_System.m_PipelineStage == PIPELINE_STAGE_JUMP_DELAY_SLOT ? m_System.m_JumpToLocation + 4 : m_PROGRAM_COUNTER + 8);
m_System.m_TestTimer = true; m_System.m_TestTimer = true;
} }
@ -2149,12 +2162,12 @@ void R4300iOp::COP0_CO_ERET()
m_System.m_PipelineStage = PIPELINE_STAGE_JUMP; m_System.m_PipelineStage = PIPELINE_STAGE_JUMP;
if ((m_Reg.STATUS_REGISTER.ErrorLevel) != 0) if ((m_Reg.STATUS_REGISTER.ErrorLevel) != 0)
{ {
m_System.m_JumpToLocation = (uint32_t)m_Reg.ERROREPC_REGISTER; m_System.m_JumpToLocation = m_Reg.ERROREPC_REGISTER;
m_Reg.STATUS_REGISTER.ErrorLevel = 0; m_Reg.STATUS_REGISTER.ErrorLevel = 0;
} }
else else
{ {
m_System.m_JumpToLocation = (uint32_t)m_Reg.EPC_REGISTER; m_System.m_JumpToLocation = m_Reg.EPC_REGISTER;
m_Reg.STATUS_REGISTER.ExceptionLevel = 0; m_Reg.STATUS_REGISTER.ExceptionLevel = 0;
} }
m_LLBit = 0; m_LLBit = 0;

2
Source/Project64-core/N64System/Interpreter/InterpreterOps.h
View File

@ -263,7 +263,7 @@ private:
CTLB & m_TLB; CTLB & m_TLB;
CMipsMemoryVM & m_MMU; CMipsMemoryVM & m_MMU;
R4300iOpcode m_Opcode; R4300iOpcode m_Opcode;
uint32_t & m_PROGRAM_COUNTER; uint64_t & m_PROGRAM_COUNTER;
MIPS_DWORD * m_GPR; MIPS_DWORD * m_GPR;
MIPS_DWORD * m_FPR; MIPS_DWORD * m_FPR;
uint64_t * m_CP0; uint64_t * m_CP0;

24
Source/Project64-core/N64System/MemoryHandler/AudioInterfaceHandler.cpp
View File

@ -81,12 +81,12 @@ bool AudioInterfaceHandler::Read32(uint32_t Address, uint32_t & Value)
{ {
switch (Address & 0x1FFFFFFF) switch (Address & 0x1FFFFFFF)
{ {
case 0x04500000: LogMessage("%08X: read from AI_DRAM_ADDR_REG (%08X)", m_PC, Value); break; case 0x04500000: LogMessage("%016llX: read from AI_DRAM_ADDR_REG (%08X)", m_PC, Value); break;
case 0x04500004: LogMessage("%08X: read from AI_LEN_REG (%08X)", m_PC, Value); break; case 0x04500004: LogMessage("%016llX: read from AI_LEN_REG (%08X)", m_PC, Value); break;
case 0x04500008: LogMessage("%08X: read from AI_CONTROL_REG (%08X)", m_PC, Value); break; case 0x04500008: LogMessage("%016llX: read from AI_CONTROL_REG (%08X)", m_PC, Value); break;
case 0x0450000C: LogMessage("%08X: read from AI_STATUS_REG (%08X)", m_PC, Value); break; case 0x0450000C: LogMessage("%016llX: read from AI_STATUS_REG (%08X)", m_PC, Value); break;
case 0x04500010: LogMessage("%08X: read from AI_DACRATE_REG (%08X)", m_PC, Value); break; case 0x04500010: LogMessage("%016llX: read from AI_DACRATE_REG (%08X)", m_PC, Value); break;
case 0x04500014: LogMessage("%08X: read from AI_BITRATE_REG (%08X)", m_PC, Value); break; case 0x04500014: LogMessage("%016llX: read from AI_BITRATE_REG (%08X)", m_PC, Value); break;
default: default:
if (HaveDebugger()) if (HaveDebugger())
{ {
@ -103,12 +103,12 @@ bool AudioInterfaceHandler::Write32(uint32_t Address, uint32_t Value, uint32_t M
{ {
switch (Address & 0x1FFFFFFF) switch (Address & 0x1FFFFFFF)
{ {
case 0x04500000: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to AI_DRAM_ADDR_REG", m_PC, Value, Mask); break; case 0x04500000: LogMessage("%016llX: Writing 0x%08X (Mask: 0x%08X) to AI_DRAM_ADDR_REG", m_PC, Value, Mask); break;
case 0x04500004: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to AI_LEN_REG", m_PC, Value, Mask); break; case 0x04500004: LogMessage("%016llX: Writing 0x%08X (Mask: 0x%08X) to AI_LEN_REG", m_PC, Value, Mask); break;
case 0x04500008: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to AI_CONTROL_REG", m_PC, Value, Mask); break; case 0x04500008: LogMessage("%016llX: Writing 0x%08X (Mask: 0x%08X) to AI_CONTROL_REG", m_PC, Value, Mask); break;
case 0x0450000C: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to AI_STATUS_REG", m_PC, Value, Mask); break; case 0x0450000C: LogMessage("%016llX: Writing 0x%08X (Mask: 0x%08X) to AI_STATUS_REG", m_PC, Value, Mask); break;
case 0x04500010: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to AI_DACRATE_REG", m_PC, Value, Mask); break; case 0x04500010: LogMessage("%016llX: Writing 0x%08X (Mask: 0x%08X) to AI_DACRATE_REG", m_PC, Value, Mask); break;
case 0x04500014: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to AI_BITRATE_REG", m_PC, Value, Mask); break; case 0x04500014: LogMessage("%016llX: Writing 0x%08X (Mask: 0x%08X) to AI_BITRATE_REG", m_PC, Value, Mask); break;
default: default:
if (HaveDebugger()) if (HaveDebugger())
{ {

2
Source/Project64-core/N64System/MemoryHandler/AudioInterfaceHandler.h
View File

@ -76,7 +76,7 @@ private:
CN64System & m_System; CN64System & m_System;
CRegisters & m_Reg; CRegisters & m_Reg;
CPlugins * m_Plugins; CPlugins * m_Plugins;
uint32_t & m_PC; uint64_t & m_PC;
uint32_t m_Status; uint32_t m_Status;
uint32_t m_SecondBuff; uint32_t m_SecondBuff;
uint32_t m_BytesPerSecond; uint32_t m_BytesPerSecond;

32
Source/Project64-core/N64System/MemoryHandler/DisplayControlRegHandler.cpp
View File

@ -40,14 +40,14 @@ bool DisplayControlRegHandler::Read32(uint32_t Address, uint32_t & Value)
{ {
switch (Address & 0x1FFFFFFF) switch (Address & 0x1FFFFFFF)
{ {
case 0x04100000: LogMessage("%08X: read from DPC_START_REG (%08X)", m_PC, Value); break; case 0x04100000: LogMessage("%016llX: read from DPC_START_REG (%08X)", m_PC, Value); break;
case 0x04100004: LogMessage("%08X: read from DPC_END_REG (%08X)", m_PC, Value); break; case 0x04100004: LogMessage("%016llX: read from DPC_END_REG (%08X)", m_PC, Value); break;
case 0x04100008: LogMessage("%08X: read from DPC_CURRENT_REG (%08X)", m_PC, Value); break; case 0x04100008: LogMessage("%016llX: read from DPC_CURRENT_REG (%08X)", m_PC, Value); break;
case 0x0410000C: LogMessage("%08X: read from DPC_STATUS_REG (%08X)", m_PC, Value); break; case 0x0410000C: LogMessage("%016llX: read from DPC_STATUS_REG (%08X)", m_PC, Value); break;
case 0x04100010: LogMessage("%08X: read from DPC_CLOCK_REG (%08X)", m_PC, Value); break; case 0x04100010: LogMessage("%016llX: read from DPC_CLOCK_REG (%08X)", m_PC, Value); break;
case 0x04100014: LogMessage("%08X: read from DPC_BUFBUSY_REG (%08X)", m_PC, Value); break; case 0x04100014: LogMessage("%016llX: read from DPC_BUFBUSY_REG (%08X)", m_PC, Value); break;
case 0x04100018: LogMessage("%08X: read from DPC_PIPEBUSY_REG (%08X)", m_PC, Value); break; case 0x04100018: LogMessage("%016llX: read from DPC_PIPEBUSY_REG (%08X)", m_PC, Value); break;
case 0x0410001C: LogMessage("%08X: read from DPC_TMEM_REG (%08X)", m_PC, Value); break; case 0x0410001C: LogMessage("%016llX: read from DPC_TMEM_REG (%08X)", m_PC, Value); break;
default: default:
if (HaveDebugger()) if (HaveDebugger())
{ {
@ -64,14 +64,14 @@ bool DisplayControlRegHandler::Write32(uint32_t Address, uint32_t Value, uint32_
{ {
switch (Address & 0x1FFFFFFF) switch (Address & 0x1FFFFFFF)
{ {
case 0x04100000: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to DPC_START_REG", m_PC, Value, Mask); break; case 0x04100000: LogMessage("%016llX: Writing 0x%08X (Mask: 0x%08X) to DPC_START_REG", m_PC, Value, Mask); break;
case 0x04100004: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to DPC_END_REG", m_PC, Value, Mask); break; case 0x04100004: LogMessage("%016llX: Writing 0x%08X (Mask: 0x%08X) to DPC_END_REG", m_PC, Value, Mask); break;
case 0x04100008: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to DPC_CURRENT_REG", m_PC, Value, Mask); break; case 0x04100008: LogMessage("%016llX: Writing 0x%08X (Mask: 0x%08X) to DPC_CURRENT_REG", m_PC, Value, Mask); break;
case 0x0410000C: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to DPC_STATUS_REG", m_PC, Value, Mask); break; case 0x0410000C: LogMessage("%016llX: Writing 0x%08X (Mask: 0x%08X) to DPC_STATUS_REG", m_PC, Value, Mask); break;
case 0x04100010: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to DPC_CLOCK_REG", m_PC, Value, Mask); break; case 0x04100010: LogMessage("%016llX: Writing 0x%08X (Mask: 0x%08X) to DPC_CLOCK_REG", m_PC, Value, Mask); break;
case 0x04100014: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to DPC_BUFBUSY_REG", m_PC, Value, Mask); break; case 0x04100014: LogMessage("%016llX: Writing 0x%08X (Mask: 0x%08X) to DPC_BUFBUSY_REG", m_PC, Value, Mask); break;
case 0x04100018: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to DPC_PIPEBUSY_REG", m_PC, Value, Mask); break; case 0x04100018: LogMessage("%016llX: Writing 0x%08X (Mask: 0x%08X) to DPC_PIPEBUSY_REG", m_PC, Value, Mask); break;
case 0x0410001C: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to DPC_TMEM_REG", m_PC, Value, Mask); break; case 0x0410001C: LogMessage("%016llX: Writing 0x%08X (Mask: 0x%08X) to DPC_TMEM_REG", m_PC, Value, Mask); break;
default: default:
if (HaveDebugger()) if (HaveDebugger())
{ {

2
Source/Project64-core/N64System/MemoryHandler/DisplayControlRegHandler.h
View File

@ -78,5 +78,5 @@ private:
CN64System & m_System; CN64System & m_System;
CPlugins * m_Plugins; CPlugins * m_Plugins;
uint32_t & m_PC; uint64_t & m_PC;
}; };

16
Source/Project64-core/N64System/MemoryHandler/MIPSInterfaceHandler.cpp
View File

@ -41,10 +41,10 @@ bool MIPSInterfaceHandler::Read32(uint32_t Address, uint32_t & Value)
{ {
switch (Address & 0x1FFFFFFF) switch (Address & 0x1FFFFFFF)
{ {
case 0x04300000: LogMessage("%08X: read from MI_INIT_MODE_REG/MI_MODE_REG (%08X)", m_PC, Value); break; case 0x04300000: LogMessage("%016llX: read from MI_INIT_MODE_REG/MI_MODE_REG (%08X)", m_PC, Value); break;
case 0x04300004: LogMessage("%08X: read from MI_VERSION_REG/MI_NOOP_REG (%08X)", m_PC, Value); break; case 0x04300004: LogMessage("%016llX: read from MI_VERSION_REG/MI_NOOP_REG (%08X)", m_PC, Value); break;
case 0x04300008: LogMessage("%08X: read from MI_INTR_REG (%08X)", m_PC, Value); break; case 0x04300008: LogMessage("%016llX: read from MI_INTR_REG (%08X)", m_PC, Value); break;
case 0x0430000C: LogMessage("%08X: read from MI_INTR_MASK_REG (%08X)", m_PC, Value); break; case 0x0430000C: LogMessage("%016llX: read from MI_INTR_MASK_REG (%08X)", m_PC, Value); break;
default: default:
if (HaveDebugger()) if (HaveDebugger())
{ {
@ -61,10 +61,10 @@ bool MIPSInterfaceHandler::Write32(uint32_t Address, uint32_t Value, uint32_t Ma
{ {
switch (Address & 0x1FFFFFFF) switch (Address & 0x1FFFFFFF)
{ {
case 0x04300000: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to MI_INIT_MODE_REG/MI_MODE_REG", m_PC, Value, Mask); break; case 0x04300000: LogMessage("%016llX: Writing 0x%08X (Mask: 0x%08X) to MI_INIT_MODE_REG/MI_MODE_REG", m_PC, Value, Mask); break;
case 0x04300004: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to MI_VERSION_REG/MI_NOOP_REG", m_PC, Value, Mask); break; case 0x04300004: LogMessage("%016llX: Writing 0x%08X (Mask: 0x%08X) to MI_VERSION_REG/MI_NOOP_REG", m_PC, Value, Mask); break;
case 0x04300008: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to MI_INTR_REG", m_PC, Value, Mask); break; case 0x04300008: LogMessage("%016llX: Writing 0x%08X (Mask: 0x%08X) to MI_INTR_REG", m_PC, Value, Mask); break;
case 0x0430000C: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to MI_INTR_MASK_REG", m_PC, Value, Mask); break; case 0x0430000C: LogMessage("%016llX: Writing 0x%08X (Mask: 0x%08X) to MI_INTR_MASK_REG", m_PC, Value, Mask); break;
default: default:
if (HaveDebugger()) if (HaveDebugger())
{ {

2
Source/Project64-core/N64System/MemoryHandler/MIPSInterfaceHandler.h
View File

@ -43,5 +43,5 @@ private:
MIPSInterfaceHandler & operator=(const MIPSInterfaceHandler &); MIPSInterfaceHandler & operator=(const MIPSInterfaceHandler &);
CRegisters & m_Reg; CRegisters & m_Reg;
uint32_t & m_PC; uint64_t & m_PC;
}; };

52
Source/Project64-core/N64System/MemoryHandler/PeripheralInterfaceHandler.cpp
View File

@ -72,19 +72,19 @@ bool PeripheralInterfaceHandler::Read32(uint32_t Address, uint32_t & Value)
{ {
switch (Address & 0x1FFFFFFF) switch (Address & 0x1FFFFFFF)
{ {
case 0x04600000: LogMessage("%08X: read from PI_DRAM_ADDR_REG (%08X)", m_PC, Value); break; case 0x04600000: LogMessage("%016llX: read from PI_DRAM_ADDR_REG (%08X)", m_PC, Value); break;
case 0x04600004: LogMessage("%08X: read from PI_CART_ADDR_REG (%08X)", m_PC, Value); break; case 0x04600004: LogMessage("%016llX: read from PI_CART_ADDR_REG (%08X)", m_PC, Value); break;
case 0x04600008: LogMessage("%08X: read from PI_RD_LEN_REG (%08X)", m_PC, Value); break; case 0x04600008: LogMessage("%016llX: read from PI_RD_LEN_REG (%08X)", m_PC, Value); break;
case 0x0460000C: LogMessage("%08X: read from PI_WR_LEN_REG (%08X)", m_PC, Value); break; case 0x0460000C: LogMessage("%016llX: read from PI_WR_LEN_REG (%08X)", m_PC, Value); break;
case 0x04600010: LogMessage("%08X: read from PI_STATUS_REG (%08X)", m_PC, Value); break; case 0x04600010: LogMessage("%016llX: read from PI_STATUS_REG (%08X)", m_PC, Value); break;
case 0x04600014: LogMessage("%08X: read from PI_BSD_DOM1_LAT_REG/PI_DOMAIN1_REG (%08X)", m_PC, Value); break; case 0x04600014: LogMessage("%016llX: read from PI_BSD_DOM1_LAT_REG/PI_DOMAIN1_REG (%08X)", m_PC, Value); break;
case 0x04600018: LogMessage("%08X: read from PI_BSD_DOM1_PWD_REG (%08X)", m_PC, Value); break; case 0x04600018: LogMessage("%016llX: read from PI_BSD_DOM1_PWD_REG (%08X)", m_PC, Value); break;
case 0x0460001C: LogMessage("%08X: read from PI_BSD_DOM1_PGS_REG (%08X)", m_PC, Value); break; case 0x0460001C: LogMessage("%016llX: read from PI_BSD_DOM1_PGS_REG (%08X)", m_PC, Value); break;
case 0x04600020: LogMessage("%08X: read from PI_BSD_DOM1_RLS_REG (%08X)", m_PC, Value); break; case 0x04600020: LogMessage("%016llX: read from PI_BSD_DOM1_RLS_REG (%08X)", m_PC, Value); break;
case 0x04600024: LogMessage("%08X: read from PI_BSD_DOM2_LAT_REG/PI_DOMAIN2_REG (%08X)", m_PC, Value); break; case 0x04600024: LogMessage("%016llX: read from PI_BSD_DOM2_LAT_REG/PI_DOMAIN2_REG (%08X)", m_PC, Value); break;
case 0x04600028: LogMessage("%08X: read from PI_BSD_DOM2_PWD_REG (%08X)", m_PC, Value); break; case 0x04600028: LogMessage("%016llX: read from PI_BSD_DOM2_PWD_REG (%08X)", m_PC, Value); break;
case 0x0460002C: LogMessage("%08X: read from PI_BSD_DOM2_PGS_REG (%08X)", m_PC, Value); break; case 0x0460002C: LogMessage("%016llX: read from PI_BSD_DOM2_PGS_REG (%08X)", m_PC, Value); break;
case 0x04600030: LogMessage("%08X: read from PI_BSD_DOM2_RLS_REG (%08X)", m_PC, Value); break; case 0x04600030: LogMessage("%016llX: read from PI_BSD_DOM2_RLS_REG (%08X)", m_PC, Value); break;
default: default:
if (HaveDebugger()) if (HaveDebugger())
{ {
@ -101,19 +101,19 @@ bool PeripheralInterfaceHandler::Write32(uint32_t Address, uint32_t Value, uint3
{ {
switch (Address & 0x1FFFFFFF) switch (Address & 0x1FFFFFFF)
{ {
case 0x04600000: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to PI_DRAM_ADDR_REG", m_PC, Value, Mask); break; case 0x04600000: LogMessage("%016llX: Writing 0x%08X (Mask: 0x%08X) to PI_DRAM_ADDR_REG", m_PC, Value, Mask); break;
case 0x04600004: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to PI_CART_ADDR_REG", m_PC, Value, Mask); break; case 0x04600004: LogMessage("%016llX: Writing 0x%08X (Mask: 0x%08X) to PI_CART_ADDR_REG", m_PC, Value, Mask); break;
case 0x04600008: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to PI_RD_LEN_REG", m_PC, Value, Mask); break; case 0x04600008: LogMessage("%016llX: Writing 0x%08X (Mask: 0x%08X) to PI_RD_LEN_REG", m_PC, Value, Mask); break;
case 0x0460000C: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to PI_WR_LEN_REG", m_PC, Value, Mask); break; case 0x0460000C: LogMessage("%016llX: Writing 0x%08X (Mask: 0x%08X) to PI_WR_LEN_REG", m_PC, Value, Mask); break;
case 0x04600010: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to PI_STATUS_REG", m_PC, Value, Mask); break; case 0x04600010: LogMessage("%016llX: Writing 0x%08X (Mask: 0x%08X) to PI_STATUS_REG", m_PC, Value, Mask); break;
case 0x04600014: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to PI_BSD_DOM1_LAT_REG/PI_DOMAIN1_REG", m_PC, Value, Mask); break; case 0x04600014: LogMessage("%016llX: Writing 0x%08X (Mask: 0x%08X) to PI_BSD_DOM1_LAT_REG/PI_DOMAIN1_REG", m_PC, Value, Mask); break;
case 0x04600018: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to PI_BSD_DOM1_PWD_REG", m_PC, Value, Mask); break; case 0x04600018: LogMessage("%016llX: Writing 0x%08X (Mask: 0x%08X) to PI_BSD_DOM1_PWD_REG", m_PC, Value, Mask); break;
case 0x0460001C: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to PI_BSD_DOM1_PGS_REG", m_PC, Value, Mask); break; case 0x0460001C: LogMessage("%016llX: Writing 0x%08X (Mask: 0x%08X) to PI_BSD_DOM1_PGS_REG", m_PC, Value, Mask); break;
case 0x04600020: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to PI_BSD_DOM1_RLS_REG", m_PC, Value, Mask); break; case 0x04600020: LogMessage("%016llX: Writing 0x%08X (Mask: 0x%08X) to PI_BSD_DOM1_RLS_REG", m_PC, Value, Mask); break;
case 0x04600024: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to PI_BSD_DOM2_LAT_REG/PI_DOMAIN2_REG", m_PC, Value, Mask); break; case 0x04600024: LogMessage("%016llX: Writing 0x%08X (Mask: 0x%08X) to PI_BSD_DOM2_LAT_REG/PI_DOMAIN2_REG", m_PC, Value, Mask); break;
case 0x04600028: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to PI_BSD_DOM2_PWD_REG", m_PC, Value, Mask); break; case 0x04600028: LogMessage("%016llX: Writing 0x%08X (Mask: 0x%08X) to PI_BSD_DOM2_PWD_REG", m_PC, Value, Mask); break;
case 0x0460002C: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to PI_BSD_DOM2_PGS_REG", m_PC, Value, Mask); break; case 0x0460002C: LogMessage("%016llX: Writing 0x%08X (Mask: 0x%08X) to PI_BSD_DOM2_PGS_REG", m_PC, Value, Mask); break;
case 0x04600030: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to PI_BSD_DOM2_RLS_REG", m_PC, Value, Mask); break; case 0x04600030: LogMessage("%016llX: Writing 0x%08X (Mask: 0x%08X) to PI_BSD_DOM2_RLS_REG", m_PC, Value, Mask); break;
default: default:
if (HaveDebugger()) if (HaveDebugger())
{ {

2
Source/Project64-core/N64System/MemoryHandler/PeripheralInterfaceHandler.h
View File

@ -89,7 +89,7 @@ private:
CartridgeDomain2Address2Handler & m_Domain2Address2Handler; CartridgeDomain2Address2Handler & m_Domain2Address2Handler;
CMipsMemoryVM & m_MMU; CMipsMemoryVM & m_MMU;
CRegisters & m_Reg; CRegisters & m_Reg;
uint32_t & m_PC; uint64_t & m_PC;
bool m_DMAUsed; bool m_DMAUsed;
}; };

4
Source/Project64-core/N64System/MemoryHandler/PifRamHandler.cpp
View File

@ -46,7 +46,7 @@ bool PifRamHandler::Read32(uint32_t Address, uint32_t & Value)
if (GenerateLog() && LogPRDirectMemLoads() && Address >= 0x1FC007C0 && Address <= 0x1FC007FC) if (GenerateLog() && LogPRDirectMemLoads() && Address >= 0x1FC007C0 && Address <= 0x1FC007FC)
{ {
LogMessage("%08X: read word from PIF RAM at 0x%X (%08X)", m_PC, Address - 0x1FC007C0, Value); LogMessage("%016llX: read word from PIF RAM at 0x%X (%08X)", m_PC, Address - 0x1FC007C0, Value);
} }
return true; return true;
} }
@ -56,7 +56,7 @@ bool PifRamHandler::Write32(uint32_t Address, uint32_t Value, uint32_t Mask)
Address &= 0x1FFFFFFF; Address &= 0x1FFFFFFF;
if (GenerateLog() && LogPRDirectMemStores() && Address >= 0x1FC007C0 && Address <= 0x1FC007FC) if (GenerateLog() && LogPRDirectMemStores() && Address >= 0x1FC007C0 && Address <= 0x1FC007FC)
{ {
LogMessage("%08X: Writing 0x%08X to PIF RAM at 0x%X", m_PC, Value, Address - 0x1FC007C0); LogMessage("%016llX: Writing 0x%08X to PIF RAM at 0x%X", m_PC, Value, Address - 0x1FC007C0);
} }
if (Address < 0x1FC007C0) if (Address < 0x1FC007C0)

2
Source/Project64-core/N64System/MemoryHandler/PifRamHandler.h
View File

@ -50,6 +50,6 @@ private:
CMipsMemoryVM & m_MMU; CMipsMemoryVM & m_MMU;
uint8_t m_PifRom[0x7C0]; uint8_t m_PifRom[0x7C0];
uint8_t m_PifRam[0x40]; uint8_t m_PifRam[0x40];
uint32_t & m_PC; uint64_t & m_PC;
CEeprom m_Eeprom; CEeprom m_Eeprom;
}; };

32
Source/Project64-core/N64System/MemoryHandler/RDRAMInterfaceHandler.cpp
View File

@ -47,14 +47,14 @@ bool RDRAMInterfaceHandler::Read32(uint32_t Address, uint32_t & Value)
{ {
switch (Address & 0x1FFFFFFF) switch (Address & 0x1FFFFFFF)
{ {
case 0x04700000: LogMessage("%08X: read from RI_MODE_REG (%08X)", m_PC, Value); break; case 0x04700000: LogMessage("%016llX: read from RI_MODE_REG (%08X)", m_PC, Value); break;
case 0x04700004: LogMessage("%08X: read from RI_CONFIG_REG (%08X)", m_PC, Value); break; case 0x04700004: LogMessage("%016llX: read from RI_CONFIG_REG (%08X)", m_PC, Value); break;
case 0x04700008: LogMessage("%08X: read from RI_CURRENT_LOAD_REG (%08X)", m_PC, Value); break; case 0x04700008: LogMessage("%016llX: read from RI_CURRENT_LOAD_REG (%08X)", m_PC, Value); break;
case 0x0470000C: LogMessage("%08X: read from RI_SELECT_REG (%08X)", m_PC, Value); break; case 0x0470000C: LogMessage("%016llX: read from RI_SELECT_REG (%08X)", m_PC, Value); break;
case 0x04700010: LogMessage("%08X: read from RI_REFRESH_REG/RI_COUNT_REG (%08X)", m_PC, Value); break; case 0x04700010: LogMessage("%016llX: read from RI_REFRESH_REG/RI_COUNT_REG (%08X)", m_PC, Value); break;
case 0x04700014: LogMessage("%08X: read from RI_LATENCY_REG (%08X)", m_PC, Value); break; case 0x04700014: LogMessage("%016llX: read from RI_LATENCY_REG (%08X)", m_PC, Value); break;
case 0x04700018: LogMessage("%08X: read from RI_RERROR_REG (%08X)", m_PC, Value); break; case 0x04700018: LogMessage("%016llX: read from RI_RERROR_REG (%08X)", m_PC, Value); break;
case 0x0470001C: LogMessage("%08X: read from RI_WERROR_REG (%08X)", m_PC, Value); break; case 0x0470001C: LogMessage("%016llX: read from RI_WERROR_REG (%08X)", m_PC, Value); break;
default: default:
if (HaveDebugger()) if (HaveDebugger())
{ {
@ -71,14 +71,14 @@ bool RDRAMInterfaceHandler::Write32(uint32_t Address, uint32_t Value, uint32_t M
{ {
switch (Address & 0x1FFFFFFF) switch (Address & 0x1FFFFFFF)
{ {
case 0x04700000: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to RI_MODE_REG", m_PC, Value, Mask); break; case 0x04700000: LogMessage("%016llX: Writing 0x%08X (Mask: 0x%08X) to RI_MODE_REG", m_PC, Value, Mask); break;
case 0x04700004: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to RI_CONFIG_REG", m_PC, Value, Mask); break; case 0x04700004: LogMessage("%016llX: Writing 0x%08X (Mask: 0x%08X) to RI_CONFIG_REG", m_PC, Value, Mask); break;
case 0x04700008: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to RI_CURRENT_LOAD_REG", m_PC, Value, Mask); break; case 0x04700008: LogMessage("%016llX: Writing 0x%08X (Mask: 0x%08X) to RI_CURRENT_LOAD_REG", m_PC, Value, Mask); break;
case 0x0470000C: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to RI_SELECT_REG", m_PC, Value, Mask); break; case 0x0470000C: LogMessage("%016llX: Writing 0x%08X (Mask: 0x%08X) to RI_SELECT_REG", m_PC, Value, Mask); break;
case 0x04700010: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to RI_REFRESH_REG/RI_COUNT_REG", m_PC, Value, Mask); break; case 0x04700010: LogMessage("%016llX: Writing 0x%08X (Mask: 0x%08X) to RI_REFRESH_REG/RI_COUNT_REG", m_PC, Value, Mask); break;
case 0x04700014: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to RI_LATENCY_REG", m_PC, Value, Mask); break; case 0x04700014: LogMessage("%016llX: Writing 0x%08X (Mask: 0x%08X) to RI_LATENCY_REG", m_PC, Value, Mask); break;
case 0x04700018: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to RI_RERROR_REG", m_PC, Value, Mask); break; case 0x04700018: LogMessage("%016llX: Writing 0x%08X (Mask: 0x%08X) to RI_RERROR_REG", m_PC, Value, Mask); break;
case 0x0470001C: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to RI_WERROR_REG", m_PC, Value, Mask); break; case 0x0470001C: LogMessage("%016llX: Writing 0x%08X (Mask: 0x%08X) to RI_WERROR_REG", m_PC, Value, Mask); break;
default: default:
if (HaveDebugger()) if (HaveDebugger())
{ {

2
Source/Project64-core/N64System/MemoryHandler/RDRAMInterfaceHandler.h
View File

@ -44,5 +44,5 @@ private:
RDRAMInterfaceHandler(const RDRAMInterfaceHandler &); RDRAMInterfaceHandler(const RDRAMInterfaceHandler &);
RDRAMInterfaceHandler & operator=(const RDRAMInterfaceHandler &); RDRAMInterfaceHandler & operator=(const RDRAMInterfaceHandler &);
uint32_t & m_PC; uint64_t & m_PC;
}; };

52
Source/Project64-core/N64System/MemoryHandler/RDRAMRegistersHandler.cpp
View File

@ -51,16 +51,16 @@ bool RDRAMRegistersHandler::Read32(uint32_t Address, uint32_t & Value)
{ {
switch (Address & 0x1FFFFFFF) switch (Address & 0x1FFFFFFF)
{ {
case 0x03F00000: LogMessage("%08X: read from RDRAM_CONFIG_REG/RDRAM_DEVICE_TYPE_REG (%08X)", m_PC, Value); break; case 0x03F00000: LogMessage("%016llX: read from RDRAM_CONFIG_REG/RDRAM_DEVICE_TYPE_REG (%08X)", m_PC, Value); break;
case 0x03F00004: LogMessage("%08X: read from RDRAM_DEVICE_ID_REG (%08X)", m_PC, Value); break; case 0x03F00004: LogMessage("%016llX: read from RDRAM_DEVICE_ID_REG (%08X)", m_PC, Value); break;
case 0x03F00008: LogMessage("%08X: read from RDRAM_DELAY_REG (%08X)", m_PC, Value); break; case 0x03F00008: LogMessage("%016llX: read from RDRAM_DELAY_REG (%08X)", m_PC, Value); break;
case 0x03F0000C: LogMessage("%08X: read from RDRAM_MODE_REG (%08X)", m_PC, Value); break; case 0x03F0000C: LogMessage("%016llX: read from RDRAM_MODE_REG (%08X)", m_PC, Value); break;
case 0x03F00010: LogMessage("%08X: read from RDRAM_REF_INTERVAL_REG (%08X)", m_PC, Value); break; case 0x03F00010: LogMessage("%016llX: read from RDRAM_REF_INTERVAL_REG (%08X)", m_PC, Value); break;
case 0x03F00014: LogMessage("%08X: read from RDRAM_REF_ROW_REG (%08X)", m_PC, Value); break; case 0x03F00014: LogMessage("%016llX: read from RDRAM_REF_ROW_REG (%08X)", m_PC, Value); break;
case 0x03F00018: LogMessage("%08X: read from RDRAM_RAS_INTERVAL_REG (%08X)", m_PC, Value); break; case 0x03F00018: LogMessage("%016llX: read from RDRAM_RAS_INTERVAL_REG (%08X)", m_PC, Value); break;
case 0x03F0001C: LogMessage("%08X: read from RDRAM_MIN_INTERVAL_REG (%08X)", m_PC, Value); break; case 0x03F0001C: LogMessage("%016llX: read from RDRAM_MIN_INTERVAL_REG (%08X)", m_PC, Value); break;
case 0x03F00020: LogMessage("%08X: read from RDRAM_ADDR_SELECT_REG (%08X)", m_PC, Value); break; case 0x03F00020: LogMessage("%016llX: read from RDRAM_ADDR_SELECT_REG (%08X)", m_PC, Value); break;
case 0x03F00024: LogMessage("%08X: read from RDRAM_DEVICE_MANUF_REG (%08X)", m_PC, Value); break; case 0x03F00024: LogMessage("%016llX: read from RDRAM_DEVICE_MANUF_REG (%08X)", m_PC, Value); break;
default: default:
if (HaveDebugger()) if (HaveDebugger())
{ {
@ -77,22 +77,22 @@ bool RDRAMRegistersHandler::Write32(uint32_t Address, uint32_t Value, uint32_t M
{ {
switch (Address & 0x1FFFFFFF) switch (Address & 0x1FFFFFFF)
{ {
case 0x03F00000: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to RDRAM_CONFIG_REG/RDRAM_DEVICE_TYPE_REG", m_PC, Value, Mask); break; case 0x03F00000: LogMessage("%016llX: Writing 0x%08X (Mask: 0x%08X) to RDRAM_CONFIG_REG/RDRAM_DEVICE_TYPE_REG", m_PC, Value, Mask); break;
case 0x03F00004: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to RDRAM_DEVICE_ID_REG", m_PC, Value, Mask); break; case 0x03F00004: LogMessage("%016llX: Writing 0x%08X (Mask: 0x%08X) to RDRAM_DEVICE_ID_REG", m_PC, Value, Mask); break;
case 0x03F00008: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to RDRAM_DELAY_REG", m_PC, Value, Mask); break; case 0x03F00008: LogMessage("%016llX: Writing 0x%08X (Mask: 0x%08X) to RDRAM_DELAY_REG", m_PC, Value, Mask); break;
case 0x03F0000C: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to RDRAM_MODE_REG", m_PC, Value, Mask); break; case 0x03F0000C: LogMessage("%016llX: Writing 0x%08X (Mask: 0x%08X) to RDRAM_MODE_REG", m_PC, Value, Mask); break;
case 0x03F00010: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to RDRAM_REF_INTERVAL_REG", m_PC, Value, Mask); break; case 0x03F00010: LogMessage("%016llX: Writing 0x%08X (Mask: 0x%08X) to RDRAM_REF_INTERVAL_REG", m_PC, Value, Mask); break;
case 0x03F00014: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to RDRAM_REF_ROW_REG", m_PC, Value, Mask); break; case 0x03F00014: LogMessage("%016llX: Writing 0x%08X (Mask: 0x%08X) to RDRAM_REF_ROW_REG", m_PC, Value, Mask); break;
case 0x03F00018: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to RDRAM_RAS_INTERVAL_REG", m_PC, Value, Mask); break; case 0x03F00018: LogMessage("%016llX: Writing 0x%08X (Mask: 0x%08X) to RDRAM_RAS_INTERVAL_REG", m_PC, Value, Mask); break;
case 0x03F0001C: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to RDRAM_MIN_INTERVAL_REG", m_PC, Value, Mask); break; case 0x03F0001C: LogMessage("%016llX: Writing 0x%08X (Mask: 0x%08X) to RDRAM_MIN_INTERVAL_REG", m_PC, Value, Mask); break;
case 0x03F00020: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to RDRAM_ADDR_SELECT_REG", m_PC, Value, Mask); break; case 0x03F00020: LogMessage("%016llX: Writing 0x%08X (Mask: 0x%08X) to RDRAM_ADDR_SELECT_REG", m_PC, Value, Mask); break;
case 0x03F00024: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to RDRAM_DEVICE_MANUF_REG", m_PC, Value, Mask); break; case 0x03F00024: LogMessage("%016llX: Writing 0x%08X (Mask: 0x%08X) to RDRAM_DEVICE_MANUF_REG", m_PC, Value, Mask); break;
case 0x03F04004: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to 0x%08X - Ignored", m_PC, Value, Mask, Address); break; case 0x03F04004: LogMessage("%016llX: Writing 0x%08X (Mask: 0x%08X) to 0x%08X - Ignored", m_PC, Value, Mask, Address); break;
case 0x03F08004: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to 0x%08X - Ignored", m_PC, Value, Mask, Address); break; case 0x03F08004: LogMessage("%016llX: Writing 0x%08X (Mask: 0x%08X) to 0x%08X - Ignored", m_PC, Value, Mask, Address); break;
case 0x03F80004: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to 0x%08X - Ignored", m_PC, Value, Mask, Address); break; case 0x03F80004: LogMessage("%016llX: Writing 0x%08X (Mask: 0x%08X) to 0x%08X - Ignored", m_PC, Value, Mask, Address); break;
case 0x03F80008: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to 0x%08X - Ignored", m_PC, Value, Mask, Address); break; case 0x03F80008: LogMessage("%016llX: Writing 0x%08X (Mask: 0x%08X) to 0x%08X - Ignored", m_PC, Value, Mask, Address); break;
case 0x03F8000C: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to 0x%08X - Ignored", m_PC, Value, Mask, Address); break; case 0x03F8000C: LogMessage("%016llX: Writing 0x%08X (Mask: 0x%08X) to 0x%08X - Ignored", m_PC, Value, Mask, Address); break;
case 0x03F80014: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to 0x%08X - Ignored", m_PC, Value, Mask, Address); break; case 0x03F80014: LogMessage("%016llX: Writing 0x%08X (Mask: 0x%08X) to 0x%08X - Ignored", m_PC, Value, Mask, Address); break;
default: default:
if (HaveDebugger()) if (HaveDebugger())
{ {

2
Source/Project64-core/N64System/MemoryHandler/RDRAMRegistersHandler.h
View File

@ -47,5 +47,5 @@ private:
RDRAMRegistersHandler(const RDRAMRegistersHandler &); RDRAMRegistersHandler(const RDRAMRegistersHandler &);
RDRAMRegistersHandler & operator=(const RDRAMRegistersHandler &); RDRAMRegistersHandler & operator=(const RDRAMRegistersHandler &);
uint32_t & m_PC; uint64_t & m_PC;
}; };

12
Source/Project64-core/N64System/MemoryHandler/RomMemoryHandler.cpp
View File

@ -37,12 +37,12 @@ bool RomMemoryHandler::Read32(uint32_t Address, uint32_t & Value)
{ {
switch (ReadAddr & 0x1FFFFFFF) switch (ReadAddr & 0x1FFFFFFF)
{ {
case 0x10000004: LogMessage("%08X: read from ROM clock rate (%08X)", m_PC, Value); break; case 0x10000004: LogMessage("%016llX: read from ROM clock rate (%08X)", m_PC, Value); break;
case 0x10000008: LogMessage("%08X: read from ROM boot address offset (%08X)", m_PC, Value); break; case 0x10000008: LogMessage("%016llX: read from ROM boot address offset (%08X)", m_PC, Value); break;
case 0x1000000C: LogMessage("%08X: read from ROM release offset (%08X)", m_PC, Value); break; case 0x1000000C: LogMessage("%016llX: read from ROM release offset (%08X)", m_PC, Value); break;
case 0x10000010: LogMessage("%08X: read from ROM CRC1 (%08X)", m_PC, Value); break; case 0x10000010: LogMessage("%016llX: read from ROM CRC1 (%08X)", m_PC, Value); break;
case 0x10000014: LogMessage("%08X: read from ROM CRC2 (%08X)", m_PC, Value); break; case 0x10000014: LogMessage("%016llX: read from ROM CRC2 (%08X)", m_PC, Value); break;
default: LogMessage("%08X: read from ROM header 0x%X (%08X)", m_PC, ReadAddr & 0xFF, Value); break; default: LogMessage("%016llX: read from ROM header 0x%X (%08X)", m_PC, ReadAddr & 0xFF, Value); break;
} }
} }
} }

2
Source/Project64-core/N64System/MemoryHandler/RomMemoryHandler.h
View File

@ -38,7 +38,7 @@ private:
_this->LoadedGameState(); _this->LoadedGameState();
} }
uint32_t & m_PC; uint64_t & m_PC;
CRegisters & m_Reg; CRegisters & m_Reg;
CN64Rom & m_Rom; CN64Rom & m_Rom;
bool m_RomWrittenTo; bool m_RomWrittenTo;

36
Source/Project64-core/N64System/MemoryHandler/SPRegistersHandler.cpp
View File

@ -73,15 +73,15 @@ bool SPRegistersHandler::Read32(uint32_t Address, uint32_t & Value)
{ {
switch (Address & 0x1FFFFFFF) switch (Address & 0x1FFFFFFF)
{ {
case 0x04040000: LogMessage("%08X: read from SP_MEM_ADDR_REG (%08X)", m_PC, Value); break; case 0x04040000: LogMessage("%016llX: read from SP_MEM_ADDR_REG (%08X)", m_PC, Value); break;
case 0x04040004: LogMessage("%08X: read from SP_DRAM_ADDR_REG (%08X)", m_PC, Value); break; case 0x04040004: LogMessage("%016llX: read from SP_DRAM_ADDR_REG (%08X)", m_PC, Value); break;
case 0x04040008: LogMessage("%08X: read from SP_RD_LEN_REG (%08X)", m_PC, Value); break; case 0x04040008: LogMessage("%016llX: read from SP_RD_LEN_REG (%08X)", m_PC, Value); break;
case 0x0404000C: LogMessage("%08X: read from SP_WR_LEN_REG (%08X)", m_PC, Value); break; case 0x0404000C: LogMessage("%016llX: read from SP_WR_LEN_REG (%08X)", m_PC, Value); break;
case 0x04040010: LogMessage("%08X: read from SP_STATUS_REG (%08X)", m_PC, Value); break; case 0x04040010: LogMessage("%016llX: read from SP_STATUS_REG (%08X)", m_PC, Value); break;
case 0x04040014: LogMessage("%08X: read from SP_DMA_FULL_REG (%08X)", m_PC, Value); break; case 0x04040014: LogMessage("%016llX: read from SP_DMA_FULL_REG (%08X)", m_PC, Value); break;
case 0x04040018: LogMessage("%08X: read from SP_DMA_BUSY_REG (%08X)", m_PC, Value); break; case 0x04040018: LogMessage("%016llX: read from SP_DMA_BUSY_REG (%08X)", m_PC, Value); break;
case 0x0404001C: LogMessage("%08X: read from SP_SEMAPHORE_REG (%08X)", m_PC, Value); break; case 0x0404001C: LogMessage("%016llX: read from SP_SEMAPHORE_REG (%08X)", m_PC, Value); break;
case 0x04080000: LogMessage("%08X: read from SP_PC (%08X)", m_PC, Value); break; case 0x04080000: LogMessage("%016llX: read from SP_PC (%08X)", m_PC, Value); break;
default: default:
if (BreakOnUnhandledMemory()) if (BreakOnUnhandledMemory())
{ {
@ -111,15 +111,15 @@ bool SPRegistersHandler::Write32(uint32_t Address, uint32_t Value, uint32_t Mask
{ {
switch (Address & 0x1FFFFFFF) switch (Address & 0x1FFFFFFF)
{ {
case 0x04040000: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to SP_MEM_ADDR_REG", m_PC, Value, Mask); break; case 0x04040000: LogMessage("%016llX: Writing 0x%08X (Mask: 0x%08X) to SP_MEM_ADDR_REG", m_PC, Value, Mask); break;
case 0x04040004: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to SP_DRAM_ADDR_REG", m_PC, Value, Mask); break; case 0x04040004: LogMessage("%016llX: Writing 0x%08X (Mask: 0x%08X) to SP_DRAM_ADDR_REG", m_PC, Value, Mask); break;
case 0x04040008: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to SP_RD_LEN_REG", m_PC, Value, Mask); break; case 0x04040008: LogMessage("%016llX: Writing 0x%08X (Mask: 0x%08X) to SP_RD_LEN_REG", m_PC, Value, Mask); break;
case 0x0404000C: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to SP_WR_LEN_REG", m_PC, Value, Mask); break; case 0x0404000C: LogMessage("%016llX: Writing 0x%08X (Mask: 0x%08X) to SP_WR_LEN_REG", m_PC, Value, Mask); break;
case 0x04040010: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to SP_STATUS_REG", m_PC, Value, Mask); break; case 0x04040010: LogMessage("%016llX: Writing 0x%08X (Mask: 0x%08X) to SP_STATUS_REG", m_PC, Value, Mask); break;
case 0x04040014: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to SP_DMA_FULL_REG", m_PC, Value, Mask); break; case 0x04040014: LogMessage("%016llX: Writing 0x%08X (Mask: 0x%08X) to SP_DMA_FULL_REG", m_PC, Value, Mask); break;
case 0x04040018: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to SP_DMA_BUSY_REG", m_PC, Value, Mask); break; case 0x04040018: LogMessage("%016llX: Writing 0x%08X (Mask: 0x%08X) to SP_DMA_BUSY_REG", m_PC, Value, Mask); break;
case 0x0404001C: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to SP_SEMAPHORE_REG", m_PC, Value, Mask); break; case 0x0404001C: LogMessage("%016llX: Writing 0x%08X (Mask: 0x%08X) to SP_SEMAPHORE_REG", m_PC, Value, Mask); break;
case 0x04080000: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to SP_PC", m_PC, Value, Mask); break; case 0x04080000: LogMessage("%016llX: Writing 0x%08X (Mask: 0x%08X) to SP_PC", m_PC, Value, Mask); break;
default: default:
if (BreakOnUnhandledMemory()) if (BreakOnUnhandledMemory())
{ {

2
Source/Project64-core/N64System/MemoryHandler/SPRegistersHandler.h
View File

@ -79,5 +79,5 @@ private:
CMipsMemoryVM & m_MMU; CMipsMemoryVM & m_MMU;
CRegisters & m_Reg; CRegisters & m_Reg;
uint32_t & m_RspIntrReg; uint32_t & m_RspIntrReg;
uint32_t & m_PC; uint64_t & m_PC;
}; };

20
Source/Project64-core/N64System/MemoryHandler/SerialInterfaceHandler.cpp
View File

@ -40,10 +40,10 @@ bool SerialInterfaceHandler::Read32(uint32_t Address, uint32_t & Value)
{ {
switch (Address & 0x1FFFFFFF) switch (Address & 0x1FFFFFFF)
{ {
case 0x04800000: LogMessage("%08X: read from SI_DRAM_ADDR_REG (%08X)", m_PC, Value); break; case 0x04800000: LogMessage("%016llX: read from SI_DRAM_ADDR_REG (%08X)", m_PC, Value); break;
case 0x04800004: LogMessage("%08X: read from SI_PIF_ADDR_RD64B_REG (%08X)", m_PC, Value); break; case 0x04800004: LogMessage("%016llX: read from SI_PIF_ADDR_RD64B_REG (%08X)", m_PC, Value); break;
case 0xA4800010: LogMessage("%08X: read from SI_PIF_ADDR_WR64B_REG (%08X)", m_PC, Value); break; case 0xA4800010: LogMessage("%016llX: read from SI_PIF_ADDR_WR64B_REG (%08X)", m_PC, Value); break;
case 0x04800018: LogMessage("%08X: read from SI_STATUS_REG (%08X)", m_PC, Value); break; case 0x04800018: LogMessage("%016llX: read from SI_STATUS_REG (%08X)", m_PC, Value); break;
default: default:
if (HaveDebugger()) if (HaveDebugger())
{ {
@ -62,10 +62,10 @@ bool SerialInterfaceHandler::Write32(uint32_t Address, uint32_t Value, uint32_t
{ {
switch (Address & 0x1FFFFFFF) switch (Address & 0x1FFFFFFF)
{ {
case 0x04800000: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to SI_DRAM_ADDR_REG", m_PC, Value, Mask); break; case 0x04800000: LogMessage("%016llX: Writing 0x%08X (Mask: 0x%08X) to SI_DRAM_ADDR_REG", m_PC, Value, Mask); break;
case 0x04800004: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to SI_PIF_ADDR_RD64B_REG", m_PC, Value, Mask); break; case 0x04800004: LogMessage("%016llX: Writing 0x%08X (Mask: 0x%08X) to SI_PIF_ADDR_RD64B_REG", m_PC, Value, Mask); break;
case 0x04800010: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to SI_PIF_ADDR_WR64B_REG", m_PC, Value, Mask); break; case 0x04800010: LogMessage("%016llX: Writing 0x%08X (Mask: 0x%08X) to SI_PIF_ADDR_WR64B_REG", m_PC, Value, Mask); break;
case 0x04800018: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to SI_STATUS_REG", m_PC, Value, Mask); break; case 0x04800018: LogMessage("%016llX: Writing 0x%08X (Mask: 0x%08X) to SI_STATUS_REG", m_PC, Value, Mask); break;
default: default:
if (HaveDebugger()) if (HaveDebugger())
{ {
@ -77,8 +77,8 @@ bool SerialInterfaceHandler::Write32(uint32_t Address, uint32_t Value, uint32_t
{ {
switch (Address & 0x1FFFFFFF) switch (Address & 0x1FFFFFFF)
{ {
case 0x04800004: LogMessage("%08X: A DMA transfer from the PIF RAM has occurred", m_PC); break; case 0x04800004: LogMessage("%016llX: A DMA transfer from the PIF RAM has occurred", m_PC); break;
case 0x04800010: LogMessage("%08X: A DMA transfer to the PIF RAM has occurred", m_PC); break; case 0x04800010: LogMessage("%016llX: A DMA transfer to the PIF RAM has occurred", m_PC); break;
} }
} }
} }

2
Source/Project64-core/N64System/MemoryHandler/SerialInterfaceHandler.h
View File

@ -56,5 +56,5 @@ private:
PifRamHandler & m_PifRamHandler; PifRamHandler & m_PifRamHandler;
CMipsMemoryVM & m_MMU; CMipsMemoryVM & m_MMU;
CRegisters & m_Reg; CRegisters & m_Reg;
uint32_t & m_PC; uint64_t & m_PC;
}; };

56
Source/Project64-core/N64System/MemoryHandler/VideoInterfaceHandler.cpp
View File

@ -91,20 +91,20 @@ bool VideoInterfaceHandler::Read32(uint32_t Address, uint32_t & Value)
{ {
switch (Address & 0x1FFFFFFF) switch (Address & 0x1FFFFFFF)
{ {
case 0x04400000: LogMessage("%08X: read from VI_STATUS_REG/VI_CONTROL_REG (%08X)", m_PC, Value); break; case 0x04400000: LogMessage("%016llX: read from VI_STATUS_REG/VI_CONTROL_REG (%08X)", m_PC, Value); break;
case 0x04400004: LogMessage("%08X: read from VI_ORIGIN_REG/VI_DRAM_ADDR_REG (%08X)", m_PC, Value); break; case 0x04400004: LogMessage("%016llX: read from VI_ORIGIN_REG/VI_DRAM_ADDR_REG (%08X)", m_PC, Value); break;
case 0x04400008: LogMessage("%08X: read from VI_WIDTH_REG/VI_H_WIDTH_REG (%08X)", m_PC, Value); break; case 0x04400008: LogMessage("%016llX: read from VI_WIDTH_REG/VI_H_WIDTH_REG (%08X)", m_PC, Value); break;
case 0x0440000C: LogMessage("%08X: read from VI_INTR_REG/VI_V_INTR_REG (%08X)", m_PC, Value); break; case 0x0440000C: LogMessage("%016llX: read from VI_INTR_REG/VI_V_INTR_REG (%08X)", m_PC, Value); break;
case 0x04400010: LogMessage("%08X: read from VI_CURRENT_REG/VI_V_CURRENT_LINE_REG (%08X)", m_PC, Value); break; case 0x04400010: LogMessage("%016llX: read from VI_CURRENT_REG/VI_V_CURRENT_LINE_REG (%08X)", m_PC, Value); break;
case 0x04400014: LogMessage("%08X: read from VI_BURST_REG/VI_TIMING_REG (%08X)", m_PC, Value); break; case 0x04400014: LogMessage("%016llX: read from VI_BURST_REG/VI_TIMING_REG (%08X)", m_PC, Value); break;
case 0x04400018: LogMessage("%08X: read from VI_V_SYNC_REG (%08X)", m_PC, Value); break; case 0x04400018: LogMessage("%016llX: read from VI_V_SYNC_REG (%08X)", m_PC, Value); break;
case 0x0440001C: LogMessage("%08X: read from VI_H_SYNC_REG (%08X)", m_PC, Value); break; case 0x0440001C: LogMessage("%016llX: read from VI_H_SYNC_REG (%08X)", m_PC, Value); break;
case 0x04400020: LogMessage("%08X: read from VI_LEAP_REG/VI_H_SYNC_LEAP_REG (%08X)", m_PC, Value); break; case 0x04400020: LogMessage("%016llX: read from VI_LEAP_REG/VI_H_SYNC_LEAP_REG (%08X)", m_PC, Value); break;
case 0x04400024: LogMessage("%08X: read from VI_H_START_REG/VI_H_VIDEO_REG (%08X)", m_PC, Value); break; case 0x04400024: LogMessage("%016llX: read from VI_H_START_REG/VI_H_VIDEO_REG (%08X)", m_PC, Value); break;
case 0x04400028: LogMessage("%08X: read from VI_V_START_REG/VI_V_VIDEO_REG (%08X)", m_PC, Value); break; case 0x04400028: LogMessage("%016llX: read from VI_V_START_REG/VI_V_VIDEO_REG (%08X)", m_PC, Value); break;
case 0x0440002C: LogMessage("%08X: read from VI_V_BURST_REG (%08X)", m_PC, Value); break; case 0x0440002C: LogMessage("%016llX: read from VI_V_BURST_REG (%08X)", m_PC, Value); break;
case 0x04400030: LogMessage("%08X: read from VI_X_SCALE_REG (%08X)", m_PC, Value); break; case 0x04400030: LogMessage("%016llX: read from VI_X_SCALE_REG (%08X)", m_PC, Value); break;
case 0x04400034: LogMessage("%08X: read from VI_Y_SCALE_REG (%08X)", m_PC, Value); break; case 0x04400034: LogMessage("%016llX: read from VI_Y_SCALE_REG (%08X)", m_PC, Value); break;
default: default:
if (HaveDebugger()) if (HaveDebugger())
{ {
@ -121,20 +121,20 @@ bool VideoInterfaceHandler::Write32(uint32_t Address, uint32_t Value, uint32_t M
{ {
switch (Address & 0x1FFFFFFF) switch (Address & 0x1FFFFFFF)
{ {
case 0x04400000: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to VI_STATUS_REG/VI_CONTROL_REG", m_PC, Value, Mask); break; case 0x04400000: LogMessage("%016llX: Writing 0x%08X (Mask: 0x%08X) to VI_STATUS_REG/VI_CONTROL_REG", m_PC, Value, Mask); break;
case 0x04400004: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to VI_ORIGIN_REG/VI_DRAM_ADDR_REG", m_PC, Value, Mask); break; case 0x04400004: LogMessage("%016llX: Writing 0x%08X (Mask: 0x%08X) to VI_ORIGIN_REG/VI_DRAM_ADDR_REG", m_PC, Value, Mask); break;
case 0x04400008: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to VI_WIDTH_REG/VI_H_WIDTH_REG", m_PC, Value, Mask); break; case 0x04400008: LogMessage("%016llX: Writing 0x%08X (Mask: 0x%08X) to VI_WIDTH_REG/VI_H_WIDTH_REG", m_PC, Value, Mask); break;
case 0x0440000C: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to VI_INTR_REG/VI_V_INTR_REG", m_PC, Value, Mask); break; case 0x0440000C: LogMessage("%016llX: Writing 0x%08X (Mask: 0x%08X) to VI_INTR_REG/VI_V_INTR_REG", m_PC, Value, Mask); break;
case 0x04400010: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to VI_CURRENT_REG/VI_V_CURRENT_LINE_REG", m_PC, Value, Mask); break; case 0x04400010: LogMessage("%016llX: Writing 0x%08X (Mask: 0x%08X) to VI_CURRENT_REG/VI_V_CURRENT_LINE_REG", m_PC, Value, Mask); break;
case 0x04400014: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to VI_BURST_REG/VI_TIMING_REG", m_PC, Value, Mask); break; case 0x04400014: LogMessage("%016llX: Writing 0x%08X (Mask: 0x%08X) to VI_BURST_REG/VI_TIMING_REG", m_PC, Value, Mask); break;
case 0x04400018: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to VI_V_SYNC_REG", m_PC, Value, Mask); break; case 0x04400018: LogMessage("%016llX: Writing 0x%08X (Mask: 0x%08X) to VI_V_SYNC_REG", m_PC, Value, Mask); break;
case 0x0440001C: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to VI_H_SYNC_REG", m_PC, Value, Mask); break; case 0x0440001C: LogMessage("%016llX: Writing 0x%08X (Mask: 0x%08X) to VI_H_SYNC_REG", m_PC, Value, Mask); break;
case 0x04400020: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to VI_LEAP_REG/VI_H_SYNC_LEAP_REG", m_PC, Value, Mask); break; case 0x04400020: LogMessage("%016llX: Writing 0x%08X (Mask: 0x%08X) to VI_LEAP_REG/VI_H_SYNC_LEAP_REG", m_PC, Value, Mask); break;
case 0x04400024: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to VI_H_START_REG/VI_H_VIDEO_REG", m_PC, Value, Mask); break; case 0x04400024: LogMessage("%016llX: Writing 0x%08X (Mask: 0x%08X) to VI_H_START_REG/VI_H_VIDEO_REG", m_PC, Value, Mask); break;
case 0x04400028: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to VI_V_START_REG/VI_V_VIDEO_REG", m_PC, Value, Mask); break; case 0x04400028: LogMessage("%016llX: Writing 0x%08X (Mask: 0x%08X) to VI_V_START_REG/VI_V_VIDEO_REG", m_PC, Value, Mask); break;
case 0x0440002C: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to VI_V_BURST_REG", m_PC, Value, Mask); break; case 0x0440002C: LogMessage("%016llX: Writing 0x%08X (Mask: 0x%08X) to VI_V_BURST_REG", m_PC, Value, Mask); break;
case 0x04400030: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to VI_X_SCALE_REG", m_PC, Value, Mask); break; case 0x04400030: LogMessage("%016llX: Writing 0x%08X (Mask: 0x%08X) to VI_X_SCALE_REG", m_PC, Value, Mask); break;
case 0x04400034: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to VI_Y_SCALE_REG", m_PC, Value, Mask); break; case 0x04400034: LogMessage("%016llX: Writing 0x%08X (Mask: 0x%08X) to VI_Y_SCALE_REG", m_PC, Value, Mask); break;
default: default:
if (HaveDebugger()) if (HaveDebugger())
{ {

2
Source/Project64-core/N64System/MemoryHandler/VideoInterfaceHandler.h
View File

@ -89,5 +89,5 @@ private:
CRegisters & m_Reg; CRegisters & m_Reg;
CSystemTimer & m_SystemTimer; CSystemTimer & m_SystemTimer;
int32_t & m_NextTimer; int32_t & m_NextTimer;
uint32_t & m_PC; uint64_t & m_PC;
}; };

1
Source/Project64-core/N64System/Mips/MemoryVirtualMem.h
View File

@ -149,6 +149,7 @@ private:
CMipsMemoryVM(const CMipsMemoryVM &); CMipsMemoryVM(const CMipsMemoryVM &);
CMipsMemoryVM & operator=(const CMipsMemoryVM &); CMipsMemoryVM & operator=(const CMipsMemoryVM &);
friend class R4300iOp;
#if defined(__i386__) || defined(_M_IX86) #if defined(__i386__) || defined(_M_IX86)
friend class CX86RecompilerOps; friend class CX86RecompilerOps;
#elif defined(__arm__) || defined(_M_ARM) #elif defined(__arm__) || defined(_M_ARM)

64
Source/Project64-core/N64System/Mips/R4300iInstruction.cpp
View File

@ -3,7 +3,7 @@
#include "R4300iInstruction.h" #include "R4300iInstruction.h"
#include <Project64-core/N64System/Mips/Register.h> #include <Project64-core/N64System/Mips/Register.h>
R4300iInstruction::R4300iInstruction(uint32_t Address, uint32_t Instruction) : R4300iInstruction::R4300iInstruction(uint64_t Address, uint32_t Instruction) :
m_Address(Address) m_Address(Address)
{ {
m_Name[0] = '\0'; m_Name[0] = '\0';
@ -20,7 +20,7 @@ R4300iInstruction & R4300iInstruction::operator=(const R4300iInstruction & Instr
return *this; return *this;
} }
const uint32_t & R4300iInstruction::Address() const const uint64_t & R4300iInstruction::Address() const
{ {
return m_Address; return m_Address;
} }
@ -291,48 +291,48 @@ void R4300iInstruction::DecodeName(void)
break; break;
case R4300i_J: case R4300i_J:
strcpy(m_Name, "J"); strcpy(m_Name, "J");
sprintf(m_Param, "0x%08X", (m_Address & 0xF0000000) + (m_Instruction.target << 2)); sprintf(m_Param, "0x%08X", (uint32_t)(m_Address & 0xF0000000) + (m_Instruction.target << 2));
break; break;
case R4300i_JAL: case R4300i_JAL:
strcpy(m_Name, "JAL"); strcpy(m_Name, "JAL");
sprintf(m_Param, "0x%08X", (m_Address & 0xF0000000) + (m_Instruction.target << 2)); sprintf(m_Param, "0x%08X", (uint32_t)(m_Address & 0xF0000000) + (m_Instruction.target << 2));
break; break;
case R4300i_BEQ: case R4300i_BEQ:
if (m_Instruction.rs == 0 && m_Instruction.rt == 0) if (m_Instruction.rs == 0 && m_Instruction.rt == 0)
{ {
strcpy(m_Name, "B"); strcpy(m_Name, "B");
sprintf(m_Param, "0x%08X", m_Address + ((int16_t)m_Instruction.offset << 2) + 4); sprintf(m_Param, "0x%08X", (uint32_t)(m_Address + ((int16_t)m_Instruction.offset << 2) + 4));
} }
else if (m_Instruction.rs == 0 || m_Instruction.rt == 0) else if (m_Instruction.rs == 0 || m_Instruction.rt == 0)
{ {
strcpy(m_Name, "BEQZ"); strcpy(m_Name, "BEQZ");
sprintf(m_Param, "%s, 0x%08X", CRegName::GPR[m_Instruction.rs == 0 ? m_Instruction.rt : m_Instruction.rs], m_Address + ((int16_t)m_Instruction.offset << 2) + 4); sprintf(m_Param, "%s, 0x%08X", CRegName::GPR[m_Instruction.rs == 0 ? m_Instruction.rt : m_Instruction.rs], (uint32_t)(m_Address + ((int16_t)m_Instruction.offset << 2) + 4));
} }
else else
{ {
strcpy(m_Name, "BEQ"); strcpy(m_Name, "BEQ");
sprintf(m_Param, "%s, %s, 0x%08X", CRegName::GPR[m_Instruction.rs], CRegName::GPR[m_Instruction.rt], m_Address + ((int16_t)m_Instruction.offset << 2) + 4); sprintf(m_Param, "%s, %s, 0x%08X", CRegName::GPR[m_Instruction.rs], CRegName::GPR[m_Instruction.rt], (uint32_t)(m_Address + ((int16_t)m_Instruction.offset << 2) + 4));
} }
break; break;
case R4300i_BNE: case R4300i_BNE:
if ((m_Instruction.rs == 0) ^ (m_Instruction.rt == 0)) if ((m_Instruction.rs == 0) ^ (m_Instruction.rt == 0))
{ {
strcpy(m_Name, "BNEZ"); strcpy(m_Name, "BNEZ");
sprintf(m_Param, "%s, 0x%08X", CRegName::GPR[m_Instruction.rs == 0 ? m_Instruction.rt : m_Instruction.rs], m_Address + ((int16_t)m_Instruction.offset << 2) + 4); sprintf(m_Param, "%s, 0x%08X", CRegName::GPR[m_Instruction.rs == 0 ? m_Instruction.rt : m_Instruction.rs], (uint32_t)(m_Address + ((int16_t)m_Instruction.offset << 2) + 4));
} }
else else
{ {
strcpy(m_Name, "BNE"); strcpy(m_Name, "BNE");
sprintf(m_Param, "%s, %s, 0x%08X", CRegName::GPR[m_Instruction.rs], CRegName::GPR[m_Instruction.rt], m_Address + ((int16_t)m_Instruction.offset << 2) + 4); sprintf(m_Param, "%s, %s, 0x%08X", CRegName::GPR[m_Instruction.rs], CRegName::GPR[m_Instruction.rt], (uint32_t)(m_Address + ((int16_t)m_Instruction.offset << 2) + 4));
} }
break; break;
case R4300i_BLEZ: case R4300i_BLEZ:
strcpy(m_Name, "BLEZ"); strcpy(m_Name, "BLEZ");
sprintf(m_Param, "%s, 0x%08X", CRegName::GPR[m_Instruction.rs], m_Address + ((int16_t)m_Instruction.offset << 2) + 4); sprintf(m_Param, "%s, 0x%08X", CRegName::GPR[m_Instruction.rs], (uint32_t)(m_Address + ((int16_t)m_Instruction.offset << 2) + 4));
break; break;
case R4300i_BGTZ: case R4300i_BGTZ:
strcpy(m_Name, "BGTZ"); strcpy(m_Name, "BGTZ");
sprintf(m_Param, "%s, 0x%08X", CRegName::GPR[m_Instruction.rs], m_Address + ((int16_t)m_Instruction.offset << 2) + 4); sprintf(m_Param, "%s, 0x%08X", CRegName::GPR[m_Instruction.rs], (uint32_t)(m_Address + ((int16_t)m_Instruction.offset << 2) + 4));
break; break;
case R4300i_ADDI: case R4300i_ADDI:
strcpy(m_Name, "ADDI"); strcpy(m_Name, "ADDI");
@ -431,38 +431,38 @@ void R4300iInstruction::DecodeName(void)
if (m_Instruction.rs == m_Instruction.rt) if (m_Instruction.rs == m_Instruction.rt)
{ {
strcpy(m_Name, "B"); strcpy(m_Name, "B");
sprintf(m_Param, "0x%08X", m_Address + ((int16_t)m_Instruction.offset << 2) + 4); sprintf(m_Param, "0x%08X", (uint32_t)(m_Address + ((int16_t)m_Instruction.offset << 2) + 4));
} }
else if ((m_Instruction.rs == 0) ^ (m_Instruction.rt == 0)) else if ((m_Instruction.rs == 0) ^ (m_Instruction.rt == 0))
{ {
strcpy(m_Name, "BEQZL"); strcpy(m_Name, "BEQZL");
sprintf(m_Param, "%s, 0x%08X", CRegName::GPR[m_Instruction.rs == 0 ? m_Instruction.rt : m_Instruction.rs], m_Address + ((int16_t)m_Instruction.offset << 2) + 4); sprintf(m_Param, "%s, 0x%08X", CRegName::GPR[m_Instruction.rs == 0 ? m_Instruction.rt : m_Instruction.rs], (uint32_t)(m_Address + ((int16_t)m_Instruction.offset << 2) + 4));
} }
else else
{ {
strcpy(m_Name, "BEQL"); strcpy(m_Name, "BEQL");
sprintf(m_Param, "%s, %s, 0x%08X", CRegName::GPR[m_Instruction.rs], CRegName::GPR[m_Instruction.rt], m_Address + ((int16_t)m_Instruction.offset << 2) + 4); sprintf(m_Param, "%s, %s, 0x%08X", CRegName::GPR[m_Instruction.rs], CRegName::GPR[m_Instruction.rt], (uint32_t)(m_Address + ((int16_t)m_Instruction.offset << 2) + 4));
} }
break; break;
case R4300i_BNEL: case R4300i_BNEL:
if ((m_Instruction.rs == 0) ^ (m_Instruction.rt == 0)) if ((m_Instruction.rs == 0) ^ (m_Instruction.rt == 0))
{ {
strcpy(m_Name, "BNEZL"); strcpy(m_Name, "BNEZL");
sprintf(m_Param, "%s, 0x%08X", CRegName::GPR[m_Instruction.rs == 0 ? m_Instruction.rt : m_Instruction.rs], m_Address + ((int16_t)m_Instruction.offset << 2) + 4); sprintf(m_Param, "%s, 0x%08X", CRegName::GPR[m_Instruction.rs == 0 ? m_Instruction.rt : m_Instruction.rs], (uint32_t)(m_Address + ((int16_t)m_Instruction.offset << 2) + 4));
} }
else else
{ {
strcpy(m_Name, "BNEL"); strcpy(m_Name, "BNEL");
sprintf(m_Param, "%s, %s, 0x%08X", CRegName::GPR[m_Instruction.rs], CRegName::GPR[m_Instruction.rt], m_Address + ((int16_t)m_Instruction.offset << 2) + 4); sprintf(m_Param, "%s, %s, 0x%08X", CRegName::GPR[m_Instruction.rs], CRegName::GPR[m_Instruction.rt], (uint32_t)(m_Address + ((int16_t)m_Instruction.offset << 2) + 4));
} }
break; break;
case R4300i_BLEZL: case R4300i_BLEZL:
strcpy(m_Name, "BLEZL"); strcpy(m_Name, "BLEZL");
sprintf(m_Param, "%s, 0x%08X", CRegName::GPR[m_Instruction.rs], m_Address + ((int16_t)m_Instruction.offset << 2) + 4); sprintf(m_Param, "%s, 0x%08X", CRegName::GPR[m_Instruction.rs], (uint32_t)(m_Address + ((int16_t)m_Instruction.offset << 2) + 4));
break; break;
case R4300i_BGTZL: case R4300i_BGTZL:
strcpy(m_Name, "BGTZL"); strcpy(m_Name, "BGTZL");
sprintf(m_Param, "%s, 0x%08X", CRegName::GPR[m_Instruction.rs], m_Address + ((int16_t)m_Instruction.offset << 2) + 4); sprintf(m_Param, "%s, 0x%08X", CRegName::GPR[m_Instruction.rs], (uint32_t)(m_Address + ((int16_t)m_Instruction.offset << 2) + 4));
break; break;
case R4300i_DADDI: case R4300i_DADDI:
strcpy(m_Name, "DADDI"); strcpy(m_Name, "DADDI");
@ -821,27 +821,27 @@ void R4300iInstruction::DecodeRegImmName(void)
{ {
case R4300i_REGIMM_BLTZ: case R4300i_REGIMM_BLTZ:
strcpy(m_Name, "BLTZ"); strcpy(m_Name, "BLTZ");
sprintf(m_Param, "%s, 0x%08X", CRegName::GPR[m_Instruction.rs], m_Address + ((int16_t)m_Instruction.offset << 2) + 4); sprintf(m_Param, "%s, 0x%08X", CRegName::GPR[m_Instruction.rs], (uint32_t)(m_Address + ((int16_t)m_Instruction.offset << 2) + 4));
break; break;
case R4300i_REGIMM_BGEZ: case R4300i_REGIMM_BGEZ:
if (m_Instruction.rs == 0) if (m_Instruction.rs == 0)
{ {
strcpy(m_Name, "B"); strcpy(m_Name, "B");
sprintf(m_Param, "0x%08X", m_Address + ((int16_t)m_Instruction.offset << 2) + 4); sprintf(m_Param, "0x%08X", (uint32_t)(m_Address + ((int16_t)m_Instruction.offset << 2) + 4));
} }
else else
{ {
strcpy(m_Name, "BGEZ"); strcpy(m_Name, "BGEZ");
sprintf(m_Param, "%s, 0x%08X", CRegName::GPR[m_Instruction.rs], m_Address + ((int16_t)m_Instruction.offset << 2) + 4); sprintf(m_Param, "%s, 0x%08X", CRegName::GPR[m_Instruction.rs], (uint32_t)(m_Address + ((int16_t)m_Instruction.offset << 2) + 4));
} }
break; break;
case R4300i_REGIMM_BLTZL: case R4300i_REGIMM_BLTZL:
strcpy(m_Name, "BLTZL"); strcpy(m_Name, "BLTZL");
sprintf(m_Param, "%s, 0x%08X", CRegName::GPR[m_Instruction.rs], m_Address + ((int16_t)m_Instruction.offset << 2) + 4); sprintf(m_Param, "%s, 0x%08X", CRegName::GPR[m_Instruction.rs], (uint32_t)(m_Address + ((int16_t)m_Instruction.offset << 2) + 4));
break; break;
case R4300i_REGIMM_BGEZL: case R4300i_REGIMM_BGEZL:
strcpy(m_Name, "BGEZL"); strcpy(m_Name, "BGEZL");
sprintf(m_Param, "%s, 0x%08X", CRegName::GPR[m_Instruction.rs], m_Address + ((int16_t)m_Instruction.offset << 2) + 4); sprintf(m_Param, "%s, 0x%08X", CRegName::GPR[m_Instruction.rs], (uint32_t)(m_Address + ((int16_t)m_Instruction.offset << 2) + 4));
break; break;
case R4300i_REGIMM_TGEI: case R4300i_REGIMM_TGEI:
strcpy(m_Name, "TGEI"); strcpy(m_Name, "TGEI");
@ -869,27 +869,27 @@ void R4300iInstruction::DecodeRegImmName(void)
break; break;
case R4300i_REGIMM_BLTZAL: case R4300i_REGIMM_BLTZAL:
strcpy(m_Name, "BLTZAL"); strcpy(m_Name, "BLTZAL");
sprintf(m_Param, "%s, 0x%08X", CRegName::GPR[m_Instruction.rs], m_Address + ((int16_t)m_Instruction.offset << 2) + 4); sprintf(m_Param, "%s, 0x%08X", CRegName::GPR[m_Instruction.rs], (uint32_t)(m_Address + ((int16_t)m_Instruction.offset << 2) + 4));
break; break;
case R4300i_REGIMM_BGEZAL: case R4300i_REGIMM_BGEZAL:
if (m_Instruction.rs == 0) if (m_Instruction.rs == 0)
{ {
strcpy(m_Name, "BAL"); strcpy(m_Name, "BAL");
sprintf(m_Param, "0x%08X", m_Address + ((int16_t)m_Instruction.offset << 2) + 4); sprintf(m_Param, "0x%08X", (uint32_t)(m_Address + ((int16_t)m_Instruction.offset << 2) + 4));
} }
else else
{ {
strcpy(m_Name, "BGEZAL"); strcpy(m_Name, "BGEZAL");
sprintf(m_Param, "%s, 0x%08X", CRegName::GPR[m_Instruction.rs], m_Address + ((int16_t)m_Instruction.offset << 2) + 4); sprintf(m_Param, "%s, 0x%08X", CRegName::GPR[m_Instruction.rs], (uint32_t)(m_Address + ((int16_t)m_Instruction.offset << 2) + 4));
} }
break; break;
case R4300i_REGIMM_BLTZALL: case R4300i_REGIMM_BLTZALL:
strcpy(m_Name, "BLTZALL"); strcpy(m_Name, "BLTZALL");
sprintf(m_Param, "%s, 0x%08X", CRegName::GPR[m_Instruction.rs], m_Address + ((int16_t)m_Instruction.offset << 2) + 4); sprintf(m_Param, "%s, 0x%08X", CRegName::GPR[m_Instruction.rs], (uint32_t)(m_Address + ((int16_t)m_Instruction.offset << 2) + 4));
break; break;
case R4300i_REGIMM_BGEZALL: case R4300i_REGIMM_BGEZALL:
strcpy(m_Name, "BGEZALL"); strcpy(m_Name, "BGEZALL");
sprintf(m_Param, "%s, 0x%08X", CRegName::GPR[m_Instruction.rs], m_Address + ((int16_t)m_Instruction.offset << 2) + 4); sprintf(m_Param, "%s, 0x%08X", CRegName::GPR[m_Instruction.rs], (uint32_t)(m_Address + ((int16_t)m_Instruction.offset << 2) + 4));
break; break;
default: default:
strcpy(m_Name, "UNKNOWN"); strcpy(m_Name, "UNKNOWN");
@ -930,19 +930,19 @@ void R4300iInstruction::DecodeCop1Name(void)
{ {
case R4300i_COP1_BC_BCF: case R4300i_COP1_BC_BCF:
strcpy(m_Name, "BC1F"); strcpy(m_Name, "BC1F");
sprintf(m_Param, "0x%08X", m_Address + ((int16_t)m_Instruction.offset << 2) + 4); sprintf(m_Param, "0x%08X", (uint32_t)(m_Address + ((int16_t)m_Instruction.offset << 2) + 4));
break; break;
case R4300i_COP1_BC_BCT: case R4300i_COP1_BC_BCT:
strcpy(m_Name, "BC1T"); strcpy(m_Name, "BC1T");
sprintf(m_Param, "0x%08X", m_Address + ((int16_t)m_Instruction.offset << 2) + 4); sprintf(m_Param, "0x%08X", (uint32_t)(m_Address + ((int16_t)m_Instruction.offset << 2) + 4));
break; break;
case R4300i_COP1_BC_BCFL: case R4300i_COP1_BC_BCFL:
strcpy(m_Name, "BC1FL"); strcpy(m_Name, "BC1FL");
sprintf(m_Param, "0x%08X", m_Address + ((int16_t)m_Instruction.offset << 2) + 4); sprintf(m_Param, "0x%08X", (uint32_t)(m_Address + ((int16_t)m_Instruction.offset << 2) + 4));
break; break;
case R4300i_COP1_BC_BCTL: case R4300i_COP1_BC_BCTL:
strcpy(m_Name, "BC1TL"); strcpy(m_Name, "BC1TL");
sprintf(m_Param, "0x%08X", m_Address + ((int16_t)m_Instruction.offset << 2) + 4); sprintf(m_Param, "0x%08X", (uint32_t)(m_Address + ((int16_t)m_Instruction.offset << 2) + 4));
break; break;
default: default:
strcpy(m_Name, "UNKNOWN COP1"); strcpy(m_Name, "UNKNOWN COP1");

6
Source/Project64-core/N64System/Mips/R4300iInstruction.h
View File

@ -5,10 +5,10 @@
class R4300iInstruction class R4300iInstruction
{ {
public: public:
R4300iInstruction(uint32_t Address, uint32_t Instruction); R4300iInstruction(uint64_t Address, uint32_t Instruction);
R4300iInstruction & operator=(const R4300iInstruction &); R4300iInstruction & operator=(const R4300iInstruction &);
const uint32_t & Address() const; const uint64_t & Address() const;
const R4300iOpcode & Opcode() const; const R4300iOpcode & Opcode() const;
const char * Name(); const char * Name();
const char * Param(); const char * Param();
@ -35,7 +35,7 @@ private:
void DecodeCop1Name(void); void DecodeCop1Name(void);
void DecodeCop2Name(void); void DecodeCop2Name(void);
uint32_t m_Address; uint64_t m_Address;
R4300iOpcode m_Instruction; R4300iOpcode m_Instruction;
char m_Name[40]; char m_Name[40];
char m_Param[200]; char m_Param[200];

18
Source/Project64-core/N64System/Mips/Register.cpp
View File

@ -365,7 +365,7 @@ void CRegisters::Reset(bool bPostPif, CMipsMemoryVM & MMU)
if (bPostPif) if (bPostPif)
{ {
m_PROGRAM_COUNTER = 0xA4000040; m_PROGRAM_COUNTER = 0xFFFFFFFFA4000040;
m_GPR[0].DW = 0x0000000000000000; m_GPR[0].DW = 0x0000000000000000;
m_GPR[6].DW = 0xFFFFFFFFA4001F0C; m_GPR[6].DW = 0xFFFFFFFFA4001F0C;
@ -529,7 +529,7 @@ void CRegisters::Reset(bool bPostPif, CMipsMemoryVM & MMU)
} }
else else
{ {
m_PROGRAM_COUNTER = 0xBFC00000; m_PROGRAM_COUNTER = 0xFFFFFFFFBFC00000;
/* PIF_Ram[36] = 0x00; PIF_Ram[39] = 0x3F; // Common PIF RAM start values /* PIF_Ram[36] = 0x00; PIF_Ram[39] = 0x3F; // Common PIF RAM start values
switch (g_Rom->CicChipID()) { switch (g_Rom->CicChipID()) {
@ -548,7 +548,7 @@ uint64_t CRegisters::Cop0_MF(COP0Reg Reg)
{ {
if (LogCP0reads() && Reg <= COP0Reg_31) if (LogCP0reads() && Reg <= COP0Reg_31)
{ {
LogMessage("%08X: R4300i read from %s (0x%08X)", m_PROGRAM_COUNTER, CRegName::Cop0[Reg], m_CP0[Reg]); LogMessage("%016llX: R4300i read from %s (0x%08X)", m_PROGRAM_COUNTER, CRegName::Cop0[Reg], m_CP0[Reg]);
} }
if (Reg == COP0Reg_Count || Reg == COP0Reg_Wired || Reg == COP0Reg_Random) if (Reg == COP0Reg_Count || Reg == COP0Reg_Wired || Reg == COP0Reg_Random)
@ -567,10 +567,10 @@ void CRegisters::Cop0_MT(COP0Reg Reg, uint64_t Value)
{ {
if (LogCP0changes() && Reg <= COP0Reg_31) if (LogCP0changes() && Reg <= COP0Reg_31)
{ {
LogMessage("%08X: Writing 0x%llX to %s register (originally: 0x%llX)", m_PROGRAM_COUNTER, Value, CRegName::Cop0[Reg], m_CP0[Reg]); LogMessage("%016llX: Writing 0x%llX to %s register (originally: 0x%llX)", m_PROGRAM_COUNTER, Value, CRegName::Cop0[Reg], m_CP0[Reg]);
if (Reg == 11) // Compare if (Reg == 11) // Compare
{ {
LogMessage("%08X: Cause register changed from %08X to %08X", m_PROGRAM_COUNTER, (uint32_t)CAUSE_REGISTER.Value, (uint32_t)(g_Reg->CAUSE_REGISTER.Value & ~CAUSE_IP7)); LogMessage("%016llX: Cause register changed from %08X to %08X", m_PROGRAM_COUNTER, (uint32_t)CAUSE_REGISTER.Value, (uint32_t)(g_Reg->CAUSE_REGISTER.Value & ~CAUSE_IP7));
} }
} }
m_CP0Latch = Value; m_CP0Latch = Value;
@ -797,7 +797,7 @@ void CRegisters::TriggerAddressException(uint64_t Address, uint32_t ExceptionCod
TriggerException(ExceptionCode, 0); TriggerException(ExceptionCode, 0);
if (SpecialOffset) if (SpecialOffset)
{ {
m_System.m_JumpToLocation = (m_System.m_JumpToLocation & 0xFFFF0000); m_System.m_JumpToLocation = (m_System.m_JumpToLocation & 0xFFFFFFFFFFFF0000);
switch (STATUS_REGISTER.PrivilegeMode) switch (STATUS_REGISTER.PrivilegeMode)
{ {
case PrivilegeMode_Kernel: case PrivilegeMode_Kernel:
@ -819,11 +819,11 @@ void CRegisters::TriggerException(uint32_t ExceptionCode, uint32_t Coprocessor)
{ {
if (ExceptionCode != EXC_INT) if (ExceptionCode != EXC_INT)
{ {
LogMessage("%08X: Exception %d", m_PROGRAM_COUNTER, ExceptionCode); LogMessage("%016llX: Exception %d", m_PROGRAM_COUNTER, ExceptionCode);
} }
else if (!LogNoInterrupts()) else if (!LogNoInterrupts())
{ {
LogMessage("%08X: Interrupt generated", m_PROGRAM_COUNTER); LogMessage("%016llX: Interrupt generated", m_PROGRAM_COUNTER);
} }
} }
@ -833,5 +833,5 @@ void CRegisters::TriggerException(uint32_t ExceptionCode, uint32_t Coprocessor)
EPC_REGISTER = (int64_t)((int32_t)m_PROGRAM_COUNTER - (CAUSE_REGISTER.BranchDelay ? 4 : 0)); EPC_REGISTER = (int64_t)((int32_t)m_PROGRAM_COUNTER - (CAUSE_REGISTER.BranchDelay ? 4 : 0));
STATUS_REGISTER.ExceptionLevel = 1; STATUS_REGISTER.ExceptionLevel = 1;
m_System.m_PipelineStage = PIPELINE_STAGE_JUMP; m_System.m_PipelineStage = PIPELINE_STAGE_JUMP;
m_System.m_JumpToLocation = 0x80000180; m_System.m_JumpToLocation = 0xFFFFFFFF80000180;
} }

2
Source/Project64-core/N64System/Mips/Register.h
View File

@ -499,7 +499,7 @@ public:
void Cop2_MT(uint32_t Reg, uint64_t Value); void Cop2_MT(uint32_t Reg, uint64_t Value);
// General registers // General registers
uint32_t m_PROGRAM_COUNTER; uint64_t m_PROGRAM_COUNTER;
MIPS_DWORD m_GPR[32]; MIPS_DWORD m_GPR[32];
uint64_t m_CP0[32]; uint64_t m_CP0[32];
uint64_t m_CP0Latch; uint64_t m_CP0Latch;

28
Source/Project64-core/N64System/N64System.cpp
View File

@ -1343,7 +1343,7 @@ void CN64System::DumpSyncErrors()
#endif #endif
if (m_Reg.m_PROGRAM_COUNTER != m_SyncCPU->m_Reg.m_PROGRAM_COUNTER) if (m_Reg.m_PROGRAM_COUNTER != m_SyncCPU->m_Reg.m_PROGRAM_COUNTER)
{ {
Error.LogF("PROGRAM_COUNTER 0x%X, 0x%X\r\n", m_Reg.m_PROGRAM_COUNTER, m_SyncCPU->m_Reg.m_PROGRAM_COUNTER); Error.LogF("PROGRAM_COUNTER 0x%016llX, 0x%016llX\r\n", m_Reg.m_PROGRAM_COUNTER, m_SyncCPU->m_Reg.m_PROGRAM_COUNTER);
} }
if (b32BitCore()) if (b32BitCore())
{ {
@ -1564,20 +1564,22 @@ void CN64System::DumpSyncErrors()
Error.Log("Code at PC:\r\n"); Error.Log("Code at PC:\r\n");
for (count = -10; count < 10; count++) for (count = -10; count < 10; count++)
{ {
uint32_t OpcodeValue, Addr = m_Reg.m_PROGRAM_COUNTER + (count << 2); uint64_t Addr = m_Reg.m_PROGRAM_COUNTER + (count << 2);
if (g_MMU->MemoryValue32(Addr, OpcodeValue)) uint32_t OpcodeValue;
if (g_MMU->MemoryValue32((uint32_t)Addr, OpcodeValue))
{ {
Error.LogF("%X: %s\r\n", Addr, R4300iInstruction(Addr, OpcodeValue).NameAndParam().c_str()); Error.LogF("%X: %s\r\n", (uint32_t)Addr, R4300iInstruction(Addr, OpcodeValue).NameAndParam().c_str());
} }
} }
Error.Log("\r\n"); Error.Log("\r\n");
Error.Log("Code at last sync PC:\r\n"); Error.Log("Code at last sync PC:\r\n");
for (count = 0; count < 50; count++) for (count = 0; count < 50; count++)
{ {
uint32_t OpcodeValue, Addr = m_LastSuccessSyncPC[0] + (count << 2); uint64_t Addr = m_LastSuccessSyncPC[0] + (count << 2);
if (g_MMU->MemoryValue32(Addr, OpcodeValue)) uint32_t OpcodeValue;
if (g_MMU->MemoryValue32((uint32_t)Addr, OpcodeValue))
{ {
Error.LogF("%X: %s\r\n", Addr, R4300iInstruction(Addr, OpcodeValue).NameAndParam().c_str()); Error.LogF("%X: %s\r\n", (uint32_t)Addr, R4300iInstruction(Addr, OpcodeValue).NameAndParam().c_str());
} }
} }
} }
@ -1661,8 +1663,7 @@ bool CN64System::SaveState()
zipWriteInFileInZip(file, g_Rom->GetRomAddress(), 0x40); zipWriteInFileInZip(file, g_Rom->GetRomAddress(), 0x40);
} }
zipWriteInFileInZip(file, &NextViTimer, sizeof(uint32_t)); zipWriteInFileInZip(file, &NextViTimer, sizeof(uint32_t));
int64_t WriteProgramCounter = ((int32_t)m_Reg.m_PROGRAM_COUNTER); zipWriteInFileInZip(file, &m_Reg.m_PROGRAM_COUNTER, sizeof(int64_t));
zipWriteInFileInZip(file, &WriteProgramCounter, sizeof(int64_t));
zipWriteInFileInZip(file, m_Reg.m_GPR, sizeof(int64_t) * 32); zipWriteInFileInZip(file, m_Reg.m_GPR, sizeof(int64_t) * 32);
zipWriteInFileInZip(file, m_Reg.m_FPR, sizeof(int64_t) * 32); zipWriteInFileInZip(file, m_Reg.m_FPR, sizeof(int64_t) * 32);
zipWriteInFileInZip(file, m_Reg.m_CP0, sizeof(uint64_t) * 32); zipWriteInFileInZip(file, m_Reg.m_CP0, sizeof(uint64_t) * 32);
@ -1732,8 +1733,7 @@ bool CN64System::SaveState()
hSaveFile.Write(g_Rom->GetRomAddress(), 0x40); hSaveFile.Write(g_Rom->GetRomAddress(), 0x40);
} }
hSaveFile.Write(&NextViTimer, sizeof(uint32_t)); hSaveFile.Write(&NextViTimer, sizeof(uint32_t));
int64_t WriteProgramCounter = ((int32_t)m_Reg.m_PROGRAM_COUNTER); hSaveFile.Write(&m_Reg.m_PROGRAM_COUNTER, sizeof(int64_t));
hSaveFile.Write(&WriteProgramCounter, sizeof(int64_t));
hSaveFile.Write(m_Reg.m_GPR, sizeof(int64_t) * 32); hSaveFile.Write(m_Reg.m_GPR, sizeof(int64_t) * 32);
hSaveFile.Write(m_Reg.m_FPR, sizeof(int64_t) * 32); hSaveFile.Write(m_Reg.m_FPR, sizeof(int64_t) * 32);
hSaveFile.Write(m_Reg.m_CP0, sizeof(uint64_t) * 32); hSaveFile.Write(m_Reg.m_CP0, sizeof(uint64_t) * 32);
@ -2263,7 +2263,7 @@ void CN64System::NotifyCallback(CN64SystemCB Type)
} }
} }
void CN64System::DelayedJump(uint32_t JumpLocation) void CN64System::DelayedJump(uint64_t JumpLocation)
{ {
if (m_PipelineStage == PIPELINE_STAGE_JUMP) if (m_PipelineStage == PIPELINE_STAGE_JUMP)
{ {
@ -2281,7 +2281,7 @@ void CN64System::DelayedJump(uint32_t JumpLocation)
} }
} }
void CN64System::DelayedRelativeJump(uint32_t RelativeLocation) void CN64System::DelayedRelativeJump(uint64_t RelativeLocation)
{ {
if (m_PipelineStage == PIPELINE_STAGE_JUMP) if (m_PipelineStage == PIPELINE_STAGE_JUMP)
{ {
@ -2296,7 +2296,7 @@ void CN64System::DelayedRelativeJump(uint32_t RelativeLocation)
if (m_Reg.m_PROGRAM_COUNTER == m_JumpToLocation) if (m_Reg.m_PROGRAM_COUNTER == m_JumpToLocation)
{ {
R4300iOpcode DelaySlot; R4300iOpcode DelaySlot;
if (m_MMU_VM.MemoryValue32(m_Reg.m_PROGRAM_COUNTER + 4, DelaySlot.Value) && !R4300iInstruction(m_Reg.m_PROGRAM_COUNTER, m_OpCodes.Opcode().Value).DelaySlotEffectsCompare(DelaySlot.Value)) if (m_MMU_VM.MemoryValue32((uint32_t)(m_Reg.m_PROGRAM_COUNTER + 4), DelaySlot.Value) && !R4300iInstruction(m_Reg.m_PROGRAM_COUNTER, m_OpCodes.Opcode().Value).DelaySlotEffectsCompare(DelaySlot.Value))
{ {
m_PipelineStage = PIPELINE_STAGE_PERMLOOP_DO_DELAY; m_PipelineStage = PIPELINE_STAGE_PERMLOOP_DO_DELAY;
} }

12
Source/Project64-core/N64System/N64System.h
View File

@ -117,7 +117,7 @@ public:
{ {
return m_PipelineStage; return m_PipelineStage;
} }
uint32_t JumpToLocation() const uint64_t JumpToLocation() const
{ {
return m_JumpToLocation; return m_JumpToLocation;
} }
@ -161,8 +161,8 @@ private:
void StartEmulation2(bool NewThread); void StartEmulation2(bool NewThread);
bool SetActiveSystem(bool bActive = true); bool SetActiveSystem(bool bActive = true);
void NotifyCallback(CN64SystemCB Type); void NotifyCallback(CN64SystemCB Type);
void DelayedJump(uint32_t JumpLocation); void DelayedJump(uint64_t JumpLocation);
void DelayedRelativeJump(uint32_t RelativeLocation); void DelayedRelativeJump(uint64_t RelativeLocation);
// CPU methods // CPU methods
void ExecuteRecompiler(); void ExecuteRecompiler();
@ -196,8 +196,8 @@ private:
uint32_t m_Buttons[4]; uint32_t m_Buttons[4];
bool m_TestTimer; bool m_TestTimer;
PIPELINE_STAGE m_PipelineStage; PIPELINE_STAGE m_PipelineStage;
uint32_t m_JumpToLocation; uint64_t m_JumpToLocation;
uint32_t m_JumpDelayLocation; uint64_t m_JumpDelayLocation;
uint32_t m_TLBLoadAddress; uint32_t m_TLBLoadAddress;
uint32_t m_TLBStoreAddress; uint32_t m_TLBStoreAddress;
uint32_t m_SyncCount; uint32_t m_SyncCount;
@ -205,7 +205,7 @@ private:
CRandom m_Random; CRandom m_Random;
// When syncing cores this is the PC where it last synced correctly // When syncing cores this is the PC where it last synced correctly
uint32_t m_LastSuccessSyncPC[10]; uint64_t m_LastSuccessSyncPC[10];
int32_t m_CyclesToSkip; int32_t m_CyclesToSkip;
// Handle to the CPU thread // Handle to the CPU thread

12
Source/Project64-core/N64System/Recompiler/CodeSection.cpp
View File

@ -63,7 +63,7 @@ void CCodeSection::GenerateSectionLinkage()
R4300iOpcode JumpOp, DelaySlot; R4300iOpcode JumpOp, DelaySlot;
if (g_MMU->MemoryValue32(m_RecompilerOps->GetCurrentPC(), JumpOp.Value) && if (g_MMU->MemoryValue32(m_RecompilerOps->GetCurrentPC(), JumpOp.Value) &&
g_MMU->MemoryValue32(m_RecompilerOps->GetCurrentPC() + 4, DelaySlot.Value) && g_MMU->MemoryValue32(m_RecompilerOps->GetCurrentPC() + 4, DelaySlot.Value) &&
!R4300iInstruction(m_RecompilerOps->GetCurrentPC(), JumpOp.Value).DelaySlotEffectsCompare(DelaySlot.Value)) !R4300iInstruction((int32_t)m_RecompilerOps->GetCurrentPC(), JumpOp.Value).DelaySlotEffectsCompare(DelaySlot.Value))
{ {
m_RecompilerOps->CompileInPermLoop(m_Jump.RegSet, m_RecompilerOps->GetCurrentPC()); m_RecompilerOps->CompileInPermLoop(m_Jump.RegSet, m_RecompilerOps->GetCurrentPC());
} }
@ -90,7 +90,7 @@ void CCodeSection::GenerateSectionLinkage()
JumpInfo[i]->RegSet.SetMipsRegState(31, CRegInfo::STATE_CONST_32_SIGN); JumpInfo[i]->RegSet.SetMipsRegState(31, CRegInfo::STATE_CONST_32_SIGN);
JumpInfo[i]->LinkAddress = (uint32_t)-1; JumpInfo[i]->LinkAddress = (uint32_t)-1;
} }
m_RecompilerOps->CompileExit(JumpInfo[i]->JumpPC, JumpInfo[i]->TargetPC, JumpInfo[i]->RegSet, JumpInfo[i]->Reason); m_RecompilerOps->CompileExit((int32_t)JumpInfo[i]->JumpPC, (int32_t)JumpInfo[i]->TargetPC, JumpInfo[i]->RegSet, JumpInfo[i]->Reason);
JumpInfo[i]->FallThrough = false; JumpInfo[i]->FallThrough = false;
} }
else if (TargetSection[i] != nullptr && JumpInfo[i] != nullptr) else if (TargetSection[i] != nullptr && JumpInfo[i] != nullptr)
@ -258,7 +258,7 @@ void CCodeSection::GenerateSectionLinkage()
JumpInfo[i]->RegSet.SetMipsRegState(31, CRegInfo::STATE_CONST_32_SIGN); JumpInfo[i]->RegSet.SetMipsRegState(31, CRegInfo::STATE_CONST_32_SIGN);
JumpInfo[i]->LinkAddress = (uint32_t)-1; JumpInfo[i]->LinkAddress = (uint32_t)-1;
} }
m_RecompilerOps->CompileExit(JumpInfo[i]->JumpPC, JumpInfo[i]->TargetPC, JumpInfo[i]->RegSet, JumpInfo[i]->Reason); m_RecompilerOps->CompileExit((int32_t)JumpInfo[i]->JumpPC, (int32_t)JumpInfo[i]->TargetPC, JumpInfo[i]->RegSet, JumpInfo[i]->Reason);
continue; continue;
} }
if (JumpInfo[i]->TargetPC != TargetSection[i]->m_EnterPC) if (JumpInfo[i]->TargetPC != TargetSection[i]->m_EnterPC)
@ -390,7 +390,7 @@ bool CCodeSection::GenerateNativeCode(uint32_t Test)
uint32_t ContinueSectionPC = m_ContinueSection ? m_ContinueSection->m_EnterPC : (uint32_t)-1; uint32_t ContinueSectionPC = m_ContinueSection ? m_ContinueSection->m_EnterPC : (uint32_t)-1;
const R4300iOpcode & Opcode = m_RecompilerOps->GetOpcode(); const R4300iOpcode & Opcode = m_RecompilerOps->GetOpcode();
R4300iInstruction Instruction(m_RecompilerOps->GetCurrentPC(), Opcode.Value); R4300iInstruction Instruction((int32_t)m_RecompilerOps->GetCurrentPC(), Opcode.Value);
do do
{ {
if (m_RecompilerOps->GetCurrentPC() > m_CodeBlock.VAddrLast()) if (m_RecompilerOps->GetCurrentPC() > m_CodeBlock.VAddrLast())
@ -721,11 +721,11 @@ bool CCodeSection::GenerateNativeCode(uint32_t Test)
{ {
if (m_DelaySlot) if (m_DelaySlot)
{ {
m_RecompilerOps->CompileExit(m_RecompilerOps->GetCurrentPC(), m_Jump.TargetPC, m_RecompilerOps->GetRegWorkingSet(), ExitReason_Normal); m_RecompilerOps->CompileExit((int32_t)m_RecompilerOps->GetCurrentPC(), (int32_t)m_Jump.TargetPC, m_RecompilerOps->GetRegWorkingSet(), ExitReason_Normal);
} }
else else
{ {
m_RecompilerOps->CompileExit(m_RecompilerOps->GetCurrentPC(), m_RecompilerOps->GetCurrentPC() + 4, m_RecompilerOps->GetRegWorkingSet(), ExitReason_Normal); m_RecompilerOps->CompileExit((int32_t)m_RecompilerOps->GetCurrentPC(), (int32_t)(m_RecompilerOps->GetCurrentPC() + 4), m_RecompilerOps->GetRegWorkingSet(), ExitReason_Normal);
} }
m_RecompilerOps->SetNextStepType(PIPELINE_STAGE_END_BLOCK); m_RecompilerOps->SetNextStepType(PIPELINE_STAGE_END_BLOCK);
} }

2
Source/Project64-core/N64System/Recompiler/ExitInfo.h
View File

@ -32,7 +32,7 @@ struct CExitInfo
std::string Name; std::string Name;
uint32_t ID; uint32_t ID;
uint32_t TargetPC; uint64_t TargetPC;
CRegInfo ExitRegSet; CRegInfo ExitRegSet;
ExitReason Reason; ExitReason Reason;
PIPELINE_STAGE PipelineStage; PIPELINE_STAGE PipelineStage;

2
Source/Project64-core/N64System/Recompiler/LoopAnalysis.cpp
View File

@ -194,7 +194,7 @@ bool LoopAnalysis::CheckLoopRegisterUsage(CCodeSection * Section)
g_Notify->BreakPoint(__FILE__, __LINE__); g_Notify->BreakPoint(__FILE__, __LINE__);
return false; return false;
} }
m_CodeBlock.Log(" %08X: %s", m_PC, R4300iInstruction(m_PC, m_Command.Value).NameAndParam().c_str()); m_CodeBlock.Log(" %016llX: %s", m_PC, R4300iInstruction(m_PC, m_Command.Value).NameAndParam().c_str());
switch (m_Command.op) switch (m_Command.op)
{ {
case R4300i_SPECIAL: case R4300i_SPECIAL:

36
Source/Project64-core/N64System/Recompiler/Recompiler.cpp
View File

@ -74,16 +74,16 @@ void CRecompiler::Run()
void CRecompiler::RecompilerMain_VirtualTable() void CRecompiler::RecompilerMain_VirtualTable()
{ {
bool & Done = m_EndEmulation; bool & Done = m_EndEmulation;
uint32_t & PC = PROGRAM_COUNTER; uint64_t & PC = PROGRAM_COUNTER;
while (!Done) while (!Done)
{ {
if (!m_MMU.ValidVaddr(PC)) if (!m_MMU.ValidVaddr((uint32_t)PC))
{ {
m_Reg.TriggerAddressException(PC, EXC_RMISS); m_Reg.TriggerAddressException(PC, EXC_RMISS);
PC = m_System.m_JumpToLocation; PC = m_System.m_JumpToLocation;
m_System.m_PipelineStage = PIPELINE_STAGE_NORMAL; m_System.m_PipelineStage = PIPELINE_STAGE_NORMAL;
if (!m_MMU.ValidVaddr(PC)) if (!m_MMU.ValidVaddr((uint32_t)PC))
{ {
g_Notify->DisplayError(stdstr_f("Failed to translate PC to a PAddr: %X\n\nEmulation stopped", PC).c_str()); g_Notify->DisplayError(stdstr_f("Failed to translate PC to a PAddr: %X\n\nEmulation stopped", PC).c_str());
return; return;
@ -135,10 +135,10 @@ void CRecompiler::RecompilerMain_Lookup()
while (!m_EndEmulation) while (!m_EndEmulation)
{ {
if (!m_MMU.VAddrToPAddr(PROGRAM_COUNTER, PhysicalAddr)) if (!m_MMU.VAddrToPAddr((uint32_t)PROGRAM_COUNTER, PhysicalAddr))
{ {
m_Reg.TriggerAddressException(PROGRAM_COUNTER, EXC_RMISS); m_Reg.TriggerAddressException(PROGRAM_COUNTER, EXC_RMISS);
if (!m_MMU.VAddrToPAddr(PROGRAM_COUNTER, PhysicalAddr)) if (!m_MMU.VAddrToPAddr((uint32_t)PROGRAM_COUNTER, PhysicalAddr))
{ {
g_Notify->DisplayError(stdstr_f("Failed to translate PC to a PAddr: %X\n\nEmulation stopped", PROGRAM_COUNTER).c_str()); g_Notify->DisplayError(stdstr_f("Failed to translate PC to a PAddr: %X\n\nEmulation stopped", PROGRAM_COUNTER).c_str());
m_EndEmulation = true; m_EndEmulation = true;
@ -166,7 +166,7 @@ void CRecompiler::RecompilerMain_Lookup()
{ {
uint32_t opsExecuted = 0; uint32_t opsExecuted = 0;
while (m_MMU.VAddrToPAddr(PROGRAM_COUNTER, PhysicalAddr) && PhysicalAddr >= m_System.RdramSize()) while (m_MMU.VAddrToPAddr((uint32_t)PROGRAM_COUNTER, PhysicalAddr) && PhysicalAddr >= m_System.RdramSize())
{ {
m_System.m_OpCodes.ExecuteOps(m_System.CountPerOp()); m_System.m_OpCodes.ExecuteOps(m_System.CountPerOp());
opsExecuted += m_System.CountPerOp(); opsExecuted += m_System.CountPerOp();
@ -185,15 +185,15 @@ void CRecompiler::RecompilerMain_Lookup_validate()
{ {
WriteTrace(TraceRecompiler, TraceInfo, "Start"); WriteTrace(TraceRecompiler, TraceInfo, "Start");
bool & Done = m_EndEmulation; bool & Done = m_EndEmulation;
uint32_t & PC = PROGRAM_COUNTER; uint64_t & PC = PROGRAM_COUNTER;
uint32_t PhysicalAddr; uint32_t PhysicalAddr;
while (!Done) while (!Done)
{ {
if (!m_MMU.VAddrToPAddr(PC, PhysicalAddr)) if (!m_MMU.VAddrToPAddr((uint32_t)PC, PhysicalAddr))
{ {
m_Reg.TriggerAddressException(PC, EXC_RMISS); m_Reg.TriggerAddressException(PC, EXC_RMISS);
if (!m_MMU.VAddrToPAddr(PC, PhysicalAddr)) if (!m_MMU.VAddrToPAddr((uint32_t)PC, PhysicalAddr))
{ {
g_Notify->DisplayError(stdstr_f("Failed to translate PC to a PAddr: %X\n\nEmulation stopped", PC).c_str()); g_Notify->DisplayError(stdstr_f("Failed to translate PC to a PAddr: %X\n\nEmulation stopped", PC).c_str());
Done = true; Done = true;
@ -275,7 +275,7 @@ void CRecompiler::RecompilerMain_Lookup_validate()
{ {
uint32_t opsExecuted = 0; uint32_t opsExecuted = 0;
while (m_MMU.VAddrToPAddr(PC, PhysicalAddr) && PhysicalAddr >= m_System.RdramSize()) while (m_MMU.VAddrToPAddr((uint32_t)PC, PhysicalAddr) && PhysicalAddr >= m_System.RdramSize())
{ {
m_System.m_OpCodes.ExecuteOps(m_System.CountPerOp()); m_System.m_OpCodes.ExecuteOps(m_System.CountPerOp());
opsExecuted += m_System.CountPerOp(); opsExecuted += m_System.CountPerOp();
@ -327,19 +327,19 @@ void CRecompiler::RecompilerMain_ChangeMemory()
CCompiledFunc * CRecompiler::CompileCode() CCompiledFunc * CRecompiler::CompileCode()
{ {
WriteTrace(TraceRecompiler, TraceDebug, "Start (PC: %X)", PROGRAM_COUNTER); WriteTrace(TraceRecompiler, TraceDebug, "Start (PC: %016llX)", PROGRAM_COUNTER);
uint32_t pAddr = 0; uint32_t pAddr = 0;
if (!m_MMU.VAddrToPAddr(PROGRAM_COUNTER, pAddr)) if (!m_MMU.VAddrToPAddr((uint32_t)PROGRAM_COUNTER, pAddr))
{ {
WriteTrace(TraceRecompiler, TraceError, "Failed to translate %X", PROGRAM_COUNTER); WriteTrace(TraceRecompiler, TraceError, "Failed to translate %016llX", PROGRAM_COUNTER);
return nullptr; return nullptr;
} }
CCompiledFuncList::iterator iter = m_Functions.find(PROGRAM_COUNTER); CCompiledFuncList::iterator iter = m_Functions.find((uint32_t)PROGRAM_COUNTER);
if (iter != m_Functions.end()) if (iter != m_Functions.end())
{ {
WriteTrace(TraceRecompiler, TraceInfo, "Existing functions for address (Program Counter: %X pAddr: %X)", PROGRAM_COUNTER, pAddr); WriteTrace(TraceRecompiler, TraceInfo, "Existing functions for address (Program Counter: %016llX pAddr: %X)", PROGRAM_COUNTER, pAddr);
for (CCompiledFunc * Func = iter->second; Func != nullptr; Func = Func->Next()) for (CCompiledFunc * Func = iter->second; Func != nullptr; Func = Func->Next())
{ {
uint32_t PAddr; uint32_t PAddr;
@ -349,7 +349,7 @@ CCompiledFunc * CRecompiler::CompileCode()
MD5(m_MMU.Rdram() + PAddr, (Func->MaxPC() - Func->MinPC()) + 4).get_digest(Hash); MD5(m_MMU.Rdram() + PAddr, (Func->MaxPC() - Func->MinPC()) + 4).get_digest(Hash);
if (memcmp(Hash.digest, Func->Hash().digest, sizeof(Hash.digest)) == 0) if (memcmp(Hash.digest, Func->Hash().digest, sizeof(Hash.digest)) == 0)
{ {
WriteTrace(TraceRecompiler, TraceInfo, "Using existing compiled code (Program Counter: %X pAddr: %X)", PROGRAM_COUNTER, pAddr); WriteTrace(TraceRecompiler, TraceInfo, "Using existing compiled code (Program Counter: %016llX pAddr: %X)", PROGRAM_COUNTER, pAddr);
return Func; return Func;
} }
} }
@ -357,9 +357,9 @@ CCompiledFunc * CRecompiler::CompileCode()
} }
CheckRecompMem(); CheckRecompMem();
WriteTrace(TraceRecompiler, TraceDebug, "Compile Block-Start: Program Counter: %X pAddr: %X", PROGRAM_COUNTER, pAddr); WriteTrace(TraceRecompiler, TraceDebug, "Compile Block-Start: Program Counter: %016llX pAddr: %X", PROGRAM_COUNTER, pAddr);
CCodeBlock CodeBlock(m_System, PROGRAM_COUNTER); CCodeBlock CodeBlock(m_System, (uint32_t)PROGRAM_COUNTER);
if (!CodeBlock.Compile()) if (!CodeBlock.Compile())
{ {
return nullptr; return nullptr;

2
Source/Project64-core/N64System/Recompiler/Recompiler.h
View File

@ -87,6 +87,6 @@ private:
bool & m_EndEmulation; bool & m_EndEmulation;
uint8_t * m_MemoryStack; uint8_t * m_MemoryStack;
FUNCTION_PROFILE m_BlockProfile; FUNCTION_PROFILE m_BlockProfile;
uint32_t & PROGRAM_COUNTER; uint64_t & PROGRAM_COUNTER;
CLog * m_LogFile; CLog * m_LogFile;
}; };

175
Source/Project64-core/N64System/Recompiler/x86/x86RecompilerOps.cpp
View File

@ -47,7 +47,7 @@ void CX86RecompilerOps::x86CompilerBreakPoint()
g_Reg->m_PROGRAM_COUNTER += 4; g_Reg->m_PROGRAM_COUNTER += 4;
uint32_t OpcodeValue; uint32_t OpcodeValue;
if (!g_MMU->MemoryValue32(g_Reg->m_PROGRAM_COUNTER, OpcodeValue)) if (!g_MMU->MemoryValue32((uint32_t)g_Reg->m_PROGRAM_COUNTER, OpcodeValue))
{ {
g_Reg->TriggerAddressException(g_Reg->m_PROGRAM_COUNTER, EXC_RMISS); g_Reg->TriggerAddressException(g_Reg->m_PROGRAM_COUNTER, EXC_RMISS);
g_Reg->m_PROGRAM_COUNTER = g_System->JumpToLocation(); g_Reg->m_PROGRAM_COUNTER = g_System->JumpToLocation();
@ -84,7 +84,7 @@ void CX86RecompilerOps::x86BreakPointDelaySlot()
g_System->UpdateSyncCPU(g_System->CountPerOp()); g_System->UpdateSyncCPU(g_System->CountPerOp());
g_System->SyncSystem(); g_System->SyncSystem();
} }
if (g_Debugger->ExecutionBP(g_Reg->m_PROGRAM_COUNTER)) if (g_Debugger->ExecutionBP((uint32_t)g_Reg->m_PROGRAM_COUNTER))
{ {
x86CompilerBreakPoint(); x86CompilerBreakPoint();
} }
@ -182,6 +182,7 @@ void CX86RecompilerOps::x86TestWriteBreakPoint64()
CX86RecompilerOps::CX86RecompilerOps(CN64System & m_System, CCodeBlock & CodeBlock) : CX86RecompilerOps::CX86RecompilerOps(CN64System & m_System, CCodeBlock & CodeBlock) :
CRecompilerOpsBase(m_System, CodeBlock), CRecompilerOpsBase(m_System, CodeBlock),
m_Assembler(CodeBlock), m_Assembler(CodeBlock),
m_PipelineStage(PIPELINE_STAGE_NORMAL),
m_RegWorkingSet(CodeBlock, m_Assembler), m_RegWorkingSet(CodeBlock, m_Assembler),
m_CompilePC(m_Instruction.Address()), m_CompilePC(m_Instruction.Address()),
m_RegBeforeDelay(CodeBlock, m_Assembler), m_RegBeforeDelay(CodeBlock, m_Assembler),
@ -197,14 +198,14 @@ void CX86RecompilerOps::PreCompileOpcode(void)
{ {
if (m_PipelineStage != PIPELINE_STAGE_DELAY_SLOT_DONE) if (m_PipelineStage != PIPELINE_STAGE_DELAY_SLOT_DONE)
{ {
m_CodeBlock.Log(" %X %s", m_CompilePC, m_Instruction.NameAndParam().c_str()); m_CodeBlock.Log(" %X %s", (uint32_t)m_CompilePC, m_Instruction.NameAndParam().c_str());
} }
/*if (m_CompilePC == 0x803275F4 && m_PipelineStage == PIPELINE_STAGE_NORMAL) /*if ((uint32_t)m_CompilePC == 0x803275F4 && m_PipelineStage == PIPELINE_STAGE_NORMAL)
{ {
m_Assembler.X86BreakPoint(__FILE__, __LINE__); m_Assembler.X86BreakPoint(__FILE__, __LINE__);
}*/ }*/
/*if (m_CompilePC >= 0x80000000 && m_CompilePC <= 0x80400000 && m_PipelineStage == PIPELINE_STAGE_NORMAL) /*if ((uint32_t)m_CompilePC >= 0x80000000 && (uint32_t)m_CompilePC <= 0x80400000 && m_PipelineStage == PIPELINE_STAGE_NORMAL)
{ {
m_RegWorkingSet.WriteBackRegisters(); m_RegWorkingSet.WriteBackRegisters();
UpdateCounters(m_RegWorkingSet, false, true); UpdateCounters(m_RegWorkingSet, false, true);
@ -214,9 +215,9 @@ void CX86RecompilerOps::PreCompileOpcode(void)
} }
}*/ }*/
/*if ((m_CompilePC == 0x8031C0E4 || m_CompilePC == 0x8031C118 || /*if (((uint32_t)m_CompilePC == 0x8031C0E4 || (uint32_t)m_CompilePC == 0x8031C118 ||
m_CompilePC == 0x8031CD88 || m_CompilePC == 0x8031CE24 || (uint32_t)m_CompilePC == 0x8031CD88 || (uint32_t)m_CompilePC == 0x8031CE24 ||
m_CompilePC == 0x8031CE30 || m_CompilePC == 0x8031CE40) && m_PipelineStage == PIPELINE_STAGE_NORMAL) (uint32_t)m_CompilePC == 0x8031CE30 || (uint32_t)m_CompilePC == 0x8031CE40) && m_PipelineStage == PIPELINE_STAGE_NORMAL)
{ {
m_RegWorkingSet.WriteBackRegisters(); m_RegWorkingSet.WriteBackRegisters();
UpdateCounters(m_RegWorkingSet, false, true); UpdateCounters(m_RegWorkingSet, false, true);
@ -227,19 +228,19 @@ void CX86RecompilerOps::PreCompileOpcode(void)
} }
}*/ }*/
/*if (m_CompilePC == 0x801C1B88) /*if ((uint32_t)m_CompilePC == 0x801C1B88)
{ {
m_RegWorkingSet.BeforeCallDirect(); m_RegWorkingSet.BeforeCallDirect();
m_Assembler.CallFunc(AddressOf(TestFunc), "TestFunc"); m_Assembler.CallFunc(AddressOf(TestFunc), "TestFunc");
m_RegWorkingSet.AfterCallDirect(); m_RegWorkingSet.AfterCallDirect();
}*/ }*/
/*if ((m_CompilePC == 0x80263900) && m_PipelineStage == PIPELINE_STAGE_NORMAL) /*if (((uint32_t)m_CompilePC == 0x80263900) && m_PipelineStage == PIPELINE_STAGE_NORMAL)
{ {
m_Assembler.X86BreakPoint(__FILEW__,__LINE__); m_Assembler.X86BreakPoint(__FILEW__,__LINE__);
}*/ }*/
/*if ((m_CompilePC >= 0x80325D80 && m_CompilePC <= 0x80325DF0) && m_PipelineStage == PIPELINE_STAGE_NORMAL) /*if (((uint32_t)m_CompilePC >= 0x80325D80 && (uint32_t)m_CompilePC <= 0x80325DF0) && m_PipelineStage == PIPELINE_STAGE_NORMAL)
{ {
CX86RegInfo TestRegSet = m_RegWorkingSet; CX86RegInfo TestRegSet = m_RegWorkingSet;
m_Assembler.pushad(); m_Assembler.pushad();
@ -253,12 +254,12 @@ void CX86RecompilerOps::PreCompileOpcode(void)
m_RegWorkingSet.SetBlockCycleCount(0); m_RegWorkingSet.SetBlockCycleCount(0);
m_Assembler.popad(); m_Assembler.popad();
}*/ }*/
/*if ((m_CompilePC == 0x80324E14) && m_PipelineStage == PIPELINE_STAGE_NORMAL) /*if (((uint32_t)m_CompilePC == 0x80324E14) && m_PipelineStage == PIPELINE_STAGE_NORMAL)
{ {
m_Assembler.X86BreakPoint(__FILEW__,__LINE__); m_Assembler.X86BreakPoint(__FILEW__,__LINE__);
}*/ }*/
/*if (m_CompilePC == 0x80324E18 && m_PipelineStage == PIPELINE_STAGE_NORMAL) /*if ((uint32_t)m_CompilePC == 0x80324E18 && m_PipelineStage == PIPELINE_STAGE_NORMAL)
{ {
m_RegWorkingSet.WriteBackRegisters(); m_RegWorkingSet.WriteBackRegisters();
UpdateCounters(m_RegWorkingSet,false,true); UpdateCounters(m_RegWorkingSet,false,true);
@ -267,7 +268,7 @@ void CX86RecompilerOps::PreCompileOpcode(void)
m_Assembler.CallThis((uint32_t)g_BaseSystem, AddressOf(&CN64System::SyncSystem), "CN64System::SyncSystem", 4); m_Assembler.CallThis((uint32_t)g_BaseSystem, AddressOf(&CN64System::SyncSystem), "CN64System::SyncSystem", 4);
} }
}*/ }*/
/*if (m_CompilePC >= 0x80324E00 && m_CompilePC <= 0x80324E18 && m_PipelineStage == PIPELINE_STAGE_NORMAL) /*if ((uint32_t)m_CompilePC >= 0x80324E00 && (uint32_t)m_CompilePC <= 0x80324E18 && m_PipelineStage == PIPELINE_STAGE_NORMAL)
{ {
m_RegWorkingSet.WriteBackRegisters(); m_RegWorkingSet.WriteBackRegisters();
UpdateCounters(m_RegWorkingSet,false,true); UpdateCounters(m_RegWorkingSet,false,true);
@ -276,7 +277,7 @@ void CX86RecompilerOps::PreCompileOpcode(void)
m_Assembler.CallThis((uint32_t)g_BaseSystem, AddressOf(&CN64System::SyncSystem), "CN64System::SyncSystem", 4); m_Assembler.CallThis((uint32_t)g_BaseSystem, AddressOf(&CN64System::SyncSystem), "CN64System::SyncSystem", 4);
} }
}*/ }*/
/* if (m_CompilePC == 0x803245CC && m_PipelineStage == PIPELINE_STAGE_NORMAL) /* if ((uint32_t)m_CompilePC == 0x803245CC && m_PipelineStage == PIPELINE_STAGE_NORMAL)
{ {
//m_RegWorkingSet.UnMap_AllFPRs(); //m_RegWorkingSet.UnMap_AllFPRs();
g_Notify->BreakPoint(__FILE__, __LINE__); g_Notify->BreakPoint(__FILE__, __LINE__);
@ -284,7 +285,7 @@ void CX86RecompilerOps::PreCompileOpcode(void)
//m_Assembler.X86BreakPoint(__FILEW__,__LINE__); //m_Assembler.X86BreakPoint(__FILEW__,__LINE__);
//m_RegWorkingSet.UnMap_AllFPRs(); //m_RegWorkingSet.UnMap_AllFPRs();
}*/ }*/
/*if (m_CompilePC >= 0x80179DC4 && m_CompilePC <= 0x80179DF0 && m_PipelineStage == PIPELINE_STAGE_NORMAL) /*if ((uint32_t)m_CompilePC >= 0x80179DC4 && (uint32_t)m_CompilePC <= 0x80179DF0 && m_PipelineStage == PIPELINE_STAGE_NORMAL)
{ {
m_RegWorkingSet.UnMap_AllFPRs(); m_RegWorkingSet.UnMap_AllFPRs();
}*/ }*/
@ -307,7 +308,7 @@ void CX86RecompilerOps::PostCompileOpcode(void)
g_Notify->BreakPoint(__FILE__, __LINE__); g_Notify->BreakPoint(__FILE__, __LINE__);
} }
} }
/*if (m_CompilePC >= 0x800933B4 && m_CompilePC <= 0x80093414 && (m_PipelineStage == PIPELINE_STAGE_NORMAL || m_PipelineStage == PIPELINE_STAGE_DO_DELAY_SLOT)) /*if ((uint32_t)m_CompilePC >= 0x800933B4 && (uint32_t)m_CompilePC <= 0x80093414 && (m_PipelineStage == PIPELINE_STAGE_NORMAL || m_PipelineStage == PIPELINE_STAGE_DO_DELAY_SLOT))
{ {
m_Assembler.MoveConstToVariable(&g_Reg->m_PROGRAM_COUNTER, "PROGRAM_COUNTER", m_CompilePC + 4); m_Assembler.MoveConstToVariable(&g_Reg->m_PROGRAM_COUNTER, "PROGRAM_COUNTER", m_CompilePC + 4);
UpdateSyncCPU(m_RegWorkingSet, m_RegWorkingSet.GetBlockCycleCount()); UpdateSyncCPU(m_RegWorkingSet, m_RegWorkingSet.GetBlockCycleCount());
@ -453,7 +454,7 @@ void CX86RecompilerOps::Compile_Branch(RecompilerBranchCompare CompareType, bool
if (m_Section->m_Jump.FallThrough || (!m_Section->m_Cont.FallThrough && m_Section->m_Jump.LinkLocation.isValid())) if (m_Section->m_Jump.FallThrough || (!m_Section->m_Cont.FallThrough && m_Section->m_Jump.LinkLocation.isValid()))
{ {
LinkJump(m_Section->m_Jump); LinkJump(m_Section->m_Jump);
m_Assembler.MoveConstToVariable(&g_System->m_JumpDelayLocation, "System::m_JumpDelayLocation", m_CompilePC + ((int16_t)m_Opcode.offset << 2) + 8); m_Assembler.MoveConst64ToVariable(&g_System->m_JumpDelayLocation, "System::m_JumpDelayLocation", m_CompilePC + ((int16_t)m_Opcode.offset << 2) + 8);
if (m_Section->m_Cont.LinkLocation.isValid()) if (m_Section->m_Cont.LinkLocation.isValid())
{ {
// jump to link // jump to link
@ -464,7 +465,7 @@ void CX86RecompilerOps::Compile_Branch(RecompilerBranchCompare CompareType, bool
if (m_Section->m_Cont.FallThrough) if (m_Section->m_Cont.FallThrough)
{ {
LinkJump(m_Section->m_Cont); LinkJump(m_Section->m_Cont);
m_Assembler.MoveConstToVariable(&g_System->m_JumpDelayLocation, "System::m_JumpDelayLocation", m_CompilePC + 8); m_Assembler.MoveConst64ToVariable(&g_System->m_JumpDelayLocation, "System::m_JumpDelayLocation", m_CompilePC + 8);
if (m_Section->m_Jump.LinkLocation.isValid()) if (m_Section->m_Jump.LinkLocation.isValid())
{ {
// jump to link // jump to link
@ -501,14 +502,14 @@ void CX86RecompilerOps::Compile_Branch(RecompilerBranchCompare CompareType, bool
if ((m_CompilePC & 0xFFC) != 0xFFC) if ((m_CompilePC & 0xFFC) != 0xFFC)
{ {
R4300iOpcode DelaySlot; R4300iOpcode DelaySlot;
m_EffectDelaySlot = g_MMU->MemoryValue32(m_CompilePC + 4, DelaySlot.Value) && R4300iInstruction(m_CompilePC, m_Opcode.Value).DelaySlotEffectsCompare(DelaySlot.Value); m_EffectDelaySlot = g_MMU->MemoryValue32((uint32_t)(m_CompilePC + 4), DelaySlot.Value) && R4300iInstruction(m_CompilePC, m_Opcode.Value).DelaySlotEffectsCompare(DelaySlot.Value);
} }
else else
{ {
m_EffectDelaySlot = true; m_EffectDelaySlot = true;
} }
m_Section->m_Jump.JumpPC = m_CompilePC; m_Section->m_Jump.JumpPC = (uint32_t)m_CompilePC;
m_Section->m_Jump.TargetPC = m_CompilePC + ((int16_t)m_Opcode.offset << 2) + 4; m_Section->m_Jump.TargetPC = (uint32_t)(m_CompilePC + ((int16_t)m_Opcode.offset << 2) + 4);
if (m_PipelineStage == PIPELINE_STAGE_DELAY_SLOT) if (m_PipelineStage == PIPELINE_STAGE_DELAY_SLOT)
{ {
m_Section->m_Jump.TargetPC += 4; m_Section->m_Jump.TargetPC += 4;
@ -525,8 +526,8 @@ void CX86RecompilerOps::Compile_Branch(RecompilerBranchCompare CompareType, bool
m_Section->m_Jump.LinkLocation = asmjit::Label(); m_Section->m_Jump.LinkLocation = asmjit::Label();
m_Section->m_Jump.LinkLocation2 = asmjit::Label(); m_Section->m_Jump.LinkLocation2 = asmjit::Label();
m_Section->m_Jump.DoneDelaySlot = false; m_Section->m_Jump.DoneDelaySlot = false;
m_Section->m_Cont.JumpPC = m_CompilePC; m_Section->m_Cont.JumpPC = (uint32_t)m_CompilePC;
m_Section->m_Cont.TargetPC = m_CompilePC + 8; m_Section->m_Cont.TargetPC = (uint32_t)(m_CompilePC + 8);
if (m_Section->m_ContinueSection != nullptr) if (m_Section->m_ContinueSection != nullptr)
{ {
m_Section->m_Cont.BranchLabel = stdstr_f("Section_%d", m_Section->m_ContinueSection->m_SectionID); m_Section->m_Cont.BranchLabel = stdstr_f("Section_%d", m_Section->m_ContinueSection->m_SectionID);
@ -558,13 +559,13 @@ void CX86RecompilerOps::Compile_Branch(RecompilerBranchCompare CompareType, bool
if (ReadReg1 != 31 && ReadReg2 != 31) if (ReadReg1 != 31 && ReadReg2 != 31)
{ {
m_RegWorkingSet.UnMap_GPR(31, false); m_RegWorkingSet.UnMap_GPR(31, false);
m_RegWorkingSet.SetMipsRegLo(31, m_CompilePC + 8); m_RegWorkingSet.SetMipsRegLo(31, (uint32_t)m_CompilePC + 8);
m_RegWorkingSet.SetMipsRegState(31, CRegInfo::STATE_CONST_32_SIGN); m_RegWorkingSet.SetMipsRegState(31, CRegInfo::STATE_CONST_32_SIGN);
} }
else else
{ {
m_Section->m_Cont.LinkAddress = m_CompilePC + 8; m_Section->m_Cont.LinkAddress = (uint32_t)(m_CompilePC + 8);
m_Section->m_Jump.LinkAddress = m_CompilePC + 8; m_Section->m_Jump.LinkAddress = (uint32_t)(m_CompilePC + 8);
} }
} }
if (m_EffectDelaySlot) if (m_EffectDelaySlot)
@ -670,7 +671,7 @@ void CX86RecompilerOps::Compile_Branch(RecompilerBranchCompare CompareType, bool
{ {
m_PipelineStage = PIPELINE_STAGE_NORMAL; m_PipelineStage = PIPELINE_STAGE_NORMAL;
m_RegWorkingSet.SetBlockCycleCount(m_RegWorkingSet.GetBlockCycleCount() - g_System->CountPerOp()); m_RegWorkingSet.SetBlockCycleCount(m_RegWorkingSet.GetBlockCycleCount() - g_System->CountPerOp());
SetCurrentPC(GetCurrentPC() + 4); SetCurrentPC((uint32_t)(GetCurrentPC() + 4));
return; return;
} }
if (m_EffectDelaySlot) if (m_EffectDelaySlot)
@ -692,7 +693,7 @@ void CX86RecompilerOps::Compile_Branch(RecompilerBranchCompare CompareType, bool
{ {
m_Section->m_Jump.BranchLabel = "ExitBlock"; m_Section->m_Jump.BranchLabel = "ExitBlock";
} }
if (FallInfo->TargetPC <= m_CompilePC) if (FallInfo->TargetPC <= (uint32_t)m_CompilePC)
{ {
UpdateCounters(m_Section->m_Jump.RegSet, true, true, true); UpdateCounters(m_Section->m_Jump.RegSet, true, true, true);
m_CodeBlock.Log("CompileSystemCheck 12"); m_CodeBlock.Log("CompileSystemCheck 12");
@ -798,22 +799,22 @@ void CX86RecompilerOps::Compile_BranchLikely(RecompilerBranchCompare CompareType
} }
if (!g_System->bLinkBlocks() || (m_CompilePC & 0xFFC) == 0xFFC) if (!g_System->bLinkBlocks() || (m_CompilePC & 0xFFC) == 0xFFC)
{ {
m_Section->m_Jump.JumpPC = m_CompilePC; m_Section->m_Jump.JumpPC = (uint32_t)m_CompilePC;
m_Section->m_Jump.TargetPC = m_CompilePC + ((int16_t)m_Opcode.offset << 2) + 4; m_Section->m_Jump.TargetPC = (uint32_t)(m_CompilePC + ((int16_t)m_Opcode.offset << 2) + 4);
m_Section->m_Cont.JumpPC = m_CompilePC; m_Section->m_Cont.JumpPC = (uint32_t)m_CompilePC;
m_Section->m_Cont.TargetPC = m_CompilePC + 8; m_Section->m_Cont.TargetPC = (uint32_t)(m_CompilePC + 8);
} }
else else
{ {
if (m_Section->m_Jump.JumpPC != m_CompilePC) if (m_Section->m_Jump.JumpPC != (uint32_t)m_CompilePC)
{ {
g_Notify->BreakPoint(__FILE__, __LINE__); g_Notify->BreakPoint(__FILE__, __LINE__);
} }
if (m_Section->m_Cont.JumpPC != m_CompilePC) if (m_Section->m_Cont.JumpPC != (uint32_t)m_CompilePC)
{ {
g_Notify->BreakPoint(__FILE__, __LINE__); g_Notify->BreakPoint(__FILE__, __LINE__);
} }
if (m_Section->m_Cont.TargetPC != m_CompilePC + 8) if (m_Section->m_Cont.TargetPC != (uint32_t)(m_CompilePC + 8))
{ {
g_Notify->BreakPoint(__FILE__, __LINE__); g_Notify->BreakPoint(__FILE__, __LINE__);
} }
@ -852,13 +853,13 @@ void CX86RecompilerOps::Compile_BranchLikely(RecompilerBranchCompare CompareType
if (ReadReg1 != 31 && ReadReg2 != 31) if (ReadReg1 != 31 && ReadReg2 != 31)
{ {
m_RegWorkingSet.UnMap_GPR(31, false); m_RegWorkingSet.UnMap_GPR(31, false);
m_RegWorkingSet.SetMipsRegLo(31, m_CompilePC + 8); m_RegWorkingSet.SetMipsRegLo(31, (uint32_t)(m_CompilePC + 8));
m_RegWorkingSet.SetMipsRegState(31, CRegInfo::STATE_CONST_32_SIGN); m_RegWorkingSet.SetMipsRegState(31, CRegInfo::STATE_CONST_32_SIGN);
} }
else else
{ {
m_Section->m_Cont.LinkAddress = m_CompilePC + 8; m_Section->m_Cont.LinkAddress = (uint32_t)(m_CompilePC + 8);
m_Section->m_Jump.LinkAddress = m_CompilePC + 8; m_Section->m_Jump.LinkAddress = (uint32_t)(m_CompilePC + 8);
} }
} }
@ -2237,7 +2238,7 @@ void CX86RecompilerOps::J()
return; return;
} }
R4300iOpcode DelaySlot; R4300iOpcode DelaySlot;
g_MMU->MemoryValue32(m_CompilePC + 4, DelaySlot.Value); g_MMU->MemoryValue32((uint32_t)(m_CompilePC + 4), DelaySlot.Value);
if (R4300iInstruction(m_CompilePC + 4, DelaySlot.Value).HasDelaySlot()) if (R4300iInstruction(m_CompilePC + 4, DelaySlot.Value).HasDelaySlot())
{ {
m_Assembler.MoveConstToVariable(&g_System->m_JumpToLocation, "System::m_JumpToLocation", (m_CompilePC & 0xF0000000) + (m_Opcode.target << 2)); m_Assembler.MoveConstToVariable(&g_System->m_JumpToLocation, "System::m_JumpToLocation", (m_CompilePC & 0xF0000000) + (m_Opcode.target << 2));
@ -2246,7 +2247,7 @@ void CX86RecompilerOps::J()
} }
m_Section->m_Jump.TargetPC = (m_CompilePC & 0xF0000000) + (m_Opcode.target << 2); m_Section->m_Jump.TargetPC = (m_CompilePC & 0xF0000000) + (m_Opcode.target << 2);
m_Section->m_Jump.JumpPC = m_CompilePC; m_Section->m_Jump.JumpPC = (uint32_t)(m_CompilePC);
if (m_Section->m_JumpSection != nullptr) if (m_Section->m_JumpSection != nullptr)
{ {
m_Section->m_Jump.BranchLabel = stdstr_f("Section_%d", ((CCodeSection *)m_Section->m_JumpSection)->m_SectionID); m_Section->m_Jump.BranchLabel = stdstr_f("Section_%d", ((CCodeSection *)m_Section->m_JumpSection)->m_SectionID);
@ -2287,7 +2288,7 @@ void CX86RecompilerOps::JAL()
return; return;
} }
m_Section->m_Jump.TargetPC = (m_CompilePC & 0xF0000000) + (m_Opcode.target << 2); m_Section->m_Jump.TargetPC = (m_CompilePC & 0xF0000000) + (m_Opcode.target << 2);
m_Section->m_Jump.JumpPC = m_CompilePC; m_Section->m_Jump.JumpPC = (uint32_t)m_CompilePC;
if (m_Section->m_JumpSection != nullptr) if (m_Section->m_JumpSection != nullptr)
{ {
m_Section->m_Jump.BranchLabel = stdstr_f("Section_%d", ((CCodeSection *)m_Section->m_JumpSection)->m_SectionID); m_Section->m_Jump.BranchLabel = stdstr_f("Section_%d", ((CCodeSection *)m_Section->m_JumpSection)->m_SectionID);
@ -2318,11 +2319,11 @@ void CX86RecompilerOps::JAL()
m_Assembler.AddConstToX86Reg(PCReg, (m_Opcode.target << 2)); m_Assembler.AddConstToX86Reg(PCReg, (m_Opcode.target << 2));
m_Assembler.MoveX86regToVariable(&m_Reg.m_PROGRAM_COUNTER, "_PROGRAM_COUNTER", PCReg); m_Assembler.MoveX86regToVariable(&m_Reg.m_PROGRAM_COUNTER, "_PROGRAM_COUNTER", PCReg);
uint32_t TargetPC = (m_CompilePC & 0xF0000000) + (m_Opcode.target << 2); uint64_t TargetPC = (m_CompilePC & 0xFFFFFFFFF0000000) + (m_Opcode.target << 2);
bool bCheck = TargetPC <= m_CompilePC; bool bCheck = TargetPC <= m_CompilePC;
UpdateCounters(m_RegWorkingSet, bCheck, true); UpdateCounters(m_RegWorkingSet, bCheck, true);
CompileExit((uint32_t)-1, (uint32_t)-1, m_RegWorkingSet, bCheck ? ExitReason_Normal : ExitReason_NormalNoSysCheck, true, nullptr); CompileExit((uint64_t)-1, (uint64_t)-1, m_RegWorkingSet, bCheck ? ExitReason_Normal : ExitReason_NormalNoSysCheck, true, nullptr);
} }
m_PipelineStage = PIPELINE_STAGE_END_BLOCK; m_PipelineStage = PIPELINE_STAGE_END_BLOCK;
} }
@ -4494,7 +4495,7 @@ void CX86RecompilerOps::SPECIAL_JR()
m_Section->m_Cont.LinkLocation2 = asmjit::Label(); m_Section->m_Cont.LinkLocation2 = asmjit::Label();
R4300iOpcode DelaySlot; R4300iOpcode DelaySlot;
if (g_MMU->MemoryValue32(m_CompilePC + 4, DelaySlot.Value) && if (g_MMU->MemoryValue32((uint32_t)(m_CompilePC + 4), DelaySlot.Value) &&
R4300iInstruction(m_CompilePC, m_Opcode.Value).DelaySlotEffectsCompare(DelaySlot.Value)) R4300iInstruction(m_CompilePC, m_Opcode.Value).DelaySlotEffectsCompare(DelaySlot.Value))
{ {
if (m_RegWorkingSet.IsConst(m_Opcode.rs)) if (m_RegWorkingSet.IsConst(m_Opcode.rs))
@ -4515,9 +4516,9 @@ void CX86RecompilerOps::SPECIAL_JR()
else if (m_PipelineStage == PIPELINE_STAGE_DELAY_SLOT_DONE) else if (m_PipelineStage == PIPELINE_STAGE_DELAY_SLOT_DONE)
{ {
R4300iOpcode DelaySlot; R4300iOpcode DelaySlot;
if (g_MMU->MemoryValue32(m_CompilePC + 4, DelaySlot.Value) && R4300iInstruction(m_CompilePC, m_Opcode.Value).DelaySlotEffectsCompare(DelaySlot.Value)) if (g_MMU->MemoryValue32((uint32_t)(m_CompilePC + 4), DelaySlot.Value) && R4300iInstruction(m_CompilePC, m_Opcode.Value).DelaySlotEffectsCompare(DelaySlot.Value))
{ {
CompileExit(m_CompilePC, (uint32_t)-1, m_RegWorkingSet, ExitReason_Normal, true, nullptr); CompileExit(m_CompilePC, (uint64_t)-1, m_RegWorkingSet, ExitReason_Normal, true, nullptr);
} }
else else
{ {
@ -4534,7 +4535,7 @@ void CX86RecompilerOps::SPECIAL_JR()
{ {
m_Assembler.MoveX86regToVariable(&m_Reg.m_PROGRAM_COUNTER, "PROGRAM_COUNTER", m_RegWorkingSet.Map_TempReg(x86Reg_Unknown, m_Opcode.rs, false, false)); m_Assembler.MoveX86regToVariable(&m_Reg.m_PROGRAM_COUNTER, "PROGRAM_COUNTER", m_RegWorkingSet.Map_TempReg(x86Reg_Unknown, m_Opcode.rs, false, false));
} }
CompileExit((uint32_t)-1, (uint32_t)-1, m_RegWorkingSet, ExitReason_Normal, true, nullptr); CompileExit((uint64_t)-1, (uint64_t)-1, m_RegWorkingSet, ExitReason_Normal, true, nullptr);
if (m_Section->m_JumpSection) if (m_Section->m_JumpSection)
{ {
m_Section->GenerateSectionLinkage(); m_Section->GenerateSectionLinkage();
@ -4553,7 +4554,7 @@ void CX86RecompilerOps::SPECIAL_JALR()
if (m_PipelineStage == PIPELINE_STAGE_NORMAL) if (m_PipelineStage == PIPELINE_STAGE_NORMAL)
{ {
R4300iOpcode DelaySlot; R4300iOpcode DelaySlot;
if (g_MMU->MemoryValue32(m_CompilePC + 4, DelaySlot.Value) && if (g_MMU->MemoryValue32((uint32_t)(m_CompilePC + 4), DelaySlot.Value) &&
R4300iInstruction(m_CompilePC, m_Opcode.Value).DelaySlotEffectsCompare(DelaySlot.Value) && (m_CompilePC & 0xFFC) != 0xFFC) R4300iInstruction(m_CompilePC, m_Opcode.Value).DelaySlotEffectsCompare(DelaySlot.Value) && (m_CompilePC & 0xFFC) != 0xFFC)
{ {
if (m_RegWorkingSet.IsConst(m_Opcode.rs)) if (m_RegWorkingSet.IsConst(m_Opcode.rs))
@ -4570,7 +4571,7 @@ void CX86RecompilerOps::SPECIAL_JALR()
} }
} }
m_RegWorkingSet.UnMap_GPR(m_Opcode.rd, false); m_RegWorkingSet.UnMap_GPR(m_Opcode.rd, false);
m_RegWorkingSet.SetMipsRegLo(m_Opcode.rd, m_CompilePC + 8); m_RegWorkingSet.SetMipsRegLo(m_Opcode.rd, (uint32_t)(m_CompilePC + 8));
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd, CRegInfo::STATE_CONST_32_SIGN); m_RegWorkingSet.SetMipsRegState(m_Opcode.rd, CRegInfo::STATE_CONST_32_SIGN);
if ((m_CompilePC & 0xFFC) == 0xFFC) if ((m_CompilePC & 0xFFC) == 0xFFC)
{ {
@ -4600,10 +4601,10 @@ void CX86RecompilerOps::SPECIAL_JALR()
else if (m_PipelineStage == PIPELINE_STAGE_DELAY_SLOT_DONE) else if (m_PipelineStage == PIPELINE_STAGE_DELAY_SLOT_DONE)
{ {
R4300iOpcode DelaySlot; R4300iOpcode DelaySlot;
if (g_MMU->MemoryValue32(m_CompilePC + 4, DelaySlot.Value) && if (g_MMU->MemoryValue32((uint32_t)(m_CompilePC + 4), DelaySlot.Value) &&
R4300iInstruction(m_CompilePC, m_Opcode.Value).DelaySlotEffectsCompare(DelaySlot.Value)) R4300iInstruction(m_CompilePC, m_Opcode.Value).DelaySlotEffectsCompare(DelaySlot.Value))
{ {
CompileExit(m_CompilePC, (uint32_t)-1, m_RegWorkingSet, ExitReason_Normal, true, nullptr); CompileExit(m_CompilePC, (uint64_t)-1, m_RegWorkingSet, ExitReason_Normal, true, nullptr);
} }
else else
{ {
@ -4620,7 +4621,7 @@ void CX86RecompilerOps::SPECIAL_JALR()
{ {
m_Assembler.MoveX86regToVariable(&m_Reg.m_PROGRAM_COUNTER, "PROGRAM_COUNTER", m_RegWorkingSet.Map_TempReg(x86Reg_Unknown, m_Opcode.rs, false, false)); m_Assembler.MoveX86regToVariable(&m_Reg.m_PROGRAM_COUNTER, "PROGRAM_COUNTER", m_RegWorkingSet.Map_TempReg(x86Reg_Unknown, m_Opcode.rs, false, false));
} }
CompileExit((uint32_t)-1, (uint32_t)-1, m_RegWorkingSet, ExitReason_Normal, true, nullptr); CompileExit((uint64_t)-1, (uint64_t)-1, m_RegWorkingSet, ExitReason_Normal, true, nullptr);
if (m_Section->m_JumpSection) if (m_Section->m_JumpSection)
{ {
m_Section->GenerateSectionLinkage(); m_Section->GenerateSectionLinkage();
@ -7450,12 +7451,12 @@ void x86_compiler_COP0_CO_ERET()
{ {
if (g_Reg->STATUS_REGISTER.ErrorLevel != 0) if (g_Reg->STATUS_REGISTER.ErrorLevel != 0)
{ {
g_Reg->m_PROGRAM_COUNTER = (uint32_t)g_Reg->ERROREPC_REGISTER; g_Reg->m_PROGRAM_COUNTER = g_Reg->ERROREPC_REGISTER;
g_Reg->STATUS_REGISTER.ErrorLevel = 0; g_Reg->STATUS_REGISTER.ErrorLevel = 0;
} }
else else
{ {
g_Reg->m_PROGRAM_COUNTER = (uint32_t)g_Reg->EPC_REGISTER; g_Reg->m_PROGRAM_COUNTER = g_Reg->EPC_REGISTER;
g_Reg->STATUS_REGISTER.ExceptionLevel = 0; g_Reg->STATUS_REGISTER.ExceptionLevel = 0;
} }
g_Reg->m_LLBit = 0; g_Reg->m_LLBit = 0;
@ -7469,7 +7470,7 @@ void CX86RecompilerOps::COP0_CO_ERET(void)
m_Assembler.CallFunc((uint32_t)x86_compiler_COP0_CO_ERET, "x86_compiler_COP0_CO_ERET"); m_Assembler.CallFunc((uint32_t)x86_compiler_COP0_CO_ERET, "x86_compiler_COP0_CO_ERET");
UpdateCounters(m_RegWorkingSet, true, true); UpdateCounters(m_RegWorkingSet, true, true);
CompileExit(m_CompilePC, (uint32_t)-1, m_RegWorkingSet, ExitReason_Normal, true, nullptr); CompileExit(m_CompilePC, (uint64_t)-1, m_RegWorkingSet, ExitReason_Normal, true, nullptr);
m_PipelineStage = PIPELINE_STAGE_END_BLOCK; m_PipelineStage = PIPELINE_STAGE_END_BLOCK;
} }
@ -7796,7 +7797,7 @@ void CX86RecompilerOps::COP1_S_CMP()
m_Assembler.test(StatusReg, FPCSR_EV); m_Assembler.test(StatusReg, FPCSR_EV);
CRegInfo ExitRegSet = m_RegWorkingSet; CRegInfo ExitRegSet = m_RegWorkingSet;
ExitRegSet.SetBlockCycleCount(ExitRegSet.GetBlockCycleCount() + g_System->CountPerOp()); ExitRegSet.SetBlockCycleCount(ExitRegSet.GetBlockCycleCount() + g_System->CountPerOp());
CompileExit((uint32_t)-1, (uint32_t)-1, ExitRegSet, ExitReason_ExceptionFloatingPoint, false, &CX86Ops::JnzLabel); CompileExit((uint64_t)-1, (uint64_t)-1, ExitRegSet, ExitReason_ExceptionFloatingPoint, false, &CX86Ops::JnzLabel);
m_Assembler.or_(StatusReg, (uint32_t)FPCSR_FV); m_Assembler.or_(StatusReg, (uint32_t)FPCSR_FV);
if ((m_Opcode.funct & 8) == 0) if ((m_Opcode.funct & 8) == 0)
{ {
@ -7990,7 +7991,7 @@ void CX86RecompilerOps::COP1_D_CMP()
m_Assembler.test(StatusReg, FPCSR_EV); m_Assembler.test(StatusReg, FPCSR_EV);
CRegInfo ExitRegSet = m_RegWorkingSet; CRegInfo ExitRegSet = m_RegWorkingSet;
ExitRegSet.SetBlockCycleCount(ExitRegSet.GetBlockCycleCount() + g_System->CountPerOp()); ExitRegSet.SetBlockCycleCount(ExitRegSet.GetBlockCycleCount() + g_System->CountPerOp());
CompileExit((uint32_t)-1, (uint32_t)-1, ExitRegSet, ExitReason_ExceptionFloatingPoint, false, &CX86Ops::JnzLabel); CompileExit((uint64_t)-1, (uint64_t)-1, ExitRegSet, ExitReason_ExceptionFloatingPoint, false, &CX86Ops::JnzLabel);
m_Assembler.or_(StatusReg, (uint32_t)FPCSR_FV); m_Assembler.or_(StatusReg, (uint32_t)FPCSR_FV);
if ((m_Opcode.funct & 8) == 0) if ((m_Opcode.funct & 8) == 0)
{ {
@ -8055,7 +8056,7 @@ void CX86RecompilerOps::UnknownOpcode()
m_RegWorkingSet.WriteBackRegisters(); m_RegWorkingSet.WriteBackRegisters();
UpdateCounters(m_RegWorkingSet, false, true); UpdateCounters(m_RegWorkingSet, false, true);
m_Assembler.MoveConstToVariable(&g_Reg->m_PROGRAM_COUNTER, "PROGRAM_COUNTER", m_CompilePC); m_Assembler.MoveConst64ToVariable(&g_Reg->m_PROGRAM_COUNTER, "PROGRAM_COUNTER", m_CompilePC);
if (g_SyncSystem) if (g_SyncSystem)
{ {
m_Assembler.CallThis((uint32_t)g_BaseSystem, AddressOf(&CN64System::SyncSystem), "CN64System::SyncSystem", 4); m_Assembler.CallThis((uint32_t)g_BaseSystem, AddressOf(&CN64System::SyncSystem), "CN64System::SyncSystem", 4);
@ -8113,7 +8114,7 @@ void CX86RecompilerOps::ClearCachedInstructionInfo()
{ {
m_RegWorkingSet.WriteBackRegisters(); m_RegWorkingSet.WriteBackRegisters();
UpdateCounters(m_RegWorkingSet, false, true); UpdateCounters(m_RegWorkingSet, false, true);
m_Assembler.MoveConstToVariable(&g_Reg->m_PROGRAM_COUNTER, "PROGRAM_COUNTER", m_CompilePC); m_Assembler.MoveConst64ToVariable(&g_Reg->m_PROGRAM_COUNTER, "PROGRAM_COUNTER", m_CompilePC);
if (g_SyncSystem) if (g_SyncSystem)
{ {
m_Assembler.CallThis((uint32_t)g_BaseSystem, AddressOf(&CN64System::SyncSystem), "CN64System::SyncSystem", 4); m_Assembler.CallThis((uint32_t)g_BaseSystem, AddressOf(&CN64System::SyncSystem), "CN64System::SyncSystem", 4);
@ -8216,7 +8217,7 @@ void CX86RecompilerOps::CompileExitCode()
m_CodeBlock.Log(""); m_CodeBlock.Log("");
m_Assembler.bind(ExitIter->JumpLabel); m_Assembler.bind(ExitIter->JumpLabel);
m_PipelineStage = ExitIter->PipelineStage; m_PipelineStage = ExitIter->PipelineStage;
CompileExit((uint32_t)-1, ExitIter->TargetPC, ExitIter->ExitRegSet, ExitIter->Reason, true, nullptr); CompileExit((uint64_t)-1, ExitIter->TargetPC, ExitIter->ExitRegSet, ExitIter->Reason, true, nullptr);
} }
} }
@ -8322,7 +8323,7 @@ void CX86RecompilerOps::CompileCheckFPUInput(asmjit::x86::Gp RegPointer, FpuOpSi
{ {
m_Assembler.MoveConstToVariable(&g_System->m_PipelineStage, "System->m_PipelineStage", PIPELINE_STAGE_JUMP); m_Assembler.MoveConstToVariable(&g_System->m_PipelineStage, "System->m_PipelineStage", PIPELINE_STAGE_JUMP);
} }
m_Assembler.MoveConstToVariable(&m_Reg.m_PROGRAM_COUNTER, "PROGRAM_COUNTER", m_CompilePC); m_Assembler.MoveConst64ToVariable(&m_Reg.m_PROGRAM_COUNTER, "PROGRAM_COUNTER", m_CompilePC);
if (OpSize == FpuOpSize_32bit) if (OpSize == FpuOpSize_32bit)
{ {
m_Assembler.PushImm32("m_TempValue32", (uint32_t)&m_TempValue32); m_Assembler.PushImm32("m_TempValue32", (uint32_t)&m_TempValue32);
@ -8351,7 +8352,7 @@ void CX86RecompilerOps::CompileCheckFPUInput(asmjit::x86::Gp RegPointer, FpuOpSi
m_RegWorkingSet.AfterCallDirect(); m_RegWorkingSet.AfterCallDirect();
CRegInfo ExitRegSet = m_RegWorkingSet; CRegInfo ExitRegSet = m_RegWorkingSet;
ExitRegSet.SetBlockCycleCount(ExitRegSet.GetBlockCycleCount() + g_System->CountPerOp()); ExitRegSet.SetBlockCycleCount(ExitRegSet.GetBlockCycleCount() + g_System->CountPerOp());
CompileExit((uint32_t)-1, (uint32_t)-1, ExitRegSet, ExitReason_Exception, false, &CX86Ops::JnzLabel); CompileExit((uint64_t)-1, (uint64_t)-1, ExitRegSet, ExitReason_Exception, false, &CX86Ops::JnzLabel);
m_Assembler.bind(ValidFpuValue); m_Assembler.bind(ValidFpuValue);
if (m_PipelineStage == PIPELINE_STAGE_JUMP || m_PipelineStage == PIPELINE_STAGE_DELAY_SLOT) if (m_PipelineStage == PIPELINE_STAGE_JUMP || m_PipelineStage == PIPELINE_STAGE_DELAY_SLOT)
{ {
@ -8387,14 +8388,14 @@ void CX86RecompilerOps::CompileCheckFPUResult32(int32_t DestReg)
{ {
m_Assembler.MoveConstToVariable(&g_System->m_PipelineStage, "System->m_PipelineStage", PIPELINE_STAGE_JUMP); m_Assembler.MoveConstToVariable(&g_System->m_PipelineStage, "System->m_PipelineStage", PIPELINE_STAGE_JUMP);
} }
m_Assembler.MoveConstToVariable(&m_Reg.m_PROGRAM_COUNTER, "PROGRAM_COUNTER", m_CompilePC); m_Assembler.MoveConst64ToVariable(&m_Reg.m_PROGRAM_COUNTER, "PROGRAM_COUNTER", m_CompilePC);
m_Assembler.PushImm32("Result", (uint32_t)&m_TempValue32); m_Assembler.PushImm32("Result", (uint32_t)&m_TempValue32);
m_Assembler.CallThis((uint32_t)&g_System->m_OpCodes, AddressOf(&R4300iOp::CheckFPUResult32), "R4300iOp::CheckFPUResult32", 8); m_Assembler.CallThis((uint32_t)&g_System->m_OpCodes, AddressOf(&R4300iOp::CheckFPUResult32), "R4300iOp::CheckFPUResult32", 8);
m_Assembler.test(asmjit::x86::al, asmjit::x86::al); m_Assembler.test(asmjit::x86::al, asmjit::x86::al);
m_RegWorkingSet.AfterCallDirect(); m_RegWorkingSet.AfterCallDirect();
CRegInfo ExitRegSet = m_RegWorkingSet; CRegInfo ExitRegSet = m_RegWorkingSet;
ExitRegSet.SetBlockCycleCount(ExitRegSet.GetBlockCycleCount() + g_System->CountPerOp()); ExitRegSet.SetBlockCycleCount(ExitRegSet.GetBlockCycleCount() + g_System->CountPerOp());
CompileExit((uint32_t)-1, (uint32_t)-1, ExitRegSet, ExitReason_Exception, false, &CX86Ops::JneLabel); CompileExit((uint64_t)-1, (uint64_t)-1, ExitRegSet, ExitReason_Exception, false, &CX86Ops::JneLabel);
if (m_PipelineStage == PIPELINE_STAGE_JUMP || m_PipelineStage == PIPELINE_STAGE_DELAY_SLOT) if (m_PipelineStage == PIPELINE_STAGE_JUMP || m_PipelineStage == PIPELINE_STAGE_DELAY_SLOT)
{ {
m_Assembler.MoveConstToVariable(&g_System->m_PipelineStage, "System->m_PipelineStage", PIPELINE_STAGE_NORMAL); m_Assembler.MoveConstToVariable(&g_System->m_PipelineStage, "System->m_PipelineStage", PIPELINE_STAGE_NORMAL);
@ -8467,14 +8468,14 @@ void CX86RecompilerOps::CompileCheckFPUResult64(asmjit::x86::Gp RegPointer)
{ {
m_Assembler.MoveConstToVariable(&g_System->m_PipelineStage, "System->m_PipelineStage", PIPELINE_STAGE_JUMP); m_Assembler.MoveConstToVariable(&g_System->m_PipelineStage, "System->m_PipelineStage", PIPELINE_STAGE_JUMP);
} }
m_Assembler.MoveConstToVariable(&m_Reg.m_PROGRAM_COUNTER, "PROGRAM_COUNTER", m_CompilePC); m_Assembler.MoveConst64ToVariable(&m_Reg.m_PROGRAM_COUNTER, "PROGRAM_COUNTER", m_CompilePC);
m_Assembler.push(RegPointer); m_Assembler.push(RegPointer);
m_Assembler.CallThis((uint32_t)&g_System->m_OpCodes, AddressOf(&R4300iOp::CheckFPUResult64), "R4300iOp::CheckFPUResult64", 8); m_Assembler.CallThis((uint32_t)&g_System->m_OpCodes, AddressOf(&R4300iOp::CheckFPUResult64), "R4300iOp::CheckFPUResult64", 8);
m_Assembler.test(asmjit::x86::al, asmjit::x86::al); m_Assembler.test(asmjit::x86::al, asmjit::x86::al);
m_RegWorkingSet.AfterCallDirect(); m_RegWorkingSet.AfterCallDirect();
CRegInfo ExitRegSet = m_RegWorkingSet; CRegInfo ExitRegSet = m_RegWorkingSet;
ExitRegSet.SetBlockCycleCount(ExitRegSet.GetBlockCycleCount() + g_System->CountPerOp()); ExitRegSet.SetBlockCycleCount(ExitRegSet.GetBlockCycleCount() + g_System->CountPerOp());
CompileExit((uint32_t)-1, (uint32_t)-1, ExitRegSet, ExitReason_Exception, false, &CX86Ops::JneLabel); CompileExit((uint64_t)-1, (uint64_t)-1, ExitRegSet, ExitReason_Exception, false, &CX86Ops::JneLabel);
if (m_PipelineStage == PIPELINE_STAGE_JUMP || m_PipelineStage == PIPELINE_STAGE_DELAY_SLOT) if (m_PipelineStage == PIPELINE_STAGE_JUMP || m_PipelineStage == PIPELINE_STAGE_DELAY_SLOT)
{ {
m_Assembler.MoveConstToVariable(&g_System->m_PipelineStage, "System->m_PipelineStage", PIPELINE_STAGE_NORMAL); m_Assembler.MoveConstToVariable(&g_System->m_PipelineStage, "System->m_PipelineStage", PIPELINE_STAGE_NORMAL);
@ -9289,12 +9290,12 @@ void CX86RecompilerOps::SetCurrentPC(uint32_t ProgramCounter)
{ {
g_Notify->FatalError(GS(MSG_FAIL_LOAD_WORD)); g_Notify->FatalError(GS(MSG_FAIL_LOAD_WORD));
} }
m_Instruction = R4300iInstruction(ProgramCounter, Value); m_Instruction = R4300iInstruction((int32_t)ProgramCounter, Value);
} }
uint32_t CX86RecompilerOps::GetCurrentPC(void) uint32_t CX86RecompilerOps::GetCurrentPC(void)
{ {
return m_CompilePC; return (uint32_t)m_CompilePC;
} }
void CX86RecompilerOps::SetCurrentSection(CCodeSection * section) void CX86RecompilerOps::SetCurrentSection(CCodeSection * section)
@ -9403,7 +9404,7 @@ void CX86RecompilerOps::CompileExecuteBP(void)
m_RegWorkingSet.WriteBackRegisters(); m_RegWorkingSet.WriteBackRegisters();
UpdateCounters(m_RegWorkingSet, true, true); UpdateCounters(m_RegWorkingSet, true, true);
m_Assembler.MoveConstToVariable(&m_Reg.m_PROGRAM_COUNTER, "PROGRAM_COUNTER", m_CompilePC); m_Assembler.MoveConst64ToVariable(&m_Reg.m_PROGRAM_COUNTER, "PROGRAM_COUNTER", m_CompilePC);
if (g_SyncSystem) if (g_SyncSystem)
{ {
m_Assembler.CallThis((uint32_t)g_BaseSystem, AddressOf(&CN64System::SyncSystem), "CN64System::SyncSystem", 4); m_Assembler.CallThis((uint32_t)g_BaseSystem, AddressOf(&CN64System::SyncSystem), "CN64System::SyncSystem", 4);
@ -9423,7 +9424,7 @@ void CX86RecompilerOps::CompileExecuteDelaySlotBP(void)
m_RegWorkingSet.WriteBackRegisters(); m_RegWorkingSet.WriteBackRegisters();
UpdateCounters(m_RegWorkingSet, true, true); UpdateCounters(m_RegWorkingSet, true, true);
m_Assembler.MoveConstToVariable(&m_Reg.m_PROGRAM_COUNTER, "PROGRAM_COUNTER", m_CompilePC); m_Assembler.MoveConst64ToVariable(&m_Reg.m_PROGRAM_COUNTER, "PROGRAM_COUNTER", m_CompilePC);
if (g_SyncSystem) if (g_SyncSystem)
{ {
m_Assembler.CallThis((uint32_t)g_BaseSystem, AddressOf(&CN64System::SyncSystem), "CN64System::SyncSystem", 4); m_Assembler.CallThis((uint32_t)g_BaseSystem, AddressOf(&CN64System::SyncSystem), "CN64System::SyncSystem", 4);
@ -9447,7 +9448,7 @@ void CX86RecompilerOps::OverflowDelaySlot(bool TestTimer)
} }
else else
{ {
m_Assembler.MoveConstToVariable(&m_Reg.m_PROGRAM_COUNTER, "PROGRAM_COUNTER", m_CompilePC + 4); m_Assembler.MoveConst64ToVariable(&m_Reg.m_PROGRAM_COUNTER, "PROGRAM_COUNTER", m_CompilePC + 4);
} }
m_Assembler.MoveConstToVariable(&g_System->m_PipelineStage, "System->m_PipelineStage", PIPELINE_STAGE_JUMP); m_Assembler.MoveConstToVariable(&g_System->m_PipelineStage, "System->m_PipelineStage", PIPELINE_STAGE_JUMP);
if (g_SyncSystem) if (g_SyncSystem)
@ -9476,12 +9477,12 @@ void CX86RecompilerOps::OverflowDelaySlot(bool TestTimer)
m_PipelineStage = PIPELINE_STAGE_END_BLOCK; m_PipelineStage = PIPELINE_STAGE_END_BLOCK;
} }
void CX86RecompilerOps::CompileExit(uint32_t JumpPC, uint32_t TargetPC, CRegInfo & ExitRegSet, ExitReason reason) void CX86RecompilerOps::CompileExit(uint64_t JumpPC, uint64_t TargetPC, CRegInfo & ExitRegSet, ExitReason reason)
{ {
CompileExit(JumpPC, TargetPC, ExitRegSet, reason, true, nullptr); CompileExit(JumpPC, TargetPC, ExitRegSet, reason, true, nullptr);
} }
void CX86RecompilerOps::CompileExit(uint32_t JumpPC, uint32_t TargetPC, CRegInfo & ExitRegSet, ExitReason reason, bool CompileNow, void (CX86Ops::*x86Jmp)(const char * LabelName, asmjit::Label & JumpLabel)) void CX86RecompilerOps::CompileExit(uint64_t JumpPC, uint64_t TargetPC, CRegInfo & ExitRegSet, ExitReason reason, bool CompileNow, void (CX86Ops::*x86Jmp)(const char * LabelName, asmjit::Label & JumpLabel))
{ {
if (!CompileNow) if (!CompileNow)
{ {
@ -9506,10 +9507,10 @@ void CX86RecompilerOps::CompileExit(uint32_t JumpPC, uint32_t TargetPC, CRegInfo
//m_CodeBlock.Log("CompileExit: %d",reason); //m_CodeBlock.Log("CompileExit: %d",reason);
ExitRegSet.WriteBackRegisters(); ExitRegSet.WriteBackRegisters();
if (TargetPC != (uint32_t)-1) if (TargetPC != (uint64_t)-1)
{ {
m_Assembler.MoveConstToVariable(&g_Reg->m_PROGRAM_COUNTER, "PROGRAM_COUNTER", TargetPC); m_Assembler.MoveConst64ToVariable(&g_Reg->m_PROGRAM_COUNTER, "PROGRAM_COUNTER", TargetPC);
UpdateCounters(ExitRegSet, TargetPC <= JumpPC && JumpPC != -1, reason == ExitReason_Normal); UpdateCounters(ExitRegSet, TargetPC <= JumpPC && JumpPC != (uint64_t)-1, reason == ExitReason_Normal);
} }
else else
{ {
@ -9522,7 +9523,7 @@ void CX86RecompilerOps::CompileExit(uint32_t JumpPC, uint32_t TargetPC, CRegInfo
case ExitReason_Normal: case ExitReason_Normal:
case ExitReason_NormalNoSysCheck: case ExitReason_NormalNoSysCheck:
ExitRegSet.SetBlockCycleCount(0); ExitRegSet.SetBlockCycleCount(0);
if (TargetPC != (uint32_t)-1) if (TargetPC != (uint64_t)-1)
{ {
if (TargetPC <= JumpPC && reason == ExitReason_Normal) if (TargetPC <= JumpPC && reason == ExitReason_Normal)
{ {
@ -9816,7 +9817,7 @@ void CX86RecompilerOps::CompileLoadMemoryValue(asmjit::x86::Gp & AddressReg, asm
{ {
m_Assembler.SubConstFromVariable(OpsExecuted, g_NextTimer, "g_NextTimer"); m_Assembler.SubConstFromVariable(OpsExecuted, g_NextTimer, "g_NextTimer");
} }
m_Assembler.MoveConstToVariable(&g_Reg->m_PROGRAM_COUNTER, "PROGRAM_COUNTER", m_CompilePC); m_Assembler.MoveConst64ToVariable(&g_Reg->m_PROGRAM_COUNTER, "PROGRAM_COUNTER", m_CompilePC);
if (m_PipelineStage != PIPELINE_STAGE_NORMAL) if (m_PipelineStage != PIPELINE_STAGE_NORMAL)
{ {
m_Assembler.MoveConstToVariable(&g_System->m_PipelineStage, "g_System->m_PipelineStage", PIPELINE_STAGE_JUMP); m_Assembler.MoveConstToVariable(&g_System->m_PipelineStage, "g_System->m_PipelineStage", PIPELINE_STAGE_JUMP);
@ -9829,7 +9830,7 @@ void CX86RecompilerOps::CompileLoadMemoryValue(asmjit::x86::Gp & AddressReg, asm
m_Assembler.CallThis((uint32_t)(&m_MMU), AddressOf(&CMipsMemoryVM::LW_VAddr32), "CMipsMemoryVM::LW_VAddr32", 12); m_Assembler.CallThis((uint32_t)(&m_MMU), AddressOf(&CMipsMemoryVM::LW_VAddr32), "CMipsMemoryVM::LW_VAddr32", 12);
m_Assembler.test(asmjit::x86::al, asmjit::x86::al); m_Assembler.test(asmjit::x86::al, asmjit::x86::al);
m_RegWorkingSet.AfterCallDirect(); m_RegWorkingSet.AfterCallDirect();
CompileExit((uint32_t)-1, (uint32_t)-1, m_RegWorkingSet, ExitReason_NormalNoSysCheck, false, &CX86Ops::JeLabel); CompileExit((uint64_t)-1, (uint64_t)-1, m_RegWorkingSet, ExitReason_NormalNoSysCheck, false, &CX86Ops::JeLabel);
m_Assembler.MoveConstToX86reg(TempReg, (uint32_t)&m_TempValue32); m_Assembler.MoveConstToX86reg(TempReg, (uint32_t)&m_TempValue32);
m_Assembler.sub(TempReg, AddressReg); m_Assembler.sub(TempReg, AddressReg);
} }
@ -9841,7 +9842,7 @@ void CX86RecompilerOps::CompileLoadMemoryValue(asmjit::x86::Gp & AddressReg, asm
m_Assembler.CallThis((uint32_t)(&m_MMU), AddressOf(&CMipsMemoryVM::LH_VAddr32), "CMipsMemoryVM::LH_VAddr32", 12); m_Assembler.CallThis((uint32_t)(&m_MMU), AddressOf(&CMipsMemoryVM::LH_VAddr32), "CMipsMemoryVM::LH_VAddr32", 12);
m_Assembler.test(asmjit::x86::al, asmjit::x86::al); m_Assembler.test(asmjit::x86::al, asmjit::x86::al);
m_RegWorkingSet.AfterCallDirect(); m_RegWorkingSet.AfterCallDirect();
CompileExit((uint32_t)-1, (uint32_t)-1, m_RegWorkingSet, ExitReason_NormalNoSysCheck, false, &CX86Ops::JeLabel); CompileExit((uint64_t)-1, (uint64_t)-1, m_RegWorkingSet, ExitReason_NormalNoSysCheck, false, &CX86Ops::JeLabel);
m_Assembler.MoveConstToX86reg(TempReg, (uint32_t)&m_TempValue32); m_Assembler.MoveConstToX86reg(TempReg, (uint32_t)&m_TempValue32);
m_Assembler.sub(TempReg, AddressReg); m_Assembler.sub(TempReg, AddressReg);
m_Assembler.xor_(AddressReg, 2); m_Assembler.xor_(AddressReg, 2);
@ -9854,7 +9855,7 @@ void CX86RecompilerOps::CompileLoadMemoryValue(asmjit::x86::Gp & AddressReg, asm
m_Assembler.CallThis((uint32_t)&m_MMU, AddressOf(&CMipsMemoryVM::LB_VAddr32), "CMipsMemoryVM::LB_VAddr32", 12); m_Assembler.CallThis((uint32_t)&m_MMU, AddressOf(&CMipsMemoryVM::LB_VAddr32), "CMipsMemoryVM::LB_VAddr32", 12);
m_Assembler.test(asmjit::x86::al, asmjit::x86::al); m_Assembler.test(asmjit::x86::al, asmjit::x86::al);
m_RegWorkingSet.AfterCallDirect(); m_RegWorkingSet.AfterCallDirect();
CompileExit((uint32_t)-1, (uint32_t)-1, m_RegWorkingSet, ExitReason_NormalNoSysCheck, false, &CX86Ops::JeLabel); CompileExit((uint64_t)-1, (uint64_t)-1, m_RegWorkingSet, ExitReason_NormalNoSysCheck, false, &CX86Ops::JeLabel);
m_Assembler.MoveConstToX86reg(TempReg, (uint32_t)&m_TempValue32); m_Assembler.MoveConstToX86reg(TempReg, (uint32_t)&m_TempValue32);
m_Assembler.sub(TempReg, AddressReg); m_Assembler.sub(TempReg, AddressReg);
m_Assembler.xor_(AddressReg, 3); m_Assembler.xor_(AddressReg, 3);
@ -10006,7 +10007,7 @@ void CX86RecompilerOps::CompileStoreMemoryValue(asmjit::x86::Gp AddressReg, asmj
asmjit::Label JumpFound = m_Assembler.newLabel(); asmjit::Label JumpFound = m_Assembler.newLabel();
m_Assembler.JneLabel(stdstr_f("MemoryWriteMap_%X_Found", m_CompilePC).c_str(), JumpFound); m_Assembler.JneLabel(stdstr_f("MemoryWriteMap_%X_Found", m_CompilePC).c_str(), JumpFound);
m_Assembler.MoveConstToVariable(&g_Reg->m_PROGRAM_COUNTER, "PROGRAM_COUNTER", m_CompilePC); m_Assembler.MoveConst64ToVariable(&g_Reg->m_PROGRAM_COUNTER, "PROGRAM_COUNTER", m_CompilePC);
if (m_PipelineStage != PIPELINE_STAGE_NORMAL) if (m_PipelineStage != PIPELINE_STAGE_NORMAL)
{ {
m_Assembler.MoveConstToVariable(&g_System->m_PipelineStage, "g_System->m_PipelineStage", m_PipelineStage); m_Assembler.MoveConstToVariable(&g_System->m_PipelineStage, "g_System->m_PipelineStage", m_PipelineStage);
@ -11454,13 +11455,13 @@ void CX86RecompilerOps::COP1_S_CVT(CRegBase::FPU_ROUND RoundMethod, CRegInfo::FP
{ {
m_Assembler.MoveConstToVariable(&g_System->m_PipelineStage, "System->m_PipelineStage", PIPELINE_STAGE_JUMP); m_Assembler.MoveConstToVariable(&g_System->m_PipelineStage, "System->m_PipelineStage", PIPELINE_STAGE_JUMP);
} }
m_Assembler.MoveConstToVariable(&m_Reg.m_PROGRAM_COUNTER, "PROGRAM_COUNTER", m_CompilePC); m_Assembler.MoveConst64ToVariable(&m_Reg.m_PROGRAM_COUNTER, "PROGRAM_COUNTER", m_CompilePC);
m_Assembler.CallThis((uint32_t)&g_System->m_OpCodes, AddressOf(&R4300iOp::CheckFPUInvalidException), "R4300iOp::CheckFPUInvalidException", 8); m_Assembler.CallThis((uint32_t)&g_System->m_OpCodes, AddressOf(&R4300iOp::CheckFPUInvalidException), "R4300iOp::CheckFPUInvalidException", 8);
m_Assembler.test(asmjit::x86::al, asmjit::x86::al); m_Assembler.test(asmjit::x86::al, asmjit::x86::al);
m_RegWorkingSet.AfterCallDirect(); m_RegWorkingSet.AfterCallDirect();
CRegInfo ExitRegSet = m_RegWorkingSet; CRegInfo ExitRegSet = m_RegWorkingSet;
ExitRegSet.SetBlockCycleCount(ExitRegSet.GetBlockCycleCount() + g_System->CountPerOp()); ExitRegSet.SetBlockCycleCount(ExitRegSet.GetBlockCycleCount() + g_System->CountPerOp());
CompileExit((uint32_t)-1, (uint32_t)-1, ExitRegSet, ExitReason_Exception, false, &CX86Ops::JnzLabel); CompileExit((uint64_t)-1, (uint64_t)-1, ExitRegSet, ExitReason_Exception, false, &CX86Ops::JnzLabel);
if (m_PipelineStage == PIPELINE_STAGE_JUMP || m_PipelineStage == PIPELINE_STAGE_DELAY_SLOT) if (m_PipelineStage == PIPELINE_STAGE_JUMP || m_PipelineStage == PIPELINE_STAGE_DELAY_SLOT)
{ {
m_Assembler.MoveConstToVariable(&g_System->m_PipelineStage, "System->m_PipelineStage", PIPELINE_STAGE_NORMAL); m_Assembler.MoveConstToVariable(&g_System->m_PipelineStage, "System->m_PipelineStage", PIPELINE_STAGE_NORMAL);
@ -11488,13 +11489,13 @@ void CX86RecompilerOps::COP1_S_CVT(CRegBase::FPU_ROUND RoundMethod, CRegInfo::FP
{ {
m_Assembler.MoveConstToVariable(&g_System->m_PipelineStage, "System->m_PipelineStage", PIPELINE_STAGE_JUMP); m_Assembler.MoveConstToVariable(&g_System->m_PipelineStage, "System->m_PipelineStage", PIPELINE_STAGE_JUMP);
} }
m_Assembler.MoveConstToVariable(&m_Reg.m_PROGRAM_COUNTER, "PROGRAM_COUNTER", m_CompilePC); m_Assembler.MoveConst64ToVariable(&m_Reg.m_PROGRAM_COUNTER, "PROGRAM_COUNTER", m_CompilePC);
m_Assembler.CallThis((uint32_t)&g_System->m_OpCodes, AddressOf(&R4300iOp::CheckFPUInvalidException), "R4300iOp::CheckFPUInvalidException", 8); m_Assembler.CallThis((uint32_t)&g_System->m_OpCodes, AddressOf(&R4300iOp::CheckFPUInvalidException), "R4300iOp::CheckFPUInvalidException", 8);
m_Assembler.test(asmjit::x86::al, asmjit::x86::al); m_Assembler.test(asmjit::x86::al, asmjit::x86::al);
m_RegWorkingSet.AfterCallDirect(); m_RegWorkingSet.AfterCallDirect();
CRegInfo ExitRegSet = m_RegWorkingSet; CRegInfo ExitRegSet = m_RegWorkingSet;
ExitRegSet.SetBlockCycleCount(ExitRegSet.GetBlockCycleCount() + g_System->CountPerOp()); ExitRegSet.SetBlockCycleCount(ExitRegSet.GetBlockCycleCount() + g_System->CountPerOp());
CompileExit((uint32_t)-1, (uint32_t)-1, ExitRegSet, ExitReason_Exception, false, &CX86Ops::JnzLabel); CompileExit((uint64_t)-1, (uint64_t)-1, ExitRegSet, ExitReason_Exception, false, &CX86Ops::JnzLabel);
if (m_PipelineStage == PIPELINE_STAGE_JUMP || m_PipelineStage == PIPELINE_STAGE_DELAY_SLOT) if (m_PipelineStage == PIPELINE_STAGE_JUMP || m_PipelineStage == PIPELINE_STAGE_DELAY_SLOT)
{ {
m_Assembler.MoveConstToVariable(&g_System->m_PipelineStage, "System->m_PipelineStage", PIPELINE_STAGE_NORMAL); m_Assembler.MoveConstToVariable(&g_System->m_PipelineStage, "System->m_PipelineStage", PIPELINE_STAGE_NORMAL);

6
Source/Project64-core/N64System/Recompiler/x86/x86RecompilerOps.h
View File

@ -245,7 +245,7 @@ public:
const R4300iInstruction & GetInstruction(void) const; const R4300iInstruction & GetInstruction(void) const;
void PreCompileOpcode(void); void PreCompileOpcode(void);
void PostCompileOpcode(void); void PostCompileOpcode(void);
void CompileExit(uint32_t JumpPC, uint32_t TargetPC, CRegInfo & ExitRegSet, ExitReason Reason); void CompileExit(uint64_t JumpPC, uint64_t TargetPC, CRegInfo & ExitRegSet, ExitReason Reason);
void CompileReadTLBMiss(uint32_t VirtualAddress, const asmjit::x86::Gp & LookUpReg); void CompileReadTLBMiss(uint32_t VirtualAddress, const asmjit::x86::Gp & LookUpReg);
void CompileReadTLBMiss(const asmjit::x86::Gp & AddressReg, const asmjit::x86::Gp & LookUpReg); void CompileReadTLBMiss(const asmjit::x86::Gp & AddressReg, const asmjit::x86::Gp & LookUpReg);
@ -286,7 +286,7 @@ private:
void LW_KnownAddress(const asmjit::x86::Gp & Reg, uint32_t VAddr); void LW_KnownAddress(const asmjit::x86::Gp & Reg, uint32_t VAddr);
void LW(bool ResultSigned, bool bRecordLLBit); void LW(bool ResultSigned, bool bRecordLLBit);
void SW(bool bCheckLLbit); void SW(bool bCheckLLbit);
void CompileExit(uint32_t JumpPC, uint32_t TargetPC, CRegInfo & ExitRegSet, ExitReason Reason, bool CompileNow, void (CX86Ops::*x86Jmp)(const char * LabelName, asmjit::Label & JumpLabel)); void CompileExit(uint64_t JumpPC, uint64_t TargetPC, CRegInfo & ExitRegSet, ExitReason Reason, bool CompileNow, void (CX86Ops::*x86Jmp)(const char * LabelName, asmjit::Label & JumpLabel));
void ResetMemoryStack(); void ResetMemoryStack();
void COP1_S_CVT(CRegBase::FPU_ROUND RoundMethod, CRegInfo::FPU_STATE OldFormat, CRegInfo::FPU_STATE NewFormat); void COP1_S_CVT(CRegBase::FPU_ROUND RoundMethod, CRegInfo::FPU_STATE OldFormat, CRegInfo::FPU_STATE NewFormat);
@ -305,7 +305,7 @@ private:
EXIT_LIST m_ExitInfo; EXIT_LIST m_ExitInfo;
CX86Ops m_Assembler; CX86Ops m_Assembler;
PIPELINE_STAGE m_PipelineStage; PIPELINE_STAGE m_PipelineStage;
const uint32_t & m_CompilePC; const uint64_t & m_CompilePC;
CX86RegInfo m_RegWorkingSet; CX86RegInfo m_RegWorkingSet;
CRegInfo m_RegBeforeDelay; CRegInfo m_RegBeforeDelay;
bool m_EffectDelaySlot; bool m_EffectDelaySlot;

16
Source/Project64-core/N64System/Recompiler/x86/x86ops.cpp
View File

@ -421,6 +421,22 @@ void CX86Ops::MoveConstToVariable(void * Variable, const char * VariableName, ui
} }
} }
void CX86Ops::MoveConst64ToVariable(void * Variable, const char * VariableName, uint64_t Const)
{
if (CDebugSettings::bRecordRecompilerAsm())
{
std::string SymbolKey = VariableSymbol(Variable);
AddSymbol(SymbolKey.c_str(), VariableName);
mov(asmjit::x86::dword_ptr((uint64_t)Variable), (uint32_t)Const);
mov(asmjit::x86::dword_ptr(((uint64_t)Variable) + 4), (uint32_t)(Const >> 32));
RemoveSymbol(SymbolKey.c_str());
}
else
{
mov(asmjit::x86::dword_ptr((uint64_t)Variable), Const);
}
}
void CX86Ops::MoveConstToX86reg(const asmjit::x86::Gp & Reg, uint32_t Const) void CX86Ops::MoveConstToX86reg(const asmjit::x86::Gp & Reg, uint32_t Const)
{ {
if (Const == 0) if (Const == 0)

1
Source/Project64-core/N64System/Recompiler/x86/x86ops.h
View File

@ -72,6 +72,7 @@ public:
void MoveConstByteToVariable(void * Variable, const char * VariableName, uint8_t Const); void MoveConstByteToVariable(void * Variable, const char * VariableName, uint8_t Const);
void MoveConstHalfToVariable(void * Variable, const char * VariableName, uint16_t Const); void MoveConstHalfToVariable(void * Variable, const char * VariableName, uint16_t Const);
void MoveConstToVariable(void * Variable, const char * VariableName, uint32_t Const); void MoveConstToVariable(void * Variable, const char * VariableName, uint32_t Const);
void MoveConst64ToVariable(void * Variable, const char * VariableName, uint64_t Const);
void MoveConstToX86reg(const asmjit::x86::Gp & Reg, uint32_t Const); void MoveConstToX86reg(const asmjit::x86::Gp & Reg, uint32_t Const);
void MoveSxVariableToX86regByte(const asmjit::x86::Gp & Reg, void * Variable, const char * VariableName); void MoveSxVariableToX86regByte(const asmjit::x86::Gp & Reg, void * Variable, const char * VariableName);
void MoveSxVariableToX86regHalf(const asmjit::x86::Gp & Reg, void * Variable, const char * VariableName); void MoveSxVariableToX86regHalf(const asmjit::x86::Gp & Reg, void * Variable, const char * VariableName);

2
Source/Project64/UserInterface/Debugger/CPULog.cpp
View File

@ -53,7 +53,7 @@ void CCPULog::PushState()
CPUState * state = &m_Array[m_Index++]; CPUState * state = &m_Array[m_Index++];
state->pc = g_Reg->m_PROGRAM_COUNTER; state->pc = (uint32_t)g_Reg->m_PROGRAM_COUNTER;
state->opcode = g_System->Opcode(); state->opcode = g_System->Opcode();
memcpy(state->gpr, g_Reg->m_GPR, sizeof(g_Reg->m_GPR)); memcpy(state->gpr, g_Reg->m_GPR, sizeof(g_Reg->m_GPR));

14
Source/Project64/UserInterface/Debugger/Debugger-Commands.cpp
View File

@ -62,7 +62,7 @@ CDebugCommandsView::~CDebugCommandsView()
LRESULT CDebugCommandsView::OnInitDialog(UINT /*uMsg*/, WPARAM /*wParam*/, LPARAM /*lParam*/, BOOL & /*bHandled*/) LRESULT CDebugCommandsView::OnInitDialog(UINT /*uMsg*/, WPARAM /*wParam*/, LPARAM /*lParam*/, BOOL & /*bHandled*/)
{ {
m_StartAddress = g_Reg ? g_Reg->m_PROGRAM_COUNTER : 0x80000000; m_StartAddress = (uint32_t)(g_Reg ? g_Reg->m_PROGRAM_COUNTER : 0x80000000);
g_Settings->RegisterChangeCB(Debugger_WaitingForStep, this, (CSettings::SettingChangedFunc)StaticWaitingForStepChanged); g_Settings->RegisterChangeCB(Debugger_WaitingForStep, this, (CSettings::SettingChangedFunc)StaticWaitingForStepChanged);
g_Settings->RegisterChangeCB(Debugger_SteppingOps, this, (CSettings::SettingChangedFunc)StaticSteppingOpsChanged); g_Settings->RegisterChangeCB(Debugger_SteppingOps, this, (CSettings::SettingChangedFunc)StaticSteppingOpsChanged);
@ -499,7 +499,7 @@ void CDebugCommandsView::ShowAddress(uint32_t address, bool top, bool bUserInput
} }
m_bIgnorePCChange = true; m_bIgnorePCChange = true;
m_PCEdit.SetValue(g_Reg->m_PROGRAM_COUNTER, DisplayMode::ZeroExtend); m_PCEdit.SetValue((uint32_t)g_Reg->m_PROGRAM_COUNTER, DisplayMode::ZeroExtend);
// Enable buttons // Enable buttons
m_ViewPCButton.EnableWindow(TRUE); m_ViewPCButton.EnableWindow(TRUE);
@ -681,7 +681,7 @@ LRESULT CDebugCommandsView::OnCustomDrawList(NMHDR * pNMHDR)
uint32_t nSubItem = pLVCD->iSubItem; uint32_t nSubItem = pLVCD->iSubItem;
uint32_t address = m_StartAddress + (nItem * 4); uint32_t address = m_StartAddress + (nItem * 4);
uint32_t pc = (g_Reg != nullptr) ? g_Reg->m_PROGRAM_COUNTER : 0; uint32_t pc = (g_Reg != nullptr) ? (uint32_t)g_Reg->m_PROGRAM_COUNTER : 0;
R4300iOpcode pcOpcode; R4300iOpcode pcOpcode;
if (!m_Debugger->DebugLoad_VAddr(pc, pcOpcode.Value)) if (!m_Debugger->DebugLoad_VAddr(pc, pcOpcode.Value))
@ -1051,7 +1051,7 @@ void CDebugCommandsView::CPUResume()
void CDebugCommandsView::CPUStepOver() void CDebugCommandsView::CPUStepOver()
{ {
COpInfo opInfo; COpInfo opInfo;
if (!m_Debugger->DebugLoad_VAddr(g_Reg->m_PROGRAM_COUNTER, opInfo.m_OpCode.Value)) if (!m_Debugger->DebugLoad_VAddr((uint32_t)g_Reg->m_PROGRAM_COUNTER, opInfo.m_OpCode.Value))
{ {
return; return;
} }
@ -1059,7 +1059,7 @@ void CDebugCommandsView::CPUStepOver()
if (opInfo.IsJAL()) if (opInfo.IsJAL())
{ {
// Put temp breakpoints on return address and resume // Put temp breakpoints on return address and resume
m_Breakpoints->AddExecution(g_Reg->m_PROGRAM_COUNTER + 8, true); m_Breakpoints->AddExecution((uint32_t)g_Reg->m_PROGRAM_COUNTER + 8, true);
CPUResume(); CPUResume();
} }
else else
@ -1098,7 +1098,7 @@ LRESULT CDebugCommandsView::OnViewPCButton(WORD /*wNotifyCode*/, WORD /*wID*/, H
{ {
if (g_Reg != nullptr && isStepping()) if (g_Reg != nullptr && isStepping())
{ {
ShowAddress(g_Reg->m_PROGRAM_COUNTER, TRUE); ShowAddress((uint32_t)g_Reg->m_PROGRAM_COUNTER, TRUE);
} }
return FALSE; return FALSE;
} }
@ -1523,7 +1523,7 @@ void CDebugCommandsView::WaitingForStepChanged(void)
{ {
if (WaitingForStep()) if (WaitingForStep())
{ {
ShowAddress(g_Reg->m_PROGRAM_COUNTER, false); ShowAddress((uint32_t)g_Reg->m_PROGRAM_COUNTER, false);
m_Debugger->Debug_RefreshStackWindow(); m_Debugger->Debug_RefreshStackWindow();
m_Debugger->Debug_RefreshStackTraceWindow(); m_Debugger->Debug_RefreshStackTraceWindow();
m_StepButton.EnableWindow(true); m_StepButton.EnableWindow(true);

2
Source/Project64/UserInterface/Debugger/Debugger-RegisterTabs.cpp
View File

@ -483,7 +483,7 @@ INT_PTR CALLBACK CRegisterTabs::TabProcGPR(HWND hDlg, UINT msg, WPARAM wParam, L
WORD ctrlId = (WORD)::GetWindowLong(hWnd, GWL_ID); WORD ctrlId = (WORD)::GetWindowLong(hWnd, GWL_ID);
uint32_t Instruction; uint32_t Instruction;
m_Debugger->DebugLoad_VAddr(g_Reg->m_PROGRAM_COUNTER, Instruction); m_Debugger->DebugLoad_VAddr((uint32_t)g_Reg->m_PROGRAM_COUNTER, Instruction);
R4300iInstruction opInfo(g_Reg->m_PROGRAM_COUNTER, Instruction); R4300iInstruction opInfo(g_Reg->m_PROGRAM_COUNTER, Instruction);
bool bOpReads = false; bool bOpReads = false;

6
Source/Project64/UserInterface/Debugger/Debugger.cpp
View File

@ -606,7 +606,7 @@ void CDebuggerUI::CPUStepStarted()
if (m_ScriptSystem->HaveAppCallbacks()) if (m_ScriptSystem->HaveAppCallbacks())
{ {
JSHookCpuStepEnv hookEnv; JSHookCpuStepEnv hookEnv;
hookEnv.pc = g_Reg->m_PROGRAM_COUNTER; hookEnv.pc = (uint32_t)g_Reg->m_PROGRAM_COUNTER;
hookEnv.opInfo = COpInfo(g_System->Opcode()); hookEnv.opInfo = COpInfo(g_System->Opcode());
if (m_ScriptSystem->HaveCpuExecCallbacks(hookEnv.pc)) if (m_ScriptSystem->HaveCpuExecCallbacks(hookEnv.pc))
@ -626,7 +626,7 @@ void CDebuggerUI::CPUStepStarted()
if (CDebugSettings::ExceptionBreakpoints() != 0) if (CDebugSettings::ExceptionBreakpoints() != 0)
{ {
uint32_t pc = g_Reg->m_PROGRAM_COUNTER; uint32_t pc = (uint32_t)g_Reg->m_PROGRAM_COUNTER;
if (pc == 0x80000000 || pc == 0x80000080 || pc == 0xA0000100 || pc == 0x80000180) if (pc == 0x80000000 || pc == 0x80000080 || pc == 0xA0000100 || pc == 0x80000180)
{ {
@ -691,7 +691,7 @@ void CDebuggerUI::CPUStepEnded()
if (op == R4300i_JAL || ((op == R4300i_SPECIAL) && (funct == R4300i_SPECIAL_JALR) && (Opcode.rd == 31))) // JAL or JALR RA, x if (op == R4300i_JAL || ((op == R4300i_SPECIAL) && (funct == R4300i_SPECIAL_JALR) && (Opcode.rd == 31))) // JAL or JALR RA, x
{ {
m_StackTrace->PushEntry(g_System->JumpToLocation(), g_Reg->m_PROGRAM_COUNTER); m_StackTrace->PushEntry((uint32_t)g_System->JumpToLocation(), (uint32_t)g_Reg->m_PROGRAM_COUNTER);
} }
else if (funct == R4300i_SPECIAL_JR && Opcode.rs == 31) // JR RA else if (funct == R4300i_SPECIAL_JR && Opcode.rs == 31) // JR RA
{ {

2
Source/Project64/UserInterface/Debugger/ScriptAPI/ScriptAPI_cpu.cpp
View File

@ -515,7 +515,7 @@ static uint32_t * CPURegPtr(const char * key)
if (strcmp(key, "pc") == 0) if (strcmp(key, "pc") == 0)
{ {
return &g_Reg->m_PROGRAM_COUNTER; return (uint32_t *)&g_Reg->m_PROGRAM_COUNTER;
} }
else if (strcmp(key, "hi") == 0) else if (strcmp(key, "hi") == 0)
{ {