Cleaned up some warnings in the rsp
This commit is contained in:
zilmar
parent
abca1bd56f
commit
8e715efe44
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@ -235,7 +235,7 @@ __declspec(dllexport) DWORD DoRspCycles ( DWORD Cycles ) {
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*/
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if (Profiling && !IndvidualBlock) {
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StartTimer(Timer_RSP_Running);
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StartTimer((DWORD)Timer_RSP_Running);
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}
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WaitForSingleObjectEx(hMutex, 1000 * 100, FALSE);
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@ -257,7 +257,7 @@ __declspec(dllexport) DWORD DoRspCycles ( DWORD Cycles ) {
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ReleaseMutex(hMutex);
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if (Profiling && !IndvidualBlock) {
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StartTimer(Timer_R4300_Running);
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StartTimer((DWORD)Timer_R4300_Running);
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}
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return Cycles;
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@ -533,7 +533,7 @@ void RSP_COP2_VECTOR (void) {
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void RSP_Vector_VMULF (void) {
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int el, del;
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UWORD32 temp;
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VECTOR result;
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VECTOR result = {0};
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for (el = 0; el < 8; el ++ ) {
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del = EleSpec[RSPOpC.rs].B[el];
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@ -562,7 +562,7 @@ void RSP_Vector_VMULF (void) {
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void RSP_Vector_VMULU (void) {
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int el, del;
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VECTOR result;
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VECTOR result = {0};
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for (el = 0; el < 8; el ++ ) {
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del = EleSpec[RSPOpC.rs].B[el];
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@ -582,7 +582,7 @@ void RSP_Vector_VMULU (void) {
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void RSP_Vector_VMUDL (void) {
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int el, del;
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UWORD32 temp;
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VECTOR result;
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VECTOR result = {0};
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for (el = 0; el < 8; el ++ ) {
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del = EleSpec[RSPOpC.rs].B[el];
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@ -598,7 +598,7 @@ void RSP_Vector_VMUDL (void) {
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void RSP_Vector_VMUDM (void) {
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int el, del;
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UWORD32 temp;
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VECTOR result;
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VECTOR result = {0};
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for (el = 0; el < 8; el ++ ) {
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del = EleSpec[RSPOpC.rs].B[el];
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@ -619,7 +619,7 @@ void RSP_Vector_VMUDM (void) {
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void RSP_Vector_VMUDN (void) {
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int el, del;
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UWORD32 temp;
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VECTOR result;
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VECTOR result = {0};
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for (el = 0; el < 8; el ++ ) {
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del = EleSpec[RSPOpC.rs].B[el];
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@ -639,7 +639,7 @@ void RSP_Vector_VMUDN (void) {
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void RSP_Vector_VMUDH (void) {
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int el, del;
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VECTOR result;
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VECTOR result = {0};
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for (el = 0; el < 8; el ++ ) {
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del = EleSpec[RSPOpC.rs].B[el];
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@ -674,7 +674,7 @@ void RSP_Vector_VMUDH (void) {
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void RSP_Vector_VMACF (void) {
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int el, del;
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UWORD32 temp;
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VECTOR result;
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VECTOR result = {0};
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for (el = 0; el < 8; el ++ ) {
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del = EleSpec[RSPOpC.rs].B[el];
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@ -717,13 +717,13 @@ void RSP_Vector_VMACF (void) {
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void RSP_Vector_VMACU (void) {
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int el, del;
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UWORD32 temp, temp2;
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VECTOR result;
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VECTOR result = {0};
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for (el = 0; el < 8; el ++ ) {
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del = EleSpec[RSPOpC.rs].B[el];
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temp.W = (long)RSP_Vect[RSPOpC.rd].HW[el] * (long)(DWORD)RSP_Vect[RSPOpC.rt].HW[del];
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RSP_ACCUM[el].UHW[3] += (WORD)(temp.W >> 31);
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RSP_ACCUM[el].UHW[3] = (RSP_ACCUM[el].UHW[3] + (WORD)(temp.W >> 31)) & 0xFFFF;
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temp.UW = temp.UW << 1;
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temp2.UW = temp.UHW[0] + RSP_ACCUM[el].UHW[1];
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RSP_ACCUM[el].HW[1] = temp2.HW[0];
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@ -750,7 +750,7 @@ void RSP_Vector_VMACU (void) {
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void RSP_Vector_VMACQ (void) {
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int el, del;
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UWORD32 temp;
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VECTOR result;
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VECTOR result = {0};
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for (el = 0; el < 8; el ++ ) {
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del = EleSpec[RSPOpC.rs].B[el];
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@ -793,7 +793,7 @@ void RSP_Vector_VMACQ (void) {
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void RSP_Vector_VMADL (void) {
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int el, del;
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UWORD32 temp, temp2;
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VECTOR result;
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VECTOR result = {0};
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for (el = 0; el < 8; el ++ ) {
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del = EleSpec[RSPOpC.rs].B[el];
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@ -832,7 +832,7 @@ void RSP_Vector_VMADL (void) {
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void RSP_Vector_VMADM (void) {
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int el, del;
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UWORD32 temp, temp2;
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VECTOR result;
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VECTOR result = {0};
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for (el = 0; el < 8; el ++ ) {
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del = EleSpec[RSPOpC.rs].B[el];
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@ -875,7 +875,7 @@ void RSP_Vector_VMADM (void) {
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void RSP_Vector_VMADN (void) {
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int el, del;
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UWORD32 temp, temp2;
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VECTOR result;
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VECTOR result = {0};
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for (el = 0; el < 8; el ++ ) {
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del = EleSpec[RSPOpC.rs].B[el];
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@ -916,7 +916,7 @@ void RSP_Vector_VMADN (void) {
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void RSP_Vector_VMADH (void) {
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int el, del;
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VECTOR result;
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VECTOR result = {0};
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for (el = 0; el < 8; el ++ ) {
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del = EleSpec[RSPOpC.rs].B[el];
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@ -950,7 +950,7 @@ void RSP_Vector_VMADH (void) {
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void RSP_Vector_VADD (void) {
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int el, del;
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UWORD32 temp;
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VECTOR result;
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VECTOR result = {0};
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for ( el = 0; el < 8; el++ ) {
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del = EleSpec[RSPOpC.rs].B[el];
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@ -979,7 +979,7 @@ void RSP_Vector_VADD (void) {
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void RSP_Vector_VSUB (void) {
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int el, del;
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UWORD32 temp;
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VECTOR result;
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VECTOR result = {0};
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for ( el = 0; el < 8; el++ ) {
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del = EleSpec[RSPOpC.rs].B[el];
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@ -1007,7 +1007,7 @@ void RSP_Vector_VSUB (void) {
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void RSP_Vector_VABS (void) {
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int el, del;
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VECTOR result;
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VECTOR result = {0};
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for ( el = 0; el < 8; el++ ) {
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del = EleSpec[RSPOpC.rs].B[el];
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@ -1031,7 +1031,7 @@ void RSP_Vector_VABS (void) {
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void RSP_Vector_VADDC (void) {
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int el, del;
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UWORD32 temp;
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VECTOR result;
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VECTOR result = {0};
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RSP_Flags[0].UW = 0;
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for ( el = 0; el < 8; el++ ) {
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@ -1050,7 +1050,7 @@ void RSP_Vector_VADDC (void) {
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void RSP_Vector_VSUBC (void) {
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int el, del;
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UWORD32 temp;
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VECTOR result;
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VECTOR result = {0};
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RSP_Flags[0].UW = 0x0;
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for ( el = 0; el < 8; el++ ) {
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@ -1112,7 +1112,7 @@ void RSP_Vector_VSAW (void) {
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void RSP_Vector_VLT (void) {
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int el, del;
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VECTOR result;
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VECTOR result = {0};
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RSP_Flags[1].UW = 0;
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for ( el = 0; el < 8; el++ ) {
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@ -1140,7 +1140,7 @@ void RSP_Vector_VLT (void) {
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void RSP_Vector_VEQ (void) {
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int el, del;
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VECTOR result;
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VECTOR result = {0};
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RSP_Flags[1].UW = 0;
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for ( el = 0; el < 8; el++ ) {
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@ -1160,7 +1160,7 @@ void RSP_Vector_VEQ (void) {
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void RSP_Vector_VNE (void) {
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int el, del;
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VECTOR result;
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VECTOR result = {0};
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RSP_Flags[1].UW = 0;
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for ( el = 0; el < 8; el++ ) {
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@ -1182,7 +1182,7 @@ void RSP_Vector_VNE (void) {
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void RSP_Vector_VGE (void) {
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int el, del;
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VECTOR result;
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VECTOR result = {0};
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RSP_Flags[1].UW = 0;
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for ( el = 0; el < 8; el++ ) {
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@ -1210,7 +1210,7 @@ void RSP_Vector_VGE (void) {
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void RSP_Vector_VCL (void) {
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int el, del;
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VECTOR result;
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VECTOR result = {0};
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for (el = 0;el < 8; el++) {
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del = EleSpec[RSPOpC.rs].B[el];
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@ -1267,7 +1267,7 @@ void RSP_Vector_VCL (void) {
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void RSP_Vector_VCH (void) {
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int el, del;
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VECTOR result;
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VECTOR result = {0};
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RSP_Flags[0].UW = 0;
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RSP_Flags[1].UW = 0;
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@ -1319,7 +1319,7 @@ void RSP_Vector_VCH (void) {
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void RSP_Vector_VCR (void) {
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int el, del;
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VECTOR result;
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VECTOR result = {0};
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RSP_Flags[0].UW = 0;
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RSP_Flags[1].UW = 0;
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@ -1355,7 +1355,7 @@ void RSP_Vector_VCR (void) {
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void RSP_Vector_VMRG (void) {
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int el, del;
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VECTOR result;
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VECTOR result = {0};
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for ( el = 0; el < 8; el ++ ){
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del = EleSpec[RSPOpC.rs].B[el];
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@ -1372,7 +1372,7 @@ void RSP_Vector_VMRG (void) {
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void RSP_Vector_VAND (void) {
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int el, del;
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VECTOR result;
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VECTOR result = {0};
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for ( el = 0; el < 8; el ++ ){
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del = EleSpec[RSPOpC.rs].B[el];
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@ -1384,7 +1384,7 @@ void RSP_Vector_VAND (void) {
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void RSP_Vector_VNAND (void) {
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int el, del;
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VECTOR result;
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VECTOR result = {0};
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for ( el = 0; el < 8; el ++ ){
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del = EleSpec[RSPOpC.rs].B[el];
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@ -1396,7 +1396,7 @@ void RSP_Vector_VNAND (void) {
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void RSP_Vector_VOR (void) {
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int el, del;
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VECTOR result;
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VECTOR result = {0};
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for ( el = 0; el < 8; el ++ ){
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del = EleSpec[RSPOpC.rs].B[el];
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@ -1408,7 +1408,7 @@ void RSP_Vector_VOR (void) {
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void RSP_Vector_VNOR (void) {
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int el, del;
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VECTOR result;
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VECTOR result = {0};
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for ( el = 0; el < 8; el ++ ){
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del = EleSpec[RSPOpC.rs].B[el];
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@ -1420,7 +1420,7 @@ void RSP_Vector_VNOR (void) {
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void RSP_Vector_VXOR (void) {
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int el, del;
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VECTOR result;
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VECTOR result = {0};
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for ( el = 0; el < 8; el ++ ){
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del = EleSpec[RSPOpC.rs].B[el];
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@ -1432,7 +1432,7 @@ void RSP_Vector_VXOR (void) {
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void RSP_Vector_VNXOR (void) {
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int el, del;
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VECTOR result;
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VECTOR result = {0};
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for ( el = 0; el < 8; el ++ ){
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del = EleSpec[RSPOpC.rs].B[el];
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@ -167,7 +167,7 @@ __declspec(dllexport) void DllAbout ( HWND hParent ) {
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MessageBox(hParent,AboutMsg(),"About",MB_OK | MB_ICONINFORMATION );
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}
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BOOL WINAPI DllMain( HINSTANCE hinst, DWORD fdwReason, LPVOID lpvReserved ){
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BOOL WINAPI DllMain( HINSTANCE hinst, DWORD /*fdwReason*/, LPVOID /*lpvReserved*/ ){
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hinstDLL = hinst;
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if (strcmp(VersionInfo(VERSION_INTERNAL_NAME).c_str(),"Project64") != 0)
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{
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@ -509,7 +509,7 @@ static BOOL GetBooleanCheck(HWND hDlg, DWORD DialogID) {
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return (IsDlgButtonChecked(hDlg, DialogID) == BST_CHECKED) ? TRUE : FALSE;
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}
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BOOL CALLBACK CompilerDlgProc(HWND hDlg, UINT uMsg, WPARAM wParam, LPARAM lParam) {
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BOOL CALLBACK CompilerDlgProc(HWND hDlg, UINT uMsg, WPARAM wParam, LPARAM /*lParam*/) {
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char Buffer[256];
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switch (uMsg) {
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@ -588,7 +588,7 @@ BOOL CALLBACK CompilerDlgProc(HWND hDlg, UINT uMsg, WPARAM wParam, LPARAM lParam
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return TRUE;
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}
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BOOL CALLBACK ConfigDlgProc(HWND hDlg, UINT uMsg, WPARAM wParam, LPARAM lParam) {
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BOOL CALLBACK ConfigDlgProc(HWND hDlg, UINT uMsg, WPARAM wParam, LPARAM /*lParam*/) {
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HWND hWndItem;
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DWORD value;
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@ -728,7 +728,7 @@ __declspec(dllexport) void PluginLoaded (void)
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SetCPU(CPUCore);
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}
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void UseUnregisteredSetting (int SettingID)
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void UseUnregisteredSetting (int /*SettingID*/)
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{
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_asm int 3
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}
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@ -79,7 +79,7 @@ void MmxMoveRegToReg(int Dest, int Source) {
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}
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void MmxMoveQwordVariableToReg(int Dest, void *Variable, char *VariableName) {
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BYTE x86Command;
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BYTE x86Command = 0;
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CPU_Message(" movq %s, qword ptr [%s]",mmx_Name(Dest), VariableName);
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@ -100,7 +100,7 @@ void MmxMoveQwordVariableToReg(int Dest, void *Variable, char *VariableName) {
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}
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void MmxMoveQwordRegToVariable(int Dest, void *Variable, char *VariableName) {
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BYTE x86Command;
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BYTE x86Command = 0;
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CPU_Message(" movq qword ptr [%s], %s", VariableName, mmx_Name(Dest));
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@ -121,7 +121,7 @@ void MmxMoveQwordRegToVariable(int Dest, void *Variable, char *VariableName) {
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}
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void MmxPorRegToReg(int Dest, int Source) {
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BYTE x86Command;
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BYTE x86Command = 0;
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CPU_Message(" por %s, %s", mmx_Name(Dest), mmx_Name(Source));
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@ -150,7 +150,7 @@ void MmxPorRegToReg(int Dest, int Source) {
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}
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void MmxPorVariableToReg(void * Variable, char * VariableName, int Dest) {
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BYTE x86Command;
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BYTE x86Command = 0;
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CPU_Message(" por %s, qword ptr [%s]",mmx_Name(Dest), VariableName);
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@ -171,7 +171,7 @@ void MmxPorVariableToReg(void * Variable, char * VariableName, int Dest) {
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}
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void MmxPandRegToReg(int Dest, int Source) {
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BYTE x86Command;
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BYTE x86Command = 0;
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CPU_Message(" pand %s, %s", mmx_Name(Dest), mmx_Name(Source));
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@ -200,7 +200,7 @@ void MmxPandRegToReg(int Dest, int Source) {
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}
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void MmxPandVariableToReg(void * Variable, char * VariableName, int Dest) {
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BYTE x86Command;
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BYTE x86Command = 0;
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CPU_Message(" pand %s, qword ptr [%s]",mmx_Name(Dest), VariableName);
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@ -221,7 +221,7 @@ void MmxPandVariableToReg(void * Variable, char * VariableName, int Dest) {
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}
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void MmxPandnRegToReg(int Dest, int Source) {
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BYTE x86Command;
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BYTE x86Command = 0;
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CPU_Message(" pandn %s, %s", mmx_Name(Dest), mmx_Name(Source));
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@ -250,7 +250,7 @@ void MmxPandnRegToReg(int Dest, int Source) {
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}
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void MmxXorRegToReg(int Dest, int Source) {
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BYTE x86Command;
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BYTE x86Command = 0;
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CPU_Message(" pxor %s, %s", mmx_Name(Dest), mmx_Name(Source));
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@ -279,7 +279,7 @@ void MmxXorRegToReg(int Dest, int Source) {
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}
|
||||
|
||||
void MmxShuffleMemoryToReg(int Dest, void * Variable, char * VariableName, BYTE Immed) {
|
||||
BYTE x86Command;
|
||||
BYTE x86Command = 0;
|
||||
|
||||
CPU_Message(" pshufw %s, [%s], %02X", mmx_Name(Dest), VariableName, Immed);
|
||||
|
||||
|
|
@ -301,7 +301,7 @@ void MmxShuffleMemoryToReg(int Dest, void * Variable, char * VariableName, BYTE
|
|||
}
|
||||
|
||||
void MmxPcmpeqwRegToReg(int Dest, int Source){
|
||||
BYTE x86Command;
|
||||
BYTE x86Command = 0;
|
||||
|
||||
CPU_Message(" pcmpeqw %s, %s", mmx_Name(Dest), mmx_Name(Source));
|
||||
|
||||
|
|
@ -330,7 +330,7 @@ void MmxPcmpeqwRegToReg(int Dest, int Source){
|
|||
}
|
||||
|
||||
void MmxPmullwRegToReg(int Dest, int Source) {
|
||||
BYTE x86Command;
|
||||
BYTE x86Command = 0;
|
||||
|
||||
CPU_Message(" pmullw %s, %s", mmx_Name(Dest), mmx_Name(Source));
|
||||
|
||||
|
|
@ -359,7 +359,7 @@ void MmxPmullwRegToReg(int Dest, int Source) {
|
|||
}
|
||||
|
||||
void MmxPmullwVariableToReg(int Dest, void * Variable, char * VariableName) {
|
||||
BYTE x86Command;
|
||||
BYTE x86Command = 0;
|
||||
|
||||
CPU_Message(" pmullw %s, [%s]", mmx_Name(Dest), VariableName);
|
||||
|
||||
|
|
@ -379,7 +379,7 @@ void MmxPmullwVariableToReg(int Dest, void * Variable, char * VariableName) {
|
|||
}
|
||||
|
||||
void MmxPmulhuwRegToReg(int Dest, int Source) {
|
||||
BYTE x86Command;
|
||||
BYTE x86Command = 0;
|
||||
|
||||
CPU_Message(" pmulhuw %s, %s", mmx_Name(Dest), mmx_Name(Source));
|
||||
|
||||
|
|
@ -408,7 +408,7 @@ void MmxPmulhuwRegToReg(int Dest, int Source) {
|
|||
}
|
||||
|
||||
void MmxPmulhwRegToReg(int Dest, int Source) {
|
||||
BYTE x86Command;
|
||||
BYTE x86Command = 0;
|
||||
|
||||
CPU_Message(" pmulhw %s, %s", mmx_Name(Dest), mmx_Name(Source));
|
||||
|
||||
|
|
@ -437,7 +437,7 @@ void MmxPmulhwRegToReg(int Dest, int Source) {
|
|||
}
|
||||
|
||||
void MmxPmulhwRegToVariable(int Dest, void * Variable, char * VariableName) {
|
||||
BYTE x86Command;
|
||||
BYTE x86Command = 0;
|
||||
|
||||
CPU_Message(" pmulhw %s, [%s]", mmx_Name(Dest), VariableName);
|
||||
|
||||
|
|
@ -458,7 +458,7 @@ void MmxPmulhwRegToVariable(int Dest, void * Variable, char * VariableName) {
|
|||
|
||||
|
||||
void MmxPsrlwImmed(int Dest, BYTE Immed) {
|
||||
BYTE x86Command;
|
||||
BYTE x86Command = 0;
|
||||
|
||||
CPU_Message(" psrlw %s, %i", mmx_Name(Dest), Immed);
|
||||
|
||||
|
|
@ -479,7 +479,7 @@ void MmxPsrlwImmed(int Dest, BYTE Immed) {
|
|||
}
|
||||
|
||||
void MmxPsrawImmed(int Dest, BYTE Immed) {
|
||||
BYTE x86Command;
|
||||
BYTE x86Command = 0;
|
||||
|
||||
CPU_Message(" psraw %s, %i", mmx_Name(Dest), Immed);
|
||||
|
||||
|
|
@ -500,7 +500,7 @@ void MmxPsrawImmed(int Dest, BYTE Immed) {
|
|||
}
|
||||
|
||||
void MmxPsllwImmed(int Dest, BYTE Immed) {
|
||||
BYTE x86Command;
|
||||
BYTE x86Command = 0;
|
||||
|
||||
CPU_Message(" psllw %s, %i", mmx_Name(Dest), Immed);
|
||||
|
||||
|
|
@ -521,7 +521,7 @@ void MmxPsllwImmed(int Dest, BYTE Immed) {
|
|||
}
|
||||
|
||||
void MmxPaddswRegToReg(int Dest, int Source) {
|
||||
BYTE x86Command;
|
||||
BYTE x86Command = 0;
|
||||
|
||||
CPU_Message(" paddsw %s, %s", mmx_Name(Dest), mmx_Name(Source));
|
||||
|
||||
|
|
@ -550,7 +550,7 @@ void MmxPaddswRegToReg(int Dest, int Source) {
|
|||
}
|
||||
|
||||
void MmxPsubswRegToReg(int Dest, int Source) {
|
||||
BYTE x86Command;
|
||||
BYTE x86Command = 0;
|
||||
|
||||
CPU_Message(" psubsw %s, %s", mmx_Name(Dest), mmx_Name(Source));
|
||||
|
||||
|
|
@ -579,7 +579,7 @@ void MmxPsubswRegToReg(int Dest, int Source) {
|
|||
}
|
||||
|
||||
void MmxPaddswVariableToReg(int Dest, void * Variable, char * VariableName) {
|
||||
BYTE x86Command;
|
||||
BYTE x86Command = 0;
|
||||
|
||||
CPU_Message(" paddsw %s, [%s]", mmx_Name(Dest), VariableName);
|
||||
|
||||
|
|
@ -600,7 +600,7 @@ void MmxPaddswVariableToReg(int Dest, void * Variable, char * VariableName) {
|
|||
}
|
||||
|
||||
void MmxPsubswVariableToReg(int Dest, void * Variable, char * VariableName) {
|
||||
BYTE x86Command;
|
||||
BYTE x86Command = 0;
|
||||
|
||||
CPU_Message(" psubsw %s, [%s]", mmx_Name(Dest), VariableName);
|
||||
|
||||
|
|
@ -621,7 +621,7 @@ void MmxPsubswVariableToReg(int Dest, void * Variable, char * VariableName) {
|
|||
}
|
||||
|
||||
void MmxPaddwRegToReg(int Dest, int Source) {
|
||||
BYTE x86Command;
|
||||
BYTE x86Command = 0;
|
||||
|
||||
CPU_Message(" paddw %s, %s", mmx_Name(Dest), mmx_Name(Source));
|
||||
|
||||
|
|
@ -650,7 +650,7 @@ void MmxPaddwRegToReg(int Dest, int Source) {
|
|||
}
|
||||
|
||||
void MmxPackSignedDwords(int Dest, int Source) {
|
||||
BYTE x86Command;
|
||||
BYTE x86Command = 0;
|
||||
|
||||
CPU_Message(" packssdw %s, %s", mmx_Name(Dest), mmx_Name(Source));
|
||||
|
||||
|
|
@ -679,7 +679,7 @@ void MmxPackSignedDwords(int Dest, int Source) {
|
|||
}
|
||||
|
||||
void MmxUnpackLowWord(int Dest, int Source) {
|
||||
BYTE x86Command;
|
||||
BYTE x86Command = 0;
|
||||
|
||||
CPU_Message(" punpcklwd %s, %s", mmx_Name(Dest), mmx_Name(Source));
|
||||
|
||||
|
|
@ -708,7 +708,7 @@ void MmxUnpackLowWord(int Dest, int Source) {
|
|||
}
|
||||
|
||||
void MmxUnpackHighWord(int Dest, int Source) {
|
||||
BYTE x86Command;
|
||||
BYTE x86Command = 0;
|
||||
|
||||
CPU_Message(" punpckhwd %s, %s", mmx_Name(Dest), mmx_Name(Source));
|
||||
|
||||
|
|
@ -737,7 +737,7 @@ void MmxUnpackHighWord(int Dest, int Source) {
|
|||
}
|
||||
|
||||
void MmxCompareGreaterWordRegToReg(int Dest, int Source) {
|
||||
BYTE x86Command;
|
||||
BYTE x86Command = 0;
|
||||
|
||||
CPU_Message(" pcmpgtw %s, %s", mmx_Name(Dest), mmx_Name(Source));
|
||||
|
||||
|
|
|
|||
|
|
@ -23,12 +23,12 @@
|
|||
* should be forwarded to them so if they want them.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef __OpCode
|
||||
#define __OpCode
|
||||
|
||||
#pragma once
|
||||
#include "Types.h"
|
||||
|
||||
#pragma warning(push)
|
||||
#pragma warning(disable : 4201) // nonstandard extension used : nameless struct/union
|
||||
|
||||
typedef union tagOPCODE {
|
||||
unsigned long Hex;
|
||||
unsigned char Ascii[4];
|
||||
|
|
@ -71,6 +71,8 @@ typedef union tagOPCODE {
|
|||
};
|
||||
} OPCODE;
|
||||
|
||||
#pragma warning(pop)
|
||||
|
||||
//RSP OpCodes
|
||||
#define RSP_SPECIAL 0
|
||||
#define RSP_REGIMM 1
|
||||
|
|
@ -197,4 +199,3 @@ typedef union tagOPCODE {
|
|||
#define RSP_LSC2_FV 9
|
||||
#define RSP_LSC2_WV 10
|
||||
#define RSP_LSC2_TV 11
|
||||
#endif
|
||||
|
|
@ -154,7 +154,7 @@ public:
|
|||
if (CpuUsage <= 0.2) { continue; }
|
||||
sprintf(Buffer,"Func 0x%08X",ItemList[count]->first);
|
||||
for (int NameID = 0; NameID < (sizeof(TimerNames) / sizeof(TIMER_NAME)); NameID++) {
|
||||
if (ItemList[count]->first == TimerNames[NameID].Timer) {
|
||||
if (ItemList[count]->first == (DWORD)TimerNames[NameID].Timer) {
|
||||
strcpy(Buffer,TimerNames[NameID].Name);
|
||||
break;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -222,7 +222,7 @@ void DumpRSPData (void) {
|
|||
void DrawRSPCommand ( LPARAM lParam ) {
|
||||
char Command[150], Offset[30], Instruction[30], Arguments[40];
|
||||
LPDRAWITEMSTRUCT ditem;
|
||||
COLORREF oldColor;
|
||||
COLORREF oldColor = {0};
|
||||
int ResetColor;
|
||||
HBRUSH hBrush;
|
||||
RECT TextRect;
|
||||
|
|
@ -699,15 +699,15 @@ void RSP_Commands_Setup ( HWND hDlg ) {
|
|||
//}
|
||||
SetWindowText(hDlg,"RSP Commands");
|
||||
|
||||
SetWindowPos(hDlg,NULL,X,Y,WindowWidth,WindowHeight, SWP_NOZORDER |
|
||||
SWP_SHOWWINDOW);
|
||||
|
||||
SetWindowPos(hDlg,NULL,X,Y,WindowWidth,WindowHeight, SWP_NOZORDER | SWP_SHOWWINDOW);
|
||||
}
|
||||
|
||||
char * RSPSpecialName ( DWORD OpCode, DWORD PC ) {
|
||||
OPCODE command;
|
||||
command.Hex = OpCode;
|
||||
|
||||
|
||||
PC = PC; // unused
|
||||
|
||||
switch (command.funct) {
|
||||
case RSP_SPECIAL_SLL:
|
||||
if (command.rd != 0) {
|
||||
|
|
@ -828,6 +828,9 @@ char * RSPRegimmName ( DWORD OpCode, DWORD PC ) {
|
|||
char * RSPCop0Name ( DWORD OpCode, DWORD PC ) {
|
||||
OPCODE command;
|
||||
command.Hex = OpCode;
|
||||
|
||||
PC = PC; // unused
|
||||
|
||||
switch (command.rs) {
|
||||
case RSP_COP0_MF:
|
||||
sprintf(CommandName,"MFC0\t%s, %s",GPR_Name(command.rt),COP0_Name(command.rd));
|
||||
|
|
@ -845,6 +848,8 @@ char * RSPCop0Name ( DWORD OpCode, DWORD PC ) {
|
|||
char * RSPCop2Name ( DWORD OpCode, DWORD PC ) {
|
||||
OPCODE command;
|
||||
command.Hex = OpCode;
|
||||
|
||||
PC = PC; // unused
|
||||
|
||||
if ( ( command.rs & 0x10 ) == 0 ) {
|
||||
switch (command.rs) {
|
||||
|
|
@ -1057,6 +1062,8 @@ char * RSPLc2Name ( DWORD OpCode, DWORD PC ) {
|
|||
OPCODE command;
|
||||
command.Hex = OpCode;
|
||||
|
||||
PC = PC; // unused
|
||||
|
||||
switch (command.rd) {
|
||||
case RSP_LSC2_BV:
|
||||
sprintf(CommandName,"LBV\t$v%d [%d], 0x%04X (%s)",command.rt, command.del,
|
||||
|
|
@ -1117,6 +1124,8 @@ char * RSPSc2Name ( DWORD OpCode, DWORD PC ) {
|
|||
OPCODE command;
|
||||
command.Hex = OpCode;
|
||||
|
||||
PC = PC; // unused
|
||||
|
||||
switch (command.rd) {
|
||||
case RSP_LSC2_BV:
|
||||
sprintf(CommandName,"SBV\t$v%d [%d], 0x%04X (%s)",command.rt, command.del,
|
||||
|
|
|
|||
|
|
@ -135,7 +135,6 @@ DWORD WriteToAccum2 (int Location, int PC, BOOL RecursiveCall) {
|
|||
OPCODE RspOp;
|
||||
DWORD BranchTarget = 0;
|
||||
signed int BranchImmed = 0;
|
||||
DWORD JumpTarget = 0;
|
||||
int Instruction_State = NextInstruction;
|
||||
|
||||
if (Compiler.bAccum == FALSE) return TRUE;
|
||||
|
|
@ -434,7 +433,6 @@ BOOL WriteToVectorDest2 (DWORD DestReg, int PC, BOOL RecursiveCall) {
|
|||
OPCODE RspOp;
|
||||
DWORD BranchTarget = 0;
|
||||
signed int BranchImmed = 0;
|
||||
DWORD JumpTarget = 0;
|
||||
|
||||
int Instruction_State = NextInstruction;
|
||||
|
||||
|
|
@ -1137,6 +1135,9 @@ BOOL IsRegisterConstant (DWORD Reg, DWORD * Constant) {
|
|||
*************************************************************/
|
||||
|
||||
BOOL IsOpcodeBranch(DWORD PC, OPCODE RspOp) {
|
||||
|
||||
PC = PC; // unused
|
||||
|
||||
switch (RspOp.op) {
|
||||
case RSP_REGIMM:
|
||||
switch (RspOp.rt) {
|
||||
|
|
@ -1253,6 +1254,9 @@ BOOL IsOpcodeBranch(DWORD PC, OPCODE RspOp) {
|
|||
|
||||
#define InvalidOpcode 0x0040
|
||||
|
||||
#pragma warning(push)
|
||||
#pragma warning(disable : 4201) // nonstandard extension used : nameless struct/union
|
||||
|
||||
typedef struct {
|
||||
union {
|
||||
DWORD DestReg;
|
||||
|
|
@ -1266,6 +1270,8 @@ typedef struct {
|
|||
DWORD flags;
|
||||
} OPCODE_INFO;
|
||||
|
||||
#pragma warning(pop)
|
||||
|
||||
void GetInstructionInfo(DWORD PC, OPCODE * RspOp, OPCODE_INFO * info) {
|
||||
switch (RspOp->op) {
|
||||
case RSP_REGIMM:
|
||||
|
|
@ -1276,7 +1282,7 @@ void GetInstructionInfo(DWORD PC, OPCODE * RspOp, OPCODE_INFO * info) {
|
|||
case RSP_REGIMM_BGEZAL:
|
||||
info->flags = InvalidOpcode;
|
||||
info->SourceReg0 = RspOp->rs;
|
||||
info->SourceReg1 = -1;
|
||||
info->SourceReg1 = (DWORD)-1;
|
||||
break;
|
||||
|
||||
default:
|
||||
|
|
@ -1288,9 +1294,9 @@ void GetInstructionInfo(DWORD PC, OPCODE * RspOp, OPCODE_INFO * info) {
|
|||
case RSP_SPECIAL:
|
||||
switch (RspOp->funct) {
|
||||
case RSP_SPECIAL_BREAK:
|
||||
info->DestReg = -1;
|
||||
info->SourceReg0 = -1;
|
||||
info->SourceReg1 = -1;
|
||||
info->DestReg = (DWORD)-1;
|
||||
info->SourceReg0 = (DWORD)-1;
|
||||
info->SourceReg1 = (DWORD)-1;
|
||||
info->flags = GPR_Instruction;
|
||||
break;
|
||||
|
||||
|
|
@ -1299,7 +1305,7 @@ void GetInstructionInfo(DWORD PC, OPCODE * RspOp, OPCODE_INFO * info) {
|
|||
case RSP_SPECIAL_SRA:
|
||||
info->DestReg = RspOp->rd;
|
||||
info->SourceReg0 = RspOp->rt;
|
||||
info->SourceReg1 = -1;
|
||||
info->SourceReg1 = (DWORD)-1;
|
||||
info->flags = GPR_Instruction;
|
||||
break;
|
||||
case RSP_SPECIAL_SLLV:
|
||||
|
|
@ -1323,8 +1329,8 @@ void GetInstructionInfo(DWORD PC, OPCODE * RspOp, OPCODE_INFO * info) {
|
|||
|
||||
case RSP_SPECIAL_JR:
|
||||
info->flags = InvalidOpcode;
|
||||
info->SourceReg0 = -1;
|
||||
info->SourceReg1 = -1;
|
||||
info->SourceReg0 = (DWORD)-1;
|
||||
info->SourceReg1 = (DWORD)-1;
|
||||
break;
|
||||
|
||||
default:
|
||||
|
|
@ -1336,8 +1342,8 @@ void GetInstructionInfo(DWORD PC, OPCODE * RspOp, OPCODE_INFO * info) {
|
|||
case RSP_J:
|
||||
case RSP_JAL:
|
||||
info->flags = InvalidOpcode;
|
||||
info->SourceReg0 = -1;
|
||||
info->SourceReg1 = -1;
|
||||
info->SourceReg0 = (DWORD)-1;
|
||||
info->SourceReg1 = (DWORD)-1;
|
||||
break;
|
||||
case RSP_BEQ:
|
||||
case RSP_BNE:
|
||||
|
|
@ -1349,7 +1355,7 @@ void GetInstructionInfo(DWORD PC, OPCODE * RspOp, OPCODE_INFO * info) {
|
|||
case RSP_BGTZ:
|
||||
info->flags = InvalidOpcode;
|
||||
info->SourceReg0 = RspOp->rs;
|
||||
info->SourceReg1 = -1;
|
||||
info->SourceReg1 = (DWORD)-1;
|
||||
break;
|
||||
|
||||
case RSP_ADDI:
|
||||
|
|
@ -1361,14 +1367,14 @@ void GetInstructionInfo(DWORD PC, OPCODE * RspOp, OPCODE_INFO * info) {
|
|||
case RSP_XORI:
|
||||
info->DestReg = RspOp->rt;
|
||||
info->SourceReg0 = RspOp->rs;
|
||||
info->SourceReg1 = -1;
|
||||
info->SourceReg1 = (DWORD)-1;
|
||||
info->flags = GPR_Instruction;
|
||||
break;
|
||||
|
||||
case RSP_LUI:
|
||||
info->DestReg = RspOp->rt;
|
||||
info->SourceReg0 = -1;
|
||||
info->SourceReg1 = -1;
|
||||
info->SourceReg0 = (DWORD)-1;
|
||||
info->SourceReg1 = (DWORD)-1;
|
||||
info->flags = GPR_Instruction;
|
||||
break;
|
||||
|
||||
|
|
@ -1376,15 +1382,15 @@ void GetInstructionInfo(DWORD PC, OPCODE * RspOp, OPCODE_INFO * info) {
|
|||
switch (RspOp->rs) {
|
||||
case RSP_COP0_MF:
|
||||
info->DestReg = RspOp->rt;
|
||||
info->SourceReg0 = -1;
|
||||
info->SourceReg1 = -1;
|
||||
info->SourceReg0 = (DWORD)-1;
|
||||
info->SourceReg1 = (DWORD)-1;
|
||||
info->flags = COPO_MF_Instruction | GPR_Instruction | Load_Operation;
|
||||
break;
|
||||
|
||||
case RSP_COP0_MT:
|
||||
info->StoredReg = RspOp->rt;
|
||||
info->SourceReg0 = -1;
|
||||
info->SourceReg1 = -1;
|
||||
info->SourceReg0 = (DWORD)-1;
|
||||
info->SourceReg1 = (DWORD)-1;
|
||||
info->flags = GPR_Instruction | Store_Operation;
|
||||
break;
|
||||
}
|
||||
|
|
@ -1394,9 +1400,9 @@ void GetInstructionInfo(DWORD PC, OPCODE * RspOp, OPCODE_INFO * info) {
|
|||
if ((RspOp->rs & 0x10) != 0) {
|
||||
switch (RspOp->funct) {
|
||||
case RSP_VECTOR_VNOOP:
|
||||
info->DestReg = -1;
|
||||
info->SourceReg0 = -1;
|
||||
info->SourceReg1 = -1;
|
||||
info->DestReg = (DWORD)-1;
|
||||
info->SourceReg0 = (DWORD)-1;
|
||||
info->SourceReg1 = (DWORD)-1;
|
||||
info->flags = VEC_Instruction;
|
||||
break;
|
||||
|
||||
|
|
@ -1466,8 +1472,8 @@ void GetInstructionInfo(DWORD PC, OPCODE * RspOp, OPCODE_INFO * info) {
|
|||
case RSP_VECTOR_VSAW:
|
||||
// info->flags = InvalidOpcode;
|
||||
info->DestReg = RspOp->sa;
|
||||
info->SourceReg0 = -1;
|
||||
info->SourceReg1 = -1;
|
||||
info->SourceReg0 = (DWORD)-1;
|
||||
info->SourceReg1 = (DWORD)-1;
|
||||
info->flags = VEC_Instruction | Accum_Operation | VEC_Accumulate;
|
||||
break;
|
||||
|
||||
|
|
@ -1480,14 +1486,14 @@ void GetInstructionInfo(DWORD PC, OPCODE * RspOp, OPCODE_INFO * info) {
|
|||
switch (RspOp->rs) {
|
||||
case RSP_COP2_CT:
|
||||
info->StoredReg = RspOp->rt;
|
||||
info->SourceReg0 = -1;
|
||||
info->SourceReg1 = -1;
|
||||
info->SourceReg0 = (DWORD)-1;
|
||||
info->SourceReg1 = (DWORD)-1;
|
||||
info->flags = GPR_Instruction | Store_Operation | Flag_Instruction;
|
||||
break;
|
||||
case RSP_COP2_CF:
|
||||
info->DestReg = RspOp->rt;
|
||||
info->SourceReg0 = -1;
|
||||
info->SourceReg1 = -1;
|
||||
info->SourceReg0 = (DWORD)-1;
|
||||
info->SourceReg1 = (DWORD)-1;
|
||||
info->flags = GPR_Instruction | Load_Operation | Flag_Instruction;
|
||||
break;
|
||||
|
||||
|
|
@ -1495,13 +1501,13 @@ void GetInstructionInfo(DWORD PC, OPCODE * RspOp, OPCODE_INFO * info) {
|
|||
case RSP_COP2_MT:
|
||||
info->DestReg = RspOp->rd;
|
||||
info->SourceReg0 = RspOp->rt;
|
||||
info->SourceReg1 = -1;
|
||||
info->SourceReg1 = (DWORD)-1;
|
||||
info->flags = VEC_Instruction | GPR_Instruction | Load_Operation;
|
||||
break;
|
||||
case RSP_COP2_MF:
|
||||
info->DestReg = RspOp->rt;
|
||||
info->SourceReg0 = RspOp->rd;
|
||||
info->SourceReg1 = -1;
|
||||
info->SourceReg1 = (DWORD)-1;
|
||||
info->flags = VEC_Instruction | GPR_Instruction | Store_Operation;
|
||||
break;
|
||||
default:
|
||||
|
|
@ -1518,7 +1524,7 @@ void GetInstructionInfo(DWORD PC, OPCODE * RspOp, OPCODE_INFO * info) {
|
|||
case RSP_LHU:
|
||||
info->DestReg = RspOp->rt;
|
||||
info->IndexReg = RspOp->base;
|
||||
info->SourceReg1 = -1;
|
||||
info->SourceReg1 = (DWORD)-1;
|
||||
info->flags = Load_Operation | GPR_Instruction;
|
||||
break;
|
||||
case RSP_SB:
|
||||
|
|
@ -1526,7 +1532,7 @@ void GetInstructionInfo(DWORD PC, OPCODE * RspOp, OPCODE_INFO * info) {
|
|||
case RSP_SW:
|
||||
info->StoredReg = RspOp->rt;
|
||||
info->IndexReg = RspOp->base;
|
||||
info->SourceReg1 = -1;
|
||||
info->SourceReg1 = (DWORD)-1;
|
||||
info->flags = Store_Operation | GPR_Instruction;
|
||||
break;
|
||||
case RSP_LC2:
|
||||
|
|
@ -1541,7 +1547,7 @@ void GetInstructionInfo(DWORD PC, OPCODE * RspOp, OPCODE_INFO * info) {
|
|||
case RSP_LSC2_PV:
|
||||
info->DestReg = RspOp->rt;
|
||||
info->IndexReg = RspOp->base;
|
||||
info->SourceReg1 = -1;
|
||||
info->SourceReg1 = (DWORD)-1;
|
||||
info->flags = Load_Operation | VEC_Instruction;
|
||||
break;
|
||||
|
||||
|
|
@ -1569,7 +1575,7 @@ void GetInstructionInfo(DWORD PC, OPCODE * RspOp, OPCODE_INFO * info) {
|
|||
case RSP_LSC2_WV:
|
||||
info->DestReg = RspOp->rt;
|
||||
info->IndexReg = RspOp->base;
|
||||
info->SourceReg1 = -1;
|
||||
info->SourceReg1 = (DWORD)-1;
|
||||
info->flags = Store_Operation | VEC_Instruction;
|
||||
break;
|
||||
case RSP_LSC2_TV:
|
||||
|
|
@ -1681,14 +1687,11 @@ BOOL CompareInstructions(DWORD PC, OPCODE * Top, OPCODE * Bottom) {
|
|||
} else if ((info1.flags & MemOperation_Mask) != 0) {
|
||||
/* We have a vector memory operation */
|
||||
return (info1.IndexReg == info0.DestReg) ? FALSE : TRUE;
|
||||
} else {
|
||||
/* We could have memory or normal gpr instruction here
|
||||
** paired with some kind of vector operation
|
||||
*/
|
||||
return TRUE;
|
||||
}
|
||||
return FALSE;
|
||||
|
||||
/* We could have memory or normal gpr instruction here
|
||||
** paired with some kind of vector operation
|
||||
*/
|
||||
return TRUE;
|
||||
case 0x0A: /* Vector than Vector - 10,10 */
|
||||
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -41,6 +41,8 @@
|
|||
#include "Profiling.h"
|
||||
#include "x86.h"
|
||||
|
||||
#pragma warning(disable : 4152) // nonstandard extension, function/data pointer conversion in expression
|
||||
|
||||
/* #define REORDER_BLOCK_VERBOSE */
|
||||
#define LINK_BRANCHES_VERBOSE /* no choice really */
|
||||
#define X86_RECOMP_VERBOSE
|
||||
|
|
@ -899,7 +901,7 @@ DWORD RunRecompilerCPU ( DWORD Cycles ) {
|
|||
|
||||
if (Block == NULL) {
|
||||
if (Profiling && !IndvidualBlock) {
|
||||
StartTimer(Timer_Compiling);
|
||||
StartTimer((DWORD)Timer_Compiling);
|
||||
}
|
||||
|
||||
__try {
|
||||
|
|
|
|||
|
|
@ -39,6 +39,8 @@
|
|||
#include "x86.h"
|
||||
#include "Profiling.h"
|
||||
|
||||
#pragma warning(disable : 4152) // nonstandard extension, function/data pointer conversion in expression
|
||||
|
||||
UWORD32 Recp, RecpResult, SQroot, SQrootResult;
|
||||
DWORD ESP_RegSave = 0, EBP_RegSave = 0;
|
||||
DWORD BranchCompare = 0;
|
||||
|
|
@ -445,7 +447,7 @@ void Compile_ADDI ( void ) {
|
|||
AddConstToVariable(Immediate, &RSP_GPR[RSPOpC.rt].UW, GPR_Name(RSPOpC.rt));
|
||||
} else if (RSPOpC.rs == 0) {
|
||||
MoveConstToVariable(Immediate, &RSP_GPR[RSPOpC.rt].UW, GPR_Name(RSPOpC.rt));
|
||||
} else if (IsRegConst(RSPOpC.rs) && 1) {
|
||||
} else if ((IsRegConst(RSPOpC.rs) && 1) != 0) {
|
||||
MoveConstToVariable(MipsRegConst(RSPOpC.rs) + Immediate, &RSP_GPR[RSPOpC.rt].UW, GPR_Name(RSPOpC.rt));
|
||||
} else {
|
||||
MoveVariableToX86reg(&RSP_GPR[RSPOpC.rs].UW, GPR_Name(RSPOpC.rs), x86_EAX);
|
||||
|
|
@ -1678,7 +1680,7 @@ void Compile_Cop0_MT ( void )
|
|||
{
|
||||
if (Profiling)
|
||||
{
|
||||
PushImm32("Timer_RDP_Running",Timer_RDP_Running);
|
||||
PushImm32("Timer_RDP_Running",(DWORD)Timer_RDP_Running);
|
||||
Call_Direct(StartTimer,"StartTimer");
|
||||
AddConstToX86Reg(x86_ESP, 4);
|
||||
Push(x86_EAX);
|
||||
|
|
@ -2266,14 +2268,14 @@ void Compile_Vector_VMUDM ( void ) {
|
|||
|
||||
/*sprintf(Reg, "RSP_Vect[%i].HW[%i]", RSPOpC.rd, el);
|
||||
MoveSxVariableToX86regHalf(&RSP_Vect[RSPOpC.rd].HW[el], Reg, x86_EAX);*/
|
||||
MoveSxX86RegPtrDispToX86RegHalf(x86_EBP, el * 2, x86_EAX);
|
||||
MoveSxX86RegPtrDispToX86RegHalf(x86_EBP, (BYTE)(el * 2), x86_EAX);
|
||||
|
||||
if (bOptimize == FALSE) {
|
||||
if (bWriteToDest == TRUE) {
|
||||
sprintf(Reg, "RSP_Vect[%i].HW[%i]", RSPOpC.rt, del);
|
||||
MoveZxVariableToX86regHalf(&RSP_Vect[RSPOpC.rt].HW[del], Reg, x86_EBX);
|
||||
} else {
|
||||
MoveZxX86RegPtrDispToX86RegHalf(x86_ECX, del * 2, x86_EBX);
|
||||
MoveZxX86RegPtrDispToX86RegHalf(x86_ECX, (BYTE)(del * 2), x86_EBX);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -2283,7 +2285,7 @@ void Compile_Vector_VMUDM ( void ) {
|
|||
ShiftRightUnsignImmed(x86_EAX, 16);
|
||||
/*sprintf(Reg, "RSP_Vect[%i].HW[%i]", RSPOpC.sa, el);
|
||||
MoveX86regHalfToVariable(x86_EAX, &RSP_Vect[RSPOpC.sa].HW[el], Reg);*/
|
||||
MoveX86regHalfToX86regPointerDisp(x86_EAX, x86_ECX, el * 2);
|
||||
MoveX86regHalfToX86regPointerDisp(x86_EAX, x86_ECX, (BYTE)(el * 2));
|
||||
} else {
|
||||
MoveX86RegToX86Reg(x86_EAX, x86_EDX);
|
||||
ShiftRightSignImmed(x86_EDX, 16);
|
||||
|
|
@ -2298,7 +2300,7 @@ void Compile_Vector_VMUDM ( void ) {
|
|||
if (bWriteToDest == TRUE) {
|
||||
/*sprintf(Reg, "RSP_Vect[%i].HW[%i]", RSPOpC.sa, el);
|
||||
MoveX86regHalfToVariable(x86_EDX, &RSP_Vect[RSPOpC.sa].HW[el], Reg);*/
|
||||
MoveX86regHalfToX86regPointerDisp(x86_EDX, x86_ECX, el * 2);
|
||||
MoveX86regHalfToX86regPointerDisp(x86_EDX, x86_ECX, (BYTE)(el * 2));
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
@ -2382,7 +2384,7 @@ void Compile_Vector_VMUDN ( void ) {
|
|||
|
||||
/*sprintf(Reg, "RSP_Vect[%i].UHW[%i]", RSPOpC.rd, el);
|
||||
MoveZxVariableToX86regHalf(&RSP_Vect[RSPOpC.rd].UHW[el], Reg, x86_EAX);*/
|
||||
MoveZxX86RegPtrDispToX86RegHalf(x86_EBP, el * 2, x86_EAX);
|
||||
MoveZxX86RegPtrDispToX86RegHalf(x86_EBP, (BYTE)(el * 2), x86_EAX);
|
||||
|
||||
if (bOptimize == FALSE) {
|
||||
sprintf(Reg, "RSP_Vect[%i].HW[%i]", RSPOpC.rt, del);
|
||||
|
|
@ -2616,7 +2618,6 @@ void Compile_Vector_VMACF ( void ) {
|
|||
|
||||
BOOL bOptimize = ((RSPOpC.rs & 0x0f) >= 8) ? TRUE : FALSE;
|
||||
BOOL bWriteToDest = WriteToVectorDest(RSPOpC.sa, CompilePC);
|
||||
BOOL bWriteToAccum = WriteToAccum(EntireAccum, CompilePC);
|
||||
|
||||
#ifndef CompileVmacf
|
||||
Cheat_r4300iOpcode(RSP_Vector_VMACF,"RSP_Vector_VMACF"); return;
|
||||
|
|
@ -2757,7 +2758,6 @@ void Compile_Vector_VMADM ( void ) {
|
|||
|
||||
BOOL bOptimize = ((RSPOpC.rs & 0x0f) >= 8) ? TRUE : FALSE;
|
||||
BOOL bWriteToDest = WriteToVectorDest(RSPOpC.sa, CompilePC);
|
||||
BOOL bWriteToAccum = WriteToAccum(EntireAccum, CompilePC);
|
||||
|
||||
#ifndef CompileVmadm
|
||||
Cheat_r4300iOpcode(RSP_Vector_VMADM,"RSP_Vector_VMADM"); return;
|
||||
|
|
@ -2797,14 +2797,14 @@ void Compile_Vector_VMADM ( void ) {
|
|||
|
||||
/*sprintf(Reg, "RSP_Vect[%i].HW[%i]", RSPOpC.rd, el);
|
||||
MoveSxVariableToX86regHalf(&RSP_Vect[RSPOpC.rd].HW[el], Reg, x86_EAX);*/
|
||||
MoveSxX86RegPtrDispToX86RegHalf(x86_EBP, el * 2, x86_EAX);
|
||||
MoveSxX86RegPtrDispToX86RegHalf(x86_EBP, (BYTE)(el * 2), x86_EAX);
|
||||
|
||||
if (bOptimize == FALSE) {
|
||||
if (bWriteToDest == TRUE) {
|
||||
sprintf(Reg, "RSP_Vect[%i].HW[%i]", RSPOpC.rt, del);
|
||||
MoveZxVariableToX86regHalf(&RSP_Vect[RSPOpC.rt].HW[del], "RSP_Vect[RSPOpC.rt].HW[del]", x86_EBX);
|
||||
} else {
|
||||
MoveZxX86RegPtrDispToX86RegHalf(x86_ECX, del * 2, x86_EBX);
|
||||
MoveZxX86RegPtrDispToX86RegHalf(x86_ECX, (BYTE)(del * 2), x86_EBX);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -2828,7 +2828,7 @@ void Compile_Vector_VMADM ( void ) {
|
|||
|
||||
/*sprintf(Reg, "RSP_Vect[%i].HW[%i]", RSPOpC.sa, el);
|
||||
MoveX86regHalfToVariable(x86_EAX, &RSP_Vect[RSPOpC.sa].HW[el], Reg);*/
|
||||
MoveX86regHalfToX86regPointerDisp(x86_EAX, x86_ECX, el * 2);
|
||||
MoveX86regHalfToX86regPointerDisp(x86_EAX, x86_ECX, (BYTE)(el * 2));
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -2841,7 +2841,6 @@ void Compile_Vector_VMADN ( void ) {
|
|||
|
||||
BOOL bOptimize = ((RSPOpC.rs & 0x0f) >= 8) ? TRUE : FALSE;
|
||||
BOOL bWriteToDest = WriteToVectorDest(RSPOpC.sa, CompilePC);
|
||||
BOOL bWriteToAccum = WriteToAccum(EntireAccum, CompilePC);
|
||||
|
||||
#ifndef CompileVmadn
|
||||
Cheat_r4300iOpcode(RSP_Vector_VMADN,"RSP_Vector_VMADN"); return;
|
||||
|
|
@ -2873,7 +2872,7 @@ void Compile_Vector_VMADN ( void ) {
|
|||
|
||||
/*sprintf(Reg, "RSP_Vect[%i].UHW[%i]", RSPOpC.rd, el);
|
||||
MoveZxVariableToX86regHalf(&RSP_Vect[RSPOpC.rd].UHW[el], Reg, x86_EAX);*/
|
||||
MoveZxX86RegPtrDispToX86RegHalf(x86_EBP, el * 2, x86_EAX);
|
||||
MoveZxX86RegPtrDispToX86RegHalf(x86_EBP, (BYTE)(el * 2), x86_EAX);
|
||||
|
||||
if (bOptimize == FALSE) {
|
||||
sprintf(Reg, "RSP_Vect[%i].HW[%i]", RSPOpC.rt, del);
|
||||
|
|
@ -2900,7 +2899,7 @@ void Compile_Vector_VMADN ( void ) {
|
|||
/* Weird eh */
|
||||
CompConstToX86reg(x86_EAX, 0x7fff);
|
||||
CondMoveGreater(x86_ECX, x86_ESI);
|
||||
CompConstToX86reg(x86_EAX, -0x8000);
|
||||
CompConstToX86reg(x86_EAX, (DWORD)(-0x8000));
|
||||
CondMoveLess(x86_ECX, x86_EDI);
|
||||
|
||||
sprintf(Reg, "RSP_Vect[%i].HW[%i]", RSPOpC.sa, el);
|
||||
|
|
@ -3007,14 +3006,14 @@ void Compile_Vector_VMADH ( void ) {
|
|||
|
||||
/*sprintf(Reg, "RSP_Vect[%i].HW[%i]", RSPOpC.rd, el);
|
||||
MoveSxVariableToX86regHalf(&RSP_Vect[RSPOpC.rd].HW[el], Reg, x86_EAX);*/
|
||||
MoveSxX86RegPtrDispToX86RegHalf(x86_EBP, el * 2, x86_EAX);
|
||||
MoveSxX86RegPtrDispToX86RegHalf(x86_EBP, (BYTE)(el * 2), x86_EAX);
|
||||
|
||||
if (bOptimize == FALSE) {
|
||||
if (bWriteToDest == TRUE) {
|
||||
sprintf(Reg, "RSP_Vect[%i].HW[%i]", RSPOpC.rt, del);
|
||||
MoveSxVariableToX86regHalf(&RSP_Vect[RSPOpC.rt].HW[del], Reg, x86_EBX);
|
||||
} else {
|
||||
MoveSxX86RegPtrDispToX86RegHalf(x86_ECX, del * 2, x86_EBX);
|
||||
MoveSxX86RegPtrDispToX86RegHalf(x86_ECX, (BYTE)(del * 2), x86_EBX);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -3032,7 +3031,7 @@ void Compile_Vector_VMADH ( void ) {
|
|||
|
||||
/*sprintf(Reg, "RSP_Vect[%i].HW[%i]", RSPOpC.sa, el);
|
||||
MoveX86regHalfToVariable(x86_EAX, &RSP_Vect[RSPOpC.sa].HW[el], Reg);*/
|
||||
MoveX86regHalfToX86regPointerDisp(x86_EAX, x86_ECX, el * 2);
|
||||
MoveX86regHalfToX86regPointerDisp(x86_EAX, x86_ECX, (BYTE)(el * 2));
|
||||
}
|
||||
}
|
||||
Pop(x86_EBP);
|
||||
|
|
@ -3398,7 +3397,7 @@ void Compile_Vector_VADDC ( void ) {
|
|||
|
||||
/*sprintf(Reg, "RSP_Vect[%i].HW[%i]", RSPOpC.rd, el);
|
||||
MoveZxVariableToX86regHalf(&RSP_Vect[RSPOpC.rd].HW[el], Reg, x86_EAX);*/
|
||||
MoveZxX86RegPtrDispToX86RegHalf(x86_EBP, el * 2, x86_EAX);
|
||||
MoveZxX86RegPtrDispToX86RegHalf(x86_EBP, (BYTE)(el * 2), x86_EAX);
|
||||
|
||||
if (bElement == FALSE) {
|
||||
sprintf(Reg, "RSP_Vect[%i].HW[%i]", RSPOpC.rt, del);
|
||||
|
|
@ -3411,7 +3410,7 @@ void Compile_Vector_VADDC ( void ) {
|
|||
TestConstToX86Reg(0xFFFF0000, x86_EAX);
|
||||
Setnz(x86_EDX);
|
||||
if ((7 - el) != 0) {
|
||||
ShiftLeftSignImmed(x86_EDX, 7 - el);
|
||||
ShiftLeftSignImmed(x86_EDX, (BYTE)(7 - el));
|
||||
}
|
||||
OrX86RegToX86Reg(x86_ECX, x86_EDX);
|
||||
|
||||
|
|
@ -3470,13 +3469,13 @@ void Compile_Vector_VSUBC ( void ) {
|
|||
XorX86RegToX86Reg(x86_EDX, x86_EDX);
|
||||
TestConstToX86Reg(0x0000FFFF, x86_EAX);
|
||||
Setnz(x86_EDX);
|
||||
ShiftLeftSignImmed(x86_EDX, 15 - el);
|
||||
ShiftLeftSignImmed(x86_EDX, (BYTE)(15 - el));
|
||||
OrX86RegToX86Reg(x86_ECX, x86_EDX);
|
||||
|
||||
XorX86RegToX86Reg(x86_EDX, x86_EDX);
|
||||
TestConstToX86Reg(0xFFFF0000, x86_EAX);
|
||||
Setnz(x86_EDX);
|
||||
ShiftLeftSignImmed(x86_EDX, 7 - el);
|
||||
ShiftLeftSignImmed(x86_EDX, (BYTE)(7 - el));
|
||||
OrX86RegToX86Reg(x86_ECX, x86_EDX);
|
||||
|
||||
if (bWriteToAccum != FALSE) {
|
||||
|
|
|
|||
|
|
@ -36,6 +36,8 @@
|
|||
#include "log.h"
|
||||
#include "x86.h"
|
||||
|
||||
#pragma warning(disable : 4152) // nonstandard extension, function/data pointer conversion in expression
|
||||
|
||||
void RSP_Sections_VMUDH ( OPCODE RspOp, DWORD AccumStyle ) {
|
||||
char Reg[256];
|
||||
|
||||
|
|
@ -798,7 +800,7 @@ BOOL Check_Section_000(void) {
|
|||
|
||||
void Compile_Section_000(void) {
|
||||
char Reg[256];
|
||||
OPCODE vmudn, vmadn;
|
||||
OPCODE vmudn, vmadn = {0};
|
||||
DWORD i;
|
||||
|
||||
RSP_LW_IMEM(CompilePC + 0x00, &vmudn.Hex);
|
||||
|
|
|
|||
|
|
@ -44,7 +44,7 @@ char * sse_Strings[8] = {
|
|||
#define sse_Name(Reg) (sse_Strings[(Reg)])
|
||||
|
||||
void SseMoveAlignedVariableToReg(void *Variable, char *VariableName, int sseReg) {
|
||||
BYTE x86Command;
|
||||
BYTE x86Command = 0;
|
||||
|
||||
CPU_Message(" movaps %s, xmmword ptr [%s]",sse_Name(sseReg), VariableName);
|
||||
|
||||
|
|
@ -65,7 +65,7 @@ void SseMoveAlignedVariableToReg(void *Variable, char *VariableName, int sseReg)
|
|||
}
|
||||
|
||||
void SseMoveAlignedN64MemToReg(int sseReg, int AddrReg) {
|
||||
BYTE x86Command;
|
||||
BYTE x86Command = 0;
|
||||
|
||||
CPU_Message(" movaps %s, xmmword ptr [Dmem+%s]",sse_Name(sseReg), x86_Name(AddrReg));
|
||||
|
||||
|
|
@ -96,7 +96,7 @@ void SseMoveAlignedN64MemToReg(int sseReg, int AddrReg) {
|
|||
}
|
||||
|
||||
void SseMoveAlignedRegToVariable(int sseReg, void *Variable, char *VariableName) {
|
||||
BYTE x86Command;
|
||||
BYTE x86Command = 0;
|
||||
|
||||
CPU_Message(" movaps xmmword ptr [%s], %s",VariableName, sse_Name(sseReg));
|
||||
|
||||
|
|
@ -117,7 +117,7 @@ void SseMoveAlignedRegToVariable(int sseReg, void *Variable, char *VariableName)
|
|||
}
|
||||
|
||||
void SseMoveAlignedRegToN64Mem(int sseReg, int AddrReg) {
|
||||
BYTE x86Command;
|
||||
BYTE x86Command = 0;
|
||||
|
||||
CPU_Message(" movaps xmmword ptr [Dmem+%s], %s",x86_Name(AddrReg),sse_Name(sseReg));
|
||||
|
||||
|
|
@ -148,7 +148,7 @@ void SseMoveAlignedRegToN64Mem(int sseReg, int AddrReg) {
|
|||
}
|
||||
|
||||
void SseMoveUnalignedVariableToReg(void *Variable, char *VariableName, int sseReg) {
|
||||
BYTE x86Command;
|
||||
BYTE x86Command = 0;
|
||||
|
||||
CPU_Message(" movups %s, xmmword ptr [%s]",sse_Name(sseReg), VariableName);
|
||||
|
||||
|
|
@ -169,7 +169,7 @@ void SseMoveUnalignedVariableToReg(void *Variable, char *VariableName, int sseRe
|
|||
}
|
||||
|
||||
void SseMoveUnalignedN64MemToReg(int sseReg, int AddrReg) {
|
||||
BYTE x86Command;
|
||||
BYTE x86Command = 0;
|
||||
|
||||
CPU_Message(" movups %s, xmmword ptr [Dmem+%s]",sse_Name(sseReg), x86_Name(AddrReg));
|
||||
|
||||
|
|
@ -200,7 +200,7 @@ void SseMoveUnalignedN64MemToReg(int sseReg, int AddrReg) {
|
|||
}
|
||||
|
||||
void SseMoveUnalignedRegToVariable(int sseReg, void *Variable, char *VariableName) {
|
||||
BYTE x86Command;
|
||||
BYTE x86Command = 0;
|
||||
|
||||
CPU_Message(" movups xmmword ptr [%s], %s",VariableName, sse_Name(sseReg));
|
||||
|
||||
|
|
@ -221,7 +221,7 @@ void SseMoveUnalignedRegToVariable(int sseReg, void *Variable, char *VariableNam
|
|||
}
|
||||
|
||||
void SseMoveUnalignedRegToN64Mem(int sseReg, int AddrReg) {
|
||||
BYTE x86Command;
|
||||
BYTE x86Command = 0;
|
||||
|
||||
CPU_Message(" movups xmmword ptr [Dmem+%s], %s",x86_Name(AddrReg),sse_Name(sseReg));
|
||||
|
||||
|
|
@ -252,7 +252,7 @@ void SseMoveUnalignedRegToN64Mem(int sseReg, int AddrReg) {
|
|||
}
|
||||
|
||||
void SseMoveRegToReg(int Dest, int Source) {
|
||||
BYTE x86Command;
|
||||
BYTE x86Command = 0;
|
||||
|
||||
CPU_Message(" movaps %s, %s", sse_Name(Dest), sse_Name(Source));
|
||||
|
||||
|
|
@ -282,7 +282,7 @@ void SseMoveRegToReg(int Dest, int Source) {
|
|||
}
|
||||
|
||||
void SseXorRegToReg(int Dest, int Source) {
|
||||
BYTE x86Command;
|
||||
BYTE x86Command = 0;
|
||||
|
||||
CPU_Message(" xorps %s, %s", sse_Name(Dest), sse_Name(Source));
|
||||
|
||||
|
|
@ -311,7 +311,7 @@ void SseXorRegToReg(int Dest, int Source) {
|
|||
}
|
||||
|
||||
void SseShuffleReg(int Dest, int Source, BYTE Immed) {
|
||||
BYTE x86Command;
|
||||
BYTE x86Command = 0;
|
||||
|
||||
CPU_Message(" shufps %s, %s, %02X", sse_Name(Dest), sse_Name(Source), Immed);
|
||||
|
||||
|
|
|
|||
|
|
@ -32,6 +32,8 @@
|
|||
#include "RSP registers.h"
|
||||
#include "log.h"
|
||||
|
||||
#pragma warning(disable : 4152) // nonstandard extension, function/data pointer conversion in expression
|
||||
|
||||
#define PUTDST8(dest,value) (*((BYTE *)(dest))=(BYTE)(value)); dest += 1;
|
||||
#define PUTDST16(dest,value) (*((WORD *)(dest))=(WORD)(value)); dest += 2;
|
||||
#define PUTDST32(dest,value) (*((DWORD *)(dest))=(DWORD)(value)); dest += 4;
|
||||
|
|
@ -57,7 +59,7 @@ extern BOOL ConditionalMove;
|
|||
#define x86Half_Name(Reg) (x86_HalfStrings[(Reg)])
|
||||
|
||||
void AdcX86RegToX86Reg(int Destination, int Source) {
|
||||
WORD x86Command;
|
||||
WORD x86Command = 0;
|
||||
|
||||
CPU_Message(" adc %s, %s",x86_Name(Destination),x86_Name(Source));
|
||||
switch (Source) {
|
||||
|
|
@ -246,7 +248,7 @@ void AddX86regHalfToVariable(int x86reg, void * Variable, char * VariableName) {
|
|||
}
|
||||
|
||||
void AddX86RegToX86Reg(int Destination, int Source) {
|
||||
WORD x86Command;
|
||||
WORD x86Command = 0;
|
||||
|
||||
CPU_Message(" add %s, %s",x86_Name(Destination),x86_Name(Source));
|
||||
switch (Source) {
|
||||
|
|
@ -355,7 +357,7 @@ void AndX86RegToVariable(void * Variable, char * VariableName, int x86Reg) {
|
|||
}
|
||||
|
||||
void AndX86RegToX86Reg(int Destination, int Source) {
|
||||
WORD x86Command;
|
||||
WORD x86Command = 0;
|
||||
|
||||
CPU_Message(" and %s, %s",x86_Name(Destination),x86_Name(Source));
|
||||
switch (Destination) {
|
||||
|
|
@ -382,7 +384,7 @@ void AndX86RegToX86Reg(int Destination, int Source) {
|
|||
}
|
||||
|
||||
void AndX86RegHalfToX86RegHalf(int Destination, int Source) {
|
||||
WORD x86Command;
|
||||
WORD x86Command = 0;
|
||||
|
||||
CPU_Message(" and %s, %s",x86Half_Name(Destination),x86Half_Name(Source));
|
||||
PUTDST8(RecompPos, 0x66);
|
||||
|
|
@ -448,7 +450,7 @@ void CondMoveEqual(int Destination, int Source) {
|
|||
CPU_Message(" label:");
|
||||
x86_SetBranch8b(Jump, RecompPos);
|
||||
} else {
|
||||
BYTE x86Command;
|
||||
BYTE x86Command = 0;
|
||||
CPU_Message(" cmove %s, %s",x86_Name(Destination),x86_Name(Source));
|
||||
|
||||
PUTDST16(RecompPos,0x440F);
|
||||
|
|
@ -490,7 +492,7 @@ void CondMoveNotEqual(int Destination, int Source) {
|
|||
CPU_Message(" label:");
|
||||
x86_SetBranch8b(Jump, RecompPos);
|
||||
} else {
|
||||
BYTE x86Command;
|
||||
BYTE x86Command = 0;
|
||||
CPU_Message(" cmovne %s, %s",x86_Name(Destination),x86_Name(Source));
|
||||
|
||||
PUTDST16(RecompPos,0x450F);
|
||||
|
|
@ -532,7 +534,7 @@ void CondMoveGreater(int Destination, int Source) {
|
|||
CPU_Message(" label:");
|
||||
x86_SetBranch8b(Jump, RecompPos);
|
||||
} else {
|
||||
BYTE x86Command;
|
||||
BYTE x86Command = 0;
|
||||
CPU_Message(" cmovg %s, %s",x86_Name(Destination),x86_Name(Source));
|
||||
|
||||
PUTDST16(RecompPos,0x4F0F);
|
||||
|
|
@ -574,7 +576,7 @@ void CondMoveGreaterEqual(int Destination, int Source) {
|
|||
CPU_Message(" label:");
|
||||
x86_SetBranch8b(Jump, RecompPos);
|
||||
} else {
|
||||
BYTE x86Command;
|
||||
BYTE x86Command = 0;
|
||||
CPU_Message(" cmovge %s, %s",x86_Name(Destination),x86_Name(Source));
|
||||
|
||||
PUTDST16(RecompPos,0x4D0F);
|
||||
|
|
@ -616,7 +618,7 @@ void CondMoveLess(int Destination, int Source) {
|
|||
CPU_Message(" label:");
|
||||
x86_SetBranch8b(Jump, RecompPos);
|
||||
} else {
|
||||
BYTE x86Command;
|
||||
BYTE x86Command = 0;
|
||||
CPU_Message(" cmovl %s, %s",x86_Name(Destination),x86_Name(Source));
|
||||
|
||||
PUTDST16(RecompPos,0x4C0F);
|
||||
|
|
@ -658,7 +660,7 @@ void CondMoveLessEqual(int Destination, int Source) {
|
|||
CPU_Message(" label:");
|
||||
x86_SetBranch8b(Jump, RecompPos);
|
||||
} else {
|
||||
BYTE x86Command;
|
||||
BYTE x86Command = 0;
|
||||
CPU_Message(" cmovle %s, %s",x86_Name(Destination),x86_Name(Source));
|
||||
|
||||
PUTDST16(RecompPos,0x4E0F);
|
||||
|
|
@ -772,7 +774,7 @@ void CompVariableToX86reg(int x86Reg, void * Variable, char * VariableName) {
|
|||
}
|
||||
|
||||
void CompX86RegToX86Reg(int Destination, int Source) {
|
||||
WORD x86Command;
|
||||
WORD x86Command = 0;
|
||||
|
||||
CPU_Message(" cmp %s, %s",x86_Name(Destination),x86_Name(Source));
|
||||
|
||||
|
|
@ -872,7 +874,7 @@ void imulX86reg(int x86reg) {
|
|||
}
|
||||
|
||||
void ImulX86RegToX86Reg(int Destination, int Source) {
|
||||
BYTE x86Command;
|
||||
BYTE x86Command = 0;
|
||||
|
||||
CPU_Message(" imul %s, %s",x86_Name(Destination), x86_Name(Source));
|
||||
|
||||
|
|
@ -1070,7 +1072,7 @@ void JsLabel32(char *Label, DWORD Value) {
|
|||
**/
|
||||
|
||||
void LeaSourceAndOffset(int x86DestReg, int x86SourceReg, int offset) {
|
||||
WORD x86Command;
|
||||
WORD x86Command = 0;
|
||||
|
||||
CPU_Message(" lea %s, [%s + %0Xh]",x86_Name(x86DestReg),x86_Name(x86SourceReg),offset);
|
||||
switch (x86DestReg) {
|
||||
|
|
@ -1222,7 +1224,7 @@ void MoveX86regPointerToX86regHalf(int Destination, int AddrReg) {
|
|||
}
|
||||
|
||||
void MoveX86regPointerToX86reg(int Destination, int AddrReg) {
|
||||
BYTE x86Amb;
|
||||
BYTE x86Amb = 0;
|
||||
CPU_Message(" mov %s, dword ptr [%s]",x86_Name(Destination), x86_Name(AddrReg));
|
||||
|
||||
switch (AddrReg) {
|
||||
|
|
@ -1254,7 +1256,7 @@ void MoveX86regPointerToX86reg(int Destination, int AddrReg) {
|
|||
}
|
||||
|
||||
void MoveX86regByteToX86regPointer(int Source, int AddrReg) {
|
||||
BYTE x86Amb;
|
||||
BYTE x86Amb = 0;
|
||||
CPU_Message(" mov byte ptr [%s], %s",x86_Name(AddrReg), x86Byte_Name(Source));
|
||||
|
||||
switch (AddrReg) {
|
||||
|
|
@ -1286,7 +1288,7 @@ void MoveX86regByteToX86regPointer(int Source, int AddrReg) {
|
|||
}
|
||||
|
||||
void MoveX86regHalfToX86regPointer(int Source, int AddrReg) {
|
||||
BYTE x86Amb;
|
||||
BYTE x86Amb = 0;
|
||||
|
||||
CPU_Message(" mov word ptr [%s], %s",x86_Name(AddrReg), x86Half_Name(Source));
|
||||
|
||||
|
|
@ -1319,7 +1321,7 @@ void MoveX86regHalfToX86regPointer(int Source, int AddrReg) {
|
|||
}
|
||||
|
||||
void MoveX86regHalfToX86regPointerDisp(int Source, int AddrReg, BYTE Disp) {
|
||||
BYTE x86Amb;
|
||||
BYTE x86Amb = 0;
|
||||
|
||||
CPU_Message(" mov word ptr [%s+%X], %s",x86_Name(AddrReg), Disp, x86Half_Name(Source));
|
||||
|
||||
|
|
@ -1353,7 +1355,7 @@ void MoveX86regHalfToX86regPointerDisp(int Source, int AddrReg, BYTE Disp) {
|
|||
}
|
||||
|
||||
void MoveX86regToX86regPointer(int Source, int AddrReg) {
|
||||
BYTE x86Amb;
|
||||
BYTE x86Amb = 0;
|
||||
CPU_Message(" mov dword ptr [%s], %s",x86_Name(AddrReg), x86_Name(Source));
|
||||
|
||||
switch (AddrReg) {
|
||||
|
|
@ -1385,7 +1387,7 @@ void MoveX86regToX86regPointer(int Source, int AddrReg) {
|
|||
}
|
||||
|
||||
void MoveX86RegToX86regPointerDisp ( int Source, int AddrReg, BYTE Disp ) {
|
||||
BYTE x86Amb;
|
||||
BYTE x86Amb = 0;
|
||||
CPU_Message(" mov dword ptr [%s+%X], %s",x86_Name(AddrReg), Disp, x86_Name(Source));
|
||||
|
||||
switch (AddrReg) {
|
||||
|
|
@ -1418,7 +1420,7 @@ void MoveX86RegToX86regPointerDisp ( int Source, int AddrReg, BYTE Disp ) {
|
|||
}
|
||||
|
||||
void MoveN64MemDispToX86reg(int x86reg, int AddrReg, BYTE Disp) {
|
||||
WORD x86Command;
|
||||
WORD x86Command = 0;
|
||||
|
||||
CPU_Message(" mov %s, dword ptr [%s+Dmem+%Xh]",x86_Name(x86reg),x86_Name(AddrReg),Disp);
|
||||
switch (AddrReg) {
|
||||
|
|
@ -1446,7 +1448,7 @@ void MoveN64MemDispToX86reg(int x86reg, int AddrReg, BYTE Disp) {
|
|||
}
|
||||
|
||||
void MoveN64MemToX86reg(int x86reg, int AddrReg) {
|
||||
WORD x86Command;
|
||||
WORD x86Command = 0;
|
||||
|
||||
CPU_Message(" mov %s, dword ptr [%s+Dmem]",x86_Name(x86reg),x86_Name(AddrReg));
|
||||
|
||||
|
|
@ -1475,7 +1477,7 @@ void MoveN64MemToX86reg(int x86reg, int AddrReg) {
|
|||
}
|
||||
|
||||
void MoveN64MemToX86regByte(int x86reg, int AddrReg) {
|
||||
WORD x86Command;
|
||||
WORD x86Command = 0;
|
||||
|
||||
CPU_Message(" mov %s, byte ptr [%s+Dmem]",x86Byte_Name(x86reg),x86_Name(AddrReg));
|
||||
switch (AddrReg) {
|
||||
|
|
@ -1502,7 +1504,7 @@ void MoveN64MemToX86regByte(int x86reg, int AddrReg) {
|
|||
}
|
||||
|
||||
void MoveN64MemToX86regHalf(int x86reg, int AddrReg) {
|
||||
WORD x86Command;
|
||||
WORD x86Command = 0;
|
||||
|
||||
CPU_Message(" mov %s, word ptr [%s+Dmem]",x86Half_Name(x86reg),x86_Name(AddrReg));
|
||||
|
||||
|
|
@ -1532,7 +1534,7 @@ void MoveN64MemToX86regHalf(int x86reg, int AddrReg) {
|
|||
}
|
||||
|
||||
void MoveX86regByteToN64Mem(int x86reg, int AddrReg) {
|
||||
WORD x86Command;
|
||||
WORD x86Command = 0;
|
||||
|
||||
CPU_Message(" mov byte ptr [%s+Dmem], %s",x86_Name(AddrReg),x86Byte_Name(x86reg));
|
||||
|
||||
|
|
@ -1555,7 +1557,7 @@ void MoveX86regByteToN64Mem(int x86reg, int AddrReg) {
|
|||
}
|
||||
|
||||
void MoveX86regHalfToN64Mem(int x86reg, int AddrReg) {
|
||||
WORD x86Command;
|
||||
WORD x86Command = 0;
|
||||
|
||||
CPU_Message(" mov word ptr [%s+Dmem], %s",x86_Name(AddrReg),x86Half_Name(x86reg));
|
||||
PUTDST8(RecompPos,0x66);
|
||||
|
|
@ -1584,7 +1586,7 @@ void MoveX86regHalfToN64Mem(int x86reg, int AddrReg) {
|
|||
}
|
||||
|
||||
void MoveX86regToN64Mem(int x86reg, int AddrReg) {
|
||||
WORD x86Command;
|
||||
WORD x86Command = 0;
|
||||
|
||||
CPU_Message(" mov dword ptr [%s+N64mem], %s",x86_Name(AddrReg),x86_Name(x86reg));
|
||||
switch (AddrReg) {
|
||||
|
|
@ -1612,7 +1614,7 @@ void MoveX86regToN64Mem(int x86reg, int AddrReg) {
|
|||
}
|
||||
|
||||
void MoveX86regToN64MemDisp(int x86reg, int AddrReg, BYTE Disp) {
|
||||
WORD x86Command;
|
||||
WORD x86Command = 0;
|
||||
|
||||
CPU_Message(" mov dword ptr [%s+N64mem+%d], %s",x86_Name(AddrReg),Disp,x86_Name(x86reg));
|
||||
switch (AddrReg) {
|
||||
|
|
@ -1733,7 +1735,7 @@ void MoveX86regToVariable(int x86reg, void * Variable, char * VariableName) {
|
|||
}
|
||||
|
||||
void MoveX86RegToX86Reg(int Source, int Destination) {
|
||||
WORD x86Command;
|
||||
WORD x86Command = 0;
|
||||
|
||||
CPU_Message(" mov %s, %s",x86_Name(Destination),x86_Name(Source));
|
||||
|
||||
|
|
@ -1762,7 +1764,7 @@ void MoveX86RegToX86Reg(int Source, int Destination) {
|
|||
}
|
||||
|
||||
void MoveSxX86RegHalfToX86Reg(int Source, int Destination) {
|
||||
WORD x86Command;
|
||||
WORD x86Command = 0;
|
||||
|
||||
CPU_Message(" movsx %s, %s",x86_Name(Destination),x86Half_Name(Source));
|
||||
|
||||
|
|
@ -1792,7 +1794,7 @@ void MoveSxX86RegHalfToX86Reg(int Source, int Destination) {
|
|||
}
|
||||
|
||||
void MoveSxX86RegPtrDispToX86RegHalf(int AddrReg, BYTE Disp, int Destination) {
|
||||
BYTE x86Command;
|
||||
BYTE x86Command = 0;
|
||||
|
||||
CPU_Message(" movsx %s, [%s+%X]",x86_Name(Destination), x86_Name(AddrReg),Disp);
|
||||
|
||||
|
|
@ -1842,7 +1844,7 @@ void MoveSxVariableToX86regHalf(void *Variable, char *VariableName, int x86reg)
|
|||
}
|
||||
|
||||
void MoveSxN64MemToX86regByte(int x86reg, int AddrReg) {
|
||||
WORD x86Command;
|
||||
WORD x86Command = 0;
|
||||
|
||||
CPU_Message(" movsx %s, byte ptr [%s+Dmem]",x86_Name(x86reg),x86_Name(AddrReg));
|
||||
switch (AddrReg) {
|
||||
|
|
@ -1870,7 +1872,7 @@ void MoveSxN64MemToX86regByte(int x86reg, int AddrReg) {
|
|||
}
|
||||
|
||||
void MoveSxN64MemToX86regHalf(int x86reg, int AddrReg) {
|
||||
WORD x86Command;
|
||||
WORD x86Command = 0;
|
||||
|
||||
CPU_Message(" movsx %s, word ptr [%s+Dmem]",x86_Name(x86reg),x86_Name(AddrReg));
|
||||
|
||||
|
|
@ -1901,7 +1903,7 @@ void MoveSxN64MemToX86regHalf(int x86reg, int AddrReg) {
|
|||
}
|
||||
|
||||
void MoveZxX86RegHalfToX86Reg(int Source, int Destination) {
|
||||
WORD x86Command;
|
||||
WORD x86Command = 0;
|
||||
|
||||
CPU_Message(" movzx %s, %s",x86_Name(Destination),x86Half_Name(Source));
|
||||
|
||||
|
|
@ -1931,7 +1933,7 @@ void MoveZxX86RegHalfToX86Reg(int Source, int Destination) {
|
|||
}
|
||||
|
||||
void MoveZxX86RegPtrDispToX86RegHalf(int AddrReg, BYTE Disp, int Destination) {
|
||||
BYTE x86Command;
|
||||
BYTE x86Command = 0;
|
||||
|
||||
CPU_Message(" movzx %s, [%s+%X]",x86_Name(Destination), x86_Name(AddrReg), Disp);
|
||||
|
||||
|
|
@ -1981,7 +1983,7 @@ void MoveZxVariableToX86regHalf(void *Variable, char *VariableName, int x86reg)
|
|||
}
|
||||
|
||||
void MoveZxN64MemToX86regByte(int x86reg, int AddrReg) {
|
||||
WORD x86Command;
|
||||
WORD x86Command = 0;
|
||||
|
||||
CPU_Message(" movzx %s, byte ptr [%s+Dmem]",x86_Name(x86reg),x86_Name(AddrReg));
|
||||
switch (AddrReg) {
|
||||
|
|
@ -2009,7 +2011,7 @@ void MoveZxN64MemToX86regByte(int x86reg, int AddrReg) {
|
|||
}
|
||||
|
||||
void MoveZxN64MemToX86regHalf(int x86reg, int AddrReg) {
|
||||
WORD x86Command;
|
||||
WORD x86Command = 0;
|
||||
|
||||
CPU_Message(" movzx %s, word ptr [%s+Dmem]",x86_Name(x86reg),x86_Name(AddrReg));
|
||||
|
||||
|
|
@ -2170,7 +2172,7 @@ void OrX86RegToVariable(void * Variable, char * VariableName, int x86Reg) {
|
|||
}
|
||||
|
||||
void OrX86RegToX86Reg(int Destination, int Source) {
|
||||
WORD x86Command;
|
||||
WORD x86Command = 0;
|
||||
|
||||
CPU_Message(" or %s, %s",x86_Name(Destination),x86_Name(Source));
|
||||
switch (Source) {
|
||||
|
|
@ -2628,7 +2630,7 @@ void SubX86regFromVariable(int x86reg, void * Variable, char * VariableName) {
|
|||
}
|
||||
|
||||
void SubX86RegToX86Reg(int Destination, int Source) {
|
||||
WORD x86Command;
|
||||
WORD x86Command = 0;
|
||||
CPU_Message(" sub %s, %s",x86_Name(Destination),x86_Name(Source));
|
||||
switch (Source) {
|
||||
case x86_EAX: x86Command = 0x002B; break;
|
||||
|
|
@ -2654,7 +2656,7 @@ void SubX86RegToX86Reg(int Destination, int Source) {
|
|||
}
|
||||
|
||||
void SbbX86RegToX86Reg(int Destination, int Source) {
|
||||
WORD x86Command;
|
||||
WORD x86Command = 0;
|
||||
CPU_Message(" sbb %s, %s",x86_Name(Destination),x86_Name(Source));
|
||||
switch (Source) {
|
||||
case x86_EAX: x86Command = 0x001B; break;
|
||||
|
|
@ -2703,7 +2705,7 @@ void TestConstToX86Reg(DWORD Const, int x86reg) {
|
|||
}
|
||||
|
||||
void TestX86RegToX86Reg(int Destination, int Source) {
|
||||
WORD x86Command;
|
||||
WORD x86Command = 0;
|
||||
|
||||
CPU_Message(" test %s, %s",x86_Name(Destination),x86_Name(Source));
|
||||
switch (Source) {
|
||||
|
|
@ -2768,7 +2770,7 @@ void XorConstToVariable(void *Variable, char *VariableName, DWORD Const) {
|
|||
}
|
||||
|
||||
void XorX86RegToX86Reg(int Source, int Destination) {
|
||||
WORD x86Command;
|
||||
WORD x86Command = 0;
|
||||
|
||||
CPU_Message(" xor %s, %s",x86_Name(Source),x86_Name(Destination));
|
||||
|
||||
|
|
|
|||
|
|
@ -246,6 +246,9 @@ void SseMoveUnalignedRegToN64Mem ( int sseReg, int AddrReg );
|
|||
void SseMoveRegToReg ( int Dest, int Source );
|
||||
void SseXorRegToReg ( int Dest, int Source );
|
||||
|
||||
#pragma warning(push)
|
||||
#pragma warning(disable : 4201) // nonstandard extension used : nameless struct/union
|
||||
|
||||
typedef union {
|
||||
struct {
|
||||
unsigned Reg0 : 2;
|
||||
|
|
@ -256,6 +259,8 @@ typedef union {
|
|||
unsigned UB:8;
|
||||
} SHUFFLE;
|
||||
|
||||
#pragma warning(pop)
|
||||
|
||||
void SseShuffleReg ( int Dest, int Source, BYTE Immed );
|
||||
|
||||
void x86_SetBranch32b(void * JumpByte, void * Destination);
|
||||
|
|
|
|||
|
|
@ -92,6 +92,8 @@ int CheckForRSPBPoint ( DWORD Location ) {
|
|||
void CreateBPPanel ( HWND hDlg, RECT rcBox ) {
|
||||
if (hRSPLocation != NULL) { return; }
|
||||
|
||||
rcBox = rcBox; // remove warning of unused
|
||||
|
||||
BPoint_Win_hDlg = hDlg;
|
||||
|
||||
hRSPLocation = CreateWindowEx(0,"EDIT","", WS_CHILD | WS_BORDER | ES_UPPERCASE | WS_TABSTOP,
|
||||
|
|
|
|||
|
|
@ -161,9 +161,9 @@ void RDP_LogDlist ( void )
|
|||
{
|
||||
return;
|
||||
}
|
||||
RDP_Message(" Dlist length = %d bytes",*RSPInfo.DPC_END_REG - *RSPInfo.DPC_CURRENT_REG);
|
||||
|
||||
DWORD Length = *RSPInfo.DPC_END_REG - *RSPInfo.DPC_CURRENT_REG;
|
||||
RDP_Message(" Dlist length = %d bytes",Length);
|
||||
|
||||
DWORD Pos = *RSPInfo.DPC_CURRENT_REG;
|
||||
while (Pos < *RSPInfo.DPC_END_REG)
|
||||
{
|
||||
|
|
@ -197,7 +197,7 @@ void RDP_LogDlist ( void )
|
|||
}
|
||||
}
|
||||
|
||||
void RDP_LogLoc ( DWORD PC )
|
||||
void RDP_LogLoc ( DWORD /*PC*/ )
|
||||
{
|
||||
// RDP_Message("%03X %08X %08X %08X %08X %08X %08X %08X %08X %08X %08X %08X %08X",PC, RSP_GPR[26].UW, *(DWORD *)&RSPInfo.IMEM[0xDBC],
|
||||
// RSP_Flags[0].UW, RSP_Vect[0].UW[0],RSP_Vect[0].UW[1],RSP_Vect[0].UW[2],RSP_Vect[0].UW[3],
|
||||
|
|
|
|||
|
|
@ -318,16 +318,16 @@ void RSP_SFV_DMEM ( DWORD Addr, int vect, int element ) {
|
|||
|
||||
switch (element) {
|
||||
case 0:
|
||||
*(RSPInfo.DMEM + ((Addr + offset)^3)) = RSP_Vect[vect].UHW[7] >> 7;
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 4) & 0xF))^3)) = RSP_Vect[vect].UHW[6] >> 7;
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 8) & 0xF))^3)) = RSP_Vect[vect].UHW[5] >> 7;
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 12) & 0xF))^3)) = RSP_Vect[vect].UHW[4] >> 7;
|
||||
*(RSPInfo.DMEM + ((Addr + offset)^3)) = (BYTE)(RSP_Vect[vect].UHW[7] >> 7);
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 4) & 0xF))^3)) = (BYTE)(RSP_Vect[vect].UHW[6] >> 7);
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 8) & 0xF))^3)) = (BYTE)(RSP_Vect[vect].UHW[5] >> 7);
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 12) & 0xF))^3)) = (BYTE)(RSP_Vect[vect].UHW[4] >> 7);
|
||||
break;
|
||||
case 1:
|
||||
*(RSPInfo.DMEM + ((Addr + offset)^3)) = RSP_Vect[vect].UHW[1] >> 7;
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 4) & 0xF))^3)) = RSP_Vect[vect].UHW[0] >> 7;
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 8) & 0xF))^3)) = RSP_Vect[vect].UHW[3] >> 7;
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 12) & 0xF))^3)) = RSP_Vect[vect].UHW[2] >> 7;
|
||||
*(RSPInfo.DMEM + ((Addr + offset)^3)) = (BYTE)(RSP_Vect[vect].UHW[1] >> 7);
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 4) & 0xF))^3)) = (BYTE)(RSP_Vect[vect].UHW[0] >> 7);
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 8) & 0xF))^3)) = (BYTE)(RSP_Vect[vect].UHW[3] >> 7);
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 12) & 0xF))^3)) = (BYTE)(RSP_Vect[vect].UHW[2] >> 7);
|
||||
break;
|
||||
case 2:
|
||||
*(RSPInfo.DMEM + ((Addr + offset)^3)) = 0;
|
||||
|
|
@ -342,16 +342,16 @@ void RSP_SFV_DMEM ( DWORD Addr, int vect, int element ) {
|
|||
*(RSPInfo.DMEM + ((Addr + ((offset + 12) & 0xF)^3))) = 0;
|
||||
break;
|
||||
case 4:
|
||||
*(RSPInfo.DMEM + ((Addr + offset)^3)) = RSP_Vect[vect].UHW[6] >> 7;
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 4) & 0xF))^3)) = RSP_Vect[vect].UHW[5] >> 7;
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 8) & 0xF))^3)) = RSP_Vect[vect].UHW[4] >> 7;
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 12) & 0xF))^3)) = RSP_Vect[vect].UHW[7] >> 7;
|
||||
*(RSPInfo.DMEM + ((Addr + offset)^3)) = (BYTE)(RSP_Vect[vect].UHW[6] >> 7);
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 4) & 0xF))^3)) = (BYTE)(RSP_Vect[vect].UHW[5] >> 7);
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 8) & 0xF))^3)) = (BYTE)(RSP_Vect[vect].UHW[4] >> 7);
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 12) & 0xF))^3)) = (BYTE)(RSP_Vect[vect].UHW[7] >> 7);
|
||||
break;
|
||||
case 5:
|
||||
*(RSPInfo.DMEM + ((Addr + offset)^3)) = RSP_Vect[vect].UHW[0] >> 7;
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 4) & 0xF))^3)) = RSP_Vect[vect].UHW[3] >> 7;
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 8) & 0xF))^3)) = RSP_Vect[vect].UHW[2] >> 7;
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 12) & 0xF))^3)) = RSP_Vect[vect].UHW[1] >> 7;
|
||||
*(RSPInfo.DMEM + ((Addr + offset)^3)) = (BYTE)(RSP_Vect[vect].UHW[0] >> 7);
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 4) & 0xF))^3)) = (BYTE)(RSP_Vect[vect].UHW[3] >> 7);
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 8) & 0xF))^3)) = (BYTE)(RSP_Vect[vect].UHW[2] >> 7);
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 12) & 0xF))^3)) = (BYTE)(RSP_Vect[vect].UHW[1] >> 7);
|
||||
break;
|
||||
case 6:
|
||||
*(RSPInfo.DMEM + ((Addr + offset)^3)) = 0;
|
||||
|
|
@ -366,10 +366,10 @@ void RSP_SFV_DMEM ( DWORD Addr, int vect, int element ) {
|
|||
*(RSPInfo.DMEM + ((Addr + ((offset + 12) & 0xF))^3)) = 0;
|
||||
break;
|
||||
case 8:
|
||||
*(RSPInfo.DMEM + ((Addr + offset)^3)) = RSP_Vect[vect].UHW[3] >> 7;
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 4) & 0xF))^3)) = RSP_Vect[vect].UHW[2] >> 7;
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 8) & 0xF))^3)) = RSP_Vect[vect].UHW[1] >> 7;
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 12) & 0xF))^3)) = RSP_Vect[vect].UHW[0] >> 7;
|
||||
*(RSPInfo.DMEM + ((Addr + offset)^3)) = (BYTE)(RSP_Vect[vect].UHW[3] >> 7);
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 4) & 0xF))^3)) = (BYTE)(RSP_Vect[vect].UHW[2] >> 7);
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 8) & 0xF))^3)) = (BYTE)(RSP_Vect[vect].UHW[1] >> 7);
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 12) & 0xF))^3)) = (BYTE)(RSP_Vect[vect].UHW[0] >> 7);
|
||||
break;
|
||||
case 9:
|
||||
*(RSPInfo.DMEM + ((Addr + offset)^3)) = 0;
|
||||
|
|
@ -384,16 +384,16 @@ void RSP_SFV_DMEM ( DWORD Addr, int vect, int element ) {
|
|||
*(RSPInfo.DMEM + ((Addr + ((offset + 12) & 0xF))^3)) = 0;
|
||||
break;
|
||||
case 11:
|
||||
*(RSPInfo.DMEM + ((Addr + offset)^3)) = RSP_Vect[vect].UHW[4] >> 7;
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 4) & 0xF))^3)) = RSP_Vect[vect].UHW[7] >> 7;
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 8) & 0xF))^3)) = RSP_Vect[vect].UHW[6] >> 7;
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 12) & 0xF))^3)) = RSP_Vect[vect].UHW[5] >> 7;
|
||||
*(RSPInfo.DMEM + ((Addr + offset)^3)) = (BYTE)(RSP_Vect[vect].UHW[4] >> 7);
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 4) & 0xF))^3)) = (BYTE)(RSP_Vect[vect].UHW[7] >> 7);
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 8) & 0xF))^3)) = (BYTE)(RSP_Vect[vect].UHW[6] >> 7);
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 12) & 0xF))^3)) = (BYTE)(RSP_Vect[vect].UHW[5] >> 7);
|
||||
break;
|
||||
case 12:
|
||||
*(RSPInfo.DMEM + ((Addr + offset)^3)) = RSP_Vect[vect].UHW[2] >> 7;
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 4) & 0xF))^3)) = RSP_Vect[vect].UHW[1] >> 7;
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 8) & 0xF))^3)) = RSP_Vect[vect].UHW[0] >> 7;
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 12) & 0xF))^3)) = RSP_Vect[vect].UHW[3] >> 7;
|
||||
*(RSPInfo.DMEM + ((Addr + offset)^3)) = (BYTE)(RSP_Vect[vect].UHW[2] >> 7);
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 4) & 0xF))^3)) = (BYTE)(RSP_Vect[vect].UHW[1] >> 7);
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 8) & 0xF))^3)) = (BYTE)(RSP_Vect[vect].UHW[0] >> 7);
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 12) & 0xF))^3)) = (BYTE)(RSP_Vect[vect].UHW[3] >> 7);
|
||||
break;
|
||||
case 13:
|
||||
*(RSPInfo.DMEM + ((Addr + offset)^3)) = 0;
|
||||
|
|
@ -408,10 +408,10 @@ void RSP_SFV_DMEM ( DWORD Addr, int vect, int element ) {
|
|||
*(RSPInfo.DMEM + ((Addr + ((offset + 12) & 0xF))^3)) = 0;
|
||||
break;
|
||||
case 15:
|
||||
*(RSPInfo.DMEM + ((Addr + offset)^3)) = RSP_Vect[vect].UHW[7] >> 7;
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 4) & 0xF))^3)) = RSP_Vect[vect].UHW[6] >> 7;
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 8) & 0xF))^3)) = RSP_Vect[vect].UHW[5] >> 7;
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 12) & 0xF))^3)) = RSP_Vect[vect].UHW[4] >> 7;
|
||||
*(RSPInfo.DMEM + ((Addr + offset)^3)) = (BYTE)(RSP_Vect[vect].UHW[7] >> 7);
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 4) & 0xF))^3)) = (BYTE)(RSP_Vect[vect].UHW[6] >> 7);
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 8) & 0xF))^3)) = (BYTE)(RSP_Vect[vect].UHW[5] >> 7);
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 12) & 0xF))^3)) = (BYTE)(RSP_Vect[vect].UHW[4] >> 7);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
|
|
|||
Loading…
Reference in New Issue