r4300: Cleaned up code for checking interrupts on JAL and JALR

This commit is contained in:
zilmar 2013-01-14 17:12:11 +11:00
parent 72b708850b
commit 884b408b2d
1 changed files with 24 additions and 21 deletions

View File

@ -1350,7 +1350,8 @@ void CRecompilerOps::J (void) {
} }
void CRecompilerOps::JAL (void) { void CRecompilerOps::JAL (void) {
if ( m_NextInstruction == NORMAL ) { if ( m_NextInstruction == NORMAL )
{
CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC)); CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC));
Map_GPR_32bit(31,true,-1); Map_GPR_32bit(31,true,-1);
MoveVariableToX86reg(_PROGRAM_COUNTER,"_PROGRAM_COUNTER",GetMipsRegMapLo(31)); MoveVariableToX86reg(_PROGRAM_COUNTER,"_PROGRAM_COUNTER",GetMipsRegMapLo(31));
@ -1388,9 +1389,10 @@ void CRecompilerOps::JAL (void) {
MoveX86regToVariable(pc_reg,_PROGRAM_COUNTER,"_PROGRAM_COUNTER"); MoveX86regToVariable(pc_reg,_PROGRAM_COUNTER,"_PROGRAM_COUNTER");
DWORD TargetPC = (m_CompilePC & 0xF0000000) + (m_Opcode.target << 2); DWORD TargetPC = (m_CompilePC & 0xF0000000) + (m_Opcode.target << 2);
UpdateCounters(m_RegWorkingSet,TargetPC <= m_CompilePC, true); bool bCheck = TargetPC <= m_CompilePC;
UpdateCounters(m_RegWorkingSet,bCheck, true);
m_Section->CompileExit((DWORD)-1, (DWORD)-1,m_RegWorkingSet,CExitInfo::Normal,TRUE,NULL); m_Section->CompileExit((DWORD)-1, (DWORD)-1,m_RegWorkingSet,bCheck ? CExitInfo::Normal : CExitInfo::Normal_NoSysCheck,TRUE,NULL);
} }
m_NextInstruction = END_BLOCK; m_NextInstruction = END_BLOCK;
} else { } else {
@ -2101,6 +2103,7 @@ void CRecompilerOps::SPECIAL_JALR (void)
if (DelaySlotEffectsCompare(m_CompilePC,m_Opcode.rs,0)) if (DelaySlotEffectsCompare(m_CompilePC,m_Opcode.rs,0))
{ {
CRecompilerOps::UnknownOpcode(); CRecompilerOps::UnknownOpcode();
return;
} }
UnMap_GPR( m_Opcode.rd, FALSE); UnMap_GPR( m_Opcode.rd, FALSE);
m_RegWorkingSet.SetMipsRegLo(m_Opcode.rd,m_CompilePC + 8); m_RegWorkingSet.SetMipsRegLo(m_Opcode.rd,m_CompilePC + 8);
@ -2117,28 +2120,28 @@ void CRecompilerOps::SPECIAL_JALR (void)
OverflowDelaySlot(true); OverflowDelaySlot(true);
return; return;
} }
m_Section->m_Jump.FallThrough = false;
m_Section->m_Jump.LinkLocation = NULL;
m_Section->m_Jump.LinkLocation2 = NULL;
m_Section->m_Cont.FallThrough = FALSE;
m_Section->m_Cont.LinkLocation = NULL;
m_Section->m_Cont.LinkLocation2 = NULL;
m_NextInstruction = DO_DELAY_SLOT; m_NextInstruction = DO_DELAY_SLOT;
} else if (m_NextInstruction == DELAY_SLOT_DONE ) { } else if (m_NextInstruction == DELAY_SLOT_DONE ) {
UpdateCounters(m_RegWorkingSet,true,true);
if (IsConst(m_Opcode.rs)) { if (IsConst(m_Opcode.rs)) {
m_Section->m_Jump.RegSet = m_RegWorkingSet; MoveConstToVariable(GetMipsRegLo(m_Opcode.rs),_PROGRAM_COUNTER, "PROGRAM_COUNTER");
m_Section->m_Jump.BranchLabel.Format("0x%08X",GetMipsRegLo(m_Opcode.rs)); } else if (IsMapped(m_Opcode.rs)) {
m_Section->m_Jump.TargetPC = GetMipsRegLo(m_Opcode.rs); MoveX86regToVariable(GetMipsRegMapLo(m_Opcode.rs),_PROGRAM_COUNTER, "PROGRAM_COUNTER");
m_Section->m_Jump.FallThrough = TRUE;
m_Section->m_Jump.LinkLocation = NULL;
m_Section->m_Jump.LinkLocation2 = NULL;
m_Section->m_Cont.FallThrough = FALSE;
m_Section->m_Cont.LinkLocation = NULL;
m_Section->m_Cont.LinkLocation2 = NULL;
m_Section->GenerateSectionLinkage();
} else { } else {
if (IsMapped(m_Opcode.rs)) { MoveX86regToVariable(Map_TempReg(x86_Any,m_Opcode.rs,FALSE),_PROGRAM_COUNTER, "PROGRAM_COUNTER");
MoveX86regToVariable(GetMipsRegMapLo(m_Opcode.rs),_PROGRAM_COUNTER, "PROGRAM_COUNTER"); }
} else { m_Section->CompileExit((DWORD)-1, (DWORD)-1,m_RegWorkingSet,CExitInfo::Normal,TRUE,NULL);
MoveX86regToVariable(Map_TempReg(x86_Any,m_Opcode.rs,FALSE),_PROGRAM_COUNTER, "PROGRAM_COUNTER"); if (m_Section->m_JumpSection)
} {
UpdateCounters(m_RegWorkingSet,true,true); m_Section->GenerateSectionLinkage();
m_Section->CompileExit(m_CompilePC, (DWORD)-1,m_RegWorkingSet,CExitInfo::Normal,TRUE,NULL);
} }
m_NextInstruction = END_BLOCK; m_NextInstruction = END_BLOCK;
} else { } else {