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Core: Change order of MoveX86regToX86Pointer parameters

This commit is contained in:
zilmar 2022-10-24 12:13:48 +10:30
parent ef8067cf12
commit 8713878994
4 changed files with 21 additions and 21 deletions
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8
Source/Project64-core/N64System/Recompiler/CodeBlock.h
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@ -103,10 +103,10 @@ private:
bool AnalyzeInstruction(uint32_t PC, uint32_t & TargetPC, uint32_t & ContinuePC, bool & LikelyBranch, bool & IncludeDelaySlot, bool & EndBlock, bool & PermLoop);
uint32_t m_VAddrEnter;
uint32_t m_VAddrFirst; // The address of the first opcode in the block
uint32_t m_VAddrLast; // The address of the first opcode in the block
uint8_t * m_CompiledLocation; // What address is this compiled at?
uint8_t * m_CompiledLocationEnd; // What address is this compiled at?
uint32_t m_VAddrFirst;
uint32_t m_VAddrLast;
uint8_t * m_CompiledLocation;
uint8_t * m_CompiledLocationEnd;
typedef std::map<uint32_t, CCodeSection *> SectionMap;
typedef std::list<CCodeSection *> SectionList;

26
Source/Project64-core/N64System/Recompiler/x86/x86RecompilerOps.cpp
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@ -3906,7 +3906,7 @@ void CX86RecompilerOps::LWC1()
CX86Ops::x86Reg TempReg2 = Map_TempReg(CX86Ops::x86_Unknown, -1, false, false);
m_Assembler.MoveVariableToX86reg(&_FPR_S[m_Opcode.ft], stdstr_f("_FPR_S[%d]", m_Opcode.ft).c_str(), TempReg2);
m_Assembler.MoveX86regToX86Pointer(TempReg1, TempReg2);
m_Assembler.MoveX86regToX86Pointer(TempReg2, TempReg1);
return;
}
PreReadInstruction();
@ -3914,7 +3914,7 @@ void CX86RecompilerOps::LWC1()
CompileLoadMemoryValue(CX86Ops::x86_Unknown, ValueReg, CX86Ops::x86_Unknown, 32, false);
CX86Ops::x86Reg FPR_SPtr = Map_TempReg(CX86Ops::x86_Unknown, -1, false, false);
m_Assembler.MoveVariableToX86reg(&_FPR_S[m_Opcode.ft], stdstr_f("_FPR_S[%d]", m_Opcode.ft).c_str(), FPR_SPtr);
m_Assembler.MoveX86regToX86Pointer(ValueReg, FPR_SPtr);
m_Assembler.MoveX86regToX86Pointer(FPR_SPtr, ValueReg);
}
void CX86RecompilerOps::LDC1()
@ -3936,11 +3936,11 @@ void CX86RecompilerOps::LDC1()
CX86Ops::x86Reg TempReg2 = Map_TempReg(CX86Ops::x86_Unknown, -1, false, false);
m_Assembler.MoveVariableToX86reg(&_FPR_D[m_Opcode.ft], stdstr_f("_FPR_D[%d]", m_Opcode.ft).c_str(), TempReg2);
m_Assembler.AddConstToX86Reg(TempReg2, 4);
m_Assembler.MoveX86regToX86Pointer(TempReg1, TempReg2);
m_Assembler.MoveX86regToX86Pointer(TempReg2, TempReg1);
LW_KnownAddress(TempReg1, Address + 4);
m_Assembler.MoveVariableToX86reg(&_FPR_D[m_Opcode.ft], stdstr_f("_FPR_S[%d]", m_Opcode.ft).c_str(), TempReg2);
m_Assembler.MoveX86regToX86Pointer(TempReg1, TempReg2);
m_Assembler.MoveX86regToX86Pointer(TempReg2, TempReg1);
}
else
{
@ -3952,9 +3952,9 @@ void CX86RecompilerOps::LDC1()
CX86Ops::x86Reg FPR_DPtr = Map_TempReg(CX86Ops::x86_Unknown, -1, false, false);
m_Assembler.MoveVariableToX86reg(&_FPR_D[m_Opcode.ft], stdstr_f("_FPR_D[%d]", m_Opcode.ft).c_str(), FPR_DPtr);
m_Assembler.MoveX86regToX86Pointer(ValueRegLo, FPR_DPtr);
m_Assembler.MoveX86regToX86Pointer(FPR_DPtr, ValueRegLo);
m_Assembler.AddConstToX86Reg(FPR_DPtr, 4);
m_Assembler.MoveX86regToX86Pointer(ValueRegHi, FPR_DPtr);
m_Assembler.MoveX86regToX86Pointer(FPR_DPtr, ValueRegHi);
}
}
@ -7500,11 +7500,11 @@ void CX86RecompilerOps::COP1_MT()
}
else if (IsMapped(m_Opcode.rt))
{
m_Assembler.MoveX86regToX86Pointer(GetMipsRegMapLo(m_Opcode.rt), TempReg);
m_Assembler.MoveX86regToX86Pointer(TempReg, GetMipsRegMapLo(m_Opcode.rt));
}
else
{
m_Assembler.MoveX86regToX86Pointer(Map_TempReg(CX86Ops::x86_Unknown, m_Opcode.rt, false, false), TempReg);
m_Assembler.MoveX86regToX86Pointer(TempReg, Map_TempReg(CX86Ops::x86_Unknown, m_Opcode.rt, false, false));
}
}
@ -7538,23 +7538,23 @@ void CX86RecompilerOps::COP1_DMT()
}
else if (IsMapped(m_Opcode.rt))
{
m_Assembler.MoveX86regToX86Pointer(GetMipsRegMapLo(m_Opcode.rt), TempReg);
m_Assembler.MoveX86regToX86Pointer(TempReg, GetMipsRegMapLo(m_Opcode.rt));
m_Assembler.AddConstToX86Reg(TempReg, 4);
if (Is64Bit(m_Opcode.rt))
{
m_Assembler.MoveX86regToX86Pointer(GetMipsRegMapHi(m_Opcode.rt), TempReg);
m_Assembler.MoveX86regToX86Pointer(TempReg, GetMipsRegMapHi(m_Opcode.rt));
}
else
{
m_Assembler.MoveX86regToX86Pointer(Map_TempReg(CX86Ops::x86_Unknown, m_Opcode.rt, true, false), TempReg);
m_Assembler.MoveX86regToX86Pointer(TempReg, Map_TempReg(CX86Ops::x86_Unknown, m_Opcode.rt, true, false));
}
}
else
{
CX86Ops::x86Reg Reg = Map_TempReg(CX86Ops::x86_Unknown, m_Opcode.rt, false, false);
m_Assembler.MoveX86regToX86Pointer(Reg, TempReg);
m_Assembler.MoveX86regToX86Pointer(TempReg, Reg);
m_Assembler.AddConstToX86Reg(TempReg, 4);
m_Assembler.MoveX86regToX86Pointer(Map_TempReg(Reg, m_Opcode.rt, true, false), TempReg);
m_Assembler.MoveX86regToX86Pointer(TempReg, Map_TempReg(Reg, m_Opcode.rt, true, false));
}
}

6
Source/Project64-core/N64System/Recompiler/x86/x86ops.cpp
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@ -2004,11 +2004,11 @@ void CX86Ops::MoveX86RegToX86Reg(x86Reg Source, x86Reg Destination)
AddCode16(x86Command);
}
void CX86Ops::MoveX86regToX86Pointer(x86Reg reg, x86Reg X86Pointer)
void CX86Ops::MoveX86regToX86Pointer(x86Reg X86Pointer, x86Reg Reg)
{
uint16_t x86Command = 0;
CodeLog(" mov dword ptr [%s], %s", x86_Name(X86Pointer), x86_Name(reg));
CodeLog(" mov dword ptr [%s], %s", x86_Name(X86Pointer), x86_Name(Reg));
switch (X86Pointer)
{
@ -2022,7 +2022,7 @@ void CX86Ops::MoveX86regToX86Pointer(x86Reg reg, x86Reg X86Pointer)
g_Notify->BreakPoint(__FILE__, __LINE__);
}
switch (reg)
switch (Reg)
{
case x86_EAX: x86Command += 0x0000; break;
case x86_EBX: x86Command += 0x1800; break;

2
Source/Project64-core/N64System/Recompiler/x86/x86ops.h
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@ -171,7 +171,7 @@ public:
void MoveX86regToN64MemDisp(x86Reg reg, x86Reg AddrReg, uint8_t Disp);
void MoveX86regToVariable(x86Reg reg, void * Variable, const char * VariableName);
void MoveX86RegToX86Reg(x86Reg Source, x86Reg Destination);
void MoveX86regToX86Pointer(x86Reg reg, x86Reg X86Pointer);
void MoveX86regToX86Pointer(x86Reg X86Pointer, x86Reg Reg);
void MoveX86regToX86regPointer(x86Reg reg, x86Reg AddrReg1, x86Reg AddrReg2);
void MoveZxByteX86regPointerToX86reg(x86Reg AddrReg1, x86Reg AddrReg2, x86Reg reg);
void MoveZxHalfX86regPointerToX86reg(x86Reg AddrReg1, x86Reg AddrReg2, x86Reg reg);