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Core: [-] Remove the old C style display errors 

[~] Move everything over to the newer notification system
This commit is contained in:
Emmet Young 2012-09-29 23:52:06 +10:00
parent 8d9e7df438
commit 76ca53f8f2
20 changed files with 372 additions and 403 deletions
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6
Source/Project64/N64 System/C Core/BreakPoints.cpp
View File

@ -77,13 +77,13 @@ int Add_R4300iBPoint( DWORD Location, int Confirm ) {
int count; int count;
if (NoOfBpoints == MaxBPoints) { if (NoOfBpoints == MaxBPoints) {
DisplayError("Max amount of Break Points set"); _Notify->DisplayError("Max amount of Break Points set");
return FALSE; return FALSE;
} }
for (count = 0; count < NoOfBpoints; count ++) { for (count = 0; count < NoOfBpoints; count ++) {
if (BPoint[count].Location == Location) { if (BPoint[count].Location == Location) {
DisplayError("You already have this Break Point"); _Notify->DisplayError("You already have this Break Point");
return FALSE; return FALSE;
} }
} }
@ -199,7 +199,7 @@ LRESULT CALLBACK BPoint_Proc (HWND hDlg, UINT uMsg, WPARAM wParam, LPARAM lParam
RspDebug.RemoveBpoint(hList,SendMessage(hList,LB_GETCURSEL,0,0)); RspDebug.RemoveBpoint(hList,SendMessage(hList,LB_GETCURSEL,0,0));
break; break;
} }
DisplayError("what is this BP"); _Notify->DisplayError("what is this BP");
break; break;
case IDC_REMOVEALL_BUTTON: case IDC_REMOVEALL_BUTTON:
NoOfBpoints = 0; NoOfBpoints = 0;

28
Source/Project64/N64 System/C Core/C Core Interface.cpp
View File

@ -71,34 +71,6 @@ void PauseExecution ( void )
{ {
CC_Core::PauseExecution(); CC_Core::PauseExecution();
} }
void DisplayError ( const char * Message, ... )
{
if (_Notify == NULL) { return; }
va_list ap;
va_start( ap, Message );
_Notify->DisplayError(Message,ap);
}
void DisplayMessage ( int DisplayTime, const char * Message, ... )
{
if (_Notify == NULL) { return; }
va_list ap;
va_start( ap, Message );
_Notify->DisplayMessage(DisplayTime, Message,ap);
}
void DisplayMessage2 ( const char * Message, ... )
{
if (_Notify == NULL) { return; }
va_list ap;
va_start( ap, Message );
_Notify->DisplayMessage2(Message,ap);
}
const char * GetAppName ( void ) const char * GetAppName ( void )
{ {
static stdstr szAppName = _Settings->LoadString(Setting_ApplicationName); static stdstr szAppName = _Settings->LoadString(Setting_ApplicationName);

3
Source/Project64/N64 System/C Core/C Core Interface.h
View File

@ -34,9 +34,6 @@ extern "C" {
const char * GetAppName ( void ); const char * GetAppName ( void );
void PauseExecution ( void ); void PauseExecution ( void );
void DisplayError ( const char * Message, ... );
void DisplayMessage ( int DisplayTime, const char * Message, ... );
void DisplayMessage2 ( const char * Message, ... );
void GetAutoSaveDir ( char * Directory ); void GetAutoSaveDir ( char * Directory );
void GetInstantSaveDir ( char * Directory ); void GetInstantSaveDir ( char * Directory );
void SetFpuLocations ( void ); void SetFpuLocations ( void );

4
Source/Project64/N64 System/C Core/Mempak.cpp
View File

@ -53,12 +53,12 @@ void LoadMempak (void) {
hMempakFile = CreateFile(File,GENERIC_WRITE | GENERIC_READ, FILE_SHARE_READ, hMempakFile = CreateFile(File,GENERIC_WRITE | GENERIC_READ, FILE_SHARE_READ,
NULL,OPEN_ALWAYS,FILE_ATTRIBUTE_NORMAL | FILE_FLAG_RANDOM_ACCESS, NULL); NULL,OPEN_ALWAYS,FILE_ATTRIBUTE_NORMAL | FILE_FLAG_RANDOM_ACCESS, NULL);
if (hMempakFile == INVALID_HANDLE_VALUE) { if (hMempakFile == INVALID_HANDLE_VALUE) {
DisplayError(GS(MSG_FAIL_OPEN_MEMPAK)); _Notify->DisplayError(GS(MSG_FAIL_OPEN_MEMPAK));
} }
return; return;
break; break;
default: default:
DisplayError(GS(MSG_FAIL_OPEN_MEMPAK)); _Notify->DisplayError(GS(MSG_FAIL_OPEN_MEMPAK));
return; return;
} }
} }

2
Source/Project64/N64 System/C Core/r4300i Commands.cpp
View File

@ -841,7 +841,7 @@ int DisplayR4300iCommand (DWORD location, int InsertPos) {
return LinesUsed; return LinesUsed;
} }
} __except( r4300i_Command_MemoryFilter( GetExceptionCode(), GetExceptionInformation()) ) { } __except( r4300i_Command_MemoryFilter( GetExceptionCode(), GetExceptionInformation()) ) {
DisplayError(GS(MSG_UNKNOWN_MEM_ACTION)); _Notify->DisplayError(GS(MSG_UNKNOWN_MEM_ACTION));
ExitThread(0); ExitThread(0);
} }
if (SelfModCheck == ModCode_ChangeMemory) { if (SelfModCheck == ModCode_ChangeMemory) {

18
Source/Project64/N64 System/Interpreter/Interpreter CPU.cpp
View File

@ -12,7 +12,7 @@ int DelaySlotEffectsCompare (DWORD PC, DWORD Reg1, DWORD Reg2) {
OPCODE Command; OPCODE Command;
if (!_MMU->LW_VAddr(PC + 4, Command.Hex)) { if (!_MMU->LW_VAddr(PC + 4, Command.Hex)) {
//DisplayError("Failed to load word 2"); //_Notify->DisplayError("Failed to load word 2");
//ExitThread(0); //ExitThread(0);
return TRUE; return TRUE;
} }
@ -68,7 +68,7 @@ int DelaySlotEffectsCompare (DWORD PC, DWORD Reg1, DWORD Reg2) {
break; break;
default: default:
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
DisplayError("Does %s effect Delay slot at %X?",R4300iOpcodeName(Command.Hex,PC+4), PC); _Notify->DisplayError("Does %s effect Delay slot at %X?",R4300iOpcodeName(Command.Hex,PC+4), PC);
#endif #endif
return TRUE; return TRUE;
} }
@ -90,13 +90,13 @@ int DelaySlotEffectsCompare (DWORD PC, DWORD Reg1, DWORD Reg2) {
case R4300i_COP0_CO_TLBP: break; case R4300i_COP0_CO_TLBP: break;
default: default:
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
DisplayError("Does %s effect Delay slot at %X?\n6",R4300iOpcodeName(Command.Hex,PC+4), PC); _Notify->DisplayError("Does %s effect Delay slot at %X?\n6",R4300iOpcodeName(Command.Hex,PC+4), PC);
#endif #endif
return TRUE; return TRUE;
} }
} else { } else {
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
DisplayError("Does %s effect Delay slot at %X?\n7",R4300iOpcodeName(Command.Hex,PC+4), PC); _Notify->DisplayError("Does %s effect Delay slot at %X?\n7",R4300iOpcodeName(Command.Hex,PC+4), PC);
#endif #endif
return TRUE; return TRUE;
} }
@ -118,7 +118,7 @@ int DelaySlotEffectsCompare (DWORD PC, DWORD Reg1, DWORD Reg2) {
case R4300i_COP1_L: break; case R4300i_COP1_L: break;
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
default: default:
DisplayError("Does %s effect Delay slot at %X?",R4300iOpcodeName(Command.Hex,PC+4), PC); _Notify->DisplayError("Does %s effect Delay slot at %X?",R4300iOpcodeName(Command.Hex,PC+4), PC);
#endif #endif
return TRUE; return TRUE;
} }
@ -160,7 +160,7 @@ int DelaySlotEffectsCompare (DWORD PC, DWORD Reg1, DWORD Reg2) {
case R4300i_SD: break; case R4300i_SD: break;
default: default:
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
DisplayError("Does %s effect Delay slot at %X?",R4300iOpcodeName(Command.Hex,PC+4), PC); _Notify->DisplayError("Does %s effect Delay slot at %X?",R4300iOpcodeName(Command.Hex,PC+4), PC);
#endif #endif
return TRUE; return TRUE;
} }
@ -181,7 +181,7 @@ void InPermLoop (void) {
//CurrentFrame = 0; //CurrentFrame = 0;
//CurrentPercent = 0; //CurrentPercent = 0;
//DisplayFPS(); //DisplayFPS();
DisplayError(GS(MSG_PERM_LOOP)); _Notify->DisplayError(GS(MSG_PERM_LOOP));
_System->CloseCpu(); _System->CloseCpu();
} else { } else {
/* check sound playing */ /* check sound playing */
@ -298,7 +298,7 @@ void CInterpreterCPU::ExecuteCPU (void )
} }
} }
} __except( _MMU->MemoryFilter( GetExceptionCode(), GetExceptionInformation()) ) { } __except( _MMU->MemoryFilter( GetExceptionCode(), GetExceptionInformation()) ) {
DisplayError(GS(MSG_UNKNOWN_MEM_ACTION)); _Notify->DisplayError(GS(MSG_UNKNOWN_MEM_ACTION));
ExitThread(0); ExitThread(0);
} }
} }
@ -403,7 +403,7 @@ void CInterpreterCPU::ExecuteOps ( int Cycles )
} }
} }
} __except( _MMU->MemoryFilter( GetExceptionCode(), GetExceptionInformation()) ) { } __except( _MMU->MemoryFilter( GetExceptionCode(), GetExceptionInformation()) ) {
DisplayError(GS(MSG_UNKNOWN_MEM_ACTION)); _Notify->DisplayError(GS(MSG_UNKNOWN_MEM_ACTION));
ExitThread(0); ExitThread(0);
} }
} }

26
Source/Project64/N64 System/Interpreter/Interpreter Ops 32.cpp
View File

@ -835,7 +835,7 @@ void R4300iOp32::LB (void) {
if (!_MMU->LB_VAddr(Address,_GPR[m_Opcode.rt].UB[0])) { if (!_MMU->LB_VAddr(Address,_GPR[m_Opcode.rt].UB[0])) {
if (bShowTLBMisses()) { if (bShowTLBMisses()) {
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
DisplayError("LB TLB: %X",Address); _Notify->DisplayError("LB TLB: %X",Address);
#endif #endif
} }
TLB_READ_EXCEPTION(Address); TLB_READ_EXCEPTION(Address);
@ -849,7 +849,7 @@ void R4300iOp32::LH (void) {
if ((Address & 1) != 0) { ADDRESS_ERROR_EXCEPTION(Address,TRUE); } if ((Address & 1) != 0) { ADDRESS_ERROR_EXCEPTION(Address,TRUE); }
if (!_MMU->LH_VAddr(Address,_GPR[m_Opcode.rt].UHW[0])) { if (!_MMU->LH_VAddr(Address,_GPR[m_Opcode.rt].UHW[0])) {
if (bShowTLBMisses()) { if (bShowTLBMisses()) {
DisplayError("LH TLB: %X",Address); _Notify->DisplayError("LH TLB: %X",Address);
} }
TLB_READ_EXCEPTION(Address); TLB_READ_EXCEPTION(Address);
} else { } else {
@ -868,7 +868,7 @@ void R4300iOp32::LWL (void) {
_Notify->BreakPoint(__FILE__,__LINE__); _Notify->BreakPoint(__FILE__,__LINE__);
if (bShowTLBMisses()) if (bShowTLBMisses())
{ {
DisplayError("LWL TLB: %X",Address); _Notify->DisplayError("LWL TLB: %X",Address);
} }
return; return;
} }
@ -892,7 +892,7 @@ void R4300iOp32::LW (void) {
if (!_MMU->LW_VAddr(Address,_GPR[m_Opcode.rt].UW[0])) { if (!_MMU->LW_VAddr(Address,_GPR[m_Opcode.rt].UW[0])) {
if (bShowTLBMisses()) { if (bShowTLBMisses()) {
DisplayError("LW TLB: %X",Address); _Notify->DisplayError("LW TLB: %X",Address);
} }
TLB_READ_EXCEPTION(Address); TLB_READ_EXCEPTION(Address);
} else { } else {
@ -904,7 +904,7 @@ void R4300iOp32::LBU (void) {
DWORD Address = _GPR[m_Opcode.base].UW[0] + (short)m_Opcode.offset; DWORD Address = _GPR[m_Opcode.base].UW[0] + (short)m_Opcode.offset;
if (!_MMU->LB_VAddr(Address,_GPR[m_Opcode.rt].UB[0])) { if (!_MMU->LB_VAddr(Address,_GPR[m_Opcode.rt].UB[0])) {
if (bShowTLBMisses()) { if (bShowTLBMisses()) {
DisplayError("LBU TLB: %X",Address); _Notify->DisplayError("LBU TLB: %X",Address);
} }
TLB_READ_EXCEPTION(Address); TLB_READ_EXCEPTION(Address);
} else { } else {
@ -917,7 +917,7 @@ void R4300iOp32::LHU (void) {
if ((Address & 1) != 0) { ADDRESS_ERROR_EXCEPTION(Address,TRUE); } if ((Address & 1) != 0) { ADDRESS_ERROR_EXCEPTION(Address,TRUE); }
if (!_MMU->LH_VAddr(Address,_GPR[m_Opcode.rt].UHW[0])) { if (!_MMU->LH_VAddr(Address,_GPR[m_Opcode.rt].UHW[0])) {
if (bShowTLBMisses()) { if (bShowTLBMisses()) {
DisplayError("LHU TLB: %X",Address); _Notify->DisplayError("LHU TLB: %X",Address);
} }
TLB_READ_EXCEPTION(Address); TLB_READ_EXCEPTION(Address);
} else { } else {
@ -936,7 +936,7 @@ void R4300iOp32::LWR (void) {
_Notify->BreakPoint(__FILE__,__LINE__); _Notify->BreakPoint(__FILE__,__LINE__);
if (bShowTLBMisses()) if (bShowTLBMisses())
{ {
DisplayError("LWR TLB: %X",Address); _Notify->DisplayError("LWR TLB: %X",Address);
} }
return; return;
} }
@ -952,7 +952,7 @@ void R4300iOp32::LWU (void) {
if (!_MMU->LW_VAddr(Address,_GPR[m_Opcode.rt].UW[0])) { if (!_MMU->LW_VAddr(Address,_GPR[m_Opcode.rt].UW[0])) {
if (bShowTLBMisses()) { if (bShowTLBMisses()) {
DisplayError("LWU TLB: %X",Address); _Notify->DisplayError("LWU TLB: %X",Address);
} }
TLB_READ_EXCEPTION(Address); TLB_READ_EXCEPTION(Address);
} else { } else {
@ -969,7 +969,7 @@ void R4300iOp32::LL (void) {
if (!_MMU->LW_VAddr(Address,_GPR[m_Opcode.rt].UW[0])) { if (!_MMU->LW_VAddr(Address,_GPR[m_Opcode.rt].UW[0])) {
if (bShowTLBMisses()) { if (bShowTLBMisses()) {
DisplayError("LL TLB: %X",Address); _Notify->DisplayError("LL TLB: %X",Address);
} }
TLB_READ_EXCEPTION(Address); TLB_READ_EXCEPTION(Address);
} else { } else {
@ -1071,7 +1071,7 @@ void R4300iOp32::SPECIAL_SLTU (void) {
void R4300iOp32::SPECIAL_TEQ (void) { void R4300iOp32::SPECIAL_TEQ (void) {
if (_GPR[m_Opcode.rs].W[0] == _GPR[m_Opcode.rt].W[0]) { if (_GPR[m_Opcode.rs].W[0] == _GPR[m_Opcode.rt].W[0]) {
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
DisplayError("Should trap this ???"); _Notify->DisplayError("Should trap this ???");
#endif #endif
} }
} }
@ -1254,7 +1254,7 @@ void R4300iOp32::COP0_MT (void) {
} }
if ((_CP0[m_Opcode.rd] & 0x18) != 0) { if ((_CP0[m_Opcode.rd] & 0x18) != 0) {
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
DisplayError("Left kernel mode ??"); _Notify->DisplayError("Left kernel mode ??");
#endif #endif
} }
_Reg->CheckInterrupts(); _Reg->CheckInterrupts();
@ -1262,7 +1262,7 @@ void R4300iOp32::COP0_MT (void) {
case 13: //cause case 13: //cause
_CP0[m_Opcode.rd] &= 0xFFFFCFF; _CP0[m_Opcode.rd] &= 0xFFFFCFF;
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
if ((_GPR[m_Opcode.rt].UW[0] & 0x300) != 0 ){ DisplayError("Set IP0 or IP1"); } if ((_GPR[m_Opcode.rt].UW[0] & 0x300) != 0 ){ _Notify->DisplayError("Set IP0 or IP1"); }
#endif #endif
break; break;
default: default:
@ -1280,7 +1280,7 @@ void R4300iOp32::COP1_CF (void) {
TEST_COP1_USABLE_EXCEPTION TEST_COP1_USABLE_EXCEPTION
if (m_Opcode.fs != 31 && m_Opcode.fs != 0) { if (m_Opcode.fs != 31 && m_Opcode.fs != 0) {
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
DisplayError("CFC1 what register are you writing to ?"); _Notify->DisplayError("CFC1 what register are you writing to ?");
#endif #endif
return; return;
} }

88
Source/Project64/N64 System/Interpreter/Interpreter Ops.cpp
View File

@ -961,7 +961,7 @@ void R4300iOp::LDL (void) {
_Notify->BreakPoint(__FILE__,__LINE__); _Notify->BreakPoint(__FILE__,__LINE__);
if (bShowTLBMisses()) if (bShowTLBMisses())
{ {
DisplayError("LDL TLB: %X",Address); _Notify->DisplayError("LDL TLB: %X",Address);
} }
return; return;
} }
@ -987,7 +987,7 @@ void R4300iOp::LDR (void) {
_Notify->BreakPoint(__FILE__,__LINE__); _Notify->BreakPoint(__FILE__,__LINE__);
if (bShowTLBMisses()) if (bShowTLBMisses())
{ {
DisplayError("LDR TLB: %X",Address); _Notify->DisplayError("LDR TLB: %X",Address);
} }
return; return;
} }
@ -1003,7 +1003,7 @@ void R4300iOp::LB (void) {
if (!_MMU->LB_VAddr(Address,_GPR[m_Opcode.rt].UB[0])) { if (!_MMU->LB_VAddr(Address,_GPR[m_Opcode.rt].UB[0])) {
if (bShowTLBMisses()) { if (bShowTLBMisses()) {
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
DisplayError("LB TLB: %X",Address); _Notify->DisplayError("LB TLB: %X",Address);
#endif #endif
} }
TLB_READ_EXCEPTION(Address); TLB_READ_EXCEPTION(Address);
@ -1017,7 +1017,7 @@ void R4300iOp::LH (void) {
if ((Address & 1) != 0) { ADDRESS_ERROR_EXCEPTION(Address,TRUE); } if ((Address & 1) != 0) { ADDRESS_ERROR_EXCEPTION(Address,TRUE); }
if (!_MMU->LH_VAddr(Address,_GPR[m_Opcode.rt].UHW[0])) { if (!_MMU->LH_VAddr(Address,_GPR[m_Opcode.rt].UHW[0])) {
if (bShowTLBMisses()) { if (bShowTLBMisses()) {
DisplayError("LH TLB: %X",Address); _Notify->DisplayError("LH TLB: %X",Address);
} }
TLB_READ_EXCEPTION(Address); TLB_READ_EXCEPTION(Address);
} else { } else {
@ -1036,7 +1036,7 @@ void R4300iOp::LWL (void) {
_Notify->BreakPoint(__FILE__,__LINE__); _Notify->BreakPoint(__FILE__,__LINE__);
if (bShowTLBMisses()) if (bShowTLBMisses())
{ {
DisplayError("LWL TLB: %X",Address); _Notify->DisplayError("LWL TLB: %X",Address);
} }
return; return;
} }
@ -1060,7 +1060,7 @@ void R4300iOp::LW (void) {
if (!_MMU->LW_VAddr(Address,_GPR[m_Opcode.rt].UW[0])) { if (!_MMU->LW_VAddr(Address,_GPR[m_Opcode.rt].UW[0])) {
if (bShowTLBMisses()) { if (bShowTLBMisses()) {
DisplayError("LW TLB: %X",Address); _Notify->DisplayError("LW TLB: %X",Address);
} }
TLB_READ_EXCEPTION(Address); TLB_READ_EXCEPTION(Address);
} else { } else {
@ -1072,7 +1072,7 @@ void R4300iOp::LBU (void) {
DWORD Address = _GPR[m_Opcode.base].UW[0] + (short)m_Opcode.offset; DWORD Address = _GPR[m_Opcode.base].UW[0] + (short)m_Opcode.offset;
if (!_MMU->LB_VAddr(Address,_GPR[m_Opcode.rt].UB[0])) { if (!_MMU->LB_VAddr(Address,_GPR[m_Opcode.rt].UB[0])) {
if (bShowTLBMisses()) { if (bShowTLBMisses()) {
DisplayError("LBU TLB: %X",Address); _Notify->DisplayError("LBU TLB: %X",Address);
} }
TLB_READ_EXCEPTION(Address); TLB_READ_EXCEPTION(Address);
} else { } else {
@ -1085,7 +1085,7 @@ void R4300iOp::LHU (void) {
if ((Address & 1) != 0) { ADDRESS_ERROR_EXCEPTION(Address,TRUE); } if ((Address & 1) != 0) { ADDRESS_ERROR_EXCEPTION(Address,TRUE); }
if (!_MMU->LH_VAddr(Address,_GPR[m_Opcode.rt].UHW[0])) { if (!_MMU->LH_VAddr(Address,_GPR[m_Opcode.rt].UHW[0])) {
if (bShowTLBMisses()) { if (bShowTLBMisses()) {
DisplayError("LHU TLB: %X",Address); _Notify->DisplayError("LHU TLB: %X",Address);
} }
TLB_READ_EXCEPTION(Address); TLB_READ_EXCEPTION(Address);
} else { } else {
@ -1104,7 +1104,7 @@ void R4300iOp::LWR (void) {
_Notify->BreakPoint(__FILE__,__LINE__); _Notify->BreakPoint(__FILE__,__LINE__);
if (bShowTLBMisses()) if (bShowTLBMisses())
{ {
DisplayError("LWR TLB: %X",Address); _Notify->DisplayError("LWR TLB: %X",Address);
} }
return; return;
} }
@ -1120,7 +1120,7 @@ void R4300iOp::LWU (void) {
if (!_MMU->LW_VAddr(Address,_GPR[m_Opcode.rt].UW[0])) { if (!_MMU->LW_VAddr(Address,_GPR[m_Opcode.rt].UW[0])) {
if (bShowTLBMisses()) { if (bShowTLBMisses()) {
DisplayError("LWU TLB: %X",Address); _Notify->DisplayError("LWU TLB: %X",Address);
} }
TLB_READ_EXCEPTION(Address); TLB_READ_EXCEPTION(Address);
} else { } else {
@ -1133,7 +1133,7 @@ void R4300iOp::SB (void) {
if (!_MMU->SB_VAddr(Address,_GPR[m_Opcode.rt].UB[0])) { if (!_MMU->SB_VAddr(Address,_GPR[m_Opcode.rt].UB[0])) {
_Notify->BreakPoint(__FILE__,__LINE__); _Notify->BreakPoint(__FILE__,__LINE__);
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
DisplayError("SB TLB: %X",Address); _Notify->DisplayError("SB TLB: %X",Address);
#endif #endif
} }
} }
@ -1144,7 +1144,7 @@ void R4300iOp::SH (void) {
if (!_MMU->SH_VAddr(Address,_GPR[m_Opcode.rt].UHW[0])) { if (!_MMU->SH_VAddr(Address,_GPR[m_Opcode.rt].UHW[0])) {
_Notify->BreakPoint(__FILE__,__LINE__); _Notify->BreakPoint(__FILE__,__LINE__);
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
DisplayError("SH TLB: %X",Address); _Notify->DisplayError("SH TLB: %X",Address);
#endif #endif
} }
} }
@ -1157,7 +1157,7 @@ void R4300iOp::SWL (void) {
if (!_MMU->LW_VAddr((Address & ~3),Value)) { if (!_MMU->LW_VAddr((Address & ~3),Value)) {
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
DisplayError("SWL TLB: %X",Address); _Notify->DisplayError("SWL TLB: %X",Address);
#endif #endif
_Notify->BreakPoint(__FILE__,__LINE__); _Notify->BreakPoint(__FILE__,__LINE__);
return; return;
@ -1168,7 +1168,7 @@ void R4300iOp::SWL (void) {
if (!_MMU->SW_VAddr((Address & ~0x03),Value)) { if (!_MMU->SW_VAddr((Address & ~0x03),Value)) {
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
DisplayError("SWL TLB: %X",Address); _Notify->DisplayError("SWL TLB: %X",Address);
#endif #endif
_Notify->BreakPoint(__FILE__,__LINE__); _Notify->BreakPoint(__FILE__,__LINE__);
} }
@ -1189,7 +1189,7 @@ void R4300iOp::SW (void) {
_Notify->BreakPoint(__FILE__,__LINE__); _Notify->BreakPoint(__FILE__,__LINE__);
if (bShowTLBMisses()) if (bShowTLBMisses())
{ {
DisplayError("SW TLB: %X",Address); _Notify->DisplayError("SW TLB: %X",Address);
} }
} }
} }
@ -1214,7 +1214,7 @@ void R4300iOp::SDL (void) {
if (!_MMU->LD_VAddr((Address & ~7),Value)) { if (!_MMU->LD_VAddr((Address & ~7),Value)) {
_Notify->BreakPoint(__FILE__,__LINE__); _Notify->BreakPoint(__FILE__,__LINE__);
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
DisplayError("SDL TLB: %X",Address); _Notify->DisplayError("SDL TLB: %X",Address);
#endif #endif
return; return;
} }
@ -1225,7 +1225,7 @@ void R4300iOp::SDL (void) {
if (!_MMU->SD_VAddr((Address & ~7),Value)) { if (!_MMU->SD_VAddr((Address & ~7),Value)) {
_Notify->BreakPoint(__FILE__,__LINE__); _Notify->BreakPoint(__FILE__,__LINE__);
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
DisplayError("SDL TLB: %X",Address); _Notify->DisplayError("SDL TLB: %X",Address);
#endif #endif
} }
} }
@ -1251,7 +1251,7 @@ void R4300iOp::SDR (void) {
if (!_MMU->LD_VAddr((Address & ~7),Value)) { if (!_MMU->LD_VAddr((Address & ~7),Value)) {
_Notify->BreakPoint(__FILE__,__LINE__); _Notify->BreakPoint(__FILE__,__LINE__);
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
DisplayError("SDL TLB: %X",Address); _Notify->DisplayError("SDL TLB: %X",Address);
#endif #endif
return; return;
} }
@ -1262,7 +1262,7 @@ void R4300iOp::SDR (void) {
if (!_MMU->SD_VAddr((Address & ~7),Value)) { if (!_MMU->SD_VAddr((Address & ~7),Value)) {
_Notify->BreakPoint(__FILE__,__LINE__); _Notify->BreakPoint(__FILE__,__LINE__);
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
DisplayError("SDL TLB: %X",Address); _Notify->DisplayError("SDL TLB: %X",Address);
#endif #endif
} }
} }
@ -1276,7 +1276,7 @@ void R4300iOp::SWR (void) {
if (!_MMU->LW_VAddr((Address & ~3),Value)) { if (!_MMU->LW_VAddr((Address & ~3),Value)) {
_Notify->BreakPoint(__FILE__,__LINE__); _Notify->BreakPoint(__FILE__,__LINE__);
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
DisplayError("SWL TLB: %X",Address); _Notify->DisplayError("SWL TLB: %X",Address);
#endif #endif
return; return;
} }
@ -1287,7 +1287,7 @@ void R4300iOp::SWR (void) {
if (!_MMU->SW_VAddr((Address & ~0x03),Value)) { if (!_MMU->SW_VAddr((Address & ~0x03),Value)) {
_Notify->BreakPoint(__FILE__,__LINE__); _Notify->BreakPoint(__FILE__,__LINE__);
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
DisplayError("SWL TLB: %X",Address); _Notify->DisplayError("SWL TLB: %X",Address);
#endif #endif
} }
} }
@ -1308,7 +1308,7 @@ void R4300iOp::LL (void) {
if (!_MMU->LW_VAddr(Address,_GPR[m_Opcode.rt].UW[0])) { if (!_MMU->LW_VAddr(Address,_GPR[m_Opcode.rt].UW[0])) {
if (bShowTLBMisses()) { if (bShowTLBMisses()) {
DisplayError("LL TLB: %X",Address); _Notify->DisplayError("LL TLB: %X",Address);
} }
TLB_READ_EXCEPTION(Address); TLB_READ_EXCEPTION(Address);
} else { } else {
@ -1323,7 +1323,7 @@ void R4300iOp::LWC1 (void) {
if ((Address & 3) != 0) { ADDRESS_ERROR_EXCEPTION(Address,TRUE); } if ((Address & 3) != 0) { ADDRESS_ERROR_EXCEPTION(Address,TRUE); }
if (!_MMU->LW_VAddr(Address,*(DWORD *)_FPR_S[m_Opcode.ft])) { if (!_MMU->LW_VAddr(Address,*(DWORD *)_FPR_S[m_Opcode.ft])) {
if (bShowTLBMisses()) { if (bShowTLBMisses()) {
DisplayError("LWC1 TLB: %X",Address); _Notify->DisplayError("LWC1 TLB: %X",Address);
} }
TLB_READ_EXCEPTION(Address); TLB_READ_EXCEPTION(Address);
} }
@ -1341,7 +1341,7 @@ void R4300iOp::SC (void) {
_Notify->BreakPoint(__FILE__,__LINE__); _Notify->BreakPoint(__FILE__,__LINE__);
if (bShowTLBMisses()) if (bShowTLBMisses())
{ {
DisplayError("SC TLB: %X",Address); _Notify->DisplayError("SC TLB: %X",Address);
} }
} }
} }
@ -1354,7 +1354,7 @@ void R4300iOp::LD (void) {
if (!_MMU->LD_VAddr(Address,_GPR[m_Opcode.rt].UDW)) { if (!_MMU->LD_VAddr(Address,_GPR[m_Opcode.rt].UDW)) {
_Notify->BreakPoint(__FILE__,__LINE__); _Notify->BreakPoint(__FILE__,__LINE__);
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
DisplayError("LD TLB: %X",Address); _Notify->DisplayError("LD TLB: %X",Address);
#endif #endif
} }
#ifdef Interpreter_StackTest #ifdef Interpreter_StackTest
@ -1373,7 +1373,7 @@ void R4300iOp::LDC1 (void) {
if (!_MMU->LD_VAddr(Address,*(unsigned __int64 *)_FPR_D[m_Opcode.ft])) { if (!_MMU->LD_VAddr(Address,*(unsigned __int64 *)_FPR_D[m_Opcode.ft])) {
_Notify->BreakPoint(__FILE__,__LINE__); _Notify->BreakPoint(__FILE__,__LINE__);
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
DisplayError("LD TLB: %X",Address); _Notify->DisplayError("LD TLB: %X",Address);
#endif #endif
} }
} }
@ -1386,7 +1386,7 @@ void R4300iOp::SWC1 (void) {
if (!_MMU->SW_VAddr(Address,*(DWORD *)_FPR_S[m_Opcode.ft])) { if (!_MMU->SW_VAddr(Address,*(DWORD *)_FPR_S[m_Opcode.ft])) {
_Notify->BreakPoint(__FILE__,__LINE__); _Notify->BreakPoint(__FILE__,__LINE__);
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
DisplayError("SWC1 TLB: %X",Address); _Notify->DisplayError("SWC1 TLB: %X",Address);
#endif #endif
} }
} }
@ -1399,7 +1399,7 @@ void R4300iOp::SDC1 (void) {
if (!_MMU->SD_VAddr(Address,*(__int64 *)_FPR_D[m_Opcode.ft])) { if (!_MMU->SD_VAddr(Address,*(__int64 *)_FPR_D[m_Opcode.ft])) {
_Notify->BreakPoint(__FILE__,__LINE__); _Notify->BreakPoint(__FILE__,__LINE__);
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
DisplayError("SDC1 TLB: %X",Address); _Notify->DisplayError("SDC1 TLB: %X",Address);
#endif #endif
} }
} }
@ -1410,7 +1410,7 @@ void R4300iOp::SD (void) {
if (!_MMU->SD_VAddr(Address,_GPR[m_Opcode.rt].UDW)) { if (!_MMU->SD_VAddr(Address,_GPR[m_Opcode.rt].UDW)) {
_Notify->BreakPoint(__FILE__,__LINE__); _Notify->BreakPoint(__FILE__,__LINE__);
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
DisplayError("SD TLB: %X",Address); _Notify->DisplayError("SD TLB: %X",Address);
#endif #endif
} }
} }
@ -1514,7 +1514,7 @@ void R4300iOp::SPECIAL_DIV (void) {
_RegHI->DW = _GPR[m_Opcode.rs].W[0] % _GPR[m_Opcode.rt].W[0]; _RegHI->DW = _GPR[m_Opcode.rs].W[0] % _GPR[m_Opcode.rt].W[0];
} else { } else {
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
DisplayError("DIV by 0 ???"); _Notify->DisplayError("DIV by 0 ???");
#endif #endif
} }
} }
@ -1525,7 +1525,7 @@ void R4300iOp::SPECIAL_DIVU (void) {
_RegHI->DW = (int)(_GPR[m_Opcode.rs].UW[0] % _GPR[m_Opcode.rt].UW[0]); _RegHI->DW = (int)(_GPR[m_Opcode.rs].UW[0] % _GPR[m_Opcode.rt].UW[0]);
} else { } else {
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
DisplayError("DIVU by 0 ???"); _Notify->DisplayError("DIVU by 0 ???");
#endif #endif
} }
} }
@ -1563,7 +1563,7 @@ void R4300iOp::SPECIAL_DDIV (void) {
_RegHI->DW = _GPR[m_Opcode.rs].DW % _GPR[m_Opcode.rt].DW; _RegHI->DW = _GPR[m_Opcode.rs].DW % _GPR[m_Opcode.rt].DW;
} else { } else {
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
DisplayError("DDIV by 0 ???"); _Notify->DisplayError("DDIV by 0 ???");
#endif #endif
} }
} }
@ -1574,7 +1574,7 @@ void R4300iOp::SPECIAL_DDIVU (void) {
_RegHI->UDW = _GPR[m_Opcode.rs].UDW % _GPR[m_Opcode.rt].UDW; _RegHI->UDW = _GPR[m_Opcode.rs].UDW % _GPR[m_Opcode.rt].UDW;
} else { } else {
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
DisplayError("DDIVU by 0 ???"); _Notify->DisplayError("DDIVU by 0 ???");
#endif #endif
} }
} }
@ -1651,7 +1651,7 @@ void R4300iOp::SPECIAL_DSUBU (void) {
void R4300iOp::SPECIAL_TEQ (void) { void R4300iOp::SPECIAL_TEQ (void) {
if (_GPR[m_Opcode.rs].DW == _GPR[m_Opcode.rt].DW) { if (_GPR[m_Opcode.rs].DW == _GPR[m_Opcode.rt].DW) {
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
DisplayError("Should trap this ???"); _Notify->DisplayError("Should trap this ???");
#endif #endif
} }
} }
@ -1848,7 +1848,7 @@ void R4300iOp::COP0_MT (void) {
} }
if ((_CP0[m_Opcode.rd] & 0x18) != 0) { if ((_CP0[m_Opcode.rd] & 0x18) != 0) {
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
DisplayError("Left kernel mode ??"); _Notify->DisplayError("Left kernel mode ??");
#endif #endif
} }
_Reg->CheckInterrupts(); _Reg->CheckInterrupts();
@ -1856,7 +1856,7 @@ void R4300iOp::COP0_MT (void) {
case 13: //cause case 13: //cause
_CP0[m_Opcode.rd] &= 0xFFFFCFF; _CP0[m_Opcode.rd] &= 0xFFFFCFF;
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
if ((_GPR[m_Opcode.rt].UW[0] & 0x300) != 0 ){ DisplayError("Set IP0 or IP1"); } if ((_GPR[m_Opcode.rt].UW[0] & 0x300) != 0 ){ _Notify->DisplayError("Set IP0 or IP1"); }
#endif #endif
break; break;
default: default:
@ -1914,7 +1914,7 @@ void R4300iOp::COP1_CF (void) {
TEST_COP1_USABLE_EXCEPTION TEST_COP1_USABLE_EXCEPTION
if (m_Opcode.fs != 31 && m_Opcode.fs != 0) { if (m_Opcode.fs != 31 && m_Opcode.fs != 0) {
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
DisplayError("CFC1 what register are you writing to ?"); _Notify->DisplayError("CFC1 what register are you writing to ?");
#endif #endif
return; return;
} }
@ -1944,7 +1944,7 @@ void R4300iOp::COP1_CT (void) {
return; return;
} }
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
DisplayError("CTC1 what register are you writing to ?"); _Notify->DisplayError("CTC1 what register are you writing to ?");
#endif #endif
} }
@ -2128,14 +2128,14 @@ void R4300iOp::COP1_S_CMP (void) {
if (_isnan(Temp0) || _isnan(Temp1)) { if (_isnan(Temp0) || _isnan(Temp1)) {
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
DisplayError("Nan ?"); _Notify->DisplayError("Nan ?");
#endif #endif
less = FALSE; less = FALSE;
equal = FALSE; equal = FALSE;
unorded = TRUE; unorded = TRUE;
if ((m_Opcode.funct & 8) != 0) { if ((m_Opcode.funct & 8) != 0) {
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
DisplayError("Signal InvalidOperationException\nin r4300i_COP1_S_CMP\n%X %ff\n%X %ff", _Notify->DisplayError("Signal InvalidOperationException\nin r4300i_COP1_S_CMP\n%X %ff\n%X %ff",
Temp0,Temp0,Temp1,Temp1); Temp0,Temp0,Temp1,Temp1);
#endif #endif
} }
@ -2294,14 +2294,14 @@ void R4300iOp::COP1_D_CMP (void) {
if (_isnan(Temp0.D) || _isnan(Temp1.D)) { if (_isnan(Temp0.D) || _isnan(Temp1.D)) {
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
DisplayError("Nan ?"); _Notify->DisplayError("Nan ?");
#endif #endif
less = FALSE; less = FALSE;
equal = FALSE; equal = FALSE;
unorded = TRUE; unorded = TRUE;
if ((m_Opcode.funct & 8) != 0) { if ((m_Opcode.funct & 8) != 0) {
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
DisplayError("Signal InvalidOperationException\nin r4300i_COP1_D_CMP"); _Notify->DisplayError("Signal InvalidOperationException\nin r4300i_COP1_D_CMP");
#endif #endif
} }
} else { } else {
@ -2349,7 +2349,7 @@ void R4300iOp::COP1_L_CVT_D (void) {
/************************** Other functions **************************/ /************************** Other functions **************************/
void R4300iOp::UnknownOpcode (void) void R4300iOp::UnknownOpcode (void)
{ {
DisplayError("%s: %08X\n%s\n\nStopping Emulation !", GS(MSG_UNHANDLED_OP), (*_PROGRAM_COUNTER), _Notify->DisplayError("%s: %08X\n%s\n\nStopping Emulation !", GS(MSG_UNHANDLED_OP), (*_PROGRAM_COUNTER),
R4300iOpcodeName(m_Opcode.Hex,(*_PROGRAM_COUNTER))); R4300iOpcodeName(m_Opcode.Hex,(*_PROGRAM_COUNTER)));
_System->m_EndEmulation = true; _System->m_EndEmulation = true;
@ -2366,7 +2366,7 @@ void R4300iOp::UnknownOpcode (void)
} }
ExitThread(0); ExitThread(0);
} else { } else {
DisplayError(Message); _Notify->DisplayError(Message);
ExitThread(0); ExitThread(0);
} }
#endif #endif

20
Source/Project64/N64 System/Mips/Dma.cpp
View File

@ -13,7 +13,7 @@ void CDMA::OnFirstDMA (void) {
case 3: *(DWORD *)&((_MMU->Rdram())[0x318]) = _MMU->RdramSize(); break; case 3: *(DWORD *)&((_MMU->Rdram())[0x318]) = _MMU->RdramSize(); break;
case 5: *(DWORD *)&((_MMU->Rdram())[0x3F0]) = _MMU->RdramSize(); break; case 5: *(DWORD *)&((_MMU->Rdram())[0x3F0]) = _MMU->RdramSize(); break;
case 6: *(DWORD *)&((_MMU->Rdram())[0x318]) = _MMU->RdramSize(); break; case 6: *(DWORD *)&((_MMU->Rdram())[0x318]) = _MMU->RdramSize(); break;
default: DisplayError("Unhandled CicChip(%d) in first DMA",_Rom->CicChipID()); default: _Notify->DisplayError("Unhandled CicChip(%d) in first DMA",_Rom->CicChipID());
} }
} }
@ -22,7 +22,7 @@ void CDMA::PI_DMA_READ (void) {
if ( _Reg->PI_DRAM_ADDR_REG + _Reg->PI_RD_LEN_REG + 1 > _MMU->RdramSize()) { if ( _Reg->PI_DRAM_ADDR_REG + _Reg->PI_RD_LEN_REG + 1 > _MMU->RdramSize()) {
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
DisplayError("PI_DMA_READ not in Memory"); _Notify->DisplayError("PI_DMA_READ not in Memory");
#endif #endif
_Reg->PI_STATUS_REG &= ~PI_STATUS_DMA_BUSY; _Reg->PI_STATUS_REG &= ~PI_STATUS_DMA_BUSY;
_Reg->MI_INTR_REG |= MI_INTR_PI; _Reg->MI_INTR_REG |= MI_INTR_PI;
@ -57,14 +57,14 @@ void CDMA::PI_DMA_READ (void) {
} }
if (g_SaveUsing == SaveChip_FlashRam) if (g_SaveUsing == SaveChip_FlashRam)
{ {
DisplayError("**** FLashRam DMA Read address %X *****",_Reg->PI_CART_ADDR_REG); _Notify->DisplayError("**** FLashRam DMA Read address %X *****",_Reg->PI_CART_ADDR_REG);
_Reg->PI_STATUS_REG &= ~PI_STATUS_DMA_BUSY; _Reg->PI_STATUS_REG &= ~PI_STATUS_DMA_BUSY;
_Reg->MI_INTR_REG |= MI_INTR_PI; _Reg->MI_INTR_REG |= MI_INTR_PI;
_Reg->CheckInterrupts(); _Reg->CheckInterrupts();
return; return;
} }
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
DisplayError("PI_DMA_READ where are you dmaing to ?"); _Notify->DisplayError("PI_DMA_READ where are you dmaing to ?");
#endif #endif
_Reg->PI_STATUS_REG &= ~PI_STATUS_DMA_BUSY; _Reg->PI_STATUS_REG &= ~PI_STATUS_DMA_BUSY;
_Reg->MI_INTR_REG |= MI_INTR_PI; _Reg->MI_INTR_REG |= MI_INTR_PI;
@ -77,7 +77,7 @@ void CDMA::PI_DMA_WRITE (void) {
_Reg->PI_STATUS_REG |= PI_STATUS_DMA_BUSY; _Reg->PI_STATUS_REG |= PI_STATUS_DMA_BUSY;
if ( _Reg->PI_DRAM_ADDR_REG + _Reg->PI_WR_LEN_REG + 1 > _MMU->RdramSize()) if ( _Reg->PI_DRAM_ADDR_REG + _Reg->PI_WR_LEN_REG + 1 > _MMU->RdramSize())
{ {
if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { DisplayError("PI_DMA_WRITE not in Memory"); } if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { _Notify->DisplayError("PI_DMA_WRITE not in Memory"); }
_Reg->PI_STATUS_REG &= ~PI_STATUS_DMA_BUSY; _Reg->PI_STATUS_REG &= ~PI_STATUS_DMA_BUSY;
_Reg->MI_INTR_REG |= MI_INTR_PI; _Reg->MI_INTR_REG |= MI_INTR_PI;
_Reg->CheckInterrupts(); _Reg->CheckInterrupts();
@ -157,7 +157,7 @@ void CDMA::PI_DMA_WRITE (void) {
return; return;
} }
if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { DisplayError("PI_DMA_WRITE not in ROM"); } if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { _Notify->DisplayError("PI_DMA_WRITE not in ROM"); }
_Reg->PI_STATUS_REG &= ~PI_STATUS_DMA_BUSY; _Reg->PI_STATUS_REG &= ~PI_STATUS_DMA_BUSY;
_Reg->MI_INTR_REG |= MI_INTR_PI; _Reg->MI_INTR_REG |= MI_INTR_PI;
_Reg->CheckInterrupts(); _Reg->CheckInterrupts();
@ -169,7 +169,7 @@ void CDMA::SP_DMA_READ (void) {
if (_Reg->SP_DRAM_ADDR_REG > _MMU->RdramSize()) { if (_Reg->SP_DRAM_ADDR_REG > _MMU->RdramSize()) {
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
DisplayError("SP DMA\nSP_DRAM_ADDR_REG not in RDRam space"); _Notify->DisplayError("SP DMA\nSP_DRAM_ADDR_REG not in RDRam space");
#endif #endif
_Reg->SP_DMA_BUSY_REG = 0; _Reg->SP_DMA_BUSY_REG = 0;
_Reg->SP_STATUS_REG &= ~SP_STATUS_DMA_BUSY; _Reg->SP_STATUS_REG &= ~SP_STATUS_DMA_BUSY;
@ -178,7 +178,7 @@ void CDMA::SP_DMA_READ (void) {
if (_Reg->SP_RD_LEN_REG + 1 + (_Reg->SP_MEM_ADDR_REG & 0xFFF) > 0x1000) { if (_Reg->SP_RD_LEN_REG + 1 + (_Reg->SP_MEM_ADDR_REG & 0xFFF) > 0x1000) {
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
DisplayError("SP DMA\ncould not fit copy in memory segement"); _Notify->DisplayError("SP DMA\ncould not fit copy in memory segement");
#endif #endif
return; return;
} }
@ -197,14 +197,14 @@ void CDMA::SP_DMA_READ (void) {
void CDMA::SP_DMA_WRITE (void) { void CDMA::SP_DMA_WRITE (void) {
if (_Reg->SP_DRAM_ADDR_REG > _MMU->RdramSize()) { if (_Reg->SP_DRAM_ADDR_REG > _MMU->RdramSize()) {
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
DisplayError("SP DMA WRITE\nSP_DRAM_ADDR_REG not in RDRam space"); _Notify->DisplayError("SP DMA WRITE\nSP_DRAM_ADDR_REG not in RDRam space");
#endif #endif
return; return;
} }
if (_Reg->SP_WR_LEN_REG + 1 + (_Reg->SP_MEM_ADDR_REG & 0xFFF) > 0x1000) { if (_Reg->SP_WR_LEN_REG + 1 + (_Reg->SP_MEM_ADDR_REG & 0xFFF) > 0x1000) {
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
DisplayError("SP DMA WRITE\ncould not fit copy in memory segement"); _Notify->DisplayError("SP DMA WRITE\ncould not fit copy in memory segement");
#endif #endif
return; return;
} }

12
Source/Project64/N64 System/Mips/Eeprom.cpp
View File

@ -51,15 +51,15 @@ void CEeprom::EepromCommand ( BYTE * Command) {
break; break;
case 4: // Read from Eeprom case 4: // Read from Eeprom
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
if (Command[0] != 2) { DisplayError("What am I meant to do with this Eeprom Command"); } if (Command[0] != 2) { _Notify->DisplayError("What am I meant to do with this Eeprom Command"); }
if (Command[1] != 8) { DisplayError("What am I meant to do with this Eeprom Command"); } if (Command[1] != 8) { _Notify->DisplayError("What am I meant to do with this Eeprom Command"); }
#endif #endif
ReadFrom(&Command[4],Command[3]); ReadFrom(&Command[4],Command[3]);
break; break;
case 5: case 5:
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
if (Command[0] != 10) { DisplayError("What am I meant to do with this Eeprom Command"); } if (Command[0] != 10) { _Notify->DisplayError("What am I meant to do with this Eeprom Command"); }
if (Command[1] != 1) { DisplayError("What am I meant to do with this Eeprom Command"); } if (Command[1] != 1) { _Notify->DisplayError("What am I meant to do with this Eeprom Command"); }
#endif #endif
WriteTo(&Command[4],Command[3]); WriteTo(&Command[4],Command[3]);
break; break;
@ -98,7 +98,7 @@ void CEeprom::EepromCommand ( BYTE * Command) {
//Write RTC, unimplemented //Write RTC, unimplemented
break; break;
default: default:
if (_Settings->LoadDword(Debugger_ShowPifErrors)) { DisplayError("Unknown EepromCommand %d",Command[2]); } if (_Settings->LoadDword(Debugger_ShowPifErrors)) { _Notify->DisplayError("Unknown EepromCommand %d",Command[2]); }
} }
} }
@ -122,7 +122,7 @@ void CEeprom::LoadEeprom (void) {
if (m_hFile == INVALID_HANDLE_VALUE) if (m_hFile == INVALID_HANDLE_VALUE)
{ {
WriteTraceF(TraceError,"CEeprom::LoadEeprom: Failed to open (%s), ReadOnly = %d, LastError = %X",(LPCTSTR)FileName, m_ReadOnly, GetLastError()); WriteTraceF(TraceError,"CEeprom::LoadEeprom: Failed to open (%s), ReadOnly = %d, LastError = %X",(LPCTSTR)FileName, m_ReadOnly, GetLastError());
DisplayError(GS(MSG_FAIL_OPEN_EEPROM)); _Notify->DisplayError(GS(MSG_FAIL_OPEN_EEPROM));
return; return;
} }
SetFilePointer(m_hFile,0,NULL,FILE_BEGIN); SetFilePointer(m_hFile,0,NULL,FILE_BEGIN);

18
Source/Project64/N64 System/Mips/FlashRam.cpp
View File

@ -29,13 +29,13 @@ void CFlashram::DmaFromFlashram ( BYTE * dest, int StartOffset, int len)
} }
if (len > 0x10000) { if (len > 0x10000) {
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
DisplayError("DmaFromFlashram FlipBuffer to small (len: %d)",len); _Notify->DisplayError("DmaFromFlashram FlipBuffer to small (len: %d)",len);
#endif #endif
len = 0x10000; len = 0x10000;
} }
if ((len & 3) != 0) { if ((len & 3) != 0) {
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
DisplayError("Unaligned flash ram read ???"); _Notify->DisplayError("Unaligned flash ram read ???");
#endif #endif
return; return;
} }
@ -64,7 +64,7 @@ void CFlashram::DmaFromFlashram ( BYTE * dest, int StartOffset, int len)
case FLASHRAM_MODE_STATUS: case FLASHRAM_MODE_STATUS:
if (StartOffset != 0 && len != 8) { if (StartOffset != 0 && len != 8) {
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
DisplayError("Reading m_FlashStatus not being handled correctly\nStart: %X len: %X",StartOffset,len); _Notify->DisplayError("Reading m_FlashStatus not being handled correctly\nStart: %X len: %X",StartOffset,len);
#endif #endif
} }
*((DWORD *)(dest)) = (DWORD)(m_FlashStatus >> 32); *((DWORD *)(dest)) = (DWORD)(m_FlashStatus >> 32);
@ -72,7 +72,7 @@ void CFlashram::DmaFromFlashram ( BYTE * dest, int StartOffset, int len)
break; break;
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
default: default:
DisplayError("DmaFromFlashram Start: %X, Offset: %X len: %X",dest - _MMU->Rdram(),StartOffset,len); _Notify->DisplayError("DmaFromFlashram Start: %X, Offset: %X len: %X",dest - _MMU->Rdram(),StartOffset,len);
#endif #endif
} }
} }
@ -84,7 +84,7 @@ void CFlashram::DmaToFlashram(BYTE * Source, int StartOffset, int len) {
break; break;
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
default: default:
DisplayError("DmaToFlashram Start: %X, Offset: %X len: %X",Source - _MMU->Rdram(),StartOffset,len); _Notify->DisplayError("DmaToFlashram Start: %X, Offset: %X len: %X",Source - _MMU->Rdram(),StartOffset,len);
#endif #endif
} }
} }
@ -96,7 +96,7 @@ DWORD CFlashram::ReadFromFlashStatus (DWORD PAddr)
case 0x08000000: return (DWORD)(m_FlashStatus >> 32); case 0x08000000: return (DWORD)(m_FlashStatus >> 32);
default: default:
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
DisplayError("Reading from flash ram status (%X)",PAddr); _Notify->DisplayError("Reading from flash ram status (%X)",PAddr);
#endif #endif
break; break;
} }
@ -120,7 +120,7 @@ bool CFlashram::LoadFlashram (void) {
if (m_hFile == INVALID_HANDLE_VALUE) if (m_hFile == INVALID_HANDLE_VALUE)
{ {
WriteTraceF(TraceError,"CFlashram::LoadFlashram: Failed to open (%s), ReadOnly = %d, LastError = %X",(LPCTSTR)FileName, m_ReadOnly, GetLastError()); WriteTraceF(TraceError,"CFlashram::LoadFlashram: Failed to open (%s), ReadOnly = %d, LastError = %X",(LPCTSTR)FileName, m_ReadOnly, GetLastError());
DisplayError(GS(MSG_FAIL_OPEN_FLASH)); _Notify->DisplayError(GS(MSG_FAIL_OPEN_FLASH));
return false; return false;
} }
SetFilePointer(m_hFile,0,NULL,FILE_BEGIN); SetFilePointer(m_hFile,0,NULL,FILE_BEGIN);
@ -174,7 +174,7 @@ void CFlashram::WriteToFlashCommand(DWORD FlashRAM_Command) {
} }
break; break;
default: default:
DisplayError("Writing %X to flash ram command register\nm_FlashFlag: %d",FlashRAM_Command,m_FlashFlag); _Notify->DisplayError("Writing %X to flash ram command register\nm_FlashFlag: %d",FlashRAM_Command,m_FlashFlag);
} }
m_FlashFlag = FLASHRAM_MODE_NOPES; m_FlashFlag = FLASHRAM_MODE_NOPES;
break; break;
@ -202,7 +202,7 @@ void CFlashram::WriteToFlashCommand(DWORD FlashRAM_Command) {
break; break;
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
default: default:
DisplayError("Writing %X to flash ram command register",FlashRAM_Command); _Notify->DisplayError("Writing %X to flash ram command register",FlashRAM_Command);
#endif #endif
} }
} }

132
Source/Project64/N64 System/Mips/Memory Virtual Mem.cpp
View File

@ -298,7 +298,7 @@ void CMipsMemoryVM::Compile_LB ( x86Reg Reg, DWORD VAddr, BOOL SignExtend) {
if (!TranslateVaddr(VAddr,PAddr)) { if (!TranslateVaddr(VAddr,PAddr)) {
MoveConstToX86reg(0,Reg); MoveConstToX86reg(0,Reg);
CPU_Message("Compile_LB\nFailed to translate address %X",VAddr); CPU_Message("Compile_LB\nFailed to translate address %X",VAddr);
if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { DisplayError("Compile_LB\nFailed to translate address %X",VAddr); } if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { _Notify->DisplayError("Compile_LB\nFailed to translate address %X",VAddr); }
return; return;
} }
@ -321,7 +321,7 @@ void CMipsMemoryVM::Compile_LB ( x86Reg Reg, DWORD VAddr, BOOL SignExtend) {
break; break;
default: default:
MoveConstToX86reg(0,Reg); MoveConstToX86reg(0,Reg);
if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { DisplayError("Compile_LB\nFailed to compile address: %X",VAddr); } if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { _Notify->DisplayError("Compile_LB\nFailed to compile address: %X",VAddr); }
} }
} }
@ -332,7 +332,7 @@ void CMipsMemoryVM::Compile_LH ( x86Reg Reg, DWORD VAddr, BOOL SignExtend) {
if (!TranslateVaddr(VAddr, PAddr)) { if (!TranslateVaddr(VAddr, PAddr)) {
MoveConstToX86reg(0,Reg); MoveConstToX86reg(0,Reg);
CPU_Message("Compile_LH\nFailed to translate address %X",VAddr); CPU_Message("Compile_LH\nFailed to translate address %X",VAddr);
if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { DisplayError("Compile_LH\nFailed to translate address %X",VAddr); } if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { _Notify->DisplayError("Compile_LH\nFailed to translate address %X",VAddr); }
return; return;
} }
@ -355,7 +355,7 @@ void CMipsMemoryVM::Compile_LH ( x86Reg Reg, DWORD VAddr, BOOL SignExtend) {
break; break;
default: default:
MoveConstToX86reg(0,Reg); MoveConstToX86reg(0,Reg);
if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { DisplayError("Compile_LHU\nFailed to compile address: %X",VAddr); } if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { _Notify->DisplayError("Compile_LHU\nFailed to compile address: %X",VAddr); }
} }
} }
@ -366,7 +366,7 @@ void CMipsMemoryVM::Compile_LW (x86Reg Reg, DWORD VAddr ) {
if (!TranslateVaddr(VAddr, PAddr)) { if (!TranslateVaddr(VAddr, PAddr)) {
MoveConstToX86reg(0,Reg); MoveConstToX86reg(0,Reg);
CPU_Message("Compile_LW\nFailed to translate address %X",VAddr); CPU_Message("Compile_LW\nFailed to translate address %X",VAddr);
if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { DisplayError("Compile_LW\nFailed to translate address %X",VAddr); } if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { _Notify->DisplayError("Compile_LW\nFailed to translate address %X",VAddr); }
} }
switch (PAddr & 0xFFF00000) { switch (PAddr & 0xFFF00000) {
@ -395,11 +395,11 @@ void CMipsMemoryVM::Compile_LW (x86Reg Reg, DWORD VAddr ) {
case 0x04080000: MoveVariableToX86reg(&_Reg->SP_PC_REG,"SP_PC_REG",Reg); break; case 0x04080000: MoveVariableToX86reg(&_Reg->SP_PC_REG,"SP_PC_REG",Reg); break;
default: default:
MoveConstToX86reg(0,Reg); MoveConstToX86reg(0,Reg);
if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { DisplayError("Compile_LW\nFailed to translate address: %X",VAddr); } if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { _Notify->DisplayError("Compile_LW\nFailed to translate address: %X",VAddr); }
} }
break; break;
case 0x04100000: case 0x04100000:
if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { DisplayError("Compile_LW\nFailed to translate address: %X",VAddr); } if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { _Notify->DisplayError("Compile_LW\nFailed to translate address: %X",VAddr); }
sprintf(VarName,"m_RDRAM + %X",PAddr); sprintf(VarName,"m_RDRAM + %X",PAddr);
MoveVariableToX86reg(PAddr + m_RDRAM,VarName,Reg); MoveVariableToX86reg(PAddr + m_RDRAM,VarName,Reg);
break; break;
@ -411,7 +411,7 @@ void CMipsMemoryVM::Compile_LW (x86Reg Reg, DWORD VAddr ) {
case 0x0430000C: MoveVariableToX86reg(&_Reg->MI_INTR_MASK_REG,"MI_INTR_MASK_REG",Reg); break; case 0x0430000C: MoveVariableToX86reg(&_Reg->MI_INTR_MASK_REG,"MI_INTR_MASK_REG",Reg); break;
default: default:
MoveConstToX86reg(0,Reg); MoveConstToX86reg(0,Reg);
if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { DisplayError("Compile_LW\nFailed to translate address: %X",VAddr); } if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { _Notify->DisplayError("Compile_LW\nFailed to translate address: %X",VAddr); }
} }
break; break;
case 0x04400000: case 0x04400000:
@ -428,7 +428,7 @@ void CMipsMemoryVM::Compile_LW (x86Reg Reg, DWORD VAddr ) {
break; break;
default: default:
MoveConstToX86reg(0,Reg); MoveConstToX86reg(0,Reg);
if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { DisplayError("Compile_LW\nFailed to translate address: %X",VAddr); } if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { _Notify->DisplayError("Compile_LW\nFailed to translate address: %X",VAddr); }
} }
break; break;
case 0x04500000: /* AI registers */ case 0x04500000: /* AI registers */
@ -472,7 +472,7 @@ void CMipsMemoryVM::Compile_LW (x86Reg Reg, DWORD VAddr ) {
break; break;
default: default:
MoveConstToX86reg(0,Reg); MoveConstToX86reg(0,Reg);
if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { DisplayError("Compile_LW\nFailed to translate address: %X",VAddr); } if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { _Notify->DisplayError("Compile_LW\nFailed to translate address: %X",VAddr); }
} }
break; break;
case 0x04600000: case 0x04600000:
@ -488,7 +488,7 @@ void CMipsMemoryVM::Compile_LW (x86Reg Reg, DWORD VAddr ) {
case 0x04600030: MoveVariableToX86reg(&_Reg->PI_BSD_DOM2_RLS_REG,"PI_BSD_DOM2_RLS_REG",Reg); break; case 0x04600030: MoveVariableToX86reg(&_Reg->PI_BSD_DOM2_RLS_REG,"PI_BSD_DOM2_RLS_REG",Reg); break;
default: default:
MoveConstToX86reg(0,Reg); MoveConstToX86reg(0,Reg);
if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { DisplayError("Compile_LW\nFailed to translate address: %X",VAddr); } if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { _Notify->DisplayError("Compile_LW\nFailed to translate address: %X",VAddr); }
} }
break; break;
case 0x04700000: case 0x04700000:
@ -497,7 +497,7 @@ void CMipsMemoryVM::Compile_LW (x86Reg Reg, DWORD VAddr ) {
case 0x04700010: MoveVariableToX86reg(&_Reg->RI_REFRESH_REG,"RI_REFRESH_REG",Reg); break; case 0x04700010: MoveVariableToX86reg(&_Reg->RI_REFRESH_REG,"RI_REFRESH_REG",Reg); break;
default: default:
MoveConstToX86reg(0,Reg); MoveConstToX86reg(0,Reg);
if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { DisplayError("Compile_LW\nFailed to translate address: %X",VAddr); } if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { _Notify->DisplayError("Compile_LW\nFailed to translate address: %X",VAddr); }
} }
break; break;
case 0x04800000: case 0x04800000:
@ -505,7 +505,7 @@ void CMipsMemoryVM::Compile_LW (x86Reg Reg, DWORD VAddr ) {
case 0x04800018: MoveVariableToX86reg(&_Reg->SI_STATUS_REG,"SI_STATUS_REG",Reg); break; case 0x04800018: MoveVariableToX86reg(&_Reg->SI_STATUS_REG,"SI_STATUS_REG",Reg); break;
default: default:
MoveConstToX86reg(0,Reg); MoveConstToX86reg(0,Reg);
if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { DisplayError("Compile_LW\nFailed to translate address: %X",VAddr); } if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { _Notify->DisplayError("Compile_LW\nFailed to translate address: %X",VAddr); }
} }
break; break;
case 0x1FC00000: case 0x1FC00000:
@ -516,7 +516,7 @@ void CMipsMemoryVM::Compile_LW (x86Reg Reg, DWORD VAddr ) {
MoveConstToX86reg(((PAddr & 0xFFFF) << 16) | (PAddr & 0xFFFF),Reg); MoveConstToX86reg(((PAddr & 0xFFFF) << 16) | (PAddr & 0xFFFF),Reg);
if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) {
CPU_Message("Compile_LW\nFailed to translate address: %X",VAddr); CPU_Message("Compile_LW\nFailed to translate address: %X",VAddr);
DisplayError("Compile_LW\nFailed to translate address: %X",VAddr); _Notify->DisplayError("Compile_LW\nFailed to translate address: %X",VAddr);
} }
} }
} }
@ -527,7 +527,7 @@ void CMipsMemoryVM::Compile_SB_Const ( BYTE Value, DWORD VAddr ) {
if (!TranslateVaddr(VAddr, PAddr)) { if (!TranslateVaddr(VAddr, PAddr)) {
CPU_Message("Compile_SB\nFailed to translate address %X",VAddr); CPU_Message("Compile_SB\nFailed to translate address %X",VAddr);
if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { DisplayError("Compile_SB\nFailed to translate address %X",VAddr); } if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { _Notify->DisplayError("Compile_SB\nFailed to translate address %X",VAddr); }
return; return;
} }
@ -544,7 +544,7 @@ void CMipsMemoryVM::Compile_SB_Const ( BYTE Value, DWORD VAddr ) {
MoveConstByteToVariable(Value,PAddr + m_RDRAM,VarName); MoveConstByteToVariable(Value,PAddr + m_RDRAM,VarName);
break; break;
default: default:
if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { DisplayError("Compile_SB_Const\ntrying to store %X in %X?",Value,VAddr); } if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { _Notify->DisplayError("Compile_SB_Const\ntrying to store %X in %X?",Value,VAddr); }
} }
} }
@ -554,7 +554,7 @@ void CMipsMemoryVM::Compile_SB_Register ( x86Reg Reg, DWORD VAddr ) {
if (!TranslateVaddr(VAddr, PAddr)) { if (!TranslateVaddr(VAddr, PAddr)) {
CPU_Message("Compile_SB\nFailed to translate address %X",VAddr); CPU_Message("Compile_SB\nFailed to translate address %X",VAddr);
if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { DisplayError("Compile_SB\nFailed to translate address %X",VAddr); } if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { _Notify->DisplayError("Compile_SB\nFailed to translate address %X",VAddr); }
return; return;
} }
@ -571,7 +571,7 @@ void CMipsMemoryVM::Compile_SB_Register ( x86Reg Reg, DWORD VAddr ) {
MoveX86regByteToVariable(Reg,PAddr + m_RDRAM,VarName); MoveX86regByteToVariable(Reg,PAddr + m_RDRAM,VarName);
break; break;
default: default:
if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { DisplayError("Compile_SB_Register\ntrying to store in %X?",VAddr); } if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { _Notify->DisplayError("Compile_SB_Register\ntrying to store in %X?",VAddr); }
} }
} }
@ -581,7 +581,7 @@ void CMipsMemoryVM::Compile_SH_Const ( WORD Value, DWORD VAddr ) {
if (!TranslateVaddr(VAddr, PAddr)) { if (!TranslateVaddr(VAddr, PAddr)) {
CPU_Message("Compile_SH\nFailed to translate address %X",VAddr); CPU_Message("Compile_SH\nFailed to translate address %X",VAddr);
if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { DisplayError("Compile_SH\nFailed to translate address %X",VAddr); } if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { _Notify->DisplayError("Compile_SH\nFailed to translate address %X",VAddr); }
return; return;
} }
@ -598,7 +598,7 @@ void CMipsMemoryVM::Compile_SH_Const ( WORD Value, DWORD VAddr ) {
MoveConstHalfToVariable(Value,PAddr + m_RDRAM,VarName); MoveConstHalfToVariable(Value,PAddr + m_RDRAM,VarName);
break; break;
default: default:
if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { DisplayError("Compile_SH_Const\ntrying to store %X in %X?",Value,VAddr); } if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { _Notify->DisplayError("Compile_SH_Const\ntrying to store %X in %X?",Value,VAddr); }
} }
} }
@ -608,7 +608,7 @@ void CMipsMemoryVM::Compile_SH_Register ( x86Reg Reg, DWORD VAddr ) {
if (!TranslateVaddr(VAddr, PAddr)) { if (!TranslateVaddr(VAddr, PAddr)) {
CPU_Message("Compile_SH\nFailed to translate address %X",VAddr); CPU_Message("Compile_SH\nFailed to translate address %X",VAddr);
if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { DisplayError("Compile_SH\nFailed to translate address %X",VAddr); } if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { _Notify->DisplayError("Compile_SH\nFailed to translate address %X",VAddr); }
return; return;
} }
@ -625,7 +625,7 @@ void CMipsMemoryVM::Compile_SH_Register ( x86Reg Reg, DWORD VAddr ) {
MoveX86regHalfToVariable(Reg,PAddr + m_RDRAM,VarName); MoveX86regHalfToVariable(Reg,PAddr + m_RDRAM,VarName);
break; break;
default: default:
if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { DisplayError("Compile_SH_Register\ntrying to store in %X?",PAddr); } if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { _Notify->DisplayError("Compile_SH_Register\ntrying to store in %X?",PAddr); }
} }
} }
@ -636,7 +636,7 @@ void CMipsMemoryVM::Compile_SW_Const ( DWORD Value, DWORD VAddr ) {
if (!TranslateVaddr(VAddr, PAddr)) { if (!TranslateVaddr(VAddr, PAddr)) {
CPU_Message("Compile_SW\nFailed to translate address %X",VAddr); CPU_Message("Compile_SW\nFailed to translate address %X",VAddr);
if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { DisplayError("Compile_SW\nFailed to translate address %X",VAddr); } if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { _Notify->DisplayError("Compile_SW\nFailed to translate address %X",VAddr); }
return; return;
} }
@ -671,7 +671,7 @@ void CMipsMemoryVM::Compile_SW_Const ( DWORD Value, DWORD VAddr ) {
case 0x03F8000C: break; case 0x03F8000C: break;
case 0x03F80014: break; case 0x03F80014: break;
default: default:
if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { DisplayError("Compile_SW_Const\ntrying to store %X in %X?",Value,VAddr); } if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { _Notify->DisplayError("Compile_SW_Const\ntrying to store %X in %X?",Value,VAddr); }
} }
break; break;
case 0x04000000: case 0x04000000:
@ -751,7 +751,7 @@ void CMipsMemoryVM::Compile_SW_Const ( DWORD Value, DWORD VAddr ) {
case 0x0404001C: MoveConstToVariable(0,&_Reg->SP_SEMAPHORE_REG,"SP_SEMAPHORE_REG"); break; case 0x0404001C: MoveConstToVariable(0,&_Reg->SP_SEMAPHORE_REG,"SP_SEMAPHORE_REG"); break;
case 0x04080000: MoveConstToVariable(Value & 0xFFC,&_Reg->SP_PC_REG,"SP_PC_REG"); break; case 0x04080000: MoveConstToVariable(Value & 0xFFC,&_Reg->SP_PC_REG,"SP_PC_REG"); break;
default: default:
if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { DisplayError("Compile_SW_Const\ntrying to store %X in %X?",Value,VAddr); } if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { _Notify->DisplayError("Compile_SW_Const\ntrying to store %X in %X?",Value,VAddr); }
} }
break; break;
case 0x04300000: case 0x04300000:
@ -807,7 +807,7 @@ void CMipsMemoryVM::Compile_SW_Const ( DWORD Value, DWORD VAddr ) {
} }
break; break;
default: default:
if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { DisplayError("Compile_SW_Const\ntrying to store %X in %X?",Value,VAddr); } if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { _Notify->DisplayError("Compile_SW_Const\ntrying to store %X in %X?",Value,VAddr); }
} }
break; break;
case 0x04400000: case 0x04400000:
@ -859,7 +859,7 @@ void CMipsMemoryVM::Compile_SW_Const ( DWORD Value, DWORD VAddr ) {
case 0x04400030: MoveConstToVariable(Value,&_Reg->VI_X_SCALE_REG,"VI_X_SCALE_REG"); break; case 0x04400030: MoveConstToVariable(Value,&_Reg->VI_X_SCALE_REG,"VI_X_SCALE_REG"); break;
case 0x04400034: MoveConstToVariable(Value,&_Reg->VI_Y_SCALE_REG,"VI_Y_SCALE_REG"); break; case 0x04400034: MoveConstToVariable(Value,&_Reg->VI_Y_SCALE_REG,"VI_Y_SCALE_REG"); break;
default: default:
if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { DisplayError("Compile_SW_Const\ntrying to store %X in %X?",Value,VAddr); } if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { _Notify->DisplayError("Compile_SW_Const\ntrying to store %X in %X?",Value,VAddr); }
} }
break; break;
case 0x04500000: /* AI registers */ case 0x04500000: /* AI registers */
@ -899,7 +899,7 @@ void CMipsMemoryVM::Compile_SW_Const ( DWORD Value, DWORD VAddr ) {
default: default:
sprintf(VarName,"m_RDRAM + %X",PAddr); sprintf(VarName,"m_RDRAM + %X",PAddr);
MoveConstToVariable(Value,PAddr + m_RDRAM,VarName); MoveConstToVariable(Value,PAddr + m_RDRAM,VarName);
if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { DisplayError("Compile_SW_Const\ntrying to store %X in %X?",Value,VAddr); } if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { _Notify->DisplayError("Compile_SW_Const\ntrying to store %X in %X?",Value,VAddr); }
} }
break; break;
case 0x04600000: case 0x04600000:
@ -934,7 +934,7 @@ void CMipsMemoryVM::Compile_SW_Const ( DWORD Value, DWORD VAddr ) {
case 0x0460001C: MoveConstToVariable((Value & 0xFF),&_Reg->PI_BSD_DOM1_PGS_REG,"PI_BSD_DOM1_PGS_REG"); break; case 0x0460001C: MoveConstToVariable((Value & 0xFF),&_Reg->PI_BSD_DOM1_PGS_REG,"PI_BSD_DOM1_PGS_REG"); break;
case 0x04600020: MoveConstToVariable((Value & 0xFF),&_Reg->PI_BSD_DOM1_RLS_REG,"PI_BSD_DOM1_RLS_REG"); break; case 0x04600020: MoveConstToVariable((Value & 0xFF),&_Reg->PI_BSD_DOM1_RLS_REG,"PI_BSD_DOM1_RLS_REG"); break;
default: default:
if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { DisplayError("Compile_SW_Const\ntrying to store %X in %X?",Value,VAddr); } if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { _Notify->DisplayError("Compile_SW_Const\ntrying to store %X in %X?",Value,VAddr); }
} }
break; break;
case 0x04700000: case 0x04700000:
@ -944,7 +944,7 @@ void CMipsMemoryVM::Compile_SW_Const ( DWORD Value, DWORD VAddr ) {
case 0x04700008: MoveConstToVariable(Value,&_Reg->RI_CURRENT_LOAD_REG,"RI_CURRENT_LOAD_REG"); break; case 0x04700008: MoveConstToVariable(Value,&_Reg->RI_CURRENT_LOAD_REG,"RI_CURRENT_LOAD_REG"); break;
case 0x0470000C: MoveConstToVariable(Value,&_Reg->RI_SELECT_REG,"RI_SELECT_REG"); break; case 0x0470000C: MoveConstToVariable(Value,&_Reg->RI_SELECT_REG,"RI_SELECT_REG"); break;
default: default:
if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { DisplayError("Compile_SW_Const\ntrying to store %X in %X?",Value,VAddr); } if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { _Notify->DisplayError("Compile_SW_Const\ntrying to store %X in %X?",Value,VAddr); }
} }
break; break;
case 0x04800000: case 0x04800000:
@ -973,11 +973,11 @@ void CMipsMemoryVM::Compile_SW_Const ( DWORD Value, DWORD VAddr ) {
AfterCallDirect(m_RegWorkingSet); AfterCallDirect(m_RegWorkingSet);
break; break;
default: default:
if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { DisplayError("Compile_SW_Const\ntrying to store %X in %X?",Value,VAddr); } if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { _Notify->DisplayError("Compile_SW_Const\ntrying to store %X in %X?",Value,VAddr); }
} }
break; break;
default: default:
if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { DisplayError("Compile_SW_Const\ntrying to store %X in %X?",Value,VAddr); } if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { _Notify->DisplayError("Compile_SW_Const\ntrying to store %X in %X?",Value,VAddr); }
} }
} }
@ -989,7 +989,7 @@ void CMipsMemoryVM::Compile_SW_Register (x86Reg Reg, DWORD VAddr )
if (!TranslateVaddr(VAddr, PAddr)) { if (!TranslateVaddr(VAddr, PAddr)) {
CPU_Message("Compile_SW_Register\nFailed to translate address %X",VAddr); CPU_Message("Compile_SW_Register\nFailed to translate address %X",VAddr);
if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { DisplayError("Compile_SW_Register\nFailed to translate address %X",VAddr); } if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { _Notify->DisplayError("Compile_SW_Register\nFailed to translate address %X",VAddr); }
return; return;
} }
@ -1040,7 +1040,7 @@ void CMipsMemoryVM::Compile_SW_Register (x86Reg Reg, DWORD VAddr )
MoveX86regToVariable(Reg,PAddr + m_RDRAM,VarName); MoveX86regToVariable(Reg,PAddr + m_RDRAM,VarName);
} else { } else {
CPU_Message(" Should be moving %s in to %X ?!?",x86_Name(Reg),VAddr); CPU_Message(" Should be moving %s in to %X ?!?",x86_Name(Reg),VAddr);
if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { DisplayError("Compile_SW_Register\ntrying to store at %X?",VAddr); } if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { _Notify->DisplayError("Compile_SW_Register\ntrying to store at %X?",VAddr); }
} }
} }
break; break;
@ -1048,7 +1048,7 @@ void CMipsMemoryVM::Compile_SW_Register (x86Reg Reg, DWORD VAddr )
CPU_Message(" Should be moving %s in to %X ?!?",x86_Name(Reg),VAddr); CPU_Message(" Should be moving %s in to %X ?!?",x86_Name(Reg),VAddr);
sprintf(VarName,"m_RDRAM + %X",PAddr); sprintf(VarName,"m_RDRAM + %X",PAddr);
MoveX86regToVariable(Reg,PAddr + m_RDRAM,VarName); MoveX86regToVariable(Reg,PAddr + m_RDRAM,VarName);
if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { DisplayError("Compile_SW_Register\ntrying to store at %X?",VAddr); } if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { _Notify->DisplayError("Compile_SW_Register\ntrying to store at %X?",VAddr); }
case 0x04300000: case 0x04300000:
switch (PAddr) { switch (PAddr) {
case 0x04300000: case 0x04300000:
@ -1065,7 +1065,7 @@ void CMipsMemoryVM::Compile_SW_Register (x86Reg Reg, DWORD VAddr )
break; break;
default: default:
CPU_Message(" Should be moving %s in to %X ?!?",x86_Name(Reg),VAddr); CPU_Message(" Should be moving %s in to %X ?!?",x86_Name(Reg),VAddr);
if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { DisplayError("Compile_SW_Register\ntrying to store at %X?",VAddr); } if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { _Notify->DisplayError("Compile_SW_Register\ntrying to store at %X?",VAddr); }
} }
break; break;
case 0x04400000: case 0x04400000:
@ -1121,7 +1121,7 @@ void CMipsMemoryVM::Compile_SW_Register (x86Reg Reg, DWORD VAddr )
case 0x04400034: MoveX86regToVariable(Reg,&_Reg->VI_Y_SCALE_REG,"VI_Y_SCALE_REG"); break; case 0x04400034: MoveX86regToVariable(Reg,&_Reg->VI_Y_SCALE_REG,"VI_Y_SCALE_REG"); break;
default: default:
CPU_Message(" Should be moving %s in to %X ?!?",x86_Name(Reg),VAddr); CPU_Message(" Should be moving %s in to %X ?!?",x86_Name(Reg),VAddr);
if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { DisplayError("Compile_SW_Register\ntrying to store at %X?",VAddr); } if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { _Notify->DisplayError("Compile_SW_Register\ntrying to store at %X?",VAddr); }
} }
break; break;
case 0x04500000: /* AI registers */ case 0x04500000: /* AI registers */
@ -1165,7 +1165,7 @@ void CMipsMemoryVM::Compile_SW_Register (x86Reg Reg, DWORD VAddr )
default: default:
sprintf(VarName,"m_RDRAM + %X",PAddr); sprintf(VarName,"m_RDRAM + %X",PAddr);
MoveX86regToVariable(Reg,PAddr + m_RDRAM,VarName); MoveX86regToVariable(Reg,PAddr + m_RDRAM,VarName);
if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { DisplayError("Compile_SW_Register\ntrying to store at %X?",VAddr); } } if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { _Notify->DisplayError("Compile_SW_Register\ntrying to store at %X?",VAddr); } }
break; break;
case 0x04600000: case 0x04600000:
switch (PAddr) { switch (PAddr) {
@ -1186,7 +1186,7 @@ void CMipsMemoryVM::Compile_SW_Register (x86Reg Reg, DWORD VAddr )
AfterCallDirect(m_RegWorkingSet); AfterCallDirect(m_RegWorkingSet);
break; break;
case 0x04600010: case 0x04600010:
if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { DisplayError("Compile_SW_Register\ntrying to store at %X?",VAddr); } if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { _Notify->DisplayError("Compile_SW_Register\ntrying to store at %X?",VAddr); }
AndConstToVariable(~MI_INTR_PI,&_Reg->MI_INTR_REG,"MI_INTR_REG"); AndConstToVariable(~MI_INTR_PI,&_Reg->MI_INTR_REG,"MI_INTR_REG");
BeforeCallDirect(m_RegWorkingSet); BeforeCallDirect(m_RegWorkingSet);
MoveConstToX86reg((DWORD)_Reg,x86_ECX); MoveConstToX86reg((DWORD)_Reg,x86_ECX);
@ -1213,14 +1213,14 @@ void CMipsMemoryVM::Compile_SW_Register (x86Reg Reg, DWORD VAddr )
break; break;
default: default:
CPU_Message(" Should be moving %s in to %X ?!?",x86_Name(Reg),VAddr); CPU_Message(" Should be moving %s in to %X ?!?",x86_Name(Reg),VAddr);
if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { DisplayError("Compile_SW_Register\ntrying to store at %X?",VAddr); } if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { _Notify->DisplayError("Compile_SW_Register\ntrying to store at %X?",VAddr); }
} }
break; break;
case 0x04700000: case 0x04700000:
switch (PAddr) { switch (PAddr) {
case 0x04700010: MoveX86regToVariable(Reg,&_Reg->RI_REFRESH_REG,"RI_REFRESH_REG"); break; case 0x04700010: MoveX86regToVariable(Reg,&_Reg->RI_REFRESH_REG,"RI_REFRESH_REG"); break;
default: default:
if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { DisplayError("Compile_SW_Register\ntrying to store at %X?",VAddr); } if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { _Notify->DisplayError("Compile_SW_Register\ntrying to store at %X?",VAddr); }
} }
break; break;
case 0x04800000: case 0x04800000:
@ -1249,7 +1249,7 @@ void CMipsMemoryVM::Compile_SW_Register (x86Reg Reg, DWORD VAddr )
AfterCallDirect(m_RegWorkingSet); AfterCallDirect(m_RegWorkingSet);
break; break;
default: default:
if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { DisplayError("Compile_SW_Register\ntrying to store at %X?",VAddr); } if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { _Notify->DisplayError("Compile_SW_Register\ntrying to store at %X?",VAddr); }
} }
break; break;
case 0x1FC00000: case 0x1FC00000:
@ -1258,7 +1258,7 @@ void CMipsMemoryVM::Compile_SW_Register (x86Reg Reg, DWORD VAddr )
break; break;
default: default:
CPU_Message(" Should be moving %s in to %X ?!?",x86_Name(Reg),VAddr); CPU_Message(" Should be moving %s in to %X ?!?",x86_Name(Reg),VAddr);
if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { DisplayError("Compile_SW_Register\ntrying to store in %X?",VAddr); } if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { _Notify->DisplayError("Compile_SW_Register\ntrying to store in %X?",VAddr); }
} }
} }
@ -1427,7 +1427,7 @@ int CMipsMemoryVM::MemoryFilter( DWORD dwExptCode, void * lpExceptionPointer )
case 0xB6: case 0xB6:
if (!LB_NonMemory(MemAddress,(DWORD *)Reg,FALSE)) { if (!LB_NonMemory(MemAddress,(DWORD *)Reg,FALSE)) {
if (_Settings->LoadDword(Debugger_ShowUnhandledMemory)) { if (_Settings->LoadDword(Debugger_ShowUnhandledMemory)) {
DisplayError("Failed to load byte\n\nMIPS Address: %X\nX86 Address", _Notify->DisplayError("Failed to load byte\n\nMIPS Address: %X\nX86 Address",
(char *)exRec.ExceptionInformation[1] - (char *)m_RDRAM, (char *)exRec.ExceptionInformation[1] - (char *)m_RDRAM,
*(unsigned char *)lpEP->ContextRecord->Eip); *(unsigned char *)lpEP->ContextRecord->Eip);
} }
@ -1437,7 +1437,7 @@ int CMipsMemoryVM::MemoryFilter( DWORD dwExptCode, void * lpExceptionPointer )
case 0xB7: case 0xB7:
if (!LH_NonMemory(MemAddress,(DWORD *)Reg,FALSE)) { if (!LH_NonMemory(MemAddress,(DWORD *)Reg,FALSE)) {
if (_Settings->LoadDword(Debugger_ShowUnhandledMemory)) { if (_Settings->LoadDword(Debugger_ShowUnhandledMemory)) {
DisplayError("Failed to load half word\n\nMIPS Address: %X\nX86 Address", _Notify->DisplayError("Failed to load half word\n\nMIPS Address: %X\nX86 Address",
(char *)exRec.ExceptionInformation[1] - (char *)m_RDRAM, (char *)exRec.ExceptionInformation[1] - (char *)m_RDRAM,
*(unsigned char *)lpEP->ContextRecord->Eip); *(unsigned char *)lpEP->ContextRecord->Eip);
} }
@ -1447,7 +1447,7 @@ int CMipsMemoryVM::MemoryFilter( DWORD dwExptCode, void * lpExceptionPointer )
case 0xBE: case 0xBE:
if (!LB_NonMemory(MemAddress,Reg,TRUE)) { if (!LB_NonMemory(MemAddress,Reg,TRUE)) {
if (_Settings->LoadDword(Debugger_ShowUnhandledMemory)) { if (_Settings->LoadDword(Debugger_ShowUnhandledMemory)) {
DisplayError("Failed to load byte\n\nMIPS Address: %X\nX86 Address", _Notify->DisplayError("Failed to load byte\n\nMIPS Address: %X\nX86 Address",
(char *)exRec.ExceptionInformation[1] - (char *)m_RDRAM, (char *)exRec.ExceptionInformation[1] - (char *)m_RDRAM,
*(unsigned char *)lpEP->ContextRecord->Eip); *(unsigned char *)lpEP->ContextRecord->Eip);
} }
@ -1457,7 +1457,7 @@ int CMipsMemoryVM::MemoryFilter( DWORD dwExptCode, void * lpExceptionPointer )
case 0xBF: case 0xBF:
if (!LH_NonMemory(MemAddress,Reg,TRUE)) { if (!LH_NonMemory(MemAddress,Reg,TRUE)) {
if (_Settings->LoadDword(Debugger_ShowUnhandledMemory)) { if (_Settings->LoadDword(Debugger_ShowUnhandledMemory)) {
DisplayError("Failed to load half word\n\nMIPS Address: %X\nX86 Address", _Notify->DisplayError("Failed to load half word\n\nMIPS Address: %X\nX86 Address",
(char *)exRec.ExceptionInformation[1] - (char *)m_RDRAM, (char *)exRec.ExceptionInformation[1] - (char *)m_RDRAM,
*(unsigned char *)lpEP->ContextRecord->Eip); *(unsigned char *)lpEP->ContextRecord->Eip);
} }
@ -1474,7 +1474,7 @@ int CMipsMemoryVM::MemoryFilter( DWORD dwExptCode, void * lpExceptionPointer )
case 0x8B: case 0x8B:
if (!LH_NonMemory(MemAddress,Reg,FALSE)) { if (!LH_NonMemory(MemAddress,Reg,FALSE)) {
if (_Settings->LoadDword(Debugger_ShowUnhandledMemory)) { if (_Settings->LoadDword(Debugger_ShowUnhandledMemory)) {
DisplayError("Failed to half word\n\nMIPS Address: %X\nX86 Address", _Notify->DisplayError("Failed to half word\n\nMIPS Address: %X\nX86 Address",
(char *)exRec.ExceptionInformation[1] - (char *)m_RDRAM, (char *)exRec.ExceptionInformation[1] - (char *)m_RDRAM,
*(unsigned char *)lpEP->ContextRecord->Eip); *(unsigned char *)lpEP->ContextRecord->Eip);
} }
@ -1484,7 +1484,7 @@ int CMipsMemoryVM::MemoryFilter( DWORD dwExptCode, void * lpExceptionPointer )
case 0x89: case 0x89:
if (!SH_NonMemory(MemAddress,*(WORD *)Reg)) { if (!SH_NonMemory(MemAddress,*(WORD *)Reg)) {
if (_Settings->LoadDword(Debugger_ShowUnhandledMemory)) { if (_Settings->LoadDword(Debugger_ShowUnhandledMemory)) {
DisplayError("Failed to store half word\n\nMIPS Address: %X\nX86 Address",MemAddress, _Notify->DisplayError("Failed to store half word\n\nMIPS Address: %X\nX86 Address",MemAddress,
*(unsigned char *)lpEP->ContextRecord->Eip); *(unsigned char *)lpEP->ContextRecord->Eip);
} }
} }
@ -1498,7 +1498,7 @@ int CMipsMemoryVM::MemoryFilter( DWORD dwExptCode, void * lpExceptionPointer )
} }
if (!SH_NonMemory(MemAddress,*(WORD *)ReadPos)) { if (!SH_NonMemory(MemAddress,*(WORD *)ReadPos)) {
if (_Settings->LoadDword(Debugger_ShowUnhandledMemory)) { if (_Settings->LoadDword(Debugger_ShowUnhandledMemory)) {
DisplayError("Failed to store half word\n\nMIPS Address: %X\nX86 Address",MemAddress, _Notify->DisplayError("Failed to store half word\n\nMIPS Address: %X\nX86 Address",MemAddress,
*(unsigned char *)lpEP->ContextRecord->Eip); *(unsigned char *)lpEP->ContextRecord->Eip);
} }
} }
@ -1512,7 +1512,7 @@ int CMipsMemoryVM::MemoryFilter( DWORD dwExptCode, void * lpExceptionPointer )
case 0x88: case 0x88:
if (!SB_NonMemory(MemAddress,*(BYTE *)Reg)) { if (!SB_NonMemory(MemAddress,*(BYTE *)Reg)) {
if (_Settings->LoadDword(Debugger_ShowUnhandledMemory)) { if (_Settings->LoadDword(Debugger_ShowUnhandledMemory)) {
DisplayError("Failed to store byte\n\nMIPS Address: %X\nX86 Address", _Notify->DisplayError("Failed to store byte\n\nMIPS Address: %X\nX86 Address",
(char *)exRec.ExceptionInformation[1] - (char *)m_RDRAM, (char *)exRec.ExceptionInformation[1] - (char *)m_RDRAM,
*(unsigned char *)lpEP->ContextRecord->Eip); *(unsigned char *)lpEP->ContextRecord->Eip);
} }
@ -1522,7 +1522,7 @@ int CMipsMemoryVM::MemoryFilter( DWORD dwExptCode, void * lpExceptionPointer )
case 0x8A: case 0x8A:
if (!LB_NonMemory(MemAddress,Reg,FALSE)) { if (!LB_NonMemory(MemAddress,Reg,FALSE)) {
if (_Settings->LoadDword(Debugger_ShowUnhandledMemory)) { if (_Settings->LoadDword(Debugger_ShowUnhandledMemory)) {
DisplayError("Failed to load byte\n\nMIPS Address: %X\nX86 Address", _Notify->DisplayError("Failed to load byte\n\nMIPS Address: %X\nX86 Address",
(char *)exRec.ExceptionInformation[1] - (char *)m_RDRAM, (char *)exRec.ExceptionInformation[1] - (char *)m_RDRAM,
*(unsigned char *)lpEP->ContextRecord->Eip); *(unsigned char *)lpEP->ContextRecord->Eip);
} }
@ -1532,7 +1532,7 @@ int CMipsMemoryVM::MemoryFilter( DWORD dwExptCode, void * lpExceptionPointer )
case 0x8B: case 0x8B:
if (!LW_NonMemory(MemAddress,Reg)) { if (!LW_NonMemory(MemAddress,Reg)) {
if (_Settings->LoadDword(Debugger_ShowUnhandledMemory)) { if (_Settings->LoadDword(Debugger_ShowUnhandledMemory)) {
DisplayError("Failed to load word\n\nMIPS Address: %X\nX86 Address", _Notify->DisplayError("Failed to load word\n\nMIPS Address: %X\nX86 Address",
(char *)exRec.ExceptionInformation[1] - (char *)m_RDRAM, (char *)exRec.ExceptionInformation[1] - (char *)m_RDRAM,
*(unsigned char *)lpEP->ContextRecord->Eip); *(unsigned char *)lpEP->ContextRecord->Eip);
} }
@ -1542,7 +1542,7 @@ int CMipsMemoryVM::MemoryFilter( DWORD dwExptCode, void * lpExceptionPointer )
case 0x89: case 0x89:
if (!SW_NonMemory(MemAddress,*(DWORD *)Reg)) { if (!SW_NonMemory(MemAddress,*(DWORD *)Reg)) {
if (_Settings->LoadDword(Debugger_ShowUnhandledMemory)) { if (_Settings->LoadDword(Debugger_ShowUnhandledMemory)) {
DisplayError("Failed to store word\n\nMIPS Address: %X\nX86 Address",MemAddress, _Notify->DisplayError("Failed to store word\n\nMIPS Address: %X\nX86 Address",MemAddress,
*(unsigned char *)lpEP->ContextRecord->Eip); *(unsigned char *)lpEP->ContextRecord->Eip);
} }
} }
@ -1556,7 +1556,7 @@ int CMipsMemoryVM::MemoryFilter( DWORD dwExptCode, void * lpExceptionPointer )
} }
if (!SB_NonMemory(MemAddress,*(BYTE *)ReadPos)) { if (!SB_NonMemory(MemAddress,*(BYTE *)ReadPos)) {
if (_Settings->LoadDword(Debugger_ShowUnhandledMemory)) { if (_Settings->LoadDword(Debugger_ShowUnhandledMemory)) {
DisplayError("Failed to store byte\n\nMIPS Address: %X\nX86 Address",MemAddress, _Notify->DisplayError("Failed to store byte\n\nMIPS Address: %X\nX86 Address",MemAddress,
*(unsigned char *)lpEP->ContextRecord->Eip); *(unsigned char *)lpEP->ContextRecord->Eip);
} }
} }
@ -1570,7 +1570,7 @@ int CMipsMemoryVM::MemoryFilter( DWORD dwExptCode, void * lpExceptionPointer )
} }
if (!SW_NonMemory(MemAddress,*(DWORD *)ReadPos)) { if (!SW_NonMemory(MemAddress,*(DWORD *)ReadPos)) {
if (_Settings->LoadDword(Debugger_ShowUnhandledMemory)) { if (_Settings->LoadDword(Debugger_ShowUnhandledMemory)) {
DisplayError("Failed to store word\n\nMIPS Address: %X\nX86 Address",MemAddress, _Notify->DisplayError("Failed to store word\n\nMIPS Address: %X\nX86 Address",MemAddress,
*(unsigned char *)lpEP->ContextRecord->Eip); *(unsigned char *)lpEP->ContextRecord->Eip);
} }
} }
@ -1866,7 +1866,7 @@ int CMipsMemoryVM::SB_NonMemory ( DWORD PAddr, BYTE Value ) {
VirtualProtect(m_RDRAM+(PAddr & ~0xFFF),0xFFC,PAGE_READWRITE, &OldProtect); VirtualProtect(m_RDRAM+(PAddr & ~0xFFF),0xFFC,PAGE_READWRITE, &OldProtect);
*(BYTE *)(m_RDRAM+PAddr) = Value; *(BYTE *)(m_RDRAM+PAddr) = Value;
VirtualProtect(m_RDRAM+(PAddr & ~0xFFF),0xFFC,OldProtect, &OldProtect); VirtualProtect(m_RDRAM+(PAddr & ~0xFFF),0xFFC,OldProtect, &OldProtect);
DisplayError("FrameBufferWrite"); _Notify->DisplayError("FrameBufferWrite");
if (FrameBufferWrite) { FrameBufferWrite(PAddr,1); } if (FrameBufferWrite) { FrameBufferWrite(PAddr,1); }
break; break;
} }
@ -1904,7 +1904,7 @@ int CMipsMemoryVM::SH_NonMemory ( DWORD PAddr, WORD Value ) {
if (FrameBufferWrite) { FrameBufferWrite(PAddr & ~0xFFF,2); } if (FrameBufferWrite) { FrameBufferWrite(PAddr & ~0xFFF,2); }
//*(WORD *)(m_RDRAM+PAddr) = 0xFFFF; //*(WORD *)(m_RDRAM+PAddr) = 0xFFFF;
//VirtualProtect(m_RDRAM+(PAddr & ~0xFFF),0xFFC,PAGE_NOACCESS, &OldProtect); //VirtualProtect(m_RDRAM+(PAddr & ~0xFFF),0xFFC,PAGE_NOACCESS, &OldProtect);
DisplayError("PAddr = %x",PAddr); _Notify->DisplayError("PAddr = %x",PAddr);
break; break;
} }
#endif #endif
@ -1955,7 +1955,7 @@ int CMipsMemoryVM::SW_NonMemory ( DWORD PAddr, DWORD Value ) {
VirtualProtect(m_RDRAM+(PAddr & ~0xFFF),0xFFC,PAGE_READWRITE, &OldProtect); VirtualProtect(m_RDRAM+(PAddr & ~0xFFF),0xFFC,PAGE_READWRITE, &OldProtect);
*(DWORD *)(m_RDRAM+PAddr) = Value; *(DWORD *)(m_RDRAM+PAddr) = Value;
VirtualProtect(m_RDRAM+(PAddr & ~0xFFF),0xFFC,OldProtect, &OldProtect); VirtualProtect(m_RDRAM+(PAddr & ~0xFFF),0xFFC,OldProtect, &OldProtect);
DisplayError("FrameBufferWrite %X",PAddr); _Notify->DisplayError("FrameBufferWrite %X",PAddr);
if (FrameBufferWrite) { FrameBufferWrite(PAddr,4); } if (FrameBufferWrite) { FrameBufferWrite(PAddr,4); }
break; break;
} }
@ -2015,7 +2015,7 @@ int CMipsMemoryVM::SW_NonMemory ( DWORD PAddr, DWORD Value ) {
_Reg->CheckInterrupts(); _Reg->CheckInterrupts();
} }
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
if ( ( Value & SP_SET_INTR ) != 0) { DisplayError("SP_SET_INTR"); } if ( ( Value & SP_SET_INTR ) != 0) { _Notify->DisplayError("SP_SET_INTR"); }
#endif #endif
if ( ( Value & SP_CLR_SSTEP ) != 0) { _Reg->SP_STATUS_REG &= ~SP_STATUS_SSTEP; } if ( ( Value & SP_CLR_SSTEP ) != 0) { _Reg->SP_STATUS_REG &= ~SP_STATUS_SSTEP; }
if ( ( Value & SP_SET_SSTEP ) != 0) { _Reg->SP_STATUS_REG |= SP_STATUS_SSTEP; } if ( ( Value & SP_SET_SSTEP ) != 0) { _Reg->SP_STATUS_REG |= SP_STATUS_SSTEP; }
@ -2088,10 +2088,10 @@ int CMipsMemoryVM::SW_NonMemory ( DWORD PAddr, DWORD Value ) {
} }
#ifdef tofix #ifdef tofix
if (ShowUnhandledMemory) { if (ShowUnhandledMemory) {
//if ( ( Value & DPC_CLR_TMEM_CTR ) != 0) { DisplayError("RSP: DPC_STATUS_REG: DPC_CLR_TMEM_CTR"); } //if ( ( Value & DPC_CLR_TMEM_CTR ) != 0) { _Notify->DisplayError("RSP: DPC_STATUS_REG: DPC_CLR_TMEM_CTR"); }
//if ( ( Value & DPC_CLR_PIPE_CTR ) != 0) { DisplayError("RSP: DPC_STATUS_REG: DPC_CLR_PIPE_CTR"); } //if ( ( Value & DPC_CLR_PIPE_CTR ) != 0) { _Notify->DisplayError("RSP: DPC_STATUS_REG: DPC_CLR_PIPE_CTR"); }
//if ( ( Value & DPC_CLR_CMD_CTR ) != 0) { DisplayError("RSP: DPC_STATUS_REG: DPC_CLR_CMD_CTR"); } //if ( ( Value & DPC_CLR_CMD_CTR ) != 0) { _Notify->DisplayError("RSP: DPC_STATUS_REG: DPC_CLR_CMD_CTR"); }
//if ( ( Value & DPC_CLR_CLOCK_CTR ) != 0) { DisplayError("RSP: DPC_STATUS_REG: DPC_CLR_CLOCK_CTR"); } //if ( ( Value & DPC_CLR_CLOCK_CTR ) != 0) { _Notify->DisplayError("RSP: DPC_STATUS_REG: DPC_CLR_CLOCK_CTR"); }
} }
#endif #endif
break; break;
@ -2220,7 +2220,7 @@ int CMipsMemoryVM::SW_NonMemory ( DWORD PAddr, DWORD Value ) {
PI_DMA_WRITE(); PI_DMA_WRITE();
break; break;
case 0x04600010: case 0x04600010:
//if ((Value & PI_SET_RESET) != 0 ) { DisplayError("reset Controller"); } //if ((Value & PI_SET_RESET) != 0 ) { _Notify->DisplayError("reset Controller"); }
if ((Value & PI_CLR_INTR) != 0 ) { if ((Value & PI_CLR_INTR) != 0 ) {
_Reg->MI_INTR_REG &= ~MI_INTR_PI; _Reg->MI_INTR_REG &= ~MI_INTR_PI;
_Reg->CheckInterrupts(); _Reg->CheckInterrupts();
@ -3797,7 +3797,7 @@ void CMipsMemoryVM::ChangeSpStatus (void)
_Reg->CheckInterrupts(); _Reg->CheckInterrupts();
} }
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
if ( ( RegModValue & SP_SET_INTR ) != 0) { DisplayError("SP_SET_INTR"); } if ( ( RegModValue & SP_SET_INTR ) != 0) { _Notify->DisplayError("SP_SET_INTR"); }
#endif #endif
if ( ( RegModValue & SP_CLR_SSTEP ) != 0) { _Reg->SP_STATUS_REG &= ~SP_STATUS_SSTEP; } if ( ( RegModValue & SP_CLR_SSTEP ) != 0) { _Reg->SP_STATUS_REG &= ~SP_STATUS_SSTEP; }
if ( ( RegModValue & SP_SET_SSTEP ) != 0) { _Reg->SP_STATUS_REG |= SP_STATUS_SSTEP; } if ( ( RegModValue & SP_SET_SSTEP ) != 0) { _Reg->SP_STATUS_REG |= SP_STATUS_SSTEP; }

34
Source/Project64/N64 System/Mips/Pif Ram.cpp
View File

@ -116,7 +116,7 @@ void CPifRam::PifRamRead (void)
CurPos += m_PifRam[CurPos] + (m_PifRam[CurPos + 1] & 0x3F) + 1; CurPos += m_PifRam[CurPos] + (m_PifRam[CurPos + 1] & 0x3F) + 1;
Channel += 1; Channel += 1;
} else { } else {
if (bShowPifRamErrors()) { DisplayError("Unknown Command in PifRamRead(%X)",m_PifRam[CurPos]); } if (bShowPifRamErrors()) { _Notify->DisplayError("Unknown Command in PifRamRead(%X)",m_PifRam[CurPos]); }
CurPos = 0x40; CurPos = 0x40;
} }
break; break;
@ -167,7 +167,7 @@ void CPifRam::PifRamWrite (void) {
memset(m_PifRam,0,0x40); memset(m_PifRam,0,0x40);
break; break;
default: default:
if (bShowPifRamErrors()) { DisplayError("Unkown PifRam control: %d",m_PifRam[0x3F]); } if (bShowPifRamErrors()) { _Notify->DisplayError("Unkown PifRam control: %d",m_PifRam[0x3F]); }
} }
return; return;
} }
@ -194,13 +194,13 @@ void CPifRam::PifRamWrite (void) {
} else { } else {
if (bShowPifRamErrors()) if (bShowPifRamErrors())
{ {
DisplayError("Command on channel 5?"); _Notify->DisplayError("Command on channel 5?");
} }
} }
CurPos += m_PifRam[CurPos] + (m_PifRam[CurPos + 1] & 0x3F) + 1; CurPos += m_PifRam[CurPos] + (m_PifRam[CurPos + 1] & 0x3F) + 1;
Channel += 1; Channel += 1;
} else { } else {
if (bShowPifRamErrors()) { DisplayError("Unknown Command in PifRamWrite(%X)",m_PifRam[CurPos]); } if (bShowPifRamErrors()) { _Notify->DisplayError("Unknown Command in PifRamWrite(%X)",m_PifRam[CurPos]); }
CurPos = 0x40; CurPos = 0x40;
} }
break; break;
@ -220,7 +220,7 @@ void CPifRam::SI_DMA_READ (void)
{ {
if (bShowPifRamErrors()) if (bShowPifRamErrors())
{ {
DisplayError("SI DMA\nSI_DRAM_ADDR_REG not in RDRam space"); _Notify->DisplayError("SI DMA\nSI_DRAM_ADDR_REG not in RDRam space");
} }
return; return;
} }
@ -312,7 +312,7 @@ void CPifRam::SI_DMA_WRITE (void)
{ {
if (bShowPifRamErrors()) if (bShowPifRamErrors())
{ {
DisplayError("SI DMA\nSI_DRAM_ADDR_REG not in RDRam space"); _Notify->DisplayError("SI DMA\nSI_DRAM_ADDR_REG not in RDRam space");
} }
return; return;
} }
@ -409,8 +409,8 @@ void CPifRam::ProcessControllerCommand ( int Control, BYTE * Command)
if ((Command[1] & 0x80) != 0) { break; } if ((Command[1] & 0x80) != 0) { break; }
if (bShowPifRamErrors()) if (bShowPifRamErrors())
{ {
if (Command[0] != 1) { DisplayError("What am I meant to do with this Controller Command"); } if (Command[0] != 1) { _Notify->DisplayError("What am I meant to do with this Controller Command"); }
if (Command[1] != 3) { DisplayError("What am I meant to do with this Controller Command"); } if (Command[1] != 3) { _Notify->DisplayError("What am I meant to do with this Controller Command"); }
} }
if (Controllers[Control].Present == TRUE) { if (Controllers[Control].Present == TRUE) {
Command[3] = 0x05; Command[3] = 0x05;
@ -428,8 +428,8 @@ void CPifRam::ProcessControllerCommand ( int Control, BYTE * Command)
case 0x01: // read controller case 0x01: // read controller
if (bShowPifRamErrors()) if (bShowPifRamErrors())
{ {
if (Command[0] != 1) { DisplayError("What am I meant to do with this Controller Command"); } if (Command[0] != 1) { _Notify->DisplayError("What am I meant to do with this Controller Command"); }
if (Command[1] != 4) { DisplayError("What am I meant to do with this Controller Command"); } if (Command[1] != 4) { _Notify->DisplayError("What am I meant to do with this Controller Command"); }
} }
if (Controllers[Control].Present == FALSE) { if (Controllers[Control].Present == FALSE) {
Command[1] |= 0x80; Command[1] |= 0x80;
@ -441,8 +441,8 @@ void CPifRam::ProcessControllerCommand ( int Control, BYTE * Command)
#endif #endif
if (bShowPifRamErrors()) if (bShowPifRamErrors())
{ {
if (Command[0] != 3) { DisplayError("What am I meant to do with this Controller Command"); } if (Command[0] != 3) { _Notify->DisplayError("What am I meant to do with this Controller Command"); }
if (Command[1] != 33) { DisplayError("What am I meant to do with this Controller Command"); } if (Command[1] != 33) { _Notify->DisplayError("What am I meant to do with this Controller Command"); }
} }
if (Controllers[Control].Present == TRUE) { if (Controllers[Control].Present == TRUE) {
DWORD address = ((Command[3] << 8) | Command[4]); DWORD address = ((Command[3] << 8) | Command[4]);
@ -470,8 +470,8 @@ void CPifRam::ProcessControllerCommand ( int Control, BYTE * Command)
#endif #endif
if (bShowPifRamErrors()) if (bShowPifRamErrors())
{ {
if (Command[0] != 35) { DisplayError("What am I meant to do with this Controller Command"); } if (Command[0] != 35) { _Notify->DisplayError("What am I meant to do with this Controller Command"); }
if (Command[1] != 1) { DisplayError("What am I meant to do with this Controller Command"); } if (Command[1] != 1) { _Notify->DisplayError("What am I meant to do with this Controller Command"); }
} }
if (Controllers[Control].Present == TRUE) { if (Controllers[Control].Present == TRUE) {
DWORD address = ((Command[3] << 8) | Command[4]); DWORD address = ((Command[3] << 8) | Command[4]);
@ -493,7 +493,7 @@ void CPifRam::ProcessControllerCommand ( int Control, BYTE * Command)
#endif #endif
break; break;
default: default:
if (bShowPifRamErrors()) { DisplayError("Unknown ControllerCommand %d",Command[2]); } if (bShowPifRamErrors()) { _Notify->DisplayError("Unknown ControllerCommand %d",Command[2]); }
} }
} }
@ -506,8 +506,8 @@ void CPifRam::ReadControllerCommand (int Control, BYTE * Command) {
{ {
if (bShowPifRamErrors()) if (bShowPifRamErrors())
{ {
if (Command[0] != 1) { DisplayError("What am I meant to do with this Controller Command"); } if (Command[0] != 1) { _Notify->DisplayError("What am I meant to do with this Controller Command"); }
if (Command[1] != 4) { DisplayError("What am I meant to do with this Controller Command"); } if (Command[1] != 4) { _Notify->DisplayError("What am I meant to do with this Controller Command"); }
} }
*(DWORD *)&Command[3] = _BaseSystem->GetButtons(Control); *(DWORD *)&Command[3] = _BaseSystem->GetButtons(Control);
} }

20
Source/Project64/N64 System/Mips/Register Class.cpp
View File

@ -296,12 +296,12 @@ void CRegisters::CheckInterrupts ( void )
void CRegisters::DoAddressError ( BOOL DelaySlot, DWORD BadVaddr, BOOL FromRead) void CRegisters::DoAddressError ( BOOL DelaySlot, DWORD BadVaddr, BOOL FromRead)
{ {
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
DisplayError("AddressError"); _Notify->DisplayError("AddressError");
if (( STATUS_REGISTER & STATUS_EXL ) != 0 ) { if (( STATUS_REGISTER & STATUS_EXL ) != 0 ) {
DisplayError("EXL set in AddressError Exception"); _Notify->DisplayError("EXL set in AddressError Exception");
} }
if (( STATUS_REGISTER & STATUS_ERL ) != 0 ) { if (( STATUS_REGISTER & STATUS_ERL ) != 0 ) {
DisplayError("ERL set in AddressError Exception"); _Notify->DisplayError("ERL set in AddressError Exception");
} }
#endif #endif
if (FromRead) { if (FromRead) {
@ -338,10 +338,10 @@ void CRegisters::DoBreakException ( BOOL DelaySlot)
{ {
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
if (( STATUS_REGISTER & STATUS_EXL ) != 0 ) { if (( STATUS_REGISTER & STATUS_EXL ) != 0 ) {
DisplayError("EXL set in Break Exception"); _Notify->DisplayError("EXL set in Break Exception");
} }
if (( STATUS_REGISTER & STATUS_ERL ) != 0 ) { if (( STATUS_REGISTER & STATUS_ERL ) != 0 ) {
DisplayError("ERL set in Break Exception"); _Notify->DisplayError("ERL set in Break Exception");
} }
#endif #endif
@ -360,10 +360,10 @@ void CRegisters::DoCopUnusableException ( BOOL DelaySlot, int Coprocessor )
{ {
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
if (( STATUS_REGISTER & STATUS_EXL ) != 0 ) { if (( STATUS_REGISTER & STATUS_EXL ) != 0 ) {
DisplayError("EXL set in Break Exception"); _Notify->DisplayError("EXL set in Break Exception");
} }
if (( STATUS_REGISTER & STATUS_ERL ) != 0 ) { if (( STATUS_REGISTER & STATUS_ERL ) != 0 ) {
DisplayError("ERL set in Break Exception"); _Notify->DisplayError("ERL set in Break Exception");
} }
#endif #endif
@ -426,7 +426,7 @@ void CRegisters::DoTLBReadMiss ( BOOL DelaySlot, DWORD BadVaddr )
STATUS_REGISTER |= STATUS_EXL; STATUS_REGISTER |= STATUS_EXL;
} else { } else {
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
DisplayError("TLBMiss - EXL Set\nBadVaddr = %X\nAddress Defined: %s",BadVaddr,_TLB->AddressDefined(BadVaddr)?"TRUE":"FALSE"); _Notify->DisplayError("TLBMiss - EXL Set\nBadVaddr = %X\nAddress Defined: %s",BadVaddr,_TLB->AddressDefined(BadVaddr)?"TRUE":"FALSE");
#endif #endif
m_PROGRAM_COUNTER = 0x80000180; m_PROGRAM_COUNTER = 0x80000180;
} }
@ -436,10 +436,10 @@ void CRegisters::DoSysCallException ( BOOL DelaySlot)
{ {
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
if (( STATUS_REGISTER & STATUS_EXL ) != 0 ) { if (( STATUS_REGISTER & STATUS_EXL ) != 0 ) {
DisplayError("EXL set in SysCall Exception"); _Notify->DisplayError("EXL set in SysCall Exception");
} }
if (( STATUS_REGISTER & STATUS_ERL ) != 0 ) { if (( STATUS_REGISTER & STATUS_ERL ) != 0 ) {
DisplayError("ERL set in SysCall Exception"); _Notify->DisplayError("ERL set in SysCall Exception");
} }
#endif #endif

62
Source/Project64/N64 System/Recompiler/Code Section.cpp
View File

@ -105,7 +105,7 @@ void CCodeSection::CompileExit ( DWORD JumpPC, DWORD TargetPC, CRegInfo &ExitReg
sprintf(String,"Exit_%d",m_BlockInfo->m_ExitInfo.size()); sprintf(String,"Exit_%d",m_BlockInfo->m_ExitInfo.size());
if (x86Jmp == NULL) if (x86Jmp == NULL)
{ {
DisplayError("CompileExit error"); _Notify->DisplayError("CompileExit error");
ExitThread(0); ExitThread(0);
} }
x86Jmp(String,0); x86Jmp(String,0);
@ -291,7 +291,7 @@ void CCodeSection::CompileExit ( DWORD JumpPC, DWORD TargetPC, CRegInfo &ExitReg
ExitCodeBlock(); ExitCodeBlock();
break; break;
default: default:
DisplayError("how did you want to exit on reason (%d) ???",reason); _Notify->DisplayError("how did you want to exit on reason (%d) ???",reason);
} }
} }
@ -532,7 +532,7 @@ void CCodeSection::GenerateSectionLinkage (void)
continue; continue;
} }
if (JumpInfo[i]->TargetPC != TargetSection[i]->m_EnterPC) { if (JumpInfo[i]->TargetPC != TargetSection[i]->m_EnterPC) {
DisplayError("I need to add more code in GenerateSectionLinkage cause this is going to cause an exception"); _Notify->DisplayError("I need to add more code in GenerateSectionLinkage cause this is going to cause an exception");
BreakPoint(__FILE__,__LINE__); BreakPoint(__FILE__,__LINE__);
} }
if (TargetSection[i]->m_CompiledLocation == NULL) if (TargetSection[i]->m_CompiledLocation == NULL)
@ -626,20 +626,20 @@ void CCodeSection::SyncRegState ( const CRegInfo & SyncTo )
case CRegInfo::STATE_CONST_64: case CRegInfo::STATE_CONST_64:
if (MipsReg(i) != SyncTo.cMipsReg(i)) { if (MipsReg(i) != SyncTo.cMipsReg(i)) {
#if (!defined(EXTERNAL_RELEASE)) #if (!defined(EXTERNAL_RELEASE))
DisplayError("Umm.. how ???"); _Notify->DisplayError("Umm.. how ???");
#endif #endif
} }
continue; continue;
case CRegInfo::STATE_CONST_32: case CRegInfo::STATE_CONST_32:
if (MipsRegLo(i) != SyncTo.cMipsRegLo(i)) { if (MipsRegLo(i) != SyncTo.cMipsRegLo(i)) {
#if (!defined(EXTERNAL_RELEASE)) #if (!defined(EXTERNAL_RELEASE))
DisplayError("Umm.. how ???"); _Notify->DisplayError("Umm.. how ???");
#endif #endif
} }
continue; continue;
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
default: default:
DisplayError("Unhandled Reg state %d\nin SyncRegState",MipsRegState(i)); _Notify->DisplayError("Unhandled Reg state %d\nin SyncRegState",MipsRegState(i));
#endif #endif
} }
} }
@ -685,7 +685,7 @@ void CCodeSection::SyncRegState ( const CRegInfo & SyncTo )
default: default:
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
CPU_Message("Do something with states in SyncRegState\nSTATE_MAPPED_64\n%d",MipsRegState(i)); CPU_Message("Do something with states in SyncRegState\nSTATE_MAPPED_64\n%d",MipsRegState(i));
DisplayError("Do something with states in SyncRegState\nSTATE_MAPPED_64\n%d",MipsRegState(i)); _Notify->DisplayError("Do something with states in SyncRegState\nSTATE_MAPPED_64\n%d",MipsRegState(i));
#endif #endif
continue; continue;
} }
@ -720,10 +720,10 @@ void CCodeSection::SyncRegState ( const CRegInfo & SyncTo )
break; break;
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
case CRegInfo::STATE_CONST_64: case CRegInfo::STATE_CONST_64:
DisplayError("hi %X\nLo %X",MipsRegHi(i),MipsRegLo(i)); _Notify->DisplayError("hi %X\nLo %X",MipsRegHi(i),MipsRegLo(i));
default: default:
CPU_Message("Do something with states in SyncRegState\nSTATE_MAPPED_32_SIGN\n%d",MipsRegState(i)); CPU_Message("Do something with states in SyncRegState\nSTATE_MAPPED_32_SIGN\n%d",MipsRegState(i));
DisplayError("Do something with states in SyncRegState\nSTATE_MAPPED_32_SIGN\n%d",MipsRegState(i)); _Notify->DisplayError("Do something with states in SyncRegState\nSTATE_MAPPED_32_SIGN\n%d",MipsRegState(i));
#endif #endif
} }
MipsRegMapLo(i) = Reg; MipsRegMapLo(i) = Reg;
@ -750,7 +750,7 @@ void CCodeSection::SyncRegState ( const CRegInfo & SyncTo )
m_RegWorkingSet.SetX86Mapped(MipsRegMapLo(i),CRegInfo::NotMapped); m_RegWorkingSet.SetX86Mapped(MipsRegMapLo(i),CRegInfo::NotMapped);
} else { } else {
CPU_Message("Do something with states in SyncRegState\nSTATE_MAPPED_32_ZERO\n%d",MipsRegState(i)); CPU_Message("Do something with states in SyncRegState\nSTATE_MAPPED_32_ZERO\n%d",MipsRegState(i));
DisplayError("Do something with states in SyncRegState\nSTATE_MAPPED_32_ZERO\n%d",MipsRegState(i)); _Notify->DisplayError("Do something with states in SyncRegState\nSTATE_MAPPED_32_ZERO\n%d",MipsRegState(i));
} }
break; break;
case CRegInfo::STATE_CONST_32: case CRegInfo::STATE_CONST_32:
@ -758,7 +758,7 @@ void CCodeSection::SyncRegState ( const CRegInfo & SyncTo )
CPU_Message("Sign Problems in SyncRegState\nSTATE_MAPPED_32_ZERO"); CPU_Message("Sign Problems in SyncRegState\nSTATE_MAPPED_32_ZERO");
CPU_Message("%s: %X",CRegName::GPR[i],MipsRegLo_S(i)); CPU_Message("%s: %X",CRegName::GPR[i],MipsRegLo_S(i));
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
DisplayError("Sign Problems in SyncRegState\nSTATE_MAPPED_32_ZERO"); _Notify->DisplayError("Sign Problems in SyncRegState\nSTATE_MAPPED_32_ZERO");
#endif #endif
} }
MoveConstToX86reg(MipsRegLo(i),Reg); MoveConstToX86reg(MipsRegLo(i),Reg);
@ -766,7 +766,7 @@ void CCodeSection::SyncRegState ( const CRegInfo & SyncTo )
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
default: default:
CPU_Message("Do something with states in SyncRegState\nSTATE_MAPPED_32_ZERO\n%d",MipsRegState(i)); CPU_Message("Do something with states in SyncRegState\nSTATE_MAPPED_32_ZERO\n%d",MipsRegState(i));
DisplayError("Do something with states in SyncRegState\nSTATE_MAPPED_32_ZERO\n%d",MipsRegState(i)); _Notify->DisplayError("Do something with states in SyncRegState\nSTATE_MAPPED_32_ZERO\n%d",MipsRegState(i));
#endif #endif
} }
MipsRegMapLo(i) = Reg; MipsRegMapLo(i) = Reg;
@ -777,8 +777,8 @@ void CCodeSection::SyncRegState ( const CRegInfo & SyncTo )
default: default:
#if (!defined(EXTERNAL_RELEASE)) #if (!defined(EXTERNAL_RELEASE))
CPU_Message("%d - %d reg: %s (%d)",SyncTo.cMipsRegState(i),MipsRegState(i),CRegName::GPR[i],i); CPU_Message("%d - %d reg: %s (%d)",SyncTo.cMipsRegState(i),MipsRegState(i),CRegName::GPR[i],i);
DisplayError("%d\n%d\nreg: %s (%d)",SyncTo.cMipsRegState(i),MipsRegState(i),CRegName::GPR[i],i); _Notify->DisplayError("%d\n%d\nreg: %s (%d)",SyncTo.cMipsRegState(i),MipsRegState(i),CRegName::GPR[i],i);
DisplayError("Do something with states in SyncRegState"); _Notify->DisplayError("Do something with states in SyncRegState");
#endif #endif
changed = false; changed = false;
} }
@ -919,11 +919,11 @@ bool CCodeSection::GenerateX86Code ( DWORD Test )
__try { __try {
if (!_MMU->LW_VAddr(m_CompilePC,m_Opcode.Hex)) if (!_MMU->LW_VAddr(m_CompilePC,m_Opcode.Hex))
{ {
DisplayError(GS(MSG_FAIL_LOAD_WORD)); _Notify->DisplayError(GS(MSG_FAIL_LOAD_WORD));
ExitThread(0); ExitThread(0);
} }
} __except( _MMU->MemoryFilter( GetExceptionCode(), GetExceptionInformation()) ) { } __except( _MMU->MemoryFilter( GetExceptionCode(), GetExceptionInformation()) ) {
DisplayError(GS(MSG_UNKNOWN_MEM_ACTION)); _Notify->DisplayError(GS(MSG_UNKNOWN_MEM_ACTION));
ExitThread(0); ExitThread(0);
} }
@ -1244,7 +1244,7 @@ bool CCodeSection::GenerateX86Code ( DWORD Test )
{ {
if (m_NextInstruction == DO_DELAY_SLOT) if (m_NextInstruction == DO_DELAY_SLOT)
{ {
DisplayError("Wanting to do delay slot over end of block"); _Notify->DisplayError("Wanting to do delay slot over end of block");
_Notify->BreakPoint(__FILE__,__LINE__); _Notify->BreakPoint(__FILE__,__LINE__);
} }
if (m_NextInstruction == NORMAL) { if (m_NextInstruction == NORMAL) {
@ -1508,7 +1508,7 @@ bool CCodeSection::FillSectionInfo(STEP_TYPE StartStepType)
m_NextInstruction = StartStepType; m_NextInstruction = StartStepType;
do { do {
if (!_MMU->LW_VAddr(CompilePC(), Command.Hex)) { if (!_MMU->LW_VAddr(CompilePC(), Command.Hex)) {
DisplayError(GS(MSG_FAIL_LOAD_WORD)); _Notify->DisplayError(GS(MSG_FAIL_LOAD_WORD));
return false; return false;
} }
switch (Command.op) { switch (Command.op) {
@ -1918,7 +1918,7 @@ bool CCodeSection::FillSectionInfo(STEP_TYPE StartStepType)
default: default:
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
if (Command.Hex == 0x00000001) { break; } if (Command.Hex == 0x00000001) { break; }
DisplayError("Unhandled R4300i OpCode in FillSectionInfo 5\n%s", _Notify->DisplayError("Unhandled R4300i OpCode in FillSectionInfo 5\n%s",
R4300iOpcodeName(Command.Hex,CompilePC())); R4300iOpcodeName(Command.Hex,CompilePC()));
#endif #endif
m_NextInstruction = END_BLOCK; m_NextInstruction = END_BLOCK;
@ -1998,7 +1998,7 @@ bool CCodeSection::FillSectionInfo(STEP_TYPE StartStepType)
default: default:
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
if (Command.Hex == 0x0407000D) { break; } if (Command.Hex == 0x0407000D) { break; }
DisplayError("Unhandled R4300i OpCode in FillSectionInfo 4\n%s", _Notify->DisplayError("Unhandled R4300i OpCode in FillSectionInfo 4\n%s",
R4300iOpcodeName(Command.Hex,CompilePC())); R4300iOpcodeName(Command.Hex,CompilePC()));
#endif #endif
m_NextInstruction = END_BLOCK; m_NextInstruction = END_BLOCK;
@ -2160,7 +2160,7 @@ bool CCodeSection::FillSectionInfo(STEP_TYPE StartStepType)
case R4300i_COP0_CO_ERET: m_NextInstruction = END_BLOCK; break; case R4300i_COP0_CO_ERET: m_NextInstruction = END_BLOCK; break;
default: default:
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
DisplayError("Unhandled R4300i OpCode in FillSectionInfo\n%s", _Notify->DisplayError("Unhandled R4300i OpCode in FillSectionInfo\n%s",
R4300iOpcodeName(Command.Hex,CompilePC())); R4300iOpcodeName(Command.Hex,CompilePC()));
#endif #endif
m_NextInstruction = END_BLOCK; m_NextInstruction = END_BLOCK;
@ -2168,7 +2168,7 @@ bool CCodeSection::FillSectionInfo(STEP_TYPE StartStepType)
} }
} else { } else {
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
DisplayError("Unhandled R4300i OpCode in FillSectionInfo 3\n%s", _Notify->DisplayError("Unhandled R4300i OpCode in FillSectionInfo 3\n%s",
R4300iOpcodeName(Command.Hex,CompilePC())); R4300iOpcodeName(Command.Hex,CompilePC()));
#endif #endif
m_NextInstruction = END_BLOCK; m_NextInstruction = END_BLOCK;
@ -2196,7 +2196,7 @@ bool CCodeSection::FillSectionInfo(STEP_TYPE StartStepType)
OPCODE NewCommand; OPCODE NewCommand;
if (!_MMU->LW_VAddr(CompilePC() + 4, NewCommand.Hex)) { if (!_MMU->LW_VAddr(CompilePC() + 4, NewCommand.Hex)) {
DisplayError(GS(MSG_FAIL_LOAD_WORD)); _Notify->DisplayError(GS(MSG_FAIL_LOAD_WORD));
ExitThread(0); ExitThread(0);
} }
@ -2224,7 +2224,7 @@ bool CCodeSection::FillSectionInfo(STEP_TYPE StartStepType)
OPCODE NewCommand; OPCODE NewCommand;
if (!_MMU->LW_VAddr(CompilePC() + 4, NewCommand.Hex)) { if (!_MMU->LW_VAddr(CompilePC() + 4, NewCommand.Hex)) {
DisplayError(GS(MSG_FAIL_LOAD_WORD)); _Notify->DisplayError(GS(MSG_FAIL_LOAD_WORD));
ExitThread(0); ExitThread(0);
} }
@ -2253,7 +2253,7 @@ bool CCodeSection::FillSectionInfo(STEP_TYPE StartStepType)
case R4300i_COP1_L: break; case R4300i_COP1_L: break;
default: default:
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
DisplayError("Unhandled R4300i OpCode in FillSectionInfo 2\n%s", _Notify->DisplayError("Unhandled R4300i OpCode in FillSectionInfo 2\n%s",
R4300iOpcodeName(Command.Hex,CompilePC())); R4300iOpcodeName(Command.Hex,CompilePC()));
#endif #endif
m_NextInstruction = END_BLOCK; m_NextInstruction = END_BLOCK;
@ -2333,7 +2333,7 @@ bool CCodeSection::FillSectionInfo(STEP_TYPE StartStepType)
if (Command.Hex == 0xC1200000) { break; } if (Command.Hex == 0xC1200000) { break; }
if (Command.Hex == 0x4C5A5353) { break; } if (Command.Hex == 0x4C5A5353) { break; }
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
DisplayError("Unhandled R4300i OpCode in FillSectionInfo 1\n%s\n%X", _Notify->DisplayError("Unhandled R4300i OpCode in FillSectionInfo 1\n%s\n%X",
R4300iOpcodeName(Command.Hex,CompilePC()),Command.Hex); R4300iOpcodeName(Command.Hex,CompilePC()),Command.Hex);
#endif #endif
} }
@ -2381,7 +2381,7 @@ bool CCodeSection::FillSectionInfo(STEP_TYPE StartStepType)
} }
if ((CompilePC() & 0xFFFFF000) != (m_EnterPC & 0xFFFFF000)) { if ((CompilePC() & 0xFFFFF000) != (m_EnterPC & 0xFFFFF000)) {
if (m_NextInstruction != END_BLOCK && m_NextInstruction != NORMAL) { if (m_NextInstruction != END_BLOCK && m_NextInstruction != NORMAL) {
// DisplayError("Branch running over delay slot ???\nm_NextInstruction == %d",m_NextInstruction); // _Notify->DisplayError("Branch running over delay slot ???\nm_NextInstruction == %d",m_NextInstruction);
m_Cont.TargetPC = (DWORD)-1; m_Cont.TargetPC = (DWORD)-1;
m_Jump.TargetPC = (DWORD)-1; m_Jump.TargetPC = (DWORD)-1;
} }
@ -2565,7 +2565,7 @@ bool CCodeSection::InheritParentInfo ( void )
int NoOfCompiledParents = ParentList.size(); int NoOfCompiledParents = ParentList.size();
if (NoOfCompiledParents == 0) if (NoOfCompiledParents == 0)
{ {
DisplayError("No Parent has been compiled ????"); _Notify->DisplayError("No Parent has been compiled ????");
return false; return false;
} }
@ -2690,7 +2690,7 @@ bool CCodeSection::InheritParentInfo ( void )
} }
break; break;
default: default:
DisplayError("Unknown CPU State(%d) in InheritParentInfo",MipsRegState(i2)); _Notify->DisplayError("Unknown CPU State(%d) in InheritParentInfo",MipsRegState(i2));
} }
} }
if (IsConst(i2)) { if (IsConst(i2)) {
@ -2772,14 +2772,14 @@ bool CCodeSection::InheritParentInfo ( void )
case CRegInfo::STATE_CONST_32: case CRegInfo::STATE_CONST_32:
if (MipsRegLo(i2) != RegSet->MipsRegLo(i2)) { if (MipsRegLo(i2) != RegSet->MipsRegLo(i2)) {
#if (!defined(EXTERNAL_RELEASE)) #if (!defined(EXTERNAL_RELEASE))
DisplayError("Umm.. how ???"); _Notify->DisplayError("Umm.. how ???");
#endif #endif
NeedSync = true; NeedSync = true;
} }
break; break;
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
default: default:
DisplayError("Unhandled Reg state %d\nin InheritParentInfo",MipsRegState(i2)); _Notify->DisplayError("Unhandled Reg state %d\nin InheritParentInfo",MipsRegState(i2));
#endif #endif
} }
} }

26
Source/Project64/N64 System/Recompiler/Recompiler Class.cpp
View File

@ -88,7 +88,7 @@ void CRecompiler::RecompilerMain_VirtualTable ( void )
_Reg->DoTLBReadMiss(false,PC); _Reg->DoTLBReadMiss(false,PC);
if (!_TransVaddr->ValidVaddr(PC)) if (!_TransVaddr->ValidVaddr(PC))
{ {
DisplayError("Failed to translate PC to a PAddr: %X\n\nEmulation stopped",PC); _Notify->DisplayError("Failed to translate PC to a PAddr: %X\n\nEmulation stopped",PC);
return; return;
} }
continue; continue;
@ -153,7 +153,7 @@ void CRecompiler::RecompilerMain_VirtualTable_validate ( void )
NextInstruction = NORMAL; NextInstruction = NORMAL;
if (!_TLB->ValidVaddr(PROGRAM_COUNTER)) if (!_TLB->ValidVaddr(PROGRAM_COUNTER))
{ {
DisplayError("Failed to translate PC to a PAddr: %X\n\nEmulation stopped",PROGRAM_COUNTER); _Notify->DisplayError("Failed to translate PC to a PAddr: %X\n\nEmulation stopped",PROGRAM_COUNTER);
return; return;
} }
continue; continue;
@ -213,7 +213,7 @@ void CRecompiler::RecompilerMain_VirtualTable_validate ( void )
NextInstruction = NORMAL; NextInstruction = NORMAL;
if (!_TLB->ValidVaddr(PROGRAM_COUNTER)) if (!_TLB->ValidVaddr(PROGRAM_COUNTER))
{ {
DisplayError("Failed to translate PC to a PAddr: %X\n\nEmulation stopped",PROGRAM_COUNTER); _Notify->DisplayError("Failed to translate PC to a PAddr: %X\n\nEmulation stopped",PROGRAM_COUNTER);
return; return;
} }
} }
@ -236,7 +236,7 @@ void CRecompiler::RecompilerMain_VirtualTable_validate ( void )
NextInstruction = NORMAL; NextInstruction = NORMAL;
if (!_MMU->ValidVaddr(PROGRAM_COUNTER)) if (!_MMU->ValidVaddr(PROGRAM_COUNTER))
{ {
DisplayError("Failed to translate PC to a PAddr: %X\n\nEmulation stopped",PROGRAM_COUNTER); _Notify->DisplayError("Failed to translate PC to a PAddr: %X\n\nEmulation stopped",PROGRAM_COUNTER);
return; return;
} }
} }
@ -360,7 +360,7 @@ void CRecompiler::RecompilerMain_Lookup( void )
DoTLBMiss(NextInstruction == DELAY_SLOT,PROGRAM_COUNTER); DoTLBMiss(NextInstruction == DELAY_SLOT,PROGRAM_COUNTER);
NextInstruction = NORMAL; NextInstruction = NORMAL;
if (!TranslateVaddr(PROGRAM_COUNTER, &Addr)) { if (!TranslateVaddr(PROGRAM_COUNTER, &Addr)) {
DisplayError("Failed to translate PC to a PAddr: %X\n\nEmulation stopped",PROGRAM_COUNTER); _Notify->DisplayError("Failed to translate PC to a PAddr: %X\n\nEmulation stopped",PROGRAM_COUNTER);
return; return;
} }
} }
@ -410,7 +410,7 @@ void CRecompiler::RecompilerMain_Lookup( void )
if (Addr > 0x20000000) if (Addr > 0x20000000)
{ {
WriteTraceF(TraceDebug,"Executing from non mapped space .1 PC: %X Addr: %X",PROGRAM_COUNTER, Addr); WriteTraceF(TraceDebug,"Executing from non mapped space .1 PC: %X Addr: %X",PROGRAM_COUNTER, Addr);
DisplayError(GS(MSG_NONMAPPED_SPACE)); _Notify->DisplayError(GS(MSG_NONMAPPED_SPACE));
break; break;
} }
Info = (CCompiledFunc *)*(JumpTable + (Addr >> 2)); Info = (CCompiledFunc *)*(JumpTable + (Addr >> 2));
@ -422,7 +422,7 @@ void CRecompiler::RecompilerMain_Lookup( void )
continue; continue;
} else { } else {
WriteTraceF(TraceDebug,"Executing from non mapped space .1 PC: %X Addr: %X",PROGRAM_COUNTER, Addr); WriteTraceF(TraceDebug,"Executing from non mapped space .1 PC: %X Addr: %X",PROGRAM_COUNTER, Addr);
DisplayError(GS(MSG_NONMAPPED_SPACE)); _Notify->DisplayError(GS(MSG_NONMAPPED_SPACE));
break; break;
} }
} }
@ -437,7 +437,7 @@ void CRecompiler::RecompilerMain_Lookup( void )
continue; continue;
} else { } else {
WriteTraceF(TraceDebug,"Executing from non mapped space .2 PC: %X Addr: %X",PROGRAM_COUNTER, Addr); WriteTraceF(TraceDebug,"Executing from non mapped space .2 PC: %X Addr: %X",PROGRAM_COUNTER, Addr);
DisplayError(GS(MSG_NONMAPPED_SPACE)); _Notify->DisplayError(GS(MSG_NONMAPPED_SPACE));
return; return;
} }
} }
@ -507,7 +507,7 @@ void CRecompiler::RecompilerMain_Lookup_TLB( void )
_Reg->DoTLBReadMiss(false,PROGRAM_COUNTER); _Reg->DoTLBReadMiss(false,PROGRAM_COUNTER);
if (!_TransVaddr->TranslateVaddr(PROGRAM_COUNTER, PhysicalAddr)) if (!_TransVaddr->TranslateVaddr(PROGRAM_COUNTER, PhysicalAddr))
{ {
DisplayError("Failed to translate PC to a PAddr: %X\n\nEmulation stopped",PROGRAM_COUNTER); _Notify->DisplayError("Failed to translate PC to a PAddr: %X\n\nEmulation stopped",PROGRAM_COUNTER);
m_EndEmulation = true; m_EndEmulation = true;
} }
continue; continue;
@ -607,7 +607,7 @@ void CRecompiler::RecompilerMain_Lookup_validate_TLB( void )
_Reg->DoTLBReadMiss(false,PROGRAM_COUNTER); _Reg->DoTLBReadMiss(false,PROGRAM_COUNTER);
if (!_TransVaddr->TranslateVaddr(PROGRAM_COUNTER, PhysicalAddr)) if (!_TransVaddr->TranslateVaddr(PROGRAM_COUNTER, PhysicalAddr))
{ {
DisplayError("Failed to translate PC to a PAddr: %X\n\nEmulation stopped",PROGRAM_COUNTER); _Notify->DisplayError("Failed to translate PC to a PAddr: %X\n\nEmulation stopped",PROGRAM_COUNTER);
m_EndEmulation = true; m_EndEmulation = true;
} }
continue; continue;
@ -695,7 +695,7 @@ void CRecompiler::RecompilerMain_ChangeMemory ( void )
NextInstruction = NORMAL; NextInstruction = NORMAL;
if (!TranslateVaddr(PROGRAM_COUNTER, &Addr)) { if (!TranslateVaddr(PROGRAM_COUNTER, &Addr)) {
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
DisplayError("Failed to translate PC to a PAddr: %X\n\nEmulation stopped",PROGRAM_COUNTER); _Notify->DisplayError("Failed to translate PC to a PAddr: %X\n\nEmulation stopped",PROGRAM_COUNTER);
#endif #endif
ExitThread(0); ExitThread(0);
} }
@ -709,7 +709,7 @@ void CRecompiler::RecompilerMain_ChangeMemory ( void )
Value = (DWORD)(*(DelaySlotTable + (Addr >> 12))); Value = (DWORD)(*(DelaySlotTable + (Addr >> 12)));
} __except(EXCEPTION_EXECUTE_HANDLER) { } __except(EXCEPTION_EXECUTE_HANDLER) {
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
DisplayError("Executing Delay Slot from non maped space\nPROGRAM_COUNTER = 0x%X",PROGRAM_COUNTER); _Notify->DisplayError("Executing Delay Slot from non maped space\nPROGRAM_COUNTER = 0x%X",PROGRAM_COUNTER);
#endif #endif
ExitThread(0); ExitThread(0);
} }
@ -760,7 +760,7 @@ void CRecompiler::RecompilerMain_ChangeMemory ( void )
Block = NULL; Block = NULL;
} }
} __except(EXCEPTION_EXECUTE_HANDLER) { } __except(EXCEPTION_EXECUTE_HANDLER) {
DisplayError(GS(MSG_NONMAPPED_SPACE)); _Notify->DisplayError(GS(MSG_NONMAPPED_SPACE));
ExitThread(0); ExitThread(0);
} }

2
Source/Project64/N64 System/Recompiler/Recompiler Memory.cpp
View File

@ -78,5 +78,5 @@ void CRecompMemory::ShowMemUsed()
DWORD TotalAvaliable = m_RecompSize / 0x100000; DWORD TotalAvaliable = m_RecompSize / 0x100000;
DisplayMessage(0,"Memory used: %d mb %-3d kb %-3d bytes Total Available: %d mb",MB,KB,Size, TotalAvaliable); _Notify->DisplayMessage(0,"Memory used: %d mb %-3d kb %-3d bytes Total Available: %d mb",MB,KB,Size, TotalAvaliable);
} }

30
Source/Project64/N64 System/Recompiler/Recompiler Ops.cpp
View File

@ -42,7 +42,7 @@ void CRecompilerOps::Compile_Branch (CRecompilerOps::BranchFunction CompareFunc,
OPCODE Command; OPCODE Command;
if (!_MMU->LW_VAddr(m_CompilePC + 4, Command.Hex)) { if (!_MMU->LW_VAddr(m_CompilePC + 4, Command.Hex)) {
DisplayError(GS(MSG_FAIL_LOAD_WORD)); _Notify->DisplayError(GS(MSG_FAIL_LOAD_WORD));
ExitThread(0); ExitThread(0);
} }
@ -59,7 +59,7 @@ void CRecompilerOps::Compile_Branch (CRecompilerOps::BranchFunction CompareFunc,
break; break;
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
default: default:
DisplayError("Unknown branch type"); _Notify->DisplayError("Unknown branch type");
#endif #endif
} }
} else { } else {
@ -275,7 +275,7 @@ void CRecompilerOps::Compile_Branch (CRecompilerOps::BranchFunction CompareFunc,
m_NextInstruction = END_BLOCK; m_NextInstruction = END_BLOCK;
} else { } else {
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
DisplayError("WTF\n\nBranch\nNextInstruction = %X", m_NextInstruction); _Notify->DisplayError("WTF\n\nBranch\nNextInstruction = %X", m_NextInstruction);
#endif #endif
} }
} }
@ -316,7 +316,7 @@ void CRecompilerOps::Compile_BranchLikely (BranchFunction CompareFunc, BOOL Link
if (m_Section->m_Cont.FallThrough) { if (m_Section->m_Cont.FallThrough) {
if (m_Section->m_Jump.LinkLocation != NULL) { if (m_Section->m_Jump.LinkLocation != NULL) {
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
DisplayError("WTF .. problem with CRecompilerOps::BranchLikely"); _Notify->DisplayError("WTF .. problem with CRecompilerOps::BranchLikely");
#endif #endif
} }
m_Section->GenerateSectionLinkage(); m_Section->GenerateSectionLinkage();
@ -358,7 +358,7 @@ void CRecompilerOps::Compile_BranchLikely (BranchFunction CompareFunc, BOOL Link
m_NextInstruction = END_BLOCK; m_NextInstruction = END_BLOCK;
} else { } else {
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
DisplayError("WTF\n\nBranchLikely\nNextInstruction = %X", m_NextInstruction); _Notify->DisplayError("WTF\n\nBranchLikely\nNextInstruction = %X", m_NextInstruction);
#endif #endif
} }
} }
@ -1152,7 +1152,7 @@ void CRecompilerOps::BGEZ_Compare (void) {
if (IsConst(m_Opcode.rs)) { if (IsConst(m_Opcode.rs)) {
if (Is64Bit(m_Opcode.rs)) { if (Is64Bit(m_Opcode.rs)) {
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
DisplayError("BGEZ 1"); _Notify->DisplayError("BGEZ 1");
#endif #endif
CRecompilerOps::UnknownOpcode(); CRecompilerOps::UnknownOpcode();
} else if (IsSigned(m_Opcode.rs)) { } else if (IsSigned(m_Opcode.rs)) {
@ -1282,7 +1282,7 @@ void CRecompilerOps::J (void) {
m_NextInstruction = END_BLOCK; m_NextInstruction = END_BLOCK;
} else { } else {
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
DisplayError("WTF\n\nJ\nNextInstruction = %X", m_NextInstruction); _Notify->DisplayError("WTF\n\nJ\nNextInstruction = %X", m_NextInstruction);
#endif #endif
} }
} }
@ -1322,7 +1322,7 @@ void CRecompilerOps::JAL (void) {
m_NextInstruction = END_BLOCK; m_NextInstruction = END_BLOCK;
} else { } else {
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
DisplayError("WTF\n\nBranch\nNextInstruction = %X", m_NextInstruction); _Notify->DisplayError("WTF\n\nBranch\nNextInstruction = %X", m_NextInstruction);
#endif #endif
} }
return; return;
@ -1684,7 +1684,7 @@ void CRecompilerOps::CACHE (void){
break; break;
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
default: default:
DisplayError("cache: %d",m_Opcode.rt); _Notify->DisplayError("cache: %d",m_Opcode.rt);
#endif #endif
} }
} }
@ -2041,7 +2041,7 @@ void CRecompilerOps::SPECIAL_JR (void) {
m_NextInstruction = END_BLOCK; m_NextInstruction = END_BLOCK;
} else { } else {
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
DisplayError("WTF\n\nBranch\nNextInstruction = %X", m_NextInstruction); _Notify->DisplayError("WTF\n\nBranch\nNextInstruction = %X", m_NextInstruction);
#endif #endif
} }
} }
@ -2096,7 +2096,7 @@ void CRecompilerOps::SPECIAL_JALR (void)
m_NextInstruction = END_BLOCK; m_NextInstruction = END_BLOCK;
} else { } else {
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
DisplayError("WTF\n\nBranch\nNextInstruction = %X", m_NextInstruction); _Notify->DisplayError("WTF\n\nBranch\nNextInstruction = %X", m_NextInstruction);
#endif #endif
} }
} }
@ -2996,7 +2996,7 @@ void CRecompilerOps::SPECIAL_XOR (void) {
if (IsMapped(m_Opcode.rd)) { UnMap_GPR(m_Opcode.rd, FALSE); } if (IsMapped(m_Opcode.rd)) { UnMap_GPR(m_Opcode.rd, FALSE); }
if (Is64Bit(m_Opcode.rt) || Is64Bit(m_Opcode.rs)) { if (Is64Bit(m_Opcode.rt) || Is64Bit(m_Opcode.rs)) {
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
DisplayError("XOR 1"); _Notify->DisplayError("XOR 1");
#endif #endif
CRecompilerOps::UnknownOpcode(); CRecompilerOps::UnknownOpcode();
} else { } else {
@ -3225,7 +3225,7 @@ void CRecompilerOps::SPECIAL_SLT (void) {
if (IsKnown(m_Opcode.rt) && IsKnown(m_Opcode.rs)) { if (IsKnown(m_Opcode.rt) && IsKnown(m_Opcode.rs)) {
if (IsConst(m_Opcode.rt) && IsConst(m_Opcode.rs)) { if (IsConst(m_Opcode.rt) && IsConst(m_Opcode.rs)) {
if (Is64Bit(m_Opcode.rt) || Is64Bit(m_Opcode.rs)) { if (Is64Bit(m_Opcode.rt) || Is64Bit(m_Opcode.rs)) {
DisplayError("1"); _Notify->DisplayError("1");
CRecompilerOps::UnknownOpcode(); CRecompilerOps::UnknownOpcode();
} else { } else {
if (IsMapped(m_Opcode.rd)) { UnMap_GPR(m_Opcode.rd, FALSE); } if (IsMapped(m_Opcode.rd)) { UnMap_GPR(m_Opcode.rd, FALSE); }
@ -3458,7 +3458,7 @@ void CRecompilerOps::SPECIAL_SLTU (void) {
if (IsKnown(m_Opcode.rt) && IsKnown(m_Opcode.rs)) { if (IsKnown(m_Opcode.rt) && IsKnown(m_Opcode.rs)) {
if (IsConst(m_Opcode.rt) && IsConst(m_Opcode.rs)) { if (IsConst(m_Opcode.rt) && IsConst(m_Opcode.rs)) {
if (Is64Bit(m_Opcode.rt) || Is64Bit(m_Opcode.rs)) { if (Is64Bit(m_Opcode.rt) || Is64Bit(m_Opcode.rs)) {
DisplayError("1"); _Notify->DisplayError("1");
CRecompilerOps::UnknownOpcode(); CRecompilerOps::UnknownOpcode();
} else { } else {
if (IsMapped(m_Opcode.rd)) { UnMap_GPR(m_Opcode.rd, FALSE); } if (IsMapped(m_Opcode.rd)) { UnMap_GPR(m_Opcode.rd, FALSE); }
@ -4140,7 +4140,7 @@ void CRecompilerOps::COP0_MT (void) {
if (IsConst(m_Opcode.rt)) { if (IsConst(m_Opcode.rt)) {
AndConstToVariable(0xFFFFCFF,&_CP0[m_Opcode.rd], CRegName::Cop0[m_Opcode.rd]); AndConstToVariable(0xFFFFCFF,&_CP0[m_Opcode.rd], CRegName::Cop0[m_Opcode.rd]);
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
if ((cMipsRegLo(m_Opcode.rt) & 0x300) != 0 ){ DisplayError("Set IP0 or IP1"); } if ((cMipsRegLo(m_Opcode.rt) & 0x300) != 0 ){ _Notify->DisplayError("Set IP0 or IP1"); }
#endif #endif
} else { } else {
_Notify->BreakPoint(__FILE__,__LINE__); _Notify->BreakPoint(__FILE__,__LINE__);

30
Source/Project64/N64 System/Recompiler/Reg Info.cpp
View File

@ -67,7 +67,7 @@ void CRegInfo::FixRoundModel(FPU_ROUND RoundMethod )
case RoundDown: OrConstToX86Reg(0x0400, reg); break; case RoundDown: OrConstToX86Reg(0x0400, reg); break;
case RoundUp: OrConstToX86Reg(0x0800, reg); break; case RoundUp: OrConstToX86Reg(0x0800, reg); break;
default: default:
DisplayError("Unknown Rounding model"); _Notify->DisplayError("Unknown Rounding model");
} }
} }
MoveX86regToVariable(reg, &m_fpuControl, "m_fpuControl"); MoveX86regToVariable(reg, &m_fpuControl, "m_fpuControl");
@ -98,7 +98,7 @@ void CRegInfo::ChangeFPURegFormat (int Reg, FPU_STATE OldFormat, FPU_STATE NewFo
} }
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
DisplayError("ChangeFormat: Register not on stack!!"); _Notify->DisplayError("ChangeFormat: Register not on stack!!");
#endif #endif
} }
@ -111,8 +111,8 @@ void CRegInfo::Load_FPR_ToTop ( int Reg, int RegToLoad, FPU_STATE Format)
CPU_Message("CurrentRoundingModel: %s FpuRoundingModel(StackTopPos()): %s",RoundingModelName(GetRoundingModel()),RoundingModelName(FpuRoundingModel(StackTopPos()))); CPU_Message("CurrentRoundingModel: %s FpuRoundingModel(StackTopPos()): %s",RoundingModelName(GetRoundingModel()),RoundingModelName(FpuRoundingModel(StackTopPos())));
int i; int i;
if (RegToLoad < 0) { DisplayError("Load_FPR_ToTop\nRegToLoad < 0 ???"); return; } if (RegToLoad < 0) { _Notify->DisplayError("Load_FPR_ToTop\nRegToLoad < 0 ???"); return; }
if (Reg < 0) { DisplayError("Load_FPR_ToTop\nReg < 0 ???"); return; } if (Reg < 0) { _Notify->DisplayError("Load_FPR_ToTop\nReg < 0 ???"); return; }
if (Format == FPU_Double || Format == FPU_Qword) { if (Format == FPU_Double || Format == FPU_Qword) {
UnMap_FPR(Reg + 1,TRUE); UnMap_FPR(Reg + 1,TRUE);
@ -245,7 +245,7 @@ void CRegInfo::Load_FPR_ToTop ( int Reg, int RegToLoad, FPU_STATE Format)
break; break;
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
default: default:
DisplayError("Load_FPR_ToTop\nUnkown format to load %d",Format); _Notify->DisplayError("Load_FPR_ToTop\nUnkown format to load %d",Format);
#endif #endif
} }
SetX86Protected(TempReg,FALSE); SetX86Protected(TempReg,FALSE);
@ -425,7 +425,7 @@ CRegInfo::x86Reg CRegInfo::Map_MemoryStack ( x86Reg Reg, bool bMapRegister, bool
Reg = FreeX86Reg(); Reg = FreeX86Reg();
if (Reg == x86_Unknown) if (Reg == x86_Unknown)
{ {
DisplayError("Map_MemoryStack\n\nOut of registers"); _Notify->DisplayError("Map_MemoryStack\n\nOut of registers");
BreakPoint(__FILE__,__LINE__); BreakPoint(__FILE__,__LINE__);
} }
SetX86Mapped(Reg,CRegInfo::Stack_Mapped); SetX86Mapped(Reg,CRegInfo::Stack_Mapped);
@ -463,7 +463,7 @@ void CRegInfo::Map_GPR_32bit (int MipsReg, BOOL SignValue, int MipsRegToLoad)
x86Reg Reg; x86Reg Reg;
if (MipsReg == 0) { if (MipsReg == 0) {
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
DisplayError("Map_GPR_32bit\n\nWhy are you trying to map reg 0"); _Notify->DisplayError("Map_GPR_32bit\n\nWhy are you trying to map reg 0");
#endif #endif
return; return;
} }
@ -472,7 +472,7 @@ void CRegInfo::Map_GPR_32bit (int MipsReg, BOOL SignValue, int MipsRegToLoad)
Reg = FreeX86Reg(); Reg = FreeX86Reg();
if (Reg < 0) { if (Reg < 0) {
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
DisplayError("Map_GPR_32bit\n\nOut of registers"); _Notify->DisplayError("Map_GPR_32bit\n\nOut of registers");
BreakPoint(__FILE__,__LINE__); BreakPoint(__FILE__,__LINE__);
#endif #endif
return; return;
@ -523,7 +523,7 @@ void CRegInfo::Map_GPR_64bit ( int MipsReg, int MipsRegToLoad)
if (MipsReg == 0) { if (MipsReg == 0) {
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
DisplayError("Map_GPR_32bit\n\nWhy are you trying to map reg 0"); _Notify->DisplayError("Map_GPR_32bit\n\nWhy are you trying to map reg 0");
#endif #endif
return; return;
} }
@ -531,11 +531,11 @@ void CRegInfo::Map_GPR_64bit ( int MipsReg, int MipsRegToLoad)
ProtectGPR(MipsReg); ProtectGPR(MipsReg);
if (IsUnknown(MipsReg) || IsConst(MipsReg)) { if (IsUnknown(MipsReg) || IsConst(MipsReg)) {
x86Hi = FreeX86Reg(); x86Hi = FreeX86Reg();
if (x86Hi < 0) { DisplayError("Map_GPR_64bit\n\nOut of registers"); return; } if (x86Hi < 0) { _Notify->DisplayError("Map_GPR_64bit\n\nOut of registers"); return; }
SetX86Protected(x86Hi,TRUE); SetX86Protected(x86Hi,TRUE);
x86lo = FreeX86Reg(); x86lo = FreeX86Reg();
if (x86lo < 0) { DisplayError("Map_GPR_64bit\n\nOut of registers"); return; } if (x86lo < 0) { _Notify->DisplayError("Map_GPR_64bit\n\nOut of registers"); return; }
SetX86Protected(x86lo,TRUE); SetX86Protected(x86lo,TRUE);
CPU_Message(" regcache: allocate %s to hi word of %s",x86_Name(x86Hi),CRegName::GPR[MipsReg]); CPU_Message(" regcache: allocate %s to hi word of %s",x86_Name(x86Hi),CRegName::GPR[MipsReg]);
@ -545,7 +545,7 @@ void CRegInfo::Map_GPR_64bit ( int MipsReg, int MipsRegToLoad)
if (Is32Bit(MipsReg)) { if (Is32Bit(MipsReg)) {
SetX86Protected(x86lo,TRUE); SetX86Protected(x86lo,TRUE);
x86Hi = FreeX86Reg(); x86Hi = FreeX86Reg();
if (x86Hi < 0) { DisplayError("Map_GPR_64bit\n\nOut of registers"); return; } if (x86Hi < 0) { _Notify->DisplayError("Map_GPR_64bit\n\nOut of registers"); return; }
SetX86Protected(x86Hi,TRUE); SetX86Protected(x86Hi,TRUE);
CPU_Message(" regcache: allocate %s to hi word of %s",x86_Name(x86Hi),CRegName::GPR[MipsReg]); CPU_Message(" regcache: allocate %s to hi word of %s",x86_Name(x86Hi),CRegName::GPR[MipsReg]);
@ -875,7 +875,7 @@ void CRegInfo::UnMap_FPR (int Reg, int WriteBackValue )
break; break;
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
default: default:
DisplayError("UnMap_FPR\nUnknown format to load %d",x86fpu_State[StackTopPos()]); _Notify->DisplayError("UnMap_FPR\nUnknown format to load %d",x86fpu_State[StackTopPos()]);
#endif #endif
} }
SetX86Protected(TempReg,FALSE); SetX86Protected(TempReg,FALSE);
@ -898,7 +898,7 @@ void CRegInfo::UnMap_GPR (DWORD Reg, bool WriteBackValue)
{ {
if (Reg == 0) { if (Reg == 0) {
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
DisplayError("UnMap_GPR\n\nWhy are you trying to unmap reg 0"); _Notify->DisplayError("UnMap_GPR\n\nWhy are you trying to unmap reg 0");
#endif #endif
return; return;
} }
@ -1121,7 +1121,7 @@ void CRegInfo::WriteBackRegisters ()
break; break;
#ifndef EXTERNAL_RELEASE #ifndef EXTERNAL_RELEASE
default: default:
DisplayError("Unknown State: %d\nin WriteBackRegisters",MipsRegState(count)); _Notify->DisplayError("Unknown State: %d\nin WriteBackRegisters",MipsRegState(count));
BreakPoint(__FILE__,__LINE__); BreakPoint(__FILE__,__LINE__);
#endif #endif
} }

214
Source/Project64/N64 System/Recompiler/X86ops.cpp
View File

@ -278,7 +278,7 @@ void CX86Ops::DecX86reg(x86Reg reg) {
case x86_ESP: PUTDST8 (m_RecompPos,0x4C); break; case x86_ESP: PUTDST8 (m_RecompPos,0x4C); break;
case x86_EBP: PUTDST8 (m_RecompPos,0x4D); break; case x86_EBP: PUTDST8 (m_RecompPos,0x4D); break;
default: default:
DisplayError("DecX86reg\nUnknown x86 Register"); _Notify->DisplayError("DecX86reg\nUnknown x86 Register");
} }
} }
@ -293,7 +293,7 @@ void CX86Ops::DivX86reg(x86Reg reg) {
case x86_ESP: PUTDST16(m_RecompPos,0xf4F7); break; case x86_ESP: PUTDST16(m_RecompPos,0xf4F7); break;
case x86_EBP: PUTDST16(m_RecompPos,0xf5F7); break; case x86_EBP: PUTDST16(m_RecompPos,0xf5F7); break;
default: default:
DisplayError("divX86reg\nUnknown x86 Register"); _Notify->DisplayError("divX86reg\nUnknown x86 Register");
} }
} }
@ -308,7 +308,7 @@ void CX86Ops::idivX86reg(x86Reg reg) {
case x86_ESP: PUTDST16(m_RecompPos,0xfcF7); break; case x86_ESP: PUTDST16(m_RecompPos,0xfcF7); break;
case x86_EBP: PUTDST16(m_RecompPos,0xfdF7); break; case x86_EBP: PUTDST16(m_RecompPos,0xfdF7); break;
default: default:
DisplayError("idivX86reg\nUnknown x86 Register"); _Notify->DisplayError("idivX86reg\nUnknown x86 Register");
} }
} }
@ -324,7 +324,7 @@ void CX86Ops::imulX86reg(x86Reg reg) {
case x86_ESP: PUTDST16(m_RecompPos,0xECF7); break; case x86_ESP: PUTDST16(m_RecompPos,0xECF7); break;
case x86_EBP: PUTDST16(m_RecompPos,0xEDF7); break; case x86_EBP: PUTDST16(m_RecompPos,0xEDF7); break;
default: default:
DisplayError("imulX86reg\nUnknown x86 Register"); _Notify->DisplayError("imulX86reg\nUnknown x86 Register");
} }
} }
@ -340,7 +340,7 @@ void CX86Ops::IncX86reg(x86Reg reg) {
case x86_ESP: PUTDST8 (m_RecompPos,0x44); break; case x86_ESP: PUTDST8 (m_RecompPos,0x44); break;
case x86_EBP: PUTDST8 (m_RecompPos,0x45); break; case x86_EBP: PUTDST8 (m_RecompPos,0x45); break;
default: default:
DisplayError("IncX86reg\nUnknown x86 Register"); _Notify->DisplayError("IncX86reg\nUnknown x86 Register");
} }
} }
@ -451,7 +451,7 @@ void CX86Ops::JmpDirectReg( x86Reg reg ) {
case x86_ESI: PUTDST16(m_RecompPos,0xE6ff); break; case x86_ESI: PUTDST16(m_RecompPos,0xE6ff); break;
case x86_EDI: PUTDST16(m_RecompPos,0xE7ff); break; case x86_EDI: PUTDST16(m_RecompPos,0xE7ff); break;
default: default:
DisplayError("JmpDirectReg\nUnknown x86 Register"); _Notify->DisplayError("JmpDirectReg\nUnknown x86 Register");
break; break;
} }
} }
@ -574,7 +574,7 @@ void CX86Ops::LeaRegReg2(x86Reg RegDest, x86Reg RegSrc, x86Reg RegSrc2, Multiple
if (RegSrc2 == x86_ESP || RegSrc2 == x86_EBP) if (RegSrc2 == x86_ESP || RegSrc2 == x86_EBP)
{ {
DisplayError("CX86Ops::LeaRegReg2: %s is invalid for RegSrc2",x86_Name(RegSrc2)); _Notify->DisplayError("CX86Ops::LeaRegReg2: %s is invalid for RegSrc2",x86_Name(RegSrc2));
return; return;
} }
PUTDST8(m_RecompPos,0x8D); PUTDST8(m_RecompPos,0x8D);
@ -599,7 +599,7 @@ void CX86Ops::LeaSourceAndOffset(x86Reg x86DestReg, x86Reg x86SourceReg, int off
case x86_ESP: x86Command = 0xA08D; break; case x86_ESP: x86Command = 0xA08D; break;
case x86_EBP: x86Command = 0xA88D; break; case x86_EBP: x86Command = 0xA88D; break;
default: default:
DisplayError("LeaSourceAndOffset\nUnknown x86 Register"); _Notify->DisplayError("LeaSourceAndOffset\nUnknown x86 Register");
} }
switch (x86SourceReg) { switch (x86SourceReg) {
case x86_EAX: x86Command += 0x0000; break; case x86_EAX: x86Command += 0x0000; break;
@ -611,7 +611,7 @@ void CX86Ops::LeaSourceAndOffset(x86Reg x86DestReg, x86Reg x86SourceReg, int off
case x86_ESP: x86Command += 0x0400; break; case x86_ESP: x86Command += 0x0400; break;
case x86_EBP: x86Command += 0x0500; break; case x86_EBP: x86Command += 0x0500; break;
default: default:
DisplayError("LeaSourceAndOffset\nUnknown x86 Register"); _Notify->DisplayError("LeaSourceAndOffset\nUnknown x86 Register");
} }
PUTDST16(m_RecompPos,x86Command); PUTDST16(m_RecompPos,x86Command);
PUTDST32(m_RecompPos,offset); PUTDST32(m_RecompPos,offset);
@ -626,7 +626,7 @@ void CX86Ops::LeaSourceAndOffset(x86Reg x86DestReg, x86Reg x86SourceReg, int off
case x86_ESP: x86Command = 0x608D; break; case x86_ESP: x86Command = 0x608D; break;
case x86_EBP: x86Command = 0x688D; break; case x86_EBP: x86Command = 0x688D; break;
default: default:
DisplayError("LeaSourceAndOffset\nUnknown x86 Register"); _Notify->DisplayError("LeaSourceAndOffset\nUnknown x86 Register");
} }
switch (x86SourceReg) { switch (x86SourceReg) {
case x86_EAX: x86Command += 0x0000; break; case x86_EAX: x86Command += 0x0000; break;
@ -638,7 +638,7 @@ void CX86Ops::LeaSourceAndOffset(x86Reg x86DestReg, x86Reg x86SourceReg, int off
case x86_ESP: x86Command += 0x0400; break; case x86_ESP: x86Command += 0x0400; break;
case x86_EBP: x86Command += 0x0500; break; case x86_EBP: x86Command += 0x0500; break;
default: default:
DisplayError("LeaSourceAndOffset\nUnknown x86 Register"); _Notify->DisplayError("LeaSourceAndOffset\nUnknown x86 Register");
} }
PUTDST16(m_RecompPos,x86Command); PUTDST16(m_RecompPos,x86Command);
PUTDST8(m_RecompPos,offset); PUTDST8(m_RecompPos,offset);
@ -657,7 +657,7 @@ void CX86Ops::MoveConstByteToN64Mem(BYTE Const, x86Reg AddrReg) {
case x86_ESP: PUTDST16(m_RecompPos,0x84C6); break; case x86_ESP: PUTDST16(m_RecompPos,0x84C6); break;
case x86_EBP: PUTDST16(m_RecompPos,0x85C6); break; case x86_EBP: PUTDST16(m_RecompPos,0x85C6); break;
default: default:
DisplayError("MoveConstByteToN64Mem\nUnknown x86 Register"); _Notify->DisplayError("MoveConstByteToN64Mem\nUnknown x86 Register");
} }
PUTDST32(m_RecompPos,_MMU->Rdram()); PUTDST32(m_RecompPos,_MMU->Rdram());
PUTDST8(m_RecompPos,Const); PUTDST8(m_RecompPos,Const);
@ -683,7 +683,7 @@ void CX86Ops::MoveConstHalfToN64Mem(WORD Const, x86Reg AddrReg) {
case x86_ESP: PUTDST16(m_RecompPos,0x84C7); break; case x86_ESP: PUTDST16(m_RecompPos,0x84C7); break;
case x86_EBP: PUTDST16(m_RecompPos,0x85C7); break; case x86_EBP: PUTDST16(m_RecompPos,0x85C7); break;
default: default:
DisplayError("MoveConstToN64Mem\nUnknown x86 Register"); _Notify->DisplayError("MoveConstToN64Mem\nUnknown x86 Register");
} }
PUTDST32(m_RecompPos,_MMU->Rdram()); PUTDST32(m_RecompPos,_MMU->Rdram());
PUTDST16(m_RecompPos,Const); PUTDST16(m_RecompPos,Const);
@ -713,7 +713,7 @@ void CX86Ops::MoveConstHalfToX86regPointer(WORD Const, x86Reg AddrReg1, x86Reg A
case x86_ESI: Param = 0x06; break; case x86_ESI: Param = 0x06; break;
case x86_EDI: Param = 0x07; break; case x86_EDI: Param = 0x07; break;
default: default:
DisplayError("MoveConstToX86regPointer\nUnhandled x86 Register"); _Notify->DisplayError("MoveConstToX86regPointer\nUnhandled x86 Register");
} }
switch (AddrReg2) { switch (AddrReg2) {
@ -726,7 +726,7 @@ void CX86Ops::MoveConstHalfToX86regPointer(WORD Const, x86Reg AddrReg1, x86Reg A
case x86_ESP: Param += 0x20; break; case x86_ESP: Param += 0x20; break;
case x86_EBP: Param += 0x28; break; case x86_EBP: Param += 0x28; break;
default: default:
DisplayError("MoveConstToX86regPointer\nUnhandled x86 Register"); _Notify->DisplayError("MoveConstToX86regPointer\nUnhandled x86 Register");
} }
PUTDST8(m_RecompPos,Param); PUTDST8(m_RecompPos,Param);
PUTDST16(m_RecompPos,Const); PUTDST16(m_RecompPos,Const);
@ -744,7 +744,7 @@ void CX86Ops::MoveConstToMemoryDisp (DWORD Const, x86Reg AddrReg, DWORD Disp) {
case x86_ESP: PUTDST16(m_RecompPos,0x84C7); break; case x86_ESP: PUTDST16(m_RecompPos,0x84C7); break;
case x86_EBP: PUTDST16(m_RecompPos,0x85C7); break; case x86_EBP: PUTDST16(m_RecompPos,0x85C7); break;
default: default:
DisplayError("MoveConstToN64Mem\nUnknown x86 Register"); _Notify->DisplayError("MoveConstToN64Mem\nUnknown x86 Register");
} }
PUTDST32(m_RecompPos,Disp); PUTDST32(m_RecompPos,Disp);
PUTDST32(m_RecompPos,Const); PUTDST32(m_RecompPos,Const);
@ -762,7 +762,7 @@ void CX86Ops::MoveConstToN64Mem(DWORD Const, x86Reg AddrReg) {
case x86_ESP: PUTDST16(m_RecompPos,0x84C7); break; case x86_ESP: PUTDST16(m_RecompPos,0x84C7); break;
case x86_EBP: PUTDST16(m_RecompPos,0x85C7); break; case x86_EBP: PUTDST16(m_RecompPos,0x85C7); break;
default: default:
DisplayError("MoveConstToN64Mem\nUnknown x86 Register"); _Notify->DisplayError("MoveConstToN64Mem\nUnknown x86 Register");
} }
PUTDST32(m_RecompPos,_MMU->Rdram()); PUTDST32(m_RecompPos,_MMU->Rdram());
PUTDST32(m_RecompPos,Const); PUTDST32(m_RecompPos,Const);
@ -780,7 +780,7 @@ void CX86Ops::MoveConstToN64MemDisp (DWORD Const, x86Reg AddrReg, BYTE Disp) {
case x86_ESP: PUTDST16(m_RecompPos,0x84C7); break; case x86_ESP: PUTDST16(m_RecompPos,0x84C7); break;
case x86_EBP: PUTDST16(m_RecompPos,0x85C7); break; case x86_EBP: PUTDST16(m_RecompPos,0x85C7); break;
default: default:
DisplayError("MoveConstToN64Mem\nUnknown x86 Register"); _Notify->DisplayError("MoveConstToN64Mem\nUnknown x86 Register");
} }
PUTDST32(m_RecompPos,_MMU->Rdram() + Disp); PUTDST32(m_RecompPos,_MMU->Rdram() + Disp);
PUTDST32(m_RecompPos,Const); PUTDST32(m_RecompPos,Const);
@ -827,7 +827,7 @@ void CX86Ops::MoveConstByteToX86regPointer(BYTE Const, x86Reg AddrReg1, x86Reg A
case x86_ESI: Param = 0x06; break; case x86_ESI: Param = 0x06; break;
case x86_EDI: Param = 0x07; break; case x86_EDI: Param = 0x07; break;
default: default:
DisplayError("MoveConstByteToX86regPointer\nUnhandled x86 Register"); _Notify->DisplayError("MoveConstByteToX86regPointer\nUnhandled x86 Register");
} }
switch (AddrReg2) { switch (AddrReg2) {
@ -840,7 +840,7 @@ void CX86Ops::MoveConstByteToX86regPointer(BYTE Const, x86Reg AddrReg1, x86Reg A
case x86_ESP: Param += 0x20; break; case x86_ESP: Param += 0x20; break;
case x86_EBP: Param += 0x28; break; case x86_EBP: Param += 0x28; break;
default: default:
DisplayError("MoveConstByteToX86regPointer\nUnhandled x86 Register"); _Notify->DisplayError("MoveConstByteToX86regPointer\nUnhandled x86 Register");
} }
PUTDST8(m_RecompPos,Param); PUTDST8(m_RecompPos,Param);
PUTDST8(m_RecompPos,Const); PUTDST8(m_RecompPos,Const);
@ -861,7 +861,7 @@ void CX86Ops::MoveConstToX86regPointer(DWORD Const, x86Reg AddrReg1, x86Reg Addr
case x86_ESI: Param = 0x06; break; case x86_ESI: Param = 0x06; break;
case x86_EDI: Param = 0x07; break; case x86_EDI: Param = 0x07; break;
default: default:
DisplayError("MoveConstToX86regPointer\nUnhandled x86 Register"); _Notify->DisplayError("MoveConstToX86regPointer\nUnhandled x86 Register");
} }
switch (AddrReg2) { switch (AddrReg2) {
@ -874,7 +874,7 @@ void CX86Ops::MoveConstToX86regPointer(DWORD Const, x86Reg AddrReg1, x86Reg Addr
case x86_ESP: Param += 0x20; break; case x86_ESP: Param += 0x20; break;
case x86_EBP: Param += 0x28; break; case x86_EBP: Param += 0x28; break;
default: default:
DisplayError("MoveConstToX86regPointer\nUnhandled x86 Register"); _Notify->DisplayError("MoveConstToX86regPointer\nUnhandled x86 Register");
} }
PUTDST8(m_RecompPos,Param); PUTDST8(m_RecompPos,Param);
PUTDST32(m_RecompPos,Const); PUTDST32(m_RecompPos,Const);
@ -960,7 +960,7 @@ void CX86Ops::MoveN64MemToX86regByte(x86Reg reg, x86Reg AddrReg) {
/* case x86_EDI: x86Command += 0xB800; break; */ /* case x86_EDI: x86Command += 0xB800; break; */
/* case x86_ESP: case x86_EBP: */ /* case x86_ESP: case x86_EBP: */
default: default:
DisplayError("MoveN64MemToX86regByte\nInvalid x86 Register"); _Notify->DisplayError("MoveN64MemToX86regByte\nInvalid x86 Register");
break; break;
} }
PUTDST16(m_RecompPos,x86Command); PUTDST16(m_RecompPos,x86Command);
@ -1013,7 +1013,7 @@ void CX86Ops::MoveSxByteX86regPointerToX86reg(x86Reg AddrReg1, x86Reg AddrReg2,
case x86_ESP: PUTDST8(m_RecompPos,0x24); break; case x86_ESP: PUTDST8(m_RecompPos,0x24); break;
case x86_EBP: PUTDST8(m_RecompPos,0x2C); break; case x86_EBP: PUTDST8(m_RecompPos,0x2C); break;
default: default:
DisplayError("MoveZxByteX86regPointerToX86reg\nUnhandled x86 Register"); _Notify->DisplayError("MoveZxByteX86regPointerToX86reg\nUnhandled x86 Register");
} }
switch (AddrReg1) { switch (AddrReg1) {
@ -1024,7 +1024,7 @@ void CX86Ops::MoveSxByteX86regPointerToX86reg(x86Reg AddrReg1, x86Reg AddrReg2,
case x86_ESI: Param = 0x06; break; case x86_ESI: Param = 0x06; break;
case x86_EDI: Param = 0x07; break; case x86_EDI: Param = 0x07; break;
default: default:
DisplayError("MoveZxByteX86regPointerToX86reg\nUnhandled x86 Register"); _Notify->DisplayError("MoveZxByteX86regPointerToX86reg\nUnhandled x86 Register");
} }
switch (AddrReg2) { switch (AddrReg2) {
@ -1037,7 +1037,7 @@ void CX86Ops::MoveSxByteX86regPointerToX86reg(x86Reg AddrReg1, x86Reg AddrReg2,
case x86_ESP: Param += 0x20; break; case x86_ESP: Param += 0x20; break;
case x86_EBP: Param += 0x28; break; case x86_EBP: Param += 0x28; break;
default: default:
DisplayError("MoveZxByteX86regPointerToX86reg\nUnhandled x86 Register"); _Notify->DisplayError("MoveZxByteX86regPointerToX86reg\nUnhandled x86 Register");
} }
PUTDST8(m_RecompPos,Param); PUTDST8(m_RecompPos,Param);
} }
@ -1058,7 +1058,7 @@ void CX86Ops::MoveSxHalfX86regPointerToX86reg(x86Reg AddrReg1, x86Reg AddrReg2,
case x86_ESP: PUTDST8(m_RecompPos,0x24); break; case x86_ESP: PUTDST8(m_RecompPos,0x24); break;
case x86_EBP: PUTDST8(m_RecompPos,0x2C); break; case x86_EBP: PUTDST8(m_RecompPos,0x2C); break;
default: default:
DisplayError("MoveZxHalfX86regPointerToX86reg\nUnhandled x86 Register"); _Notify->DisplayError("MoveZxHalfX86regPointerToX86reg\nUnhandled x86 Register");
} }
switch (AddrReg1) { switch (AddrReg1) {
@ -1069,7 +1069,7 @@ void CX86Ops::MoveSxHalfX86regPointerToX86reg(x86Reg AddrReg1, x86Reg AddrReg2,
case x86_ESI: Param = 0x06; break; case x86_ESI: Param = 0x06; break;
case x86_EDI: Param = 0x07; break; case x86_EDI: Param = 0x07; break;
default: default:
DisplayError("MoveZxHalfX86regPointerToX86reg\nUnhandled x86 Register"); _Notify->DisplayError("MoveZxHalfX86regPointerToX86reg\nUnhandled x86 Register");
} }
switch (AddrReg2) { switch (AddrReg2) {
@ -1082,7 +1082,7 @@ void CX86Ops::MoveSxHalfX86regPointerToX86reg(x86Reg AddrReg1, x86Reg AddrReg2,
case x86_ESP: Param += 0x20; break; case x86_ESP: Param += 0x20; break;
case x86_EBP: Param += 0x28; break; case x86_EBP: Param += 0x28; break;
default: default:
DisplayError("MoveZxHalfX86regPointerToX86reg\nUnhandled x86 Register"); _Notify->DisplayError("MoveZxHalfX86regPointerToX86reg\nUnhandled x86 Register");
} }
PUTDST8(m_RecompPos,Param); PUTDST8(m_RecompPos,Param);
} }
@ -1111,7 +1111,7 @@ void CX86Ops::MoveSxN64MemToX86regByte(x86Reg reg, x86Reg AddrReg) {
case x86_ESP: x86Command += 0xA000; break; case x86_ESP: x86Command += 0xA000; break;
case x86_EBP: x86Command += 0xA800; break; case x86_EBP: x86Command += 0xA800; break;
default: default:
DisplayError("MoveSxN64MemToX86regByte\nInvalid x86 Register"); _Notify->DisplayError("MoveSxN64MemToX86regByte\nInvalid x86 Register");
break; break;
} }
PUTDST8(m_RecompPos,0x0f); PUTDST8(m_RecompPos,0x0f);
@ -1164,7 +1164,7 @@ void CX86Ops::MoveSxVariableToX86regByte(void *Variable, const char * VariableNa
case x86_EDI: PUTDST8(m_RecompPos,0x3D); break; case x86_EDI: PUTDST8(m_RecompPos,0x3D); break;
case x86_ESP: PUTDST8(m_RecompPos,0x25); break; case x86_ESP: PUTDST8(m_RecompPos,0x25); break;
case x86_EBP: PUTDST8(m_RecompPos,0x2D); break; case x86_EBP: PUTDST8(m_RecompPos,0x2D); break;
default: DisplayError("MoveSxVariableToX86regHalf\nUnknown x86 Register"); default: _Notify->DisplayError("MoveSxVariableToX86regHalf\nUnknown x86 Register");
} }
PUTDST32(m_RecompPos,Variable); PUTDST32(m_RecompPos,Variable);
} }
@ -1183,7 +1183,7 @@ void CX86Ops::MoveSxVariableToX86regHalf(void *Variable, const char * VariableNa
case x86_EDI: PUTDST8(m_RecompPos,0x3D); break; case x86_EDI: PUTDST8(m_RecompPos,0x3D); break;
case x86_ESP: PUTDST8(m_RecompPos,0x25); break; case x86_ESP: PUTDST8(m_RecompPos,0x25); break;
case x86_EBP: PUTDST8(m_RecompPos,0x2D); break; case x86_EBP: PUTDST8(m_RecompPos,0x2D); break;
default: DisplayError("MoveSxVariableToX86regHalf\nUnknown x86 Register"); default: _Notify->DisplayError("MoveSxVariableToX86regHalf\nUnknown x86 Register");
} }
PUTDST32(m_RecompPos,Variable); PUTDST32(m_RecompPos,Variable);
} }
@ -1199,7 +1199,7 @@ void CX86Ops::MoveVariableToX86reg(void *Variable, const char * VariableName, x8
case x86_EDI: PUTDST16(m_RecompPos,0x3D8B); break; case x86_EDI: PUTDST16(m_RecompPos,0x3D8B); break;
case x86_ESP: PUTDST16(m_RecompPos,0x258B); break; case x86_ESP: PUTDST16(m_RecompPos,0x258B); break;
case x86_EBP: PUTDST16(m_RecompPos,0x2D8B); break; case x86_EBP: PUTDST16(m_RecompPos,0x2D8B); break;
default: DisplayError("MoveVariableToX86reg\nUnknown x86 Register"); default: _Notify->DisplayError("MoveVariableToX86reg\nUnknown x86 Register");
} }
PUTDST32(m_RecompPos,Variable); PUTDST32(m_RecompPos,Variable);
} }
@ -1227,7 +1227,7 @@ void CX86Ops::MoveVariableDispToX86Reg(void *Variable, const char * VariableName
case 2: x = 0x40; break; case 2: x = 0x40; break;
case 4: x = 0x80; break; case 4: x = 0x80; break;
case 8: x = 0xC0; break; case 8: x = 0xC0; break;
default: DisplayError("Move\nInvalid x86 multiplier"); default: _Notify->DisplayError("Move\nInvalid x86 multiplier");
} }
/* format xx|000000 */ /* format xx|000000 */
@ -1252,7 +1252,7 @@ void CX86Ops::MoveVariableToX86regByte(void *Variable, const char * VariableName
case x86_EBX: PUTDST16(m_RecompPos,0x1D8A); break; case x86_EBX: PUTDST16(m_RecompPos,0x1D8A); break;
case x86_ECX: PUTDST16(m_RecompPos,0x0D8A); break; case x86_ECX: PUTDST16(m_RecompPos,0x0D8A); break;
case x86_EDX: PUTDST16(m_RecompPos,0x158A); break; case x86_EDX: PUTDST16(m_RecompPos,0x158A); break;
default: DisplayError("MoveVariableToX86regByte\nUnknown x86 Register"); default: _Notify->DisplayError("MoveVariableToX86regByte\nUnknown x86 Register");
} }
PUTDST32(m_RecompPos,Variable); PUTDST32(m_RecompPos,Variable);
} }
@ -1269,7 +1269,7 @@ void CX86Ops::MoveVariableToX86regHalf(void *Variable, const char * VariableName
case x86_EDI: PUTDST16(m_RecompPos,0x3D8B); break; case x86_EDI: PUTDST16(m_RecompPos,0x3D8B); break;
case x86_ESP: PUTDST16(m_RecompPos,0x258B); break; case x86_ESP: PUTDST16(m_RecompPos,0x258B); break;
case x86_EBP: PUTDST16(m_RecompPos,0x2D8B); break; case x86_EBP: PUTDST16(m_RecompPos,0x2D8B); break;
default: DisplayError("MoveVariableToX86reg\nUnknown x86 Register"); default: _Notify->DisplayError("MoveVariableToX86reg\nUnknown x86 Register");
} }
PUTDST32(m_RecompPos,Variable); PUTDST32(m_RecompPos,Variable);
} }
@ -1305,7 +1305,7 @@ void CX86Ops::MoveX86regByteToVariable(x86Reg reg, void * Variable, const char *
case x86_ECX: PUTDST16(m_RecompPos,0x0D88); break; case x86_ECX: PUTDST16(m_RecompPos,0x0D88); break;
case x86_EDX: PUTDST16(m_RecompPos,0x1588); break; case x86_EDX: PUTDST16(m_RecompPos,0x1588); break;
default: default:
DisplayError("MoveX86regByteToVariable\nUnknown x86 Register"); _Notify->DisplayError("MoveX86regByteToVariable\nUnknown x86 Register");
} }
PUTDST32(m_RecompPos,Variable); PUTDST32(m_RecompPos,Variable);
} }
@ -1325,7 +1325,7 @@ void CX86Ops::MoveX86regByteToX86regPointer(x86Reg reg, x86Reg AddrReg1, x86Reg
case x86_ESP: PUTDST16(m_RecompPos,0x2488); break; case x86_ESP: PUTDST16(m_RecompPos,0x2488); break;
case x86_EBP: PUTDST16(m_RecompPos,0x2C88); break; case x86_EBP: PUTDST16(m_RecompPos,0x2C88); break;
default: default:
DisplayError("MoveX86regToX86regPointer\nUnhandled x86 Register"); _Notify->DisplayError("MoveX86regToX86regPointer\nUnhandled x86 Register");
} }
switch (AddrReg1) { switch (AddrReg1) {
@ -1336,7 +1336,7 @@ void CX86Ops::MoveX86regByteToX86regPointer(x86Reg reg, x86Reg AddrReg1, x86Reg
case x86_ESI: Param = 0x06; break; case x86_ESI: Param = 0x06; break;
case x86_EDI: Param = 0x07; break; case x86_EDI: Param = 0x07; break;
default: default:
DisplayError("MoveX86regToX86regPointer\nUnhandled x86 Register"); _Notify->DisplayError("MoveX86regToX86regPointer\nUnhandled x86 Register");
} }
switch (AddrReg2) { switch (AddrReg2) {
@ -1349,7 +1349,7 @@ void CX86Ops::MoveX86regByteToX86regPointer(x86Reg reg, x86Reg AddrReg1, x86Reg
case x86_ESP: Param += 0x20; break; case x86_ESP: Param += 0x20; break;
case x86_EBP: Param += 0x28; break; case x86_EBP: Param += 0x28; break;
default: default:
DisplayError("MoveX86regByteToX86regPointer\nUnhandled x86 Register"); _Notify->DisplayError("MoveX86regByteToX86regPointer\nUnhandled x86 Register");
} }
PUTDST8(m_RecompPos,Param); PUTDST8(m_RecompPos,Param);
} }
@ -1397,7 +1397,7 @@ void CX86Ops::MoveX86regHalfToVariable(x86Reg reg, void * Variable, const char *
case x86_ESP: PUTDST16(m_RecompPos,0x2589); break; case x86_ESP: PUTDST16(m_RecompPos,0x2589); break;
case x86_EBP: PUTDST16(m_RecompPos,0x2D89); break; case x86_EBP: PUTDST16(m_RecompPos,0x2D89); break;
default: default:
DisplayError("MoveX86regToVariable\nUnknown x86 Register"); _Notify->DisplayError("MoveX86regToVariable\nUnknown x86 Register");
} }
PUTDST32(m_RecompPos,Variable); PUTDST32(m_RecompPos,Variable);
} }
@ -1418,7 +1418,7 @@ void CX86Ops::MoveX86regHalfToX86regPointer(x86Reg reg, x86Reg AddrReg1, x86Reg
case x86_ESP: PUTDST16(m_RecompPos,0x2489); break; case x86_ESP: PUTDST16(m_RecompPos,0x2489); break;
case x86_EBP: PUTDST16(m_RecompPos,0x2C89); break; case x86_EBP: PUTDST16(m_RecompPos,0x2C89); break;
default: default:
DisplayError("MoveX86regHalfToX86regPointer\nUnhandled x86 Register"); _Notify->DisplayError("MoveX86regHalfToX86regPointer\nUnhandled x86 Register");
} }
switch (AddrReg1) { switch (AddrReg1) {
@ -1429,7 +1429,7 @@ void CX86Ops::MoveX86regHalfToX86regPointer(x86Reg reg, x86Reg AddrReg1, x86Reg
case x86_ESI: Param = 0x06; break; case x86_ESI: Param = 0x06; break;
case x86_EDI: Param = 0x07; break; case x86_EDI: Param = 0x07; break;
default: default:
DisplayError("MoveX86regHalfToX86regPointer\nUnhandled x86 Register"); _Notify->DisplayError("MoveX86regHalfToX86regPointer\nUnhandled x86 Register");
} }
switch (AddrReg2) { switch (AddrReg2) {
@ -1442,7 +1442,7 @@ void CX86Ops::MoveX86regHalfToX86regPointer(x86Reg reg, x86Reg AddrReg1, x86Reg
case x86_ESP: Param += 0x20; break; case x86_ESP: Param += 0x20; break;
case x86_EBP: Param += 0x28; break; case x86_EBP: Param += 0x28; break;
default: default:
DisplayError("MoveX86regHalfToX86regPointer\nUnhandled x86 Register"); _Notify->DisplayError("MoveX86regHalfToX86regPointer\nUnhandled x86 Register");
} }
PUTDST8(m_RecompPos,Param); PUTDST8(m_RecompPos,Param);
} }
@ -1517,7 +1517,7 @@ void CX86Ops::MoveX86regPointerToX86reg(x86Reg AddrReg1, x86Reg AddrReg2, x86Reg
case x86_ESP: PUTDST16(m_RecompPos,0x248B); break; case x86_ESP: PUTDST16(m_RecompPos,0x248B); break;
case x86_EBP: PUTDST16(m_RecompPos,0x2C8B); break; case x86_EBP: PUTDST16(m_RecompPos,0x2C8B); break;
default: default:
DisplayError("MoveX86regPointerToX86reg\nUnhandled x86 Register"); _Notify->DisplayError("MoveX86regPointerToX86reg\nUnhandled x86 Register");
} }
switch (AddrReg1) { switch (AddrReg1) {
@ -1528,7 +1528,7 @@ void CX86Ops::MoveX86regPointerToX86reg(x86Reg AddrReg1, x86Reg AddrReg2, x86Reg
case x86_ESI: Param = 0x06; break; case x86_ESI: Param = 0x06; break;
case x86_EDI: Param = 0x07; break; case x86_EDI: Param = 0x07; break;
default: default:
DisplayError("MoveX86regPointerToX86reg\nUnhandled x86 Register"); _Notify->DisplayError("MoveX86regPointerToX86reg\nUnhandled x86 Register");
} }
switch (AddrReg2) { switch (AddrReg2) {
@ -1541,7 +1541,7 @@ void CX86Ops::MoveX86regPointerToX86reg(x86Reg AddrReg1, x86Reg AddrReg2, x86Reg
case x86_ESP: Param += 0x20; break; case x86_ESP: Param += 0x20; break;
case x86_EBP: Param += 0x28; break; case x86_EBP: Param += 0x28; break;
default: default:
DisplayError("MoveX86regPointerToX86reg\nUnhandled x86 Register"); _Notify->DisplayError("MoveX86regPointerToX86reg\nUnhandled x86 Register");
} }
PUTDST8(m_RecompPos,Param); PUTDST8(m_RecompPos,Param);
} }
@ -1561,7 +1561,7 @@ void CX86Ops::MoveX86regPointerToX86regDisp8(x86Reg AddrReg1, x86Reg AddrReg2, x
case x86_ESP: PUTDST16(m_RecompPos,0x648B); break; case x86_ESP: PUTDST16(m_RecompPos,0x648B); break;
case x86_EBP: PUTDST16(m_RecompPos,0x6C8B); break; case x86_EBP: PUTDST16(m_RecompPos,0x6C8B); break;
default: default:
DisplayError("MoveX86regPointerToX86reg\nUnhandled x86 Register"); _Notify->DisplayError("MoveX86regPointerToX86reg\nUnhandled x86 Register");
} }
switch (AddrReg1) { switch (AddrReg1) {
@ -1572,7 +1572,7 @@ void CX86Ops::MoveX86regPointerToX86regDisp8(x86Reg AddrReg1, x86Reg AddrReg2, x
case x86_ESI: Param = 0x06; break; case x86_ESI: Param = 0x06; break;
case x86_EDI: Param = 0x07; break; case x86_EDI: Param = 0x07; break;
default: default:
DisplayError("MoveX86regPointerToX86reg\nUnhandled x86 Register"); _Notify->DisplayError("MoveX86regPointerToX86reg\nUnhandled x86 Register");
} }
switch (AddrReg2) { switch (AddrReg2) {
@ -1585,7 +1585,7 @@ void CX86Ops::MoveX86regPointerToX86regDisp8(x86Reg AddrReg1, x86Reg AddrReg2, x
case x86_ESP: Param += 0x20; break; case x86_ESP: Param += 0x20; break;
case x86_EBP: Param += 0x28; break; case x86_EBP: Param += 0x28; break;
default: default:
DisplayError("MoveX86regPointerToX86reg\nUnhandled x86 Register"); _Notify->DisplayError("MoveX86regPointerToX86reg\nUnhandled x86 Register");
} }
PUTDST8(m_RecompPos,Param); PUTDST8(m_RecompPos,Param);
PUTDST8(m_RecompPos,offset); PUTDST8(m_RecompPos,offset);
@ -1687,7 +1687,7 @@ void CX86Ops::MoveX86regToVariable(x86Reg reg, void * Variable, const char * Var
case x86_ESP: PUTDST16(m_RecompPos,0x2589); break; case x86_ESP: PUTDST16(m_RecompPos,0x2589); break;
case x86_EBP: PUTDST16(m_RecompPos,0x2D89); break; case x86_EBP: PUTDST16(m_RecompPos,0x2D89); break;
default: default:
DisplayError("MoveX86regToVariable\nUnknown x86 Register"); _Notify->DisplayError("MoveX86regToVariable\nUnknown x86 Register");
} }
PUTDST32(m_RecompPos,Variable); PUTDST32(m_RecompPos,Variable);
} }
@ -1767,7 +1767,7 @@ void CX86Ops::MoveX86regToX86regPointer(x86Reg reg, x86Reg AddrReg1, x86Reg Addr
case x86_ESP: PUTDST16(m_RecompPos,0x2489); break; case x86_ESP: PUTDST16(m_RecompPos,0x2489); break;
case x86_EBP: PUTDST16(m_RecompPos,0x2C89); break; case x86_EBP: PUTDST16(m_RecompPos,0x2C89); break;
default: default:
DisplayError("MoveX86regToX86regPointer\nUnhandled x86 Register"); _Notify->DisplayError("MoveX86regToX86regPointer\nUnhandled x86 Register");
} }
switch (AddrReg1) { switch (AddrReg1) {
@ -1778,7 +1778,7 @@ void CX86Ops::MoveX86regToX86regPointer(x86Reg reg, x86Reg AddrReg1, x86Reg Addr
case x86_ESI: Param = 0x06; break; case x86_ESI: Param = 0x06; break;
case x86_EDI: Param = 0x07; break; case x86_EDI: Param = 0x07; break;
default: default:
DisplayError("MoveX86regToX86regPointer\nUnhandled x86 Register"); _Notify->DisplayError("MoveX86regToX86regPointer\nUnhandled x86 Register");
} }
switch (AddrReg2) { switch (AddrReg2) {
@ -1791,7 +1791,7 @@ void CX86Ops::MoveX86regToX86regPointer(x86Reg reg, x86Reg AddrReg1, x86Reg Addr
case x86_ESP: Param += 0x20; break; case x86_ESP: Param += 0x20; break;
case x86_EBP: Param += 0x28; break; case x86_EBP: Param += 0x28; break;
default: default:
DisplayError("MoveX86regToX86regPointer\nUnhandled x86 Register"); _Notify->DisplayError("MoveX86regToX86regPointer\nUnhandled x86 Register");
} }
PUTDST8(m_RecompPos,Param); PUTDST8(m_RecompPos,Param);
} }
@ -1812,7 +1812,7 @@ void CX86Ops::MoveZxByteX86regPointerToX86reg(x86Reg AddrReg1, x86Reg AddrReg2,
case x86_ESP: PUTDST8(m_RecompPos,0x24); break; case x86_ESP: PUTDST8(m_RecompPos,0x24); break;
case x86_EBP: PUTDST8(m_RecompPos,0x2C); break; case x86_EBP: PUTDST8(m_RecompPos,0x2C); break;
default: default:
DisplayError("MoveZxByteX86regPointerToX86reg\nUnhandled x86 Register"); _Notify->DisplayError("MoveZxByteX86regPointerToX86reg\nUnhandled x86 Register");
} }
switch (AddrReg1) { switch (AddrReg1) {
@ -1823,7 +1823,7 @@ void CX86Ops::MoveZxByteX86regPointerToX86reg(x86Reg AddrReg1, x86Reg AddrReg2,
case x86_ESI: Param = 0x06; break; case x86_ESI: Param = 0x06; break;
case x86_EDI: Param = 0x07; break; case x86_EDI: Param = 0x07; break;
default: default:
DisplayError("MoveZxByteX86regPointerToX86reg\nUnhandled x86 Register"); _Notify->DisplayError("MoveZxByteX86regPointerToX86reg\nUnhandled x86 Register");
} }
switch (AddrReg2) { switch (AddrReg2) {
@ -1836,7 +1836,7 @@ void CX86Ops::MoveZxByteX86regPointerToX86reg(x86Reg AddrReg1, x86Reg AddrReg2,
case x86_ESP: Param += 0x20; break; case x86_ESP: Param += 0x20; break;
case x86_EBP: Param += 0x28; break; case x86_EBP: Param += 0x28; break;
default: default:
DisplayError("MoveZxByteX86regPointerToX86reg\nUnhandled x86 Register"); _Notify->DisplayError("MoveZxByteX86regPointerToX86reg\nUnhandled x86 Register");
} }
PUTDST8(m_RecompPos,Param); PUTDST8(m_RecompPos,Param);
} }
@ -1857,7 +1857,7 @@ void CX86Ops::MoveZxHalfX86regPointerToX86reg(x86Reg AddrReg1, x86Reg AddrReg2,
case x86_ESP: PUTDST8(m_RecompPos,0x24); break; case x86_ESP: PUTDST8(m_RecompPos,0x24); break;
case x86_EBP: PUTDST8(m_RecompPos,0x2C); break; case x86_EBP: PUTDST8(m_RecompPos,0x2C); break;
default: default:
DisplayError("MoveZxHalfX86regPointerToX86reg\nUnhandled x86 Register"); _Notify->DisplayError("MoveZxHalfX86regPointerToX86reg\nUnhandled x86 Register");
} }
switch (AddrReg1) { switch (AddrReg1) {
@ -1868,7 +1868,7 @@ void CX86Ops::MoveZxHalfX86regPointerToX86reg(x86Reg AddrReg1, x86Reg AddrReg2,
case x86_ESI: Param = 0x06; break; case x86_ESI: Param = 0x06; break;
case x86_EDI: Param = 0x07; break; case x86_EDI: Param = 0x07; break;
default: default:
DisplayError("MoveZxHalfX86regPointerToX86reg\nUnhandled x86 Register"); _Notify->DisplayError("MoveZxHalfX86regPointerToX86reg\nUnhandled x86 Register");
} }
switch (AddrReg2) { switch (AddrReg2) {
@ -1881,7 +1881,7 @@ void CX86Ops::MoveZxHalfX86regPointerToX86reg(x86Reg AddrReg1, x86Reg AddrReg2,
case x86_ESP: Param += 0x20; break; case x86_ESP: Param += 0x20; break;
case x86_EBP: Param += 0x28; break; case x86_EBP: Param += 0x28; break;
default: default:
DisplayError("MoveZxHalfX86regPointerToX86reg\nUnhandled x86 Register"); _Notify->DisplayError("MoveZxHalfX86regPointerToX86reg\nUnhandled x86 Register");
} }
PUTDST8(m_RecompPos,Param); PUTDST8(m_RecompPos,Param);
} }
@ -1910,7 +1910,7 @@ void CX86Ops::MoveZxN64MemToX86regByte(x86Reg reg, x86Reg AddrReg) {
case x86_ESP: x86Command += 0xA000; break; case x86_ESP: x86Command += 0xA000; break;
case x86_EBP: x86Command += 0xA800; break; case x86_EBP: x86Command += 0xA800; break;
default: default:
DisplayError("MoveZxN64MemToX86regByte\nInvalid x86 Register"); _Notify->DisplayError("MoveZxN64MemToX86regByte\nInvalid x86 Register");
break; break;
} }
PUTDST8(m_RecompPos,0x0f); PUTDST8(m_RecompPos,0x0f);
@ -1963,7 +1963,7 @@ void CX86Ops::MoveZxVariableToX86regByte(void *Variable, const char * VariableNa
case x86_EDI: PUTDST8(m_RecompPos,0x3D); break; case x86_EDI: PUTDST8(m_RecompPos,0x3D); break;
case x86_ESP: PUTDST8(m_RecompPos,0x25); break; case x86_ESP: PUTDST8(m_RecompPos,0x25); break;
case x86_EBP: PUTDST8(m_RecompPos,0x2D); break; case x86_EBP: PUTDST8(m_RecompPos,0x2D); break;
default: DisplayError("MoveZxVariableToX86regHalf\nUnknown x86 Register"); default: _Notify->DisplayError("MoveZxVariableToX86regHalf\nUnknown x86 Register");
} }
PUTDST32(m_RecompPos,Variable); PUTDST32(m_RecompPos,Variable);
} }
@ -1982,7 +1982,7 @@ void CX86Ops::MoveZxVariableToX86regHalf(void *Variable, const char * VariableNa
case x86_EDI: PUTDST8(m_RecompPos,0x3D); break; case x86_EDI: PUTDST8(m_RecompPos,0x3D); break;
case x86_ESP: PUTDST8(m_RecompPos,0x25); break; case x86_ESP: PUTDST8(m_RecompPos,0x25); break;
case x86_EBP: PUTDST8(m_RecompPos,0x2D); break; case x86_EBP: PUTDST8(m_RecompPos,0x2D); break;
default: DisplayError("MoveZxVariableToX86regHalf\nUnknown x86 Register"); default: _Notify->DisplayError("MoveZxVariableToX86regHalf\nUnknown x86 Register");
} }
PUTDST32(m_RecompPos,Variable); PUTDST32(m_RecompPos,Variable);
} }
@ -1999,7 +1999,7 @@ void CX86Ops::MulX86reg(x86Reg reg) {
case x86_ESP: PUTDST16(m_RecompPos,0xE4F7); break; case x86_ESP: PUTDST16(m_RecompPos,0xE4F7); break;
case x86_EBP: PUTDST16(m_RecompPos,0xE5F7); break; case x86_EBP: PUTDST16(m_RecompPos,0xE5F7); break;
default: default:
DisplayError("MulX86reg\nUnknown x86 Register"); _Notify->DisplayError("MulX86reg\nUnknown x86 Register");
} }
} }
@ -2175,7 +2175,7 @@ void CX86Ops::Seta(x86Reg reg) {
case x86_ECX: PUTDST8(m_RecompPos,0xC1); break; case x86_ECX: PUTDST8(m_RecompPos,0xC1); break;
case x86_EDX: PUTDST8(m_RecompPos,0xC2); break; case x86_EDX: PUTDST8(m_RecompPos,0xC2); break;
default: default:
DisplayError("Seta\nUnknown x86 Register"); _Notify->DisplayError("Seta\nUnknown x86 Register");
} }
} }
@ -2195,7 +2195,7 @@ void CX86Ops::Setae(x86Reg reg) {
case x86_ECX: PUTDST8(m_RecompPos,0xC1); break; case x86_ECX: PUTDST8(m_RecompPos,0xC1); break;
case x86_EDX: PUTDST8(m_RecompPos,0xC2); break; case x86_EDX: PUTDST8(m_RecompPos,0xC2); break;
default: default:
DisplayError("Seta\nUnknown x86 Register"); _Notify->DisplayError("Seta\nUnknown x86 Register");
} }
} }
@ -2208,7 +2208,7 @@ void CX86Ops::Setb(x86Reg reg) {
case x86_ECX: PUTDST8(m_RecompPos,0xC1); break; case x86_ECX: PUTDST8(m_RecompPos,0xC1); break;
case x86_EDX: PUTDST8(m_RecompPos,0xC2); break; case x86_EDX: PUTDST8(m_RecompPos,0xC2); break;
default: default:
DisplayError("Setb\nUnknown x86 Register"); _Notify->DisplayError("Setb\nUnknown x86 Register");
} }
} }
@ -2228,7 +2228,7 @@ void CX86Ops::Setg(x86Reg reg) {
case x86_ECX: PUTDST8(m_RecompPos,0xC1); break; case x86_ECX: PUTDST8(m_RecompPos,0xC1); break;
case x86_EDX: PUTDST8(m_RecompPos,0xC2); break; case x86_EDX: PUTDST8(m_RecompPos,0xC2); break;
default: default:
DisplayError("Setg\nUnknown x86 Register"); _Notify->DisplayError("Setg\nUnknown x86 Register");
} }
} }
@ -2248,7 +2248,7 @@ void CX86Ops::Setl(x86Reg reg) {
case x86_ECX: PUTDST8(m_RecompPos,0xC1); break; case x86_ECX: PUTDST8(m_RecompPos,0xC1); break;
case x86_EDX: PUTDST8(m_RecompPos,0xC2); break; case x86_EDX: PUTDST8(m_RecompPos,0xC2); break;
default: default:
DisplayError("Setl\nUnknown x86 Register"); _Notify->DisplayError("Setl\nUnknown x86 Register");
} }
} }
@ -2269,7 +2269,7 @@ void CX86Ops::Setz(x86Reg reg) {
case x86_ECX: PUTDST8(m_RecompPos,0xC1); break; case x86_ECX: PUTDST8(m_RecompPos,0xC1); break;
case x86_EDX: PUTDST8(m_RecompPos,0xC2); break; case x86_EDX: PUTDST8(m_RecompPos,0xC2); break;
default: default:
DisplayError("Setz\nUnknown x86 Register"); _Notify->DisplayError("Setz\nUnknown x86 Register");
} }
} }
@ -2282,7 +2282,7 @@ void CX86Ops::Setnz(x86Reg reg) {
case x86_ECX: PUTDST8(m_RecompPos,0xC1); break; case x86_ECX: PUTDST8(m_RecompPos,0xC1); break;
case x86_EDX: PUTDST8(m_RecompPos,0xC2); break; case x86_EDX: PUTDST8(m_RecompPos,0xC2); break;
default: default:
DisplayError("Setnz\nUnknown x86 Register"); _Notify->DisplayError("Setnz\nUnknown x86 Register");
} }
} }
@ -2404,7 +2404,7 @@ void CX86Ops::ShiftRightSignImmed(x86Reg reg, BYTE Immediate) {
case x86_ESP: PUTDST16(m_RecompPos,0xFCC1); break; case x86_ESP: PUTDST16(m_RecompPos,0xFCC1); break;
case x86_EBP: PUTDST16(m_RecompPos,0xFDC1); break; case x86_EBP: PUTDST16(m_RecompPos,0xFDC1); break;
default: default:
DisplayError("ShiftRightSignImmed\nUnknown x86 Register"); _Notify->DisplayError("ShiftRightSignImmed\nUnknown x86 Register");
} }
PUTDST8(m_RecompPos,Immediate); PUTDST8(m_RecompPos,Immediate);
} }
@ -2542,7 +2542,7 @@ void CX86Ops::SbbVariableFromX86reg(x86Reg reg, void * Variable, const char * Va
case x86_ESP: PUTDST16(m_RecompPos,0x251B); break; case x86_ESP: PUTDST16(m_RecompPos,0x251B); break;
case x86_EBP: PUTDST16(m_RecompPos,0x2D1B); break; case x86_EBP: PUTDST16(m_RecompPos,0x2D1B); break;
default: default:
DisplayError("SbbVariableFromX86reg\nUnknown x86 Register"); _Notify->DisplayError("SbbVariableFromX86reg\nUnknown x86 Register");
} }
PUTDST32(m_RecompPos,Variable); PUTDST32(m_RecompPos,Variable);
} }
@ -2621,7 +2621,7 @@ void CX86Ops::SubVariableFromX86reg(x86Reg reg, void * Variable, const char * Va
case x86_ESP: PUTDST16(m_RecompPos,0x252B); break; case x86_ESP: PUTDST16(m_RecompPos,0x252B); break;
case x86_EBP: PUTDST16(m_RecompPos,0x2D2B); break; case x86_EBP: PUTDST16(m_RecompPos,0x2D2B); break;
default: default:
DisplayError("SubVariableFromX86reg\nUnknown x86 Register"); _Notify->DisplayError("SubVariableFromX86reg\nUnknown x86 Register");
} }
PUTDST32(m_RecompPos,Variable); PUTDST32(m_RecompPos,Variable);
} }
@ -2769,7 +2769,7 @@ void CX86Ops::XorVariableToX86reg(void *Variable, const char * VariableName, x86
case x86_EDI: PUTDST16(m_RecompPos,0x3D33); break; case x86_EDI: PUTDST16(m_RecompPos,0x3D33); break;
case x86_ESP: PUTDST16(m_RecompPos,0x2533); break; case x86_ESP: PUTDST16(m_RecompPos,0x2533); break;
case x86_EBP: PUTDST16(m_RecompPos,0x2D33); break; case x86_EBP: PUTDST16(m_RecompPos,0x2D33); break;
default: DisplayError("XorVariableToX86reg\nUnknown x86 Register"); default: _Notify->DisplayError("XorVariableToX86reg\nUnknown x86 Register");
} }
PUTDST32(m_RecompPos,Variable); PUTDST32(m_RecompPos,Variable);
} }
@ -2795,7 +2795,7 @@ void CX86Ops::fpuAddDwordRegPointer(x86Reg x86Pointer) {
case x86_ESI: PUTDST16(m_RecompPos,0x06D8); break; case x86_ESI: PUTDST16(m_RecompPos,0x06D8); break;
case x86_EDI: PUTDST16(m_RecompPos,0x07D8); break; case x86_EDI: PUTDST16(m_RecompPos,0x07D8); break;
default: default:
DisplayError("fpuAddDwordRegPointer\nUnknown x86 Register"); _Notify->DisplayError("fpuAddDwordRegPointer\nUnknown x86 Register");
break; break;
} }
} }
@ -2816,7 +2816,7 @@ void CX86Ops::fpuAddQwordRegPointer(x86Reg x86Pointer) {
case x86_ESI: PUTDST16(m_RecompPos,0x06DC); break; case x86_ESI: PUTDST16(m_RecompPos,0x06DC); break;
case x86_EDI: PUTDST16(m_RecompPos,0x07DC); break; case x86_EDI: PUTDST16(m_RecompPos,0x07DC); break;
default: default:
DisplayError("fpuAddQwordRegPointer\nUnknown x86 Register"); _Notify->DisplayError("fpuAddQwordRegPointer\nUnknown x86 Register");
break; break;
} }
} }
@ -2833,7 +2833,7 @@ void CX86Ops::fpuAddReg(x86FpuValues x86reg) {
case x86_ST6: PUTDST16(m_RecompPos,0xC6D8); break; case x86_ST6: PUTDST16(m_RecompPos,0xC6D8); break;
case x86_ST7: PUTDST16(m_RecompPos,0xC7D8); break; case x86_ST7: PUTDST16(m_RecompPos,0xC7D8); break;
default: default:
DisplayError("fpuAddReg\nUnknown x86 Register"); _Notify->DisplayError("fpuAddReg\nUnknown x86 Register");
break; break;
} }
} }
@ -2851,7 +2851,7 @@ void CX86Ops::fpuAddRegPop(int * StackPos, x86FpuValues reg) {
case x86_ST6: PUTDST16(m_RecompPos,0xC6DE); break; case x86_ST6: PUTDST16(m_RecompPos,0xC6DE); break;
case x86_ST7: PUTDST16(m_RecompPos,0xC7DE); break; case x86_ST7: PUTDST16(m_RecompPos,0xC7DE); break;
default: default:
DisplayError("fpuAddReg\nUnknown x86 Register"); _Notify->DisplayError("fpuAddReg\nUnknown x86 Register");
break; break;
} }
} }
@ -2914,7 +2914,7 @@ void CX86Ops::fpuComReg(x86FpuValues x86reg, BOOL Pop) {
case x86_ST6: PUTDST16(m_RecompPos,0xD6D8|s); break; case x86_ST6: PUTDST16(m_RecompPos,0xD6D8|s); break;
case x86_ST7: PUTDST16(m_RecompPos,0xD7D8|s); break; case x86_ST7: PUTDST16(m_RecompPos,0xD7D8|s); break;
default: default:
DisplayError("fpuComReg\nUnknown x86 Register"); _Notify->DisplayError("fpuComReg\nUnknown x86 Register");
break; break;
} }
} }
@ -2935,7 +2935,7 @@ void CX86Ops::fpuDivDwordRegPointer(x86Reg x86Pointer) {
case x86_ESI: PUTDST16(m_RecompPos,0x36D8); break; case x86_ESI: PUTDST16(m_RecompPos,0x36D8); break;
case x86_EDI: PUTDST16(m_RecompPos,0x37D8); break; case x86_EDI: PUTDST16(m_RecompPos,0x37D8); break;
default: default:
DisplayError("fpuDivDwordRegPointer\nUnknown x86 Register"); _Notify->DisplayError("fpuDivDwordRegPointer\nUnknown x86 Register");
break; break;
} }
} }
@ -2956,7 +2956,7 @@ void CX86Ops::fpuDivQwordRegPointer(x86Reg x86Pointer) {
case x86_ESI: PUTDST16(m_RecompPos,0x36DC); break; case x86_ESI: PUTDST16(m_RecompPos,0x36DC); break;
case x86_EDI: PUTDST16(m_RecompPos,0x37DC); break; case x86_EDI: PUTDST16(m_RecompPos,0x37DC); break;
default: default:
DisplayError("fpuDivQwordRegPointer\nUnknown x86 Register"); _Notify->DisplayError("fpuDivQwordRegPointer\nUnknown x86 Register");
break; break;
} }
} }
@ -2973,7 +2973,7 @@ void CX86Ops::fpuDivReg(x86FpuValues Reg) {
case x86_ST6: PUTDST16(m_RecompPos,0xF6D8); break; case x86_ST6: PUTDST16(m_RecompPos,0xF6D8); break;
case x86_ST7: PUTDST16(m_RecompPos,0xF7D8); break; case x86_ST7: PUTDST16(m_RecompPos,0xF7D8); break;
default: default:
DisplayError("fpuDivReg\nUnknown x86 Register"); _Notify->DisplayError("fpuDivReg\nUnknown x86 Register");
break; break;
} }
} }
@ -2990,7 +2990,7 @@ void CX86Ops::fpuDivRegPop(x86FpuValues reg) {
case x86_ST6: PUTDST16(m_RecompPos,0xFEDE); break; case x86_ST6: PUTDST16(m_RecompPos,0xFEDE); break;
case x86_ST7: PUTDST16(m_RecompPos,0xFFDE); break; case x86_ST7: PUTDST16(m_RecompPos,0xFFDE); break;
default: default:
DisplayError("fpuDivReg\nUnknown x86 Register"); _Notify->DisplayError("fpuDivReg\nUnknown x86 Register");
break; break;
} }
} }
@ -3007,7 +3007,7 @@ void CX86Ops::fpuExchange(x86FpuValues Reg) {
case x86_ST6: PUTDST16(m_RecompPos,0xCED9); break; case x86_ST6: PUTDST16(m_RecompPos,0xCED9); break;
case x86_ST7: PUTDST16(m_RecompPos,0xCFD9); break; case x86_ST7: PUTDST16(m_RecompPos,0xCFD9); break;
default: default:
DisplayError("fpuExchange\nUnknown x86 Register: %i", Reg); _Notify->DisplayError("fpuExchange\nUnknown x86 Register: %i", Reg);
break; break;
} }
} }
@ -3024,7 +3024,7 @@ void CX86Ops::fpuFree(x86FpuValues Reg) {
case x86_ST6: PUTDST16(m_RecompPos,0xC6DD); break; case x86_ST6: PUTDST16(m_RecompPos,0xC6DD); break;
case x86_ST7: PUTDST16(m_RecompPos,0xC7DD); break; case x86_ST7: PUTDST16(m_RecompPos,0xC7DD); break;
default: default:
DisplayError("fpuFree\nUnknown x86 Register"); _Notify->DisplayError("fpuFree\nUnknown x86 Register");
break; break;
} }
} }
@ -3066,7 +3066,7 @@ void CX86Ops::fpuLoadDwordFromX86Reg(int * StackPos, x86Reg x86reg) {
case x86_ESI: PUTDST8(m_RecompPos,0x06); break; case x86_ESI: PUTDST8(m_RecompPos,0x06); break;
case x86_EDI: PUTDST8(m_RecompPos,0x07); break; case x86_EDI: PUTDST8(m_RecompPos,0x07); break;
default: default:
DisplayError("fpuLoadDwordFromX86Reg\nUnknown x86 Register"); _Notify->DisplayError("fpuLoadDwordFromX86Reg\nUnknown x86 Register");
} }
} }
@ -3082,7 +3082,7 @@ void CX86Ops::fpuLoadDwordFromN64Mem(int * StackPos,x86Reg x86reg) {
case x86_EDI: PUTDST16(m_RecompPos,0x87D9); break; case x86_EDI: PUTDST16(m_RecompPos,0x87D9); break;
case x86_EBP: PUTDST16(m_RecompPos,0x85D9); break; case x86_EBP: PUTDST16(m_RecompPos,0x85D9); break;
default: default:
DisplayError("fpuLoadDwordFromN64Mem\nUnknown x86 Register"); _Notify->DisplayError("fpuLoadDwordFromN64Mem\nUnknown x86 Register");
} }
PUTDST32(m_RecompPos,_MMU->Rdram()); PUTDST32(m_RecompPos,_MMU->Rdram());
} }
@ -3099,7 +3099,7 @@ void CX86Ops::fpuLoadInt32bFromN64Mem(int * StackPos,x86Reg x86reg) {
case x86_EDI: PUTDST16(m_RecompPos,0x87DB); break; case x86_EDI: PUTDST16(m_RecompPos,0x87DB); break;
case x86_EBP: PUTDST16(m_RecompPos,0x85DB); break; case x86_EBP: PUTDST16(m_RecompPos,0x85DB); break;
default: default:
DisplayError("fpuLoadIntDwordFromN64Mem\nUnknown x86 Register"); _Notify->DisplayError("fpuLoadIntDwordFromN64Mem\nUnknown x86 Register");
} }
PUTDST32(m_RecompPos,_MMU->Rdram()); PUTDST32(m_RecompPos,_MMU->Rdram());
} }
@ -3123,7 +3123,7 @@ void CX86Ops::fpuLoadIntegerDwordFromX86Reg(int * StackPos,x86Reg x86reg) {
case x86_ESI: PUTDST8(m_RecompPos,0x06); break; case x86_ESI: PUTDST8(m_RecompPos,0x06); break;
case x86_EDI: PUTDST8(m_RecompPos,0x07); break; case x86_EDI: PUTDST8(m_RecompPos,0x07); break;
default: default:
DisplayError("fpuLoadIntegerDwordFromX86Reg\nUnknown x86 Register"); _Notify->DisplayError("fpuLoadIntegerDwordFromX86Reg\nUnknown x86 Register");
} }
} }
@ -3146,7 +3146,7 @@ void CX86Ops::fpuLoadIntegerQwordFromX86Reg(int * StackPos,x86Reg x86reg) {
case x86_ESI: PUTDST8(m_RecompPos,0x2E); break; case x86_ESI: PUTDST8(m_RecompPos,0x2E); break;
case x86_EDI: PUTDST8(m_RecompPos,0x2F); break; case x86_EDI: PUTDST8(m_RecompPos,0x2F); break;
default: default:
DisplayError("fpuLoadIntegerDwordFromX86Reg\nUnknown x86 Register"); _Notify->DisplayError("fpuLoadIntegerDwordFromX86Reg\nUnknown x86 Register");
} }
} }
@ -3169,7 +3169,7 @@ void CX86Ops::fpuLoadQwordFromX86Reg(int * StackPos, x86Reg x86reg) {
case x86_ESI: PUTDST8(m_RecompPos,0x06); break; case x86_ESI: PUTDST8(m_RecompPos,0x06); break;
case x86_EDI: PUTDST8(m_RecompPos,0x07); break; case x86_EDI: PUTDST8(m_RecompPos,0x07); break;
default: default:
DisplayError("fpuLoadQwordFromX86Reg\nUnknown x86 Register"); _Notify->DisplayError("fpuLoadQwordFromX86Reg\nUnknown x86 Register");
} }
} }
@ -3185,7 +3185,7 @@ void CX86Ops::fpuLoadQwordFromN64Mem(int * StackPos,x86Reg x86reg) {
case x86_EDI: PUTDST16(m_RecompPos,0x87DD); break; case x86_EDI: PUTDST16(m_RecompPos,0x87DD); break;
case x86_EBP: PUTDST16(m_RecompPos,0x85DD); break; case x86_EBP: PUTDST16(m_RecompPos,0x85DD); break;
default: default:
DisplayError("fpuLoadQwordFromN64Mem\nUnknown x86 Register"); _Notify->DisplayError("fpuLoadQwordFromN64Mem\nUnknown x86 Register");
} }
PUTDST32(m_RecompPos,_MMU->Rdram()); PUTDST32(m_RecompPos,_MMU->Rdram());
} }
@ -3203,7 +3203,7 @@ void CX86Ops::fpuLoadReg(int * StackPos,x86FpuValues Reg) {
case x86_ST6: PUTDST16(m_RecompPos,0xC6D9); break; case x86_ST6: PUTDST16(m_RecompPos,0xC6D9); break;
case x86_ST7: PUTDST16(m_RecompPos,0xC7D9); break; case x86_ST7: PUTDST16(m_RecompPos,0xC7D9); break;
default: default:
DisplayError("fpuLoadReg\nUnknown x86 Register:%i", Reg); _Notify->DisplayError("fpuLoadReg\nUnknown x86 Register:%i", Reg);
break; break;
} }
} }
@ -3224,7 +3224,7 @@ void CX86Ops::fpuMulDwordRegPointer(x86Reg x86Pointer) {
case x86_ESI: PUTDST16(m_RecompPos,0x0ED8); break; case x86_ESI: PUTDST16(m_RecompPos,0x0ED8); break;
case x86_EDI: PUTDST16(m_RecompPos,0x0FD8); break; case x86_EDI: PUTDST16(m_RecompPos,0x0FD8); break;
default: default:
DisplayError("fpuMulDwordRegPointer\nUnknown x86 Register"); _Notify->DisplayError("fpuMulDwordRegPointer\nUnknown x86 Register");
break; break;
} }
} }
@ -3245,7 +3245,7 @@ void CX86Ops::fpuMulQwordRegPointer(x86Reg x86Pointer) {
case x86_ESI: PUTDST16(m_RecompPos,0x0EDC); break; case x86_ESI: PUTDST16(m_RecompPos,0x0EDC); break;
case x86_EDI: PUTDST16(m_RecompPos,0x0FDC); break; case x86_EDI: PUTDST16(m_RecompPos,0x0FDC); break;
default: default:
DisplayError("fpuMulQwordRegPointer\nUnknown x86 Register"); _Notify->DisplayError("fpuMulQwordRegPointer\nUnknown x86 Register");
break; break;
} }
} }
@ -3262,7 +3262,7 @@ void CX86Ops::fpuMulReg(x86FpuValues x86reg) {
case x86_ST6: PUTDST16(m_RecompPos,0xCED8); break; case x86_ST6: PUTDST16(m_RecompPos,0xCED8); break;
case x86_ST7: PUTDST16(m_RecompPos,0xCFD8); break; case x86_ST7: PUTDST16(m_RecompPos,0xCFD8); break;
default: default:
DisplayError("fpuMulReg\nUnknown x86 Register"); _Notify->DisplayError("fpuMulReg\nUnknown x86 Register");
break; break;
} }
} }
@ -3279,7 +3279,7 @@ void CX86Ops::fpuMulRegPop(x86FpuValues x86reg) {
case x86_ST6: PUTDST16(m_RecompPos,0xCEDE); break; case x86_ST6: PUTDST16(m_RecompPos,0xCEDE); break;
case x86_ST7: PUTDST16(m_RecompPos,0xCFDE); break; case x86_ST7: PUTDST16(m_RecompPos,0xCFDE); break;
default: default:
DisplayError("fpuMulReg\nUnknown x86 Register"); _Notify->DisplayError("fpuMulReg\nUnknown x86 Register");
break; break;
} }
} }
@ -3327,7 +3327,7 @@ void CX86Ops::fpuStoreDwordFromX86Reg(int * StackPos,x86Reg x86reg, BOOL pop) {
case x86_ESI: Command = 0x16; break; case x86_ESI: Command = 0x16; break;
case x86_EDI: Command = 0x17; break; case x86_EDI: Command = 0x17; break;
default: default:
DisplayError("fpuStoreIntegerQwordFromX86Reg\nUnknown x86 Register"); _Notify->DisplayError("fpuStoreIntegerQwordFromX86Reg\nUnknown x86 Register");
} }
PUTDST8(m_RecompPos, (pop == FALSE) ? Command : (Command + 0x8)); PUTDST8(m_RecompPos, (pop == FALSE) ? Command : (Command + 0x8));
} }
@ -3347,7 +3347,7 @@ void CX86Ops::fpuStoreDwordToN64Mem(int * StackPos,x86Reg x86reg, BOOL Pop) {
case x86_EDI: PUTDST16(m_RecompPos,0x97D9|s); break; case x86_EDI: PUTDST16(m_RecompPos,0x97D9|s); break;
case x86_EBP: PUTDST16(m_RecompPos,0x95D9|s); break; case x86_EBP: PUTDST16(m_RecompPos,0x95D9|s); break;
default: default:
DisplayError("fpuStoreDwordToN64Mem\nUnknown x86 Register"); _Notify->DisplayError("fpuStoreDwordToN64Mem\nUnknown x86 Register");
} }
PUTDST32(m_RecompPos,_MMU->Rdram()); PUTDST32(m_RecompPos,_MMU->Rdram());
} }
@ -3374,7 +3374,7 @@ void CX86Ops::fpuStoreIntegerDwordFromX86Reg(int * StackPos,x86Reg x86reg, BOOL
case x86_ESI: Command = 0x16; break; case x86_ESI: Command = 0x16; break;
case x86_EDI: Command = 0x17; break; case x86_EDI: Command = 0x17; break;
default: default:
DisplayError("fpuStoreIntegerDwordFromX86Reg\nUnknown x86 Register"); _Notify->DisplayError("fpuStoreIntegerDwordFromX86Reg\nUnknown x86 Register");
} }
PUTDST8(m_RecompPos, (pop == FALSE) ? Command : (Command + 0x8)); PUTDST8(m_RecompPos, (pop == FALSE) ? Command : (Command + 0x8));
} }
@ -3402,7 +3402,7 @@ void CX86Ops::fpuStoreIntegerQwordFromX86Reg(int * StackPos, x86Reg x86reg, BOOL
case x86_ESI: Command = 0x36; break; case x86_ESI: Command = 0x36; break;
case x86_EDI: Command = 0x37; break; case x86_EDI: Command = 0x37; break;
default: default:
DisplayError("fpuStoreIntegerQwordFromX86Reg\nUnknown x86 Register"); _Notify->DisplayError("fpuStoreIntegerQwordFromX86Reg\nUnknown x86 Register");
} }
PUTDST8(m_RecompPos, (pop == FALSE) ? Command : (Command + 0x8)); PUTDST8(m_RecompPos, (pop == FALSE) ? Command : (Command + 0x8));
} }
@ -3422,7 +3422,7 @@ void CX86Ops::fpuStoreQwordFromX86Reg(int * StackPos, x86Reg x86reg, BOOL pop) {
case x86_ESI: Command = 0x16; break; case x86_ESI: Command = 0x16; break;
case x86_EDI: Command = 0x17; break; case x86_EDI: Command = 0x17; break;
default: default:
DisplayError("fpuStoreQwordFromX86Reg\nUnknown x86 Register"); _Notify->DisplayError("fpuStoreQwordFromX86Reg\nUnknown x86 Register");
} }
PUTDST8(m_RecompPos, (pop == FALSE) ? Command : (Command + 0x8)); PUTDST8(m_RecompPos, (pop == FALSE) ? Command : (Command + 0x8));
} }
@ -3448,7 +3448,7 @@ void CX86Ops::fpuSubDwordRegPointer(x86Reg x86Pointer) {
case x86_ESI: PUTDST16(m_RecompPos,0x26D8); break; case x86_ESI: PUTDST16(m_RecompPos,0x26D8); break;
case x86_EDI: PUTDST16(m_RecompPos,0x27D8); break; case x86_EDI: PUTDST16(m_RecompPos,0x27D8); break;
default: default:
DisplayError("fpuSubDwordRegPointer\nUnknown x86 Register"); _Notify->DisplayError("fpuSubDwordRegPointer\nUnknown x86 Register");
break; break;
} }
} }
@ -3475,7 +3475,7 @@ void CX86Ops::fpuSubQwordRegPointer(x86Reg x86Pointer) {
case x86_ESI: PUTDST16(m_RecompPos,0x26DC); break; case x86_ESI: PUTDST16(m_RecompPos,0x26DC); break;
case x86_EDI: PUTDST16(m_RecompPos,0x27DC); break; case x86_EDI: PUTDST16(m_RecompPos,0x27DC); break;
default: default:
DisplayError("fpuSubQwordRegPointer\nUnknown x86 Register"); _Notify->DisplayError("fpuSubQwordRegPointer\nUnknown x86 Register");
break; break;
} }
} }
@ -3498,7 +3498,7 @@ void CX86Ops::fpuSubReg(x86FpuValues x86reg) {
case x86_ST6: PUTDST16(m_RecompPos,0xE6D8); break; case x86_ST6: PUTDST16(m_RecompPos,0xE6D8); break;
case x86_ST7: PUTDST16(m_RecompPos,0xE7D8); break; case x86_ST7: PUTDST16(m_RecompPos,0xE7D8); break;
default: default:
DisplayError("fpuSubReg\nUnknown x86 Register"); _Notify->DisplayError("fpuSubReg\nUnknown x86 Register");
break; break;
} }
} }
@ -3515,7 +3515,7 @@ void CX86Ops::fpuSubRegPop(x86FpuValues x86reg) {
case x86_ST6: PUTDST16(m_RecompPos,0xEEDE); break; case x86_ST6: PUTDST16(m_RecompPos,0xEEDE); break;
case x86_ST7: PUTDST16(m_RecompPos,0xEFDE); break; case x86_ST7: PUTDST16(m_RecompPos,0xEFDE); break;
default: default:
DisplayError("fpuSubRegPop\nUnknown x86 Register"); _Notify->DisplayError("fpuSubRegPop\nUnknown x86 Register");
break; break;
} }
} }