RSP: internalize RSP information in to interpter ops
This commit is contained in:
parent
9f98f4d4cd
commit
6ed1c3edfb
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@ -123,7 +123,7 @@ void InitilizeRSP(RSP_INFO & Rsp_Info)
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GraphicsHle = Set_GraphicsHle != 0 ? GetSystemSetting(Set_GraphicsHle) != 0 : true;
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GraphicsHle = Set_GraphicsHle != 0 ? GetSystemSetting(Set_GraphicsHle) != 0 : true;
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AllocateMemory();
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AllocateMemory();
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RSPSystem.Reset();
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RSPSystem.Reset(Rsp_Info);
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Build_RSP();
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Build_RSP();
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#ifdef GenerateLog
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#ifdef GenerateLog
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Start_Log();
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Start_Log();
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@ -4,7 +4,6 @@
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#include "RspLog.h"
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#include "RspLog.h"
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#include <Common/StdString.h>
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#include <Common/StdString.h>
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#include <Project64-rsp-core/RSPDebugger.h>
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#include <Project64-rsp-core/RSPDebugger.h>
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#include <Project64-rsp-core/RSPInfo.h>
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#include <Project64-rsp-core/Settings/RspSettings.h>
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#include <Project64-rsp-core/Settings/RspSettings.h>
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#include <Project64-rsp-core/cpu/RSPInterpreterOps.h>
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#include <Project64-rsp-core/cpu/RSPInterpreterOps.h>
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#include <Project64-rsp-core/cpu/RspClamp.h>
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#include <Project64-rsp-core/cpu/RspClamp.h>
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@ -61,6 +60,18 @@ RSPOp::RSPOp(CRSPSystem & System) :
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m_System(System),
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m_System(System),
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m_OpCode(System.m_OpCode),
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m_OpCode(System.m_OpCode),
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m_Reg(System.m_Reg),
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m_Reg(System.m_Reg),
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m_MI_INTR_REG(System.m_MI_INTR_REG),
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m_SP_PC_REG(System.m_SP_PC_REG),
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m_SP_STATUS_REG(System.m_SP_STATUS_REG),
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m_SP_DMA_FULL_REG(System.m_SP_DMA_FULL_REG),
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m_SP_DMA_BUSY_REG(System.m_SP_DMA_BUSY_REG),
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m_SP_SEMAPHORE_REG(System.m_SP_SEMAPHORE_REG),
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m_DPC_START_REG(System.m_DPC_START_REG),
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m_DPC_END_REG(System.m_DPC_END_REG),
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m_DPC_CURRENT_REG(System.m_DPC_CURRENT_REG),
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m_DPC_STATUS_REG(System.m_DPC_STATUS_REG),
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m_DPC_CLOCK_REG(System.m_DPC_CLOCK_REG),
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m_DMEM(System.m_DMEM),
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m_GPR(System.m_Reg.m_GPR),
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m_GPR(System.m_Reg.m_GPR),
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m_ACCUM(System.m_Reg.m_ACCUM),
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m_ACCUM(System.m_Reg.m_ACCUM),
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m_Flags(System.m_Reg.m_Flags),
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m_Flags(System.m_Reg.m_Flags),
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@ -69,7 +80,9 @@ RSPOp::RSPOp(CRSPSystem & System) :
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VCOH(System.m_Reg.VCOH),
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VCOH(System.m_Reg.VCOH),
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VCCL(System.m_Reg.VCCL),
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VCCL(System.m_Reg.VCCL),
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VCCH(System.m_Reg.VCCH),
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VCCH(System.m_Reg.VCCH),
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VCE(System.m_Reg.VCE)
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VCE(System.m_Reg.VCE),
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CheckInterrupts(System.CheckInterrupts),
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ProcessRdpList(System.ProcessRdpList)
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{
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{
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BuildInterpreter();
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BuildInterpreter();
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}
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}
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@ -462,7 +475,7 @@ void RSPOp::J(void)
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void RSPOp::JAL(void)
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void RSPOp::JAL(void)
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{
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{
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RSP_NextInstruction = RSPPIPELINE_DELAY_SLOT;
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RSP_NextInstruction = RSPPIPELINE_DELAY_SLOT;
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m_GPR[31].UW = (*PrgCount + 8) & 0xFFC;
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m_GPR[31].UW = (*m_SP_PC_REG + 8) & 0xFFC;
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RSP_JumpTo = (m_OpCode.target << 2) & 0xFFC;
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RSP_JumpTo = (m_OpCode.target << 2) & 0xFFC;
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}
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}
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@ -543,7 +556,7 @@ void RSPOp::COP2(void)
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void RSPOp::LB(void)
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void RSPOp::LB(void)
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{
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{
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uint32_t Address = (uint32_t)(m_GPR[m_OpCode.base].W + (short)m_OpCode.offset) & 0xFFF;
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uint32_t Address = (uint32_t)(m_GPR[m_OpCode.base].W + (short)m_OpCode.offset) & 0xFFF;
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m_GPR[m_OpCode.rt].W = *(int8_t *)(RSPInfo.DMEM + ((Address ^ 3) & 0xFFF));
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m_GPR[m_OpCode.rt].W = *(int8_t *)(m_DMEM + ((Address ^ 3) & 0xFFF));
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}
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}
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void RSPOp::LH(void)
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void RSPOp::LH(void)
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@ -551,12 +564,12 @@ void RSPOp::LH(void)
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uint32_t Address = (uint32_t)(m_GPR[m_OpCode.base].W + (short)m_OpCode.offset) & 0xFFF;
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uint32_t Address = (uint32_t)(m_GPR[m_OpCode.base].W + (short)m_OpCode.offset) & 0xFFF;
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if ((Address & 0x1) != 0)
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if ((Address & 0x1) != 0)
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{
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{
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m_GPR[m_OpCode.rt].UHW[0] = *(uint8_t *)(RSPInfo.DMEM + (((Address + 0) & 0xFFF) ^ 3)) << 8;
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m_GPR[m_OpCode.rt].UHW[0] = *(uint8_t *)(m_DMEM + (((Address + 0) & 0xFFF) ^ 3)) << 8;
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m_GPR[m_OpCode.rt].UHW[0] += *(uint8_t *)(RSPInfo.DMEM + (((Address + 1) & 0xFFF) ^ 3)) << 0;
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m_GPR[m_OpCode.rt].UHW[0] += *(uint8_t *)(m_DMEM + (((Address + 1) & 0xFFF) ^ 3)) << 0;
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}
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}
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else
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else
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{
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{
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m_GPR[m_OpCode.rt].UHW[0] = *(uint16_t *)(RSPInfo.DMEM + ((Address ^ 2) & 0xFFF));
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m_GPR[m_OpCode.rt].UHW[0] = *(uint16_t *)(m_DMEM + ((Address ^ 2) & 0xFFF));
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}
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}
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m_GPR[m_OpCode.rt].W = m_GPR[m_OpCode.rt].HW[0];
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m_GPR[m_OpCode.rt].W = m_GPR[m_OpCode.rt].HW[0];
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}
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}
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@ -566,21 +579,21 @@ void RSPOp::LW(void)
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uint32_t Address = (uint32_t)(m_GPR[m_OpCode.base].W + (short)m_OpCode.offset) & 0xFFF;
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uint32_t Address = (uint32_t)(m_GPR[m_OpCode.base].W + (short)m_OpCode.offset) & 0xFFF;
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if ((Address & 0x3) != 0)
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if ((Address & 0x3) != 0)
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{
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{
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m_GPR[m_OpCode.rt].UW = *(uint8_t *)(RSPInfo.DMEM + (((Address + 0) & 0xFFF) ^ 3)) << 24;
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m_GPR[m_OpCode.rt].UW = *(uint8_t *)(m_DMEM + (((Address + 0) & 0xFFF) ^ 3)) << 24;
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m_GPR[m_OpCode.rt].UW += *(uint8_t *)(RSPInfo.DMEM + (((Address + 1) & 0xFFF) ^ 3)) << 16;
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m_GPR[m_OpCode.rt].UW += *(uint8_t *)(m_DMEM + (((Address + 1) & 0xFFF) ^ 3)) << 16;
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m_GPR[m_OpCode.rt].UW += *(uint8_t *)(RSPInfo.DMEM + (((Address + 2) & 0xFFF) ^ 3)) << 8;
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m_GPR[m_OpCode.rt].UW += *(uint8_t *)(m_DMEM + (((Address + 2) & 0xFFF) ^ 3)) << 8;
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m_GPR[m_OpCode.rt].UW += *(uint8_t *)(RSPInfo.DMEM + (((Address + 3) & 0xFFF) ^ 3)) << 0;
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m_GPR[m_OpCode.rt].UW += *(uint8_t *)(m_DMEM + (((Address + 3) & 0xFFF) ^ 3)) << 0;
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}
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}
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else
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else
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{
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{
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m_GPR[m_OpCode.rt].UW = *(uint32_t *)(RSPInfo.DMEM + (Address & 0xFFF));
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m_GPR[m_OpCode.rt].UW = *(uint32_t *)(m_DMEM + (Address & 0xFFF));
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}
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}
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}
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}
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void RSPOp::LBU(void)
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void RSPOp::LBU(void)
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{
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{
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uint32_t Address = (uint32_t)(m_GPR[m_OpCode.base].W + (short)m_OpCode.offset) & 0xFFF;
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uint32_t Address = (uint32_t)(m_GPR[m_OpCode.base].W + (short)m_OpCode.offset) & 0xFFF;
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m_GPR[m_OpCode.rt].UW = *(uint8_t *)(RSPInfo.DMEM + ((Address ^ 3) & 0xFFF));
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m_GPR[m_OpCode.rt].UW = *(uint8_t *)(m_DMEM + ((Address ^ 3) & 0xFFF));
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}
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}
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void RSPOp::LHU(void)
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void RSPOp::LHU(void)
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@ -588,12 +601,12 @@ void RSPOp::LHU(void)
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uint32_t Address = (uint32_t)(m_GPR[m_OpCode.base].W + (short)m_OpCode.offset) & 0xFFF;
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uint32_t Address = (uint32_t)(m_GPR[m_OpCode.base].W + (short)m_OpCode.offset) & 0xFFF;
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if ((Address & 0x1) != 0)
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if ((Address & 0x1) != 0)
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{
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{
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m_GPR[m_OpCode.rt].UHW[0] = *(uint8_t *)(RSPInfo.DMEM + (((Address + 0) & 0xFFF) ^ 3)) << 8;
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m_GPR[m_OpCode.rt].UHW[0] = *(uint8_t *)(m_DMEM + (((Address + 0) & 0xFFF) ^ 3)) << 8;
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m_GPR[m_OpCode.rt].UHW[0] += *(uint8_t *)(RSPInfo.DMEM + (((Address + 1) & 0xFFF) ^ 3)) << 0;
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m_GPR[m_OpCode.rt].UHW[0] += *(uint8_t *)(m_DMEM + (((Address + 1) & 0xFFF) ^ 3)) << 0;
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}
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}
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else
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else
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{
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{
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m_GPR[m_OpCode.rt].UHW[0] = *(uint16_t *)(RSPInfo.DMEM + ((Address ^ 2) & 0xFFF));
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m_GPR[m_OpCode.rt].UHW[0] = *(uint16_t *)(m_DMEM + ((Address ^ 2) & 0xFFF));
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}
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}
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m_GPR[m_OpCode.rt].UW = m_GPR[m_OpCode.rt].UHW[0];
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m_GPR[m_OpCode.rt].UW = m_GPR[m_OpCode.rt].UHW[0];
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}
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}
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@ -603,21 +616,21 @@ void RSPOp::LWU(void)
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uint32_t Address = (uint32_t)(m_GPR[m_OpCode.base].W + (short)m_OpCode.offset) & 0xFFF;
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uint32_t Address = (uint32_t)(m_GPR[m_OpCode.base].W + (short)m_OpCode.offset) & 0xFFF;
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if ((Address & 0x3) != 0)
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if ((Address & 0x3) != 0)
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{
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{
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m_GPR[m_OpCode.rt].UW = *(uint8_t *)(RSPInfo.DMEM + (((Address + 0) & 0xFFF) ^ 3)) << 24;
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m_GPR[m_OpCode.rt].UW = *(uint8_t *)(m_DMEM + (((Address + 0) & 0xFFF) ^ 3)) << 24;
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m_GPR[m_OpCode.rt].UW += *(uint8_t *)(RSPInfo.DMEM + (((Address + 1) & 0xFFF) ^ 3)) << 16;
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m_GPR[m_OpCode.rt].UW += *(uint8_t *)(m_DMEM + (((Address + 1) & 0xFFF) ^ 3)) << 16;
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m_GPR[m_OpCode.rt].UW += *(uint8_t *)(RSPInfo.DMEM + (((Address + 2) & 0xFFF) ^ 3)) << 8;
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m_GPR[m_OpCode.rt].UW += *(uint8_t *)(m_DMEM + (((Address + 2) & 0xFFF) ^ 3)) << 8;
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m_GPR[m_OpCode.rt].UW += *(uint8_t *)(RSPInfo.DMEM + (((Address + 3) & 0xFFF) ^ 3)) << 0;
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m_GPR[m_OpCode.rt].UW += *(uint8_t *)(m_DMEM + (((Address + 3) & 0xFFF) ^ 3)) << 0;
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}
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}
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else
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else
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{
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{
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m_GPR[m_OpCode.rt].UW = *(uint32_t *)(RSPInfo.DMEM + (Address & 0xFFF));
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m_GPR[m_OpCode.rt].UW = *(uint32_t *)(m_DMEM + (Address & 0xFFF));
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}
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}
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}
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}
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void RSPOp::SB(void)
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void RSPOp::SB(void)
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{
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{
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uint32_t Address = (uint32_t)(m_GPR[m_OpCode.base].W + (short)m_OpCode.offset) & 0xFFF;
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uint32_t Address = (uint32_t)(m_GPR[m_OpCode.base].W + (short)m_OpCode.offset) & 0xFFF;
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*(uint8_t *)(RSPInfo.DMEM + ((Address ^ 3) & 0xFFF)) = m_GPR[m_OpCode.rt].UB[0];
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*(uint8_t *)(m_DMEM + ((Address ^ 3) & 0xFFF)) = m_GPR[m_OpCode.rt].UB[0];
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}
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}
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void RSPOp::SH(void)
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void RSPOp::SH(void)
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@ -625,12 +638,12 @@ void RSPOp::SH(void)
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uint32_t Address = (uint32_t)(m_GPR[m_OpCode.base].W + (short)m_OpCode.offset) & 0xFFF;
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uint32_t Address = (uint32_t)(m_GPR[m_OpCode.base].W + (short)m_OpCode.offset) & 0xFFF;
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if ((Address & 0x1) != 0)
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if ((Address & 0x1) != 0)
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{
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{
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*(uint8_t *)(RSPInfo.DMEM + ((Address ^ 3) & 0xFFF)) = (m_GPR[m_OpCode.rt].UHW[0] >> 8);
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*(uint8_t *)(m_DMEM + ((Address ^ 3) & 0xFFF)) = (m_GPR[m_OpCode.rt].UHW[0] >> 8);
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*(uint8_t *)(RSPInfo.DMEM + (((Address + 1) ^ 3) & 0xFFF)) = (m_GPR[m_OpCode.rt].UHW[0] & 0xFF);
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*(uint8_t *)(m_DMEM + (((Address + 1) ^ 3) & 0xFFF)) = (m_GPR[m_OpCode.rt].UHW[0] & 0xFF);
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}
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}
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else
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else
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{
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{
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*(uint16_t *)(RSPInfo.DMEM + ((Address ^ 2) & 0xFFF)) = m_GPR[m_OpCode.rt].UHW[0];
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*(uint16_t *)(m_DMEM + ((Address ^ 2) & 0xFFF)) = m_GPR[m_OpCode.rt].UHW[0];
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}
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}
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}
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}
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@ -639,14 +652,14 @@ void RSPOp::SW(void)
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uint32_t Address = (uint32_t)(m_GPR[m_OpCode.base].W + (short)m_OpCode.offset) & 0xFFF;
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uint32_t Address = (uint32_t)(m_GPR[m_OpCode.base].W + (short)m_OpCode.offset) & 0xFFF;
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if ((Address & 0x3) != 0)
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if ((Address & 0x3) != 0)
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{
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{
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*(uint8_t *)(RSPInfo.DMEM + (((Address + 0) ^ 3) & 0xFFF)) = (m_GPR[m_OpCode.rt].UW >> 24) & 0xFF;
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*(uint8_t *)(m_DMEM + (((Address + 0) ^ 3) & 0xFFF)) = (m_GPR[m_OpCode.rt].UW >> 24) & 0xFF;
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*(uint8_t *)(RSPInfo.DMEM + (((Address + 1) ^ 3) & 0xFFF)) = (m_GPR[m_OpCode.rt].UW >> 16) & 0xFF;
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*(uint8_t *)(m_DMEM + (((Address + 1) ^ 3) & 0xFFF)) = (m_GPR[m_OpCode.rt].UW >> 16) & 0xFF;
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*(uint8_t *)(RSPInfo.DMEM + (((Address + 2) ^ 3) & 0xFFF)) = (m_GPR[m_OpCode.rt].UW >> 8) & 0xFF;
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*(uint8_t *)(m_DMEM + (((Address + 2) ^ 3) & 0xFFF)) = (m_GPR[m_OpCode.rt].UW >> 8) & 0xFF;
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*(uint8_t *)(RSPInfo.DMEM + (((Address + 3) ^ 3) & 0xFFF)) = (m_GPR[m_OpCode.rt].UW >> 0) & 0xFF;
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*(uint8_t *)(m_DMEM + (((Address + 3) ^ 3) & 0xFFF)) = (m_GPR[m_OpCode.rt].UW >> 0) & 0xFF;
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}
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}
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else
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else
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{
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{
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*(uint32_t *)(RSPInfo.DMEM + (Address & 0xFFF)) = m_GPR[m_OpCode.rt].UW;
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*(uint32_t *)(m_DMEM + (Address & 0xFFF)) = m_GPR[m_OpCode.rt].UW;
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}
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}
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}
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}
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@ -702,17 +715,17 @@ void RSPOp::Special_JALR(void)
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{
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{
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RSP_NextInstruction = RSPPIPELINE_DELAY_SLOT;
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RSP_NextInstruction = RSPPIPELINE_DELAY_SLOT;
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RSP_JumpTo = (m_GPR[m_OpCode.rs].W & 0xFFC);
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RSP_JumpTo = (m_GPR[m_OpCode.rs].W & 0xFFC);
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m_GPR[m_OpCode.rd].W = (*PrgCount + 8) & 0xFFC;
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m_GPR[m_OpCode.rd].W = (*m_SP_PC_REG + 8) & 0xFFC;
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}
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}
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void RSPOp::Special_BREAK(void)
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void RSPOp::Special_BREAK(void)
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{
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{
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RSP_Running = false;
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RSP_Running = false;
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*RSPInfo.SP_STATUS_REG |= (SP_STATUS_HALT | SP_STATUS_BROKE);
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*m_SP_STATUS_REG |= (SP_STATUS_HALT | SP_STATUS_BROKE);
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if ((*RSPInfo.SP_STATUS_REG & SP_STATUS_INTR_BREAK) != 0)
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if ((*m_SP_STATUS_REG & SP_STATUS_INTR_BREAK) != 0)
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{
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{
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*RSPInfo.MI_INTR_REG |= MI_INTR_SP;
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*m_MI_INTR_REG |= MI_INTR_SP;
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RSPInfo.CheckInterrupts();
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CheckInterrupts();
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}
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}
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}
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}
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@ -784,14 +797,14 @@ void RSPOp::BLTZAL(void)
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{
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{
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RSP_NextInstruction = RSPPIPELINE_DELAY_SLOT;
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RSP_NextInstruction = RSPPIPELINE_DELAY_SLOT;
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RSP_JumpTo = BranchIf(m_GPR[m_OpCode.rs].W < 0);
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RSP_JumpTo = BranchIf(m_GPR[m_OpCode.rs].W < 0);
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m_GPR[31].UW = (*PrgCount + 8) & 0xFFC;
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m_GPR[31].UW = (*m_SP_PC_REG + 8) & 0xFFC;
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}
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}
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void RSPOp::BGEZAL(void)
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void RSPOp::BGEZAL(void)
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{
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{
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RSP_NextInstruction = RSPPIPELINE_DELAY_SLOT;
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RSP_NextInstruction = RSPPIPELINE_DELAY_SLOT;
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RSP_JumpTo = BranchIf(m_GPR[m_OpCode.rs].W >= 0);
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RSP_JumpTo = BranchIf(m_GPR[m_OpCode.rs].W >= 0);
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m_GPR[31].UW = (*PrgCount + 8) & 0xFFC;
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m_GPR[31].UW = (*m_SP_PC_REG + 8) & 0xFFC;
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}
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}
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||||||
|
|
||||||
// COP0 functions
|
// COP0 functions
|
||||||
|
@ -800,7 +813,7 @@ void RSPOp::Cop0_MF(void)
|
||||||
{
|
{
|
||||||
if (g_RSPDebugger != nullptr)
|
if (g_RSPDebugger != nullptr)
|
||||||
{
|
{
|
||||||
g_RSPDebugger->RDP_LogMF0(*PrgCount, m_OpCode.rd);
|
g_RSPDebugger->RDP_LogMF0(*m_SP_PC_REG, m_OpCode.rd);
|
||||||
}
|
}
|
||||||
switch (m_OpCode.rd)
|
switch (m_OpCode.rd)
|
||||||
{
|
{
|
||||||
|
@ -809,24 +822,24 @@ void RSPOp::Cop0_MF(void)
|
||||||
case 2: m_GPR[m_OpCode.rt].UW = g_RSPRegisterHandler->ReadReg(RSPRegister_RD_LEN); break;
|
case 2: m_GPR[m_OpCode.rt].UW = g_RSPRegisterHandler->ReadReg(RSPRegister_RD_LEN); break;
|
||||||
case 3: m_GPR[m_OpCode.rt].UW = g_RSPRegisterHandler->ReadReg(RSPRegister_WR_LEN); break;
|
case 3: m_GPR[m_OpCode.rt].UW = g_RSPRegisterHandler->ReadReg(RSPRegister_WR_LEN); break;
|
||||||
case 4: m_GPR[m_OpCode.rt].UW = g_RSPRegisterHandler->ReadReg(RSPRegister_STATUS); break;
|
case 4: m_GPR[m_OpCode.rt].UW = g_RSPRegisterHandler->ReadReg(RSPRegister_STATUS); break;
|
||||||
case 5: m_GPR[m_OpCode.rt].UW = *RSPInfo.SP_DMA_FULL_REG; break;
|
case 5: m_GPR[m_OpCode.rt].UW = *m_SP_DMA_FULL_REG; break;
|
||||||
case 6: m_GPR[m_OpCode.rt].UW = *RSPInfo.SP_DMA_BUSY_REG; break;
|
case 6: m_GPR[m_OpCode.rt].UW = *m_SP_DMA_BUSY_REG; break;
|
||||||
case 7:
|
case 7:
|
||||||
if (RspMultiThreaded)
|
if (RspMultiThreaded)
|
||||||
{
|
{
|
||||||
m_GPR[m_OpCode.rt].W = *RSPInfo.SP_SEMAPHORE_REG;
|
m_GPR[m_OpCode.rt].W = *m_SP_SEMAPHORE_REG;
|
||||||
*RSPInfo.SP_SEMAPHORE_REG = 1;
|
*m_SP_SEMAPHORE_REG = 1;
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
m_GPR[m_OpCode.rt].W = 0;
|
m_GPR[m_OpCode.rt].W = 0;
|
||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
case 8: m_GPR[m_OpCode.rt].UW = *RSPInfo.DPC_START_REG; break;
|
case 8: m_GPR[m_OpCode.rt].UW = *m_DPC_START_REG; break;
|
||||||
case 9: m_GPR[m_OpCode.rt].UW = *RSPInfo.DPC_END_REG; break;
|
case 9: m_GPR[m_OpCode.rt].UW = *m_DPC_END_REG; break;
|
||||||
case 10: m_GPR[m_OpCode.rt].UW = *RSPInfo.DPC_CURRENT_REG; break;
|
case 10: m_GPR[m_OpCode.rt].UW = *m_DPC_CURRENT_REG; break;
|
||||||
case 11: m_GPR[m_OpCode.rt].W = *RSPInfo.DPC_STATUS_REG; break;
|
case 11: m_GPR[m_OpCode.rt].W = *m_DPC_STATUS_REG; break;
|
||||||
case 12: m_GPR[m_OpCode.rt].W = *RSPInfo.DPC_CLOCK_REG; break;
|
case 12: m_GPR[m_OpCode.rt].W = *m_DPC_CLOCK_REG; break;
|
||||||
default:
|
default:
|
||||||
g_Notify->DisplayError(stdstr_f("We have not implemented RSP MF CP0 reg %s (%d)", COP0_Name(m_OpCode.rd), m_OpCode.rd).c_str());
|
g_Notify->DisplayError(stdstr_f("We have not implemented RSP MF CP0 reg %s (%d)", COP0_Name(m_OpCode.rd), m_OpCode.rd).c_str());
|
||||||
}
|
}
|
||||||
|
@ -836,7 +849,7 @@ void RSPOp::Cop0_MT(void)
|
||||||
{
|
{
|
||||||
if (LogRDP && g_CPUCore == InterpreterCPU)
|
if (LogRDP && g_CPUCore == InterpreterCPU)
|
||||||
{
|
{
|
||||||
RDP_LogMT0(*PrgCount, m_OpCode.rd, m_GPR[m_OpCode.rt].UW);
|
RDP_LogMT0(*m_SP_PC_REG, m_OpCode.rd, m_GPR[m_OpCode.rt].UW);
|
||||||
}
|
}
|
||||||
switch (m_OpCode.rd)
|
switch (m_OpCode.rd)
|
||||||
{
|
{
|
||||||
|
@ -845,44 +858,44 @@ void RSPOp::Cop0_MT(void)
|
||||||
case 2: g_RSPRegisterHandler->WriteReg(RSPRegister_RD_LEN, m_GPR[m_OpCode.rt].UW); break;
|
case 2: g_RSPRegisterHandler->WriteReg(RSPRegister_RD_LEN, m_GPR[m_OpCode.rt].UW); break;
|
||||||
case 3: g_RSPRegisterHandler->WriteReg(RSPRegister_WR_LEN, m_GPR[m_OpCode.rt].UW); break;
|
case 3: g_RSPRegisterHandler->WriteReg(RSPRegister_WR_LEN, m_GPR[m_OpCode.rt].UW); break;
|
||||||
case 4: g_RSPRegisterHandler->WriteReg(RSPRegister_STATUS, m_GPR[m_OpCode.rt].UW); break;
|
case 4: g_RSPRegisterHandler->WriteReg(RSPRegister_STATUS, m_GPR[m_OpCode.rt].UW); break;
|
||||||
case 7: *RSPInfo.SP_SEMAPHORE_REG = 0; break;
|
case 7: *m_SP_SEMAPHORE_REG = 0; break;
|
||||||
case 8:
|
case 8:
|
||||||
*RSPInfo.DPC_START_REG = m_GPR[m_OpCode.rt].UW;
|
*m_DPC_START_REG = m_GPR[m_OpCode.rt].UW;
|
||||||
*RSPInfo.DPC_CURRENT_REG = m_GPR[m_OpCode.rt].UW;
|
*m_DPC_CURRENT_REG = m_GPR[m_OpCode.rt].UW;
|
||||||
break;
|
break;
|
||||||
case 9:
|
case 9:
|
||||||
*RSPInfo.DPC_END_REG = m_GPR[m_OpCode.rt].UW;
|
*m_DPC_END_REG = m_GPR[m_OpCode.rt].UW;
|
||||||
RDP_LogDlist();
|
RDP_LogDlist();
|
||||||
if (RSPInfo.ProcessRdpList != NULL)
|
if (ProcessRdpList != nullptr)
|
||||||
{
|
{
|
||||||
RSPInfo.ProcessRdpList();
|
ProcessRdpList();
|
||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
case 10: *RSPInfo.DPC_CURRENT_REG = m_GPR[m_OpCode.rt].UW; break;
|
case 10: *m_DPC_CURRENT_REG = m_GPR[m_OpCode.rt].UW; break;
|
||||||
case 11:
|
case 11:
|
||||||
if ((m_GPR[m_OpCode.rt].W & DPC_CLR_XBUS_DMEM_DMA) != 0)
|
if ((m_GPR[m_OpCode.rt].W & DPC_CLR_XBUS_DMEM_DMA) != 0)
|
||||||
{
|
{
|
||||||
*RSPInfo.DPC_STATUS_REG &= ~DPC_STATUS_XBUS_DMEM_DMA;
|
*m_DPC_STATUS_REG &= ~DPC_STATUS_XBUS_DMEM_DMA;
|
||||||
}
|
}
|
||||||
if ((m_GPR[m_OpCode.rt].W & DPC_SET_XBUS_DMEM_DMA) != 0)
|
if ((m_GPR[m_OpCode.rt].W & DPC_SET_XBUS_DMEM_DMA) != 0)
|
||||||
{
|
{
|
||||||
*RSPInfo.DPC_STATUS_REG |= DPC_STATUS_XBUS_DMEM_DMA;
|
*m_DPC_STATUS_REG |= DPC_STATUS_XBUS_DMEM_DMA;
|
||||||
}
|
}
|
||||||
if ((m_GPR[m_OpCode.rt].W & DPC_CLR_FREEZE) != 0)
|
if ((m_GPR[m_OpCode.rt].W & DPC_CLR_FREEZE) != 0)
|
||||||
{
|
{
|
||||||
*RSPInfo.DPC_STATUS_REG &= ~DPC_STATUS_FREEZE;
|
*m_DPC_STATUS_REG &= ~DPC_STATUS_FREEZE;
|
||||||
}
|
}
|
||||||
if ((m_GPR[m_OpCode.rt].W & DPC_SET_FREEZE) != 0)
|
if ((m_GPR[m_OpCode.rt].W & DPC_SET_FREEZE) != 0)
|
||||||
{
|
{
|
||||||
*RSPInfo.DPC_STATUS_REG |= DPC_STATUS_FREEZE;
|
*m_DPC_STATUS_REG |= DPC_STATUS_FREEZE;
|
||||||
}
|
}
|
||||||
if ((m_GPR[m_OpCode.rt].W & DPC_CLR_FLUSH) != 0)
|
if ((m_GPR[m_OpCode.rt].W & DPC_CLR_FLUSH) != 0)
|
||||||
{
|
{
|
||||||
*RSPInfo.DPC_STATUS_REG &= ~DPC_STATUS_FLUSH;
|
*m_DPC_STATUS_REG &= ~DPC_STATUS_FLUSH;
|
||||||
}
|
}
|
||||||
if ((m_GPR[m_OpCode.rt].W & DPC_SET_FLUSH) != 0)
|
if ((m_GPR[m_OpCode.rt].W & DPC_SET_FLUSH) != 0)
|
||||||
{
|
{
|
||||||
*RSPInfo.DPC_STATUS_REG |= DPC_STATUS_FLUSH;
|
*m_DPC_STATUS_REG |= DPC_STATUS_FLUSH;
|
||||||
}
|
}
|
||||||
if ((m_GPR[m_OpCode.rt].W & DPC_CLR_TMEM_CTR) != 0)
|
if ((m_GPR[m_OpCode.rt].W & DPC_CLR_TMEM_CTR) != 0)
|
||||||
{ /* DisplayError("RSP: DPC_STATUS_REG: DPC_CLR_TMEM_CTR"); */
|
{ /* DisplayError("RSP: DPC_STATUS_REG: DPC_CLR_TMEM_CTR"); */
|
||||||
|
@ -1747,7 +1760,7 @@ void RSPOp::Vector_VNOOP(void)
|
||||||
void RSPOp::LBV(void)
|
void RSPOp::LBV(void)
|
||||||
{
|
{
|
||||||
uint32_t Address = (uint32_t)(m_GPR[m_OpCode.base].W + (m_OpCode.voffset << 0)) & 0xFFF;
|
uint32_t Address = (uint32_t)(m_GPR[m_OpCode.base].W + (m_OpCode.voffset << 0)) & 0xFFF;
|
||||||
m_Vect[m_OpCode.vt].u8((uint8_t)(15 - m_OpCode.del)) = *(RSPInfo.DMEM + (Address ^ 3));
|
m_Vect[m_OpCode.vt].u8((uint8_t)(15 - m_OpCode.del)) = *(m_DMEM + (Address ^ 3));
|
||||||
}
|
}
|
||||||
|
|
||||||
void RSPOp::LSV(void)
|
void RSPOp::LSV(void)
|
||||||
|
@ -1756,7 +1769,7 @@ void RSPOp::LSV(void)
|
||||||
uint8_t Length = std::min((uint8_t)2, (uint8_t)(16 - m_OpCode.del));
|
uint8_t Length = std::min((uint8_t)2, (uint8_t)(16 - m_OpCode.del));
|
||||||
for (uint8_t i = m_OpCode.del, n = (uint8_t)(Length + m_OpCode.del); i < n; i++, Address++)
|
for (uint8_t i = m_OpCode.del, n = (uint8_t)(Length + m_OpCode.del); i < n; i++, Address++)
|
||||||
{
|
{
|
||||||
m_Vect[m_OpCode.vt].u8(15 - i) = *(RSPInfo.DMEM + ((Address ^ 3) & 0xFFF));
|
m_Vect[m_OpCode.vt].u8(15 - i) = *(m_DMEM + ((Address ^ 3) & 0xFFF));
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -1766,7 +1779,7 @@ void RSPOp::LLV(void)
|
||||||
uint8_t Length = std::min((uint8_t)4, (uint8_t)(16 - m_OpCode.del));
|
uint8_t Length = std::min((uint8_t)4, (uint8_t)(16 - m_OpCode.del));
|
||||||
for (uint8_t i = m_OpCode.del, n = (uint8_t)(Length + m_OpCode.del); i < n; i++, Address++)
|
for (uint8_t i = m_OpCode.del, n = (uint8_t)(Length + m_OpCode.del); i < n; i++, Address++)
|
||||||
{
|
{
|
||||||
m_Vect[m_OpCode.vt].u8(15 - i) = *(RSPInfo.DMEM + ((Address ^ 3) & 0xFFF));
|
m_Vect[m_OpCode.vt].u8(15 - i) = *(m_DMEM + ((Address ^ 3) & 0xFFF));
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -1776,7 +1789,7 @@ void RSPOp::LDV(void)
|
||||||
uint8_t Length = std::min((uint8_t)8, (uint8_t)(16 - m_OpCode.del));
|
uint8_t Length = std::min((uint8_t)8, (uint8_t)(16 - m_OpCode.del));
|
||||||
for (uint8_t i = m_OpCode.del, n = (uint8_t)(Length + m_OpCode.del); i < n; i++, Address++)
|
for (uint8_t i = m_OpCode.del, n = (uint8_t)(Length + m_OpCode.del); i < n; i++, Address++)
|
||||||
{
|
{
|
||||||
m_Vect[m_OpCode.vt].u8(15 - i) = *(RSPInfo.DMEM + ((Address ^ 3) & 0xFFF));
|
m_Vect[m_OpCode.vt].u8(15 - i) = *(m_DMEM + ((Address ^ 3) & 0xFFF));
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -1786,7 +1799,7 @@ void RSPOp::LQV(void)
|
||||||
uint8_t Length = std::min((uint8_t)(((Address + 0x10) & ~0xF) - Address), (uint8_t)(16 - m_OpCode.del));
|
uint8_t Length = std::min((uint8_t)(((Address + 0x10) & ~0xF) - Address), (uint8_t)(16 - m_OpCode.del));
|
||||||
for (uint8_t i = m_OpCode.del, n = (uint8_t)(Length + m_OpCode.del); i < n; i++, Address++)
|
for (uint8_t i = m_OpCode.del, n = (uint8_t)(Length + m_OpCode.del); i < n; i++, Address++)
|
||||||
{
|
{
|
||||||
m_Vect[m_OpCode.vt].u8(15 - i) = *(RSPInfo.DMEM + (Address ^ 3));
|
m_Vect[m_OpCode.vt].u8(15 - i) = *(m_DMEM + (Address ^ 3));
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -1797,7 +1810,7 @@ void RSPOp::LRV(void)
|
||||||
Address &= 0xFF0;
|
Address &= 0xFF0;
|
||||||
for (uint8_t i = Offset; i < 16; i++, Address++)
|
for (uint8_t i = Offset; i < 16; i++, Address++)
|
||||||
{
|
{
|
||||||
m_Vect[m_OpCode.vt].u8(15 - i) = *(RSPInfo.DMEM + ((Address ^ 3) & 0xFFF));
|
m_Vect[m_OpCode.vt].u8(15 - i) = *(m_DMEM + ((Address ^ 3) & 0xFFF));
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -1809,7 +1822,7 @@ void RSPOp::LPV(void)
|
||||||
|
|
||||||
for (uint8_t i = 0; i < 8; i++)
|
for (uint8_t i = 0; i < 8; i++)
|
||||||
{
|
{
|
||||||
m_Vect[m_OpCode.vt].u16(7 - i) = *(RSPInfo.DMEM + ((Address + ((Offset + i) & 0xF) ^ 3) & 0xFFF)) << 8;
|
m_Vect[m_OpCode.vt].u16(7 - i) = *(m_DMEM + ((Address + ((Offset + i) & 0xF) ^ 3) & 0xFFF)) << 8;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -1821,7 +1834,7 @@ void RSPOp::LUV(void)
|
||||||
|
|
||||||
for (uint8_t i = 0; i < 8; i++)
|
for (uint8_t i = 0; i < 8; i++)
|
||||||
{
|
{
|
||||||
m_Vect[m_OpCode.vt].s16(7 - i) = *(RSPInfo.DMEM + ((Address + ((Offset + i) & 0xF) ^ 3) & 0xFFF)) << 7;
|
m_Vect[m_OpCode.vt].s16(7 - i) = *(m_DMEM + ((Address + ((Offset + i) & 0xF) ^ 3) & 0xFFF)) << 7;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -1833,7 +1846,7 @@ void RSPOp::LHV(void)
|
||||||
|
|
||||||
for (uint8_t i = 0; i < 8; i++)
|
for (uint8_t i = 0; i < 8; i++)
|
||||||
{
|
{
|
||||||
m_Vect[m_OpCode.vt].s16(7 - i) = *(RSPInfo.DMEM + ((Address + ((Offset + (i << 1)) & 0xF) ^ 3) & 0xFFF)) << 7;
|
m_Vect[m_OpCode.vt].s16(7 - i) = *(m_DMEM + ((Address + ((Offset + (i << 1)) & 0xF) ^ 3) & 0xFFF)) << 7;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -1847,8 +1860,8 @@ void RSPOp::LFV(void)
|
||||||
RSPVector Temp;
|
RSPVector Temp;
|
||||||
for (uint8_t i = 0; i < 4; i++)
|
for (uint8_t i = 0; i < 4; i++)
|
||||||
{
|
{
|
||||||
Temp.s16(i) = *(RSPInfo.DMEM + ((Address + ((Offset + (i << 2)) & 0xF) ^ 3) & 0xFFF)) << 7;
|
Temp.s16(i) = *(m_DMEM + ((Address + ((Offset + (i << 2)) & 0xF) ^ 3) & 0xFFF)) << 7;
|
||||||
Temp.s16(i + 4) = *(RSPInfo.DMEM + ((Address + ((Offset + (i << 2) + 8) & 0xF) ^ 3) & 0xFFF)) << 7;
|
Temp.s16(i + 4) = *(m_DMEM + ((Address + ((Offset + (i << 2) + 8) & 0xF) ^ 3) & 0xFFF)) << 7;
|
||||||
}
|
}
|
||||||
|
|
||||||
for (uint8_t i = m_OpCode.del; i < Length; i++)
|
for (uint8_t i = m_OpCode.del; i < Length; i++)
|
||||||
|
@ -1870,12 +1883,12 @@ void RSPOp::LTV(void)
|
||||||
for (uint8_t i = 0; i < 8; i++)
|
for (uint8_t i = 0; i < 8; i++)
|
||||||
{
|
{
|
||||||
uint8_t del = (((m_OpCode.del >> 1) + i) & 7) + (m_OpCode.rt & ~7);
|
uint8_t del = (((m_OpCode.del >> 1) + i) & 7) + (m_OpCode.rt & ~7);
|
||||||
m_Vect[del].s8(15 - (i * 2 + 0)) = *(RSPInfo.DMEM + ((Address++ ^ 3) & 0xFFF));
|
m_Vect[del].s8(15 - (i * 2 + 0)) = *(m_DMEM + ((Address++ ^ 3) & 0xFFF));
|
||||||
if (Address == End)
|
if (Address == End)
|
||||||
{
|
{
|
||||||
Address = Start;
|
Address = Start;
|
||||||
}
|
}
|
||||||
m_Vect[del].s8(15 - (i * 2 + 1)) = *(RSPInfo.DMEM + ((Address++ ^ 3) & 0xFFF));
|
m_Vect[del].s8(15 - (i * 2 + 1)) = *(m_DMEM + ((Address++ ^ 3) & 0xFFF));
|
||||||
if (Address == End)
|
if (Address == End)
|
||||||
{
|
{
|
||||||
Address = Start;
|
Address = Start;
|
||||||
|
@ -1888,7 +1901,7 @@ void RSPOp::LTV(void)
|
||||||
void RSPOp::SBV(void)
|
void RSPOp::SBV(void)
|
||||||
{
|
{
|
||||||
uint32_t Address = (uint32_t)(m_GPR[m_OpCode.base].W + (m_OpCode.voffset << 0)) & 0xFFF;
|
uint32_t Address = (uint32_t)(m_GPR[m_OpCode.base].W + (m_OpCode.voffset << 0)) & 0xFFF;
|
||||||
*(RSPInfo.DMEM + ((Address ^ 3) & 0xFFF)) = m_Vect[m_OpCode.vt].u8((uint8_t)(15 - m_OpCode.del));
|
*(m_DMEM + ((Address ^ 3) & 0xFFF)) = m_Vect[m_OpCode.vt].u8((uint8_t)(15 - m_OpCode.del));
|
||||||
}
|
}
|
||||||
|
|
||||||
void RSPOp::SSV(void)
|
void RSPOp::SSV(void)
|
||||||
|
@ -1896,7 +1909,7 @@ void RSPOp::SSV(void)
|
||||||
uint32_t Address = (uint32_t)(m_GPR[m_OpCode.base].W + (m_OpCode.voffset << 1)) & 0xFFF;
|
uint32_t Address = (uint32_t)(m_GPR[m_OpCode.base].W + (m_OpCode.voffset << 1)) & 0xFFF;
|
||||||
for (uint8_t i = m_OpCode.del, n = (uint8_t)(2 + m_OpCode.del); i < n; i++, Address++)
|
for (uint8_t i = m_OpCode.del, n = (uint8_t)(2 + m_OpCode.del); i < n; i++, Address++)
|
||||||
{
|
{
|
||||||
*(RSPInfo.DMEM + ((Address ^ 3) & 0xFFF)) = m_Vect[m_OpCode.vt].u8(15 - (i & 0xF));
|
*(m_DMEM + ((Address ^ 3) & 0xFFF)) = m_Vect[m_OpCode.vt].u8(15 - (i & 0xF));
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -1905,7 +1918,7 @@ void RSPOp::SLV(void)
|
||||||
uint32_t Address = (uint32_t)(m_GPR[m_OpCode.base].W + (m_OpCode.voffset << 2)) & 0xFFF;
|
uint32_t Address = (uint32_t)(m_GPR[m_OpCode.base].W + (m_OpCode.voffset << 2)) & 0xFFF;
|
||||||
for (uint8_t i = m_OpCode.del, n = (uint8_t)(4 + m_OpCode.del); i < n; i++, Address++)
|
for (uint8_t i = m_OpCode.del, n = (uint8_t)(4 + m_OpCode.del); i < n; i++, Address++)
|
||||||
{
|
{
|
||||||
*(RSPInfo.DMEM + ((Address ^ 3) & 0xFFF)) = m_Vect[m_OpCode.vt].u8(15 - (i & 0xF));
|
*(m_DMEM + ((Address ^ 3) & 0xFFF)) = m_Vect[m_OpCode.vt].u8(15 - (i & 0xF));
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -1914,7 +1927,7 @@ void RSPOp::SDV(void)
|
||||||
uint32_t Address = (uint32_t)(m_GPR[m_OpCode.base].W + (m_OpCode.voffset << 3)) & 0xFFF;
|
uint32_t Address = (uint32_t)(m_GPR[m_OpCode.base].W + (m_OpCode.voffset << 3)) & 0xFFF;
|
||||||
for (uint8_t i = m_OpCode.del; i < (8 + m_OpCode.del); i++, Address++)
|
for (uint8_t i = m_OpCode.del; i < (8 + m_OpCode.del); i++, Address++)
|
||||||
{
|
{
|
||||||
*(RSPInfo.DMEM + ((Address ^ 3) & 0xFFF)) = m_Vect[m_OpCode.vt].u8(15 - (i & 0xF));
|
*(m_DMEM + ((Address ^ 3) & 0xFFF)) = m_Vect[m_OpCode.vt].u8(15 - (i & 0xF));
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -1924,7 +1937,7 @@ void RSPOp::SQV(void)
|
||||||
uint8_t Length = (uint8_t)(((Address + 0x10) & ~0xF) - Address);
|
uint8_t Length = (uint8_t)(((Address + 0x10) & ~0xF) - Address);
|
||||||
for (uint8_t i = m_OpCode.del; i < (Length + m_OpCode.del); i++, Address++)
|
for (uint8_t i = m_OpCode.del; i < (Length + m_OpCode.del); i++, Address++)
|
||||||
{
|
{
|
||||||
*(RSPInfo.DMEM + ((Address ^ 3) & 0xFFF)) = m_Vect[m_OpCode.vt].u8(15 - (i & 0xF));
|
*(m_DMEM + ((Address ^ 3) & 0xFFF)) = m_Vect[m_OpCode.vt].u8(15 - (i & 0xF));
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -1936,7 +1949,7 @@ void RSPOp::SRV(void)
|
||||||
Address &= 0xFF0;
|
Address &= 0xFF0;
|
||||||
for (uint8_t i = m_OpCode.del, n = (uint8_t)(Length + m_OpCode.del); i < n; i++, Address++)
|
for (uint8_t i = m_OpCode.del, n = (uint8_t)(Length + m_OpCode.del); i < n; i++, Address++)
|
||||||
{
|
{
|
||||||
*(RSPInfo.DMEM + ((Address ^ 3) & 0xFFF)) = m_Vect[m_OpCode.vt].u8(15 - ((i + Offset) & 0xF));
|
*(m_DMEM + ((Address ^ 3) & 0xFFF)) = m_Vect[m_OpCode.vt].u8(15 - ((i + Offset) & 0xF));
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -1947,11 +1960,11 @@ void RSPOp::SPV(void)
|
||||||
{
|
{
|
||||||
if (((i)&0xF) < 8)
|
if (((i)&0xF) < 8)
|
||||||
{
|
{
|
||||||
*(RSPInfo.DMEM + ((Address ^ 3) & 0xFFF)) = m_Vect[m_OpCode.vt].u8(15 - ((i & 0xF) << 1));
|
*(m_DMEM + ((Address ^ 3) & 0xFFF)) = m_Vect[m_OpCode.vt].u8(15 - ((i & 0xF) << 1));
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
*(RSPInfo.DMEM + ((Address ^ 3) & 0xFFF)) = (m_Vect[m_OpCode.vt].u8(15 - ((i & 0x7) << 1)) << 1) + (m_Vect[m_OpCode.vt].u8(14 - ((i & 0x7) << 1)) >> 7);
|
*(m_DMEM + ((Address ^ 3) & 0xFFF)) = (m_Vect[m_OpCode.vt].u8(15 - ((i & 0x7) << 1)) << 1) + (m_Vect[m_OpCode.vt].u8(14 - ((i & 0x7) << 1)) >> 7);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
@ -1963,11 +1976,11 @@ void RSPOp::SUV(void)
|
||||||
{
|
{
|
||||||
if (((Count)&0xF) < 8)
|
if (((Count)&0xF) < 8)
|
||||||
{
|
{
|
||||||
*(RSPInfo.DMEM + ((Address ^ 3) & 0xFFF)) = ((m_Vect[m_OpCode.vt].u8(15 - ((Count & 0x7) << 1)) << 1) + (m_Vect[m_OpCode.vt].u8(14 - ((Count & 0x7) << 1)) >> 7)) & 0xFF;
|
*(m_DMEM + ((Address ^ 3) & 0xFFF)) = ((m_Vect[m_OpCode.vt].u8(15 - ((Count & 0x7) << 1)) << 1) + (m_Vect[m_OpCode.vt].u8(14 - ((Count & 0x7) << 1)) >> 7)) & 0xFF;
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
*(RSPInfo.DMEM + ((Address ^ 3) & 0xFFF)) = m_Vect[m_OpCode.vt].u8(15 - ((Count & 0x7) << 1));
|
*(m_DMEM + ((Address ^ 3) & 0xFFF)) = m_Vect[m_OpCode.vt].u8(15 - ((Count & 0x7) << 1));
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
@ -1980,7 +1993,7 @@ void RSPOp::SHV(void)
|
||||||
for (uint32_t i = 0; i < 16; i += 2)
|
for (uint32_t i = 0; i < 16; i += 2)
|
||||||
{
|
{
|
||||||
uint8_t Value = (m_Vect[m_OpCode.vt].u8(15 - ((m_OpCode.del + i) & 15)) << 1) | (m_Vect[m_OpCode.vt].u8(15 - ((m_OpCode.del + i + 1) & 15)) >> 7);
|
uint8_t Value = (m_Vect[m_OpCode.vt].u8(15 - ((m_OpCode.del + i) & 15)) << 1) | (m_Vect[m_OpCode.vt].u8(15 - ((m_OpCode.del + i + 1) & 15)) >> 7);
|
||||||
*(RSPInfo.DMEM + ((Address + (Offset + i & 15) ^ 3) & 0xFFF)) = Value;
|
*(m_DMEM + ((Address + (Offset + i & 15) ^ 3) & 0xFFF)) = Value;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -1994,52 +2007,52 @@ void RSPOp::SFV(void)
|
||||||
{
|
{
|
||||||
case 0:
|
case 0:
|
||||||
case 15:
|
case 15:
|
||||||
*(RSPInfo.DMEM + (((Address + Offset) ^ 3) & 0xFFF)) = (m_Vect[m_OpCode.vt].u16(7) >> 7) & 0xFF;
|
*(m_DMEM + (((Address + Offset) ^ 3) & 0xFFF)) = (m_Vect[m_OpCode.vt].u16(7) >> 7) & 0xFF;
|
||||||
*(RSPInfo.DMEM + (((Address + ((Offset + 4) & 0xF)) ^ 3) & 0xFFF)) = (m_Vect[m_OpCode.vt].u16(6) >> 7) & 0xFF;
|
*(m_DMEM + (((Address + ((Offset + 4) & 0xF)) ^ 3) & 0xFFF)) = (m_Vect[m_OpCode.vt].u16(6) >> 7) & 0xFF;
|
||||||
*(RSPInfo.DMEM + (((Address + ((Offset + 8) & 0xF)) ^ 3) & 0xFFF)) = (m_Vect[m_OpCode.vt].u16(5) >> 7) & 0xFF;
|
*(m_DMEM + (((Address + ((Offset + 8) & 0xF)) ^ 3) & 0xFFF)) = (m_Vect[m_OpCode.vt].u16(5) >> 7) & 0xFF;
|
||||||
*(RSPInfo.DMEM + (((Address + ((Offset + 12) & 0xF)) ^ 3) & 0xFFF)) = (m_Vect[m_OpCode.vt].u16(4) >> 7) & 0xFF;
|
*(m_DMEM + (((Address + ((Offset + 12) & 0xF)) ^ 3) & 0xFFF)) = (m_Vect[m_OpCode.vt].u16(4) >> 7) & 0xFF;
|
||||||
break;
|
break;
|
||||||
case 1:
|
case 1:
|
||||||
*(RSPInfo.DMEM + (((Address + Offset) ^ 3) & 0xFFF)) = (m_Vect[m_OpCode.vt].u16(1) >> 7) & 0xFF;
|
*(m_DMEM + (((Address + Offset) ^ 3) & 0xFFF)) = (m_Vect[m_OpCode.vt].u16(1) >> 7) & 0xFF;
|
||||||
*(RSPInfo.DMEM + (((Address + ((Offset + 4) & 0xF)) ^ 3) & 0xFFF)) = (m_Vect[m_OpCode.vt].u16(0) >> 7) & 0xFF;
|
*(m_DMEM + (((Address + ((Offset + 4) & 0xF)) ^ 3) & 0xFFF)) = (m_Vect[m_OpCode.vt].u16(0) >> 7) & 0xFF;
|
||||||
*(RSPInfo.DMEM + (((Address + ((Offset + 8) & 0xF)) ^ 3) & 0xFFF)) = (m_Vect[m_OpCode.vt].u16(3) >> 7) & 0xFF;
|
*(m_DMEM + (((Address + ((Offset + 8) & 0xF)) ^ 3) & 0xFFF)) = (m_Vect[m_OpCode.vt].u16(3) >> 7) & 0xFF;
|
||||||
*(RSPInfo.DMEM + (((Address + ((Offset + 12) & 0xF)) ^ 3) & 0xFFF)) = (m_Vect[m_OpCode.vt].u16(2) >> 7) & 0xFF;
|
*(m_DMEM + (((Address + ((Offset + 12) & 0xF)) ^ 3) & 0xFFF)) = (m_Vect[m_OpCode.vt].u16(2) >> 7) & 0xFF;
|
||||||
break;
|
break;
|
||||||
case 4:
|
case 4:
|
||||||
*(RSPInfo.DMEM + (((Address + Offset) ^ 3) & 0xFFF)) = (m_Vect[m_OpCode.vt].u16(6) >> 7) & 0xFF;
|
*(m_DMEM + (((Address + Offset) ^ 3) & 0xFFF)) = (m_Vect[m_OpCode.vt].u16(6) >> 7) & 0xFF;
|
||||||
*(RSPInfo.DMEM + (((Address + ((Offset + 4) & 0xF)) ^ 3) & 0xFFF)) = (m_Vect[m_OpCode.vt].u16(5) >> 7) & 0xFF;
|
*(m_DMEM + (((Address + ((Offset + 4) & 0xF)) ^ 3) & 0xFFF)) = (m_Vect[m_OpCode.vt].u16(5) >> 7) & 0xFF;
|
||||||
*(RSPInfo.DMEM + (((Address + ((Offset + 8) & 0xF)) ^ 3) & 0xFFF)) = (m_Vect[m_OpCode.vt].u16(4) >> 7) & 0xFF;
|
*(m_DMEM + (((Address + ((Offset + 8) & 0xF)) ^ 3) & 0xFFF)) = (m_Vect[m_OpCode.vt].u16(4) >> 7) & 0xFF;
|
||||||
*(RSPInfo.DMEM + (((Address + ((Offset + 12) & 0xF)) ^ 3) & 0xFFF)) = (m_Vect[m_OpCode.vt].u16(7) >> 7) & 0xFF;
|
*(m_DMEM + (((Address + ((Offset + 12) & 0xF)) ^ 3) & 0xFFF)) = (m_Vect[m_OpCode.vt].u16(7) >> 7) & 0xFF;
|
||||||
break;
|
break;
|
||||||
case 5:
|
case 5:
|
||||||
*(RSPInfo.DMEM + (((Address + Offset) ^ 3) & 0xFFF)) = (m_Vect[m_OpCode.vt].u16(0) >> 7) & 0xFF;
|
*(m_DMEM + (((Address + Offset) ^ 3) & 0xFFF)) = (m_Vect[m_OpCode.vt].u16(0) >> 7) & 0xFF;
|
||||||
*(RSPInfo.DMEM + (((Address + ((Offset + 4) & 0xF)) ^ 3) & 0xFFF)) = (m_Vect[m_OpCode.vt].u16(3) >> 7) & 0xFF;
|
*(m_DMEM + (((Address + ((Offset + 4) & 0xF)) ^ 3) & 0xFFF)) = (m_Vect[m_OpCode.vt].u16(3) >> 7) & 0xFF;
|
||||||
*(RSPInfo.DMEM + (((Address + ((Offset + 8) & 0xF)) ^ 3) & 0xFFF)) = (m_Vect[m_OpCode.vt].u16(2) >> 7) & 0xFF;
|
*(m_DMEM + (((Address + ((Offset + 8) & 0xF)) ^ 3) & 0xFFF)) = (m_Vect[m_OpCode.vt].u16(2) >> 7) & 0xFF;
|
||||||
*(RSPInfo.DMEM + (((Address + ((Offset + 12) & 0xF)) ^ 3) & 0xFFF)) = (m_Vect[m_OpCode.vt].u16(1) >> 7) & 0xFF;
|
*(m_DMEM + (((Address + ((Offset + 12) & 0xF)) ^ 3) & 0xFFF)) = (m_Vect[m_OpCode.vt].u16(1) >> 7) & 0xFF;
|
||||||
break;
|
break;
|
||||||
case 8:
|
case 8:
|
||||||
*(RSPInfo.DMEM + (((Address + Offset) ^ 3) & 0xFFF)) = (m_Vect[m_OpCode.vt].u16(3) >> 7) & 0xFF;
|
*(m_DMEM + (((Address + Offset) ^ 3) & 0xFFF)) = (m_Vect[m_OpCode.vt].u16(3) >> 7) & 0xFF;
|
||||||
*(RSPInfo.DMEM + (((Address + ((Offset + 4) & 0xF)) ^ 3) & 0xFFF)) = (m_Vect[m_OpCode.vt].u16(2) >> 7) & 0xFF;
|
*(m_DMEM + (((Address + ((Offset + 4) & 0xF)) ^ 3) & 0xFFF)) = (m_Vect[m_OpCode.vt].u16(2) >> 7) & 0xFF;
|
||||||
*(RSPInfo.DMEM + (((Address + ((Offset + 8) & 0xF)) ^ 3) & 0xFFF)) = (m_Vect[m_OpCode.vt].u16(1) >> 7) & 0xFF;
|
*(m_DMEM + (((Address + ((Offset + 8) & 0xF)) ^ 3) & 0xFFF)) = (m_Vect[m_OpCode.vt].u16(1) >> 7) & 0xFF;
|
||||||
*(RSPInfo.DMEM + (((Address + ((Offset + 12) & 0xF)) ^ 3) & 0xFFF)) = (m_Vect[m_OpCode.vt].u16(0) >> 7) & 0xFF;
|
*(m_DMEM + (((Address + ((Offset + 12) & 0xF)) ^ 3) & 0xFFF)) = (m_Vect[m_OpCode.vt].u16(0) >> 7) & 0xFF;
|
||||||
break;
|
break;
|
||||||
case 11:
|
case 11:
|
||||||
*(RSPInfo.DMEM + (((Address + Offset) ^ 3) & 0xFFF)) = (m_Vect[m_OpCode.vt].u16(4) >> 7) & 0xFF;
|
*(m_DMEM + (((Address + Offset) ^ 3) & 0xFFF)) = (m_Vect[m_OpCode.vt].u16(4) >> 7) & 0xFF;
|
||||||
*(RSPInfo.DMEM + (((Address + ((Offset + 4) & 0xF)) ^ 3) & 0xFFF)) = (m_Vect[m_OpCode.vt].u16(7) >> 7) & 0xFF;
|
*(m_DMEM + (((Address + ((Offset + 4) & 0xF)) ^ 3) & 0xFFF)) = (m_Vect[m_OpCode.vt].u16(7) >> 7) & 0xFF;
|
||||||
*(RSPInfo.DMEM + (((Address + ((Offset + 8) & 0xF)) ^ 3) & 0xFFF)) = (m_Vect[m_OpCode.vt].u16(6) >> 7) & 0xFF;
|
*(m_DMEM + (((Address + ((Offset + 8) & 0xF)) ^ 3) & 0xFFF)) = (m_Vect[m_OpCode.vt].u16(6) >> 7) & 0xFF;
|
||||||
*(RSPInfo.DMEM + (((Address + ((Offset + 12) & 0xF)) ^ 3) & 0xFFF)) = (m_Vect[m_OpCode.vt].u16(5) >> 7) & 0xFF;
|
*(m_DMEM + (((Address + ((Offset + 12) & 0xF)) ^ 3) & 0xFFF)) = (m_Vect[m_OpCode.vt].u16(5) >> 7) & 0xFF;
|
||||||
break;
|
break;
|
||||||
case 12:
|
case 12:
|
||||||
*(RSPInfo.DMEM + (((Address + Offset) ^ 3) & 0xFFF)) = (m_Vect[m_OpCode.vt].u16(2) >> 7) & 0xFF;
|
*(m_DMEM + (((Address + Offset) ^ 3) & 0xFFF)) = (m_Vect[m_OpCode.vt].u16(2) >> 7) & 0xFF;
|
||||||
*(RSPInfo.DMEM + (((Address + ((Offset + 4) & 0xF)) ^ 3) & 0xFFF)) = (m_Vect[m_OpCode.vt].u16(1) >> 7) & 0xFF;
|
*(m_DMEM + (((Address + ((Offset + 4) & 0xF)) ^ 3) & 0xFFF)) = (m_Vect[m_OpCode.vt].u16(1) >> 7) & 0xFF;
|
||||||
*(RSPInfo.DMEM + (((Address + ((Offset + 8) & 0xF)) ^ 3) & 0xFFF)) = (m_Vect[m_OpCode.vt].u16(0) >> 7) & 0xFF;
|
*(m_DMEM + (((Address + ((Offset + 8) & 0xF)) ^ 3) & 0xFFF)) = (m_Vect[m_OpCode.vt].u16(0) >> 7) & 0xFF;
|
||||||
*(RSPInfo.DMEM + (((Address + ((Offset + 12) & 0xF)) ^ 3) & 0xFFF)) = (m_Vect[m_OpCode.vt].u16(3) >> 7) & 0xFF;
|
*(m_DMEM + (((Address + ((Offset + 12) & 0xF)) ^ 3) & 0xFFF)) = (m_Vect[m_OpCode.vt].u16(3) >> 7) & 0xFF;
|
||||||
break;
|
break;
|
||||||
default:
|
default:
|
||||||
*(RSPInfo.DMEM + (((Address + Offset) ^ 3) & 0xFFF)) = 0;
|
*(m_DMEM + (((Address + Offset) ^ 3) & 0xFFF)) = 0;
|
||||||
*(RSPInfo.DMEM + (((Address + ((Offset + 4) & 0xF)) ^ 3) & 0xFFF)) = 0;
|
*(m_DMEM + (((Address + ((Offset + 4) & 0xF)) ^ 3) & 0xFFF)) = 0;
|
||||||
*(RSPInfo.DMEM + (((Address + ((Offset + 8) & 0xF) & 0xFFF)) ^ 3)) = 0;
|
*(m_DMEM + (((Address + ((Offset + 8) & 0xF) & 0xFFF)) ^ 3)) = 0;
|
||||||
*(RSPInfo.DMEM + (((Address + ((Offset + 12) & 0xF) & 0xFFF)) ^ 3)) = 0;
|
*(m_DMEM + (((Address + ((Offset + 12) & 0xF) & 0xFFF)) ^ 3)) = 0;
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
@ -2053,8 +2066,8 @@ void RSPOp::STV(void)
|
||||||
for (uint32_t i = 0; i < 16; i += 2)
|
for (uint32_t i = 0; i < 16; i += 2)
|
||||||
{
|
{
|
||||||
uint8_t Del = (uint8_t)((m_OpCode.vt & ~7) + (i >> 1));
|
uint8_t Del = (uint8_t)((m_OpCode.vt & ~7) + (i >> 1));
|
||||||
*(RSPInfo.DMEM + (((Address + (Offset + i & 15) ^ 3)) & 0xFFF)) = m_Vect[Del].s8(15 - ((Element + i) & 15));
|
*(m_DMEM + (((Address + (Offset + i & 15) ^ 3)) & 0xFFF)) = m_Vect[Del].s8(15 - ((Element + i) & 15));
|
||||||
*(RSPInfo.DMEM + (((Address + (Offset + i + 1 & 15) ^ 3)) & 0xFFF)) = m_Vect[Del].s8(15 - ((Element + i + 1) & 15));
|
*(m_DMEM + (((Address + (Offset + i + 1 & 15) ^ 3)) & 0xFFF)) = m_Vect[Del].s8(15 - ((Element + i + 1) & 15));
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -2065,7 +2078,7 @@ void RSPOp::SWV(void)
|
||||||
Address &= 0xFF8;
|
Address &= 0xFF8;
|
||||||
for (uint8_t i = m_OpCode.del, n = (uint8_t)(16 + m_OpCode.del); i < n; i++, Offset++)
|
for (uint8_t i = m_OpCode.del, n = (uint8_t)(16 + m_OpCode.del); i < n; i++, Offset++)
|
||||||
{
|
{
|
||||||
*(RSPInfo.DMEM + ((Address + (Offset & 0xF)) ^ 3)) = m_Vect[m_OpCode.vt].s8(15 - (i & 0xF));
|
*(m_DMEM + ((Address + (Offset & 0xF)) ^ 3)) = m_Vect[m_OpCode.vt].s8(15 - (i & 0xF));
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -2081,5 +2094,5 @@ void RSPOp::UnknownOpcode(void)
|
||||||
|
|
||||||
uint32_t RSPOp::BranchIf(bool Condition)
|
uint32_t RSPOp::BranchIf(bool Condition)
|
||||||
{
|
{
|
||||||
return (*PrgCount + 4 + (Condition ? ((short)m_OpCode.offset << 2) : 4)) & 0xFFC;
|
return (*m_SP_PC_REG + 4 + (Condition ? ((short)m_OpCode.offset << 2) : 4)) & 0xFFC;
|
||||||
}
|
}
|
|
@ -184,6 +184,18 @@ private:
|
||||||
CRSPSystem & m_System;
|
CRSPSystem & m_System;
|
||||||
RSPOpcode & m_OpCode;
|
RSPOpcode & m_OpCode;
|
||||||
CRSPRegisters & m_Reg;
|
CRSPRegisters & m_Reg;
|
||||||
|
uint32_t *& m_MI_INTR_REG;
|
||||||
|
uint32_t *& m_SP_PC_REG;
|
||||||
|
uint32_t *& m_SP_STATUS_REG;
|
||||||
|
uint32_t *& m_SP_DMA_FULL_REG;
|
||||||
|
uint32_t *& m_SP_DMA_BUSY_REG;
|
||||||
|
uint32_t *& m_SP_SEMAPHORE_REG;
|
||||||
|
uint32_t *& m_DPC_START_REG;
|
||||||
|
uint32_t *& m_DPC_END_REG;
|
||||||
|
uint32_t *& m_DPC_CURRENT_REG;
|
||||||
|
uint32_t *& m_DPC_STATUS_REG;
|
||||||
|
uint32_t *& m_DPC_CLOCK_REG;
|
||||||
|
uint8_t *& m_DMEM;
|
||||||
UWORD32 * m_GPR;
|
UWORD32 * m_GPR;
|
||||||
UDWORD * m_ACCUM;
|
UDWORD * m_ACCUM;
|
||||||
UWORD32 * m_Flags;
|
UWORD32 * m_Flags;
|
||||||
|
@ -191,4 +203,7 @@ private:
|
||||||
RSPFlag &VCOL, &VCOH;
|
RSPFlag &VCOL, &VCOH;
|
||||||
RSPFlag &VCCL, &VCCH;
|
RSPFlag &VCCL, &VCCH;
|
||||||
RSPFlag & VCE;
|
RSPFlag & VCE;
|
||||||
|
|
||||||
|
void (*&CheckInterrupts)(void);
|
||||||
|
void (*&ProcessRdpList)(void);
|
||||||
};
|
};
|
|
@ -8,13 +8,62 @@
|
||||||
CRSPSystem RSPSystem;
|
CRSPSystem RSPSystem;
|
||||||
|
|
||||||
CRSPSystem::CRSPSystem() :
|
CRSPSystem::CRSPSystem() :
|
||||||
m_Op(*this)
|
m_Op(*this),
|
||||||
|
m_HEADER(nullptr),
|
||||||
|
m_RDRAM(nullptr),
|
||||||
|
m_DMEM(nullptr),
|
||||||
|
m_IMEM(nullptr),
|
||||||
|
m_MI_INTR_REG(nullptr),
|
||||||
|
m_SP_MEM_ADDR_REG(nullptr),
|
||||||
|
m_SP_DRAM_ADDR_REG(nullptr),
|
||||||
|
m_SP_RD_LEN_REG(nullptr),
|
||||||
|
m_SP_WR_LEN_REG(nullptr),
|
||||||
|
m_SP_STATUS_REG(nullptr),
|
||||||
|
m_SP_DMA_FULL_REG(nullptr),
|
||||||
|
m_SP_DMA_BUSY_REG(nullptr),
|
||||||
|
m_SP_PC_REG(nullptr),
|
||||||
|
m_SP_SEMAPHORE_REG(nullptr),
|
||||||
|
m_DPC_START_REG(nullptr),
|
||||||
|
m_DPC_END_REG(nullptr),
|
||||||
|
m_DPC_CURRENT_REG(nullptr),
|
||||||
|
m_DPC_STATUS_REG(nullptr),
|
||||||
|
m_DPC_CLOCK_REG(nullptr),
|
||||||
|
m_DPC_BUFBUSY_REG(nullptr),
|
||||||
|
m_DPC_PIPEBUSY_REG(nullptr),
|
||||||
|
m_DPC_TMEM_REG(nullptr),
|
||||||
|
CheckInterrupts(nullptr),
|
||||||
|
ProcessRdpList(nullptr)
|
||||||
{
|
{
|
||||||
}
|
}
|
||||||
|
|
||||||
void CRSPSystem::Reset()
|
void CRSPSystem::Reset(RSP_INFO & Info)
|
||||||
{
|
{
|
||||||
m_Reg.Reset();
|
m_Reg.Reset();
|
||||||
|
|
||||||
|
m_HEADER = Info.HEADER;
|
||||||
|
m_RDRAM = Info.RDRAM;
|
||||||
|
m_DMEM = Info.DMEM;
|
||||||
|
m_IMEM = Info.IMEM;
|
||||||
|
m_MI_INTR_REG = Info.MI_INTR_REG;
|
||||||
|
m_SP_MEM_ADDR_REG = Info.SP_MEM_ADDR_REG;
|
||||||
|
m_SP_DRAM_ADDR_REG = Info.SP_DRAM_ADDR_REG;
|
||||||
|
m_SP_RD_LEN_REG = Info.SP_RD_LEN_REG;
|
||||||
|
m_SP_WR_LEN_REG = Info.SP_WR_LEN_REG;
|
||||||
|
m_SP_STATUS_REG = Info.SP_STATUS_REG;
|
||||||
|
m_SP_DMA_FULL_REG = Info.SP_DMA_FULL_REG;
|
||||||
|
m_SP_DMA_BUSY_REG = Info.SP_DMA_BUSY_REG;
|
||||||
|
m_SP_PC_REG = Info.SP_PC_REG;
|
||||||
|
m_SP_SEMAPHORE_REG = Info.SP_SEMAPHORE_REG;
|
||||||
|
m_DPC_START_REG = Info.DPC_START_REG;
|
||||||
|
m_DPC_END_REG = Info.DPC_END_REG;
|
||||||
|
m_DPC_CURRENT_REG = Info.DPC_CURRENT_REG;
|
||||||
|
m_DPC_STATUS_REG = Info.DPC_STATUS_REG;
|
||||||
|
m_DPC_CLOCK_REG = Info.DPC_CLOCK_REG;
|
||||||
|
m_DPC_BUFBUSY_REG = Info.DPC_BUFBUSY_REG;
|
||||||
|
m_DPC_PIPEBUSY_REG = Info.DPC_PIPEBUSY_REG;
|
||||||
|
m_DPC_TMEM_REG = Info.DPC_TMEM_REG;
|
||||||
|
CheckInterrupts = Info.CheckInterrupts;
|
||||||
|
ProcessRdpList = Info.ProcessRdpList;
|
||||||
}
|
}
|
||||||
|
|
||||||
uint32_t CRSPSystem::RunInterpreterCPU(uint32_t Cycles)
|
uint32_t CRSPSystem::RunInterpreterCPU(uint32_t Cycles)
|
||||||
|
@ -27,37 +76,37 @@ uint32_t CRSPSystem::RunInterpreterCPU(uint32_t Cycles)
|
||||||
}
|
}
|
||||||
CycleCount = 0;
|
CycleCount = 0;
|
||||||
uint32_t & GprR0 = m_Reg.m_GPR[0].UW;
|
uint32_t & GprR0 = m_Reg.m_GPR[0].UW;
|
||||||
|
uint32_t & PrgCount = *m_SP_PC_REG;
|
||||||
while (RSP_Running)
|
while (RSP_Running)
|
||||||
{
|
{
|
||||||
if (g_RSPDebugger != nullptr)
|
if (g_RSPDebugger != nullptr)
|
||||||
{
|
{
|
||||||
g_RSPDebugger->BeforeExecuteOp();
|
g_RSPDebugger->BeforeExecuteOp();
|
||||||
}
|
}
|
||||||
m_OpCode.Value = *(uint32_t *)(RSPInfo.IMEM + (*PrgCount & 0xFFC));
|
m_OpCode.Value = *(uint32_t *)(RSPInfo.IMEM + (PrgCount & 0xFFC));
|
||||||
(m_Op.*(m_Op.Jump_Opcode[m_OpCode.op]))();
|
(m_Op.*(m_Op.Jump_Opcode[m_OpCode.op]))();
|
||||||
GprR0 = 0x00000000; // MIPS $zero hard-wired to 0
|
GprR0 = 0x00000000; // MIPS $zero hard-wired to 0
|
||||||
|
|
||||||
switch (RSP_NextInstruction)
|
switch (RSP_NextInstruction)
|
||||||
{
|
{
|
||||||
case RSPPIPELINE_NORMAL:
|
case RSPPIPELINE_NORMAL:
|
||||||
*PrgCount = (*PrgCount + 4) & 0xFFC;
|
PrgCount = (PrgCount + 4) & 0xFFC;
|
||||||
break;
|
break;
|
||||||
case RSPPIPELINE_DELAY_SLOT:
|
case RSPPIPELINE_DELAY_SLOT:
|
||||||
RSP_NextInstruction = RSPPIPELINE_JUMP;
|
RSP_NextInstruction = RSPPIPELINE_JUMP;
|
||||||
*PrgCount = (*PrgCount + 4) & 0xFFC;
|
PrgCount = (PrgCount + 4) & 0xFFC;
|
||||||
break;
|
break;
|
||||||
case RSPPIPELINE_JUMP:
|
case RSPPIPELINE_JUMP:
|
||||||
RSP_NextInstruction = RSPPIPELINE_NORMAL;
|
RSP_NextInstruction = RSPPIPELINE_NORMAL;
|
||||||
*PrgCount = RSP_JumpTo;
|
PrgCount = RSP_JumpTo;
|
||||||
break;
|
break;
|
||||||
case RSPPIPELINE_SINGLE_STEP:
|
case RSPPIPELINE_SINGLE_STEP:
|
||||||
*PrgCount = (*PrgCount + 4) & 0xFFC;
|
PrgCount = (PrgCount + 4) & 0xFFC;
|
||||||
RSP_NextInstruction = RSPPIPELINE_SINGLE_STEP_DONE;
|
RSP_NextInstruction = RSPPIPELINE_SINGLE_STEP_DONE;
|
||||||
break;
|
break;
|
||||||
case RSPPIPELINE_SINGLE_STEP_DONE:
|
case RSPPIPELINE_SINGLE_STEP_DONE:
|
||||||
*PrgCount = (*PrgCount + 4) & 0xFFC;
|
PrgCount = (PrgCount + 4) & 0xFFC;
|
||||||
*RSPInfo.SP_STATUS_REG |= SP_STATUS_HALT;
|
*m_SP_STATUS_REG |= SP_STATUS_HALT;
|
||||||
RSP_Running = false;
|
RSP_Running = false;
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
|
|
@ -1,4 +1,5 @@
|
||||||
#pragma once
|
#pragma once
|
||||||
|
#include <Project64-rsp-core/RSPInfo.h>
|
||||||
#include <Project64-rsp-core/cpu/RSPInterpreterOps.h>
|
#include <Project64-rsp-core/cpu/RSPInterpreterOps.h>
|
||||||
#include <Project64-rsp-core/cpu/RSPRegisters.h>
|
#include <Project64-rsp-core/cpu/RSPRegisters.h>
|
||||||
#include <Project64-rsp-core/cpu/RspTypes.h>
|
#include <Project64-rsp-core/cpu/RspTypes.h>
|
||||||
|
@ -15,7 +16,7 @@ class CRSPSystem
|
||||||
public:
|
public:
|
||||||
CRSPSystem();
|
CRSPSystem();
|
||||||
|
|
||||||
void Reset();
|
void Reset(RSP_INFO & Info);
|
||||||
|
|
||||||
uint32_t RunInterpreterCPU(uint32_t Cycles);
|
uint32_t RunInterpreterCPU(uint32_t Cycles);
|
||||||
|
|
||||||
|
@ -23,6 +24,30 @@ private:
|
||||||
CRSPRegisters m_Reg;
|
CRSPRegisters m_Reg;
|
||||||
RSPOp m_Op;
|
RSPOp m_Op;
|
||||||
RSPOpcode m_OpCode;
|
RSPOpcode m_OpCode;
|
||||||
|
uint8_t * m_HEADER;
|
||||||
|
uint8_t * m_RDRAM;
|
||||||
|
uint8_t * m_DMEM;
|
||||||
|
uint8_t * m_IMEM;
|
||||||
|
uint32_t * m_MI_INTR_REG;
|
||||||
|
uint32_t * m_SP_MEM_ADDR_REG;
|
||||||
|
uint32_t * m_SP_DRAM_ADDR_REG;
|
||||||
|
uint32_t * m_SP_RD_LEN_REG;
|
||||||
|
uint32_t * m_SP_WR_LEN_REG;
|
||||||
|
uint32_t * m_SP_STATUS_REG;
|
||||||
|
uint32_t * m_SP_DMA_FULL_REG;
|
||||||
|
uint32_t * m_SP_DMA_BUSY_REG;
|
||||||
|
uint32_t * m_SP_PC_REG;
|
||||||
|
uint32_t * m_SP_SEMAPHORE_REG;
|
||||||
|
uint32_t * m_DPC_START_REG;
|
||||||
|
uint32_t * m_DPC_END_REG;
|
||||||
|
uint32_t * m_DPC_CURRENT_REG;
|
||||||
|
uint32_t * m_DPC_STATUS_REG;
|
||||||
|
uint32_t * m_DPC_CLOCK_REG;
|
||||||
|
uint32_t * m_DPC_BUFBUSY_REG;
|
||||||
|
uint32_t * m_DPC_PIPEBUSY_REG;
|
||||||
|
uint32_t * m_DPC_TMEM_REG;
|
||||||
|
void (*CheckInterrupts)(void);
|
||||||
|
void (*ProcessRdpList)(void);
|
||||||
};
|
};
|
||||||
|
|
||||||
extern CRSPSystem RSPSystem;
|
extern CRSPSystem RSPSystem;
|
Loading…
Reference in New Issue