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RSP: have Compile_LW handle DMEM overflow better

This commit is contained in:
zilmar 2024-07-12 15:02:46 +09:30
parent e43d697476
commit 6e4852fc78
1 changed files with 6 additions and 4 deletions
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10
Source/Project64-rsp-core/Recompiler/RspRecompilerOps.cpp
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@ -924,9 +924,9 @@ void Compile_LW(void)
{ {
char Address[32]; char Address[32];
sprintf(Address, "DMEM + %Xh", Addr - 2); sprintf(Address, "DMEM + %Xh", Addr - 2);
MoveVariableToX86regHalf(RSPInfo.DMEM + Addr - 2, Address, x86_EAX); MoveVariableToX86regHalf(RSPInfo.DMEM + ((Addr - 2) & 0xFFF), Address, x86_EAX);
sprintf(Address, "DMEM + %Xh", Addr); sprintf(Address, "DMEM + %Xh", Addr);
MoveVariableToX86regHalf(RSPInfo.DMEM + Addr + 4, Address, x86_ECX); MoveVariableToX86regHalf(RSPInfo.DMEM + ((Addr + 4) & 0xFFF), Address, x86_ECX);
MoveX86regHalfToVariable(x86_EAX, &RSP_GPR[RSPOpC.rt].UHW[1], GPR_Name(RSPOpC.rt)); MoveX86regHalfToVariable(x86_EAX, &RSP_GPR[RSPOpC.rt].UHW[1], GPR_Name(RSPOpC.rt));
MoveX86regHalfToVariable(x86_ECX, &RSP_GPR[RSPOpC.rt].UHW[0], GPR_Name(RSPOpC.rt)); MoveX86regHalfToVariable(x86_ECX, &RSP_GPR[RSPOpC.rt].UHW[0], GPR_Name(RSPOpC.rt));
@ -942,8 +942,10 @@ void Compile_LW(void)
} }
MoveVariableToX86reg(&RSP_GPR[RSPOpC.base].UW, GPR_Name(RSPOpC.base), x86_EBX); MoveVariableToX86reg(&RSP_GPR[RSPOpC.base].UW, GPR_Name(RSPOpC.base), x86_EBX);
if (Offset != 0) AddConstToX86Reg(x86_EBX, Offset); if (Offset != 0)
{
AddConstToX86Reg(x86_EBX, Offset);
}
AndConstToX86Reg(x86_EBX, 0x0fff); AndConstToX86Reg(x86_EBX, 0x0fff);
TestConstToX86Reg(3, x86_EBX); TestConstToX86Reg(3, x86_EBX);
JneLabel32("Unaligned", 0); JneLabel32("Unaligned", 0);