Merge pull request #431 from lioncash/bool
Convert BOOL to bool where possible.
This commit is contained in:
commit
6db122ec30
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@ -219,7 +219,7 @@ void CCheats::ApplyCheats(CMipsMemory * MMU)
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const CODES & CodeEntry = m_Codes[CurrentCheat];
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for (size_t CurrentEntry = 0; CurrentEntry < CodeEntry.size();)
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{
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CurrentEntry += ApplyCheatEntry(MMU, CodeEntry,CurrentEntry,TRUE);
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CurrentEntry += ApplyCheatEntry(MMU, CodeEntry,CurrentEntry, true);
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}
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}
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}
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@ -335,7 +335,7 @@ bool CCheats::IsValid16BitCode (LPCSTR CheatString) const
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return true;
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}
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int CCheats::ApplyCheatEntry (CMipsMemory * MMU, const CODES & CodeEntry, int CurrentEntry, BOOL Execute )
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int CCheats::ApplyCheatEntry (CMipsMemory * MMU, const CODES & CodeEntry, int CurrentEntry, bool Execute )
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{
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if (CurrentEntry < 0 || CurrentEntry >= (int)CodeEntry.size())
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{
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@ -405,22 +405,22 @@ int CCheats::ApplyCheatEntry (CMipsMemory * MMU, const CODES & CodeEntry, int Cu
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case 0xD0000000: // Added by Witten (witten@pj64cheats.net)
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Address = 0x80000000 | (Code.Command & 0xFFFFFF);
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MMU->LB_VAddr(Address,bMemory);
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if (bMemory != Code.Value) { Execute = FALSE; }
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if (bMemory != Code.Value) { Execute = false; }
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return ApplyCheatEntry(MMU,CodeEntry,CurrentEntry + 1,Execute) + 1;
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case 0xD1000000: // Added by Witten (witten@pj64cheats.net)
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Address = 0x80000000 | (Code.Command & 0xFFFFFF);
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MMU->LH_VAddr(Address,wMemory);
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if (wMemory != Code.Value) { Execute = FALSE; }
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if (wMemory != Code.Value) { Execute = false; }
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return ApplyCheatEntry(MMU,CodeEntry,CurrentEntry + 1,Execute) + 1;
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case 0xD2000000: // Added by Witten (witten@pj64cheats.net)
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Address = 0x80000000 | (Code.Command & 0xFFFFFF);
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MMU->LB_VAddr(Address,bMemory);
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if (bMemory == Code.Value) { Execute = FALSE; }
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if (bMemory == Code.Value) { Execute = false; }
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return ApplyCheatEntry(MMU,CodeEntry,CurrentEntry + 1,Execute) + 1;
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case 0xD3000000: // Added by Witten (witten@pj64cheats.net)
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Address = 0x80000000 | (Code.Command & 0xFFFFFF);
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MMU->LH_VAddr(Address,wMemory);
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if (wMemory == Code.Value) { Execute = FALSE; }
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if (wMemory == Code.Value) { Execute = false; }
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return ApplyCheatEntry(MMU,CodeEntry,CurrentEntry + 1,Execute) + 1;
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// Xplorer64 (Author: Witten)
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@ -455,22 +455,22 @@ int CCheats::ApplyCheatEntry (CMipsMemory * MMU, const CODES & CodeEntry, int Cu
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case 0xB8000000:
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Address = 0x80000000 | (ConvertXP64Address(Code.Command) & 0xFFFFFF);
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MMU->LB_VAddr(Address,bMemory);
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if (bMemory != ConvertXP64Value(Code.Value)) { Execute = FALSE; }
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if (bMemory != ConvertXP64Value(Code.Value)) { Execute = false; }
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return ApplyCheatEntry(MMU,CodeEntry,CurrentEntry + 1,Execute) + 1;
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case 0xB9000000:
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Address = 0x80000000 | (ConvertXP64Address(Code.Command) & 0xFFFFFF);
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MMU->LH_VAddr(Address,wMemory);
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if (wMemory != ConvertXP64Value(Code.Value)) { Execute = FALSE; }
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if (wMemory != ConvertXP64Value(Code.Value)) { Execute = false; }
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return ApplyCheatEntry(MMU,CodeEntry,CurrentEntry + 1,Execute) + 1;
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case 0xBA000000:
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Address = 0x80000000 | (ConvertXP64Address(Code.Command) & 0xFFFFFF);
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MMU->LB_VAddr(Address,bMemory);
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if (bMemory == ConvertXP64Value(Code.Value)) { Execute = FALSE; }
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if (bMemory == ConvertXP64Value(Code.Value)) { Execute = false; }
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return ApplyCheatEntry(MMU,CodeEntry,CurrentEntry + 1,Execute) + 1;
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case 0xBB000000:
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Address = 0x80000000 | (ConvertXP64Address(Code.Command) & 0xFFFFFF);
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MMU->LH_VAddr(Address,wMemory);
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if (wMemory == ConvertXP64Value(Code.Value)) { Execute = FALSE; }
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if (wMemory == ConvertXP64Value(Code.Value)) { Execute = false; }
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return ApplyCheatEntry(MMU,CodeEntry,CurrentEntry + 1,Execute) + 1;
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case 0: return MaxGSEntries; break;
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}
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@ -69,7 +69,7 @@ private:
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void CheckParentStatus ( HWND hParent );
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static stdstr ReadCodeString ( HWND hDlg, bool &validcodes, bool &validoption, bool &nooptions, int &codeformat );
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static stdstr ReadOptionsString( HWND hDlg, bool &validcodes, bool &validoptions, bool &nooptions, int &codeformat );
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int ApplyCheatEntry (CMipsMemory * MMU,const CODES & CodeEntry, int CurrentEntry, BOOL Execute );
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int ApplyCheatEntry (CMipsMemory * MMU,const CODES & CodeEntry, int CurrentEntry, bool Execute );
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void RecordCheatValues ( HWND hDlg );
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bool CheatChanged ( HWND hDlg );
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bool IsValid16BitCode ( LPCSTR CheatString ) const;
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@ -306,7 +306,7 @@ void CDebugMemorySearch::SearchForValue( void )
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SearchResultItem & Result = m_SearchResult[ItemId];
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DWORD NewValue = 0;
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BOOL valid = false;
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bool valid = false;
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switch (Size)
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{
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@ -441,7 +441,7 @@ void CDebugMemorySearch::SearchForUnknown()
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bool UpdateResult = false;
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DWORD NewValue = 0;
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BOOL valid = false;
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bool valid = false;
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switch (Size)
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{
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@ -25,7 +25,7 @@ bool DelaySlotEffectsCompare (DWORD PC, DWORD Reg1, DWORD Reg2)
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{
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//g_Notify->DisplayError(L"Failed to load word 2");
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//ExitThread(0);
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return TRUE;
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return true;
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}
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switch (Command.op)
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@ -68,15 +68,11 @@ bool DelaySlotEffectsCompare (DWORD PC, DWORD Reg1, DWORD Reg2)
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case R4300i_SPECIAL_DSRA32:
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if (Command.rd == 0)
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{
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return FALSE;
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return false;
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}
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if (Command.rd == Reg1)
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if (Command.rd == Reg1 || Command.rd == Reg2)
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{
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return TRUE;
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}
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if (Command.rd == Reg2)
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{
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return TRUE;
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return true;
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}
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break;
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case R4300i_SPECIAL_MULT:
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@ -93,7 +89,7 @@ bool DelaySlotEffectsCompare (DWORD PC, DWORD Reg1, DWORD Reg2)
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{
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g_Notify->DisplayError(L"Does %s effect Delay slot at %X?",R4300iOpcodeName(Command.Hex,PC+4), PC);
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}
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return TRUE;
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return true;
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}
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break;
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case R4300i_CP0:
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@ -103,21 +99,17 @@ bool DelaySlotEffectsCompare (DWORD PC, DWORD Reg1, DWORD Reg2)
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case R4300i_COP0_MF:
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if (Command.rt == 0)
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{
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return FALSE;
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return false;
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}
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if (Command.rt == Reg1)
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if (Command.rt == Reg1 || Command.rt == Reg2)
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{
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return TRUE;
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}
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if (Command.rt == Reg2)
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{
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return TRUE;
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return true;
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}
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break;
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default:
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if ( (Command.rs & 0x10 ) != 0 )
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{
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switch ( Command.funct )
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switch (Command.funct)
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{
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case R4300i_COP0_CO_TLBR: break;
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case R4300i_COP0_CO_TLBWI: break;
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@ -128,7 +120,7 @@ bool DelaySlotEffectsCompare (DWORD PC, DWORD Reg1, DWORD Reg2)
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{
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g_Notify->DisplayError(L"Does %s effect Delay slot at %X?\n6",R4300iOpcodeName(Command.Hex,PC+4), PC);
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}
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return TRUE;
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return true;
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}
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}
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else
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@ -137,7 +129,7 @@ bool DelaySlotEffectsCompare (DWORD PC, DWORD Reg1, DWORD Reg2)
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{
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g_Notify->DisplayError(L"Does %s effect Delay slot at %X?\n7",R4300iOpcodeName(Command.Hex,PC+4), PC);
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}
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return TRUE;
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return true;
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}
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}
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break;
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@ -147,15 +139,11 @@ bool DelaySlotEffectsCompare (DWORD PC, DWORD Reg1, DWORD Reg2)
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case R4300i_COP1_MF:
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if (Command.rt == 0)
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{
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return FALSE;
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return false;
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}
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if (Command.rt == Reg1)
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if (Command.rt == Reg1 || Command.rt == Reg2)
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{
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return TRUE;
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}
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if (Command.rt == Reg2)
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{
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return TRUE;
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return true;
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}
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break;
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case R4300i_COP1_CF: break;
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@ -170,7 +158,7 @@ bool DelaySlotEffectsCompare (DWORD PC, DWORD Reg1, DWORD Reg2)
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{
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g_Notify->DisplayError(L"Does %s effect Delay slot at %X?",R4300iOpcodeName(Command.Hex,PC+4), PC);
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}
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return TRUE;
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return true;
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}
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break;
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case R4300i_ANDI:
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@ -197,15 +185,11 @@ bool DelaySlotEffectsCompare (DWORD PC, DWORD Reg1, DWORD Reg2)
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case R4300i_LDC1:
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if (Command.rt == 0)
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{
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return FALSE;
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return false;
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}
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if (Command.rt == Reg1)
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if (Command.rt == Reg1 || Command.rt == Reg2)
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{
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return TRUE;
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}
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if (Command.rt == Reg2)
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{
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return TRUE;
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return true;
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}
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break;
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case R4300i_CACHE: break;
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@ -222,14 +206,14 @@ bool DelaySlotEffectsCompare (DWORD PC, DWORD Reg1, DWORD Reg2)
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{
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g_Notify->DisplayError(L"Does %s effect Delay slot at %X?",R4300iOpcodeName(Command.Hex,PC+4), PC);
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}
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return TRUE;
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return true;
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}
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return FALSE;
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return false;
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}
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void CInterpreterCPU::BuildCPU()
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{
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R4300iOp::m_TestTimer = FALSE;
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R4300iOp::m_TestTimer = false;
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R4300iOp::m_NextInstruction = NORMAL;
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R4300iOp::m_JumpToLocation = 0;
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@ -283,8 +267,8 @@ void CInterpreterCPU::ExecuteCPU()
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DWORD & PROGRAM_COUNTER = *_PROGRAM_COUNTER;
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OPCODE & Opcode = R4300iOp::m_Opcode;
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DWORD & JumpToLocation = R4300iOp::m_JumpToLocation;
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BOOL & TestTimer = R4300iOp::m_TestTimer;
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const BOOL & bDoSomething= g_SystemEvents->DoSomething();
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bool & TestTimer = R4300iOp::m_TestTimer;
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const bool & bDoSomething= g_SystemEvents->DoSomething();
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DWORD CountPerOp = g_System->CountPerOp();
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int & NextTimer = *g_NextTimer;
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@ -323,7 +307,7 @@ void CInterpreterCPU::ExecuteCPU()
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R4300iOp::m_NextInstruction = NORMAL;
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if (CheckTimer)
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{
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TestTimer = FALSE;
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TestTimer = false;
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if (NextTimer < 0)
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{
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g_SystemTimer->TimerDone();
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@ -369,8 +353,8 @@ void CInterpreterCPU::ExecuteOps(int Cycles)
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DWORD & PROGRAM_COUNTER = *_PROGRAM_COUNTER;
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OPCODE & Opcode = R4300iOp::m_Opcode;
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DWORD & JumpToLocation = R4300iOp::m_JumpToLocation;
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BOOL & TestTimer = R4300iOp::m_TestTimer;
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const BOOL & DoSomething = g_SystemEvents->DoSomething();
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bool & TestTimer = R4300iOp::m_TestTimer;
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const bool & DoSomething = g_SystemEvents->DoSomething();
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DWORD CountPerOp = g_System->CountPerOp();
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__try
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@ -433,9 +417,9 @@ void CInterpreterCPU::ExecuteOps(int Cycles)
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R4300iOp::m_NextInstruction = NORMAL;
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if (CheckTimer)
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{
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TestTimer = FALSE;
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if (*g_NextTimer < 0)
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{
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TestTimer = false;
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if (*g_NextTimer < 0)
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{
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g_SystemTimer->TimerDone();
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}
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if (DoSomething)
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@ -906,7 +906,7 @@ void R4300iOp32::LH()
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DWORD Address = _GPR[m_Opcode.base].UW[0] + (short)m_Opcode.offset;
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if ((Address & 1) != 0)
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{
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ADDRESS_ERROR_EXCEPTION(Address,TRUE);
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ADDRESS_ERROR_EXCEPTION(Address, true);
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}
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if (!g_MMU->LH_VAddr(Address,_GPR[m_Opcode.rt].UHW[0]))
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{
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@ -948,7 +948,7 @@ void R4300iOp32::LW()
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DWORD Address = _GPR[m_Opcode.base].UW[0] + (short)m_Opcode.offset;
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if ((Address & 3) != 0)
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{
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ADDRESS_ERROR_EXCEPTION(Address,TRUE);
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ADDRESS_ERROR_EXCEPTION(Address, true);
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}
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if (LogOptions.GenerateLog)
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@ -992,7 +992,7 @@ void R4300iOp32::LHU()
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DWORD Address = _GPR[m_Opcode.base].UW[0] + (short)m_Opcode.offset;
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if ((Address & 1) != 0)
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{
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ADDRESS_ERROR_EXCEPTION(Address,TRUE);
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ADDRESS_ERROR_EXCEPTION(Address, true);
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}
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if (!g_MMU->LH_VAddr(Address,_GPR[m_Opcode.rt].UHW[0]))
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{
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@ -1034,7 +1034,7 @@ void R4300iOp32::LWU()
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DWORD Address = _GPR[m_Opcode.base].UW[0] + (short)m_Opcode.offset;
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if ((Address & 3) != 0)
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{
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ADDRESS_ERROR_EXCEPTION(Address,TRUE);
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ADDRESS_ERROR_EXCEPTION(Address, true);
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}
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if (!g_MMU->LW_VAddr(Address,_GPR[m_Opcode.rt].UW[0]))
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@ -1057,7 +1057,7 @@ void R4300iOp32::LL()
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DWORD Address = _GPR[m_Opcode.base].UW[0] + (short)m_Opcode.offset;
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if ((Address & 3) != 0)
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{
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ADDRESS_ERROR_EXCEPTION(Address,TRUE);
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ADDRESS_ERROR_EXCEPTION(Address, true);
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}
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if (!g_MMU->LW_VAddr(Address,_GPR[m_Opcode.rt].UW[0]))
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@ -1111,7 +1111,7 @@ void R4300iOp32::SPECIAL_JALR()
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m_NextInstruction = DELAY_SLOT;
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m_JumpToLocation = _GPR[m_Opcode.rs].UW[0];
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_GPR[m_Opcode.rd].W[0] = (long)((*_PROGRAM_COUNTER) + 8);
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m_TestTimer = TRUE;
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m_TestTimer = true;
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}
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void R4300iOp32::SPECIAL_ADD()
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@ -14,7 +14,7 @@
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void InPermLoop();
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void TestInterpreterJump(DWORD PC, DWORD TargetPC, int Reg1, int Reg2);
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BOOL R4300iOp::m_TestTimer = false;
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bool R4300iOp::m_TestTimer = false;
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DWORD R4300iOp::m_NextInstruction;
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OPCODE R4300iOp::m_Opcode;
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DWORD R4300iOp::m_JumpToLocation;
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@ -719,7 +719,7 @@ void TestInterpreterJump (DWORD PC, DWORD TargetPC, int Reg1, int Reg2)
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return;
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}
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R4300iOp::m_NextInstruction = PERMLOOP_DO_DELAY;
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R4300iOp::m_TestTimer = TRUE;
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R4300iOp::m_TestTimer = true;
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}
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/************************* Opcode functions *************************/
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@ -1071,7 +1071,7 @@ void R4300iOp::LH()
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DWORD Address = _GPR[m_Opcode.base].UW[0] + (short)m_Opcode.offset;
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if ((Address & 1) != 0)
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{
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ADDRESS_ERROR_EXCEPTION(Address,TRUE);
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ADDRESS_ERROR_EXCEPTION(Address, true);
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}
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if (!g_MMU->LH_VAddr(Address,_GPR[m_Opcode.rt].UHW[0]))
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{
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@ -1113,7 +1113,7 @@ void R4300iOp::LW()
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DWORD Address = _GPR[m_Opcode.base].UW[0] + (short)m_Opcode.offset;
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if ((Address & 3) != 0)
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{
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ADDRESS_ERROR_EXCEPTION(Address,TRUE);
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ADDRESS_ERROR_EXCEPTION(Address, true);
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}
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if (LogOptions.GenerateLog)
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@ -1157,7 +1157,7 @@ void R4300iOp::LHU()
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DWORD Address = _GPR[m_Opcode.base].UW[0] + (short)m_Opcode.offset;
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if ((Address & 1) != 0)
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{
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ADDRESS_ERROR_EXCEPTION(Address,TRUE);
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ADDRESS_ERROR_EXCEPTION(Address, true);
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}
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if (!g_MMU->LH_VAddr(Address,_GPR[m_Opcode.rt].UHW[0]))
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{
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|
@ -1199,7 +1199,7 @@ void R4300iOp::LWU()
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DWORD Address = _GPR[m_Opcode.base].UW[0] + (short)m_Opcode.offset;
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if ((Address & 3) != 0)
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{
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ADDRESS_ERROR_EXCEPTION(Address,TRUE);
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ADDRESS_ERROR_EXCEPTION(Address, true);
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}
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if (!g_MMU->LW_VAddr(Address,_GPR[m_Opcode.rt].UW[0]))
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@ -1237,7 +1237,7 @@ void R4300iOp::SH()
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DWORD Address = _GPR[m_Opcode.base].UW[0] + (short)m_Opcode.offset;
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if ((Address & 1) != 0)
|
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{
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ADDRESS_ERROR_EXCEPTION(Address,FALSE);
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ADDRESS_ERROR_EXCEPTION(Address, false);
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}
|
||||
if (!g_MMU->SH_VAddr(Address,_GPR[m_Opcode.rt].UHW[0]))
|
||||
{
|
||||
|
@ -1294,7 +1294,7 @@ void R4300iOp::SW()
|
|||
DWORD Address = _GPR[m_Opcode.base].UW[0] + (short)m_Opcode.offset;
|
||||
if ((Address & 3) != 0)
|
||||
{
|
||||
ADDRESS_ERROR_EXCEPTION(Address,FALSE);
|
||||
ADDRESS_ERROR_EXCEPTION(Address, false);
|
||||
}
|
||||
if (LogOptions.GenerateLog)
|
||||
{
|
||||
|
@ -1459,7 +1459,7 @@ void R4300iOp::LL()
|
|||
DWORD Address = _GPR[m_Opcode.base].UW[0] + (short)m_Opcode.offset;
|
||||
if ((Address & 3) != 0)
|
||||
{
|
||||
ADDRESS_ERROR_EXCEPTION(Address,TRUE);
|
||||
ADDRESS_ERROR_EXCEPTION(Address, true);
|
||||
}
|
||||
|
||||
if (!g_MMU->LW_VAddr(Address,_GPR[m_Opcode.rt].UW[0]))
|
||||
|
@ -1483,7 +1483,7 @@ void R4300iOp::LWC1()
|
|||
TEST_COP1_USABLE_EXCEPTION
|
||||
if ((Address & 3) != 0)
|
||||
{
|
||||
ADDRESS_ERROR_EXCEPTION(Address,TRUE);
|
||||
ADDRESS_ERROR_EXCEPTION(Address, true);
|
||||
}
|
||||
if (!g_MMU->LW_VAddr(Address,*(DWORD *)_FPR_S[m_Opcode.ft]))
|
||||
{
|
||||
|
@ -1500,7 +1500,7 @@ void R4300iOp::SC()
|
|||
DWORD Address = _GPR[m_Opcode.base].UW[0] + (short)m_Opcode.offset;
|
||||
if ((Address & 3) != 0)
|
||||
{
|
||||
ADDRESS_ERROR_EXCEPTION(Address,FALSE);
|
||||
ADDRESS_ERROR_EXCEPTION(Address, false);
|
||||
}
|
||||
Log_SW((*_PROGRAM_COUNTER),Address,_GPR[m_Opcode.rt].UW[0]);
|
||||
if ((*_LLBit) == 1)
|
||||
|
@ -1522,7 +1522,7 @@ void R4300iOp::LD()
|
|||
DWORD Address = _GPR[m_Opcode.base].UW[0] + (short)m_Opcode.offset;
|
||||
if ((Address & 7) != 0)
|
||||
{
|
||||
ADDRESS_ERROR_EXCEPTION(Address,TRUE);
|
||||
ADDRESS_ERROR_EXCEPTION(Address, true);
|
||||
}
|
||||
if (!g_MMU->LD_VAddr(Address,_GPR[m_Opcode.rt].UDW))
|
||||
{
|
||||
|
@ -1552,7 +1552,7 @@ void R4300iOp::LDC1()
|
|||
TEST_COP1_USABLE_EXCEPTION
|
||||
if ((Address & 7) != 0)
|
||||
{
|
||||
ADDRESS_ERROR_EXCEPTION(Address,TRUE);
|
||||
ADDRESS_ERROR_EXCEPTION(Address, true);
|
||||
}
|
||||
if (!g_MMU->LD_VAddr(Address,*(unsigned __int64 *)_FPR_D[m_Opcode.ft]))
|
||||
{
|
||||
|
@ -1573,7 +1573,7 @@ void R4300iOp::SWC1()
|
|||
TEST_COP1_USABLE_EXCEPTION
|
||||
if ((Address & 3) != 0)
|
||||
{
|
||||
ADDRESS_ERROR_EXCEPTION(Address,FALSE);
|
||||
ADDRESS_ERROR_EXCEPTION(Address, false);
|
||||
}
|
||||
|
||||
if (!g_MMU->SW_VAddr(Address,*(DWORD *)_FPR_S[m_Opcode.ft]))
|
||||
|
@ -1596,7 +1596,7 @@ void R4300iOp::SDC1()
|
|||
TEST_COP1_USABLE_EXCEPTION
|
||||
if ((Address & 7) != 0)
|
||||
{
|
||||
ADDRESS_ERROR_EXCEPTION(Address,FALSE);
|
||||
ADDRESS_ERROR_EXCEPTION(Address, false);
|
||||
}
|
||||
if (!g_MMU->SD_VAddr(Address,*(__int64 *)_FPR_D[m_Opcode.ft]))
|
||||
{
|
||||
|
@ -1616,7 +1616,7 @@ void R4300iOp::SD()
|
|||
DWORD Address = _GPR[m_Opcode.base].UW[0] + (short)m_Opcode.offset;
|
||||
if ((Address & 7) != 0)
|
||||
{
|
||||
ADDRESS_ERROR_EXCEPTION(Address,FALSE);
|
||||
ADDRESS_ERROR_EXCEPTION(Address, false);
|
||||
}
|
||||
if (!g_MMU->SD_VAddr(Address,_GPR[m_Opcode.rt].UDW))
|
||||
{
|
||||
|
@ -1665,7 +1665,7 @@ void R4300iOp::SPECIAL_JR()
|
|||
{
|
||||
m_NextInstruction = DELAY_SLOT;
|
||||
m_JumpToLocation = _GPR[m_Opcode.rs].UW[0];
|
||||
m_TestTimer = TRUE;
|
||||
m_TestTimer = true;
|
||||
}
|
||||
|
||||
void R4300iOp::SPECIAL_JALR()
|
||||
|
@ -1673,7 +1673,7 @@ void R4300iOp::SPECIAL_JALR()
|
|||
m_NextInstruction = DELAY_SLOT;
|
||||
m_JumpToLocation = _GPR[m_Opcode.rs].UW[0];
|
||||
_GPR[m_Opcode.rd].DW = (long)((*_PROGRAM_COUNTER) + 8);
|
||||
m_TestTimer = TRUE;
|
||||
m_TestTimer = true;
|
||||
}
|
||||
|
||||
void R4300iOp::SPECIAL_SYSCALL()
|
||||
|
@ -2196,7 +2196,7 @@ void R4300iOp::COP0_CO_TLBWI()
|
|||
{
|
||||
return;
|
||||
}
|
||||
g_TLB->WriteEntry(g_Reg->INDEX_REGISTER & 0x1F,FALSE);
|
||||
g_TLB->WriteEntry(g_Reg->INDEX_REGISTER & 0x1F, false);
|
||||
}
|
||||
|
||||
void R4300iOp::COP0_CO_TLBWR()
|
||||
|
@ -2232,7 +2232,7 @@ void R4300iOp::COP0_CO_ERET()
|
|||
}
|
||||
(*_LLBit) = 0;
|
||||
g_Reg->CheckInterrupts();
|
||||
m_TestTimer = TRUE;
|
||||
m_TestTimer = true;
|
||||
}
|
||||
|
||||
/************************** COP1 functions **************************/
|
||||
|
@ -2515,7 +2515,8 @@ void R4300iOp::COP1_S_CVT_L()
|
|||
|
||||
void R4300iOp::COP1_S_CMP()
|
||||
{
|
||||
int less, equal, unorded, condition;
|
||||
bool less, equal, unorded;
|
||||
int condition;
|
||||
float Temp0, Temp1;
|
||||
|
||||
TEST_COP1_USABLE_EXCEPTION
|
||||
|
@ -2529,9 +2530,9 @@ void R4300iOp::COP1_S_CMP()
|
|||
{
|
||||
g_Notify->DisplayError(__FUNCTIONW__ L": Nan ?");
|
||||
}
|
||||
less = FALSE;
|
||||
equal = FALSE;
|
||||
unorded = TRUE;
|
||||
less = false;
|
||||
equal = false;
|
||||
unorded = true;
|
||||
if ((m_Opcode.funct & 8) != 0)
|
||||
{
|
||||
if (bHaveDebugger())
|
||||
|
@ -2544,7 +2545,7 @@ void R4300iOp::COP1_S_CMP()
|
|||
{
|
||||
less = Temp0 < Temp1;
|
||||
equal = Temp0 == Temp1;
|
||||
unorded = FALSE;
|
||||
unorded = false;
|
||||
}
|
||||
|
||||
condition = ((m_Opcode.funct & 4) && less) | ((m_Opcode.funct & 2) && equal) |
|
||||
|
@ -2710,9 +2711,10 @@ void R4300iOp::COP1_D_CVT_L()
|
|||
Double_RoundToInteger64(&*(unsigned __int64 *)_FPR_D[m_Opcode.fd],&*(double *)_FPR_D[m_Opcode.fs]);
|
||||
}
|
||||
|
||||
void R4300iOp::COP1_D_CMP()
|
||||
void R4300iOp::COP1_D_CMP()
|
||||
{
|
||||
int less, equal, unorded, condition;
|
||||
bool less, equal, unorded;
|
||||
int condition;
|
||||
MIPS_DWORD Temp0, Temp1;
|
||||
|
||||
TEST_COP1_USABLE_EXCEPTION
|
||||
|
@ -2726,9 +2728,9 @@ void R4300iOp::COP1_D_CMP()
|
|||
{
|
||||
g_Notify->DisplayError(__FUNCTIONW__ L": Nan ?");
|
||||
}
|
||||
less = FALSE;
|
||||
equal = FALSE;
|
||||
unorded = TRUE;
|
||||
less = false;
|
||||
equal = false;
|
||||
unorded = true;
|
||||
if ((m_Opcode.funct & 8) != 0)
|
||||
{
|
||||
if (bHaveDebugger())
|
||||
|
@ -2737,11 +2739,11 @@ void R4300iOp::COP1_D_CMP()
|
|||
}
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
else
|
||||
{
|
||||
less = Temp0.D < Temp1.D;
|
||||
equal = Temp0.D == Temp1.D;
|
||||
unorded = FALSE;
|
||||
unorded = false;
|
||||
}
|
||||
|
||||
condition = ((m_Opcode.funct & 4) && less) | ((m_Opcode.funct & 2) && equal) |
|
||||
|
@ -2754,7 +2756,7 @@ void R4300iOp::COP1_D_CMP()
|
|||
else
|
||||
{
|
||||
_FPCR[31] &= ~FPCSR_C;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/************************** COP1: W functions ************************/
|
||||
|
|
|
@ -203,7 +203,7 @@ public:
|
|||
|
||||
static Func* BuildInterpreter();
|
||||
|
||||
static BOOL m_TestTimer;
|
||||
static bool m_TestTimer;
|
||||
static DWORD m_NextInstruction;
|
||||
static OPCODE m_Opcode;
|
||||
static DWORD m_JumpToLocation;
|
||||
|
|
|
@ -25,25 +25,25 @@ public:
|
|||
virtual BYTE * Imem () = 0;
|
||||
virtual BYTE * PifRam () = 0;
|
||||
|
||||
virtual BOOL LB_VAddr ( DWORD VAddr, BYTE & Value ) = 0;
|
||||
virtual BOOL LH_VAddr ( DWORD VAddr, WORD & Value ) = 0;
|
||||
virtual BOOL LW_VAddr ( DWORD VAddr, DWORD & Value ) = 0;
|
||||
virtual BOOL LD_VAddr ( DWORD VAddr, QWORD & Value ) = 0;
|
||||
virtual bool LB_VAddr ( DWORD VAddr, BYTE & Value ) = 0;
|
||||
virtual bool LH_VAddr ( DWORD VAddr, WORD & Value ) = 0;
|
||||
virtual bool LW_VAddr ( DWORD VAddr, DWORD & Value ) = 0;
|
||||
virtual bool LD_VAddr ( DWORD VAddr, QWORD & Value ) = 0;
|
||||
|
||||
virtual BOOL LB_PAddr ( DWORD PAddr, BYTE & Value ) = 0;
|
||||
virtual BOOL LH_PAddr ( DWORD PAddr, WORD & Value ) = 0;
|
||||
virtual BOOL LW_PAddr ( DWORD PAddr, DWORD & Value ) = 0;
|
||||
virtual BOOL LD_PAddr ( DWORD PAddr, QWORD & Value ) = 0;
|
||||
virtual bool LB_PAddr ( DWORD PAddr, BYTE & Value ) = 0;
|
||||
virtual bool LH_PAddr ( DWORD PAddr, WORD & Value ) = 0;
|
||||
virtual bool LW_PAddr ( DWORD PAddr, DWORD & Value ) = 0;
|
||||
virtual bool LD_PAddr ( DWORD PAddr, QWORD & Value ) = 0;
|
||||
|
||||
virtual BOOL SB_VAddr ( DWORD VAddr, BYTE Value ) = 0;
|
||||
virtual BOOL SH_VAddr ( DWORD VAddr, WORD Value ) = 0;
|
||||
virtual BOOL SW_VAddr ( DWORD VAddr, DWORD Value ) = 0;
|
||||
virtual BOOL SD_VAddr ( DWORD VAddr, QWORD Value ) = 0;
|
||||
virtual bool SB_VAddr ( DWORD VAddr, BYTE Value ) = 0;
|
||||
virtual bool SH_VAddr ( DWORD VAddr, WORD Value ) = 0;
|
||||
virtual bool SW_VAddr ( DWORD VAddr, DWORD Value ) = 0;
|
||||
virtual bool SD_VAddr ( DWORD VAddr, QWORD Value ) = 0;
|
||||
|
||||
virtual BOOL SB_PAddr ( DWORD PAddr, BYTE Value ) = 0;
|
||||
virtual BOOL SH_PAddr ( DWORD PAddr, WORD Value ) = 0;
|
||||
virtual BOOL SW_PAddr ( DWORD PAddr, DWORD Value ) = 0;
|
||||
virtual BOOL SD_PAddr ( DWORD PAddr, QWORD Value ) = 0;
|
||||
virtual bool SB_PAddr ( DWORD PAddr, BYTE Value ) = 0;
|
||||
virtual bool SH_PAddr ( DWORD PAddr, WORD Value ) = 0;
|
||||
virtual bool SW_PAddr ( DWORD PAddr, DWORD Value ) = 0;
|
||||
virtual bool SD_PAddr ( DWORD PAddr, QWORD Value ) = 0;
|
||||
|
||||
virtual bool ValidVaddr ( DWORD VAddr ) const = 0;
|
||||
|
||||
|
|
File diff suppressed because it is too large
Load Diff
|
@ -27,7 +27,7 @@ public:
|
|||
static void ReserveMemory();
|
||||
static void FreeReservedMemory();
|
||||
|
||||
BOOL Initialize ();
|
||||
bool Initialize ();
|
||||
void Reset ( bool EraseMemory );
|
||||
|
||||
BYTE * Rdram ();
|
||||
|
@ -36,25 +36,25 @@ public:
|
|||
BYTE * Imem ();
|
||||
BYTE * PifRam ();
|
||||
|
||||
BOOL LB_VAddr ( DWORD VAddr, BYTE & Value );
|
||||
BOOL LH_VAddr ( DWORD VAddr, WORD & Value );
|
||||
BOOL LW_VAddr ( DWORD VAddr, DWORD & Value );
|
||||
BOOL LD_VAddr ( DWORD VAddr, QWORD & Value );
|
||||
bool LB_VAddr ( DWORD VAddr, BYTE & Value );
|
||||
bool LH_VAddr ( DWORD VAddr, WORD & Value );
|
||||
bool LW_VAddr ( DWORD VAddr, DWORD & Value );
|
||||
bool LD_VAddr ( DWORD VAddr, QWORD & Value );
|
||||
|
||||
BOOL LB_PAddr ( DWORD PAddr, BYTE & Value );
|
||||
BOOL LH_PAddr ( DWORD PAddr, WORD & Value );
|
||||
BOOL LW_PAddr ( DWORD PAddr, DWORD & Value );
|
||||
BOOL LD_PAddr ( DWORD PAddr, QWORD & Value );
|
||||
bool LB_PAddr ( DWORD PAddr, BYTE & Value );
|
||||
bool LH_PAddr ( DWORD PAddr, WORD & Value );
|
||||
bool LW_PAddr ( DWORD PAddr, DWORD & Value );
|
||||
bool LD_PAddr ( DWORD PAddr, QWORD & Value );
|
||||
|
||||
BOOL SB_VAddr ( DWORD VAddr, BYTE Value );
|
||||
BOOL SH_VAddr ( DWORD VAddr, WORD Value );
|
||||
BOOL SW_VAddr ( DWORD VAddr, DWORD Value );
|
||||
BOOL SD_VAddr ( DWORD VAddr, QWORD Value );
|
||||
bool SB_VAddr ( DWORD VAddr, BYTE Value );
|
||||
bool SH_VAddr ( DWORD VAddr, WORD Value );
|
||||
bool SW_VAddr ( DWORD VAddr, DWORD Value );
|
||||
bool SD_VAddr ( DWORD VAddr, QWORD Value );
|
||||
|
||||
BOOL SB_PAddr ( DWORD PAddr, BYTE Value );
|
||||
BOOL SH_PAddr ( DWORD PAddr, WORD Value );
|
||||
BOOL SW_PAddr ( DWORD PAddr, DWORD Value );
|
||||
BOOL SD_PAddr ( DWORD PAddr, QWORD Value );
|
||||
bool SB_PAddr ( DWORD PAddr, BYTE Value );
|
||||
bool SH_PAddr ( DWORD PAddr, WORD Value );
|
||||
bool SW_PAddr ( DWORD PAddr, DWORD Value );
|
||||
bool SD_PAddr ( DWORD PAddr, QWORD Value );
|
||||
|
||||
int MemoryFilter(DWORD dwExptCode, void * lpExceptionPointer);
|
||||
void UpdateFieldSerration(unsigned int interlaced);
|
||||
|
@ -94,8 +94,8 @@ public:
|
|||
void Compile_SDC1();
|
||||
|
||||
void ResetMemoryStack ( CRegInfo& RegInfo );
|
||||
void Compile_LB ( CX86Ops::x86Reg Reg, DWORD Addr, BOOL SignExtend );
|
||||
void Compile_LH ( CX86Ops::x86Reg Reg, DWORD Addr, BOOL SignExtend );
|
||||
void Compile_LB ( CX86Ops::x86Reg Reg, DWORD Addr, bool SignExtend );
|
||||
void Compile_LH ( CX86Ops::x86Reg Reg, DWORD Addr, bool SignExtend );
|
||||
void Compile_LW ( CX86Ops::x86Reg Reg, DWORD Addr );
|
||||
void Compile_SB_Const ( BYTE Value, DWORD Addr );
|
||||
void Compile_SB_Register ( CX86Ops::x86Reg Reg, DWORD Addr );
|
||||
|
@ -129,13 +129,13 @@ private:
|
|||
static void ChangeSpStatus ();
|
||||
static void ChangeMiIntrMask();
|
||||
|
||||
int LB_NonMemory ( DWORD PAddr, DWORD * Value, BOOL SignExtend );
|
||||
int LH_NonMemory ( DWORD PAddr, DWORD * Value, int SignExtend );
|
||||
int LW_NonMemory ( DWORD PAddr, DWORD * Value );
|
||||
bool LB_NonMemory ( DWORD PAddr, DWORD * Value, bool SignExtend );
|
||||
bool LH_NonMemory ( DWORD PAddr, DWORD * Value, bool SignExtend );
|
||||
bool LW_NonMemory ( DWORD PAddr, DWORD * Value );
|
||||
|
||||
int SB_NonMemory ( DWORD PAddr, BYTE Value );
|
||||
int SH_NonMemory ( DWORD PAddr, WORD Value );
|
||||
int SW_NonMemory ( DWORD PAddr, DWORD Value );
|
||||
bool SB_NonMemory ( DWORD PAddr, BYTE Value );
|
||||
bool SH_NonMemory ( DWORD PAddr, WORD Value );
|
||||
bool SW_NonMemory ( DWORD PAddr, DWORD Value );
|
||||
|
||||
void Compile_StoreInstructClean (x86Reg AddressReg, int Length );
|
||||
|
||||
|
|
|
@ -329,7 +329,7 @@ void CRegisters::CheckInterrupts()
|
|||
}
|
||||
}
|
||||
|
||||
void CRegisters::DoAddressError ( BOOL DelaySlot, DWORD BadVaddr, BOOL FromRead)
|
||||
void CRegisters::DoAddressError(bool DelaySlot, DWORD BadVaddr, bool FromRead)
|
||||
{
|
||||
if (bHaveDebugger())
|
||||
{
|
||||
|
@ -385,7 +385,7 @@ void CRegisters::FixFpuLocations()
|
|||
}
|
||||
}
|
||||
|
||||
void CRegisters::DoBreakException ( BOOL DelaySlot)
|
||||
void CRegisters::DoBreakException(bool DelaySlot)
|
||||
{
|
||||
if (bHaveDebugger())
|
||||
{
|
||||
|
@ -413,7 +413,7 @@ void CRegisters::DoBreakException ( BOOL DelaySlot)
|
|||
m_PROGRAM_COUNTER = 0x80000180;
|
||||
}
|
||||
|
||||
void CRegisters::DoCopUnusableException ( BOOL DelaySlot, int Coprocessor )
|
||||
void CRegisters::DoCopUnusableException(bool DelaySlot, int Coprocessor)
|
||||
{
|
||||
if (bHaveDebugger())
|
||||
{
|
||||
|
@ -446,26 +446,31 @@ void CRegisters::DoCopUnusableException ( BOOL DelaySlot, int Coprocessor )
|
|||
}
|
||||
|
||||
|
||||
BOOL CRegisters::DoIntrException ( BOOL DelaySlot )
|
||||
bool CRegisters::DoIntrException(bool DelaySlot)
|
||||
{
|
||||
if (( STATUS_REGISTER & STATUS_IE ) == 0 )
|
||||
if ((STATUS_REGISTER & STATUS_IE) == 0)
|
||||
{
|
||||
return FALSE;
|
||||
return false;
|
||||
}
|
||||
if (( STATUS_REGISTER & STATUS_EXL ) != 0 )
|
||||
|
||||
if ((STATUS_REGISTER & STATUS_EXL) != 0)
|
||||
{
|
||||
return FALSE;
|
||||
return false;
|
||||
}
|
||||
if (( STATUS_REGISTER & STATUS_ERL ) != 0 )
|
||||
|
||||
if ((STATUS_REGISTER & STATUS_ERL) != 0)
|
||||
{
|
||||
return FALSE;
|
||||
return false;
|
||||
}
|
||||
|
||||
if (LogOptions.GenerateLog && LogOptions.LogExceptions && !LogOptions.NoInterrupts)
|
||||
{
|
||||
LogMessage("%08X: Interrupt Generated", m_PROGRAM_COUNTER );
|
||||
LogMessage("%08X: Interrupt Generated", m_PROGRAM_COUNTER);
|
||||
}
|
||||
|
||||
CAUSE_REGISTER = FAKE_CAUSE_REGISTER;
|
||||
CAUSE_REGISTER |= EXC_INT;
|
||||
|
||||
if (DelaySlot)
|
||||
{
|
||||
CAUSE_REGISTER |= CAUSE_BD;
|
||||
|
@ -475,12 +480,13 @@ BOOL CRegisters::DoIntrException ( BOOL DelaySlot )
|
|||
{
|
||||
EPC_REGISTER = m_PROGRAM_COUNTER;
|
||||
}
|
||||
|
||||
STATUS_REGISTER |= STATUS_EXL;
|
||||
m_PROGRAM_COUNTER = 0x80000180;
|
||||
return TRUE;
|
||||
return true;
|
||||
}
|
||||
|
||||
void CRegisters::DoTLBReadMiss ( BOOL DelaySlot, DWORD BadVaddr )
|
||||
void CRegisters::DoTLBReadMiss(bool DelaySlot, DWORD BadVaddr)
|
||||
{
|
||||
CAUSE_REGISTER = EXC_RMISS;
|
||||
BAD_VADDR_REGISTER = BadVaddr;
|
||||
|
@ -518,7 +524,7 @@ void CRegisters::DoTLBReadMiss ( BOOL DelaySlot, DWORD BadVaddr )
|
|||
}
|
||||
}
|
||||
|
||||
void CRegisters::DoSysCallException ( BOOL DelaySlot)
|
||||
void CRegisters::DoSysCallException(bool DelaySlot)
|
||||
{
|
||||
if (bHaveDebugger())
|
||||
{
|
||||
|
|
|
@ -532,12 +532,12 @@ public:
|
|||
|
||||
|
||||
void CheckInterrupts ();
|
||||
void DoAddressError ( BOOL DelaySlot, DWORD BadVaddr, BOOL FromRead );
|
||||
void DoBreakException ( BOOL DelaySlot );
|
||||
void DoCopUnusableException ( BOOL DelaySlot, int Coprocessor );
|
||||
BOOL DoIntrException ( BOOL DelaySlot );
|
||||
void DoTLBReadMiss ( BOOL DelaySlot, DWORD BadVaddr );
|
||||
void DoSysCallException ( BOOL DelaySlot);
|
||||
void DoAddressError ( bool DelaySlot, DWORD BadVaddr, bool FromRead );
|
||||
void DoBreakException ( bool DelaySlot );
|
||||
void DoCopUnusableException ( bool DelaySlot, int Coprocessor );
|
||||
bool DoIntrException ( bool DelaySlot );
|
||||
void DoTLBReadMiss ( bool DelaySlot, DWORD BadVaddr );
|
||||
void DoSysCallException ( bool DelaySlot);
|
||||
void FixFpuLocations ();
|
||||
void Reset ();
|
||||
void SetAsCurrentSystem ();
|
||||
|
|
|
@ -26,7 +26,7 @@ CSram::~CSram()
|
|||
}
|
||||
}
|
||||
|
||||
BOOL CSram::LoadSram()
|
||||
bool CSram::LoadSram()
|
||||
{
|
||||
CPath FileName;
|
||||
|
||||
|
|
|
@ -20,7 +20,7 @@ public:
|
|||
void DmaToSram(BYTE * Source, int StartOffset, int len);
|
||||
|
||||
private:
|
||||
BOOL LoadSram();
|
||||
bool LoadSram();
|
||||
|
||||
bool m_ReadOnly;
|
||||
HANDLE m_hFile;
|
||||
|
|
|
@ -62,7 +62,7 @@ public:
|
|||
void ExecuteEvents();
|
||||
void QueueEvent(SystemEvent action);
|
||||
|
||||
const BOOL& DoSomething() const
|
||||
const bool& DoSomething() const
|
||||
{
|
||||
return m_bDoSomething;
|
||||
}
|
||||
|
@ -77,6 +77,6 @@ private:
|
|||
CN64System * m_System;
|
||||
CPlugins * m_Plugins;
|
||||
EventList m_Events;
|
||||
BOOL m_bDoSomething;
|
||||
bool m_bDoSomething;
|
||||
CriticalSection m_CS;
|
||||
};
|
||||
|
|
|
@ -202,7 +202,7 @@ void CTLB::SetupTLB_Entry (int index, bool Random)
|
|||
m_FastTlb[FastIndx].VALID = m_tlb[index].EntryLo0.V;
|
||||
m_FastTlb[FastIndx].DIRTY = m_tlb[index].EntryLo0.D;
|
||||
m_FastTlb[FastIndx].GLOBAL = m_tlb[index].EntryLo0.GLOBAL & m_tlb[index].EntryLo1.GLOBAL;
|
||||
m_FastTlb[FastIndx].ValidEntry = FALSE;
|
||||
m_FastTlb[FastIndx].ValidEntry = false;
|
||||
m_FastTlb[FastIndx].Random = Random;
|
||||
m_FastTlb[FastIndx].Probed = false;
|
||||
|
||||
|
@ -220,7 +220,7 @@ void CTLB::SetupTLB_Entry (int index, bool Random)
|
|||
m_FastTlb[FastIndx].VALID = m_tlb[index].EntryLo1.V;
|
||||
m_FastTlb[FastIndx].DIRTY = m_tlb[index].EntryLo1.D;
|
||||
m_FastTlb[FastIndx].GLOBAL = m_tlb[index].EntryLo0.GLOBAL & m_tlb[index].EntryLo1.GLOBAL;
|
||||
m_FastTlb[FastIndx].ValidEntry = FALSE;
|
||||
m_FastTlb[FastIndx].ValidEntry = false;
|
||||
m_FastTlb[FastIndx].Random = Random;
|
||||
m_FastTlb[FastIndx].Probed = false;
|
||||
|
||||
|
|
|
@ -1595,43 +1595,45 @@ bool CN64System::LoadState(LPCSTR FileName)
|
|||
}
|
||||
DWORD Value;
|
||||
while (port == UNZ_OK)
|
||||
{
|
||||
{
|
||||
unz_file_info info;
|
||||
char zname[132];
|
||||
|
||||
unzGetCurrentFileInfo(file, &info, zname, 128, NULL,0, NULL,0);
|
||||
if (unzLocateFile(file, zname, 1) != UNZ_OK )
|
||||
{
|
||||
if (unzLocateFile(file, zname, 1) != UNZ_OK )
|
||||
{
|
||||
unzClose(file);
|
||||
port = -1;
|
||||
continue;
|
||||
}
|
||||
if( unzOpenCurrentFile(file) != UNZ_OK )
|
||||
{
|
||||
{
|
||||
unzClose(file);
|
||||
port = -1;
|
||||
continue;
|
||||
}
|
||||
unzReadCurrentFile(file,&Value,4);
|
||||
if (Value != 0x23D8A6C8 && Value != 0x56D2CD23)
|
||||
{
|
||||
{
|
||||
unzCloseCurrentFile(file);
|
||||
port = unzGoToNextFile(file);
|
||||
continue;
|
||||
}
|
||||
if (!LoadedZipFile && Value == 0x23D8A6C8 && port == UNZ_OK)
|
||||
{
|
||||
{
|
||||
unzReadCurrentFile(file,&SaveRDRAMSize,sizeof(SaveRDRAMSize));
|
||||
//Check header
|
||||
|
||||
BYTE LoadHeader[64];
|
||||
unzReadCurrentFile(file,LoadHeader,0x40);
|
||||
unzReadCurrentFile(file,LoadHeader,0x40);
|
||||
if (memcmp(LoadHeader,g_Rom->GetRomAddress(),0x40) != 0)
|
||||
{
|
||||
//if (inFullScreen) { return FALSE; }
|
||||
{
|
||||
//if (inFullScreen) { return false; }
|
||||
int result = MessageBoxW(NULL,GS(MSG_SAVE_STATE_HEADER),GS(MSG_MSGBOX_TITLE),
|
||||
MB_YESNO|MB_ICONQUESTION|MB_DEFBUTTON2);
|
||||
if (result == IDNO) { return FALSE; }
|
||||
|
||||
if (result == IDNO)
|
||||
return false;
|
||||
}
|
||||
Reset(false,true);
|
||||
|
||||
|
@ -1666,8 +1668,8 @@ bool CN64System::LoadState(LPCSTR FileName)
|
|||
continue;
|
||||
}
|
||||
if (LoadedZipFile && Value == 0x56D2CD23 && port == UNZ_OK)
|
||||
{
|
||||
m_SystemTimer.LoadData(file);
|
||||
{
|
||||
m_SystemTimer.LoadData(file);
|
||||
}
|
||||
unzCloseCurrentFile(file);
|
||||
port = unzGoToNextFile(file);
|
||||
|
@ -1675,27 +1677,32 @@ bool CN64System::LoadState(LPCSTR FileName)
|
|||
unzClose(file);
|
||||
}
|
||||
if (!LoadedZipFile)
|
||||
{
|
||||
{
|
||||
HANDLE hSaveFile = CreateFile(FileNameStr.c_str(),GENERIC_WRITE | GENERIC_READ, FILE_SHARE_READ,NULL,
|
||||
OPEN_EXISTING,FILE_ATTRIBUTE_NORMAL | FILE_FLAG_RANDOM_ACCESS, NULL);
|
||||
if (hSaveFile == INVALID_HANDLE_VALUE)
|
||||
{
|
||||
g_Notify->DisplayMessage(5,L"%s %s",GS(MSG_UNABLED_LOAD_STATE),FileNameStr.ToUTF16().c_str());
|
||||
{
|
||||
g_Notify->DisplayMessage(5,L"%s %s",GS(MSG_UNABLED_LOAD_STATE),FileNameStr.ToUTF16().c_str());
|
||||
return false;
|
||||
}
|
||||
SetFilePointer(hSaveFile,0,NULL,FILE_BEGIN);
|
||||
|
||||
SetFilePointer(hSaveFile,0,NULL,FILE_BEGIN);
|
||||
ReadFile( hSaveFile,&Value,sizeof(Value),&dwRead,NULL);
|
||||
if (Value != 0x23D8A6C8) { return FALSE; }
|
||||
ReadFile( hSaveFile,&SaveRDRAMSize,sizeof(SaveRDRAMSize),&dwRead,NULL);
|
||||
if (Value != 0x23D8A6C8)
|
||||
return false;
|
||||
|
||||
ReadFile( hSaveFile,&SaveRDRAMSize,sizeof(SaveRDRAMSize),&dwRead,NULL);
|
||||
//Check header
|
||||
BYTE LoadHeader[64];
|
||||
ReadFile( hSaveFile,LoadHeader,0x40,&dwRead,NULL);
|
||||
ReadFile( hSaveFile,LoadHeader,0x40,&dwRead,NULL);
|
||||
if (memcmp(LoadHeader,g_Rom->GetRomAddress(),0x40) != 0)
|
||||
{
|
||||
//if (inFullScreen) { return FALSE; }
|
||||
{
|
||||
//if (inFullScreen) { return false; }
|
||||
int result = MessageBoxW(NULL,GS(MSG_SAVE_STATE_HEADER),GS(MSG_MSGBOX_TITLE),
|
||||
MB_YESNO|MB_ICONQUESTION|MB_DEFBUTTON2);
|
||||
if (result == IDNO) { return FALSE; }
|
||||
|
||||
if (result == IDNO)
|
||||
return false;
|
||||
}
|
||||
Reset(false,true);
|
||||
m_MMU_VM.UnProtectMemory(0x80000000,0x80000000 + g_Settings->LoadDword(Game_RDRamSize) - 4);
|
||||
|
@ -1737,7 +1744,7 @@ bool CN64System::LoadState(LPCSTR FileName)
|
|||
|
||||
//Fix Random Register
|
||||
while ((int)m_Reg.RANDOM_REGISTER < (int)m_Reg.WIRED_REGISTER)
|
||||
{
|
||||
{
|
||||
m_Reg.RANDOM_REGISTER += 32 - m_Reg.WIRED_REGISTER;
|
||||
}
|
||||
//Fix up timer
|
||||
|
@ -1767,7 +1774,7 @@ bool CN64System::LoadState(LPCSTR FileName)
|
|||
if (bFastSP() && m_Recomp) { m_Recomp->ResetMemoryStackPos(); }
|
||||
|
||||
if (g_Settings->LoadDword(Game_CpuType) == CPU_SyncCores)
|
||||
{
|
||||
{
|
||||
if (m_SyncCPU)
|
||||
{
|
||||
for (int i = 0; i < (sizeof(m_LastSuccessSyncPC)/sizeof(m_LastSuccessSyncPC[0])); i++)
|
||||
|
@ -1782,7 +1789,7 @@ bool CN64System::LoadState(LPCSTR FileName)
|
|||
}
|
||||
WriteTrace(TraceDebug,__FUNCTION__ ": 13");
|
||||
std::wstring LoadMsg = g_Lang->GetString(MSG_LOADED_STATE);
|
||||
g_Notify->DisplayMessage(5,L"%s %s",LoadMsg.c_str(),CPath(FileNameStr).GetNameExtension().ToUTF16().c_str());
|
||||
g_Notify->DisplayMessage(5,L"%s %s",LoadMsg.c_str(),CPath(FileNameStr).GetNameExtension().ToUTF16().c_str());
|
||||
WriteTrace(TraceDebug,__FUNCTION__ ": Done");
|
||||
return true;
|
||||
}
|
||||
|
|
|
@ -144,7 +144,7 @@ private:
|
|||
bool m_RspBroke;
|
||||
bool m_DMAUsed;
|
||||
DWORD m_Buttons[4];
|
||||
BOOL m_TestTimer;
|
||||
bool m_TestTimer;
|
||||
DWORD m_NextInstruction;
|
||||
DWORD m_JumpToLocation;
|
||||
DWORD m_TLBLoadAddress;
|
||||
|
|
|
@ -101,16 +101,17 @@ bool CN64Rom::AllocateAndLoadN64Image ( const char * FileLoc, bool LoadBootCodeO
|
|||
return true;
|
||||
}
|
||||
|
||||
bool CN64Rom::AllocateAndLoadZipImage ( const char * FileLoc, bool LoadBootCodeOnly ) {
|
||||
bool CN64Rom::AllocateAndLoadZipImage(const char * FileLoc, bool LoadBootCodeOnly) {
|
||||
unzFile file = unzOpen(FileLoc);
|
||||
if (file == NULL) { return false; }
|
||||
if (file == NULL)
|
||||
return false;
|
||||
|
||||
int port = unzGoToFirstFile(file);
|
||||
bool FoundRom = FALSE;
|
||||
bool FoundRom = false;
|
||||
|
||||
//scan through all files in zip to a suitable file is found
|
||||
while(port == UNZ_OK && FoundRom == FALSE) {
|
||||
unz_file_info info;
|
||||
while(port == UNZ_OK && !FoundRom) {
|
||||
unz_file_info info;
|
||||
char zname[_MAX_PATH];
|
||||
|
||||
unzGetCurrentFileInfo(file, &info, zname, sizeof(zname), NULL,0, NULL,0);
|
||||
|
@ -185,9 +186,9 @@ bool CN64Rom::AllocateAndLoadZipImage ( const char * FileLoc, bool LoadBootCodeO
|
|||
g_Notify->DisplayMessage(1,L"");
|
||||
}
|
||||
unzCloseCurrentFile(file);
|
||||
if (FoundRom == FALSE) {
|
||||
|
||||
if (!FoundRom)
|
||||
port = unzGoToNextFile(file);
|
||||
}
|
||||
}
|
||||
unzClose(file);
|
||||
|
||||
|
|
|
@ -12,17 +12,18 @@
|
|||
|
||||
void InPermLoop();
|
||||
|
||||
bool DelaySlotEffectsCompare ( DWORD PC, DWORD Reg1, DWORD Reg2 );
|
||||
bool DelaySlotEffectsCompare(DWORD PC, DWORD Reg1, DWORD Reg2);
|
||||
|
||||
int DelaySlotEffectsJump (DWORD JumpPC) {
|
||||
static bool DelaySlotEffectsJump(DWORD JumpPC) {
|
||||
OPCODE Command;
|
||||
|
||||
if (!g_MMU->LW_VAddr(JumpPC, Command.Hex)) { return TRUE; }
|
||||
if (!g_MMU->LW_VAddr(JumpPC, Command.Hex))
|
||||
return true;
|
||||
|
||||
switch (Command.op) {
|
||||
case R4300i_SPECIAL:
|
||||
switch (Command.funct) {
|
||||
case R4300i_SPECIAL_JR: return DelaySlotEffectsCompare(JumpPC,Command.rs,0);
|
||||
case R4300i_SPECIAL_JR: return DelaySlotEffectsCompare(JumpPC,Command.rs,0);
|
||||
case R4300i_SPECIAL_JALR: return DelaySlotEffectsCompare(JumpPC,Command.rs,31);
|
||||
}
|
||||
break;
|
||||
|
@ -39,7 +40,7 @@ int DelaySlotEffectsJump (DWORD JumpPC) {
|
|||
break;
|
||||
case R4300i_JAL:
|
||||
case R4300i_SPECIAL_JALR: return DelaySlotEffectsCompare(JumpPC,31,0); break;
|
||||
case R4300i_J: return FALSE;
|
||||
case R4300i_J: return false;
|
||||
case R4300i_BEQ:
|
||||
case R4300i_BNE:
|
||||
case R4300i_BLEZ:
|
||||
|
@ -54,19 +55,20 @@ int DelaySlotEffectsJump (DWORD JumpPC) {
|
|||
case R4300i_COP1_BC_BCFL:
|
||||
case R4300i_COP1_BC_BCTL:
|
||||
{
|
||||
int EffectDelaySlot;
|
||||
bool EffectDelaySlot = false;
|
||||
OPCODE NewCommand;
|
||||
|
||||
if (!g_MMU->LW_VAddr(JumpPC + 4, NewCommand.Hex)) { return TRUE; }
|
||||
|
||||
EffectDelaySlot = FALSE;
|
||||
if (!g_MMU->LW_VAddr(JumpPC + 4, NewCommand.Hex)) {
|
||||
return true;
|
||||
}
|
||||
|
||||
if (NewCommand.op == R4300i_CP1) {
|
||||
if (NewCommand.fmt == R4300i_COP1_S && (NewCommand.funct & 0x30) == 0x30 ) {
|
||||
EffectDelaySlot = TRUE;
|
||||
}
|
||||
if (NewCommand.fmt == R4300i_COP1_D && (NewCommand.funct & 0x30) == 0x30 ) {
|
||||
EffectDelaySlot = TRUE;
|
||||
}
|
||||
if (NewCommand.fmt == R4300i_COP1_S && (NewCommand.funct & 0x30) == 0x30) {
|
||||
EffectDelaySlot = true;
|
||||
}
|
||||
if (NewCommand.fmt == R4300i_COP1_D && (NewCommand.funct & 0x30) == 0x30) {
|
||||
EffectDelaySlot = true;
|
||||
}
|
||||
}
|
||||
return EffectDelaySlot;
|
||||
}
|
||||
|
@ -81,7 +83,7 @@ int DelaySlotEffectsJump (DWORD JumpPC) {
|
|||
case R4300i_BGTZL:
|
||||
return DelaySlotEffectsCompare(JumpPC,Command.rs,Command.rt);
|
||||
}
|
||||
return TRUE;
|
||||
return true;
|
||||
}
|
||||
|
||||
CCodeSection::CCodeSection( CCodeBlock * CodeBlock, DWORD EnterPC, DWORD ID, bool LinkAllowed) :
|
||||
|
@ -106,7 +108,7 @@ CCodeSection::~CCodeSection()
|
|||
{
|
||||
}
|
||||
|
||||
void CCodeSection::CompileExit ( DWORD JumpPC, DWORD TargetPC, CRegInfo &ExitRegSet, CExitInfo::EXIT_REASON reason, int CompileNow, void (*x86Jmp)(const char * Label, DWORD Value))
|
||||
void CCodeSection::CompileExit(DWORD JumpPC, DWORD TargetPC, CRegInfo &ExitRegSet, CExitInfo::EXIT_REASON reason, bool CompileNow, void(*x86Jmp)(const char * Label, DWORD Value))
|
||||
{
|
||||
if (!CompileNow)
|
||||
{
|
||||
|
@ -569,7 +571,7 @@ void CCodeSection::GenerateSectionLinkage()
|
|||
{
|
||||
if (JumpInfo[i]->FallThrough && !TargetSection[i]->GenerateX86Code(m_BlockInfo->NextTest()))
|
||||
{
|
||||
JumpInfo[i]->FallThrough = FALSE;
|
||||
JumpInfo[i]->FallThrough = false;
|
||||
JmpLabel32(JumpInfo[i]->BranchLabel.c_str(),0);
|
||||
JumpInfo[i]->LinkLocation = (DWORD *)(m_RecompPos - 4);
|
||||
}
|
||||
|
@ -859,10 +861,12 @@ void CCodeSection::SetContinueAddress (DWORD JumpPC, DWORD TargetPC)
|
|||
|
||||
void CCodeSection::CompileCop1Test()
|
||||
{
|
||||
if (m_RegWorkingSet.FpuBeenUsed()) { return; }
|
||||
if (m_RegWorkingSet.FpuBeenUsed())
|
||||
return;
|
||||
|
||||
TestVariable(STATUS_CU1,&g_Reg->STATUS_REGISTER,"STATUS_REGISTER");
|
||||
CompileExit(m_CompilePC,m_CompilePC,m_RegWorkingSet,CExitInfo::COP1_Unuseable,FALSE,JeLabel32);
|
||||
m_RegWorkingSet.FpuBeenUsed() = TRUE;
|
||||
CompileExit(m_CompilePC,m_CompilePC,m_RegWorkingSet,CExitInfo::COP1_Unuseable,false,JeLabel32);
|
||||
m_RegWorkingSet.FpuBeenUsed() = true;
|
||||
}
|
||||
|
||||
bool CCodeSection::ParentContinue()
|
||||
|
|
|
@ -28,7 +28,7 @@ public:
|
|||
bool CreateSectionLinkage ();
|
||||
bool GenerateX86Code ( DWORD Test );
|
||||
void GenerateSectionLinkage ();
|
||||
void CompileExit ( DWORD JumpPC, DWORD TargetPC, CRegInfo &ExitRegSet, CExitInfo::EXIT_REASON reason, int CompileNow, void (*x86Jmp)(const char * Label, DWORD Value));
|
||||
void CompileExit ( DWORD JumpPC, DWORD TargetPC, CRegInfo &ExitRegSet, CExitInfo::EXIT_REASON reason, bool CompileNow, void (*x86Jmp)(const char * Label, DWORD Value));
|
||||
void DetermineLoop ( DWORD Test, DWORD Test2, DWORD TestID );
|
||||
bool FixConstants ( DWORD Test );
|
||||
CCodeSection * ExistingSection ( DWORD Addr, DWORD Test );
|
||||
|
|
|
@ -30,20 +30,20 @@ CRecompMemory::~CRecompMemory()
|
|||
bool CRecompMemory::AllocateMemory()
|
||||
{
|
||||
BYTE * RecompCodeBase = (BYTE *)VirtualAlloc( NULL, MaxCompileBufferSize + 4, MEM_RESERVE|MEM_TOP_DOWN, PAGE_EXECUTE_READWRITE);
|
||||
if (RecompCodeBase==NULL)
|
||||
{
|
||||
if (RecompCodeBase == NULL)
|
||||
{
|
||||
WriteTrace(TraceError,__FUNCTION__ ": failed to allocate RecompCodeBase");
|
||||
g_Notify->DisplayError(MSG_MEM_ALLOC_ERROR);
|
||||
return FALSE;
|
||||
return false;
|
||||
}
|
||||
|
||||
m_RecompCode = (BYTE *)VirtualAlloc( RecompCodeBase, InitialCompileBufferSize, MEM_COMMIT, PAGE_EXECUTE_READWRITE);
|
||||
if (m_RecompCode==NULL)
|
||||
{
|
||||
if (m_RecompCode == NULL)
|
||||
{
|
||||
WriteTrace(TraceError,__FUNCTION__ ": failed to commit initial buffer");
|
||||
VirtualFree( RecompCodeBase, 0 , MEM_RELEASE);
|
||||
g_Notify->DisplayError(MSG_MEM_ALLOC_ERROR);
|
||||
return FALSE;
|
||||
return false;
|
||||
}
|
||||
m_RecompSize = InitialCompileBufferSize;
|
||||
m_RecompPos = m_RecompCode;
|
||||
|
|
File diff suppressed because it is too large
Load Diff
|
@ -28,8 +28,8 @@ protected:
|
|||
typedef void ( * BranchFunction )();
|
||||
|
||||
/************************** Branch functions ************************/
|
||||
static void Compile_Branch ( BranchFunction CompareFunc, BRANCH_TYPE BranchType, BOOL Link);
|
||||
static void Compile_BranchLikely ( BranchFunction CompareFunc, BOOL Link);
|
||||
static void Compile_Branch ( BranchFunction CompareFunc, BRANCH_TYPE BranchType, bool Link);
|
||||
static void Compile_BranchLikely ( BranchFunction CompareFunc, bool Link);
|
||||
static void BNE_Compare();
|
||||
static void BEQ_Compare();
|
||||
static void BGTZ_Compare();
|
||||
|
@ -209,7 +209,7 @@ protected:
|
|||
static void UpdateCounters(CRegInfo & RegSet, bool CheckTimer, bool ClearValues = false);
|
||||
static void CompileSystemCheck(DWORD TargetPC, const CRegInfo & RegSet);
|
||||
static void ChangeDefaultRoundingModel();
|
||||
static void OverflowDelaySlot(BOOL TestTimer);
|
||||
static void OverflowDelaySlot(bool TestTimer);
|
||||
|
||||
|
||||
|
||||
|
@ -256,7 +256,7 @@ protected:
|
|||
{
|
||||
m_RegWorkingSet.Load_FPR_ToTop(Reg,RegToLoad,Format);
|
||||
}
|
||||
static BOOL RegInStack ( int Reg, CRegInfo::FPU_STATE Format )
|
||||
static bool RegInStack ( int Reg, CRegInfo::FPU_STATE Format )
|
||||
{
|
||||
return m_RegWorkingSet.RegInStack(Reg,Format);
|
||||
}
|
||||
|
@ -297,9 +297,9 @@ protected:
|
|||
{
|
||||
return m_RegWorkingSet.Map_MemoryStack(Reg,bMapRegister,LoadValue);
|
||||
}
|
||||
static x86Reg Map_TempReg ( x86Reg Reg, int MipsReg, BOOL LoadHiWord )
|
||||
static x86Reg Map_TempReg ( x86Reg Reg, int MipsReg, bool LoadHiWord )
|
||||
{
|
||||
return m_RegWorkingSet.Map_TempReg(Reg,MipsReg,LoadHiWord);
|
||||
return m_RegWorkingSet.Map_TempReg(Reg,MipsReg,LoadHiWord);
|
||||
}
|
||||
static void ProtectGPR ( DWORD Reg )
|
||||
{
|
||||
|
|
|
@ -141,15 +141,15 @@ void CRegInfo::FixRoundModel(FPU_ROUND RoundMethod )
|
|||
}
|
||||
CPU_Message(" FixRoundModel: CurrentRoundingModel: %s targetRoundModel: %s",RoundingModelName(GetRoundingModel()),RoundingModelName(RoundMethod));
|
||||
|
||||
m_fpuControl = 0;
|
||||
m_fpuControl = 0;
|
||||
fpuStoreControl(&m_fpuControl, "m_fpuControl");
|
||||
x86Reg reg = Map_TempReg(x86_Any,-1,FALSE);
|
||||
x86Reg reg = Map_TempReg(x86_Any, -1, false);
|
||||
MoveVariableToX86reg(&m_fpuControl, "m_fpuControl", reg);
|
||||
AndConstToX86Reg(reg, 0xF3FF);
|
||||
|
||||
|
||||
if (RoundMethod == RoundDefault)
|
||||
{
|
||||
x86Reg RoundReg = Map_TempReg(x86_Any,-1,FALSE);
|
||||
{
|
||||
x86Reg RoundReg = Map_TempReg(x86_Any, -1, false);
|
||||
MoveVariableToX86reg(&g_Reg->m_RoundingModel,"m_RoundingModel", RoundReg);
|
||||
ShiftLeftSignImmed(RoundReg,2);
|
||||
OrX86RegToX86Reg(reg,RoundReg);
|
||||
|
@ -179,8 +179,8 @@ void CRegInfo::ChangeFPURegFormat (int Reg, FPU_STATE OldFormat, FPU_STATE NewFo
|
|||
continue;
|
||||
}
|
||||
if (x86fpu_State[i] != OldFormat || x86fpu_StateChanged[i])
|
||||
{
|
||||
UnMap_FPR(Reg,TRUE);
|
||||
{
|
||||
UnMap_FPR(Reg, true);
|
||||
Load_FPR_ToTop(Reg,Reg,OldFormat);
|
||||
} else {
|
||||
CPU_Message(" regcache: Changed format of ST(%d) from %s to %s", (i - StackTopPos() + 8) & 7,Format_Name[OldFormat],Format_Name[NewFormat]);
|
||||
|
@ -210,14 +210,14 @@ void CRegInfo::Load_FPR_ToTop ( int Reg, int RegToLoad, FPU_STATE Format)
|
|||
if (Reg < 0) { g_Notify->DisplayError(L"Load_FPR_ToTop\nReg < 0 ???"); return; }
|
||||
|
||||
if (Format == FPU_Double || Format == FPU_Qword) {
|
||||
UnMap_FPR(Reg + 1,TRUE);
|
||||
UnMap_FPR(RegToLoad + 1,TRUE);
|
||||
UnMap_FPR(Reg + 1, true);
|
||||
UnMap_FPR(RegToLoad + 1, true);
|
||||
} else {
|
||||
if ((Reg & 1) != 0) {
|
||||
for (i = 0; i < 8; i++) {
|
||||
if (x86fpu_MappedTo[i] == (Reg - 1)) {
|
||||
if (x86fpu_State[i] == FPU_Double || x86fpu_State[i] == FPU_Qword) {
|
||||
UnMap_FPR(Reg,TRUE);
|
||||
UnMap_FPR(Reg, true);
|
||||
}
|
||||
i = 8;
|
||||
}
|
||||
|
@ -227,7 +227,7 @@ void CRegInfo::Load_FPR_ToTop ( int Reg, int RegToLoad, FPU_STATE Format)
|
|||
for (i = 0; i < 8; i++) {
|
||||
if (x86fpu_MappedTo[i] == (RegToLoad - 1)) {
|
||||
if (x86fpu_State[i] == FPU_Double || x86fpu_State[i] == FPU_Qword) {
|
||||
UnMap_FPR(RegToLoad,TRUE);
|
||||
UnMap_FPR(RegToLoad, true);
|
||||
}
|
||||
i = 8;
|
||||
}
|
||||
|
@ -243,7 +243,7 @@ void CRegInfo::Load_FPR_ToTop ( int Reg, int RegToLoad, FPU_STATE Format)
|
|||
continue;
|
||||
}
|
||||
if (x86fpu_State[i] != Format) {
|
||||
UnMap_FPR(Reg,TRUE);
|
||||
UnMap_FPR(Reg, true);
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
@ -263,15 +263,15 @@ void CRegInfo::Load_FPR_ToTop ( int Reg, int RegToLoad, FPU_STATE Format)
|
|||
if (RegInStack(RegToLoad,Format)) {
|
||||
if (Reg != RegToLoad) {
|
||||
if (x86fpu_MappedTo[(StackTopPos() - 1) & 7] != RegToLoad) {
|
||||
UnMap_FPR(x86fpu_MappedTo[(StackTopPos() - 1) & 7],TRUE);
|
||||
UnMap_FPR(x86fpu_MappedTo[(StackTopPos() - 1) & 7], true);
|
||||
CPU_Message(" regcache: allocate ST(0) to %s", CRegName::FPR[Reg]);
|
||||
fpuLoadReg(&StackTopPos(),StackPosition(RegToLoad));
|
||||
fpuLoadReg(&StackTopPos(),StackPosition(RegToLoad));
|
||||
FpuRoundingModel(StackTopPos()) = RoundDefault;
|
||||
x86fpu_MappedTo[StackTopPos()] = Reg;
|
||||
x86fpu_State[StackTopPos()] = Format;
|
||||
x86fpu_StateChanged[StackTopPos()] = false;
|
||||
} else {
|
||||
UnMap_FPR(x86fpu_MappedTo[(StackTopPos() - 1) & 7],TRUE);
|
||||
UnMap_FPR(x86fpu_MappedTo[(StackTopPos() - 1) & 7], true);
|
||||
Load_FPR_ToTop (Reg, RegToLoad, Format);
|
||||
}
|
||||
} else {
|
||||
|
@ -306,15 +306,15 @@ void CRegInfo::Load_FPR_ToTop ( int Reg, int RegToLoad, FPU_STATE Format)
|
|||
char Name[50];
|
||||
x86Reg TempReg;
|
||||
|
||||
UnMap_FPR(x86fpu_MappedTo[(StackTopPos() - 1) & 7],TRUE);
|
||||
UnMap_FPR(x86fpu_MappedTo[(StackTopPos() - 1) & 7], true);
|
||||
for (i = 0; i < 8; i++) {
|
||||
if (x86fpu_MappedTo[i] == RegToLoad) {
|
||||
UnMap_FPR(RegToLoad,TRUE);
|
||||
UnMap_FPR(RegToLoad, true);
|
||||
i = 8;
|
||||
}
|
||||
}
|
||||
CPU_Message(" regcache: allocate ST(0) to %s", CRegName::FPR[Reg]);
|
||||
TempReg = Map_TempReg(x86_Any,-1,FALSE);
|
||||
TempReg = Map_TempReg(x86_Any, -1, false);
|
||||
switch (Format) {
|
||||
case FPU_Dword:
|
||||
sprintf(Name,"m_FPR_S[%d]",RegToLoad);
|
||||
|
@ -339,7 +339,7 @@ void CRegInfo::Load_FPR_ToTop ( int Reg, int RegToLoad, FPU_STATE Format)
|
|||
default:
|
||||
if (bHaveDebugger()) { g_Notify->DisplayError(L"Load_FPR_ToTop\nUnkown format to load %d",Format); }
|
||||
}
|
||||
SetX86Protected(TempReg,FALSE);
|
||||
SetX86Protected(TempReg, false);
|
||||
FpuRoundingModel(StackTopPos()) = RoundDefault;
|
||||
x86fpu_MappedTo[StackTopPos()] = Reg;
|
||||
x86fpu_State[StackTopPos()] = Format;
|
||||
|
@ -470,11 +470,11 @@ CX86Ops::x86Reg CRegInfo::UnMap_8BitTempReg()
|
|||
for (count = 0; count < 10; count ++) {
|
||||
if (!Is8BitReg((x86Reg)count)) { continue; }
|
||||
if (GetMipsRegState((x86Reg)count) == Temp_Mapped) {
|
||||
if (GetX86Protected((x86Reg)count) == FALSE) {
|
||||
if (GetX86Protected((x86Reg)count) == false) {
|
||||
CPU_Message(" regcache: unallocate %s from temp storage",x86_Name((x86Reg)count));
|
||||
SetX86Mapped((x86Reg)count, CRegInfo::NotMapped);
|
||||
return (x86Reg)count;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
return x86_Unknown;
|
||||
|
@ -573,7 +573,7 @@ void CRegInfo::Map_GPR_32bit (int MipsReg, bool SignValue, int MipsRegToLoad)
|
|||
CPU_Message(" regcache: unallocate %s from high 32bit of %s",x86_Name(GetMipsRegMapHi(MipsReg)),CRegName::GPR_Hi[MipsReg]);
|
||||
SetX86MapOrder(GetMipsRegMapHi(MipsReg),0);
|
||||
SetX86Mapped(GetMipsRegMapHi(MipsReg),NotMapped);
|
||||
SetX86Protected(GetMipsRegMapHi(MipsReg),FALSE);
|
||||
SetX86Protected(GetMipsRegMapHi(MipsReg), false);
|
||||
SetMipsRegHi(MipsReg,0);
|
||||
}
|
||||
Reg = GetMipsRegMapLo(MipsReg);
|
||||
|
@ -605,7 +605,7 @@ void CRegInfo::Map_GPR_32bit (int MipsReg, bool SignValue, int MipsRegToLoad)
|
|||
XorX86RegToX86Reg(Reg,Reg);
|
||||
}
|
||||
SetX86Mapped(Reg,GPR_Mapped);
|
||||
SetX86Protected(Reg,TRUE);
|
||||
SetX86Protected(Reg, true);
|
||||
SetMipsRegMapLo(MipsReg,Reg);
|
||||
SetMipsRegState(MipsReg,SignValue ? STATE_MAPPED_32_SIGN : STATE_MAPPED_32_ZERO);
|
||||
}
|
||||
|
@ -628,25 +628,25 @@ void CRegInfo::Map_GPR_64bit ( int MipsReg, int MipsRegToLoad)
|
|||
if (bHaveDebugger()) { g_Notify->DisplayError(L"Map_GPR_64bit\n\nOut of registers"); }
|
||||
return;
|
||||
}
|
||||
SetX86Protected(x86Hi,TRUE);
|
||||
SetX86Protected(x86Hi, true);
|
||||
|
||||
x86lo = FreeX86Reg();
|
||||
if (x86lo < 0) { g_Notify->DisplayError(L"Map_GPR_64bit\n\nOut of registers"); return; }
|
||||
SetX86Protected(x86lo,TRUE);
|
||||
SetX86Protected(x86lo, true);
|
||||
|
||||
CPU_Message(" regcache: allocate %s to hi word of %s",x86_Name(x86Hi),CRegName::GPR[MipsReg]);
|
||||
CPU_Message(" regcache: allocate %s to low word of %s",x86_Name(x86lo),CRegName::GPR[MipsReg]);
|
||||
} else {
|
||||
x86lo = GetMipsRegMapLo(MipsReg);
|
||||
if (Is32Bit(MipsReg)) {
|
||||
SetX86Protected(x86lo,TRUE);
|
||||
SetX86Protected(x86lo, true);
|
||||
x86Hi = FreeX86Reg();
|
||||
if (x86Hi == x86_Unknown)
|
||||
{
|
||||
g_Notify->BreakPoint(__FILEW__,__LINE__);
|
||||
return;
|
||||
}
|
||||
SetX86Protected(x86Hi,TRUE);
|
||||
SetX86Protected(x86Hi, true);
|
||||
|
||||
CPU_Message(" regcache: allocate %s to hi word of %s",x86_Name(x86Hi),CRegName::GPR[MipsReg]);
|
||||
} else {
|
||||
|
@ -710,7 +710,7 @@ CPU_Message("Map_GPR_64bit 11");
|
|||
SetMipsRegState(MipsReg,STATE_MAPPED_64);
|
||||
}
|
||||
|
||||
CX86Ops::x86Reg CRegInfo::Map_TempReg (CX86Ops::x86Reg Reg, int MipsReg, BOOL LoadHiWord)
|
||||
CX86Ops::x86Reg CRegInfo::Map_TempReg (CX86Ops::x86Reg Reg, int MipsReg, bool LoadHiWord)
|
||||
{
|
||||
int count;
|
||||
|
||||
|
@ -771,7 +771,7 @@ CX86Ops::x86Reg CRegInfo::Map_TempReg (CX86Ops::x86Reg Reg, int MipsReg, BOOL Lo
|
|||
{
|
||||
if (NewReg == x86_Unknown)
|
||||
{
|
||||
UnMap_GPR(count,TRUE);
|
||||
UnMap_GPR(count, true);
|
||||
break;
|
||||
}
|
||||
CPU_Message(" regcache: change allocation of %s from %s to %s",CRegName::GPR[count],x86_Name(Reg),x86_Name(NewReg));
|
||||
|
@ -779,14 +779,15 @@ CX86Ops::x86Reg CRegInfo::Map_TempReg (CX86Ops::x86Reg Reg, int MipsReg, BOOL Lo
|
|||
SetX86MapOrder(NewReg,GetX86MapOrder(Reg));
|
||||
SetMipsRegMapLo(count,NewReg);
|
||||
MoveX86RegToX86Reg(Reg,NewReg);
|
||||
if (MipsReg == count && LoadHiWord == FALSE) { MipsReg = -1; }
|
||||
if (MipsReg == count && !LoadHiWord)
|
||||
MipsReg = -1;
|
||||
break;
|
||||
}
|
||||
if (Is64Bit(count) && GetMipsRegMapHi(count) == Reg)
|
||||
if (Is64Bit(count) && GetMipsRegMapHi(count) == Reg)
|
||||
{
|
||||
if (NewReg == x86_Unknown)
|
||||
if (NewReg == x86_Unknown)
|
||||
{
|
||||
UnMap_GPR(count,TRUE);
|
||||
UnMap_GPR(count, true);
|
||||
break;
|
||||
}
|
||||
CPU_Message(" regcache: change allocation of %s from %s to %s",CRegName::GPR_Hi[count],x86_Name(Reg),x86_Name(NewReg));
|
||||
|
@ -794,7 +795,8 @@ CX86Ops::x86Reg CRegInfo::Map_TempReg (CX86Ops::x86Reg Reg, int MipsReg, BOOL Lo
|
|||
SetX86MapOrder(NewReg,GetX86MapOrder(Reg));
|
||||
SetMipsRegMapHi(count,NewReg);
|
||||
MoveX86RegToX86Reg(Reg,NewReg);
|
||||
if (MipsReg == count && LoadHiWord == TRUE) { MipsReg = -1; }
|
||||
if (MipsReg == count && LoadHiWord)
|
||||
MipsReg = -1;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
@ -822,7 +824,7 @@ CX86Ops::x86Reg CRegInfo::Map_TempReg (CX86Ops::x86Reg Reg, int MipsReg, BOOL Lo
|
|||
MoveConstToX86reg(0,Reg);
|
||||
}
|
||||
} else {
|
||||
if (Is64Bit(MipsReg))
|
||||
if (Is64Bit(MipsReg))
|
||||
{
|
||||
MoveConstToX86reg(GetMipsRegHi(MipsReg),Reg);
|
||||
} else {
|
||||
|
@ -840,11 +842,11 @@ CX86Ops::x86Reg CRegInfo::Map_TempReg (CX86Ops::x86Reg Reg, int MipsReg, BOOL Lo
|
|||
}
|
||||
}
|
||||
SetX86Mapped(Reg,Temp_Mapped);
|
||||
SetX86Protected(Reg,TRUE);
|
||||
for (count = 0; count < 10; count ++)
|
||||
SetX86Protected(Reg, true);
|
||||
for (count = 0; count < 10; count++)
|
||||
{
|
||||
int MapOrder = GetX86MapOrder((x86Reg)count);
|
||||
if (MapOrder > 0) {
|
||||
if (MapOrder > 0) {
|
||||
SetX86MapOrder((x86Reg)count,MapOrder + 1);
|
||||
}
|
||||
}
|
||||
|
@ -853,18 +855,24 @@ CX86Ops::x86Reg CRegInfo::Map_TempReg (CX86Ops::x86Reg Reg, int MipsReg, BOOL Lo
|
|||
}
|
||||
|
||||
void CRegInfo::ProtectGPR(DWORD Reg) {
|
||||
if (IsUnknown(Reg) || IsConst(Reg)) { return; }
|
||||
if (Is64Bit(Reg)) {
|
||||
SetX86Protected(GetMipsRegMapHi(Reg),TRUE);
|
||||
if (IsUnknown(Reg) || IsConst(Reg)) {
|
||||
return;
|
||||
}
|
||||
SetX86Protected(GetMipsRegMapLo(Reg),TRUE);
|
||||
if (Is64Bit(Reg)) {
|
||||
SetX86Protected(GetMipsRegMapHi(Reg), true);
|
||||
}
|
||||
|
||||
SetX86Protected(GetMipsRegMapLo(Reg), true);
|
||||
}
|
||||
|
||||
void CRegInfo::UnProtectGPR(DWORD Reg) {
|
||||
if (IsUnknown(Reg) || IsConst(Reg)) { return; }
|
||||
if (Is64Bit(Reg)) {
|
||||
SetX86Protected(GetMipsRegMapHi(Reg),false);
|
||||
if (IsUnknown(Reg) || IsConst(Reg)) {
|
||||
return;
|
||||
}
|
||||
if (Is64Bit(Reg)) {
|
||||
SetX86Protected(GetMipsRegMapHi(Reg), false);
|
||||
}
|
||||
|
||||
SetX86Protected(GetMipsRegMapLo(Reg),false);
|
||||
}
|
||||
|
||||
|
@ -876,21 +884,21 @@ void CRegInfo::ResetX86Protection()
|
|||
}
|
||||
}
|
||||
|
||||
BOOL CRegInfo::RegInStack( int Reg, FPU_STATE Format) {
|
||||
int i;
|
||||
|
||||
for (i = 0; i < 8; i++)
|
||||
bool CRegInfo::RegInStack( int Reg, FPU_STATE Format) {
|
||||
for (int i = 0; i < 8; i++)
|
||||
{
|
||||
if (x86fpu_MappedTo[i] == Reg)
|
||||
if (x86fpu_MappedTo[i] == Reg)
|
||||
{
|
||||
if (x86fpu_State[i] == Format || Format == FPU_Any)
|
||||
{
|
||||
return TRUE;
|
||||
if (x86fpu_State[i] == Format || Format == FPU_Any)
|
||||
{
|
||||
return true;
|
||||
}
|
||||
return FALSE;
|
||||
|
||||
return false;
|
||||
}
|
||||
}
|
||||
return FALSE;
|
||||
|
||||
return false;
|
||||
}
|
||||
|
||||
void CRegInfo::UnMap_AllFPRs()
|
||||
|
@ -898,7 +906,7 @@ void CRegInfo::UnMap_AllFPRs()
|
|||
for (;;) {
|
||||
int StackPos = StackTopPos();
|
||||
if (x86fpu_MappedTo[StackPos] != -1 ) {
|
||||
UnMap_FPR(x86fpu_MappedTo[StackPos],TRUE);
|
||||
UnMap_FPR(x86fpu_MappedTo[StackPos], true);
|
||||
continue;
|
||||
}
|
||||
//see if any more registers mapped
|
||||
|
@ -931,7 +939,7 @@ void CRegInfo::UnMap_FPR (int Reg, int WriteBackValue )
|
|||
} else {
|
||||
CRegInfo::FPU_ROUND RoundingModel = FpuRoundingModel(StackTopPos());
|
||||
FPU_STATE RegState = x86fpu_State[StackTopPos()];
|
||||
BOOL Changed = x86fpu_StateChanged[StackTopPos()];
|
||||
bool Changed = x86fpu_StateChanged[StackTopPos()];
|
||||
DWORD MappedTo = x86fpu_MappedTo[StackTopPos()];
|
||||
FpuRoundingModel(StackTopPos()) = FpuRoundingModel(i);
|
||||
x86fpu_MappedTo[StackTopPos()] = x86fpu_MappedTo[i];
|
||||
|
@ -948,37 +956,37 @@ void CRegInfo::UnMap_FPR (int Reg, int WriteBackValue )
|
|||
FixRoundModel(FpuRoundingModel(i));
|
||||
|
||||
RegPos = StackTopPos();
|
||||
x86Reg TempReg = Map_TempReg(x86_Any,-1,FALSE);
|
||||
x86Reg TempReg = Map_TempReg(x86_Any, -1, false);
|
||||
switch (x86fpu_State[StackTopPos()]) {
|
||||
case FPU_Dword:
|
||||
sprintf(Name,"_FPR_S[%d]",x86fpu_MappedTo[StackTopPos()]);
|
||||
MoveVariableToX86reg(&_FPR_S[x86fpu_MappedTo[StackTopPos()]],Name,TempReg);
|
||||
fpuStoreIntegerDwordFromX86Reg(&StackTopPos(),TempReg, TRUE);
|
||||
fpuStoreIntegerDwordFromX86Reg(&StackTopPos(),TempReg, true);
|
||||
break;
|
||||
case FPU_Qword:
|
||||
sprintf(Name,"_FPR_D[%d]",x86fpu_MappedTo[StackTopPos()]);
|
||||
MoveVariableToX86reg(&_FPR_D[x86fpu_MappedTo[StackTopPos()]],Name,TempReg);
|
||||
fpuStoreIntegerQwordFromX86Reg(&StackTopPos(),TempReg, TRUE);
|
||||
fpuStoreIntegerQwordFromX86Reg(&StackTopPos(),TempReg, true);
|
||||
break;
|
||||
case FPU_Float:
|
||||
sprintf(Name,"_FPR_S[%d]",x86fpu_MappedTo[StackTopPos()]);
|
||||
MoveVariableToX86reg(&_FPR_S[x86fpu_MappedTo[StackTopPos()]],Name,TempReg);
|
||||
fpuStoreDwordFromX86Reg(&StackTopPos(),TempReg, TRUE);
|
||||
fpuStoreDwordFromX86Reg(&StackTopPos(),TempReg, true);
|
||||
break;
|
||||
case FPU_Double:
|
||||
sprintf(Name,"_FPR_D[%d]",x86fpu_MappedTo[StackTopPos()]);
|
||||
MoveVariableToX86reg(&_FPR_D[x86fpu_MappedTo[StackTopPos()]],Name,TempReg);
|
||||
fpuStoreQwordFromX86Reg(&StackTopPos(),TempReg, TRUE);
|
||||
fpuStoreQwordFromX86Reg(&StackTopPos(),TempReg, true);
|
||||
break;
|
||||
default:
|
||||
if (bHaveDebugger()) { g_Notify->DisplayError(__FUNCTIONW__ L"\nUnknown format to load %d",x86fpu_State[StackTopPos()]); }
|
||||
}
|
||||
SetX86Protected(TempReg,FALSE);
|
||||
SetX86Protected(TempReg, false);
|
||||
FpuRoundingModel(RegPos) = RoundDefault;
|
||||
x86fpu_MappedTo[RegPos] = -1;
|
||||
x86fpu_State[RegPos] = FPU_Unknown;
|
||||
x86fpu_StateChanged[RegPos] = false;
|
||||
} else {
|
||||
} else {
|
||||
fpuFree((x86FpuValues)((i - StackTopPos()) & 7));
|
||||
FpuRoundingModel(i) = RoundDefault;
|
||||
x86fpu_MappedTo[i] = -1;
|
||||
|
@ -1022,11 +1030,11 @@ void CRegInfo::UnMap_GPR (DWORD Reg, bool WriteBackValue)
|
|||
if (Is64Bit(Reg)) {
|
||||
CPU_Message(" regcache: unallocate %s from %s",x86_Name(GetMipsRegMapHi(Reg)),CRegName::GPR_Hi[Reg]);
|
||||
SetX86Mapped(GetMipsRegMapHi(Reg),NotMapped);
|
||||
SetX86Protected(GetMipsRegMapHi(Reg),FALSE);
|
||||
SetX86Protected(GetMipsRegMapHi(Reg), false);
|
||||
}
|
||||
CPU_Message(" regcache: unallocate %s from %s",x86_Name(GetMipsRegMapLo(Reg)),CRegName::GPR_Lo[Reg]);
|
||||
SetX86Mapped(GetMipsRegMapLo(Reg),NotMapped);
|
||||
SetX86Protected(GetMipsRegMapLo(Reg),FALSE);
|
||||
SetX86Protected(GetMipsRegMapLo(Reg), false);
|
||||
if (!WriteBackValue)
|
||||
{
|
||||
SetMipsRegState(Reg,STATE_UNKNOWN);
|
||||
|
@ -1075,7 +1083,7 @@ CX86Ops::x86Reg CRegInfo::UnMap_TempReg()
|
|||
return Reg;
|
||||
}
|
||||
|
||||
bool CRegInfo::UnMap_X86reg ( CX86Ops::x86Reg Reg )
|
||||
bool CRegInfo::UnMap_X86reg(CX86Ops::x86Reg Reg)
|
||||
{
|
||||
int count;
|
||||
|
||||
|
@ -1083,47 +1091,53 @@ bool CRegInfo::UnMap_X86reg ( CX86Ops::x86Reg Reg )
|
|||
{
|
||||
if (!GetX86Protected(Reg))
|
||||
{
|
||||
return TRUE;
|
||||
return true;
|
||||
}
|
||||
} else if (GetX86Mapped(Reg) == CRegInfo::GPR_Mapped) {
|
||||
}
|
||||
else if (GetX86Mapped(Reg) == CRegInfo::GPR_Mapped)
|
||||
{
|
||||
for (count = 1; count < 32; count ++)
|
||||
{
|
||||
if (!IsMapped(count))
|
||||
{
|
||||
continue;
|
||||
}
|
||||
|
||||
if (Is64Bit(count) && GetMipsRegMapHi(count) == Reg)
|
||||
{
|
||||
if (GetX86Protected(Reg) == FALSE)
|
||||
if (!GetX86Protected(Reg))
|
||||
{
|
||||
UnMap_GPR(count,TRUE);
|
||||
return TRUE;
|
||||
UnMap_GPR(count, true);
|
||||
return true;
|
||||
}
|
||||
break;
|
||||
}
|
||||
if (GetMipsRegMapLo(count) == Reg)
|
||||
if (GetMipsRegMapLo(count) == Reg)
|
||||
{
|
||||
if (GetX86Protected(Reg) == FALSE)
|
||||
if (!GetX86Protected(Reg))
|
||||
{
|
||||
UnMap_GPR(count,TRUE);
|
||||
return TRUE;
|
||||
UnMap_GPR(count, true);
|
||||
return true;
|
||||
}
|
||||
break;
|
||||
}
|
||||
}
|
||||
} else if (GetX86Mapped(Reg) == CRegInfo::Temp_Mapped) {
|
||||
if (GetX86Protected(Reg) == FALSE) {
|
||||
}
|
||||
else if (GetX86Mapped(Reg) == CRegInfo::Temp_Mapped)
|
||||
{
|
||||
if (!GetX86Protected(Reg)) {
|
||||
CPU_Message(" regcache: unallocate %s from temp storage",x86_Name(Reg));
|
||||
SetX86Mapped(Reg,NotMapped);
|
||||
return TRUE;
|
||||
return true;
|
||||
}
|
||||
} else if (GetX86Mapped(Reg) == CRegInfo::Stack_Mapped) {
|
||||
}
|
||||
else if (GetX86Mapped(Reg) == CRegInfo::Stack_Mapped)
|
||||
{
|
||||
CPU_Message(" regcache: unallocate %s from Memory Stack",x86_Name(Reg));
|
||||
MoveX86regToVariable(Reg,&(g_Recompiler->MemoryStackPos()),"MemoryStack");
|
||||
SetX86Mapped(Reg,NotMapped);
|
||||
return TRUE;
|
||||
return true;
|
||||
}
|
||||
return FALSE;
|
||||
|
||||
return false;
|
||||
}
|
||||
|
||||
void CRegInfo::WriteBackRegisters()
|
||||
|
@ -1131,12 +1145,12 @@ void CRegInfo::WriteBackRegisters()
|
|||
UnMap_AllFPRs();
|
||||
|
||||
int count;
|
||||
bool bEdiZero = FALSE;
|
||||
bool bEsiSign = FALSE;
|
||||
bool bEdiZero = false;
|
||||
bool bEsiSign = false;
|
||||
|
||||
int X86RegCount = sizeof(x86_Registers)/ sizeof(x86_Registers[0]);
|
||||
for (int i = 0; i < X86RegCount; i++) { SetX86Protected(x86_Registers[i],FALSE); }
|
||||
for (int i = 0; i < X86RegCount; i++) { UnMap_X86reg(x86_Registers[i]); }
|
||||
for (int i = 0; i < X86RegCount; i++) { SetX86Protected(x86_Registers[i], false); }
|
||||
for (int i = 0; i < X86RegCount; i++) { UnMap_X86reg(x86_Registers[i]); }
|
||||
|
||||
/*************************************/
|
||||
|
||||
|
@ -1149,12 +1163,12 @@ void CRegInfo::WriteBackRegisters()
|
|||
if (!bEdiZero && (!GetMipsRegLo(count) || !(GetMipsRegLo(count) & 0x80000000)))
|
||||
{
|
||||
XorX86RegToX86Reg(x86_EDI, x86_EDI);
|
||||
bEdiZero = TRUE;
|
||||
bEdiZero = true;
|
||||
}
|
||||
if (!bEsiSign && (GetMipsRegLo(count) & 0x80000000))
|
||||
{
|
||||
MoveConstToX86reg(0xFFFFFFFF, x86_ESI);
|
||||
bEsiSign = TRUE;
|
||||
bEsiSign = true;
|
||||
}
|
||||
if ((GetMipsRegLo(count) & 0x80000000) != 0)
|
||||
{
|
||||
|
@ -1173,7 +1187,7 @@ void CRegInfo::WriteBackRegisters()
|
|||
if (!bEdiZero)
|
||||
{
|
||||
XorX86RegToX86Reg(x86_EDI, x86_EDI);
|
||||
bEdiZero = TRUE;
|
||||
bEdiZero = true;
|
||||
}
|
||||
}
|
||||
MoveX86regToVariable(x86_EDI,&_GPR[count].UW[0],CRegName::GPR_Lo[count]);
|
||||
|
@ -1185,7 +1199,7 @@ void CRegInfo::WriteBackRegisters()
|
|||
if (!bEsiSign)
|
||||
{
|
||||
MoveConstToX86reg(0xFFFFFFFF, x86_ESI);
|
||||
bEsiSign = TRUE;
|
||||
bEsiSign = true;
|
||||
}
|
||||
}
|
||||
MoveX86regToVariable(x86_ESI,&_GPR[count].UW[0],CRegName::GPR_Lo[count]);
|
||||
|
@ -1203,7 +1217,7 @@ void CRegInfo::WriteBackRegisters()
|
|||
if (!bEdiZero)
|
||||
{
|
||||
XorX86RegToX86Reg(x86_EDI, x86_EDI);
|
||||
bEdiZero = TRUE;
|
||||
bEdiZero = true;
|
||||
}
|
||||
MoveX86regToVariable(x86_EDI,&_GPR[count].UW[1],CRegName::GPR_Hi[count]);
|
||||
}
|
||||
|
@ -1215,7 +1229,7 @@ void CRegInfo::WriteBackRegisters()
|
|||
if (!bEdiZero)
|
||||
{
|
||||
XorX86RegToX86Reg(x86_EDI, x86_EDI);
|
||||
bEdiZero = TRUE;
|
||||
bEdiZero = true;
|
||||
}
|
||||
}
|
||||
MoveX86regToVariable(x86_EDI,&_GPR[count].UW[0],CRegName::GPR_Lo[count]);
|
||||
|
@ -1230,11 +1244,11 @@ void CRegInfo::WriteBackRegisters()
|
|||
case CRegInfo::STATE_CONST_64:
|
||||
if (GetMipsRegLo(count) == 0 || GetMipsRegHi(count) == 0) {
|
||||
XorX86RegToX86Reg(x86_EDI, x86_EDI);
|
||||
bEdiZero = TRUE;
|
||||
bEdiZero = true;
|
||||
}
|
||||
if (GetMipsRegLo(count) == 0xFFFFFFFF || GetMipsRegHi(count) == 0xFFFFFFFF) {
|
||||
MoveConstToX86reg(0xFFFFFFFF, x86_ESI);
|
||||
bEsiSign = TRUE;
|
||||
bEsiSign = true;
|
||||
}
|
||||
|
||||
if (GetMipsRegHi(count) == 0) {
|
||||
|
|
|
@ -73,7 +73,7 @@ public:
|
|||
void FixRoundModel ( FPU_ROUND RoundMethod );
|
||||
void ChangeFPURegFormat ( int Reg, FPU_STATE OldFormat, FPU_STATE NewFormat, FPU_ROUND RoundingModel );
|
||||
void Load_FPR_ToTop ( int Reg, int RegToLoad, FPU_STATE Format);
|
||||
BOOL RegInStack ( int Reg, FPU_STATE Format );
|
||||
bool RegInStack ( int Reg, FPU_STATE Format );
|
||||
void UnMap_AllFPRs ();
|
||||
void UnMap_FPR ( int Reg, int WriteBackValue );
|
||||
x86FpuValues StackPosition( int Reg );
|
||||
|
@ -84,7 +84,7 @@ public:
|
|||
void Map_GPR_64bit ( int MipsReg, int MipsRegToLoad );
|
||||
x86Reg Get_MemoryStack () const;
|
||||
x86Reg Map_MemoryStack ( x86Reg Reg, bool bMapRegister, bool LoadValue = true );
|
||||
x86Reg Map_TempReg ( x86Reg Reg, int MipsReg, BOOL LoadHiWord );
|
||||
x86Reg Map_TempReg ( x86Reg Reg, int MipsReg, bool LoadHiWord );
|
||||
void ProtectGPR ( DWORD Reg );
|
||||
void UnProtectGPR ( DWORD Reg );
|
||||
void ResetX86Protection ();
|
||||
|
@ -169,7 +169,7 @@ private:
|
|||
int m_Stack_TopPos;
|
||||
int x86fpu_MappedTo[8];
|
||||
FPU_STATE x86fpu_State[8];
|
||||
BOOL x86fpu_StateChanged[8];
|
||||
bool x86fpu_StateChanged[8];
|
||||
FPU_ROUND x86fpu_RoundingModel[8];
|
||||
|
||||
bool m_Fpu_Used;
|
||||
|
|
|
@ -3007,13 +3007,13 @@ void CX86Ops::fpuAddRegPop(int * StackPos, x86FpuValues reg) {
|
|||
}
|
||||
}
|
||||
|
||||
void CX86Ops::fpuComDword(void *Variable, const char * VariableName, BOOL Pop) {
|
||||
void CX86Ops::fpuComDword(void *Variable, const char * VariableName, bool Pop) {
|
||||
CPU_Message(" fcom%s ST(0), dword ptr [%s]", m_fpupop[Pop], VariableName);
|
||||
PUTDST16(m_RecompPos, (Pop == TRUE) ? 0x1DD8 : 0x15D8);
|
||||
PUTDST16(m_RecompPos, Pop ? 0x1DD8 : 0x15D8);
|
||||
PUTDST32(m_RecompPos,Variable);
|
||||
}
|
||||
|
||||
void CX86Ops::fpuComDwordRegPointer(x86Reg x86Pointer, BOOL Pop) {
|
||||
void CX86Ops::fpuComDwordRegPointer(x86Reg x86Pointer, bool Pop) {
|
||||
WORD x86Command;
|
||||
|
||||
CPU_Message(" fcom%s ST(0), dword ptr [%s]",m_fpupop[Pop],x86_Name(x86Pointer));
|
||||
|
@ -3027,17 +3027,22 @@ void CX86Ops::fpuComDwordRegPointer(x86Reg x86Pointer, BOOL Pop) {
|
|||
default:
|
||||
g_Notify->BreakPoint(__FILEW__,__LINE__);
|
||||
}
|
||||
if (Pop) { x86Command |= 0x0800; }
|
||||
|
||||
if (Pop)
|
||||
{
|
||||
x86Command |= 0x0800;
|
||||
}
|
||||
|
||||
PUTDST16(m_RecompPos,x86Command);
|
||||
}
|
||||
|
||||
void CX86Ops::fpuComQword(void *Variable, const char * VariableName, BOOL Pop) {
|
||||
void CX86Ops::fpuComQword(void *Variable, const char * VariableName, bool Pop) {
|
||||
CPU_Message(" fcom%s ST(0), qword ptr [%s]", m_fpupop[Pop], VariableName);
|
||||
PUTDST16(m_RecompPos, (Pop == TRUE) ? 0x1DDC : 0x15DC);
|
||||
PUTDST16(m_RecompPos, Pop ? 0x1DDC : 0x15DC);
|
||||
PUTDST32(m_RecompPos,Variable);
|
||||
}
|
||||
|
||||
void CX86Ops::fpuComQwordRegPointer(x86Reg x86Pointer, BOOL Pop) {
|
||||
void CX86Ops::fpuComQwordRegPointer(x86Reg x86Pointer, bool Pop) {
|
||||
WORD x86Command;
|
||||
|
||||
CPU_Message(" fcom%s ST(0), qword ptr [%s]",m_fpupop[Pop],x86_Name(x86Pointer));
|
||||
|
@ -3051,12 +3056,17 @@ void CX86Ops::fpuComQwordRegPointer(x86Reg x86Pointer, BOOL Pop) {
|
|||
default:
|
||||
g_Notify->BreakPoint(__FILEW__,__LINE__);
|
||||
}
|
||||
if (Pop) { x86Command |= 0x0800; }
|
||||
|
||||
if (Pop)
|
||||
{
|
||||
x86Command |= 0x0800;
|
||||
}
|
||||
|
||||
PUTDST16(m_RecompPos,x86Command);
|
||||
}
|
||||
|
||||
void CX86Ops::fpuComReg(x86FpuValues x86reg, BOOL Pop) {
|
||||
int s = (Pop == TRUE) ? 0x0800 : 0x0000;
|
||||
void CX86Ops::fpuComReg(x86FpuValues x86reg, bool Pop) {
|
||||
int s = Pop ? 0x0800 : 0x0000;
|
||||
CPU_Message(" fcom%s ST(0), %s", m_fpupop[Pop], fpu_Name(x86reg));
|
||||
|
||||
switch (x86reg) {
|
||||
|
@ -3460,18 +3470,24 @@ void CX86Ops::fpuStoreControl(void *Variable, const char * VariableName) {
|
|||
PUTDST32(m_RecompPos,Variable);
|
||||
}
|
||||
|
||||
void CX86Ops::fpuStoreDword(int * StackPos,void *Variable, const char * VariableName, BOOL pop) {
|
||||
void CX86Ops::fpuStoreDword(int * StackPos,void *Variable, const char * VariableName, bool pop) {
|
||||
CPU_Message(" fst%s dword ptr [%s]", m_fpupop[pop], VariableName);
|
||||
if (pop) { *StackPos = (*StackPos + 1) & 7; }
|
||||
PUTDST16(m_RecompPos,(pop == FALSE) ? 0x15D9 : 0x1DD9);
|
||||
|
||||
if (pop)
|
||||
*StackPos = (*StackPos + 1) & 7;
|
||||
|
||||
PUTDST16(m_RecompPos, pop ? 0x1DD9 : 0x15D9);
|
||||
PUTDST32(m_RecompPos,Variable);
|
||||
}
|
||||
|
||||
void CX86Ops::fpuStoreDwordFromX86Reg(int * StackPos,x86Reg x86reg, BOOL pop) {
|
||||
void CX86Ops::fpuStoreDwordFromX86Reg(int * StackPos,x86Reg x86reg, bool pop) {
|
||||
BYTE Command = 0;
|
||||
|
||||
CPU_Message(" fst%s dword ptr [%s]", m_fpupop[pop], x86_Name(x86reg));
|
||||
if (pop) { *StackPos = (*StackPos + 1) & 7; }
|
||||
|
||||
if (pop)
|
||||
*StackPos = (*StackPos + 1) & 7;
|
||||
|
||||
PUTDST8(m_RecompPos,0xD9);
|
||||
|
||||
switch (x86reg) {
|
||||
|
@ -3484,14 +3500,17 @@ void CX86Ops::fpuStoreDwordFromX86Reg(int * StackPos,x86Reg x86reg, BOOL pop) {
|
|||
default:
|
||||
g_Notify->BreakPoint(__FILEW__,__LINE__);
|
||||
}
|
||||
PUTDST8(m_RecompPos, (pop == FALSE) ? Command : (Command + 0x8));
|
||||
|
||||
PUTDST8(m_RecompPos, pop ? (Command + 0x8) : Command);
|
||||
}
|
||||
|
||||
void CX86Ops::fpuStoreDwordToN64Mem(int * StackPos,x86Reg x86reg, BOOL Pop) {
|
||||
int s = (Pop == TRUE) ? 0x0800 : 0;
|
||||
void CX86Ops::fpuStoreDwordToN64Mem(int * StackPos,x86Reg x86reg, bool Pop) {
|
||||
int s = Pop ? 0x0800 : 0;
|
||||
|
||||
CPU_Message(" fst%s dword ptr [%s+N64mem]", m_fpupop[Pop], x86_Name(x86reg));
|
||||
if (Pop) { *StackPos = (*StackPos + 1) & 7; }
|
||||
|
||||
if (Pop)
|
||||
*StackPos = (*StackPos + 1) & 7;
|
||||
|
||||
switch (x86reg) {
|
||||
case x86_EAX: PUTDST16(m_RecompPos,0x90D9|s); break;
|
||||
|
@ -3504,21 +3523,30 @@ void CX86Ops::fpuStoreDwordToN64Mem(int * StackPos,x86Reg x86reg, BOOL Pop) {
|
|||
default:
|
||||
g_Notify->BreakPoint(__FILEW__,__LINE__);
|
||||
}
|
||||
|
||||
PUTDST32(m_RecompPos,g_MMU->Rdram());
|
||||
}
|
||||
|
||||
void CX86Ops::fpuStoreIntegerDword(int * StackPos,void *Variable, const char * VariableName, BOOL pop) {
|
||||
void CX86Ops::fpuStoreIntegerDword(int * StackPos,void *Variable, const char * VariableName, bool pop) {
|
||||
CPU_Message(" fist%s dword ptr [%s]", m_fpupop[pop], VariableName);
|
||||
if (pop) { *StackPos = (*StackPos + 1) & 7; }
|
||||
PUTDST16(m_RecompPos, (pop == FALSE) ? 0x15DB : 0x1DDB);
|
||||
|
||||
if (pop)
|
||||
*StackPos = (*StackPos + 1) & 7;
|
||||
|
||||
PUTDST16(m_RecompPos, pop ? 0x1DDB : 0x15DB);
|
||||
PUTDST32(m_RecompPos,Variable);
|
||||
}
|
||||
|
||||
void CX86Ops::fpuStoreIntegerDwordFromX86Reg(int * StackPos,x86Reg x86reg, BOOL pop) {
|
||||
void CX86Ops::fpuStoreIntegerDwordFromX86Reg(int * StackPos,x86Reg x86reg, bool pop) {
|
||||
BYTE Command = 0;
|
||||
|
||||
CPU_Message(" fist%s dword ptr [%s]", m_fpupop[pop], x86_Name(x86reg));
|
||||
if (pop) { *StackPos = (*StackPos + 1) & 7; }
|
||||
|
||||
if (pop)
|
||||
{
|
||||
*StackPos = (*StackPos + 1) & 7;
|
||||
}
|
||||
|
||||
PUTDST8(m_RecompPos,0xDB);
|
||||
|
||||
switch (x86reg) {
|
||||
|
@ -3531,22 +3559,37 @@ void CX86Ops::fpuStoreIntegerDwordFromX86Reg(int * StackPos,x86Reg x86reg, BOOL
|
|||
default:
|
||||
g_Notify->BreakPoint(__FILEW__,__LINE__);
|
||||
}
|
||||
PUTDST8(m_RecompPos, (pop == FALSE) ? Command : (Command + 0x8));
|
||||
|
||||
PUTDST8(m_RecompPos, pop ? (Command + 0x8) : Command);
|
||||
}
|
||||
|
||||
void CX86Ops::fpuStoreIntegerQword(int * StackPos,void *Variable, const char * VariableName, BOOL pop) {
|
||||
void CX86Ops::fpuStoreIntegerQword(int * StackPos,void *Variable, const char * VariableName, bool pop) {
|
||||
CPU_Message(" fist%s qword ptr [%s]", m_fpupop[pop], VariableName);
|
||||
if (pop) { *StackPos = (*StackPos + 1) & 7; }
|
||||
PUTDST16(m_RecompPos, (pop == FALSE) ? 0x35DF : 0x3DDF);
|
||||
|
||||
if (pop)
|
||||
{
|
||||
*StackPos = (*StackPos + 1) & 7;
|
||||
}
|
||||
|
||||
PUTDST16(m_RecompPos, pop ? 0x3DDF : 0x35DF);
|
||||
PUTDST32(m_RecompPos,Variable);
|
||||
if (!pop) { X86BreakPoint(__FILEW__,__LINE__); }
|
||||
|
||||
if (!pop)
|
||||
{
|
||||
X86BreakPoint(__FILEW__,__LINE__);
|
||||
}
|
||||
}
|
||||
|
||||
void CX86Ops::fpuStoreIntegerQwordFromX86Reg(int * StackPos, x86Reg x86reg, BOOL pop) {
|
||||
void CX86Ops::fpuStoreIntegerQwordFromX86Reg(int * StackPos, x86Reg x86reg, bool pop) {
|
||||
BYTE Command = 0;
|
||||
|
||||
CPU_Message(" fist%s qword ptr [%s]", m_fpupop[pop], x86_Name(x86reg));
|
||||
if (pop) { *StackPos = (*StackPos + 1) & 7; }
|
||||
|
||||
if (pop)
|
||||
{
|
||||
*StackPos = (*StackPos + 1) & 7;
|
||||
}
|
||||
|
||||
PUTDST8(m_RecompPos,0xDF);
|
||||
|
||||
switch (x86reg) {
|
||||
|
@ -3559,14 +3602,20 @@ void CX86Ops::fpuStoreIntegerQwordFromX86Reg(int * StackPos, x86Reg x86reg, BOOL
|
|||
default:
|
||||
g_Notify->BreakPoint(__FILEW__,__LINE__);
|
||||
}
|
||||
PUTDST8(m_RecompPos, (pop == FALSE) ? Command : (Command + 0x8));
|
||||
|
||||
PUTDST8(m_RecompPos, pop ? (Command + 0x8) : Command);
|
||||
}
|
||||
|
||||
void CX86Ops::fpuStoreQwordFromX86Reg(int * StackPos, x86Reg x86reg, BOOL pop) {
|
||||
void CX86Ops::fpuStoreQwordFromX86Reg(int * StackPos, x86Reg x86reg, bool pop) {
|
||||
BYTE Command = 0;
|
||||
|
||||
CPU_Message(" fst%s qword ptr [%s]", m_fpupop[pop], x86_Name(x86reg));
|
||||
if (pop) { *StackPos = (*StackPos + 1) & 7; }
|
||||
|
||||
if (pop)
|
||||
{
|
||||
*StackPos = (*StackPos + 1) & 7;
|
||||
}
|
||||
|
||||
PUTDST8(m_RecompPos,0xDD);
|
||||
|
||||
switch (x86reg) {
|
||||
|
@ -3579,7 +3628,8 @@ void CX86Ops::fpuStoreQwordFromX86Reg(int * StackPos, x86Reg x86reg, BOOL pop) {
|
|||
default:
|
||||
g_Notify->BreakPoint(__FILEW__,__LINE__);
|
||||
}
|
||||
PUTDST8(m_RecompPos, (pop == FALSE) ? Command : (Command + 0x8));
|
||||
|
||||
PUTDST8(m_RecompPos, pop ? (Command + 0x8) : Command);
|
||||
}
|
||||
|
||||
void CX86Ops::fpuStoreStatus(void) {
|
||||
|
@ -3739,13 +3789,13 @@ const char * CX86Ops::fpu_Name ( x86FpuValues Reg ) {
|
|||
return "???";
|
||||
}
|
||||
|
||||
BOOL CX86Ops::Is8BitReg ( x86Reg Reg )
|
||||
bool CX86Ops::Is8BitReg(x86Reg Reg)
|
||||
{
|
||||
if (Reg == x86_EAX) { return TRUE; }
|
||||
if (Reg == x86_EBX) { return TRUE; }
|
||||
if (Reg == x86_ECX) { return TRUE; }
|
||||
if (Reg == x86_EDX) { return TRUE; }
|
||||
return FALSE;
|
||||
return (Reg == x86_EAX) ||
|
||||
(Reg == x86_EBX) ||
|
||||
(Reg == x86_ECX) ||
|
||||
(Reg == x86_EDX);
|
||||
|
||||
}
|
||||
|
||||
BYTE CX86Ops::CalcMultiplyCode (Multipler Multiply)
|
||||
|
|
|
@ -231,11 +231,11 @@ protected:
|
|||
static void fpuAddQwordRegPointer ( x86Reg X86Pointer );
|
||||
static void fpuAddReg ( x86FpuValues reg );
|
||||
static void fpuAddRegPop ( int * StackPos, x86FpuValues reg );
|
||||
static void fpuComDword ( void * Variable, const char * VariableName, BOOL Pop );
|
||||
static void fpuComDwordRegPointer ( x86Reg X86Pointer, BOOL Pop );
|
||||
static void fpuComQword ( void * Variable, const char * VariableName, BOOL Pop );
|
||||
static void fpuComQwordRegPointer ( x86Reg X86Pointer, BOOL Pop );
|
||||
static void fpuComReg ( x86FpuValues reg, BOOL Pop );
|
||||
static void fpuComDword ( void * Variable, const char * VariableName, bool Pop );
|
||||
static void fpuComDwordRegPointer ( x86Reg X86Pointer, bool Pop );
|
||||
static void fpuComQword ( void * Variable, const char * VariableName, bool Pop );
|
||||
static void fpuComQwordRegPointer ( x86Reg X86Pointer, bool Pop );
|
||||
static void fpuComReg ( x86FpuValues reg, bool Pop );
|
||||
static void fpuDivDword ( void * Variable, const char * VariableName );
|
||||
static void fpuDivDwordRegPointer ( x86Reg X86Pointer );
|
||||
static void fpuDivQword ( void * Variable, const char * VariableName );
|
||||
|
@ -269,15 +269,14 @@ protected:
|
|||
static void fpuRound ();
|
||||
static void fpuSqrt ();
|
||||
static void fpuStoreControl ( void * Variable, const char * VariableName );
|
||||
static void fpuStoreDword ( int * StackPos, void * Variable, const char * VariableName, BOOL pop );
|
||||
static void fpuStoreDwordFromX86Reg ( int * StackPos,x86Reg Reg, BOOL pop );
|
||||
static void fpuStoreDwordToN64Mem ( int * StackPos, x86Reg reg, BOOL Pop );
|
||||
static void fpuStoreIntegerDword ( int * StackPos, void * Variable, const char * VariableName, BOOL pop );
|
||||
static void fpuStoreIntegerDwordFromX86Reg ( int * StackPos,x86Reg Reg, BOOL pop );
|
||||
static void fpuStoreIntegerQword ( int * StackPos, void * Variable, const char * VariableName, BOOL pop );
|
||||
static void fpuStoreIntegerQwordFromX86Reg ( int * StackPos, x86Reg Reg, BOOL pop );
|
||||
static void fpuStoreQword ( int * StackPos, void * Variable, const char * VariableName, BOOL pop );
|
||||
static void fpuStoreQwordFromX86Reg ( int * StackPos, x86Reg Reg, BOOL pop );
|
||||
static void fpuStoreDword ( int * StackPos, void * Variable, const char * VariableName, bool pop );
|
||||
static void fpuStoreDwordFromX86Reg ( int * StackPos,x86Reg Reg, bool pop );
|
||||
static void fpuStoreDwordToN64Mem ( int * StackPos, x86Reg reg, bool Pop );
|
||||
static void fpuStoreIntegerDword ( int * StackPos, void * Variable, const char * VariableName, bool pop );
|
||||
static void fpuStoreIntegerDwordFromX86Reg ( int * StackPos,x86Reg Reg, bool pop );
|
||||
static void fpuStoreIntegerQword ( int * StackPos, void * Variable, const char * VariableName, bool pop );
|
||||
static void fpuStoreIntegerQwordFromX86Reg ( int * StackPos, x86Reg Reg, bool pop );
|
||||
static void fpuStoreQwordFromX86Reg ( int * StackPos, x86Reg Reg, bool pop );
|
||||
static void fpuStoreStatus ();
|
||||
static void fpuSubDword ( void * Variable, const char * VariableName );
|
||||
static void fpuSubDwordRegPointer ( x86Reg X86Pointer );
|
||||
|
@ -288,7 +287,7 @@ protected:
|
|||
static void fpuSubReg ( x86FpuValues reg );
|
||||
static void fpuSubRegPop ( x86FpuValues reg );
|
||||
|
||||
static BOOL Is8BitReg ( x86Reg Reg );
|
||||
static bool Is8BitReg ( x86Reg Reg );
|
||||
static BYTE CalcMultiplyCode ( Multipler Multiply );
|
||||
static BYTE * m_RecompPos;
|
||||
|
||||
|
|
|
@ -1203,16 +1203,15 @@ bool CRomBrowser::RomListDrawItem(int idCtrl, DWORD lParam)
|
|||
RECT rcItem, rcDraw;
|
||||
char String[300];
|
||||
LV_ITEM lvItem;
|
||||
BOOL bSelected;
|
||||
HBRUSH hBrush;
|
||||
LV_COLUMN lvc;
|
||||
LV_COLUMN lvc;
|
||||
int nColumn;
|
||||
|
||||
lvItem.mask = LVIF_PARAM;
|
||||
lvItem.iItem = ditem->itemID;
|
||||
if (!ListView_GetItem((HWND)m_hRomList, &lvItem)) { return false; }
|
||||
lvItem.state = ListView_GetItemState((HWND)m_hRomList, ditem->itemID, -1);
|
||||
bSelected = (lvItem.state & LVIS_SELECTED);
|
||||
bool bSelected = (lvItem.state & LVIS_SELECTED) != 0;
|
||||
|
||||
if (lvItem.lParam < 0 || lvItem.lParam >= (LPARAM)m_RomInfo.size())
|
||||
{
|
||||
|
|
Loading…
Reference in New Issue