Core: Rearrange OrConstToX86Reg parameters

This commit is contained in:
zilmar 2022-11-07 16:03:45 +10:30
parent 40259d01ca
commit 697397f1dd
4 changed files with 21 additions and 21 deletions

View File

@ -2529,7 +2529,7 @@ void CX86RecompilerOps::ORI()
if (g_System->bFastSP() && m_Opcode.rs == 29 && m_Opcode.rt == 29)
{
m_Assembler.OrConstToX86Reg(m_Opcode.immediate, Map_MemoryStack(CX86Ops::x86_Unknown, true));
m_Assembler.OrConstToX86Reg(Map_MemoryStack(CX86Ops::x86_Unknown, true), m_Opcode.immediate);
}
if (IsConst(m_Opcode.rs))
@ -2560,7 +2560,7 @@ void CX86RecompilerOps::ORI()
Map_GPR_32bit(m_Opcode.rt, IsSigned(m_Opcode.rs), m_Opcode.rs);
}
}
m_Assembler.OrConstToX86Reg(m_Opcode.immediate, GetMipsRegMapLo(m_Opcode.rt));
m_Assembler.OrConstToX86Reg(GetMipsRegMapLo(m_Opcode.rt), m_Opcode.immediate);
}
else
{
@ -2572,7 +2572,7 @@ void CX86RecompilerOps::ORI()
{
Map_GPR_64bit(m_Opcode.rt, m_Opcode.rs);
}
m_Assembler.OrConstToX86Reg(m_Opcode.immediate, GetMipsRegMapLo(m_Opcode.rt));
m_Assembler.OrConstToX86Reg(GetMipsRegMapLo(m_Opcode.rt), m_Opcode.immediate);
}
if (g_System->bFastSP() && m_Opcode.rt == 29 && m_Opcode.rs != 29)
@ -5701,12 +5701,12 @@ void CX86RecompilerOps::SPECIAL_OR()
Map_GPR_64bit(m_Opcode.rd, MappedReg);
if ((Value >> 32) != 0)
{
m_Assembler.OrConstToX86Reg((uint32_t)(Value >> 32), GetMipsRegMapHi(m_Opcode.rd));
m_Assembler.OrConstToX86Reg(GetMipsRegMapHi(m_Opcode.rd), (uint32_t)(Value >> 32));
}
uint32_t dwValue = (uint32_t)(Value & 0xFFFFFFFF);
if (dwValue != 0)
{
m_Assembler.OrConstToX86Reg(dwValue, GetMipsRegMapLo(m_Opcode.rd));
m_Assembler.OrConstToX86Reg(GetMipsRegMapLo(m_Opcode.rd), dwValue);
}
}
else
@ -5715,7 +5715,7 @@ void CX86RecompilerOps::SPECIAL_OR()
Map_GPR_32bit(m_Opcode.rd, true, MappedReg);
if (Value != 0)
{
m_Assembler.OrConstToX86Reg(Value, GetMipsRegMapLo(m_Opcode.rd));
m_Assembler.OrConstToX86Reg(GetMipsRegMapLo(m_Opcode.rd), Value);
}
}
}
@ -5735,7 +5735,7 @@ void CX86RecompilerOps::SPECIAL_OR()
Map_GPR_32bit(m_Opcode.rd, true, UnknownReg);
if (dwValue != 0)
{
m_Assembler.OrConstToX86Reg(dwValue, GetMipsRegMapLo(m_Opcode.rd));
m_Assembler.OrConstToX86Reg(GetMipsRegMapLo(m_Opcode.rd), dwValue);
}
}
else
@ -5743,11 +5743,11 @@ void CX86RecompilerOps::SPECIAL_OR()
Map_GPR_64bit(m_Opcode.rd, UnknownReg);
if ((Value >> 32) != 0)
{
m_Assembler.OrConstToX86Reg((uint32_t)(Value >> 32), GetMipsRegMapHi(m_Opcode.rd));
m_Assembler.OrConstToX86Reg(GetMipsRegMapHi(m_Opcode.rd), (uint32_t)(Value >> 32));
}
if (dwValue != 0)
{
m_Assembler.OrConstToX86Reg(dwValue, GetMipsRegMapLo(m_Opcode.rd));
m_Assembler.OrConstToX86Reg(GetMipsRegMapLo(m_Opcode.rd), dwValue);
}
}
}
@ -6037,12 +6037,12 @@ void CX86RecompilerOps::SPECIAL_NOR()
Map_GPR_64bit(m_Opcode.rd, MappedReg);
if ((Value >> 32) != 0)
{
m_Assembler.OrConstToX86Reg((uint32_t)(Value >> 32), GetMipsRegMapHi(m_Opcode.rd));
m_Assembler.OrConstToX86Reg(GetMipsRegMapHi(m_Opcode.rd), (uint32_t)(Value >> 32));
}
uint32_t dwValue = (uint32_t)(Value & 0xFFFFFFFF);
if (dwValue != 0)
{
m_Assembler.OrConstToX86Reg(dwValue, GetMipsRegMapLo(m_Opcode.rd));
m_Assembler.OrConstToX86Reg(GetMipsRegMapLo(m_Opcode.rd), dwValue);
}
}
else
@ -6051,7 +6051,7 @@ void CX86RecompilerOps::SPECIAL_NOR()
Map_GPR_32bit(m_Opcode.rd, true, MappedReg);
if (Value != 0)
{
m_Assembler.OrConstToX86Reg(Value, GetMipsRegMapLo(m_Opcode.rd));
m_Assembler.OrConstToX86Reg(GetMipsRegMapLo(m_Opcode.rd), Value);
}
}
}
@ -6071,7 +6071,7 @@ void CX86RecompilerOps::SPECIAL_NOR()
Map_GPR_32bit(m_Opcode.rd, true, UnknownReg);
if (dwValue != 0)
{
m_Assembler.OrConstToX86Reg(dwValue, GetMipsRegMapLo(m_Opcode.rd));
m_Assembler.OrConstToX86Reg(GetMipsRegMapLo(m_Opcode.rd), dwValue);
}
}
else
@ -6079,11 +6079,11 @@ void CX86RecompilerOps::SPECIAL_NOR()
Map_GPR_64bit(m_Opcode.rd, UnknownReg);
if ((Value >> 32) != 0)
{
m_Assembler.OrConstToX86Reg((uint32_t)(Value >> 32), GetMipsRegMapHi(m_Opcode.rd));
m_Assembler.OrConstToX86Reg(GetMipsRegMapHi(m_Opcode.rd), (uint32_t)(Value >> 32));
}
if (dwValue != 0)
{
m_Assembler.OrConstToX86Reg(dwValue, GetMipsRegMapLo(m_Opcode.rd));
m_Assembler.OrConstToX86Reg(GetMipsRegMapLo(m_Opcode.rd), dwValue);
}
}
}

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@ -240,10 +240,10 @@ void CX86RegInfo::FixRoundModel(FPU_ROUND RoundMethod)
{
switch (RoundMethod)
{
case RoundTruncate: m_Assembler.OrConstToX86Reg(0x0C00, reg); break;
case RoundNearest: m_Assembler.OrConstToX86Reg(0x0000, reg); break;
case RoundDown: m_Assembler.OrConstToX86Reg(0x0400, reg); break;
case RoundUp: m_Assembler.OrConstToX86Reg(0x0800, reg); break;
case RoundTruncate: m_Assembler.OrConstToX86Reg(reg, 0x0C00); break;
case RoundNearest: m_Assembler.OrConstToX86Reg(reg, 0x0000); break;
case RoundDown: m_Assembler.OrConstToX86Reg(reg, 0x0400); break;
case RoundUp: m_Assembler.OrConstToX86Reg(reg, 0x0800); break;
default:
g_Notify->DisplayError("Unknown rounding model");
}

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@ -1781,7 +1781,7 @@ void CX86Ops::OrConstToVariable(void * Variable, const char * VariableName, uint
AddCode32(Const);
}
void CX86Ops::OrConstToX86Reg(uint32_t Const, x86Reg Reg)
void CX86Ops::OrConstToX86Reg(x86Reg Reg, uint32_t Const)
{
if (Const == 0)
{

View File

@ -162,7 +162,7 @@ public:
void MulX86reg(x86Reg Reg);
void NotX86Reg(x86Reg Reg);
void OrConstToVariable(void * Variable, const char * VariableName, uint32_t Const);
void OrConstToX86Reg(uint32_t Const, x86Reg Reg);
void OrConstToX86Reg(x86Reg Reg, uint32_t Const);
void OrVariableToX86Reg(void * Variable, const char * VariableName, x86Reg Reg);
void OrX86RegToVariable(void * Variable, const char * VariableName, x86Reg Reg);
void OrX86RegToX86Reg(x86Reg Destination, x86Reg Source);