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Core: fix up exception generator functions

This commit is contained in:
zilmar 2023-09-21 18:07:56 +09:30
parent 32ff820a03
commit 6307888be4
3 changed files with 28 additions and 32 deletions
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51
Source/Project64-core/N64System/Mips/Register.cpp
View File

@ -748,8 +748,7 @@ void CRegisters::DoAddressError(uint64_t BadVaddr, bool FromRead)
g_Notify->BreakPoint(__FILE__, __LINE__); g_Notify->BreakPoint(__FILE__, __LINE__);
} }
AddressException(BadVaddr); TriggerAddressException(BadVaddr, FromRead ? EXC_RADE : EXC_WADE);
TriggerException(FromRead ? EXC_RADE : EXC_WADE);
} }
void CRegisters::FixFpuLocations() void CRegisters::FixFpuLocations()
@ -784,17 +783,15 @@ bool CRegisters::DoIntrException()
void CRegisters::DoTLBReadMiss(uint64_t BadVaddr) void CRegisters::DoTLBReadMiss(uint64_t BadVaddr)
{ {
AddressException(BadVaddr); TriggerAddressException(BadVaddr, EXC_RMISS, !m_TLB.AddressDefined(BadVaddr));
TriggerException(EXC_RMISS, 0, !m_TLB.AddressDefined(BadVaddr));
} }
void CRegisters::DoTLBWriteMiss(uint64_t BadVaddr) void CRegisters::DoTLBWriteMiss(uint64_t BadVaddr)
{ {
AddressException(BadVaddr); TriggerAddressException(BadVaddr, EXC_WMISS, !m_TLB.AddressDefined(BadVaddr));
TriggerException(EXC_WMISS, 0, !m_TLB.AddressDefined(BadVaddr));
} }
void CRegisters::AddressException(uint64_t Address) void CRegisters::TriggerAddressException(uint64_t Address, uint32_t ExceptionCode, bool SpecialOffset)
{ {
BAD_VADDR_REGISTER = Address; BAD_VADDR_REGISTER = Address;
ENTRYHI_REGISTER.VPN2 = Address >> 13; ENTRYHI_REGISTER.VPN2 = Address >> 13;
@ -802,9 +799,27 @@ void CRegisters::AddressException(uint64_t Address)
CONTEXT_REGISTER.BadVPN2 = Address >> 13; CONTEXT_REGISTER.BadVPN2 = Address >> 13;
XCONTEXT_REGISTER.BadVPN2 = Address >> 13; XCONTEXT_REGISTER.BadVPN2 = Address >> 13;
XCONTEXT_REGISTER.R = Address >> 62; XCONTEXT_REGISTER.R = Address >> 62;
TriggerException(ExceptionCode, 0);
if (SpecialOffset && STATUS_REGISTER.ExceptionLevel == 0)
{
m_System.m_JumpToLocation = (m_System.m_JumpToLocation & 0xFFFF0000);
switch (STATUS_REGISTER.PrivilegeMode)
{
case PrivilegeMode_Kernel:
m_System.m_JumpToLocation |= STATUS_REGISTER.KernelExtendedAddressing == 0 ? 0x0000 : 0x0080;
break;
case PrivilegeMode_Supervisor:
m_System.m_JumpToLocation |= STATUS_REGISTER.SupervisorExtendedAddressing == 0 ? 0x0000 : 0x0080;
break;
case PrivilegeMode_User:
m_System.m_JumpToLocation |= STATUS_REGISTER.UserExtendedAddressing == 0 ? 0x0000 : 0x0080;
break;
}
}
} }
void CRegisters::TriggerException(uint32_t ExceptionCode, uint32_t Coprocessor, bool SpecialOffset) void CRegisters::TriggerException(uint32_t ExceptionCode, uint32_t Coprocessor)
{ {
if (GenerateLog() && LogExceptions()) if (GenerateLog() && LogExceptions())
{ {
@ -818,29 +833,11 @@ void CRegisters::TriggerException(uint32_t ExceptionCode, uint32_t Coprocessor,
} }
} }
uint32_t ExceptionBase = 0x80000000;
uint16_t ExceptionOffset = 0x0180;
if (SpecialOffset && STATUS_REGISTER.ExceptionLevel == 0)
{
switch (STATUS_REGISTER.PrivilegeMode)
{
case PrivilegeMode_Kernel:
ExceptionOffset = STATUS_REGISTER.KernelExtendedAddressing == 0 ? 0x0000 : 0x0080;
break;
case PrivilegeMode_Supervisor:
ExceptionOffset = STATUS_REGISTER.SupervisorExtendedAddressing == 0 ? 0x0000 : 0x0080;
break;
case PrivilegeMode_User:
ExceptionOffset = STATUS_REGISTER.UserExtendedAddressing == 0 ? 0x0000 : 0x0080;
break;
}
}
CAUSE_REGISTER.ExceptionCode = ExceptionCode; CAUSE_REGISTER.ExceptionCode = ExceptionCode;
CAUSE_REGISTER.CoprocessorUnitNumber = Coprocessor; CAUSE_REGISTER.CoprocessorUnitNumber = Coprocessor;
CAUSE_REGISTER.BranchDelay = m_System.m_PipelineStage == PIPELINE_STAGE_JUMP; CAUSE_REGISTER.BranchDelay = m_System.m_PipelineStage == PIPELINE_STAGE_JUMP;
EPC_REGISTER = (int64_t)((int32_t)m_PROGRAM_COUNTER - (CAUSE_REGISTER.BranchDelay ? 4 : 0)); EPC_REGISTER = (int64_t)((int32_t)m_PROGRAM_COUNTER - (CAUSE_REGISTER.BranchDelay ? 4 : 0));
STATUS_REGISTER.ExceptionLevel = 1; STATUS_REGISTER.ExceptionLevel = 1;
m_System.m_PipelineStage = PIPELINE_STAGE_JUMP; m_System.m_PipelineStage = PIPELINE_STAGE_JUMP;
m_System.m_JumpToLocation = ExceptionBase | ExceptionOffset; m_System.m_JumpToLocation = 0x80000180;
} }

4
Source/Project64-core/N64System/Mips/Register.h
View File

@ -473,8 +473,8 @@ public:
void FixFpuLocations(); void FixFpuLocations();
void Reset(bool bPostPif, CMipsMemoryVM & MMU); void Reset(bool bPostPif, CMipsMemoryVM & MMU);
void SetAsCurrentSystem(); void SetAsCurrentSystem();
void AddressException(uint64_t Address); void TriggerAddressException(uint64_t Address, uint32_t ExceptionCode, bool SpecialOffset = false);
void TriggerException(uint32_t ExceptionCode, uint32_t Coprocessor = 0, bool SpecialOffset = false); void TriggerException(uint32_t ExceptionCode, uint32_t Coprocessor = 0);
uint64_t Cop0_MF(COP0Reg Reg); uint64_t Cop0_MF(COP0Reg Reg);
void Cop0_MT(COP0Reg Reg, uint64_t Value); void Cop0_MT(COP0Reg Reg, uint64_t Value);

5
Source/Project64-core/N64System/N64System.cpp
View File

@ -1539,9 +1539,8 @@ void CN64System::DumpSyncErrors(CN64System * SecondCPU)
Error.Log("\r\n"); Error.Log("\r\n");
for (count = 0; count < 32; count++) for (count = 0; count < 32; count++)
{ {
Error.LogF("CP0[%s],%*s0x%08X, 0x%08X\r\n", CRegName::Cop0[count], Error.LogF("CP0[%s] %*s0x%08X%08X, 0x%08X%08X\r\n", CRegName::Cop0[count], 12 - strlen(CRegName::Cop0[count]), "",
12 - strlen(CRegName::Cop0[count]), "", (uint32_t)(m_Reg.m_CP0[count] >> 32), (uint32_t)m_Reg.m_CP0[count], (uint32_t)(SecondCPU->m_Reg.m_CP0[count] >> 32), (uint32_t)(SecondCPU->m_Reg.m_CP0[count]));
m_Reg.m_CP0[count], SecondCPU->m_Reg.m_CP0[count]);
} }
Error.Log("\r\n"); Error.Log("\r\n");
for (count = 0; count < 32; count++) for (count = 0; count < 32; count++)