RSP: Move more functionality in to rsp-core
This commit is contained in:
parent
25e48405c5
commit
60192a7f33
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@ -40,14 +40,24 @@
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</ClCompile>
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</ClCompile>
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</ItemDefinitionGroup>
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</ItemDefinitionGroup>
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<ItemGroup>
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<ItemGroup>
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<ClCompile Include="cpu\RSPCpu.cpp" />
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<ClCompile Include="cpu\RSPiInstruction.cpp" />
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<ClCompile Include="cpu\RSPiInstruction.cpp" />
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<ClCompile Include="cpu\RSPInterpreterCPU.cpp" />
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<ClCompile Include="cpu\RSPInterpreterOps.cpp" />
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<ClCompile Include="cpu\RSPRegister.cpp" />
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<ClCompile Include="cpu\RSPRegister.cpp" />
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<ClCompile Include="cpu\RspTypes.cpp" />
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<ClCompile Include="cpu\RspTypes.cpp" />
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<ClCompile Include="RSPDebugger.cpp" />
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<ClCompile Include="RSPInfo.cpp" />
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</ItemGroup>
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</ItemGroup>
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<ItemGroup>
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<ItemGroup>
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<ClInclude Include="cpu\RSPCpu.h" />
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<ClInclude Include="cpu\RSPInstruction.h" />
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<ClInclude Include="cpu\RSPInstruction.h" />
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<ClInclude Include="cpu\RSPInterpreterCPU.h" />
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<ClInclude Include="cpu\RSPInterpreterOps.h" />
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<ClInclude Include="cpu\RSPOpcode.h" />
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<ClInclude Include="cpu\RSPOpcode.h" />
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<ClInclude Include="cpu\RSPRegisters.h" />
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<ClInclude Include="cpu\RSPRegisters.h" />
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<ClInclude Include="cpu\RspTypes.h" />
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<ClInclude Include="cpu\RspTypes.h" />
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<ClInclude Include="RSPDebugger.h" />
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<ClInclude Include="RSPInfo.h" />
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</ItemGroup>
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</ItemGroup>
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</Project>
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</Project>
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@ -30,6 +30,21 @@
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<ClCompile Include="cpu\RSPRegister.cpp">
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<ClCompile Include="cpu\RSPRegister.cpp">
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<Filter>Source Files\cpu</Filter>
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<Filter>Source Files\cpu</Filter>
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</ClCompile>
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</ClCompile>
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<ClCompile Include="cpu\RSPInterpreterCPU.cpp">
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<Filter>Source Files\cpu</Filter>
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</ClCompile>
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<ClCompile Include="cpu\RSPInterpreterOps.cpp">
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<Filter>Source Files\cpu</Filter>
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</ClCompile>
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<ClCompile Include="cpu\RSPCpu.cpp">
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<Filter>Source Files\cpu</Filter>
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</ClCompile>
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<ClCompile Include="RSPInfo.cpp">
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<Filter>Source Files</Filter>
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</ClCompile>
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<ClCompile Include="RSPDebugger.cpp">
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<Filter>Source Files</Filter>
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</ClCompile>
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</ItemGroup>
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</ItemGroup>
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<ItemGroup>
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<ItemGroup>
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<ClInclude Include="cpu\RSPInstruction.h">
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<ClInclude Include="cpu\RSPInstruction.h">
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@ -44,5 +59,20 @@
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<ClInclude Include="cpu\RSPRegisters.h">
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<ClInclude Include="cpu\RSPRegisters.h">
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<Filter>Header Files\cpu</Filter>
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<Filter>Header Files\cpu</Filter>
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</ClInclude>
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</ClInclude>
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<ClInclude Include="cpu\RSPInterpreterCPU.h">
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<Filter>Header Files\cpu</Filter>
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</ClInclude>
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<ClInclude Include="cpu\RSPInterpreterOps.h">
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<Filter>Header Files\cpu</Filter>
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</ClInclude>
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<ClInclude Include="cpu\RSPCpu.h">
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<Filter>Header Files\cpu</Filter>
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</ClInclude>
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<ClInclude Include="RSPDebugger.h">
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<Filter>Header Files</Filter>
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</ClInclude>
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<ClInclude Include="RSPInfo.h">
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<Filter>Header Files</Filter>
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</ClInclude>
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</ItemGroup>
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</ItemGroup>
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</Project>
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</Project>
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@ -0,0 +1,3 @@
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#include "RSPDebugger.h"
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RSPDebugger * g_RSPDebugger = nullptr;
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@ -0,0 +1,15 @@
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#pragma once
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#include <stdint.h>
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__interface RSPDebugger
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{
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void ResetTimerList(void) = 0;
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void StartingCPU(void) = 0;
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void RspCyclesStart(void) = 0;
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void RspCyclesStop(void) = 0;
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void BeforeExecuteOp(void) = 0;
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void UnknownOpcode(void) = 0;
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void RDP_LogMF0(uint32_t PC, uint32_t Reg) = 0;
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};
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extern RSPDebugger * g_RSPDebugger;
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@ -0,0 +1,3 @@
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#include "RSPInfo.h"
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RSP_INFO RSPInfo;
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@ -0,0 +1,3 @@
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#include <Project64-plugin-spec/Rsp.h>
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extern RSP_INFO RSPInfo;
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@ -1,18 +1,8 @@
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#include "Cpu.h"
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#include "RSPCpu.h"
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#include "Profiling.h"
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#include <Common/CriticalSection.h>
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#include "RSP Command.h"
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#include <Project64-rsp-core/RSPDebugger.h>
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#include "Recompiler CPU.h"
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#include <Project64-rsp-core/RSPInfo.h>
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#include "Rsp.h"
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#include "breakpoint.h"
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#include "log.h"
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#include "memory.h"
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#include "x86.h"
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#include <Project64-rsp-core/cpu/RSPOpcode.h>
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#include <Project64-rsp-core/cpu/RSPRegisters.h>
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#include <Project64-rsp-core/cpu/RSPRegisters.h>
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#include <Project64-rsp-core/cpu/RspTypes.h>
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#include <float.h>
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#include <stdio.h>
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#include <windows.h>
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UDWORD EleSpec[16], Indx[16];
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UDWORD EleSpec[16], Indx[16];
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RSPOpcode RSPOpC;
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RSPOpcode RSPOpC;
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@ -30,13 +20,14 @@ p_func RSP_Sc2[32];
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void BuildInterpreterCPU(void);
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void BuildInterpreterCPU(void);
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void BuildRecompilerCPU(void);
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void BuildRecompilerCPU(void);
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extern HANDLE hMutex;
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CriticalSection g_CPUCriticalSection;
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DWORD Mfc0Count, SemaphoreExit = 0;
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uint32_t Mfc0Count, SemaphoreExit = 0;
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RSPCpuType g_CPUCore = InterpreterCPU;
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void SetCPU(DWORD core)
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void SetCPU(RSPCpuType core)
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{
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{
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WaitForSingleObjectEx(hMutex, 1000 * 100, false);
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CGuard Guard(g_CPUCriticalSection);
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CPUCore = core;
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g_CPUCore = core;
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switch (core)
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switch (core)
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{
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{
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case RecompilerCPU:
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case RecompilerCPU:
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@ -46,7 +37,6 @@ void SetCPU(DWORD core)
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BuildInterpreterCPU();
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BuildInterpreterCPU();
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break;
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break;
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}
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}
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ReleaseMutex(hMutex);
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}
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}
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void Build_RSP(void)
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void Build_RSP(void)
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@ -58,8 +48,8 @@ void Build_RSP(void)
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SQroot.UW = 0;
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SQroot.UW = 0;
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SQrootResult.UW = 0;
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SQrootResult.UW = 0;
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SetCPU(CPUCore);
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SetCPU(g_CPUCore);
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ResetTimerList();
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g_RSPDebugger->ResetTimerList();
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EleSpec[0].DW = 0x0706050403020100; // None
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EleSpec[0].DW = 0x0706050403020100; // None
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EleSpec[1].DW = 0x0706050403020100; // None
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EleSpec[1].DW = 0x0706050403020100; // None
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@ -122,25 +112,17 @@ be greater than the number of cycles that the RSP should have performed.
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(this value is ignored if the RSP has been stopped)
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(this value is ignored if the RSP has been stopped)
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*/
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*/
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DWORD RunInterpreterCPU(DWORD Cycles);
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uint32_t RunInterpreterCPU(uint32_t Cycles);
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DWORD RunRecompilerCPU(DWORD Cycles);
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uint32_t RunRecompilerCPU(uint32_t Cycles);
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#define MI_INTR_SP 0x01 /* Bit 0: SP intr */
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#define MI_INTR_SP 0x01 /* Bit 0: SP intr */
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uint32_t DoRspCycles(uint32_t Cycles)
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uint32_t DoRspCycles(uint32_t Cycles)
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{
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{
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extern bool AudioHle, GraphicsHle;
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extern bool AudioHle, GraphicsHle;
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DWORD TaskType = *(DWORD *)(RSPInfo.DMEM + 0xFC0);
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uint32_t TaskType = *(uint32_t *)(RSPInfo.DMEM + 0xFC0);
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/* if (*RSPInfo.SP_STATUS_REG & SP_STATUS_SIG0)
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if (TaskType == 1 && GraphicsHle && *(uint32_t *)(RSPInfo.DMEM + 0x0ff0) != 0)
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{
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*RSPInfo.SP_STATUS_REG &= ~SP_STATUS_SIG0;
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*RSPInfo.MI_INTR_REG |= MI_INTR_SP;
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RSPInfo.CheckInterrupts();
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return Cycles;
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}
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*/
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if (TaskType == 1 && GraphicsHle && *(DWORD *)(RSPInfo.DMEM + 0x0ff0) != 0)
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{
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{
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if (RSPInfo.ProcessDList != NULL)
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if (RSPInfo.ProcessDList != NULL)
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{
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{
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@ -175,8 +157,6 @@ uint32_t DoRspCycles(uint32_t Cycles)
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RSPInfo.ShowCFB();
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RSPInfo.ShowCFB();
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}
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}
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Compiler.bAudioUcode = (TaskType == 2) ? true : false;
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/*
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/*
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*RSPInfo.SP_STATUS_REG |= (0x0203 );
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*RSPInfo.SP_STATUS_REG |= (0x0203 );
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if ((*RSPInfo.SP_STATUS_REG & SP_STATUS_INTR_BREAK) != 0 )
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if ((*RSPInfo.SP_STATUS_REG & SP_STATUS_INTR_BREAK) != 0 )
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@ -187,20 +167,11 @@ uint32_t DoRspCycles(uint32_t Cycles)
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//return Cycles;
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//return Cycles;
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*/
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*/
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if (Profiling && !IndvidualBlock)
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g_RSPDebugger->RspCyclesStart();
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{
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CGuard Guard(g_CPUCriticalSection);
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StartTimer((DWORD)Timer_RSP_Running);
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}
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WaitForSingleObjectEx(hMutex, 1000 * 100, false);
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if (BreakOnStart)
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{
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Enter_RSP_Commands_Window();
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}
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RSP_MfStatusCount = 0;
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RSP_MfStatusCount = 0;
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switch (CPUCore)
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switch (g_CPUCore)
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{
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{
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case RecompilerCPU:
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case RecompilerCPU:
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RunRecompilerCPU(Cycles);
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RunRecompilerCPU(Cycles);
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@ -209,12 +180,6 @@ uint32_t DoRspCycles(uint32_t Cycles)
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RunInterpreterCPU(Cycles);
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RunInterpreterCPU(Cycles);
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break;
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break;
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}
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}
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ReleaseMutex(hMutex);
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g_RSPDebugger->RspCyclesStop();
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if (Profiling && !IndvidualBlock)
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{
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StartTimer((DWORD)Timer_R4300_Running);
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}
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return Cycles;
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return Cycles;
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}
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}
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#include <Project64-rsp-core/cpu/RSPOpcode.h>
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#include "RSPOpcode.h"
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#include <Project64-rsp-core/cpu/RspTypes.h>
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#include "RspTypes.h"
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#include <Windows.h>
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enum RSPCpuType
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{
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InterpreterCPU = 0,
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RecompilerCPU = 1,
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};
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extern UDWORD EleSpec[16], Indx[16];
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extern UDWORD EleSpec[16], Indx[16];
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@ -17,7 +22,8 @@ extern p_func RSP_Sc2[32];
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extern uint32_t *PrgCount, RSP_Running;
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extern uint32_t *PrgCount, RSP_Running;
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extern RSPOpcode RSPOpC;
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extern RSPOpcode RSPOpC;
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void SetCPU(DWORD core);
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void SetCPU(RSPCpuType core);
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void Build_RSP(void);
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void Build_RSP(void);
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extern DWORD Mfc0Count, SemaphoreExit;
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extern uint32_t Mfc0Count, SemaphoreExit;
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extern RSPCpuType g_CPUCore;
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@ -0,0 +1,430 @@
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#include "RSPInterpreterCPU.h"
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#include "RSPCpu.h"
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#include "RSPInterpreterOps.h"
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#include "RSPRegisters.h"
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#include <Project64-rsp-core\RSPDebugger.h>
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#include <Project64-rsp-core\RSPInfo.h>
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RSPPIPELINE_STAGE RSP_NextInstruction;
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uint32_t RSP_JumpTo;
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void BuildInterpreterCPU(void)
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{
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RSP_Opcode[0] = RSP_Opcode_SPECIAL;
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RSP_Opcode[1] = RSP_Opcode_REGIMM;
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RSP_Opcode[2] = RSP_Opcode_J;
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RSP_Opcode[3] = RSP_Opcode_JAL;
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RSP_Opcode[4] = RSP_Opcode_BEQ;
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RSP_Opcode[5] = RSP_Opcode_BNE;
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RSP_Opcode[6] = RSP_Opcode_BLEZ;
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RSP_Opcode[7] = RSP_Opcode_BGTZ;
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RSP_Opcode[8] = RSP_Opcode_ADDI;
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RSP_Opcode[9] = RSP_Opcode_ADDIU;
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RSP_Opcode[10] = RSP_Opcode_SLTI;
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RSP_Opcode[11] = RSP_Opcode_SLTIU;
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RSP_Opcode[12] = RSP_Opcode_ANDI;
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RSP_Opcode[13] = RSP_Opcode_ORI;
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RSP_Opcode[14] = RSP_Opcode_XORI;
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RSP_Opcode[15] = RSP_Opcode_LUI;
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RSP_Opcode[16] = RSP_Opcode_COP0;
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RSP_Opcode[17] = rsp_UnknownOpcode;
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RSP_Opcode[18] = RSP_Opcode_COP2;
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RSP_Opcode[19] = rsp_UnknownOpcode;
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RSP_Opcode[20] = rsp_UnknownOpcode;
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RSP_Opcode[21] = rsp_UnknownOpcode;
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RSP_Opcode[22] = rsp_UnknownOpcode;
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RSP_Opcode[23] = rsp_UnknownOpcode;
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RSP_Opcode[24] = rsp_UnknownOpcode;
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RSP_Opcode[25] = rsp_UnknownOpcode;
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RSP_Opcode[26] = rsp_UnknownOpcode;
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RSP_Opcode[27] = rsp_UnknownOpcode;
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RSP_Opcode[28] = rsp_UnknownOpcode;
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RSP_Opcode[29] = rsp_UnknownOpcode;
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RSP_Opcode[30] = rsp_UnknownOpcode;
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RSP_Opcode[31] = rsp_UnknownOpcode;
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RSP_Opcode[32] = RSP_Opcode_LB;
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RSP_Opcode[33] = RSP_Opcode_LH;
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RSP_Opcode[34] = rsp_UnknownOpcode;
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RSP_Opcode[35] = RSP_Opcode_LW;
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RSP_Opcode[36] = RSP_Opcode_LBU;
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RSP_Opcode[37] = RSP_Opcode_LHU;
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RSP_Opcode[38] = rsp_UnknownOpcode;
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RSP_Opcode[39] = RSP_Opcode_LWU;
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RSP_Opcode[40] = RSP_Opcode_SB;
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RSP_Opcode[41] = RSP_Opcode_SH;
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RSP_Opcode[42] = rsp_UnknownOpcode;
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RSP_Opcode[43] = RSP_Opcode_SW;
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RSP_Opcode[44] = rsp_UnknownOpcode;
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RSP_Opcode[45] = rsp_UnknownOpcode;
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RSP_Opcode[46] = rsp_UnknownOpcode;
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RSP_Opcode[47] = rsp_UnknownOpcode;
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RSP_Opcode[48] = rsp_UnknownOpcode;
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RSP_Opcode[49] = rsp_UnknownOpcode;
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RSP_Opcode[50] = RSP_Opcode_LC2;
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RSP_Opcode[51] = rsp_UnknownOpcode;
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RSP_Opcode[52] = rsp_UnknownOpcode;
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RSP_Opcode[53] = rsp_UnknownOpcode;
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RSP_Opcode[54] = rsp_UnknownOpcode;
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RSP_Opcode[55] = rsp_UnknownOpcode;
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RSP_Opcode[56] = rsp_UnknownOpcode;
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RSP_Opcode[57] = rsp_UnknownOpcode;
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RSP_Opcode[58] = RSP_Opcode_SC2;
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RSP_Opcode[59] = rsp_UnknownOpcode;
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RSP_Opcode[60] = rsp_UnknownOpcode;
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RSP_Opcode[61] = rsp_UnknownOpcode;
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RSP_Opcode[62] = rsp_UnknownOpcode;
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RSP_Opcode[63] = rsp_UnknownOpcode;
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||||||
|
RSP_Special[0] = RSP_Special_SLL;
|
||||||
|
RSP_Special[1] = rsp_UnknownOpcode;
|
||||||
|
RSP_Special[2] = RSP_Special_SRL;
|
||||||
|
RSP_Special[3] = RSP_Special_SRA;
|
||||||
|
RSP_Special[4] = RSP_Special_SLLV;
|
||||||
|
RSP_Special[5] = rsp_UnknownOpcode;
|
||||||
|
RSP_Special[6] = RSP_Special_SRLV;
|
||||||
|
RSP_Special[7] = RSP_Special_SRAV;
|
||||||
|
RSP_Special[8] = RSP_Special_JR;
|
||||||
|
RSP_Special[9] = RSP_Special_JALR;
|
||||||
|
RSP_Special[10] = rsp_UnknownOpcode;
|
||||||
|
RSP_Special[11] = rsp_UnknownOpcode;
|
||||||
|
RSP_Special[12] = rsp_UnknownOpcode;
|
||||||
|
RSP_Special[13] = RSP_Special_BREAK;
|
||||||
|
RSP_Special[14] = rsp_UnknownOpcode;
|
||||||
|
RSP_Special[15] = rsp_UnknownOpcode;
|
||||||
|
RSP_Special[16] = rsp_UnknownOpcode;
|
||||||
|
RSP_Special[17] = rsp_UnknownOpcode;
|
||||||
|
RSP_Special[18] = rsp_UnknownOpcode;
|
||||||
|
RSP_Special[19] = rsp_UnknownOpcode;
|
||||||
|
RSP_Special[20] = rsp_UnknownOpcode;
|
||||||
|
RSP_Special[21] = rsp_UnknownOpcode;
|
||||||
|
RSP_Special[22] = rsp_UnknownOpcode;
|
||||||
|
RSP_Special[23] = rsp_UnknownOpcode;
|
||||||
|
RSP_Special[24] = rsp_UnknownOpcode;
|
||||||
|
RSP_Special[25] = rsp_UnknownOpcode;
|
||||||
|
RSP_Special[26] = rsp_UnknownOpcode;
|
||||||
|
RSP_Special[27] = rsp_UnknownOpcode;
|
||||||
|
RSP_Special[28] = rsp_UnknownOpcode;
|
||||||
|
RSP_Special[29] = rsp_UnknownOpcode;
|
||||||
|
RSP_Special[30] = rsp_UnknownOpcode;
|
||||||
|
RSP_Special[31] = rsp_UnknownOpcode;
|
||||||
|
RSP_Special[32] = RSP_Special_ADD;
|
||||||
|
RSP_Special[33] = RSP_Special_ADDU;
|
||||||
|
RSP_Special[34] = RSP_Special_SUB;
|
||||||
|
RSP_Special[35] = RSP_Special_SUBU;
|
||||||
|
RSP_Special[36] = RSP_Special_AND;
|
||||||
|
RSP_Special[37] = RSP_Special_OR;
|
||||||
|
RSP_Special[38] = RSP_Special_XOR;
|
||||||
|
RSP_Special[39] = RSP_Special_NOR;
|
||||||
|
RSP_Special[40] = rsp_UnknownOpcode;
|
||||||
|
RSP_Special[41] = rsp_UnknownOpcode;
|
||||||
|
RSP_Special[42] = RSP_Special_SLT;
|
||||||
|
RSP_Special[43] = RSP_Special_SLTU;
|
||||||
|
RSP_Special[44] = rsp_UnknownOpcode;
|
||||||
|
RSP_Special[45] = rsp_UnknownOpcode;
|
||||||
|
RSP_Special[46] = rsp_UnknownOpcode;
|
||||||
|
RSP_Special[47] = rsp_UnknownOpcode;
|
||||||
|
RSP_Special[48] = rsp_UnknownOpcode;
|
||||||
|
RSP_Special[49] = rsp_UnknownOpcode;
|
||||||
|
RSP_Special[50] = rsp_UnknownOpcode;
|
||||||
|
RSP_Special[51] = rsp_UnknownOpcode;
|
||||||
|
RSP_Special[52] = rsp_UnknownOpcode;
|
||||||
|
RSP_Special[53] = rsp_UnknownOpcode;
|
||||||
|
RSP_Special[54] = rsp_UnknownOpcode;
|
||||||
|
RSP_Special[55] = rsp_UnknownOpcode;
|
||||||
|
RSP_Special[56] = rsp_UnknownOpcode;
|
||||||
|
RSP_Special[57] = rsp_UnknownOpcode;
|
||||||
|
RSP_Special[58] = rsp_UnknownOpcode;
|
||||||
|
RSP_Special[59] = rsp_UnknownOpcode;
|
||||||
|
RSP_Special[60] = rsp_UnknownOpcode;
|
||||||
|
RSP_Special[61] = rsp_UnknownOpcode;
|
||||||
|
RSP_Special[62] = rsp_UnknownOpcode;
|
||||||
|
RSP_Special[63] = rsp_UnknownOpcode;
|
||||||
|
|
||||||
|
RSP_RegImm[0] = RSP_Opcode_BLTZ;
|
||||||
|
RSP_RegImm[1] = RSP_Opcode_BGEZ;
|
||||||
|
RSP_RegImm[2] = rsp_UnknownOpcode;
|
||||||
|
RSP_RegImm[3] = rsp_UnknownOpcode;
|
||||||
|
RSP_RegImm[4] = rsp_UnknownOpcode;
|
||||||
|
RSP_RegImm[5] = rsp_UnknownOpcode;
|
||||||
|
RSP_RegImm[6] = rsp_UnknownOpcode;
|
||||||
|
RSP_RegImm[7] = rsp_UnknownOpcode;
|
||||||
|
RSP_RegImm[8] = rsp_UnknownOpcode;
|
||||||
|
RSP_RegImm[9] = rsp_UnknownOpcode;
|
||||||
|
RSP_RegImm[10] = rsp_UnknownOpcode;
|
||||||
|
RSP_RegImm[11] = rsp_UnknownOpcode;
|
||||||
|
RSP_RegImm[12] = rsp_UnknownOpcode;
|
||||||
|
RSP_RegImm[13] = rsp_UnknownOpcode;
|
||||||
|
RSP_RegImm[14] = rsp_UnknownOpcode;
|
||||||
|
RSP_RegImm[15] = rsp_UnknownOpcode;
|
||||||
|
RSP_RegImm[16] = RSP_Opcode_BLTZAL;
|
||||||
|
RSP_RegImm[17] = RSP_Opcode_BGEZAL;
|
||||||
|
RSP_RegImm[18] = rsp_UnknownOpcode;
|
||||||
|
RSP_RegImm[19] = rsp_UnknownOpcode;
|
||||||
|
RSP_RegImm[20] = rsp_UnknownOpcode;
|
||||||
|
RSP_RegImm[21] = rsp_UnknownOpcode;
|
||||||
|
RSP_RegImm[22] = rsp_UnknownOpcode;
|
||||||
|
RSP_RegImm[23] = rsp_UnknownOpcode;
|
||||||
|
RSP_RegImm[24] = rsp_UnknownOpcode;
|
||||||
|
RSP_RegImm[25] = rsp_UnknownOpcode;
|
||||||
|
RSP_RegImm[26] = rsp_UnknownOpcode;
|
||||||
|
RSP_RegImm[27] = rsp_UnknownOpcode;
|
||||||
|
RSP_RegImm[28] = rsp_UnknownOpcode;
|
||||||
|
RSP_RegImm[29] = rsp_UnknownOpcode;
|
||||||
|
RSP_RegImm[30] = rsp_UnknownOpcode;
|
||||||
|
RSP_RegImm[31] = rsp_UnknownOpcode;
|
||||||
|
|
||||||
|
RSP_Cop0[0] = RSP_Cop0_MF;
|
||||||
|
RSP_Cop0[1] = rsp_UnknownOpcode;
|
||||||
|
RSP_Cop0[2] = rsp_UnknownOpcode;
|
||||||
|
RSP_Cop0[3] = rsp_UnknownOpcode;
|
||||||
|
RSP_Cop0[4] = RSP_Cop0_MT;
|
||||||
|
RSP_Cop0[5] = rsp_UnknownOpcode;
|
||||||
|
RSP_Cop0[6] = rsp_UnknownOpcode;
|
||||||
|
RSP_Cop0[7] = rsp_UnknownOpcode;
|
||||||
|
RSP_Cop0[8] = rsp_UnknownOpcode;
|
||||||
|
RSP_Cop0[9] = rsp_UnknownOpcode;
|
||||||
|
RSP_Cop0[10] = rsp_UnknownOpcode;
|
||||||
|
RSP_Cop0[11] = rsp_UnknownOpcode;
|
||||||
|
RSP_Cop0[12] = rsp_UnknownOpcode;
|
||||||
|
RSP_Cop0[13] = rsp_UnknownOpcode;
|
||||||
|
RSP_Cop0[14] = rsp_UnknownOpcode;
|
||||||
|
RSP_Cop0[15] = rsp_UnknownOpcode;
|
||||||
|
RSP_Cop0[16] = rsp_UnknownOpcode;
|
||||||
|
RSP_Cop0[17] = rsp_UnknownOpcode;
|
||||||
|
RSP_Cop0[18] = rsp_UnknownOpcode;
|
||||||
|
RSP_Cop0[19] = rsp_UnknownOpcode;
|
||||||
|
RSP_Cop0[20] = rsp_UnknownOpcode;
|
||||||
|
RSP_Cop0[21] = rsp_UnknownOpcode;
|
||||||
|
RSP_Cop0[22] = rsp_UnknownOpcode;
|
||||||
|
RSP_Cop0[23] = rsp_UnknownOpcode;
|
||||||
|
RSP_Cop0[24] = rsp_UnknownOpcode;
|
||||||
|
RSP_Cop0[25] = rsp_UnknownOpcode;
|
||||||
|
RSP_Cop0[26] = rsp_UnknownOpcode;
|
||||||
|
RSP_Cop0[27] = rsp_UnknownOpcode;
|
||||||
|
RSP_Cop0[28] = rsp_UnknownOpcode;
|
||||||
|
RSP_Cop0[29] = rsp_UnknownOpcode;
|
||||||
|
RSP_Cop0[30] = rsp_UnknownOpcode;
|
||||||
|
RSP_Cop0[31] = rsp_UnknownOpcode;
|
||||||
|
|
||||||
|
RSP_Cop2[0] = RSP_Cop2_MF;
|
||||||
|
RSP_Cop2[1] = rsp_UnknownOpcode;
|
||||||
|
RSP_Cop2[2] = RSP_Cop2_CF;
|
||||||
|
RSP_Cop2[3] = rsp_UnknownOpcode;
|
||||||
|
RSP_Cop2[4] = RSP_Cop2_MT;
|
||||||
|
RSP_Cop2[5] = rsp_UnknownOpcode;
|
||||||
|
RSP_Cop2[6] = RSP_Cop2_CT;
|
||||||
|
RSP_Cop2[7] = rsp_UnknownOpcode;
|
||||||
|
RSP_Cop2[8] = rsp_UnknownOpcode;
|
||||||
|
RSP_Cop2[9] = rsp_UnknownOpcode;
|
||||||
|
RSP_Cop2[10] = rsp_UnknownOpcode;
|
||||||
|
RSP_Cop2[11] = rsp_UnknownOpcode;
|
||||||
|
RSP_Cop2[12] = rsp_UnknownOpcode;
|
||||||
|
RSP_Cop2[13] = rsp_UnknownOpcode;
|
||||||
|
RSP_Cop2[14] = rsp_UnknownOpcode;
|
||||||
|
RSP_Cop2[15] = rsp_UnknownOpcode;
|
||||||
|
RSP_Cop2[16] = RSP_COP2_VECTOR;
|
||||||
|
RSP_Cop2[17] = RSP_COP2_VECTOR;
|
||||||
|
RSP_Cop2[18] = RSP_COP2_VECTOR;
|
||||||
|
RSP_Cop2[19] = RSP_COP2_VECTOR;
|
||||||
|
RSP_Cop2[20] = RSP_COP2_VECTOR;
|
||||||
|
RSP_Cop2[21] = RSP_COP2_VECTOR;
|
||||||
|
RSP_Cop2[22] = RSP_COP2_VECTOR;
|
||||||
|
RSP_Cop2[23] = RSP_COP2_VECTOR;
|
||||||
|
RSP_Cop2[24] = RSP_COP2_VECTOR;
|
||||||
|
RSP_Cop2[25] = RSP_COP2_VECTOR;
|
||||||
|
RSP_Cop2[26] = RSP_COP2_VECTOR;
|
||||||
|
RSP_Cop2[27] = RSP_COP2_VECTOR;
|
||||||
|
RSP_Cop2[28] = RSP_COP2_VECTOR;
|
||||||
|
RSP_Cop2[29] = RSP_COP2_VECTOR;
|
||||||
|
RSP_Cop2[30] = RSP_COP2_VECTOR;
|
||||||
|
RSP_Cop2[31] = RSP_COP2_VECTOR;
|
||||||
|
|
||||||
|
RSP_Vector[0] = RSP_Vector_VMULF;
|
||||||
|
RSP_Vector[1] = RSP_Vector_VMULU;
|
||||||
|
RSP_Vector[2] = rsp_UnknownOpcode;
|
||||||
|
RSP_Vector[3] = rsp_UnknownOpcode;
|
||||||
|
RSP_Vector[4] = RSP_Vector_VMUDL;
|
||||||
|
RSP_Vector[5] = RSP_Vector_VMUDM;
|
||||||
|
RSP_Vector[6] = RSP_Vector_VMUDN;
|
||||||
|
RSP_Vector[7] = RSP_Vector_VMUDH;
|
||||||
|
RSP_Vector[8] = RSP_Vector_VMACF;
|
||||||
|
RSP_Vector[9] = RSP_Vector_VMACU;
|
||||||
|
RSP_Vector[10] = rsp_UnknownOpcode;
|
||||||
|
RSP_Vector[11] = RSP_Vector_VMACQ;
|
||||||
|
RSP_Vector[12] = RSP_Vector_VMADL;
|
||||||
|
RSP_Vector[13] = RSP_Vector_VMADM;
|
||||||
|
RSP_Vector[14] = RSP_Vector_VMADN;
|
||||||
|
RSP_Vector[15] = RSP_Vector_VMADH;
|
||||||
|
RSP_Vector[16] = RSP_Vector_VADD;
|
||||||
|
RSP_Vector[17] = RSP_Vector_VSUB;
|
||||||
|
RSP_Vector[18] = RSP_Vector_VSUT;
|
||||||
|
RSP_Vector[19] = RSP_Vector_VABS;
|
||||||
|
RSP_Vector[20] = RSP_Vector_VADDC;
|
||||||
|
RSP_Vector[21] = RSP_Vector_VSUBC;
|
||||||
|
RSP_Vector[22] = rsp_UnknownOpcode;
|
||||||
|
RSP_Vector[23] = rsp_UnknownOpcode;
|
||||||
|
RSP_Vector[24] = rsp_UnknownOpcode;
|
||||||
|
RSP_Vector[25] = rsp_UnknownOpcode;
|
||||||
|
RSP_Vector[26] = rsp_UnknownOpcode;
|
||||||
|
RSP_Vector[27] = rsp_UnknownOpcode;
|
||||||
|
RSP_Vector[28] = rsp_UnknownOpcode;
|
||||||
|
RSP_Vector[29] = RSP_Vector_VSAW;
|
||||||
|
RSP_Vector[30] = rsp_UnknownOpcode;
|
||||||
|
RSP_Vector[31] = rsp_UnknownOpcode;
|
||||||
|
RSP_Vector[32] = RSP_Vector_VLT;
|
||||||
|
RSP_Vector[33] = RSP_Vector_VEQ;
|
||||||
|
RSP_Vector[34] = RSP_Vector_VNE;
|
||||||
|
RSP_Vector[35] = RSP_Vector_VGE;
|
||||||
|
RSP_Vector[36] = RSP_Vector_VCL;
|
||||||
|
RSP_Vector[37] = RSP_Vector_VCH;
|
||||||
|
RSP_Vector[38] = RSP_Vector_VCR;
|
||||||
|
RSP_Vector[39] = RSP_Vector_VMRG;
|
||||||
|
RSP_Vector[40] = RSP_Vector_VAND;
|
||||||
|
RSP_Vector[41] = RSP_Vector_VNAND;
|
||||||
|
RSP_Vector[42] = RSP_Vector_VOR;
|
||||||
|
RSP_Vector[43] = RSP_Vector_VNOR;
|
||||||
|
RSP_Vector[44] = RSP_Vector_VXOR;
|
||||||
|
RSP_Vector[45] = RSP_Vector_VNXOR;
|
||||||
|
RSP_Vector[46] = rsp_UnknownOpcode;
|
||||||
|
RSP_Vector[47] = rsp_UnknownOpcode;
|
||||||
|
RSP_Vector[48] = RSP_Vector_VRCP;
|
||||||
|
RSP_Vector[49] = RSP_Vector_VRCPL;
|
||||||
|
RSP_Vector[50] = RSP_Vector_VRCPH;
|
||||||
|
RSP_Vector[51] = RSP_Vector_VMOV;
|
||||||
|
RSP_Vector[52] = RSP_Vector_VRSQ;
|
||||||
|
RSP_Vector[53] = RSP_Vector_VRSQL;
|
||||||
|
RSP_Vector[54] = RSP_Vector_VRSQH;
|
||||||
|
RSP_Vector[55] = RSP_Vector_VNOOP;
|
||||||
|
RSP_Vector[56] = rsp_UnknownOpcode;
|
||||||
|
RSP_Vector[57] = rsp_UnknownOpcode;
|
||||||
|
RSP_Vector[58] = rsp_UnknownOpcode;
|
||||||
|
RSP_Vector[59] = rsp_UnknownOpcode;
|
||||||
|
RSP_Vector[60] = rsp_UnknownOpcode;
|
||||||
|
RSP_Vector[61] = rsp_UnknownOpcode;
|
||||||
|
RSP_Vector[62] = rsp_UnknownOpcode;
|
||||||
|
RSP_Vector[63] = rsp_UnknownOpcode;
|
||||||
|
|
||||||
|
RSP_Lc2[0] = RSP_Opcode_LBV;
|
||||||
|
RSP_Lc2[1] = RSP_Opcode_LSV;
|
||||||
|
RSP_Lc2[2] = RSP_Opcode_LLV;
|
||||||
|
RSP_Lc2[3] = RSP_Opcode_LDV;
|
||||||
|
RSP_Lc2[4] = RSP_Opcode_LQV;
|
||||||
|
RSP_Lc2[5] = RSP_Opcode_LRV;
|
||||||
|
RSP_Lc2[6] = RSP_Opcode_LPV;
|
||||||
|
RSP_Lc2[7] = RSP_Opcode_LUV;
|
||||||
|
RSP_Lc2[8] = RSP_Opcode_LHV;
|
||||||
|
RSP_Lc2[9] = RSP_Opcode_LFV;
|
||||||
|
RSP_Lc2[10] = RSP_Opcode_LWV;
|
||||||
|
RSP_Lc2[11] = RSP_Opcode_LTV;
|
||||||
|
RSP_Lc2[12] = rsp_UnknownOpcode;
|
||||||
|
RSP_Lc2[13] = rsp_UnknownOpcode;
|
||||||
|
RSP_Lc2[14] = rsp_UnknownOpcode;
|
||||||
|
RSP_Lc2[15] = rsp_UnknownOpcode;
|
||||||
|
RSP_Lc2[16] = rsp_UnknownOpcode;
|
||||||
|
RSP_Lc2[17] = rsp_UnknownOpcode;
|
||||||
|
RSP_Lc2[18] = rsp_UnknownOpcode;
|
||||||
|
RSP_Lc2[19] = rsp_UnknownOpcode;
|
||||||
|
RSP_Lc2[20] = rsp_UnknownOpcode;
|
||||||
|
RSP_Lc2[21] = rsp_UnknownOpcode;
|
||||||
|
RSP_Lc2[22] = rsp_UnknownOpcode;
|
||||||
|
RSP_Lc2[23] = rsp_UnknownOpcode;
|
||||||
|
RSP_Lc2[24] = rsp_UnknownOpcode;
|
||||||
|
RSP_Lc2[25] = rsp_UnknownOpcode;
|
||||||
|
RSP_Lc2[26] = rsp_UnknownOpcode;
|
||||||
|
RSP_Lc2[27] = rsp_UnknownOpcode;
|
||||||
|
RSP_Lc2[28] = rsp_UnknownOpcode;
|
||||||
|
RSP_Lc2[29] = rsp_UnknownOpcode;
|
||||||
|
RSP_Lc2[30] = rsp_UnknownOpcode;
|
||||||
|
RSP_Lc2[31] = rsp_UnknownOpcode;
|
||||||
|
|
||||||
|
RSP_Sc2[0] = RSP_Opcode_SBV;
|
||||||
|
RSP_Sc2[1] = RSP_Opcode_SSV;
|
||||||
|
RSP_Sc2[2] = RSP_Opcode_SLV;
|
||||||
|
RSP_Sc2[3] = RSP_Opcode_SDV;
|
||||||
|
RSP_Sc2[4] = RSP_Opcode_SQV;
|
||||||
|
RSP_Sc2[5] = RSP_Opcode_SRV;
|
||||||
|
RSP_Sc2[6] = RSP_Opcode_SPV;
|
||||||
|
RSP_Sc2[7] = RSP_Opcode_SUV;
|
||||||
|
RSP_Sc2[8] = RSP_Opcode_SHV;
|
||||||
|
RSP_Sc2[9] = RSP_Opcode_SFV;
|
||||||
|
RSP_Sc2[10] = RSP_Opcode_SWV;
|
||||||
|
RSP_Sc2[11] = RSP_Opcode_STV;
|
||||||
|
RSP_Sc2[12] = rsp_UnknownOpcode;
|
||||||
|
RSP_Sc2[13] = rsp_UnknownOpcode;
|
||||||
|
RSP_Sc2[14] = rsp_UnknownOpcode;
|
||||||
|
RSP_Sc2[15] = rsp_UnknownOpcode;
|
||||||
|
RSP_Sc2[16] = rsp_UnknownOpcode;
|
||||||
|
RSP_Sc2[17] = rsp_UnknownOpcode;
|
||||||
|
RSP_Sc2[18] = rsp_UnknownOpcode;
|
||||||
|
RSP_Sc2[19] = rsp_UnknownOpcode;
|
||||||
|
RSP_Sc2[20] = rsp_UnknownOpcode;
|
||||||
|
RSP_Sc2[21] = rsp_UnknownOpcode;
|
||||||
|
RSP_Sc2[22] = rsp_UnknownOpcode;
|
||||||
|
RSP_Sc2[23] = rsp_UnknownOpcode;
|
||||||
|
RSP_Sc2[24] = rsp_UnknownOpcode;
|
||||||
|
RSP_Sc2[25] = rsp_UnknownOpcode;
|
||||||
|
RSP_Sc2[26] = rsp_UnknownOpcode;
|
||||||
|
RSP_Sc2[27] = rsp_UnknownOpcode;
|
||||||
|
RSP_Sc2[28] = rsp_UnknownOpcode;
|
||||||
|
RSP_Sc2[29] = rsp_UnknownOpcode;
|
||||||
|
RSP_Sc2[30] = rsp_UnknownOpcode;
|
||||||
|
RSP_Sc2[31] = rsp_UnknownOpcode;
|
||||||
|
}
|
||||||
|
|
||||||
|
uint32_t RunInterpreterCPU(uint32_t Cycles)
|
||||||
|
{
|
||||||
|
uint32_t CycleCount;
|
||||||
|
RSP_Running = true;
|
||||||
|
g_RSPDebugger->StartingCPU();
|
||||||
|
CycleCount = 0;
|
||||||
|
|
||||||
|
while (RSP_Running)
|
||||||
|
{
|
||||||
|
g_RSPDebugger->BeforeExecuteOp();
|
||||||
|
|
||||||
|
RSPOpC.Value = *(uint32_t *)(RSPInfo.IMEM + (*PrgCount & 0xFFC));
|
||||||
|
RSP_Opcode[RSPOpC.op]();
|
||||||
|
RSP_GPR[0].W = 0x00000000; // MIPS $zero hard-wired to 0
|
||||||
|
|
||||||
|
switch (RSP_NextInstruction)
|
||||||
|
{
|
||||||
|
case RSPPIPELINE_NORMAL:
|
||||||
|
*PrgCount = (*PrgCount + 4) & 0xFFC;
|
||||||
|
break;
|
||||||
|
case RSPPIPELINE_DELAY_SLOT:
|
||||||
|
RSP_NextInstruction = RSPPIPELINE_JUMP;
|
||||||
|
*PrgCount = (*PrgCount + 4) & 0xFFC;
|
||||||
|
break;
|
||||||
|
case RSPPIPELINE_JUMP:
|
||||||
|
RSP_NextInstruction = RSPPIPELINE_NORMAL;
|
||||||
|
*PrgCount = RSP_JumpTo;
|
||||||
|
break;
|
||||||
|
case RSPPIPELINE_SINGLE_STEP:
|
||||||
|
*PrgCount = (*PrgCount + 4) & 0xFFC;
|
||||||
|
RSP_NextInstruction = RSPPIPELINE_SINGLE_STEP_DONE;
|
||||||
|
break;
|
||||||
|
case RSPPIPELINE_SINGLE_STEP_DONE:
|
||||||
|
*PrgCount = (*PrgCount + 4) & 0xFFC;
|
||||||
|
*RSPInfo.SP_STATUS_REG |= SP_STATUS_HALT;
|
||||||
|
RSP_Running = false;
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
return Cycles;
|
||||||
|
}
|
||||||
|
|
||||||
|
unsigned int RSP_branch_if(int condition)
|
||||||
|
{
|
||||||
|
unsigned int new_PC;
|
||||||
|
|
||||||
|
/* RSP_NextInstruction = DELAY_SLOT; */
|
||||||
|
if (condition)
|
||||||
|
{
|
||||||
|
new_PC = *PrgCount + 4 + ((short)RSPOpC.offset << 2);
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
new_PC = *PrgCount + 4 + 4;
|
||||||
|
}
|
||||||
|
return (new_PC & 0xFFC);
|
||||||
|
}
|
|
@ -0,0 +1,28 @@
|
||||||
|
#include <stdint.h>
|
||||||
|
|
||||||
|
enum RSPPIPELINE_STAGE
|
||||||
|
{
|
||||||
|
RSPPIPELINE_NORMAL = 0,
|
||||||
|
RSPPIPELINE_DO_DELAY_SLOT = 1,
|
||||||
|
RSPPIPELINE_DELAY_SLOT = 2,
|
||||||
|
RSPPIPELINE_DELAY_SLOT_DONE = 3,
|
||||||
|
RSPPIPELINE_DELAY_SLOT_EXIT = 4,
|
||||||
|
RSPPIPELINE_DELAY_SLOT_EXIT_DONE = 5,
|
||||||
|
RSPPIPELINE_JUMP = 6,
|
||||||
|
RSPPIPELINE_SINGLE_STEP = 7,
|
||||||
|
RSPPIPELINE_SINGLE_STEP_DONE = 8,
|
||||||
|
RSPPIPELINE_FINISH_BLOCK = 9,
|
||||||
|
RSPPIPELINE_FINISH_SUB_BLOCK = 10,
|
||||||
|
};
|
||||||
|
|
||||||
|
extern RSPPIPELINE_STAGE RSP_NextInstruction;
|
||||||
|
extern uint32_t RSP_JumpTo;
|
||||||
|
extern uint32_t RSP_MfStatusCount;
|
||||||
|
|
||||||
|
// Standard MIPS PC-relative branch
|
||||||
|
// Returns the new PC, based on whether the condition passes
|
||||||
|
|
||||||
|
unsigned int RSP_branch_if(int condition);
|
||||||
|
|
||||||
|
void BuildInterpreterCPU(void);
|
||||||
|
uint32_t RunInterpreterCPU(uint32_t Cycles);
|
|
@ -1,37 +1,12 @@
|
||||||
#include "CPU.h"
|
#include "RSPCpu.h"
|
||||||
#include "Interpreter CPU.h"
|
#include "RSPInterpreterCPU.h"
|
||||||
#include "RSP Command.h"
|
#include "RSPRegisters.h"
|
||||||
#include "Rsp.h"
|
#include <Common/StdString.h>
|
||||||
#include "dma.h"
|
#include <Project64-rsp-core\RSPDebugger.h>
|
||||||
#include "log.h"
|
#include <Project64-rsp-core\RSPInfo.h>
|
||||||
#include "memory.h"
|
#include <Settings/Settings.h>
|
||||||
#include "x86.h"
|
|
||||||
#include <Project64-rsp-core/cpu/RSPInstruction.h>
|
|
||||||
#include <Project64-rsp-core/cpu/RSPRegisters.h>
|
|
||||||
#include <Project64-rsp-core/cpu/RspTypes.h>
|
|
||||||
#include <math.h>
|
|
||||||
#include <stdio.h>
|
|
||||||
#include <windows.h>
|
|
||||||
|
|
||||||
#include <float.h>
|
#include <float.h>
|
||||||
|
#include <math.h>
|
||||||
// TODO: Is this still an issue? If so, investigate, and if not, remove this!
|
|
||||||
/*
|
|
||||||
* Unfortunately, GCC 4.8.2 stable still has a bug with their <float.h> that
|
|
||||||
* includes a different copy of <float.h> from a different directory.
|
|
||||||
*
|
|
||||||
* Until that bug is fixed, the below macro definitions can be forced.
|
|
||||||
*
|
|
||||||
* It also is possible to emulate the RSP divide op-codes using a hardware-
|
|
||||||
* accurate LUT instead of any floating-point functions, so that works, too.
|
|
||||||
*/
|
|
||||||
|
|
||||||
#ifndef _MCW_RC
|
|
||||||
#define _MCW_RC 0x00000300
|
|
||||||
#endif
|
|
||||||
#ifndef _RC_CHOP
|
|
||||||
#define _RC_CHOP 0x00000300
|
|
||||||
#endif
|
|
||||||
|
|
||||||
extern UWORD32 Recp, RecpResult, SQroot, SQrootResult;
|
extern UWORD32 Recp, RecpResult, SQroot, SQrootResult;
|
||||||
extern bool AudioHle, GraphicsHle;
|
extern bool AudioHle, GraphicsHle;
|
||||||
|
@ -50,38 +25,38 @@ void RSP_Opcode_REGIMM(void)
|
||||||
|
|
||||||
void RSP_Opcode_J(void)
|
void RSP_Opcode_J(void)
|
||||||
{
|
{
|
||||||
RSP_NextInstruction = DELAY_SLOT;
|
RSP_NextInstruction = RSPPIPELINE_DELAY_SLOT;
|
||||||
RSP_JumpTo = (RSPOpC.target << 2) & 0xFFC;
|
RSP_JumpTo = (RSPOpC.target << 2) & 0xFFC;
|
||||||
}
|
}
|
||||||
|
|
||||||
void RSP_Opcode_JAL(void)
|
void RSP_Opcode_JAL(void)
|
||||||
{
|
{
|
||||||
RSP_NextInstruction = DELAY_SLOT;
|
RSP_NextInstruction = RSPPIPELINE_DELAY_SLOT;
|
||||||
RSP_GPR[31].UW = (*PrgCount + 8) & 0xFFC;
|
RSP_GPR[31].UW = (*PrgCount + 8) & 0xFFC;
|
||||||
RSP_JumpTo = (RSPOpC.target << 2) & 0xFFC;
|
RSP_JumpTo = (RSPOpC.target << 2) & 0xFFC;
|
||||||
}
|
}
|
||||||
|
|
||||||
void RSP_Opcode_BEQ(void)
|
void RSP_Opcode_BEQ(void)
|
||||||
{
|
{
|
||||||
RSP_NextInstruction = DELAY_SLOT;
|
RSP_NextInstruction = RSPPIPELINE_DELAY_SLOT;
|
||||||
RSP_JumpTo = RSP_branch_if(RSP_GPR[RSPOpC.rs].W == RSP_GPR[RSPOpC.rt].W);
|
RSP_JumpTo = RSP_branch_if(RSP_GPR[RSPOpC.rs].W == RSP_GPR[RSPOpC.rt].W);
|
||||||
}
|
}
|
||||||
|
|
||||||
void RSP_Opcode_BNE(void)
|
void RSP_Opcode_BNE(void)
|
||||||
{
|
{
|
||||||
RSP_NextInstruction = DELAY_SLOT;
|
RSP_NextInstruction = RSPPIPELINE_DELAY_SLOT;
|
||||||
RSP_JumpTo = RSP_branch_if(RSP_GPR[RSPOpC.rs].W != RSP_GPR[RSPOpC.rt].W);
|
RSP_JumpTo = RSP_branch_if(RSP_GPR[RSPOpC.rs].W != RSP_GPR[RSPOpC.rt].W);
|
||||||
}
|
}
|
||||||
|
|
||||||
void RSP_Opcode_BLEZ(void)
|
void RSP_Opcode_BLEZ(void)
|
||||||
{
|
{
|
||||||
RSP_NextInstruction = DELAY_SLOT;
|
RSP_NextInstruction = RSPPIPELINE_DELAY_SLOT;
|
||||||
RSP_JumpTo = RSP_branch_if(RSP_GPR[RSPOpC.rs].W <= 0);
|
RSP_JumpTo = RSP_branch_if(RSP_GPR[RSPOpC.rs].W <= 0);
|
||||||
}
|
}
|
||||||
|
|
||||||
void RSP_Opcode_BGTZ(void)
|
void RSP_Opcode_BGTZ(void)
|
||||||
{
|
{
|
||||||
RSP_NextInstruction = DELAY_SLOT;
|
RSP_NextInstruction = RSPPIPELINE_DELAY_SLOT;
|
||||||
RSP_JumpTo = RSP_branch_if(RSP_GPR[RSPOpC.rs].W > 0);
|
RSP_JumpTo = RSP_branch_if(RSP_GPR[RSPOpC.rs].W > 0);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -289,13 +264,13 @@ void RSP_Special_SRAV(void)
|
||||||
|
|
||||||
void RSP_Special_JR(void)
|
void RSP_Special_JR(void)
|
||||||
{
|
{
|
||||||
RSP_NextInstruction = DELAY_SLOT;
|
RSP_NextInstruction = RSPPIPELINE_DELAY_SLOT;
|
||||||
RSP_JumpTo = (RSP_GPR[RSPOpC.rs].W & 0xFFC);
|
RSP_JumpTo = (RSP_GPR[RSPOpC.rs].W & 0xFFC);
|
||||||
}
|
}
|
||||||
|
|
||||||
void RSP_Special_JALR(void)
|
void RSP_Special_JALR(void)
|
||||||
{
|
{
|
||||||
RSP_NextInstruction = DELAY_SLOT;
|
RSP_NextInstruction = RSPPIPELINE_DELAY_SLOT;
|
||||||
RSP_GPR[RSPOpC.rd].W = (*PrgCount + 8) & 0xFFC;
|
RSP_GPR[RSPOpC.rd].W = (*PrgCount + 8) & 0xFFC;
|
||||||
RSP_JumpTo = (RSP_GPR[RSPOpC.rs].W & 0xFFC);
|
RSP_JumpTo = (RSP_GPR[RSPOpC.rs].W & 0xFFC);
|
||||||
}
|
}
|
||||||
|
@ -365,26 +340,26 @@ void RSP_Special_SLTU(void)
|
||||||
|
|
||||||
void RSP_Opcode_BLTZ(void)
|
void RSP_Opcode_BLTZ(void)
|
||||||
{
|
{
|
||||||
RSP_NextInstruction = DELAY_SLOT;
|
RSP_NextInstruction = RSPPIPELINE_DELAY_SLOT;
|
||||||
RSP_JumpTo = RSP_branch_if(RSP_GPR[RSPOpC.rs].W < 0);
|
RSP_JumpTo = RSP_branch_if(RSP_GPR[RSPOpC.rs].W < 0);
|
||||||
}
|
}
|
||||||
|
|
||||||
void RSP_Opcode_BGEZ(void)
|
void RSP_Opcode_BGEZ(void)
|
||||||
{
|
{
|
||||||
RSP_NextInstruction = DELAY_SLOT;
|
RSP_NextInstruction = RSPPIPELINE_DELAY_SLOT;
|
||||||
RSP_JumpTo = RSP_branch_if(RSP_GPR[RSPOpC.rs].W >= 0);
|
RSP_JumpTo = RSP_branch_if(RSP_GPR[RSPOpC.rs].W >= 0);
|
||||||
}
|
}
|
||||||
|
|
||||||
void RSP_Opcode_BLTZAL(void)
|
void RSP_Opcode_BLTZAL(void)
|
||||||
{
|
{
|
||||||
RSP_NextInstruction = DELAY_SLOT;
|
RSP_NextInstruction = RSPPIPELINE_DELAY_SLOT;
|
||||||
RSP_GPR[31].UW = (*PrgCount + 8) & 0xFFC;
|
RSP_GPR[31].UW = (*PrgCount + 8) & 0xFFC;
|
||||||
RSP_JumpTo = RSP_branch_if(RSP_GPR[RSPOpC.rs].W < 0);
|
RSP_JumpTo = RSP_branch_if(RSP_GPR[RSPOpC.rs].W < 0);
|
||||||
}
|
}
|
||||||
|
|
||||||
void RSP_Opcode_BGEZAL(void)
|
void RSP_Opcode_BGEZAL(void)
|
||||||
{
|
{
|
||||||
RSP_NextInstruction = DELAY_SLOT;
|
RSP_NextInstruction = RSPPIPELINE_DELAY_SLOT;
|
||||||
RSP_GPR[31].UW = (*PrgCount + 8) & 0xFFC;
|
RSP_GPR[31].UW = (*PrgCount + 8) & 0xFFC;
|
||||||
RSP_JumpTo = RSP_branch_if(RSP_GPR[RSPOpC.rs].W >= 0);
|
RSP_JumpTo = RSP_branch_if(RSP_GPR[RSPOpC.rs].W >= 0);
|
||||||
}
|
}
|
||||||
|
@ -393,10 +368,7 @@ void RSP_Opcode_BGEZAL(void)
|
||||||
|
|
||||||
void RSP_Cop0_MF(void)
|
void RSP_Cop0_MF(void)
|
||||||
{
|
{
|
||||||
if (LogRDP && CPUCore == InterpreterCPU)
|
g_RSPDebugger->RDP_LogMF0(*PrgCount, RSPOpC.rd);
|
||||||
{
|
|
||||||
RDP_LogMF0(*PrgCount, RSPOpC.rd);
|
|
||||||
}
|
|
||||||
switch (RSPOpC.rd)
|
switch (RSPOpC.rd)
|
||||||
{
|
{
|
||||||
case 0: RSP_GPR[RSPOpC.rt].UW = *RSPInfo.SP_MEM_ADDR_REG; break;
|
case 0: RSP_GPR[RSPOpC.rt].UW = *RSPInfo.SP_MEM_ADDR_REG; break;
|
||||||
|
@ -429,13 +401,15 @@ void RSP_Cop0_MF(void)
|
||||||
case 11: RSP_GPR[RSPOpC.rt].W = *RSPInfo.DPC_STATUS_REG; break;
|
case 11: RSP_GPR[RSPOpC.rt].W = *RSPInfo.DPC_STATUS_REG; break;
|
||||||
case 12: RSP_GPR[RSPOpC.rt].W = *RSPInfo.DPC_CLOCK_REG; break;
|
case 12: RSP_GPR[RSPOpC.rt].W = *RSPInfo.DPC_CLOCK_REG; break;
|
||||||
default:
|
default:
|
||||||
DisplayError("We have not implemented RSP MF CP0 reg %s (%d)", COP0_Name(RSPOpC.rd), RSPOpC.rd);
|
g_Notify->DisplayError(stdstr_f("We have not implemented RSP MF CP0 reg %s (%d)", COP0_Name(RSPOpC.rd), RSPOpC.rd).c_str());
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
void RSP_Cop0_MT(void)
|
void RSP_Cop0_MT(void)
|
||||||
{
|
{
|
||||||
if (LogRDP && CPUCore == InterpreterCPU)
|
__debugbreak();
|
||||||
|
#ifdef tofix
|
||||||
|
if (LogRDP && g_CPUCore == InterpreterCPU)
|
||||||
{
|
{
|
||||||
RDP_LogMT0(*PrgCount, RSPOpC.rd, RSP_GPR[RSPOpC.rt].UW);
|
RDP_LogMT0(*PrgCount, RSPOpC.rd, RSP_GPR[RSPOpC.rt].UW);
|
||||||
}
|
}
|
||||||
|
@ -481,7 +455,7 @@ void RSP_Cop0_MT(void)
|
||||||
if ((RSP_GPR[RSPOpC.rt].W & SP_SET_SSTEP) != 0)
|
if ((RSP_GPR[RSPOpC.rt].W & SP_SET_SSTEP) != 0)
|
||||||
{
|
{
|
||||||
*RSPInfo.SP_STATUS_REG |= SP_STATUS_SSTEP;
|
*RSPInfo.SP_STATUS_REG |= SP_STATUS_SSTEP;
|
||||||
RSP_NextInstruction = SINGLE_STEP;
|
RSP_NextInstruction = RSPPIPELINE_SINGLE_STEP;
|
||||||
}
|
}
|
||||||
if ((RSP_GPR[RSPOpC.rt].W & SP_CLR_INTR_BREAK) != 0)
|
if ((RSP_GPR[RSPOpC.rt].W & SP_CLR_INTR_BREAK) != 0)
|
||||||
{
|
{
|
||||||
|
@ -613,6 +587,7 @@ void RSP_Cop0_MT(void)
|
||||||
default:
|
default:
|
||||||
DisplayError("We have not implemented RSP MT CP0 reg %s (%d)", COP0_Name(RSPOpC.rd), RSPOpC.rd);
|
DisplayError("We have not implemented RSP MT CP0 reg %s (%d)", COP0_Name(RSPOpC.rd), RSPOpC.rd);
|
||||||
}
|
}
|
||||||
|
#endif
|
||||||
}
|
}
|
||||||
|
|
||||||
// COP2 functions
|
// COP2 functions
|
||||||
|
@ -913,7 +888,7 @@ void RSP_Vector_VMACU(void)
|
||||||
del = EleSpec[RSPOpC.e].B[el];
|
del = EleSpec[RSPOpC.e].B[el];
|
||||||
|
|
||||||
temp.W = (int32_t)RSP_Vect[RSPOpC.vs].s16(el) * (int32_t)(uint32_t)RSP_Vect[RSPOpC.vt].s16(del);
|
temp.W = (int32_t)RSP_Vect[RSPOpC.vs].s16(el) * (int32_t)(uint32_t)RSP_Vect[RSPOpC.vt].s16(del);
|
||||||
RSP_ACCUM[el].UHW[3] = (RSP_ACCUM[el].UHW[3] + (WORD)(temp.W >> 31)) & 0xFFFF;
|
RSP_ACCUM[el].UHW[3] = (RSP_ACCUM[el].UHW[3] + (uint16_t)(temp.W >> 31)) & 0xFFFF;
|
||||||
temp.UW = temp.UW << 1;
|
temp.UW = temp.UW << 1;
|
||||||
temp2.UW = temp.UHW[0] + RSP_ACCUM[el].UHW[1];
|
temp2.UW = temp.UHW[0] + RSP_ACCUM[el].UHW[1];
|
||||||
RSP_ACCUM[el].HW[1] = temp2.HW[0];
|
RSP_ACCUM[el].HW[1] = temp2.HW[0];
|
||||||
|
@ -1440,7 +1415,7 @@ void RSP_Vector_VLT(void)
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
Result.u16(el) = RSP_Vect[RSPOpC.vs].u16(el);
|
Result.u16(el) = RSP_Vect[RSPOpC.vs].u16(el);
|
||||||
if ((RSP_Flags[0].UW & (0x101 << (7 - el))) == (WORD)(0x101 << (7 - el)))
|
if ((RSP_Flags[0].UW & (0x101 << (7 - el))) == (uint16_t)(0x101 << (7 - el)))
|
||||||
{
|
{
|
||||||
RSP_Flags[1].UW |= (1 << (7 - el));
|
RSP_Flags[1].UW |= (1 << (7 - el));
|
||||||
}
|
}
|
||||||
|
@ -1520,7 +1495,7 @@ void RSP_Vector_VGE(void)
|
||||||
if (RSP_Vect[RSPOpC.vs].s16(el) == RSP_Vect[RSPOpC.vt].s16(del))
|
if (RSP_Vect[RSPOpC.vs].s16(el) == RSP_Vect[RSPOpC.vt].s16(del))
|
||||||
{
|
{
|
||||||
Result.u16(el) = RSP_Vect[RSPOpC.vs].u16(el);
|
Result.u16(el) = RSP_Vect[RSPOpC.vs].u16(el);
|
||||||
if ((RSP_Flags[0].UW & (0x101 << (7 - el))) == (WORD)(0x101 << (7 - el)))
|
if ((RSP_Flags[0].UW & (0x101 << (7 - el))) == (uint16_t)(0x101 << (7 - el)))
|
||||||
{
|
{
|
||||||
RSP_Flags[1].UW &= ~(1 << (7 - el));
|
RSP_Flags[1].UW &= ~(1 << (7 - el));
|
||||||
}
|
}
|
||||||
|
@ -1878,8 +1853,8 @@ void RSP_Vector_VRCP(void)
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
{
|
{
|
||||||
DWORD RoundMethod = _RC_CHOP;
|
uint32_t RoundMethod = _RC_CHOP;
|
||||||
DWORD OldModel = _controlfp(RoundMethod, _MCW_RC);
|
uint32_t OldModel = _controlfp(RoundMethod, _MCW_RC);
|
||||||
RecpResult.W = (long)((0x7FFFFFFF / (double)RecpResult.W));
|
RecpResult.W = (long)((0x7FFFFFFF / (double)RecpResult.W));
|
||||||
OldModel = _controlfp(OldModel, _MCW_RC);
|
OldModel = _controlfp(OldModel, _MCW_RC);
|
||||||
}
|
}
|
||||||
|
@ -1940,7 +1915,7 @@ void RSP_Vector_VRCPL(void)
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
{
|
{
|
||||||
DWORD OldModel = _controlfp(_RC_CHOP, _MCW_RC);
|
uint32_t OldModel = _controlfp(_RC_CHOP, _MCW_RC);
|
||||||
//RecpResult.W = 0x7FFFFFFF / RecpResult.W;
|
//RecpResult.W = 0x7FFFFFFF / RecpResult.W;
|
||||||
RecpResult.W = (long)((0x7FFFFFFF / (double)RecpResult.W));
|
RecpResult.W = (long)((0x7FFFFFFF / (double)RecpResult.W));
|
||||||
OldModel = _controlfp(OldModel, _MCW_RC);
|
OldModel = _controlfp(OldModel, _MCW_RC);
|
||||||
|
@ -2021,8 +1996,8 @@ void RSP_Vector_VRSQ(void)
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
{
|
{
|
||||||
DWORD RoundMethod = _RC_CHOP;
|
uint32_t RoundMethod = _RC_CHOP;
|
||||||
DWORD OldModel = _controlfp(RoundMethod, _MCW_RC);
|
uint32_t OldModel = _controlfp(RoundMethod, _MCW_RC);
|
||||||
SQrootResult.W = (long)(0x7FFFFFFF / sqrt(SQrootResult.W));
|
SQrootResult.W = (long)(0x7FFFFFFF / sqrt(SQrootResult.W));
|
||||||
OldModel = _controlfp(OldModel, _MCW_RC);
|
OldModel = _controlfp(OldModel, _MCW_RC);
|
||||||
}
|
}
|
||||||
|
@ -2087,7 +2062,7 @@ void RSP_Vector_VRSQL(void)
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
{
|
{
|
||||||
DWORD OldModel = _controlfp(_RC_CHOP, _MCW_RC);
|
uint32_t OldModel = _controlfp(_RC_CHOP, _MCW_RC);
|
||||||
SQrootResult.W = (long)(0x7FFFFFFF / sqrt(SQrootResult.W));
|
SQrootResult.W = (long)(0x7FFFFFFF / sqrt(SQrootResult.W));
|
||||||
OldModel = _controlfp(OldModel, _MCW_RC);
|
OldModel = _controlfp(OldModel, _MCW_RC);
|
||||||
}
|
}
|
||||||
|
@ -2541,23 +2516,5 @@ void RSP_Opcode_SWV(void)
|
||||||
|
|
||||||
void rsp_UnknownOpcode(void)
|
void rsp_UnknownOpcode(void)
|
||||||
{
|
{
|
||||||
char Message[200];
|
g_RSPDebugger->UnknownOpcode();
|
||||||
int response;
|
|
||||||
|
|
||||||
if (InRSPCommandsWindow)
|
|
||||||
{
|
|
||||||
SetRSPCommandViewto(*PrgCount);
|
|
||||||
DisplayError("Unhandled Opcode\n%s\n\nStopping emulation", RSPInstruction(*PrgCount, RSPOpC.Value).NameAndParam().c_str());
|
|
||||||
}
|
|
||||||
else
|
|
||||||
{
|
|
||||||
sprintf(Message, "Unhandled Opcode\n%s\n\nStopping emulation.\n\nWould you like to open the debugger?",
|
|
||||||
RSPInstruction(*PrgCount, RSPOpC.Value).NameAndParam().c_str());
|
|
||||||
response = MessageBoxA(NULL, Message, "Error", MB_YESNO | MB_ICONERROR);
|
|
||||||
if (response == IDYES)
|
|
||||||
{
|
|
||||||
Enter_RSP_Commands_Window();
|
|
||||||
}
|
|
||||||
}
|
|
||||||
ExitThread(0);
|
|
||||||
}
|
}
|
|
@ -0,0 +1,121 @@
|
||||||
|
#include "RSPDebuggerUI.h"
|
||||||
|
#include "Profiling.h"
|
||||||
|
#include "Recompiler CPU.h"
|
||||||
|
#include <Project64-rsp-core\RSPInfo.h>
|
||||||
|
#include <Project64-rsp-core\cpu\RSPCpu.h>
|
||||||
|
#include <Project64-rsp-core\cpu\RSPInstruction.h>
|
||||||
|
#include <Project64-rsp\RSP Command.h>
|
||||||
|
#include <Project64-rsp\breakpoint.h>
|
||||||
|
#include <Project64-rsp\log.h>
|
||||||
|
|
||||||
|
void UpdateRSPRegistersScreen(void);
|
||||||
|
void RDP_LogLoc(DWORD /*PC*/);
|
||||||
|
|
||||||
|
void RSPDebuggerUI::ResetTimerList(void)
|
||||||
|
{
|
||||||
|
::ResetTimerList();
|
||||||
|
}
|
||||||
|
|
||||||
|
void RSPDebuggerUI::StartingCPU(void)
|
||||||
|
{
|
||||||
|
Enable_RSP_Commands_Window();
|
||||||
|
}
|
||||||
|
|
||||||
|
void RSPDebuggerUI::RspCyclesStart(void)
|
||||||
|
{
|
||||||
|
uint32_t TaskType = *(uint32_t *)(RSPInfo.DMEM + 0xFC0);
|
||||||
|
Compiler.bAudioUcode = (TaskType == 2) ? true : false;
|
||||||
|
if (Profiling && !IndvidualBlock)
|
||||||
|
{
|
||||||
|
StartTimer((uint32_t)Timer_RSP_Running);
|
||||||
|
}
|
||||||
|
if (BreakOnStart)
|
||||||
|
{
|
||||||
|
Enter_RSP_Commands_Window();
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
void RSPDebuggerUI::RspCyclesStop(void)
|
||||||
|
{
|
||||||
|
if (Profiling && !IndvidualBlock)
|
||||||
|
{
|
||||||
|
StartTimer((DWORD)Timer_R4300_Running);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
void RSPDebuggerUI::BeforeExecuteOp(void)
|
||||||
|
{
|
||||||
|
if (NoOfBpoints != 0)
|
||||||
|
{
|
||||||
|
if (CheckForRSPBPoint(*RSPInfo.SP_PC_REG))
|
||||||
|
{
|
||||||
|
if (InRSPCommandsWindow)
|
||||||
|
{
|
||||||
|
Enter_RSP_Commands_Window();
|
||||||
|
if (Stepping_Commands)
|
||||||
|
{
|
||||||
|
DisplayError("Encountered an R4300i breakpoint");
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
DisplayError("Encountered an R4300i breakpoint\n\nNow stepping");
|
||||||
|
SetRSPCommandViewto(*RSPInfo.SP_PC_REG);
|
||||||
|
SetRSPCommandToStepping();
|
||||||
|
}
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
DisplayError("Encountered an RSP breakpoint\n\nEntering command window");
|
||||||
|
Enter_RSP_Commands_Window();
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
if (Stepping_Commands)
|
||||||
|
{
|
||||||
|
WaitingForStep = true;
|
||||||
|
SetRSPCommandViewto(*RSPInfo.SP_PC_REG);
|
||||||
|
UpdateRSPRegistersScreen();
|
||||||
|
while (WaitingForStep != 0)
|
||||||
|
{
|
||||||
|
Sleep(20);
|
||||||
|
if (!Stepping_Commands)
|
||||||
|
{
|
||||||
|
WaitingForStep = false;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
RDP_LogLoc(*PrgCount);
|
||||||
|
}
|
||||||
|
|
||||||
|
void RSPDebuggerUI::UnknownOpcode(void)
|
||||||
|
{
|
||||||
|
char Message[200];
|
||||||
|
int response;
|
||||||
|
|
||||||
|
if (InRSPCommandsWindow)
|
||||||
|
{
|
||||||
|
SetRSPCommandViewto(*RSPInfo.SP_PC_REG);
|
||||||
|
DisplayError("Unhandled Opcode\n%s\n\nStopping emulation", RSPInstruction(*RSPInfo.SP_PC_REG, RSPOpC.Value).NameAndParam().c_str());
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
sprintf(Message, "Unhandled Opcode\n%s\n\nStopping emulation.\n\nWould you like to open the debugger?",
|
||||||
|
RSPInstruction(*RSPInfo.SP_PC_REG, RSPOpC.Value).NameAndParam().c_str());
|
||||||
|
response = MessageBoxA(NULL, Message, "Error", MB_YESNO | MB_ICONERROR);
|
||||||
|
if (response == IDYES)
|
||||||
|
{
|
||||||
|
Enter_RSP_Commands_Window();
|
||||||
|
}
|
||||||
|
}
|
||||||
|
ExitThread(0);
|
||||||
|
}
|
||||||
|
|
||||||
|
void RSPDebuggerUI::RDP_LogMF0(uint32_t PC, uint32_t Reg)
|
||||||
|
{
|
||||||
|
if (LogRDP && g_CPUCore == InterpreterCPU)
|
||||||
|
{
|
||||||
|
::RDP_LogMF0(PC, Reg);
|
||||||
|
}
|
||||||
|
}
|
|
@ -0,0 +1,15 @@
|
||||||
|
#pragma once
|
||||||
|
#include <Project64-rsp-core\RSPDebugger.h>
|
||||||
|
|
||||||
|
class RSPDebuggerUI :
|
||||||
|
public RSPDebugger
|
||||||
|
{
|
||||||
|
public:
|
||||||
|
void ResetTimerList(void);
|
||||||
|
void StartingCPU(void);
|
||||||
|
void RspCyclesStart(void);
|
||||||
|
void RspCyclesStop(void);
|
||||||
|
void BeforeExecuteOp(void);
|
||||||
|
void UnknownOpcode(void);
|
||||||
|
void RDP_LogMF0(uint32_t PC, uint32_t Reg);
|
||||||
|
};
|
|
@ -1,5 +1,6 @@
|
||||||
#include <windows.h>
|
#include <windows.h>
|
||||||
|
|
||||||
|
#include <Project64-rsp-core\RSPInfo.h>
|
||||||
#include <Project64-rsp-core\cpu\RSPRegisters.h>
|
#include <Project64-rsp-core\cpu\RSPRegisters.h>
|
||||||
#include <Project64-rsp\Rsp.h>
|
#include <Project64-rsp\Rsp.h>
|
||||||
#include <commctrl.h>
|
#include <commctrl.h>
|
||||||
|
|
|
@ -0,0 +1 @@
|
||||||
|
#pragma once
|
|
@ -427,8 +427,6 @@ DWORD RunInterpreterCPU(DWORD Cycles)
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
RDP_LogLoc(*PrgCount);
|
|
||||||
|
|
||||||
RSPOpC.Value = *(uint32_t *)(RSPInfo.IMEM + (*PrgCount & 0xFFC));
|
RSPOpC.Value = *(uint32_t *)(RSPInfo.IMEM + (*PrgCount & 0xFFC));
|
||||||
RSP_Opcode[RSPOpC.op]();
|
RSP_Opcode[RSPOpC.op]();
|
||||||
RSP_GPR[0].W = 0x00000000; // MIPS $zero hard-wired to 0
|
RSP_GPR[0].W = 0x00000000; // MIPS $zero hard-wired to 0
|
||||||
|
|
|
@ -1,25 +0,0 @@
|
||||||
#include <Windows.h>
|
|
||||||
#include <stdint.h>
|
|
||||||
|
|
||||||
#define NORMAL 0
|
|
||||||
#define DO_DELAY_SLOT 1
|
|
||||||
#define DELAY_SLOT 2
|
|
||||||
#define DELAY_SLOT_DONE 3
|
|
||||||
#define DELAY_SLOT_EXIT 4
|
|
||||||
#define DELAY_SLOT_EXIT_DONE 5
|
|
||||||
#define JUMP 6
|
|
||||||
#define SINGLE_STEP 7
|
|
||||||
#define SINGLE_STEP_DONE 8
|
|
||||||
#define FINISH_BLOCK 9
|
|
||||||
#define FINISH_SUB_BLOCK 10
|
|
||||||
|
|
||||||
extern DWORD RSP_NextInstruction, RSP_JumpTo;
|
|
||||||
extern uint32_t RSP_MfStatusCount;
|
|
||||||
|
|
||||||
// Standard MIPS PC-relative branch
|
|
||||||
// Returns the new PC, based on whether the condition passes
|
|
||||||
|
|
||||||
unsigned int RSP_branch_if(int condition);
|
|
||||||
|
|
||||||
void BuildInterpreterCPU(void);
|
|
||||||
DWORD RunInterpreterCPU(DWORD Cycles);
|
|
|
@ -1,6 +1,7 @@
|
||||||
#ifdef _WIN32
|
#ifdef _WIN32
|
||||||
#include <Windows.h>
|
#include <Windows.h>
|
||||||
#include <commctrl.h>
|
#include <commctrl.h>
|
||||||
|
#include <memory>
|
||||||
#include <windowsx.h>
|
#include <windowsx.h>
|
||||||
#endif
|
#endif
|
||||||
#if defined(_MSC_VER) && _MSC_VER >= 1910
|
#if defined(_MSC_VER) && _MSC_VER >= 1910
|
||||||
|
@ -14,7 +15,7 @@
|
||||||
#include <Common/StdString.h>
|
#include <Common/StdString.h>
|
||||||
#include <stdint.h>
|
#include <stdint.h>
|
||||||
|
|
||||||
#include "Cpu.h"
|
#include "Debugger/RSPDebuggerUI.h"
|
||||||
#include "Profiling.h"
|
#include "Profiling.h"
|
||||||
#include "RSP Command.h"
|
#include "RSP Command.h"
|
||||||
#include "Recompiler CPU.h"
|
#include "Recompiler CPU.h"
|
||||||
|
@ -23,7 +24,9 @@
|
||||||
#include "log.h"
|
#include "log.h"
|
||||||
#include "memory.h"
|
#include "memory.h"
|
||||||
#include "resource.h"
|
#include "resource.h"
|
||||||
|
#include <Project64-rsp-core/RSPInfo.h>
|
||||||
#include <Project64-rsp-core/Version.h>
|
#include <Project64-rsp-core/Version.h>
|
||||||
|
#include <Project64-rsp-core/cpu/RSPCpu.h>
|
||||||
#include <Project64-rsp-core/cpu/RSPRegisters.h>
|
#include <Project64-rsp-core/cpu/RSPRegisters.h>
|
||||||
#include <Project64-rsp-core/cpu/RspTypes.h>
|
#include <Project64-rsp-core/cpu/RspTypes.h>
|
||||||
|
|
||||||
|
@ -42,13 +45,10 @@ bool DebuggingEnabled = false,
|
||||||
BreakOnStart = false,
|
BreakOnStart = false,
|
||||||
LogRDP = false,
|
LogRDP = false,
|
||||||
LogX86Code = false;
|
LogX86Code = false;
|
||||||
uint32_t CPUCore = RecompilerCPU;
|
|
||||||
|
|
||||||
void * hMutex = NULL;
|
|
||||||
|
|
||||||
DEBUG_INFO DebugInfo;
|
DEBUG_INFO DebugInfo;
|
||||||
RSP_INFO RSPInfo;
|
|
||||||
void * hinstDLL;
|
void * hinstDLL;
|
||||||
|
std::unique_ptr<RSPDebuggerUI> g_RSPDebuggerUI;
|
||||||
|
|
||||||
extern uint8_t * pLastSecondary;
|
extern uint8_t * pLastSecondary;
|
||||||
|
|
||||||
|
@ -203,8 +203,8 @@ void FixMenuState(void)
|
||||||
EnableMenuItem(hRSPMenu, ID_DUMP_RSPCODE, MF_BYCOMMAND | (DebuggingEnabled ? MF_ENABLED : (MF_GRAYED | MF_DISABLED)));
|
EnableMenuItem(hRSPMenu, ID_DUMP_RSPCODE, MF_BYCOMMAND | (DebuggingEnabled ? MF_ENABLED : (MF_GRAYED | MF_DISABLED)));
|
||||||
EnableMenuItem(hRSPMenu, ID_DUMP_DMEM, MF_BYCOMMAND | (DebuggingEnabled ? MF_ENABLED : (MF_GRAYED | MF_DISABLED)));
|
EnableMenuItem(hRSPMenu, ID_DUMP_DMEM, MF_BYCOMMAND | (DebuggingEnabled ? MF_ENABLED : (MF_GRAYED | MF_DISABLED)));
|
||||||
|
|
||||||
CheckMenuItem(hRSPMenu, ID_CPUMETHOD_RECOMPILER, MF_BYCOMMAND | (CPUCore == RecompilerCPU ? MFS_CHECKED : MF_UNCHECKED));
|
CheckMenuItem(hRSPMenu, ID_CPUMETHOD_RECOMPILER, MF_BYCOMMAND | (g_CPUCore == RecompilerCPU ? MFS_CHECKED : MF_UNCHECKED));
|
||||||
CheckMenuItem(hRSPMenu, ID_CPUMETHOD_INTERPT, MF_BYCOMMAND | (CPUCore == InterpreterCPU ? MFS_CHECKED : MF_UNCHECKED));
|
CheckMenuItem(hRSPMenu, ID_CPUMETHOD_INTERPT, MF_BYCOMMAND | (g_CPUCore == InterpreterCPU ? MFS_CHECKED : MF_UNCHECKED));
|
||||||
CheckMenuItem(hRSPMenu, ID_BREAKONSTARTOFTASK, MF_BYCOMMAND | (BreakOnStart ? MFS_CHECKED : MF_UNCHECKED));
|
CheckMenuItem(hRSPMenu, ID_BREAKONSTARTOFTASK, MF_BYCOMMAND | (BreakOnStart ? MFS_CHECKED : MF_UNCHECKED));
|
||||||
CheckMenuItem(hRSPMenu, ID_LOGRDPCOMMANDS, MF_BYCOMMAND | (LogRDP ? MFS_CHECKED : MF_UNCHECKED));
|
CheckMenuItem(hRSPMenu, ID_LOGRDPCOMMANDS, MF_BYCOMMAND | (LogRDP ? MFS_CHECKED : MF_UNCHECKED));
|
||||||
CheckMenuItem(hRSPMenu, ID_SETTINGS_LOGX86CODE, MF_BYCOMMAND | (LogX86Code ? MFS_CHECKED : MF_UNCHECKED));
|
CheckMenuItem(hRSPMenu, ID_SETTINGS_LOGX86CODE, MF_BYCOMMAND | (LogX86Code ? MFS_CHECKED : MF_UNCHECKED));
|
||||||
|
@ -353,6 +353,8 @@ needs five arguments, not two. Also, GCC lacks SEH.
|
||||||
|
|
||||||
EXPORT void InitiateRSP(RSP_INFO Rsp_Info, uint32_t * CycleCount)
|
EXPORT void InitiateRSP(RSP_INFO Rsp_Info, uint32_t * CycleCount)
|
||||||
{
|
{
|
||||||
|
g_RSPDebuggerUI.reset(new RSPDebuggerUI);
|
||||||
|
g_RSPDebugger = g_RSPDebuggerUI.get();
|
||||||
RSPInfo = Rsp_Info;
|
RSPInfo = Rsp_Info;
|
||||||
AudioHle = GetSystemSetting(Set_AudioHle) != 0;
|
AudioHle = GetSystemSetting(Set_AudioHle) != 0;
|
||||||
GraphicsHle = GetSystemSetting(Set_GraphicsHle) != 0;
|
GraphicsHle = GetSystemSetting(Set_GraphicsHle) != 0;
|
||||||
|
@ -552,21 +554,21 @@ void ProcessMenuItem(int ID)
|
||||||
case ID_CPUMETHOD_RECOMPILER:
|
case ID_CPUMETHOD_RECOMPILER:
|
||||||
{
|
{
|
||||||
SetSetting(Set_CPUCore, RecompilerCPU);
|
SetSetting(Set_CPUCore, RecompilerCPU);
|
||||||
CPUCore = RecompilerCPU;
|
g_CPUCore = RecompilerCPU;
|
||||||
FixMenuState();
|
FixMenuState();
|
||||||
SetCPU(RecompilerCPU);
|
SetCPU(RecompilerCPU);
|
||||||
}
|
|
||||||
break;
|
break;
|
||||||
|
}
|
||||||
case ID_CPUMETHOD_INTERPT:
|
case ID_CPUMETHOD_INTERPT:
|
||||||
{
|
{
|
||||||
SetSetting(Set_CPUCore, InterpreterCPU);
|
SetSetting(Set_CPUCore, InterpreterCPU);
|
||||||
CPUCore = InterpreterCPU;
|
g_CPUCore = InterpreterCPU;
|
||||||
FixMenuState();
|
FixMenuState();
|
||||||
SetCPU(InterpreterCPU);
|
SetCPU(InterpreterCPU);
|
||||||
}
|
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/*
|
/*
|
||||||
|
@ -715,7 +717,7 @@ BOOL CALLBACK ConfigDlgProc(HWND hDlg, UINT uMsg, WPARAM wParam, LPARAM /*lParam
|
||||||
hWndItem = GetDlgItem(hDlg, IDC_COMPILER_SELECT);
|
hWndItem = GetDlgItem(hDlg, IDC_COMPILER_SELECT);
|
||||||
ComboBox_AddString(hWndItem, "Interpreter");
|
ComboBox_AddString(hWndItem, "Interpreter");
|
||||||
ComboBox_AddString(hWndItem, "Recompiler");
|
ComboBox_AddString(hWndItem, "Recompiler");
|
||||||
ComboBox_SetCurSel(hWndItem, CPUCore);
|
ComboBox_SetCurSel(hWndItem, g_CPUCore);
|
||||||
break;
|
break;
|
||||||
case WM_COMMAND:
|
case WM_COMMAND:
|
||||||
switch (GET_WM_COMMAND_ID(wParam, lParam))
|
switch (GET_WM_COMMAND_ID(wParam, lParam))
|
||||||
|
@ -723,7 +725,7 @@ BOOL CALLBACK ConfigDlgProc(HWND hDlg, UINT uMsg, WPARAM wParam, LPARAM /*lParam
|
||||||
case IDOK:
|
case IDOK:
|
||||||
hWndItem = GetDlgItem(hDlg, IDC_COMPILER_SELECT);
|
hWndItem = GetDlgItem(hDlg, IDC_COMPILER_SELECT);
|
||||||
value = ComboBox_GetCurSel(hWndItem);
|
value = ComboBox_GetCurSel(hWndItem);
|
||||||
SetCPU(value);
|
SetCPU((RSPCpuType)value);
|
||||||
|
|
||||||
AudioHle = GetBooleanCheck(hDlg, IDC_AUDIOHLE);
|
AudioHle = GetBooleanCheck(hDlg, IDC_AUDIOHLE);
|
||||||
GraphicsHle = GetBooleanCheck(hDlg, IDC_GRAPHICSHLE);
|
GraphicsHle = GetBooleanCheck(hDlg, IDC_GRAPHICSHLE);
|
||||||
|
@ -754,7 +756,7 @@ EXPORT void EnableDebugging(int Enabled)
|
||||||
if (DebuggingEnabled)
|
if (DebuggingEnabled)
|
||||||
{
|
{
|
||||||
BreakOnStart = GetSetting(Set_BreakOnStart) != 0;
|
BreakOnStart = GetSetting(Set_BreakOnStart) != 0;
|
||||||
CPUCore = GetSetting(Set_CPUCore) != 0;
|
g_CPUCore = (RSPCpuType)GetSetting(Set_CPUCore);
|
||||||
LogRDP = GetSetting(Set_LogRDP) != 0;
|
LogRDP = GetSetting(Set_LogRDP) != 0;
|
||||||
LogX86Code = GetSetting(Set_LogX86Code) != 0;
|
LogX86Code = GetSetting(Set_LogX86Code) != 0;
|
||||||
Profiling = GetSetting(Set_Profiling) != 0;
|
Profiling = GetSetting(Set_Profiling) != 0;
|
||||||
|
@ -771,7 +773,7 @@ EXPORT void EnableDebugging(int Enabled)
|
||||||
Compiler.bGPRConstants = GetSetting(Set_GPRConstants) != 0;
|
Compiler.bGPRConstants = GetSetting(Set_GPRConstants) != 0;
|
||||||
Compiler.bFlags = GetSetting(Set_Flags) != 0;
|
Compiler.bFlags = GetSetting(Set_Flags) != 0;
|
||||||
Compiler.bAlignVector = GetSetting(Set_AlignVector) != 0;
|
Compiler.bAlignVector = GetSetting(Set_AlignVector) != 0;
|
||||||
SetCPU(CPUCore);
|
SetCPU(g_CPUCore);
|
||||||
}
|
}
|
||||||
#ifdef _WIN32
|
#ifdef _WIN32
|
||||||
FixMenuState();
|
FixMenuState();
|
||||||
|
@ -792,9 +794,9 @@ EXPORT void PluginLoaded(void)
|
||||||
{
|
{
|
||||||
BreakOnStart = false;
|
BreakOnStart = false;
|
||||||
#ifndef _M_X64
|
#ifndef _M_X64
|
||||||
CPUCore = RecompilerCPU;
|
g_CPUCore = RecompilerCPU;
|
||||||
#else
|
#else
|
||||||
CPUCore = InterpreterCPU;
|
g_CPUCore = InterpreterCPU;
|
||||||
#endif
|
#endif
|
||||||
LogRDP = false;
|
LogRDP = false;
|
||||||
LogX86Code = false;
|
LogX86Code = false;
|
||||||
|
@ -818,7 +820,7 @@ EXPORT void PluginLoaded(void)
|
||||||
Set_AudioHle = FindSystemSettingId("HLE Audio");
|
Set_AudioHle = FindSystemSettingId("HLE Audio");
|
||||||
|
|
||||||
RegisterSetting(Set_BreakOnStart, Data_DWORD_General, "Break on Start", NULL, BreakOnStart, NULL);
|
RegisterSetting(Set_BreakOnStart, Data_DWORD_General, "Break on Start", NULL, BreakOnStart, NULL);
|
||||||
RegisterSetting(Set_CPUCore, Data_DWORD_General, "CPU Method", NULL, CPUCore, NULL);
|
RegisterSetting(Set_CPUCore, Data_DWORD_General, "CPU Method", NULL, g_CPUCore, NULL);
|
||||||
RegisterSetting(Set_LogRDP, Data_DWORD_General, "Log RDP", NULL, LogRDP, NULL);
|
RegisterSetting(Set_LogRDP, Data_DWORD_General, "Log RDP", NULL, LogRDP, NULL);
|
||||||
RegisterSetting(Set_LogX86Code, Data_DWORD_General, "Log X86 Code", NULL, LogX86Code, NULL);
|
RegisterSetting(Set_LogX86Code, Data_DWORD_General, "Log X86 Code", NULL, LogX86Code, NULL);
|
||||||
RegisterSetting(Set_Profiling, Data_DWORD_General, "Profiling", NULL, Profiling, NULL);
|
RegisterSetting(Set_Profiling, Data_DWORD_General, "Profiling", NULL, Profiling, NULL);
|
||||||
|
@ -843,10 +845,7 @@ EXPORT void PluginLoaded(void)
|
||||||
|
|
||||||
AudioHle = Set_AudioHle != 0 ? GetSystemSetting(Set_AudioHle) != 0 : false;
|
AudioHle = Set_AudioHle != 0 ? GetSystemSetting(Set_AudioHle) != 0 : false;
|
||||||
GraphicsHle = Set_GraphicsHle != 0 ? GetSystemSetting(Set_GraphicsHle) != 0 : true;
|
GraphicsHle = Set_GraphicsHle != 0 ? GetSystemSetting(Set_GraphicsHle) != 0 : true;
|
||||||
#ifdef _WIN32
|
SetCPU(g_CPUCore);
|
||||||
hMutex = (HANDLE)CreateMutex(NULL, false, NULL);
|
|
||||||
#endif
|
|
||||||
SetCPU(CPUCore);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
#ifdef _WIN32
|
#ifdef _WIN32
|
||||||
|
|
|
@ -13,7 +13,7 @@
|
||||||
|
|
||||||
class CProfiling
|
class CProfiling
|
||||||
{
|
{
|
||||||
typedef std::map<DWORD, __int64> PROFILE_ENRTIES;
|
typedef std::map<uint32_t, __int64> PROFILE_ENRTIES;
|
||||||
typedef PROFILE_ENRTIES::iterator PROFILE_ENRTY;
|
typedef PROFILE_ENRTIES::iterator PROFILE_ENRTY;
|
||||||
typedef PROFILE_ENRTIES::value_type PROFILE_VALUE;
|
typedef PROFILE_ENRTIES::value_type PROFILE_VALUE;
|
||||||
typedef struct
|
typedef struct
|
||||||
|
@ -22,8 +22,8 @@ class CProfiling
|
||||||
char * Name;
|
char * Name;
|
||||||
} TIMER_NAME;
|
} TIMER_NAME;
|
||||||
|
|
||||||
DWORD m_CurrentTimerAddr, CurrentDisplayCount;
|
uint32_t m_CurrentTimerAddr, CurrentDisplayCount;
|
||||||
DWORD m_StartTimeHi, m_StartTimeLo; // The current timer start time
|
uint32_t m_StartTimeHi, m_StartTimeLo; // The current timer start time
|
||||||
PROFILE_ENRTIES m_Entries;
|
PROFILE_ENRTIES m_Entries;
|
||||||
|
|
||||||
public:
|
public:
|
||||||
|
@ -33,13 +33,13 @@ public:
|
||||||
}
|
}
|
||||||
|
|
||||||
// Recording timing against current timer, returns the address of the timer stopped
|
// Recording timing against current timer, returns the address of the timer stopped
|
||||||
DWORD StartTimer(DWORD Address)
|
uint32_t StartTimer(uint32_t Address)
|
||||||
{
|
{
|
||||||
DWORD OldTimerAddr = StopTimer();
|
uint32_t OldTimerAddr = StopTimer();
|
||||||
m_CurrentTimerAddr = Address;
|
m_CurrentTimerAddr = Address;
|
||||||
|
|
||||||
#if defined(_M_IX86) && defined(_MSC_VER)
|
#if defined(_M_IX86) && defined(_MSC_VER)
|
||||||
DWORD HiValue, LoValue;
|
uint32_t HiValue, LoValue;
|
||||||
_asm {
|
_asm {
|
||||||
pushad
|
pushad
|
||||||
rdtsc
|
rdtsc
|
||||||
|
@ -54,7 +54,7 @@ public:
|
||||||
#endif
|
#endif
|
||||||
return OldTimerAddr;
|
return OldTimerAddr;
|
||||||
}
|
}
|
||||||
DWORD StopTimer(void)
|
uint32_t StopTimer(void)
|
||||||
{
|
{
|
||||||
if (m_CurrentTimerAddr == Timer_None)
|
if (m_CurrentTimerAddr == Timer_None)
|
||||||
{
|
{
|
||||||
|
@ -62,7 +62,7 @@ public:
|
||||||
}
|
}
|
||||||
|
|
||||||
#if defined(_M_IX86) && defined(_MSC_VER)
|
#if defined(_M_IX86) && defined(_MSC_VER)
|
||||||
DWORD HiValue, LoValue;
|
uint32_t HiValue, LoValue;
|
||||||
_asm {
|
_asm {
|
||||||
pushad
|
pushad
|
||||||
rdtsc
|
rdtsc
|
||||||
|
@ -88,7 +88,7 @@ public:
|
||||||
DebugBreak();
|
DebugBreak();
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
DWORD OldTimerAddr = m_CurrentTimerAddr;
|
uint32_t OldTimerAddr = m_CurrentTimerAddr;
|
||||||
m_CurrentTimerAddr = Timer_None;
|
m_CurrentTimerAddr = Timer_None;
|
||||||
return OldTimerAddr;
|
return OldTimerAddr;
|
||||||
}
|
}
|
||||||
|
@ -158,7 +158,7 @@ public:
|
||||||
sprintf(Buffer, "Function 0x%08X", ItemList[count]->first);
|
sprintf(Buffer, "Function 0x%08X", ItemList[count]->first);
|
||||||
for (int NameID = 0; NameID < (sizeof(TimerNames) / sizeof(TIMER_NAME)); NameID++)
|
for (int NameID = 0; NameID < (sizeof(TimerNames) / sizeof(TIMER_NAME)); NameID++)
|
||||||
{
|
{
|
||||||
if (ItemList[count]->first == (DWORD)TimerNames[NameID].Timer)
|
if (ItemList[count]->first == (uint32_t)TimerNames[NameID].Timer)
|
||||||
{
|
{
|
||||||
strcpy(Buffer, TimerNames[NameID].Name);
|
strcpy(Buffer, TimerNames[NameID].Name);
|
||||||
break;
|
break;
|
||||||
|
@ -184,7 +184,7 @@ void ResetTimerList(void)
|
||||||
GetProfiler().ResetCounters();
|
GetProfiler().ResetCounters();
|
||||||
}
|
}
|
||||||
|
|
||||||
DWORD StartTimer(DWORD Address)
|
uint32_t StartTimer(uint32_t Address)
|
||||||
{
|
{
|
||||||
return GetProfiler().StartTimer(Address);
|
return GetProfiler().StartTimer(Address);
|
||||||
}
|
}
|
||||||
|
@ -209,7 +209,7 @@ typedef struct
|
||||||
__int64 TimeTotal;
|
__int64 TimeTotal;
|
||||||
} TIME_STAMP_ENTRY;
|
} TIME_STAMP_ENTRY;
|
||||||
|
|
||||||
DWORD StartTimeHi, StartTimeLo, StopTimeHi, StopTimeLo, TSE_Count, TSE_Max;
|
uint32_t StartTimeHi, StartTimeLo, StopTimeHi, StopTimeLo, TSE_Count, TSE_Max;
|
||||||
TIME_STAMP_ENTRY * TS_Entries = NULL;
|
TIME_STAMP_ENTRY * TS_Entries = NULL;
|
||||||
char LastLabel[100];
|
char LastLabel[100];
|
||||||
|
|
||||||
|
@ -250,7 +250,7 @@ void StopTimer(void)
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
{
|
{
|
||||||
DWORD count;
|
uint32_t count;
|
||||||
|
|
||||||
for (count = 0; count < TSE_Count; count++)
|
for (count = 0; count < TSE_Count; count++)
|
||||||
{
|
{
|
||||||
|
@ -291,7 +291,7 @@ void GenerateTimerResults(void)
|
||||||
{
|
{
|
||||||
char buffer[_MAX_PATH], drive[_MAX_DRIVE], dir[_MAX_DIR];
|
char buffer[_MAX_PATH], drive[_MAX_DRIVE], dir[_MAX_DIR];
|
||||||
char fname[_MAX_FNAME], ext[_MAX_EXT], LogFileName[_MAX_PATH];
|
char fname[_MAX_FNAME], ext[_MAX_EXT], LogFileName[_MAX_PATH];
|
||||||
DWORD dwWritten, count, count2;
|
uint32_t dwWritten, count, count2;
|
||||||
HANDLE hLogFile = NULL;
|
HANDLE hLogFile = NULL;
|
||||||
__int64 TotalTime;
|
__int64 TotalTime;
|
||||||
|
|
||||||
|
|
|
@ -1,3 +1,6 @@
|
||||||
|
#pragma once
|
||||||
|
#include <stdint.h>
|
||||||
|
|
||||||
enum SPECIAL_TIMERS
|
enum SPECIAL_TIMERS
|
||||||
{
|
{
|
||||||
Timer_None = 0,
|
Timer_None = 0,
|
||||||
|
@ -14,6 +17,6 @@ enum SPECIAL_TIMERS
|
||||||
};
|
};
|
||||||
|
|
||||||
void ResetTimerList(void);
|
void ResetTimerList(void);
|
||||||
DWORD StartTimer(DWORD Address);
|
uint32_t StartTimer(uint32_t Address);
|
||||||
void StopTimer(void);
|
void StopTimer(void);
|
||||||
void GenerateTimerResults(void);
|
void GenerateTimerResults(void);
|
||||||
|
|
|
@ -44,11 +44,9 @@
|
||||||
</ItemDefinitionGroup>
|
</ItemDefinitionGroup>
|
||||||
<ItemGroup>
|
<ItemGroup>
|
||||||
<ClCompile Include="breakpoint.cpp" />
|
<ClCompile Include="breakpoint.cpp" />
|
||||||
<ClCompile Include="Cpu.cpp" />
|
<ClCompile Include="Debugger\RSPDebuggerUI.cpp" />
|
||||||
<ClCompile Include="Debugger\RSPRegistersUI.cpp" />
|
<ClCompile Include="Debugger\RSPRegistersUI.cpp" />
|
||||||
<ClCompile Include="dma.cpp" />
|
<ClCompile Include="dma.cpp" />
|
||||||
<ClCompile Include="Interpreter CPU.cpp" />
|
|
||||||
<ClCompile Include="Interpreter Ops.cpp" />
|
|
||||||
<ClCompile Include="log.cpp" />
|
<ClCompile Include="log.cpp" />
|
||||||
<ClCompile Include="Main.cpp" />
|
<ClCompile Include="Main.cpp" />
|
||||||
<ClCompile Include="memory.cpp" />
|
<ClCompile Include="memory.cpp" />
|
||||||
|
@ -64,7 +62,7 @@
|
||||||
</ItemGroup>
|
</ItemGroup>
|
||||||
<ItemGroup>
|
<ItemGroup>
|
||||||
<ClInclude Include="breakpoint.h" />
|
<ClInclude Include="breakpoint.h" />
|
||||||
<ClInclude Include="Cpu.h" />
|
<ClInclude Include="Debugger\RSPDebuggerUI.h" />
|
||||||
<ClInclude Include="Debugger\RSPRegistersUI.h" />
|
<ClInclude Include="Debugger\RSPRegistersUI.h" />
|
||||||
<ClInclude Include="dma.h" />
|
<ClInclude Include="dma.h" />
|
||||||
<ClInclude Include="Interpreter CPU.h" />
|
<ClInclude Include="Interpreter CPU.h" />
|
||||||
|
|
|
@ -27,9 +27,6 @@
|
||||||
<ClInclude Include="breakpoint.h">
|
<ClInclude Include="breakpoint.h">
|
||||||
<Filter>Header Files</Filter>
|
<Filter>Header Files</Filter>
|
||||||
</ClInclude>
|
</ClInclude>
|
||||||
<ClInclude Include="Cpu.h">
|
|
||||||
<Filter>Header Files</Filter>
|
|
||||||
</ClInclude>
|
|
||||||
<ClInclude Include="dma.h">
|
<ClInclude Include="dma.h">
|
||||||
<Filter>Header Files</Filter>
|
<Filter>Header Files</Filter>
|
||||||
</ClInclude>
|
</ClInclude>
|
||||||
|
@ -72,6 +69,9 @@
|
||||||
<ClInclude Include="Debugger\RSPRegistersUI.h">
|
<ClInclude Include="Debugger\RSPRegistersUI.h">
|
||||||
<Filter>Header Files\Debugger</Filter>
|
<Filter>Header Files\Debugger</Filter>
|
||||||
</ClInclude>
|
</ClInclude>
|
||||||
|
<ClInclude Include="Debugger\RSPDebuggerUI.h">
|
||||||
|
<Filter>Header Files\Debugger</Filter>
|
||||||
|
</ClInclude>
|
||||||
</ItemGroup>
|
</ItemGroup>
|
||||||
<ItemGroup>
|
<ItemGroup>
|
||||||
<ResourceCompile Include="Project64-rsp.rc">
|
<ResourceCompile Include="Project64-rsp.rc">
|
||||||
|
@ -82,18 +82,9 @@
|
||||||
<ClCompile Include="breakpoint.cpp">
|
<ClCompile Include="breakpoint.cpp">
|
||||||
<Filter>Source Files</Filter>
|
<Filter>Source Files</Filter>
|
||||||
</ClCompile>
|
</ClCompile>
|
||||||
<ClCompile Include="Cpu.cpp">
|
|
||||||
<Filter>Source Files</Filter>
|
|
||||||
</ClCompile>
|
|
||||||
<ClCompile Include="dma.cpp">
|
<ClCompile Include="dma.cpp">
|
||||||
<Filter>Source Files</Filter>
|
<Filter>Source Files</Filter>
|
||||||
</ClCompile>
|
</ClCompile>
|
||||||
<ClCompile Include="Interpreter CPU.cpp">
|
|
||||||
<Filter>Source Files</Filter>
|
|
||||||
</ClCompile>
|
|
||||||
<ClCompile Include="Interpreter Ops.cpp">
|
|
||||||
<Filter>Source Files</Filter>
|
|
||||||
</ClCompile>
|
|
||||||
<ClCompile Include="log.cpp">
|
<ClCompile Include="log.cpp">
|
||||||
<Filter>Source Files</Filter>
|
<Filter>Source Files</Filter>
|
||||||
</ClCompile>
|
</ClCompile>
|
||||||
|
@ -133,5 +124,8 @@
|
||||||
<ClCompile Include="Debugger\RSPRegistersUI.cpp">
|
<ClCompile Include="Debugger\RSPRegistersUI.cpp">
|
||||||
<Filter>Source Files\Debugger</Filter>
|
<Filter>Source Files\Debugger</Filter>
|
||||||
</ClCompile>
|
</ClCompile>
|
||||||
|
<ClCompile Include="Debugger\RSPDebuggerUI.cpp">
|
||||||
|
<Filter>Source Files\Debugger</Filter>
|
||||||
|
</ClCompile>
|
||||||
</ItemGroup>
|
</ItemGroup>
|
||||||
</Project>
|
</Project>
|
|
@ -2,11 +2,12 @@
|
||||||
#include <stdlib.h>
|
#include <stdlib.h>
|
||||||
#include <windows.h>
|
#include <windows.h>
|
||||||
|
|
||||||
#include "CPU.h"
|
|
||||||
#include "RSP Command.h"
|
#include "RSP Command.h"
|
||||||
#include "Rsp.h"
|
#include "Rsp.h"
|
||||||
#include "breakpoint.h"
|
#include "breakpoint.h"
|
||||||
#include "memory.h"
|
#include "memory.h"
|
||||||
|
#include <Project64-rsp-core/RSPInfo.h>
|
||||||
|
#include <Project64-rsp-core/cpu/RSPCpu.h>
|
||||||
#include <Project64-rsp-core/cpu/RSPInstruction.h>
|
#include <Project64-rsp-core/cpu/RSPInstruction.h>
|
||||||
#include <Project64-rsp-core/cpu/RSPOpcode.h>
|
#include <Project64-rsp-core/cpu/RSPOpcode.h>
|
||||||
#include <Project64-rsp-core/cpu/RSPRegisters.h>
|
#include <Project64-rsp-core/cpu/RSPRegisters.h>
|
||||||
|
@ -49,7 +50,7 @@ HWND RSPCommandshWnd, hList, hAddress, hFunctionlist, hGoButton, hBreakButton,
|
||||||
hMemory, hScrlBar;
|
hMemory, hScrlBar;
|
||||||
bool InRSPCommandsWindow;
|
bool InRSPCommandsWindow;
|
||||||
char CommandName[100];
|
char CommandName[100];
|
||||||
DWORD Stepping_Commands, WaitingForStep;
|
bool Stepping_Commands, WaitingForStep;
|
||||||
|
|
||||||
void Create_RSP_Commands_Window(int Child)
|
void Create_RSP_Commands_Window(int Child)
|
||||||
{
|
{
|
||||||
|
|
|
@ -8,5 +8,5 @@ void SetRSPCommandToRunning(void);
|
||||||
void SetRSPCommandToStepping(void);
|
void SetRSPCommandToStepping(void);
|
||||||
void SetRSPCommandViewto(unsigned int NewLocation);
|
void SetRSPCommandViewto(unsigned int NewLocation);
|
||||||
|
|
||||||
extern DWORD Stepping_Commands, WaitingForStep;
|
extern bool Stepping_Commands, WaitingForStep;
|
||||||
extern bool InRSPCommandsWindow;
|
extern bool InRSPCommandsWindow;
|
||||||
|
|
|
@ -1,11 +1,12 @@
|
||||||
#include "CPU.h"
|
|
||||||
#include "Interpreter CPU.h"
|
|
||||||
#include "RSP Command.h"
|
#include "RSP Command.h"
|
||||||
#include "Recompiler CPU.h"
|
#include "Recompiler CPU.h"
|
||||||
#include "Rsp.h"
|
#include "Rsp.h"
|
||||||
#include "log.h"
|
#include "log.h"
|
||||||
#include "memory.h"
|
#include "memory.h"
|
||||||
|
#include <Project64-rsp-core/RSPInfo.h>
|
||||||
|
#include <Project64-rsp-core/cpu/RSPCpu.h>
|
||||||
#include <Project64-rsp-core/cpu/RSPInstruction.h>
|
#include <Project64-rsp-core/cpu/RSPInstruction.h>
|
||||||
|
#include <Project64-rsp-core/cpu/RSPInterpreterCPU.h>
|
||||||
#include <Project64-rsp-core/cpu/RSPOpcode.h>
|
#include <Project64-rsp-core/cpu/RSPOpcode.h>
|
||||||
#include <Project64-rsp-core/cpu/RspTypes.h>
|
#include <Project64-rsp-core/cpu/RspTypes.h>
|
||||||
#include <windows.h>
|
#include <windows.h>
|
||||||
|
@ -18,7 +19,7 @@ Output: bool whether opcode at PC is a NOP
|
||||||
Input: PC
|
Input: PC
|
||||||
*/
|
*/
|
||||||
|
|
||||||
bool IsOpcodeNop(DWORD PC)
|
bool IsOpcodeNop(uint32_t PC)
|
||||||
{
|
{
|
||||||
RSPOpcode RspOp;
|
RSPOpcode RspOp;
|
||||||
RspOp.Value = *(uint32_t *)(RSPInfo.IMEM + (PC & 0xFFC));
|
RspOp.Value = *(uint32_t *)(RSPInfo.IMEM + (PC & 0xFFC));
|
||||||
|
@ -36,7 +37,7 @@ Output: Determines EMMS status
|
||||||
Input: PC
|
Input: PC
|
||||||
*/
|
*/
|
||||||
|
|
||||||
bool IsNextInstructionMmx(DWORD PC)
|
bool IsNextInstructionMmx(uint32_t PC)
|
||||||
{
|
{
|
||||||
RSPOpcode RspOp;
|
RSPOpcode RspOp;
|
||||||
|
|
||||||
|
@ -124,16 +125,16 @@ Input: PC, location in accumulator
|
||||||
|
|
||||||
#define HIT_BRANCH 0x2
|
#define HIT_BRANCH 0x2
|
||||||
|
|
||||||
DWORD WriteToAccum2(int Location, int PC, bool RecursiveCall)
|
uint32_t WriteToAccum2(int Location, int PC, bool RecursiveCall)
|
||||||
{
|
{
|
||||||
RSPOpcode RspOp;
|
RSPOpcode RspOp;
|
||||||
DWORD BranchTarget = 0;
|
uint32_t BranchTarget = 0;
|
||||||
signed int BranchImmed = 0;
|
signed int BranchImmed = 0;
|
||||||
int Instruction_State = NextInstruction;
|
int Instruction_State = NextInstruction;
|
||||||
|
|
||||||
if (Compiler.bAccum == false) return true;
|
if (Compiler.bAccum == false) return true;
|
||||||
|
|
||||||
if (Instruction_State == DELAY_SLOT)
|
if (Instruction_State == RSPPIPELINE_DELAY_SLOT)
|
||||||
{
|
{
|
||||||
return true;
|
return true;
|
||||||
}
|
}
|
||||||
|
@ -156,7 +157,7 @@ DWORD WriteToAccum2(int Location, int PC, bool RecursiveCall)
|
||||||
case RSP_REGIMM_BGEZ:
|
case RSP_REGIMM_BGEZ:
|
||||||
case RSP_REGIMM_BLTZAL:
|
case RSP_REGIMM_BLTZAL:
|
||||||
case RSP_REGIMM_BGEZAL:
|
case RSP_REGIMM_BGEZAL:
|
||||||
Instruction_State = DO_DELAY_SLOT;
|
Instruction_State = RSPPIPELINE_DO_DELAY_SLOT;
|
||||||
break;
|
break;
|
||||||
default:
|
default:
|
||||||
CompilerWarning("Unknown opcode in WriteToAccum\n%s", RSPInstruction(PC, RspOp.Value).NameAndParam().c_str());
|
CompilerWarning("Unknown opcode in WriteToAccum\n%s", RSPInstruction(PC, RspOp.Value).NameAndParam().c_str());
|
||||||
|
@ -189,7 +190,7 @@ DWORD WriteToAccum2(int Location, int PC, bool RecursiveCall)
|
||||||
return true;
|
return true;
|
||||||
|
|
||||||
case RSP_SPECIAL_JR:
|
case RSP_SPECIAL_JR:
|
||||||
Instruction_State = DO_DELAY_SLOT;
|
Instruction_State = RSPPIPELINE_DO_DELAY_SLOT;
|
||||||
break;
|
break;
|
||||||
|
|
||||||
default:
|
default:
|
||||||
|
@ -206,7 +207,7 @@ DWORD WriteToAccum2(int Location, int PC, bool RecursiveCall)
|
||||||
// Rarely occurs, so we let them have their way
|
// Rarely occurs, so we let them have their way
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
Instruction_State = DO_DELAY_SLOT;
|
Instruction_State = RSPPIPELINE_DO_DELAY_SLOT;
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -219,7 +220,7 @@ DWORD WriteToAccum2(int Location, int PC, bool RecursiveCall)
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
Instruction_State = DO_DELAY_SLOT;
|
Instruction_State = RSPPIPELINE_DO_DELAY_SLOT;
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -247,7 +248,7 @@ DWORD WriteToAccum2(int Location, int PC, bool RecursiveCall)
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
BranchTarget = (PC + ((short)RspOp.offset << 2) + 4) & 0xFFC;
|
BranchTarget = (PC + ((short)RspOp.offset << 2) + 4) & 0xFFC;
|
||||||
Instruction_State = DO_DELAY_SLOT;
|
Instruction_State = RSPPIPELINE_DO_DELAY_SLOT;
|
||||||
break;
|
break;
|
||||||
case RSP_ADDI:
|
case RSP_ADDI:
|
||||||
case RSP_ADDIU:
|
case RSP_ADDIU:
|
||||||
|
@ -396,15 +397,15 @@ DWORD WriteToAccum2(int Location, int PC, bool RecursiveCall)
|
||||||
}
|
}
|
||||||
switch (Instruction_State)
|
switch (Instruction_State)
|
||||||
{
|
{
|
||||||
case NORMAL: break;
|
case RSPPIPELINE_NORMAL: break;
|
||||||
case DO_DELAY_SLOT:
|
case RSPPIPELINE_DO_DELAY_SLOT:
|
||||||
Instruction_State = DELAY_SLOT;
|
Instruction_State = RSPPIPELINE_DELAY_SLOT;
|
||||||
break;
|
break;
|
||||||
case DELAY_SLOT:
|
case RSPPIPELINE_DELAY_SLOT:
|
||||||
Instruction_State = FINISH_BLOCK;
|
Instruction_State = RSPPIPELINE_FINISH_BLOCK;
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
} while (Instruction_State != FINISH_BLOCK);
|
} while (Instruction_State != RSPPIPELINE_FINISH_BLOCK);
|
||||||
|
|
||||||
/*
|
/*
|
||||||
This is a tricky situation because most of the
|
This is a tricky situation because most of the
|
||||||
|
@ -414,7 +415,7 @@ DWORD WriteToAccum2(int Location, int PC, bool RecursiveCall)
|
||||||
|
|
||||||
if (BranchTarget != 0 && RecursiveCall == false)
|
if (BranchTarget != 0 && RecursiveCall == false)
|
||||||
{
|
{
|
||||||
DWORD BranchTaken, BranchFall;
|
uint32_t BranchTaken, BranchFall;
|
||||||
|
|
||||||
// Analysis of branch taken
|
// Analysis of branch taken
|
||||||
BranchTaken = WriteToAccum2(Location, BranchTarget - 4, true);
|
BranchTaken = WriteToAccum2(Location, BranchTarget - 4, true);
|
||||||
|
@ -461,7 +462,7 @@ DWORD WriteToAccum2(int Location, int PC, bool RecursiveCall)
|
||||||
|
|
||||||
bool WriteToAccum(int Location, int PC)
|
bool WriteToAccum(int Location, int PC)
|
||||||
{
|
{
|
||||||
DWORD value = WriteToAccum2(Location, PC, false);
|
uint32_t value = WriteToAccum2(Location, PC, false);
|
||||||
|
|
||||||
if (value == HIT_BRANCH)
|
if (value == HIT_BRANCH)
|
||||||
{
|
{
|
||||||
|
@ -479,17 +480,17 @@ False: Destination is overwritten later
|
||||||
Input: PC, Register
|
Input: PC, Register
|
||||||
*/
|
*/
|
||||||
|
|
||||||
bool WriteToVectorDest2(DWORD DestReg, int PC, bool RecursiveCall)
|
bool WriteToVectorDest2(uint32_t DestReg, int PC, bool RecursiveCall)
|
||||||
{
|
{
|
||||||
RSPOpcode RspOp;
|
RSPOpcode RspOp;
|
||||||
DWORD BranchTarget = 0;
|
uint32_t BranchTarget = 0;
|
||||||
signed int BranchImmed = 0;
|
signed int BranchImmed = 0;
|
||||||
|
|
||||||
int Instruction_State = NextInstruction;
|
int Instruction_State = NextInstruction;
|
||||||
|
|
||||||
if (Compiler.bDest == false) return true;
|
if (Compiler.bDest == false) return true;
|
||||||
|
|
||||||
if (Instruction_State == DELAY_SLOT)
|
if (Instruction_State == RSPPIPELINE_DELAY_SLOT)
|
||||||
{
|
{
|
||||||
return true;
|
return true;
|
||||||
}
|
}
|
||||||
|
@ -513,7 +514,7 @@ bool WriteToVectorDest2(DWORD DestReg, int PC, bool RecursiveCall)
|
||||||
case RSP_REGIMM_BGEZ:
|
case RSP_REGIMM_BGEZ:
|
||||||
case RSP_REGIMM_BLTZAL:
|
case RSP_REGIMM_BLTZAL:
|
||||||
case RSP_REGIMM_BGEZAL:
|
case RSP_REGIMM_BGEZAL:
|
||||||
Instruction_State = DO_DELAY_SLOT;
|
Instruction_State = RSPPIPELINE_DO_DELAY_SLOT;
|
||||||
break;
|
break;
|
||||||
default:
|
default:
|
||||||
CompilerWarning("Unknown opcode in WriteToVectorDest\n%s", RSPInstruction(PC, RspOp.Value).NameAndParam().c_str());
|
CompilerWarning("Unknown opcode in WriteToVectorDest\n%s", RSPInstruction(PC, RspOp.Value).NameAndParam().c_str());
|
||||||
|
@ -546,7 +547,7 @@ bool WriteToVectorDest2(DWORD DestReg, int PC, bool RecursiveCall)
|
||||||
return true;
|
return true;
|
||||||
|
|
||||||
case RSP_SPECIAL_JR:
|
case RSP_SPECIAL_JR:
|
||||||
Instruction_State = DO_DELAY_SLOT;
|
Instruction_State = RSPPIPELINE_DO_DELAY_SLOT;
|
||||||
break;
|
break;
|
||||||
|
|
||||||
default:
|
default:
|
||||||
|
@ -590,7 +591,7 @@ bool WriteToVectorDest2(DWORD DestReg, int PC, bool RecursiveCall)
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
BranchTarget = (PC + ((short)RspOp.offset << 2) + 4) & 0xFFC;
|
BranchTarget = (PC + ((short)RspOp.offset << 2) + 4) & 0xFFC;
|
||||||
Instruction_State = DO_DELAY_SLOT;
|
Instruction_State = RSPPIPELINE_DO_DELAY_SLOT;
|
||||||
break;
|
break;
|
||||||
case RSP_ADDI:
|
case RSP_ADDI:
|
||||||
case RSP_ADDIU:
|
case RSP_ADDIU:
|
||||||
|
@ -799,15 +800,15 @@ bool WriteToVectorDest2(DWORD DestReg, int PC, bool RecursiveCall)
|
||||||
}
|
}
|
||||||
switch (Instruction_State)
|
switch (Instruction_State)
|
||||||
{
|
{
|
||||||
case NORMAL: break;
|
case RSPPIPELINE_NORMAL: break;
|
||||||
case DO_DELAY_SLOT:
|
case RSPPIPELINE_DO_DELAY_SLOT:
|
||||||
Instruction_State = DELAY_SLOT;
|
Instruction_State = RSPPIPELINE_DELAY_SLOT;
|
||||||
break;
|
break;
|
||||||
case DELAY_SLOT:
|
case RSPPIPELINE_DELAY_SLOT:
|
||||||
Instruction_State = FINISH_BLOCK;
|
Instruction_State = RSPPIPELINE_FINISH_BLOCK;
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
} while (Instruction_State != FINISH_BLOCK);
|
} while (Instruction_State != RSPPIPELINE_FINISH_BLOCK);
|
||||||
|
|
||||||
/*
|
/*
|
||||||
This is a tricky situation because most of the
|
This is a tricky situation because most of the
|
||||||
|
@ -817,7 +818,7 @@ bool WriteToVectorDest2(DWORD DestReg, int PC, bool RecursiveCall)
|
||||||
|
|
||||||
if (BranchTarget != 0 && RecursiveCall == false)
|
if (BranchTarget != 0 && RecursiveCall == false)
|
||||||
{
|
{
|
||||||
DWORD BranchTaken, BranchFall;
|
uint32_t BranchTaken, BranchFall;
|
||||||
|
|
||||||
// Analysis of branch taken
|
// Analysis of branch taken
|
||||||
BranchTaken = WriteToVectorDest2(DestReg, BranchTarget - 4, true);
|
BranchTaken = WriteToVectorDest2(DestReg, BranchTarget - 4, true);
|
||||||
|
@ -863,9 +864,9 @@ bool WriteToVectorDest2(DWORD DestReg, int PC, bool RecursiveCall)
|
||||||
return true;
|
return true;
|
||||||
}
|
}
|
||||||
|
|
||||||
bool WriteToVectorDest(DWORD DestReg, int PC)
|
bool WriteToVectorDest(uint32_t DestReg, int PC)
|
||||||
{
|
{
|
||||||
DWORD value;
|
uint32_t value;
|
||||||
value = WriteToVectorDest2(DestReg, PC, false);
|
value = WriteToVectorDest2(DestReg, PC, false);
|
||||||
|
|
||||||
if (value == HIT_BRANCH)
|
if (value == HIT_BRANCH)
|
||||||
|
@ -892,7 +893,7 @@ bool UseRspFlags(int PC)
|
||||||
|
|
||||||
if (Compiler.bFlags == false) return true;
|
if (Compiler.bFlags == false) return true;
|
||||||
|
|
||||||
if (Instruction_State == DELAY_SLOT)
|
if (Instruction_State == RSPPIPELINE_DELAY_SLOT)
|
||||||
{
|
{
|
||||||
return true;
|
return true;
|
||||||
}
|
}
|
||||||
|
@ -916,7 +917,7 @@ bool UseRspFlags(int PC)
|
||||||
case RSP_REGIMM_BGEZ:
|
case RSP_REGIMM_BGEZ:
|
||||||
case RSP_REGIMM_BLTZAL:
|
case RSP_REGIMM_BLTZAL:
|
||||||
case RSP_REGIMM_BGEZAL:
|
case RSP_REGIMM_BGEZAL:
|
||||||
Instruction_State = DO_DELAY_SLOT;
|
Instruction_State = RSPPIPELINE_DO_DELAY_SLOT;
|
||||||
break;
|
break;
|
||||||
default:
|
default:
|
||||||
CompilerWarning("Unknown opcode in UseRspFlags\n%s", RSPInstruction(PC, RspOp.Value).NameAndParam().c_str());
|
CompilerWarning("Unknown opcode in UseRspFlags\n%s", RSPInstruction(PC, RspOp.Value).NameAndParam().c_str());
|
||||||
|
@ -946,7 +947,7 @@ bool UseRspFlags(int PC)
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case RSP_SPECIAL_JR:
|
case RSP_SPECIAL_JR:
|
||||||
Instruction_State = DO_DELAY_SLOT;
|
Instruction_State = RSPPIPELINE_DO_DELAY_SLOT;
|
||||||
break;
|
break;
|
||||||
|
|
||||||
default:
|
default:
|
||||||
|
@ -960,7 +961,7 @@ bool UseRspFlags(int PC)
|
||||||
case RSP_BNE:
|
case RSP_BNE:
|
||||||
case RSP_BLEZ:
|
case RSP_BLEZ:
|
||||||
case RSP_BGTZ:
|
case RSP_BGTZ:
|
||||||
Instruction_State = DO_DELAY_SLOT;
|
Instruction_State = RSPPIPELINE_DO_DELAY_SLOT;
|
||||||
break;
|
break;
|
||||||
case RSP_ADDI:
|
case RSP_ADDI:
|
||||||
case RSP_ADDIU:
|
case RSP_ADDIU:
|
||||||
|
@ -1105,15 +1106,15 @@ bool UseRspFlags(int PC)
|
||||||
}
|
}
|
||||||
switch (Instruction_State)
|
switch (Instruction_State)
|
||||||
{
|
{
|
||||||
case NORMAL: break;
|
case RSPPIPELINE_NORMAL: break;
|
||||||
case DO_DELAY_SLOT:
|
case RSPPIPELINE_DO_DELAY_SLOT:
|
||||||
Instruction_State = DELAY_SLOT;
|
Instruction_State = RSPPIPELINE_DELAY_SLOT;
|
||||||
break;
|
break;
|
||||||
case DELAY_SLOT:
|
case RSPPIPELINE_DELAY_SLOT:
|
||||||
Instruction_State = FINISH_BLOCK;
|
Instruction_State = RSPPIPELINE_FINISH_BLOCK;
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
} while (Instruction_State != FINISH_BLOCK);
|
} while (Instruction_State != RSPPIPELINE_FINISH_BLOCK);
|
||||||
return true;
|
return true;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -1125,11 +1126,11 @@ False: Register is not constant at all
|
||||||
Input: PC, Pointer to constant to fill
|
Input: PC, Pointer to constant to fill
|
||||||
*/
|
*/
|
||||||
|
|
||||||
bool IsRegisterConstant(DWORD Reg, DWORD * Constant)
|
bool IsRegisterConstant(uint32_t Reg, uint32_t * Constant)
|
||||||
{
|
{
|
||||||
DWORD PC = 0;
|
uint32_t PC = 0;
|
||||||
DWORD References = 0;
|
uint32_t References = 0;
|
||||||
DWORD Const = 0;
|
uint32_t Const = 0;
|
||||||
RSPOpcode RspOp;
|
RSPOpcode RspOp;
|
||||||
|
|
||||||
if (Compiler.bGPRConstants == false)
|
if (Compiler.bGPRConstants == false)
|
||||||
|
@ -1338,7 +1339,7 @@ False: Opcode is not a branch
|
||||||
Input: PC
|
Input: PC
|
||||||
*/
|
*/
|
||||||
|
|
||||||
bool IsOpcodeBranch(DWORD PC, RSPOpcode RspOp)
|
bool IsOpcodeBranch(uint32_t PC, RSPOpcode RspOp)
|
||||||
{
|
{
|
||||||
PC = PC; // Unused
|
PC = PC; // Unused
|
||||||
|
|
||||||
|
@ -1468,21 +1469,21 @@ typedef struct
|
||||||
{
|
{
|
||||||
union
|
union
|
||||||
{
|
{
|
||||||
DWORD DestReg;
|
uint32_t DestReg;
|
||||||
DWORD StoredReg;
|
uint32_t StoredReg;
|
||||||
};
|
};
|
||||||
union
|
union
|
||||||
{
|
{
|
||||||
DWORD SourceReg0;
|
uint32_t SourceReg0;
|
||||||
DWORD IndexReg;
|
uint32_t IndexReg;
|
||||||
};
|
};
|
||||||
DWORD SourceReg1;
|
uint32_t SourceReg1;
|
||||||
DWORD flags;
|
uint32_t flags;
|
||||||
} OPCODE_INFO;
|
} OPCODE_INFO;
|
||||||
|
|
||||||
#pragma warning(pop)
|
#pragma warning(pop)
|
||||||
|
|
||||||
void GetInstructionInfo(DWORD PC, RSPOpcode * RspOp, OPCODE_INFO * info)
|
void GetInstructionInfo(uint32_t PC, RSPOpcode * RspOp, OPCODE_INFO * info)
|
||||||
{
|
{
|
||||||
switch (RspOp->op)
|
switch (RspOp->op)
|
||||||
{
|
{
|
||||||
|
@ -1834,7 +1835,7 @@ False: Registers do not affect each other
|
||||||
Input: PC
|
Input: PC
|
||||||
*/
|
*/
|
||||||
|
|
||||||
bool DelaySlotAffectBranch(DWORD PC)
|
bool DelaySlotAffectBranch(uint32_t PC)
|
||||||
{
|
{
|
||||||
RSPOpcode Branch, Delay;
|
RSPOpcode Branch, Delay;
|
||||||
OPCODE_INFO infoBranch, infoDelay;
|
OPCODE_INFO infoBranch, infoDelay;
|
||||||
|
@ -1884,10 +1885,10 @@ Input: Top, not the current operation, the one above
|
||||||
Bottom: The current opcode for re-ordering bubble style
|
Bottom: The current opcode for re-ordering bubble style
|
||||||
*/
|
*/
|
||||||
|
|
||||||
bool CompareInstructions(DWORD PC, RSPOpcode * Top, RSPOpcode * Bottom)
|
bool CompareInstructions(uint32_t PC, RSPOpcode * Top, RSPOpcode * Bottom)
|
||||||
{
|
{
|
||||||
OPCODE_INFO info0, info1;
|
OPCODE_INFO info0, info1;
|
||||||
DWORD InstructionType;
|
uint32_t InstructionType;
|
||||||
|
|
||||||
GetInstructionInfo(PC - 4, Top, &info0);
|
GetInstructionInfo(PC - 4, Top, &info0);
|
||||||
GetInstructionInfo(PC, Bottom, &info1);
|
GetInstructionInfo(PC, Bottom, &info1);
|
||||||
|
|
|
@ -3,8 +3,6 @@
|
||||||
#include <stdlib.h>
|
#include <stdlib.h>
|
||||||
#include <windows.h>
|
#include <windows.h>
|
||||||
|
|
||||||
#include "Cpu.h"
|
|
||||||
#include "Interpreter CPU.h"
|
|
||||||
#include "Profiling.h"
|
#include "Profiling.h"
|
||||||
#include "RSP Command.h"
|
#include "RSP Command.h"
|
||||||
#include "Recompiler CPU.h"
|
#include "Recompiler CPU.h"
|
||||||
|
@ -13,7 +11,10 @@
|
||||||
#include "log.h"
|
#include "log.h"
|
||||||
#include "memory.h"
|
#include "memory.h"
|
||||||
#include "x86.h"
|
#include "x86.h"
|
||||||
|
#include <Project64-rsp-core/RSPInfo.h>
|
||||||
|
#include <Project64-rsp-core/cpu/RSPCpu.h>
|
||||||
#include <Project64-rsp-core/cpu/RSPInstruction.h>
|
#include <Project64-rsp-core/cpu/RSPInstruction.h>
|
||||||
|
#include <Project64-rsp-core/cpu/RSPInterpreterCPU.h>
|
||||||
#include <Project64-rsp-core/cpu/RSPOpcode.h>
|
#include <Project64-rsp-core/cpu/RSPOpcode.h>
|
||||||
#include <Project64-rsp-core/cpu/RSPRegisters.h>
|
#include <Project64-rsp-core/cpu/RSPRegisters.h>
|
||||||
#include <Project64-rsp-core/cpu/RspTypes.h>
|
#include <Project64-rsp-core/cpu/RspTypes.h>
|
||||||
|
@ -26,7 +27,7 @@
|
||||||
#define BUILD_BRANCHLABELS_VERBOSE
|
#define BUILD_BRANCHLABELS_VERBOSE
|
||||||
|
|
||||||
uint32_t CompilePC, JumpTableSize, BlockID = 0;
|
uint32_t CompilePC, JumpTableSize, BlockID = 0;
|
||||||
DWORD dwBuffer = MainBuffer;
|
uint32_t dwBuffer = MainBuffer;
|
||||||
bool ChangedPC;
|
bool ChangedPC;
|
||||||
|
|
||||||
RSP_BLOCK CurrentBlock;
|
RSP_BLOCK CurrentBlock;
|
||||||
|
@ -411,13 +412,13 @@ between branches labels, and actual branches, whichever
|
||||||
occurs first in code
|
occurs first in code
|
||||||
*/
|
*/
|
||||||
|
|
||||||
void ReOrderInstructions(DWORD StartPC, DWORD EndPC)
|
void ReOrderInstructions(uint32_t StartPC, uint32_t EndPC)
|
||||||
{
|
{
|
||||||
DWORD InstructionCount = EndPC - StartPC;
|
uint32_t InstructionCount = EndPC - StartPC;
|
||||||
DWORD Count, ReorderedOps, CurrentPC;
|
uint32_t Count, ReorderedOps, CurrentPC;
|
||||||
RSPOpcode PreviousOp, CurrentOp, RspOp;
|
RSPOpcode PreviousOp, CurrentOp, RspOp;
|
||||||
|
|
||||||
PreviousOp.Value = *(DWORD *)(RSPInfo.IMEM + (StartPC & 0xFFC));
|
PreviousOp.Value = *(uint32_t *)(RSPInfo.IMEM + (StartPC & 0xFFC));
|
||||||
|
|
||||||
if (IsOpcodeBranch(StartPC, PreviousOp))
|
if (IsOpcodeBranch(StartPC, PreviousOp))
|
||||||
{
|
{
|
||||||
|
@ -452,7 +453,7 @@ void ReOrderInstructions(DWORD StartPC, DWORD EndPC)
|
||||||
for (Count = 0; Count < InstructionCount; Count += 4)
|
for (Count = 0; Count < InstructionCount; Count += 4)
|
||||||
{
|
{
|
||||||
CurrentPC = StartPC;
|
CurrentPC = StartPC;
|
||||||
PreviousOp.Value = *(DWORD *)(RSPInfo.IMEM + (CurrentPC & 0xFFC));
|
PreviousOp.Value = *(uint32_t *)(RSPInfo.IMEM + (CurrentPC & 0xFFC));
|
||||||
ReorderedOps = 0;
|
ReorderedOps = 0;
|
||||||
|
|
||||||
for (;;)
|
for (;;)
|
||||||
|
@ -462,13 +463,13 @@ void ReOrderInstructions(DWORD StartPC, DWORD EndPC)
|
||||||
{
|
{
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
CurrentOp.Value = *(DWORD *)(RSPInfo.IMEM + CurrentPC);
|
CurrentOp.Value = *(uint32_t *)(RSPInfo.IMEM + CurrentPC);
|
||||||
|
|
||||||
if (CompareInstructions(CurrentPC, &PreviousOp, &CurrentOp))
|
if (CompareInstructions(CurrentPC, &PreviousOp, &CurrentOp))
|
||||||
{
|
{
|
||||||
// Move current opcode up
|
// Move current opcode up
|
||||||
*(DWORD *)(RSPInfo.IMEM + CurrentPC - 4) = CurrentOp.Value;
|
*(uint32_t *)(RSPInfo.IMEM + CurrentPC - 4) = CurrentOp.Value;
|
||||||
*(DWORD *)(RSPInfo.IMEM + CurrentPC) = PreviousOp.Value;
|
*(uint32_t *)(RSPInfo.IMEM + CurrentPC) = PreviousOp.Value;
|
||||||
|
|
||||||
ReorderedOps++;
|
ReorderedOps++;
|
||||||
|
|
||||||
|
@ -476,7 +477,7 @@ void ReOrderInstructions(DWORD StartPC, DWORD EndPC)
|
||||||
CPU_Message("Swapped %X and %X", CurrentPC - 4, CurrentPC);
|
CPU_Message("Swapped %X and %X", CurrentPC - 4, CurrentPC);
|
||||||
#endif
|
#endif
|
||||||
}
|
}
|
||||||
PreviousOp.Value = *(DWORD *)(RSPInfo.IMEM + (CurrentPC & 0xFFC));
|
PreviousOp.Value = *(uint32_t *)(RSPInfo.IMEM + (CurrentPC & 0xFFC));
|
||||||
|
|
||||||
if (IsOpcodeNop(CurrentPC) && IsOpcodeNop(CurrentPC + 4) && IsOpcodeNop(CurrentPC + 8))
|
if (IsOpcodeNop(CurrentPC) && IsOpcodeNop(CurrentPC + 4) && IsOpcodeNop(CurrentPC + 8))
|
||||||
{
|
{
|
||||||
|
@ -501,8 +502,8 @@ void ReOrderInstructions(DWORD StartPC, DWORD EndPC)
|
||||||
|
|
||||||
void ReOrderSubBlock(RSP_BLOCK * Block)
|
void ReOrderSubBlock(RSP_BLOCK * Block)
|
||||||
{
|
{
|
||||||
DWORD end = 0x0ffc;
|
uint32_t end = 0x0ffc;
|
||||||
DWORD count;
|
uint32_t count;
|
||||||
|
|
||||||
if (!Compiler.bReOrdering)
|
if (!Compiler.bReOrdering)
|
||||||
{
|
{
|
||||||
|
@ -547,10 +548,10 @@ after every time we hit a branch and delay slot
|
||||||
|
|
||||||
void DetectGPRConstants(RSP_CODE * code)
|
void DetectGPRConstants(RSP_CODE * code)
|
||||||
{
|
{
|
||||||
DWORD Count, Constant = 0;
|
uint32_t Count, Constant = 0;
|
||||||
|
|
||||||
memset(&code->bIsRegConst, 0, sizeof(bool) * 0x20);
|
memset(&code->bIsRegConst, 0, sizeof(bool) * 0x20);
|
||||||
memset(&code->MipsRegConst, 0, sizeof(DWORD) * 0x20);
|
memset(&code->MipsRegConst, 0, sizeof(uint32_t) * 0x20);
|
||||||
|
|
||||||
if (!Compiler.bGPRConstants)
|
if (!Compiler.bGPRConstants)
|
||||||
{
|
{
|
||||||
|
@ -615,10 +616,10 @@ void CompilerToggleBuffer(void)
|
||||||
|
|
||||||
void ClearAllx86Code(void)
|
void ClearAllx86Code(void)
|
||||||
{
|
{
|
||||||
extern DWORD NoOfMaps, MapsCRC[32];
|
extern uint32_t NoOfMaps, MapsCRC[32];
|
||||||
extern BYTE * JumpTables;
|
extern BYTE * JumpTables;
|
||||||
|
|
||||||
memset(&MapsCRC, 0, sizeof(DWORD) * 0x20);
|
memset(&MapsCRC, 0, sizeof(uint32_t) * 0x20);
|
||||||
NoOfMaps = 0;
|
NoOfMaps = 0;
|
||||||
memset(JumpTables, 0, 0x1000 * 32);
|
memset(JumpTables, 0, 0x1000 * 32);
|
||||||
|
|
||||||
|
@ -636,9 +637,9 @@ Resolves all the collected branches, x86 style
|
||||||
|
|
||||||
void LinkBranches(RSP_BLOCK * Block)
|
void LinkBranches(RSP_BLOCK * Block)
|
||||||
{
|
{
|
||||||
DWORD OrigPrgCount = *PrgCount;
|
uint32_t OrigPrgCount = *PrgCount;
|
||||||
DWORD Count, Target;
|
uint32_t Count, Target;
|
||||||
DWORD * JumpWord;
|
uint32_t * JumpWord;
|
||||||
BYTE * X86Code;
|
BYTE * X86Code;
|
||||||
RSP_BLOCK Save;
|
RSP_BLOCK Save;
|
||||||
|
|
||||||
|
@ -671,7 +672,7 @@ void LinkBranches(RSP_BLOCK * Block)
|
||||||
}
|
}
|
||||||
|
|
||||||
JumpWord = CurrentBlock.BranchesToResolve[Count].X86JumpLoc;
|
JumpWord = CurrentBlock.BranchesToResolve[Count].X86JumpLoc;
|
||||||
x86_SetBranch32b(JumpWord, (DWORD *)X86Code);
|
x86_SetBranch32b(JumpWord, (uint32_t *)X86Code);
|
||||||
|
|
||||||
CPU_Message("Linked RSP branch from x86: %08X, to RSP: %X / x86: %08X",
|
CPU_Message("Linked RSP branch from x86: %08X, to RSP: %X / x86: %08X",
|
||||||
JumpWord, Target, X86Code);
|
JumpWord, Target, X86Code);
|
||||||
|
@ -692,7 +693,7 @@ within a block that are safe.
|
||||||
void BuildBranchLabels(void)
|
void BuildBranchLabels(void)
|
||||||
{
|
{
|
||||||
RSPOpcode RspOp;
|
RSPOpcode RspOp;
|
||||||
DWORD i, Dest;
|
uint32_t i, Dest;
|
||||||
|
|
||||||
#ifdef BUILD_BRANCHLABELS_VERBOSE
|
#ifdef BUILD_BRANCHLABELS_VERBOSE
|
||||||
CPU_Message("***** Building branch labels *****");
|
CPU_Message("***** Building branch labels *****");
|
||||||
|
@ -700,7 +701,7 @@ void BuildBranchLabels(void)
|
||||||
|
|
||||||
for (i = 0; i < 0x1000; i += 4)
|
for (i = 0; i < 0x1000; i += 4)
|
||||||
{
|
{
|
||||||
RspOp.Value = *(DWORD *)(RSPInfo.IMEM + i);
|
RspOp.Value = *(uint32_t *)(RSPInfo.IMEM + i);
|
||||||
|
|
||||||
if (IsOpcodeBranch(i, RspOp))
|
if (IsOpcodeBranch(i, RspOp))
|
||||||
{
|
{
|
||||||
|
@ -748,9 +749,9 @@ void BuildBranchLabels(void)
|
||||||
#endif
|
#endif
|
||||||
}
|
}
|
||||||
|
|
||||||
bool IsJumpLabel(DWORD PC)
|
bool IsJumpLabel(uint32_t PC)
|
||||||
{
|
{
|
||||||
DWORD Count;
|
uint32_t Count;
|
||||||
|
|
||||||
if (!RspCode.LabelCount)
|
if (!RspCode.LabelCount)
|
||||||
{
|
{
|
||||||
|
@ -772,7 +773,7 @@ void CompilerLinkBlocks(void)
|
||||||
BYTE * KnownCode = (BYTE *)*(JumpTable + (CompilePC >> 2));
|
BYTE * KnownCode = (BYTE *)*(JumpTable + (CompilePC >> 2));
|
||||||
|
|
||||||
CPU_Message("***** Linking block to X86: %08X *****", KnownCode);
|
CPU_Message("***** Linking block to X86: %08X *****", KnownCode);
|
||||||
NextInstruction = FINISH_BLOCK;
|
NextInstruction = RSPPIPELINE_FINISH_BLOCK;
|
||||||
|
|
||||||
// Block linking scenario
|
// Block linking scenario
|
||||||
JmpLabel32("Linked block", 0);
|
JmpLabel32("Linked block", 0);
|
||||||
|
@ -784,7 +785,7 @@ void CompilerRSPBlock(void)
|
||||||
BYTE * IMEM_SAVE = (BYTE *)malloc(0x1000);
|
BYTE * IMEM_SAVE = (BYTE *)malloc(0x1000);
|
||||||
const size_t X86BaseAddress = (size_t)RecompPos;
|
const size_t X86BaseAddress = (size_t)RecompPos;
|
||||||
|
|
||||||
NextInstruction = NORMAL;
|
NextInstruction = RSPPIPELINE_NORMAL;
|
||||||
CompilePC = *PrgCount;
|
CompilePC = *PrgCount;
|
||||||
|
|
||||||
memset(&CurrentBlock, 0, sizeof(CurrentBlock));
|
memset(&CurrentBlock, 0, sizeof(CurrentBlock));
|
||||||
|
@ -825,7 +826,7 @@ void CompilerRSPBlock(void)
|
||||||
// Reordering is setup to allow us to have loop labels
|
// Reordering is setup to allow us to have loop labels
|
||||||
// so here we see if this is one and put it in the jump table
|
// so here we see if this is one and put it in the jump table
|
||||||
|
|
||||||
if (NextInstruction == NORMAL && IsJumpLabel(CompilePC))
|
if (NextInstruction == RSPPIPELINE_NORMAL && IsJumpLabel(CompilePC))
|
||||||
{
|
{
|
||||||
// Jumps come around twice
|
// Jumps come around twice
|
||||||
if (NULL == *(JumpTable + (CompilePC >> 2)))
|
if (NULL == *(JumpTable + (CompilePC >> 2)))
|
||||||
|
@ -838,7 +839,7 @@ void CompilerRSPBlock(void)
|
||||||
CurrentBlock.CurrPC = CompilePC;
|
CurrentBlock.CurrPC = CompilePC;
|
||||||
ReOrderSubBlock(&CurrentBlock);
|
ReOrderSubBlock(&CurrentBlock);
|
||||||
}
|
}
|
||||||
else if (NextInstruction != DELAY_SLOT_DONE)
|
else if (NextInstruction != RSPPIPELINE_DELAY_SLOT_DONE)
|
||||||
{
|
{
|
||||||
|
|
||||||
// We could link the blocks here, but performance-wise it might be better to just let it run
|
// We could link the blocks here, but performance-wise it might be better to just let it run
|
||||||
|
@ -862,7 +863,7 @@ void CompilerRSPBlock(void)
|
||||||
|
|
||||||
RSP_LW_IMEM(CompilePC, &RSPOpC.Value);
|
RSP_LW_IMEM(CompilePC, &RSPOpC.Value);
|
||||||
|
|
||||||
if (LogRDP && NextInstruction != DELAY_SLOT_DONE)
|
if (LogRDP && NextInstruction != RSPPIPELINE_DELAY_SLOT_DONE)
|
||||||
{
|
{
|
||||||
char str[40];
|
char str[40];
|
||||||
sprintf(str, "%X", CompilePC);
|
sprintf(str, "%X", CompilePC);
|
||||||
|
@ -874,7 +875,7 @@ void CompilerRSPBlock(void)
|
||||||
if (RSPOpC.Value == 0xFFFFFFFF)
|
if (RSPOpC.Value == 0xFFFFFFFF)
|
||||||
{
|
{
|
||||||
// I think this pops up an unknown OP dialog
|
// I think this pops up an unknown OP dialog
|
||||||
// NextInstruction = FINISH_BLOCK;
|
// NextInstruction = RSPPIPELINE_FINISH_BLOCK;
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
|
@ -883,27 +884,27 @@ void CompilerRSPBlock(void)
|
||||||
|
|
||||||
switch (NextInstruction)
|
switch (NextInstruction)
|
||||||
{
|
{
|
||||||
case NORMAL:
|
case RSPPIPELINE_NORMAL:
|
||||||
CompilePC += 4;
|
CompilePC += 4;
|
||||||
break;
|
break;
|
||||||
case DO_DELAY_SLOT:
|
case RSPPIPELINE_DO_DELAY_SLOT:
|
||||||
NextInstruction = DELAY_SLOT;
|
NextInstruction = RSPPIPELINE_DELAY_SLOT;
|
||||||
CompilePC += 4;
|
CompilePC += 4;
|
||||||
break;
|
break;
|
||||||
case DELAY_SLOT:
|
case RSPPIPELINE_DELAY_SLOT:
|
||||||
NextInstruction = DELAY_SLOT_DONE;
|
NextInstruction = RSPPIPELINE_DELAY_SLOT_DONE;
|
||||||
CompilePC -= 4;
|
CompilePC -= 4;
|
||||||
break;
|
break;
|
||||||
case DELAY_SLOT_EXIT:
|
case RSPPIPELINE_DELAY_SLOT_EXIT:
|
||||||
NextInstruction = DELAY_SLOT_EXIT_DONE;
|
NextInstruction = RSPPIPELINE_DELAY_SLOT_EXIT_DONE;
|
||||||
CompilePC -= 4;
|
CompilePC -= 4;
|
||||||
break;
|
break;
|
||||||
case FINISH_SUB_BLOCK:
|
case RSPPIPELINE_FINISH_SUB_BLOCK:
|
||||||
NextInstruction = NORMAL;
|
NextInstruction = RSPPIPELINE_NORMAL;
|
||||||
CompilePC += 8;
|
CompilePC += 8;
|
||||||
if (CompilePC >= 0x1000)
|
if (CompilePC >= 0x1000)
|
||||||
{
|
{
|
||||||
NextInstruction = FINISH_BLOCK;
|
NextInstruction = RSPPIPELINE_FINISH_BLOCK;
|
||||||
}
|
}
|
||||||
else if (NULL == *(JumpTable + (CompilePC >> 2)))
|
else if (NULL == *(JumpTable + (CompilePC >> 2)))
|
||||||
{
|
{
|
||||||
|
@ -921,13 +922,13 @@ void CompilerRSPBlock(void)
|
||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case FINISH_BLOCK: break;
|
case RSPPIPELINE_FINISH_BLOCK: break;
|
||||||
default:
|
default:
|
||||||
DisplayError("RSP main loop\n\nWTF NextInstruction = %d", NextInstruction);
|
DisplayError("RSP main loop\n\nWTF NextInstruction = %d", NextInstruction);
|
||||||
CompilePC += 4;
|
CompilePC += 4;
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
} while (NextInstruction != FINISH_BLOCK && (CompilePC < 0x1000 || NextInstruction == DELAY_SLOT));
|
} while (NextInstruction != RSPPIPELINE_FINISH_BLOCK && (CompilePC < 0x1000 || NextInstruction == RSPPIPELINE_DELAY_SLOT));
|
||||||
CPU_Message("===== End of recompiled code =====");
|
CPU_Message("===== End of recompiled code =====");
|
||||||
|
|
||||||
if (Compiler.bReOrdering)
|
if (Compiler.bReOrdering)
|
||||||
|
@ -937,7 +938,7 @@ void CompilerRSPBlock(void)
|
||||||
free(IMEM_SAVE);
|
free(IMEM_SAVE);
|
||||||
}
|
}
|
||||||
|
|
||||||
DWORD RunRecompilerCPU(DWORD Cycles)
|
uint32_t RunRecompilerCPU(uint32_t Cycles)
|
||||||
{
|
{
|
||||||
BYTE * Block;
|
BYTE * Block;
|
||||||
|
|
||||||
|
@ -952,7 +953,7 @@ DWORD RunRecompilerCPU(DWORD Cycles)
|
||||||
{
|
{
|
||||||
if (Profiling && !IndvidualBlock)
|
if (Profiling && !IndvidualBlock)
|
||||||
{
|
{
|
||||||
StartTimer((DWORD)Timer_Compiling);
|
StartTimer((uint32_t)Timer_Compiling);
|
||||||
}
|
}
|
||||||
|
|
||||||
memset(&RspCode, 0, sizeof(RspCode));
|
memset(&RspCode, 0, sizeof(RspCode));
|
||||||
|
@ -1006,7 +1007,7 @@ DWORD RunRecompilerCPU(DWORD Cycles)
|
||||||
{
|
{
|
||||||
StopTimer();
|
StopTimer();
|
||||||
}
|
}
|
||||||
if (RSP_NextInstruction == SINGLE_STEP)
|
if (RSP_NextInstruction == RSPPIPELINE_SINGLE_STEP)
|
||||||
{
|
{
|
||||||
RSP_Running = false;
|
RSP_Running = false;
|
||||||
}
|
}
|
||||||
|
|
|
@ -13,16 +13,16 @@ extern bool ChangedPC;
|
||||||
#define EntireAccum (Low16BitAccum | Middle16BitAccum | High16BitAccum)
|
#define EntireAccum (Low16BitAccum | Middle16BitAccum | High16BitAccum)
|
||||||
|
|
||||||
bool WriteToAccum(int Location, int PC);
|
bool WriteToAccum(int Location, int PC);
|
||||||
bool WriteToVectorDest(DWORD DestReg, int PC);
|
bool WriteToVectorDest(uint32_t DestReg, int PC);
|
||||||
bool UseRspFlags(int PC);
|
bool UseRspFlags(int PC);
|
||||||
|
|
||||||
bool DelaySlotAffectBranch(DWORD PC);
|
bool DelaySlotAffectBranch(uint32_t PC);
|
||||||
bool CompareInstructions(DWORD PC, RSPOpcode * Top, RSPOpcode * Bottom);
|
bool CompareInstructions(uint32_t PC, RSPOpcode * Top, RSPOpcode * Bottom);
|
||||||
bool IsOpcodeBranch(DWORD PC, RSPOpcode RspOp);
|
bool IsOpcodeBranch(uint32_t PC, RSPOpcode RspOp);
|
||||||
bool IsOpcodeNop(DWORD PC);
|
bool IsOpcodeNop(uint32_t PC);
|
||||||
|
|
||||||
bool IsNextInstructionMmx(DWORD PC);
|
bool IsNextInstructionMmx(uint32_t PC);
|
||||||
bool IsRegisterConstant(DWORD Reg, DWORD * Constant);
|
bool IsRegisterConstant(uint32_t Reg, uint32_t * Constant);
|
||||||
|
|
||||||
void RSP_Element2Mmx(int MmxReg);
|
void RSP_Element2Mmx(int MmxReg);
|
||||||
void RSP_MultiElement2Mmx(int MmxReg1, int MmxReg2);
|
void RSP_MultiElement2Mmx(int MmxReg1, int MmxReg2);
|
||||||
|
@ -30,7 +30,7 @@ void RSP_MultiElement2Mmx(int MmxReg1, int MmxReg2);
|
||||||
#define MainBuffer 0
|
#define MainBuffer 0
|
||||||
#define SecondaryBuffer 1
|
#define SecondaryBuffer 1
|
||||||
|
|
||||||
DWORD RunRecompilerCPU(DWORD Cycles);
|
uint32_t RunRecompilerCPU(uint32_t Cycles);
|
||||||
void BuildRecompilerCPU(void);
|
void BuildRecompilerCPU(void);
|
||||||
|
|
||||||
void CompilerRSPBlock(void);
|
void CompilerRSPBlock(void);
|
||||||
|
@ -39,15 +39,15 @@ bool RSP_DoSections(void);
|
||||||
|
|
||||||
typedef struct
|
typedef struct
|
||||||
{
|
{
|
||||||
DWORD StartPC, CurrPC; // Block start
|
uint32_t StartPC, CurrPC; // Block start
|
||||||
|
|
||||||
struct
|
struct
|
||||||
{
|
{
|
||||||
DWORD TargetPC; // Target for this unknown branch
|
uint32_t TargetPC; // Target for this unknown branch
|
||||||
DWORD * X86JumpLoc; // Our x86 DWORD to fill
|
uint32_t * X86JumpLoc; // Our x86 uint32_t to fill
|
||||||
} BranchesToResolve[200]; // Branches inside or outside block
|
} BranchesToResolve[200]; // Branches inside or outside block
|
||||||
|
|
||||||
DWORD ResolveCount; // Branches with NULL jump table
|
uint32_t ResolveCount; // Branches with NULL jump table
|
||||||
} RSP_BLOCK;
|
} RSP_BLOCK;
|
||||||
|
|
||||||
extern RSP_BLOCK CurrentBlock;
|
extern RSP_BLOCK CurrentBlock;
|
||||||
|
@ -55,11 +55,11 @@ extern RSP_BLOCK CurrentBlock;
|
||||||
typedef struct
|
typedef struct
|
||||||
{
|
{
|
||||||
bool bIsRegConst[32]; // bool toggle for constant
|
bool bIsRegConst[32]; // bool toggle for constant
|
||||||
DWORD MipsRegConst[32]; // Value of register 32-bit
|
uint32_t MipsRegConst[32]; // Value of register 32-bit
|
||||||
DWORD BranchLabels[250];
|
uint32_t BranchLabels[250];
|
||||||
DWORD LabelCount;
|
uint32_t LabelCount;
|
||||||
DWORD BranchLocations[250];
|
uint32_t BranchLocations[250];
|
||||||
DWORD BranchCount;
|
uint32_t BranchCount;
|
||||||
} RSP_CODE;
|
} RSP_CODE;
|
||||||
|
|
||||||
extern RSP_CODE RspCode;
|
extern RSP_CODE RspCode;
|
||||||
|
|
File diff suppressed because it is too large
Load Diff
|
@ -1,7 +1,6 @@
|
||||||
#include <stdio.h>
|
#include <stdio.h>
|
||||||
#include <windows.h>
|
#include <windows.h>
|
||||||
|
|
||||||
#include "CPU.h"
|
|
||||||
#include "RSP Command.h"
|
#include "RSP Command.h"
|
||||||
#include "Recompiler CPU.h"
|
#include "Recompiler CPU.h"
|
||||||
#include "Rsp.h"
|
#include "Rsp.h"
|
||||||
|
@ -9,6 +8,7 @@
|
||||||
#include "log.h"
|
#include "log.h"
|
||||||
#include "memory.h"
|
#include "memory.h"
|
||||||
#include "x86.h"
|
#include "x86.h"
|
||||||
|
#include <Project64-rsp-core/cpu/RSPCpu.h>
|
||||||
#include <Project64-rsp-core/cpu/RSPInstruction.h>
|
#include <Project64-rsp-core/cpu/RSPInstruction.h>
|
||||||
#include <Project64-rsp-core/cpu/RSPRegisters.h>
|
#include <Project64-rsp-core/cpu/RSPRegisters.h>
|
||||||
#include <Project64-rsp-core/cpu/RspTypes.h>
|
#include <Project64-rsp-core/cpu/RspTypes.h>
|
||||||
|
|
|
@ -11,11 +11,6 @@
|
||||||
uint32_t AsciiToHex(char * HexValue);
|
uint32_t AsciiToHex(char * HexValue);
|
||||||
void DisplayError(char * Message, ...);
|
void DisplayError(char * Message, ...);
|
||||||
|
|
||||||
#define InterpreterCPU 0
|
|
||||||
#define RecompilerCPU 1
|
|
||||||
|
|
||||||
extern bool DebuggingEnabled, Profiling, IndvidualBlock, ShowErrors, BreakOnStart, LogRDP, LogX86Code;
|
extern bool DebuggingEnabled, Profiling, IndvidualBlock, ShowErrors, BreakOnStart, LogRDP, LogX86Code;
|
||||||
extern uint32_t CPUCore;
|
|
||||||
extern DEBUG_INFO DebugInfo;
|
extern DEBUG_INFO DebugInfo;
|
||||||
extern RSP_INFO RSPInfo;
|
|
||||||
extern void * hinstDLL;
|
extern void * hinstDLL;
|
|
@ -2,6 +2,7 @@
|
||||||
#include "log.h"
|
#include "log.h"
|
||||||
#include "memory.h"
|
#include "memory.h"
|
||||||
#include "x86.h"
|
#include "x86.h"
|
||||||
|
#include <Project64-rsp-core/RSPInfo.h>
|
||||||
#include <Project64-rsp-core/cpu/RSPRegisters.h>
|
#include <Project64-rsp-core/cpu/RSPRegisters.h>
|
||||||
#include <stdio.h>
|
#include <stdio.h>
|
||||||
#include <windows.h>
|
#include <windows.h>
|
||||||
|
|
|
@ -5,6 +5,7 @@
|
||||||
#include "log.h"
|
#include "log.h"
|
||||||
#include "memory.h"
|
#include "memory.h"
|
||||||
#include "x86.h"
|
#include "x86.h"
|
||||||
|
#include <Project64-rsp-core/RSPInfo.h>
|
||||||
#include <Project64-rsp-core/cpu/RSPRegisters.h>
|
#include <Project64-rsp-core/cpu/RSPRegisters.h>
|
||||||
#include <Project64-rsp-core/cpu/RspTypes.h>
|
#include <Project64-rsp-core/cpu/RspTypes.h>
|
||||||
|
|
||||||
|
|
|
@ -1,6 +1,6 @@
|
||||||
#include "breakpoint.h"
|
#include "breakpoint.h"
|
||||||
#include "CPU.h"
|
|
||||||
#include "Rsp.h"
|
#include "Rsp.h"
|
||||||
|
#include <Project64-rsp-core\RSPInfo.h>
|
||||||
#include <stdio.h>
|
#include <stdio.h>
|
||||||
#include <windows.h>
|
#include <windows.h>
|
||||||
|
|
||||||
|
@ -95,7 +95,7 @@ void CreateBPPanel(void * hDlg, rectangle rcBox)
|
||||||
char Title[20];
|
char Title[20];
|
||||||
SendMessage(hRSPLocation, WM_SETFONT, (WPARAM)GetStockObject(DEFAULT_GUI_FONT), 0);
|
SendMessage(hRSPLocation, WM_SETFONT, (WPARAM)GetStockObject(DEFAULT_GUI_FONT), 0);
|
||||||
SendMessage(hRSPLocation, EM_SETLIMITTEXT, (WPARAM)3, (LPARAM)0);
|
SendMessage(hRSPLocation, EM_SETLIMITTEXT, (WPARAM)3, (LPARAM)0);
|
||||||
sprintf(Title, "%03X", *PrgCount);
|
sprintf(Title, "%03X", *RSPInfo.SP_PC_REG);
|
||||||
SetWindowTextA(hRSPLocation, Title);
|
SetWindowTextA(hRSPLocation, Title);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
|
@ -4,6 +4,8 @@
|
||||||
|
|
||||||
#include "Rsp.h"
|
#include "Rsp.h"
|
||||||
#include "memory.h"
|
#include "memory.h"
|
||||||
|
#include <Project64-rsp-core/RSPInfo.h>
|
||||||
|
#include <Project64-rsp-core/cpu/RSPCpu.h>
|
||||||
#include <Project64-rsp-core/cpu/RSPRegisters.h>
|
#include <Project64-rsp-core/cpu/RSPRegisters.h>
|
||||||
|
|
||||||
// #define RSP_SAFE_DMA // Unoptimized DMA transfers
|
// #define RSP_SAFE_DMA // Unoptimized DMA transfers
|
||||||
|
@ -67,7 +69,7 @@ void SP_DMA_READ(void)
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
// TODO: Could this be a problem DMEM to IMEM?
|
// TODO: Could this be a problem DMEM to IMEM?
|
||||||
if (CPUCore == RecompilerCPU && (*RSPInfo.SP_MEM_ADDR_REG & 0x1000) != 0)
|
if (g_CPUCore == RecompilerCPU && (*RSPInfo.SP_MEM_ADDR_REG & 0x1000) != 0)
|
||||||
{
|
{
|
||||||
SetJumpTable(End);
|
SetJumpTable(End);
|
||||||
}
|
}
|
||||||
|
|
|
@ -7,6 +7,7 @@
|
||||||
|
|
||||||
#include "Log.h"
|
#include "Log.h"
|
||||||
#include "Rsp.h"
|
#include "Rsp.h"
|
||||||
|
#include <Project64-rsp-core/RSPInfo.h>
|
||||||
#include <Project64-rsp-core/cpu/RSPRegisters.h>
|
#include <Project64-rsp-core/cpu/RSPRegisters.h>
|
||||||
|
|
||||||
CLog * RDPLog = NULL;
|
CLog * RDPLog = NULL;
|
||||||
|
|
|
@ -4,10 +4,11 @@ enum
|
||||||
};
|
};
|
||||||
|
|
||||||
#include "Rsp.h"
|
#include "Rsp.h"
|
||||||
|
#include <Project64-rsp-core/RSPInfo.h>
|
||||||
#include <Project64-rsp-core/cpu/RSPRegisters.h>
|
#include <Project64-rsp-core/cpu/RSPRegisters.h>
|
||||||
#include <windows.h>
|
#include <windows.h>
|
||||||
|
|
||||||
DWORD NoOfMaps, MapsCRC[MaxMaps];
|
uint32_t NoOfMaps, MapsCRC[MaxMaps];
|
||||||
uint32_t Table;
|
uint32_t Table;
|
||||||
BYTE *RecompCode, *RecompCodeSecondary, *RecompPos, *JumpTables;
|
BYTE *RecompCode, *RecompCodeSecondary, *RecompPos, *JumpTables;
|
||||||
void ** JumpTable;
|
void ** JumpTable;
|
||||||
|
@ -72,7 +73,7 @@ void ResetJumpTables(void)
|
||||||
|
|
||||||
void SetJumpTable(uint32_t End)
|
void SetJumpTable(uint32_t End)
|
||||||
{
|
{
|
||||||
DWORD CRC, count;
|
uint32_t CRC, count;
|
||||||
|
|
||||||
CRC = 0;
|
CRC = 0;
|
||||||
if (End < 0x800)
|
if (End < 0x800)
|
||||||
|
@ -87,7 +88,7 @@ void SetJumpTable(uint32_t End)
|
||||||
|
|
||||||
for (count = 0; count < End; count += 0x40)
|
for (count = 0; count < End; count += 0x40)
|
||||||
{
|
{
|
||||||
CRC += *(DWORD *)(RSPInfo.IMEM + count);
|
CRC += *(uint32_t *)(RSPInfo.IMEM + count);
|
||||||
}
|
}
|
||||||
|
|
||||||
for (count = 0; count < NoOfMaps; count++)
|
for (count = 0; count < NoOfMaps; count++)
|
||||||
|
|
Loading…
Reference in New Issue