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Core: have SB/SH be able to write to rom handler

This commit is contained in:
zilmar 2022-08-08 19:33:16 +09:30
parent cd3b326a83
commit 5ea06d958e
3 changed files with 33 additions and 21 deletions
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4
Source/Project64-core/N64System/Interpreter/InterpreterOps.cpp
View File

@ -1098,13 +1098,13 @@ void R4300iOp::LWU()
void R4300iOp::SB() void R4300iOp::SB()
{ {
uint32_t Address = _GPR[m_Opcode.base].UW[0] + (int16_t)m_Opcode.offset; uint32_t Address = _GPR[m_Opcode.base].UW[0] + (int16_t)m_Opcode.offset;
g_MMU->SB_Memory(Address, _GPR[m_Opcode.rt].UB[0]); g_MMU->SB_Memory(Address, _GPR[m_Opcode.rt].UW[0]);
} }
void R4300iOp::SH() void R4300iOp::SH()
{ {
uint32_t Address = _GPR[m_Opcode.base].UW[0] + (int16_t)m_Opcode.offset; uint32_t Address = _GPR[m_Opcode.base].UW[0] + (int16_t)m_Opcode.offset;
g_MMU->SH_Memory(Address, _GPR[m_Opcode.rt].UHW[0]); g_MMU->SH_Memory(Address, _GPR[m_Opcode.rt].UW[0]);
} }
void R4300iOp::SWL() void R4300iOp::SWL()

34
Source/Project64-core/N64System/Mips/MemoryVirtualMem.cpp
View File

@ -476,7 +476,7 @@ bool CMipsMemoryVM::LD_Memory(uint32_t VAddr, uint64_t& Value)
return LD_NonMemory(VAddr, Value); return LD_NonMemory(VAddr, Value);
} }
bool CMipsMemoryVM::SB_Memory(uint32_t VAddr, uint8_t Value) bool CMipsMemoryVM::SB_Memory(uint32_t VAddr, uint32_t Value)
{ {
if (HaveWriteBP() && g_Debugger->WriteBP8(VAddr) && MemoryBreakpoint()) if (HaveWriteBP() && g_Debugger->WriteBP8(VAddr) && MemoryBreakpoint())
{ {
@ -485,7 +485,7 @@ bool CMipsMemoryVM::SB_Memory(uint32_t VAddr, uint8_t Value)
uint8_t * MemoryPtr = (uint8_t*)m_MemoryWriteMap[VAddr >> 12]; uint8_t * MemoryPtr = (uint8_t*)m_MemoryWriteMap[VAddr >> 12];
if (MemoryPtr != (uint8_t *)-1) if (MemoryPtr != (uint8_t *)-1)
{ {
*(uint8_t*)(MemoryPtr + (VAddr ^ 3)) = Value; *(uint8_t*)(MemoryPtr + (VAddr ^ 3)) = (uint8_t)Value;
return true; return true;
} }
if (m_TLB_WriteMap[VAddr >> 12] == -1) if (m_TLB_WriteMap[VAddr >> 12] == -1)
@ -496,7 +496,7 @@ bool CMipsMemoryVM::SB_Memory(uint32_t VAddr, uint8_t Value)
return SB_NonMemory(VAddr, Value); return SB_NonMemory(VAddr, Value);
} }
bool CMipsMemoryVM::SH_Memory(uint32_t VAddr, uint16_t Value) bool CMipsMemoryVM::SH_Memory(uint32_t VAddr, uint32_t Value)
{ {
if ((VAddr & 1) != 0) if ((VAddr & 1) != 0)
{ {
@ -510,7 +510,7 @@ bool CMipsMemoryVM::SH_Memory(uint32_t VAddr, uint16_t Value)
uint8_t * MemoryPtr = (uint8_t*)m_MemoryWriteMap[VAddr >> 12]; uint8_t * MemoryPtr = (uint8_t*)m_MemoryWriteMap[VAddr >> 12];
if (MemoryPtr != (uint8_t *)-1) if (MemoryPtr != (uint8_t *)-1)
{ {
*(uint16_t*)(MemoryPtr + (VAddr ^ 2)) = Value; *(uint16_t*)(MemoryPtr + (VAddr ^ 2)) = (uint16_t)Value;
return true; return true;
} }
uint32_t BaseAddress = m_TLB_ReadMap[VAddr >> 12]; uint32_t BaseAddress = m_TLB_ReadMap[VAddr >> 12];
@ -711,7 +711,7 @@ bool CMipsMemoryVM::LD_NonMemory(uint32_t VAddr, uint64_t & Value)
return false; return false;
} }
bool CMipsMemoryVM::SB_NonMemory(uint32_t VAddr, uint8_t Value) bool CMipsMemoryVM::SB_NonMemory(uint32_t VAddr, uint32_t Value)
{ {
uint32_t BaseAddress = m_TLB_ReadMap[VAddr >> 12]; uint32_t BaseAddress = m_TLB_ReadMap[VAddr >> 12];
if (BaseAddress == -1) if (BaseAddress == -1)
@ -734,11 +734,15 @@ bool CMipsMemoryVM::SB_NonMemory(uint32_t VAddr, uint8_t Value)
{ {
g_Recompiler->ClearRecompCode_Phys(PAddr & ~0xFFF, 0xFFC, CRecompiler::Remove_ProtectedMem); g_Recompiler->ClearRecompCode_Phys(PAddr & ~0xFFF, 0xFFC, CRecompiler::Remove_ProtectedMem);
::ProtectMemory(m_RDRAM + (PAddr & ~0xFFF), 0xFFC, MEM_READWRITE); ::ProtectMemory(m_RDRAM + (PAddr & ~0xFFF), 0xFFC, MEM_READWRITE);
*(uint8_t *)(m_RDRAM + (PAddr ^ 3)) = Value; *(uint8_t *)(m_RDRAM + (PAddr ^ 3)) = (uint8_t)Value;
} }
break; break;
default: default:
if (BreakOnUnhandledMemory()) if (PAddr >= 0x10000000 && PAddr < 0x20000000)
{
m_RomMemoryHandler.Write32(PAddr, Value << ((3 - (PAddr & 3)) * 8), 0xFFFFFFFF);
}
else if (BreakOnUnhandledMemory())
{ {
g_Notify->BreakPoint(__FILE__, __LINE__); g_Notify->BreakPoint(__FILE__, __LINE__);
} }
@ -748,7 +752,7 @@ bool CMipsMemoryVM::SB_NonMemory(uint32_t VAddr, uint8_t Value)
return true; return true;
} }
bool CMipsMemoryVM::SH_NonMemory(uint32_t VAddr, uint16_t Value) bool CMipsMemoryVM::SH_NonMemory(uint32_t VAddr, uint32_t Value)
{ {
uint32_t BaseAddress = m_TLB_ReadMap[VAddr >> 12]; uint32_t BaseAddress = m_TLB_ReadMap[VAddr >> 12];
if (BaseAddress == -1) if (BaseAddress == -1)
@ -780,12 +784,16 @@ bool CMipsMemoryVM::SH_NonMemory(uint32_t VAddr, uint16_t Value)
{ {
m_TLB_WriteMap[VAddr >> 12] = PAddr - VAddr; m_TLB_WriteMap[VAddr >> 12] = PAddr - VAddr;
} }
*(uint16_t *)(m_RDRAM + (PAddr ^ 2)) = Value; *(uint16_t *)(m_RDRAM + (PAddr ^ 2)) = (uint16_t)Value;
} }
} }
break; break;
default: default:
if (BreakOnUnhandledMemory()) if (PAddr >= 0x10000000 && PAddr < 0x20000000)
{
m_RomMemoryHandler.Write32(PAddr, Value << ((2 - (PAddr & 2)) * 8), 0xFFFFFFFF);
}
else if (BreakOnUnhandledMemory())
{ {
g_Notify->BreakPoint(__FILE__, __LINE__); g_Notify->BreakPoint(__FILE__, __LINE__);
} }
@ -901,7 +909,11 @@ bool CMipsMemoryVM::SD_NonMemory(uint32_t VAddr, uint64_t Value)
} }
break; break;
default: default:
if (BreakOnUnhandledMemory()) if (PAddr >= 0x10000000 && PAddr < 0x20000000)
{
m_RomMemoryHandler.Write32(PAddr, (int32_t)(Value >> 32), 0xFFFFFFFF);
}
else if (BreakOnUnhandledMemory())
{ {
g_Notify->BreakPoint(__FILE__, __LINE__); g_Notify->BreakPoint(__FILE__, __LINE__);
} }

8
Source/Project64-core/N64System/Mips/MemoryVirtualMem.h
View File

@ -88,8 +88,8 @@ public:
bool LW_Memory(uint32_t VAddr, uint32_t & Value); bool LW_Memory(uint32_t VAddr, uint32_t & Value);
bool LD_Memory(uint32_t VAddr, uint64_t & Value); bool LD_Memory(uint32_t VAddr, uint64_t & Value);
bool SB_Memory(uint32_t VAddr, uint8_t Value); bool SB_Memory(uint32_t VAddr, uint32_t Value);
bool SH_Memory(uint32_t VAddr, uint16_t Value); bool SH_Memory(uint32_t VAddr, uint32_t Value);
bool SW_Memory(uint32_t VAddr, uint32_t Value); bool SW_Memory(uint32_t VAddr, uint32_t Value);
bool SD_Memory(uint32_t VAddr, uint64_t Value); bool SD_Memory(uint32_t VAddr, uint64_t Value);
@ -140,8 +140,8 @@ private:
bool LW_NonMemory(uint32_t VAddr, uint32_t & Value); bool LW_NonMemory(uint32_t VAddr, uint32_t & Value);
bool LD_NonMemory(uint32_t VAddr, uint64_t & Value); bool LD_NonMemory(uint32_t VAddr, uint64_t & Value);
bool SB_NonMemory(uint32_t VAddr, uint8_t Value); bool SB_NonMemory(uint32_t VAddr, uint32_t Value);
bool SH_NonMemory(uint32_t VAddr, uint16_t Value); bool SH_NonMemory(uint32_t VAddr, uint32_t Value);
bool SW_NonMemory(uint32_t VAddr, uint32_t Value); bool SW_NonMemory(uint32_t VAddr, uint32_t Value);
bool SD_NonMemory(uint32_t VAddr, uint64_t Value); bool SD_NonMemory(uint32_t VAddr, uint64_t Value);