From 5e1a40fffb56f696cdbe84e53a7ba1ce8f2b0bbd Mon Sep 17 00:00:00 2001 From: zilmar Date: Thu, 21 Nov 2024 11:10:01 +1030 Subject: [PATCH] Core: fix CX86RecompilerOps::CompileLoadMemoryValue Map_GPR_32bit when called from LWC1 --- Source/Project64-core/N64System/Mips/R4300iInstruction.cpp | 4 ++-- Source/Project64-core/N64System/Mips/R4300iInstruction.h | 2 +- .../N64System/Recompiler/x86/x86RecompilerOps.cpp | 2 +- 3 files changed, 4 insertions(+), 4 deletions(-) diff --git a/Source/Project64-core/N64System/Mips/R4300iInstruction.cpp b/Source/Project64-core/N64System/Mips/R4300iInstruction.cpp index 12fdda7b6..c12364f8b 100644 --- a/Source/Project64-core/N64System/Mips/R4300iInstruction.cpp +++ b/Source/Project64-core/N64System/Mips/R4300iInstruction.cpp @@ -199,7 +199,7 @@ void R4300iInstruction::ReadsGPR(uint32_t & Reg1, uint32_t & Reg2) const Reg2 = 0; } -uint32_t R4300iInstruction::WritesGPR(void) const +int32_t R4300iInstruction::WritesGPR(void) const { uint32_t op = m_Instruction.op; if (op == R4300i_SPECIAL) @@ -226,7 +226,7 @@ uint32_t R4300iInstruction::WritesGPR(void) const { return 31; // RA } - return (uint32_t)-1; + return -1; } bool R4300iInstruction::ReadsHI() const diff --git a/Source/Project64-core/N64System/Mips/R4300iInstruction.h b/Source/Project64-core/N64System/Mips/R4300iInstruction.h index 90f3f160e..618b8bdc8 100644 --- a/Source/Project64-core/N64System/Mips/R4300iInstruction.h +++ b/Source/Project64-core/N64System/Mips/R4300iInstruction.h @@ -18,7 +18,7 @@ public: bool HasDelaySlot(void) const; bool DelaySlotEffectsCompare(uint32_t DelayInstruction) const; void ReadsGPR(uint32_t & Reg1, uint32_t & Reg2) const; - uint32_t WritesGPR(void) const; + int32_t WritesGPR(void) const; bool ReadsHI() const; bool ReadsLO() const; bool WritesHI() const; diff --git a/Source/Project64-core/N64System/Recompiler/x86/x86RecompilerOps.cpp b/Source/Project64-core/N64System/Recompiler/x86/x86RecompilerOps.cpp index 9422f6747..5daef0bde 100644 --- a/Source/Project64-core/N64System/Recompiler/x86/x86RecompilerOps.cpp +++ b/Source/Project64-core/N64System/Recompiler/x86/x86RecompilerOps.cpp @@ -9771,7 +9771,7 @@ asmjit::x86::Gp CX86RecompilerOps::BaseOffsetAddress(bool UseBaseRegister) void CX86RecompilerOps::CompileLoadMemoryValue(asmjit::x86::Gp & AddressReg, const asmjit::x86::Gp & ValueReg, const asmjit::x86::Gp & ValueRegHi, uint8_t ValueSize, bool SignExtend) { - if (ValueSize == 32 && m_Instruction.WritesGPR() != 0) + if (ValueSize == 32 && m_Instruction.WritesGPR() > 0) { m_RegWorkingSet.ProtectGPR(m_Opcode.base); m_RegWorkingSet.Map_GPR_32bit(m_Opcode.rt, true, m_Opcode.rt != m_Opcode.base ? -1 : m_Opcode.base);