RSP: Update the size of the skip in the length for DMA
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4dc3e35bb4
commit
5c56f9df83
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@ -51,8 +51,8 @@ bool SPRegistersHandler::Read32(uint32_t Address, uint32_t & Value)
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{
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{
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case 0x04040000: Value = SP_MEM_ADDR_REG; break;
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case 0x04040000: Value = SP_MEM_ADDR_REG; break;
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case 0x04040004: Value = SP_DRAM_ADDR_REG; break;
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case 0x04040004: Value = SP_DRAM_ADDR_REG; break;
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case 0x04040008: Value = SP_RD_LEN_REG; break;
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case 0x04040008: Value = SP_RD_LEN_REG.Value; break;
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case 0x0404000C: Value = SP_WR_LEN_REG; break;
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case 0x0404000C: Value = SP_WR_LEN_REG.Value; break;
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case 0x04040010: Value = SP_STATUS_REG; break;
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case 0x04040010: Value = SP_STATUS_REG; break;
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case 0x04040014: Value = SP_DMA_FULL_REG; break;
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case 0x04040014: Value = SP_DMA_FULL_REG; break;
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case 0x04040018: Value = SP_DMA_BUSY_REG; break;
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case 0x04040018: Value = SP_DMA_BUSY_REG; break;
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@ -178,8 +178,8 @@ void SPRegistersHandler::DmaReadDone(uint32_t /*End*/)
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void SPRegistersHandler::SystemReset(void)
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void SPRegistersHandler::SystemReset(void)
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{
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{
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SP_RD_LEN_REG = 0x00000FF8;
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SP_RD_LEN_REG.Value = 0x00000FF8;
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SP_WR_LEN_REG = 0x00000FF8;
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SP_WR_LEN_REG.Value = 0x00000FF8;
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memset(m_IMEM, 0, sizeof(m_IMEM));
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memset(m_IMEM, 0, sizeof(m_IMEM));
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memset(m_DMEM, 0, sizeof(m_DMEM));
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memset(m_DMEM, 0, sizeof(m_DMEM));
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@ -7,8 +7,8 @@
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RSPRegisterHandler::RSPRegisterHandler(uint32_t * SignalProcessorInterface, uint8_t *& Rdram, const uint32_t & RdramSize, uint8_t * IMEM, uint8_t * DMEM) :
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RSPRegisterHandler::RSPRegisterHandler(uint32_t * SignalProcessorInterface, uint8_t *& Rdram, const uint32_t & RdramSize, uint8_t * IMEM, uint8_t * DMEM) :
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SP_MEM_ADDR_REG(SignalProcessorInterface[0]),
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SP_MEM_ADDR_REG(SignalProcessorInterface[0]),
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SP_DRAM_ADDR_REG(SignalProcessorInterface[1]),
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SP_DRAM_ADDR_REG(SignalProcessorInterface[1]),
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SP_RD_LEN_REG(SignalProcessorInterface[2]),
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SP_RD_LEN_REG((LengthReg &)SignalProcessorInterface[2]),
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SP_WR_LEN_REG(SignalProcessorInterface[3]),
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SP_WR_LEN_REG((LengthReg &)SignalProcessorInterface[3]),
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SP_STATUS_REG(SignalProcessorInterface[4]),
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SP_STATUS_REG(SignalProcessorInterface[4]),
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SP_DMA_FULL_REG(SignalProcessorInterface[5]),
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SP_DMA_FULL_REG(SignalProcessorInterface[5]),
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SP_DMA_BUSY_REG(SignalProcessorInterface[6]),
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SP_DMA_BUSY_REG(SignalProcessorInterface[6]),
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@ -26,8 +26,8 @@ RSPRegisterHandler::RSPRegisterHandler(uint32_t * SignalProcessorInterface, uint
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RSPRegisterHandler::RSPRegisterHandler(_RSP_INFO & RSPInfo, const uint32_t & RdramSize) :
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RSPRegisterHandler::RSPRegisterHandler(_RSP_INFO & RSPInfo, const uint32_t & RdramSize) :
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SP_MEM_ADDR_REG(*RSPInfo.SP_MEM_ADDR_REG),
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SP_MEM_ADDR_REG(*RSPInfo.SP_MEM_ADDR_REG),
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SP_DRAM_ADDR_REG(*RSPInfo.SP_DRAM_ADDR_REG),
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SP_DRAM_ADDR_REG(*RSPInfo.SP_DRAM_ADDR_REG),
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SP_RD_LEN_REG(*RSPInfo.SP_RD_LEN_REG),
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SP_RD_LEN_REG((LengthReg &)*RSPInfo.SP_RD_LEN_REG),
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SP_WR_LEN_REG(*RSPInfo.SP_WR_LEN_REG),
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SP_WR_LEN_REG((LengthReg &)*RSPInfo.SP_WR_LEN_REG),
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SP_STATUS_REG(*RSPInfo.SP_STATUS_REG),
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SP_STATUS_REG(*RSPInfo.SP_STATUS_REG),
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SP_DMA_FULL_REG(*RSPInfo.SP_DMA_FULL_REG),
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SP_DMA_FULL_REG(*RSPInfo.SP_DMA_FULL_REG),
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SP_DMA_BUSY_REG(*RSPInfo.SP_DMA_BUSY_REG),
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SP_DMA_BUSY_REG(*RSPInfo.SP_DMA_BUSY_REG),
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@ -49,9 +49,9 @@ void RSPRegisterHandler::SP_DMA_READ()
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uint8_t * Dest = ((m_PendingSPMemAddr & 0x1000) != 0 ? m_IMEM : m_DMEM);
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uint8_t * Dest = ((m_PendingSPMemAddr & 0x1000) != 0 ? m_IMEM : m_DMEM);
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uint8_t * Source = m_Rdram;
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uint8_t * Source = m_Rdram;
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uint32_t ReadPos = m_PendingSPDramAddr & 0x00FFFFF8;
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uint32_t ReadPos = m_PendingSPDramAddr & 0x00FFFFF8;
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int32_t Length = ((SP_RD_LEN_REG & 0xFFF) | 7) + 1;
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int32_t Length = (SP_RD_LEN_REG.Length | 7) + 1;
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int32_t Count = ((SP_RD_LEN_REG >> 12) & 0xFF) + 1;
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int32_t Count = SP_RD_LEN_REG.Count + 1;
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int32_t Skip = (SP_RD_LEN_REG >> 20) & 0xF8;
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int32_t Skip = SP_RD_LEN_REG.Skip & 0xFF8;
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int32_t Pos = (m_PendingSPMemAddr & 0x0FF8);
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int32_t Pos = (m_PendingSPMemAddr & 0x0FF8);
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for (int32_t i = 0; i < Count; i++)
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for (int32_t i = 0; i < Count; i++)
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@ -129,8 +129,8 @@ void RSPRegisterHandler::SP_DMA_READ()
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SP_MEM_ADDR_REG = (Pos & 0xFFF) | (m_PendingSPMemAddr & 0x1000);
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SP_MEM_ADDR_REG = (Pos & 0xFFF) | (m_PendingSPMemAddr & 0x1000);
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SP_DRAM_ADDR_REG = ReadPos;
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SP_DRAM_ADDR_REG = ReadPos;
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SP_RD_LEN_REG = (SP_RD_LEN_REG & 0xFF800000) | 0x00000FF8;
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SP_RD_LEN_REG.Value = (SP_RD_LEN_REG.Value & 0xFF800000) | 0x00000FF8;
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SP_WR_LEN_REG = (SP_RD_LEN_REG & 0xFF800000) | 0x00000FF8;
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SP_WR_LEN_REG.Value = (SP_WR_LEN_REG.Value & 0xFF800000) | 0x00000FF8;
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DmaReadDone(Pos);
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DmaReadDone(Pos);
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}
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}
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@ -141,9 +141,9 @@ void RSPRegisterHandler::SP_DMA_WRITE()
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uint8_t * Source = ((m_PendingSPMemAddr & 0x1000) != 0 ? m_IMEM : m_DMEM);
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uint8_t * Source = ((m_PendingSPMemAddr & 0x1000) != 0 ? m_IMEM : m_DMEM);
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uint8_t * Dest = m_Rdram;
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uint8_t * Dest = m_Rdram;
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uint32_t WritePos = m_PendingSPDramAddr & 0x00FFFFF8;
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uint32_t WritePos = m_PendingSPDramAddr & 0x00FFFFF8;
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int32_t Length = ((SP_WR_LEN_REG & 0xFFF) | 7) + 1;
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int32_t Length = (SP_WR_LEN_REG.Length | 7) + 1;
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int32_t Count = ((SP_WR_LEN_REG >> 12) & 0xFF) + 1;
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int32_t Count = SP_WR_LEN_REG.Count + 1;
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int32_t Skip = (SP_WR_LEN_REG >> 20) & 0xF8;
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int32_t Skip = SP_WR_LEN_REG.Skip & 0xFF8;
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int32_t Pos = (m_PendingSPMemAddr & 0x0FF8);
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int32_t Pos = (m_PendingSPMemAddr & 0x0FF8);
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for (int32_t i = 0; i < Count; i++)
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for (int32_t i = 0; i < Count; i++)
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@ -201,8 +201,8 @@ void RSPRegisterHandler::SP_DMA_WRITE()
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SP_MEM_ADDR_REG = (Pos & 0xFFF) | (m_PendingSPMemAddr & 0x1000);
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SP_MEM_ADDR_REG = (Pos & 0xFFF) | (m_PendingSPMemAddr & 0x1000);
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SP_DRAM_ADDR_REG = WritePos;
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SP_DRAM_ADDR_REG = WritePos;
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SP_RD_LEN_REG = (SP_WR_LEN_REG & 0xFF800000) | 0x00000FF8;
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SP_RD_LEN_REG.Value = (SP_RD_LEN_REG.Value & 0xFF800000) | 0x00000FF8;
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SP_WR_LEN_REG = (SP_WR_LEN_REG & 0xFF800000) | 0x00000FF8;
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SP_WR_LEN_REG.Value = (SP_WR_LEN_REG.Value & 0xFF800000) | 0x00000FF8;
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}
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}
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uint32_t RSPRegisterHandler::ReadReg(RSPRegister Reg)
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uint32_t RSPRegisterHandler::ReadReg(RSPRegister Reg)
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@ -211,8 +211,8 @@ uint32_t RSPRegisterHandler::ReadReg(RSPRegister Reg)
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{
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{
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case RSPRegister_MEM_ADDR: return SP_MEM_ADDR_REG;
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case RSPRegister_MEM_ADDR: return SP_MEM_ADDR_REG;
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case RSPRegister_DRAM_ADDR: return SP_DRAM_ADDR_REG;
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case RSPRegister_DRAM_ADDR: return SP_DRAM_ADDR_REG;
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case RSPRegister_RD_LEN: return SP_RD_LEN_REG;
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case RSPRegister_RD_LEN: return SP_RD_LEN_REG.Value;
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case RSPRegister_WR_LEN: return SP_WR_LEN_REG;
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case RSPRegister_WR_LEN: return SP_WR_LEN_REG.Value;
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case RSPRegister_STATUS: return SP_STATUS_REG;
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case RSPRegister_STATUS: return SP_STATUS_REG;
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}
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}
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return 0;
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return 0;
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@ -225,11 +225,11 @@ void RSPRegisterHandler::WriteReg(RSPRegister Reg, uint32_t Value)
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case RSPRegister_MEM_ADDR: m_PendingSPMemAddr = Value; break;
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case RSPRegister_MEM_ADDR: m_PendingSPMemAddr = Value; break;
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case RSPRegister_DRAM_ADDR: m_PendingSPDramAddr = Value; break;
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case RSPRegister_DRAM_ADDR: m_PendingSPDramAddr = Value; break;
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case RSPRegister_RD_LEN:
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case RSPRegister_RD_LEN:
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SP_RD_LEN_REG = Value;
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SP_RD_LEN_REG.Value = Value;
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SP_DMA_READ();
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SP_DMA_READ();
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break;
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break;
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case RSPRegister_WR_LEN:
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case RSPRegister_WR_LEN:
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SP_WR_LEN_REG = Value;
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SP_WR_LEN_REG.Value = Value;
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SP_DMA_WRITE();
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SP_DMA_WRITE();
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break;
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break;
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case RSPRegister_STATUS:
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case RSPRegister_STATUS:
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@ -16,6 +16,21 @@ struct _RSP_INFO;
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class RSPRegisterHandler
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class RSPRegisterHandler
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{
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{
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#pragma warning(push)
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#pragma warning(disable : 4201) // Non-standard extension used: nameless struct/union
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union LengthReg
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{
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uint32_t Value;
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struct
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{
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unsigned Length : 12;
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unsigned Count : 8;
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unsigned Skip : 12;
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};
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};
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#pragma warning(pop)
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public:
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public:
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RSPRegisterHandler(uint32_t * SignalProcessorInterface, uint8_t *& Rdram, const uint32_t & RdramSize, uint8_t * IMEM, uint8_t * DMEM);
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RSPRegisterHandler(uint32_t * SignalProcessorInterface, uint8_t *& Rdram, const uint32_t & RdramSize, uint8_t * IMEM, uint8_t * DMEM);
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RSPRegisterHandler(_RSP_INFO & RSPInfo, const uint32_t & RdramSize);
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RSPRegisterHandler(_RSP_INFO & RSPInfo, const uint32_t & RdramSize);
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@ -34,8 +49,8 @@ protected:
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uint32_t & SP_MEM_ADDR_REG;
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uint32_t & SP_MEM_ADDR_REG;
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uint32_t & SP_DRAM_ADDR_REG;
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uint32_t & SP_DRAM_ADDR_REG;
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uint32_t & SP_RD_LEN_REG;
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LengthReg & SP_RD_LEN_REG;
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uint32_t & SP_WR_LEN_REG;
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LengthReg & SP_WR_LEN_REG;
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uint32_t & SP_STATUS_REG;
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uint32_t & SP_STATUS_REG;
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uint32_t & SP_DMA_FULL_REG;
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uint32_t & SP_DMA_FULL_REG;
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uint32_t & SP_DMA_BUSY_REG;
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uint32_t & SP_DMA_BUSY_REG;
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