RSP: Update the size of the skip in the length for DMA

This commit is contained in:
zilmar 2024-01-11 17:50:23 +10:30
parent 4dc3e35bb4
commit 5c56f9df83
3 changed files with 39 additions and 24 deletions

View File

@ -51,8 +51,8 @@ bool SPRegistersHandler::Read32(uint32_t Address, uint32_t & Value)
{ {
case 0x04040000: Value = SP_MEM_ADDR_REG; break; case 0x04040000: Value = SP_MEM_ADDR_REG; break;
case 0x04040004: Value = SP_DRAM_ADDR_REG; break; case 0x04040004: Value = SP_DRAM_ADDR_REG; break;
case 0x04040008: Value = SP_RD_LEN_REG; break; case 0x04040008: Value = SP_RD_LEN_REG.Value; break;
case 0x0404000C: Value = SP_WR_LEN_REG; break; case 0x0404000C: Value = SP_WR_LEN_REG.Value; break;
case 0x04040010: Value = SP_STATUS_REG; break; case 0x04040010: Value = SP_STATUS_REG; break;
case 0x04040014: Value = SP_DMA_FULL_REG; break; case 0x04040014: Value = SP_DMA_FULL_REG; break;
case 0x04040018: Value = SP_DMA_BUSY_REG; break; case 0x04040018: Value = SP_DMA_BUSY_REG; break;
@ -178,8 +178,8 @@ void SPRegistersHandler::DmaReadDone(uint32_t /*End*/)
void SPRegistersHandler::SystemReset(void) void SPRegistersHandler::SystemReset(void)
{ {
SP_RD_LEN_REG = 0x00000FF8; SP_RD_LEN_REG.Value = 0x00000FF8;
SP_WR_LEN_REG = 0x00000FF8; SP_WR_LEN_REG.Value = 0x00000FF8;
memset(m_IMEM, 0, sizeof(m_IMEM)); memset(m_IMEM, 0, sizeof(m_IMEM));
memset(m_DMEM, 0, sizeof(m_DMEM)); memset(m_DMEM, 0, sizeof(m_DMEM));

View File

@ -7,8 +7,8 @@
RSPRegisterHandler::RSPRegisterHandler(uint32_t * SignalProcessorInterface, uint8_t *& Rdram, const uint32_t & RdramSize, uint8_t * IMEM, uint8_t * DMEM) : RSPRegisterHandler::RSPRegisterHandler(uint32_t * SignalProcessorInterface, uint8_t *& Rdram, const uint32_t & RdramSize, uint8_t * IMEM, uint8_t * DMEM) :
SP_MEM_ADDR_REG(SignalProcessorInterface[0]), SP_MEM_ADDR_REG(SignalProcessorInterface[0]),
SP_DRAM_ADDR_REG(SignalProcessorInterface[1]), SP_DRAM_ADDR_REG(SignalProcessorInterface[1]),
SP_RD_LEN_REG(SignalProcessorInterface[2]), SP_RD_LEN_REG((LengthReg &)SignalProcessorInterface[2]),
SP_WR_LEN_REG(SignalProcessorInterface[3]), SP_WR_LEN_REG((LengthReg &)SignalProcessorInterface[3]),
SP_STATUS_REG(SignalProcessorInterface[4]), SP_STATUS_REG(SignalProcessorInterface[4]),
SP_DMA_FULL_REG(SignalProcessorInterface[5]), SP_DMA_FULL_REG(SignalProcessorInterface[5]),
SP_DMA_BUSY_REG(SignalProcessorInterface[6]), SP_DMA_BUSY_REG(SignalProcessorInterface[6]),
@ -26,8 +26,8 @@ RSPRegisterHandler::RSPRegisterHandler(uint32_t * SignalProcessorInterface, uint
RSPRegisterHandler::RSPRegisterHandler(_RSP_INFO & RSPInfo, const uint32_t & RdramSize) : RSPRegisterHandler::RSPRegisterHandler(_RSP_INFO & RSPInfo, const uint32_t & RdramSize) :
SP_MEM_ADDR_REG(*RSPInfo.SP_MEM_ADDR_REG), SP_MEM_ADDR_REG(*RSPInfo.SP_MEM_ADDR_REG),
SP_DRAM_ADDR_REG(*RSPInfo.SP_DRAM_ADDR_REG), SP_DRAM_ADDR_REG(*RSPInfo.SP_DRAM_ADDR_REG),
SP_RD_LEN_REG(*RSPInfo.SP_RD_LEN_REG), SP_RD_LEN_REG((LengthReg &)*RSPInfo.SP_RD_LEN_REG),
SP_WR_LEN_REG(*RSPInfo.SP_WR_LEN_REG), SP_WR_LEN_REG((LengthReg &)*RSPInfo.SP_WR_LEN_REG),
SP_STATUS_REG(*RSPInfo.SP_STATUS_REG), SP_STATUS_REG(*RSPInfo.SP_STATUS_REG),
SP_DMA_FULL_REG(*RSPInfo.SP_DMA_FULL_REG), SP_DMA_FULL_REG(*RSPInfo.SP_DMA_FULL_REG),
SP_DMA_BUSY_REG(*RSPInfo.SP_DMA_BUSY_REG), SP_DMA_BUSY_REG(*RSPInfo.SP_DMA_BUSY_REG),
@ -49,9 +49,9 @@ void RSPRegisterHandler::SP_DMA_READ()
uint8_t * Dest = ((m_PendingSPMemAddr & 0x1000) != 0 ? m_IMEM : m_DMEM); uint8_t * Dest = ((m_PendingSPMemAddr & 0x1000) != 0 ? m_IMEM : m_DMEM);
uint8_t * Source = m_Rdram; uint8_t * Source = m_Rdram;
uint32_t ReadPos = m_PendingSPDramAddr & 0x00FFFFF8; uint32_t ReadPos = m_PendingSPDramAddr & 0x00FFFFF8;
int32_t Length = ((SP_RD_LEN_REG & 0xFFF) | 7) + 1; int32_t Length = (SP_RD_LEN_REG.Length | 7) + 1;
int32_t Count = ((SP_RD_LEN_REG >> 12) & 0xFF) + 1; int32_t Count = SP_RD_LEN_REG.Count + 1;
int32_t Skip = (SP_RD_LEN_REG >> 20) & 0xF8; int32_t Skip = SP_RD_LEN_REG.Skip & 0xFF8;
int32_t Pos = (m_PendingSPMemAddr & 0x0FF8); int32_t Pos = (m_PendingSPMemAddr & 0x0FF8);
for (int32_t i = 0; i < Count; i++) for (int32_t i = 0; i < Count; i++)
@ -129,8 +129,8 @@ void RSPRegisterHandler::SP_DMA_READ()
SP_MEM_ADDR_REG = (Pos & 0xFFF) | (m_PendingSPMemAddr & 0x1000); SP_MEM_ADDR_REG = (Pos & 0xFFF) | (m_PendingSPMemAddr & 0x1000);
SP_DRAM_ADDR_REG = ReadPos; SP_DRAM_ADDR_REG = ReadPos;
SP_RD_LEN_REG = (SP_RD_LEN_REG & 0xFF800000) | 0x00000FF8; SP_RD_LEN_REG.Value = (SP_RD_LEN_REG.Value & 0xFF800000) | 0x00000FF8;
SP_WR_LEN_REG = (SP_RD_LEN_REG & 0xFF800000) | 0x00000FF8; SP_WR_LEN_REG.Value = (SP_WR_LEN_REG.Value & 0xFF800000) | 0x00000FF8;
DmaReadDone(Pos); DmaReadDone(Pos);
} }
@ -141,9 +141,9 @@ void RSPRegisterHandler::SP_DMA_WRITE()
uint8_t * Source = ((m_PendingSPMemAddr & 0x1000) != 0 ? m_IMEM : m_DMEM); uint8_t * Source = ((m_PendingSPMemAddr & 0x1000) != 0 ? m_IMEM : m_DMEM);
uint8_t * Dest = m_Rdram; uint8_t * Dest = m_Rdram;
uint32_t WritePos = m_PendingSPDramAddr & 0x00FFFFF8; uint32_t WritePos = m_PendingSPDramAddr & 0x00FFFFF8;
int32_t Length = ((SP_WR_LEN_REG & 0xFFF) | 7) + 1; int32_t Length = (SP_WR_LEN_REG.Length | 7) + 1;
int32_t Count = ((SP_WR_LEN_REG >> 12) & 0xFF) + 1; int32_t Count = SP_WR_LEN_REG.Count + 1;
int32_t Skip = (SP_WR_LEN_REG >> 20) & 0xF8; int32_t Skip = SP_WR_LEN_REG.Skip & 0xFF8;
int32_t Pos = (m_PendingSPMemAddr & 0x0FF8); int32_t Pos = (m_PendingSPMemAddr & 0x0FF8);
for (int32_t i = 0; i < Count; i++) for (int32_t i = 0; i < Count; i++)
@ -201,8 +201,8 @@ void RSPRegisterHandler::SP_DMA_WRITE()
SP_MEM_ADDR_REG = (Pos & 0xFFF) | (m_PendingSPMemAddr & 0x1000); SP_MEM_ADDR_REG = (Pos & 0xFFF) | (m_PendingSPMemAddr & 0x1000);
SP_DRAM_ADDR_REG = WritePos; SP_DRAM_ADDR_REG = WritePos;
SP_RD_LEN_REG = (SP_WR_LEN_REG & 0xFF800000) | 0x00000FF8; SP_RD_LEN_REG.Value = (SP_RD_LEN_REG.Value & 0xFF800000) | 0x00000FF8;
SP_WR_LEN_REG = (SP_WR_LEN_REG & 0xFF800000) | 0x00000FF8; SP_WR_LEN_REG.Value = (SP_WR_LEN_REG.Value & 0xFF800000) | 0x00000FF8;
} }
uint32_t RSPRegisterHandler::ReadReg(RSPRegister Reg) uint32_t RSPRegisterHandler::ReadReg(RSPRegister Reg)
@ -211,8 +211,8 @@ uint32_t RSPRegisterHandler::ReadReg(RSPRegister Reg)
{ {
case RSPRegister_MEM_ADDR: return SP_MEM_ADDR_REG; case RSPRegister_MEM_ADDR: return SP_MEM_ADDR_REG;
case RSPRegister_DRAM_ADDR: return SP_DRAM_ADDR_REG; case RSPRegister_DRAM_ADDR: return SP_DRAM_ADDR_REG;
case RSPRegister_RD_LEN: return SP_RD_LEN_REG; case RSPRegister_RD_LEN: return SP_RD_LEN_REG.Value;
case RSPRegister_WR_LEN: return SP_WR_LEN_REG; case RSPRegister_WR_LEN: return SP_WR_LEN_REG.Value;
case RSPRegister_STATUS: return SP_STATUS_REG; case RSPRegister_STATUS: return SP_STATUS_REG;
} }
return 0; return 0;
@ -225,11 +225,11 @@ void RSPRegisterHandler::WriteReg(RSPRegister Reg, uint32_t Value)
case RSPRegister_MEM_ADDR: m_PendingSPMemAddr = Value; break; case RSPRegister_MEM_ADDR: m_PendingSPMemAddr = Value; break;
case RSPRegister_DRAM_ADDR: m_PendingSPDramAddr = Value; break; case RSPRegister_DRAM_ADDR: m_PendingSPDramAddr = Value; break;
case RSPRegister_RD_LEN: case RSPRegister_RD_LEN:
SP_RD_LEN_REG = Value; SP_RD_LEN_REG.Value = Value;
SP_DMA_READ(); SP_DMA_READ();
break; break;
case RSPRegister_WR_LEN: case RSPRegister_WR_LEN:
SP_WR_LEN_REG = Value; SP_WR_LEN_REG.Value = Value;
SP_DMA_WRITE(); SP_DMA_WRITE();
break; break;
case RSPRegister_STATUS: case RSPRegister_STATUS:

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@ -16,6 +16,21 @@ struct _RSP_INFO;
class RSPRegisterHandler class RSPRegisterHandler
{ {
#pragma warning(push)
#pragma warning(disable : 4201) // Non-standard extension used: nameless struct/union
union LengthReg
{
uint32_t Value;
struct
{
unsigned Length : 12;
unsigned Count : 8;
unsigned Skip : 12;
};
};
#pragma warning(pop)
public: public:
RSPRegisterHandler(uint32_t * SignalProcessorInterface, uint8_t *& Rdram, const uint32_t & RdramSize, uint8_t * IMEM, uint8_t * DMEM); RSPRegisterHandler(uint32_t * SignalProcessorInterface, uint8_t *& Rdram, const uint32_t & RdramSize, uint8_t * IMEM, uint8_t * DMEM);
RSPRegisterHandler(_RSP_INFO & RSPInfo, const uint32_t & RdramSize); RSPRegisterHandler(_RSP_INFO & RSPInfo, const uint32_t & RdramSize);
@ -34,8 +49,8 @@ protected:
uint32_t & SP_MEM_ADDR_REG; uint32_t & SP_MEM_ADDR_REG;
uint32_t & SP_DRAM_ADDR_REG; uint32_t & SP_DRAM_ADDR_REG;
uint32_t & SP_RD_LEN_REG; LengthReg & SP_RD_LEN_REG;
uint32_t & SP_WR_LEN_REG; LengthReg & SP_WR_LEN_REG;
uint32_t & SP_STATUS_REG; uint32_t & SP_STATUS_REG;
uint32_t & SP_DMA_FULL_REG; uint32_t & SP_DMA_FULL_REG;
uint32_t & SP_DMA_BUSY_REG; uint32_t & SP_DMA_BUSY_REG;