diff --git a/Source/Project64-core/N64System/Recompiler/x86/x86RecompilerOps.cpp b/Source/Project64-core/N64System/Recompiler/x86/x86RecompilerOps.cpp
index 314cf0fcc..6974e0090 100644
--- a/Source/Project64-core/N64System/Recompiler/x86/x86RecompilerOps.cpp
+++ b/Source/Project64-core/N64System/Recompiler/x86/x86RecompilerOps.cpp
@@ -10445,7 +10445,7 @@ void CX86RecompilerOps::COP1_S_Opcode(void (CX86Ops::*Instruction)(void))
     }
     asmjit::x86::Gp TempReg = m_RegWorkingSet.FPRValuePointer(m_Opcode.fs, CRegInfo::FPU_FloatLow);
     CompileCheckFPUInput(TempReg, FpuOpSize_32bit);
-    m_RegWorkingSet.PrepareFPTopToBe(m_Opcode.fd, m_Opcode.fs, CRegInfo::FPU_Float);
+    m_RegWorkingSet.PrepareFPTopToBe(m_Opcode.fd, m_Opcode.fs, CRegInfo::FPU_FloatLow);
     (m_Assembler.*Instruction)();
     m_RegWorkingSet.SetX86Protected(GetIndexFromX86Reg(TempReg), false);
     CompileCheckFPUResult32(m_Opcode.fd);
@@ -10465,9 +10465,9 @@ void CX86RecompilerOps::COP1_S_Opcode(void (CX86Ops::*Instruction)(const asmjit:
     asmjit::x86::Gp TempReg = m_RegWorkingSet.FPRValuePointer(m_Opcode.fs, CRegInfo::FPU_Float);
     CompileCheckFPUInput(TempReg, FpuOpSize_32bit);
     m_RegWorkingSet.SetX86Protected(GetIndexFromX86Reg(TempReg), false);
-    TempReg = m_RegWorkingSet.FPRValuePointer(m_Opcode.ft, CRegInfo::FPU_Float);
+    TempReg = m_RegWorkingSet.FPRValuePointer(m_Opcode.ft, CRegInfo::FPU_Dword);
     CompileCheckFPUInput(TempReg, FpuOpSize_32bit);
-    m_RegWorkingSet.PrepareFPTopToBe(m_Opcode.fd, m_Opcode.fs, CRegInfo::FPU_Float);
+    m_RegWorkingSet.PrepareFPTopToBe(m_Opcode.fd, m_Opcode.fs, CRegInfo::FPU_FloatLow);
     (m_Assembler.*Instruction)(asmjit::x86::dword_ptr(TempReg));
     m_RegWorkingSet.SetX86Protected(GetIndexFromX86Reg(TempReg), false);
     CompileCheckFPUResult32(m_Opcode.fd);
diff --git a/Source/Project64-core/N64System/Recompiler/x86/x86RegInfo.cpp b/Source/Project64-core/N64System/Recompiler/x86/x86RegInfo.cpp
index a33a32974..e2c895d66 100644
--- a/Source/Project64-core/N64System/Recompiler/x86/x86RegInfo.cpp
+++ b/Source/Project64-core/N64System/Recompiler/x86/x86RegInfo.cpp
@@ -1258,7 +1258,10 @@ void CX86RegInfo::PrepareFPTopToBe(int32_t Reg, int32_t RegToLoad, FPU_STATE For
             break;
         case FPU_Float:
             m_Assembler.MoveVariableToX86reg(TempReg, &g_Reg->m_FPR_S[RegToLoad], stdstr_f("m_FPR_S[%d]", RegToLoad).c_str());
-            //CompileCheckFPUInput32(TempReg);
+            m_Assembler.fpuLoadDwordFromX86Reg(StackTopPos(), TempReg);
+            break;        
+        case FPU_FloatLow:
+            m_Assembler.MoveVariableToX86reg(TempReg, &g_Reg->m_FPR_S_L[RegToLoad], stdstr_f("m_FPR_S_L[%d]", RegToLoad).c_str());
             m_Assembler.fpuLoadDwordFromX86Reg(StackTopPos(), TempReg);
             break;
         case FPU_Double:
@@ -1388,6 +1391,7 @@ void CX86RegInfo::UnMap_FPR(int32_t Reg, bool WriteBackValue)
                 m_Assembler.fpuStoreIntegerQwordFromX86Reg(StackTopPos(), TempReg, true);
                 break;
             case FPU_Float:
+            case FPU_FloatLow:
                 m_Assembler.MoveVariableToX86reg(TempReg, &m_Reg.m_FPR_UDW[m_x86fpu_MappedTo[StackTopPos()]], stdstr_f("m_FPR_UDW[%d]", m_x86fpu_MappedTo[StackTopPos()]).c_str());
                 m_Assembler.fpuStoreDwordFromX86Reg(StackTopPos(), TempReg, true);
                 m_Assembler.mov(asmjit::x86::dword_ptr(TempReg, 4), 0);
@@ -1400,6 +1404,7 @@ void CX86RegInfo::UnMap_FPR(int32_t Reg, bool WriteBackValue)
                 if (HaveDebugger())
                 {
                     g_Notify->DisplayError(stdstr_f("%s\nUnknown format to load %d", __FUNCTION__, m_x86fpu_State[StackTopPos()]).c_str());
+                    g_Notify->BreakPoint(__FILE__, __LINE__);
                 }
             }
             SetX86Protected(GetIndexFromX86Reg(TempReg), false);