Core: With CONST64 CX86RegInfo::WriteBackRegisters might not write the high 32bit correct

This commit is contained in:
zilmar 2024-11-28 11:39:41 +10:30
parent d5367d9291
commit 52d904702f
2 changed files with 5 additions and 5 deletions

View File

@ -10155,7 +10155,7 @@ void CX86RecompilerOps::CompileStoreMemoryValue(asmjit::x86::Gp AddressReg, cons
m_Assembler.MoveConstToVariable(&g_System->m_PipelineStage, "g_System->m_PipelineStage", PIPELINE_STAGE_NORMAL); m_Assembler.MoveConstToVariable(&g_System->m_PipelineStage, "g_System->m_PipelineStage", PIPELINE_STAGE_NORMAL);
} }
MemoryWriteDone = m_Assembler.newLabel(); MemoryWriteDone = m_Assembler.newLabel();
m_Assembler.JmpLabel(stdstr_f("MemoryWrite_%X_Done:", m_CompilePC).c_str(), MemoryWriteDone); m_Assembler.JmpLabel(stdstr_f("MemoryWrite_%X_Done", m_CompilePC).c_str(), MemoryWriteDone);
} }
else if (ValueSize == 16) else if (ValueSize == 16)
{ {
@ -10182,7 +10182,7 @@ void CX86RecompilerOps::CompileStoreMemoryValue(asmjit::x86::Gp AddressReg, cons
m_Assembler.MoveConstToVariable(&g_System->m_PipelineStage, "g_System->m_PipelineStage", PIPELINE_STAGE_NORMAL); m_Assembler.MoveConstToVariable(&g_System->m_PipelineStage, "g_System->m_PipelineStage", PIPELINE_STAGE_NORMAL);
} }
MemoryWriteDone = m_Assembler.newLabel(); MemoryWriteDone = m_Assembler.newLabel();
m_Assembler.JmpLabel(stdstr_f("MemoryWrite_%X_Done:", m_CompilePC).c_str(), MemoryWriteDone); m_Assembler.JmpLabel(stdstr_f("MemoryWrite_%X_Done", m_CompilePC).c_str(), MemoryWriteDone);
} }
else if (ValueSize == 32) else if (ValueSize == 32)
{ {
@ -10212,7 +10212,7 @@ void CX86RecompilerOps::CompileStoreMemoryValue(asmjit::x86::Gp AddressReg, cons
m_Assembler.MoveConstToVariable(&g_System->m_PipelineStage, "g_System->m_PipelineStage", PIPELINE_STAGE_NORMAL); m_Assembler.MoveConstToVariable(&g_System->m_PipelineStage, "g_System->m_PipelineStage", PIPELINE_STAGE_NORMAL);
} }
MemoryWriteDone = m_Assembler.newLabel(); MemoryWriteDone = m_Assembler.newLabel();
m_Assembler.JmpLabel(stdstr_f("MemoryWrite_%X_Done:", m_CompilePC).c_str(), MemoryWriteDone); m_Assembler.JmpLabel(stdstr_f("MemoryWrite_%X_Done", m_CompilePC).c_str(), MemoryWriteDone);
} }
else if (ValueSize == 64) else if (ValueSize == 64)
{ {
@ -10241,7 +10241,7 @@ void CX86RecompilerOps::CompileStoreMemoryValue(asmjit::x86::Gp AddressReg, cons
m_Assembler.MoveConstToVariable(&g_System->m_PipelineStage, "g_System->m_PipelineStage", PIPELINE_STAGE_NORMAL); m_Assembler.MoveConstToVariable(&g_System->m_PipelineStage, "g_System->m_PipelineStage", PIPELINE_STAGE_NORMAL);
} }
MemoryWriteDone = m_Assembler.newLabel(); MemoryWriteDone = m_Assembler.newLabel();
m_Assembler.JmpLabel(stdstr_f("MemoryWrite_%X_Done:", m_CompilePC).c_str(), MemoryWriteDone); m_Assembler.JmpLabel(stdstr_f("MemoryWrite_%X_Done", m_CompilePC).c_str(), MemoryWriteDone);
} }
else else
{ {

View File

@ -1763,7 +1763,7 @@ void CX86RegInfo::WriteBackRegisters()
{ {
m_Assembler.MoveX86regToVariable(&m_Reg.m_GPR[count].UW[1], CRegName::GPR_Hi[count], asmjit::x86::edi); m_Assembler.MoveX86regToVariable(&m_Reg.m_GPR[count].UW[1], CRegName::GPR_Hi[count], asmjit::x86::edi);
} }
else if (GetMipsRegLo(count) == 0xFFFFFFFF) else if (GetMipsRegHi(count) == 0xFFFFFFFF)
{ {
m_Assembler.MoveX86regToVariable(&m_Reg.m_GPR[count].UW[1], CRegName::GPR_Hi[count], asmjit::x86::esi); m_Assembler.MoveX86regToVariable(&m_Reg.m_GPR[count].UW[1], CRegName::GPR_Hi[count], asmjit::x86::esi);
} }