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cleaned up warnings (warning level 4) in Reg Info.cpp

This commit is contained in:
zilmar 2012-10-05 06:28:59 +10:00
parent ce7eba58c6
commit 523b1eb3ff
2 changed files with 23 additions and 28 deletions
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47
Source/Project64/N64 System/Recompiler/Reg Info.cpp
View File

@ -80,7 +80,7 @@ void CRegInfo::ChangeFPURegFormat (int Reg, FPU_STATE OldFormat, FPU_STATE NewFo
{ {
for (DWORD i = 0; i < 8; i++) for (DWORD i = 0; i < 8; i++)
{ {
if (x86fpu_MappedTo[i] != (DWORD)Reg) if (x86fpu_MappedTo[i] != Reg)
{ {
continue; continue;
} }
@ -120,7 +120,7 @@ void CRegInfo::Load_FPR_ToTop ( int Reg, int RegToLoad, FPU_STATE Format)
} else { } else {
if ((Reg & 1) != 0) { if ((Reg & 1) != 0) {
for (i = 0; i < 8; i++) { for (i = 0; i < 8; i++) {
if (x86fpu_MappedTo[i] == (DWORD)(Reg - 1)) { if (x86fpu_MappedTo[i] == (Reg - 1)) {
if (x86fpu_State[i] == FPU_Double || x86fpu_State[i] == FPU_Qword) { if (x86fpu_State[i] == FPU_Double || x86fpu_State[i] == FPU_Qword) {
UnMap_FPR(Reg,TRUE); UnMap_FPR(Reg,TRUE);
} }
@ -130,7 +130,7 @@ void CRegInfo::Load_FPR_ToTop ( int Reg, int RegToLoad, FPU_STATE Format)
} }
if ((RegToLoad & 1) != 0) { if ((RegToLoad & 1) != 0) {
for (i = 0; i < 8; i++) { for (i = 0; i < 8; i++) {
if (x86fpu_MappedTo[i] == (DWORD)(RegToLoad - 1)) { if (x86fpu_MappedTo[i] == (RegToLoad - 1)) {
if (x86fpu_State[i] == FPU_Double || x86fpu_State[i] == FPU_Qword) { if (x86fpu_State[i] == FPU_Double || x86fpu_State[i] == FPU_Qword) {
UnMap_FPR(RegToLoad,TRUE); UnMap_FPR(RegToLoad,TRUE);
} }
@ -143,11 +143,11 @@ void CRegInfo::Load_FPR_ToTop ( int Reg, int RegToLoad, FPU_STATE Format)
if (Reg == RegToLoad) { if (Reg == RegToLoad) {
//if different format then unmap original reg from stack //if different format then unmap original reg from stack
for (i = 0; i < 8; i++) { for (i = 0; i < 8; i++) {
if (x86fpu_MappedTo[i] != (DWORD)Reg) if (x86fpu_MappedTo[i] != Reg)
{ {
continue; continue;
} }
if (x86fpu_State[i] != (DWORD)Format) { if (x86fpu_State[i] != Format) {
UnMap_FPR(Reg,TRUE); UnMap_FPR(Reg,TRUE);
} }
break; break;
@ -156,18 +156,18 @@ void CRegInfo::Load_FPR_ToTop ( int Reg, int RegToLoad, FPU_STATE Format)
//if different format then unmap original reg from stack //if different format then unmap original reg from stack
for (i = 0; i < 8; i++) for (i = 0; i < 8; i++)
{ {
if (x86fpu_MappedTo[i] != (DWORD)Reg) if (x86fpu_MappedTo[i] != Reg)
{ {
continue; continue;
} }
UnMap_FPR(Reg,x86fpu_State[i] != (DWORD)Format); UnMap_FPR(Reg,x86fpu_State[i] != Format);
break; break;
} }
} }
if (RegInStack(RegToLoad,Format)) { if (RegInStack(RegToLoad,Format)) {
if (Reg != RegToLoad) { if (Reg != RegToLoad) {
if (x86fpu_MappedTo[(StackTopPos() - 1) & 7] != (DWORD)RegToLoad) { if (x86fpu_MappedTo[(StackTopPos() - 1) & 7] != RegToLoad) {
UnMap_FPR(x86fpu_MappedTo[(StackTopPos() - 1) & 7],TRUE); UnMap_FPR(x86fpu_MappedTo[(StackTopPos() - 1) & 7],TRUE);
CPU_Message(" regcache: allocate ST(0) to %s", CRegName::FPR[Reg]); CPU_Message(" regcache: allocate ST(0) to %s", CRegName::FPR[Reg]);
fpuLoadReg(&StackTopPos(),StackPosition(RegToLoad)); fpuLoadReg(&StackTopPos(),StackPosition(RegToLoad));
@ -180,11 +180,9 @@ void CRegInfo::Load_FPR_ToTop ( int Reg, int RegToLoad, FPU_STATE Format)
Load_FPR_ToTop (Reg, RegToLoad, Format); Load_FPR_ToTop (Reg, RegToLoad, Format);
} }
} else { } else {
x86FpuValues RegPos, StackPos; x86FpuValues RegPos = x86_ST_Unknown;
DWORD i; for (DWORD i = 0; i < 8; i++) {
if (x86fpu_MappedTo[i] == Reg) {
for (i = 0; i < 8; i++) {
if (x86fpu_MappedTo[i] == (DWORD)Reg) {
RegPos = (x86FpuValues)i; RegPos = (x86FpuValues)i;
i = 8; i = 8;
} }
@ -193,7 +191,7 @@ void CRegInfo::Load_FPR_ToTop ( int Reg, int RegToLoad, FPU_STATE Format)
if (RegPos == StackTopPos()) { if (RegPos == StackTopPos()) {
return; return;
} }
StackPos = StackPosition(Reg); x86FpuValues StackPos = StackPosition(Reg);
FpuRoundingModel(RegPos) = FpuRoundingModel(StackTopPos()); FpuRoundingModel(RegPos) = FpuRoundingModel(StackTopPos());
x86fpu_MappedTo[RegPos] = x86fpu_MappedTo[StackTopPos()]; x86fpu_MappedTo[RegPos] = x86fpu_MappedTo[StackTopPos()];
@ -215,7 +213,7 @@ void CRegInfo::Load_FPR_ToTop ( int Reg, int RegToLoad, FPU_STATE Format)
UnMap_FPR(x86fpu_MappedTo[(StackTopPos() - 1) & 7],TRUE); UnMap_FPR(x86fpu_MappedTo[(StackTopPos() - 1) & 7],TRUE);
for (i = 0; i < 8; i++) { for (i = 0; i < 8; i++) {
if (x86fpu_MappedTo[i] == (DWORD)RegToLoad) { if (x86fpu_MappedTo[i] == RegToLoad) {
UnMap_FPR(RegToLoad,TRUE); UnMap_FPR(RegToLoad,TRUE);
i = 8; i = 8;
} }
@ -261,7 +259,7 @@ CRegInfo::x86FpuValues CRegInfo::StackPosition (int Reg)
int i; int i;
for (i = 0; i < 8; i++) { for (i = 0; i < 8; i++) {
if (x86fpu_MappedTo[i] == (DWORD)Reg) { if (x86fpu_MappedTo[i] == Reg) {
return (x86FpuValues)((i - StackTopPos()) & 7); return (x86FpuValues)((i - StackTopPos()) & 7);
} }
} }
@ -781,7 +779,7 @@ BOOL CRegInfo::RegInStack( int Reg, FPU_STATE Format) {
for (i = 0; i < 8; i++) for (i = 0; i < 8; i++)
{ {
if (x86fpu_MappedTo[i] == (DWORD)Reg) if (x86fpu_MappedTo[i] == Reg)
{ {
if (x86fpu_State[i] == Format || Format == FPU_Any) if (x86fpu_State[i] == Format || Format == FPU_Any)
{ {
@ -795,18 +793,15 @@ BOOL CRegInfo::RegInStack( int Reg, FPU_STATE Format) {
void CRegInfo::UnMap_AllFPRs ( void ) void CRegInfo::UnMap_AllFPRs ( void )
{ {
DWORD StackPos;
for (;;) { for (;;) {
int i, StartPos; int StackPos = StackTopPos();
StackPos = StackTopPos(); if (x86fpu_MappedTo[StackPos] != -1 ) {
if (x86fpu_MappedTo[StackTopPos()] != -1 ) { UnMap_FPR(x86fpu_MappedTo[StackPos],TRUE);
UnMap_FPR(x86fpu_MappedTo[StackTopPos()],TRUE);
continue; continue;
} }
//see if any more registers mapped //see if any more registers mapped
StartPos = StackTopPos(); int StartPos = StackTopPos();
for (i = 0; i < 8; i++) { for (int i = 0; i < 8; i++) {
if (x86fpu_MappedTo[(StartPos + i) & 7] != -1 ) { fpuIncStack(&StackTopPos()); } if (x86fpu_MappedTo[(StartPos + i) & 7] != -1 ) { fpuIncStack(&StackTopPos()); }
} }
if (StackPos != StackTopPos()) { continue; } if (StackPos != StackTopPos()) { continue; }
@ -821,7 +816,7 @@ void CRegInfo::UnMap_FPR (int Reg, int WriteBackValue )
if (Reg < 0) { return; } if (Reg < 0) { return; }
for (i = 0; i < 8; i++) { for (i = 0; i < 8; i++) {
if (x86fpu_MappedTo[i] != (DWORD)Reg) { continue; } if (x86fpu_MappedTo[i] != Reg) { continue; }
CPU_Message(" regcache: unallocate %s from ST(%d)",CRegName::FPR[Reg],(i - StackTopPos() + 8) & 7); CPU_Message(" regcache: unallocate %s from ST(%d)",CRegName::FPR[Reg],(i - StackTopPos() + 8) & 7);
if (WriteBackValue) { if (WriteBackValue) {
int RegPos; int RegPos;

4
Source/Project64/N64 System/Recompiler/Reg Info.h
View File

@ -131,7 +131,7 @@ public:
inline void SetBlockCycleCount ( DWORD CyleCount ) { m_CycleCount = CyleCount; } inline void SetBlockCycleCount ( DWORD CyleCount ) { m_CycleCount = CyleCount; }
inline int & StackTopPos ( void ) { return Stack_TopPos; } inline int & StackTopPos ( void ) { return Stack_TopPos; }
inline DWORD & FpuMappedTo( int Reg) { return x86fpu_MappedTo[Reg]; } inline int & FpuMappedTo( int Reg) { return x86fpu_MappedTo[Reg]; }
inline FPU_STATE & FpuState(int Reg) { return x86fpu_State[Reg]; } inline FPU_STATE & FpuState(int Reg) { return x86fpu_State[Reg]; }
inline FPU_ROUND & FpuRoundingModel(int Reg) { return x86fpu_RoundingModel[Reg]; } inline FPU_ROUND & FpuRoundingModel(int Reg) { return x86fpu_RoundingModel[Reg]; }
inline bool & FpuBeenUsed (void ) { return Fpu_Used; } inline bool & FpuBeenUsed (void ) { return Fpu_Used; }
@ -156,7 +156,7 @@ private:
//FPU //FPU
int Stack_TopPos; int Stack_TopPos;
DWORD x86fpu_MappedTo[8]; int x86fpu_MappedTo[8];
FPU_STATE x86fpu_State[8]; FPU_STATE x86fpu_State[8];
BOOL x86fpu_StateChanged[8]; BOOL x86fpu_StateChanged[8];
FPU_ROUND x86fpu_RoundingModel[8]; FPU_ROUND x86fpu_RoundingModel[8];