Loop Analysis: SLTU and SLT marks register as changed
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@ -1051,39 +1051,13 @@ void LoopAnalysis::SPECIAL_NOR ( void )
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void LoopAnalysis::SPECIAL_SLT ( void )
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{
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if (m_Command.rd == 0) { return; }
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if (m_Reg.IsConst(m_Command.rt) && m_Reg.IsConst(m_Command.rs)) {
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if (m_Reg.Is64Bit(m_Command.rt) || m_Reg.Is64Bit(m_Command.rs)) {
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if (m_Reg.Is64Bit(m_Command.rt)) {
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m_Reg.SetMipsRegLo(m_Command.rd, (m_Reg.GetMipsRegLo_S(m_Command.rs) < m_Reg.GetMipsReg_S(m_Command.rt))?1:0);
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} else {
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m_Reg.SetMipsRegLo(m_Command.rd, (m_Reg.GetMipsReg_S(m_Command.rs) < m_Reg.GetMipsRegLo_S(m_Command.rt))?1:0);
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}
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} else {
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m_Reg.SetMipsRegLo(m_Command.rd, (m_Reg.GetMipsRegLo_S(m_Command.rs) < m_Reg.GetMipsRegLo_S(m_Command.rt))?1:0);
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}
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m_Reg.SetMipsRegState(m_Command.rd,CRegInfo::STATE_CONST_32);
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} else {
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m_Reg.SetMipsRegState(m_Command.rd,CRegInfo::STATE_MODIFIED);
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}
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m_Reg.SetMipsRegState(m_Command.rd,CRegInfo::STATE_MODIFIED);
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}
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void LoopAnalysis::SPECIAL_SLTU ( void )
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{
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if (m_Command.rd == 0) { return; }
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if (m_Reg.IsConst(m_Command.rt) && m_Reg.IsConst(m_Command.rs)) {
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if (m_Reg.Is64Bit(m_Command.rt) || m_Reg.Is64Bit(m_Command.rs)) {
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if (m_Reg.Is64Bit(m_Command.rt)) {
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m_Reg.SetMipsRegLo(m_Command.rd,(m_Reg.GetMipsRegLo(m_Command.rs) < m_Reg.GetMipsReg(m_Command.rt))?1:0);
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} else {
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m_Reg.SetMipsRegLo(m_Command.rd,(m_Reg.GetMipsReg(m_Command.rs) < m_Reg.GetMipsRegLo(m_Command.rt))?1:0);
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}
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} else {
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m_Reg.SetMipsRegLo(m_Command.rd,(m_Reg.GetMipsRegLo(m_Command.rs) < m_Reg.GetMipsRegLo(m_Command.rt))?1:0);
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}
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m_Reg.SetMipsRegState(m_Command.rd,CRegInfo::STATE_CONST_32);
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} else {
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m_Reg.SetMipsRegState(m_Command.rd,CRegInfo::STATE_MODIFIED);
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}
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m_Reg.SetMipsRegState(m_Command.rd,CRegInfo::STATE_MODIFIED);
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}
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void LoopAnalysis::SPECIAL_DADD ( void )
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