More bug fixing related to changes ABL
This commit is contained in:
parent
d8d5379e2a
commit
4a3073af6d
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@ -400,9 +400,16 @@ void CMipsMemoryVM::Compile_LW (x86Reg Reg, DWORD VAddr ) {
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}
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break;
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case 0x04100000:
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if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { _Notify->DisplayError("Compile_LW\nFailed to translate address: %X",VAddr); }
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sprintf(VarName,"m_RDRAM + %X",PAddr);
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MoveVariableToX86reg(PAddr + m_RDRAM,VarName,Reg);
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{
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static DWORD TempValue = 0;
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BeforeCallDirect(m_RegWorkingSet);
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PushImm32("TempValue",(DWORD)&TempValue);
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PushImm32(PAddr);
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MoveConstToX86reg((ULONG)((CMipsMemoryVM *)this),x86_ECX);
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Call_Direct(AddressOf(&CMipsMemoryVM::LW_NonMemory),"CMipsMemoryVM::LW_NonMemory");
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AfterCallDirect(m_RegWorkingSet);
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MoveVariableToX86reg(&TempValue,"TempValue",Reg);
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}
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break;
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case 0x04300000:
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switch (PAddr) {
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@ -1057,10 +1064,19 @@ void CMipsMemoryVM::Compile_SW_Register (x86Reg Reg, DWORD VAddr )
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}
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break;
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case 0x04100000:
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CPU_Message(" Should be moving %s in to %X ?!?",x86_Name(Reg),VAddr);
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sprintf(VarName,"m_RDRAM + %X",PAddr);
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MoveX86regToVariable(Reg,PAddr + m_RDRAM,VarName);
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if (_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { _Notify->DisplayError("Compile_SW_Register\ntrying to store at %X?",VAddr); }
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if (PAddr == 0x0410000C)
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{
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m_RegWorkingSet.SetBlockCycleCount(m_RegWorkingSet.GetBlockCycleCount()-CountPerOp());
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UpdateCounters(m_RegWorkingSet,false,true);
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m_RegWorkingSet.SetBlockCycleCount(m_RegWorkingSet.GetBlockCycleCount()+CountPerOp());
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}
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BeforeCallDirect(m_RegWorkingSet);
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Push(Reg);
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PushImm32(PAddr);
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MoveConstToX86reg((ULONG)((CMipsMemoryVM *)this),x86_ECX);
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Call_Direct(AddressOf(&CMipsMemoryVM::SW_NonMemory),"CMipsMemoryVM::SW_NonMemory");
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AfterCallDirect(m_RegWorkingSet);
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break;
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case 0x04300000:
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switch (PAddr) {
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case 0x04300000:
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@ -1630,7 +1646,14 @@ int CMipsMemoryVM::LB_NonMemory ( DWORD /*PAddr*/, DWORD * Value, BOOL /*SignExt
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// return TRUE;
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}
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int CMipsMemoryVM::LH_NonMemory ( DWORD /*PAddr*/, DWORD * Value, int/* SignExtend*/ ) {
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int CMipsMemoryVM::LH_NonMemory ( DWORD PAddr, DWORD * Value, int/* SignExtend*/ )
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{
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if (PAddr < 0x800000)
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{
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* Value = 0;
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return true;
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}
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_Notify->BreakPoint(__FILE__,__LINE__);
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// switch (PAddr & 0xFFF00000) {
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// default:
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@ -88,7 +88,7 @@ bool CCodeBlock::SetSection ( CCodeSection * & Section, CCodeSection * CurrentSe
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if (Section == NULL)
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{
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Section = new CCodeSection(this,TargetPC,m_Sections.size() + 1,LinkAllowed);
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Section = new CCodeSection(this,TargetPC,m_Sections.size(),LinkAllowed);
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if (Section == NULL)
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{
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_Notify->BreakPoint(__FILE__,__LINE__);
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@ -100,7 +100,7 @@ bool CCodeBlock::SetSection ( CCodeSection * & Section, CCodeSection * CurrentSe
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m_SectionMap.insert(SectionMap::value_type(TargetPC,Section));
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}
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Section->AddParent(CurrentSection);
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if (TargetPC < CurrentPC && TargetPC != m_VAddrEnter)
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if (TargetPC <= CurrentPC && TargetPC != m_VAddrEnter)
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{
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CCodeSection * SplitSection = NULL;
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for (SectionMap::const_iterator itr = m_SectionMap.begin(); itr != m_SectionMap.end(); itr++)
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@ -121,6 +121,7 @@ bool CCodeBlock::SetSection ( CCodeSection * & Section, CCodeSection * CurrentSe
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}
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if (SplitSection->m_EndPC >= TargetPC)
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{
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CPU_Message(__FUNCTION__ ": Split Section: %d with section: %d",SplitSection->m_SectionID, Section->m_SectionID);
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CCodeSection * BaseSection = Section;
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BaseSection->m_EndPC = SplitSection->m_EndPC;
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BaseSection->SetJumpAddress(SplitSection->m_Jump.JumpPC, SplitSection->m_Jump.TargetPC,SplitSection->m_Jump.PermLoop);
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@ -395,6 +396,10 @@ bool CCodeBlock::AnalyzeInstruction ( DWORD PC, DWORD & TargetPC, DWORD & Contin
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{
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case R4300i_REGIMM_BLTZ:
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TargetPC = PC + ((short)Command.offset << 2) + 4;
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if (TargetPC == PC + 8)
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{
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_Notify->BreakPoint(__FILE__,__LINE__);
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}
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if (TargetPC == PC)
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{
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_Notify->BreakPoint(__FILE__,__LINE__);
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@ -405,6 +410,10 @@ bool CCodeBlock::AnalyzeInstruction ( DWORD PC, DWORD & TargetPC, DWORD & Contin
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case R4300i_REGIMM_BGEZ:
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case R4300i_REGIMM_BGEZAL:
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TargetPC = PC + ((short)Command.offset << 2) + 4;
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if (TargetPC == PC + 8)
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{
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_Notify->BreakPoint(__FILE__,__LINE__);
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}
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IncludeDelaySlot = true;
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if (Command.rs != 0)
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{
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@ -455,6 +464,10 @@ bool CCodeBlock::AnalyzeInstruction ( DWORD PC, DWORD & TargetPC, DWORD & Contin
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break;
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case R4300i_BEQ:
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TargetPC = PC + ((short)Command.offset << 2) + 4;
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if (TargetPC == PC + 8)
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{
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TargetPC = (DWORD)-1;
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} else {
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if (Command.rs != 0 || Command.rt != 0)
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{
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ContinuePC = PC + 8;
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@ -462,17 +475,26 @@ bool CCodeBlock::AnalyzeInstruction ( DWORD PC, DWORD & TargetPC, DWORD & Contin
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PermLoop = true;
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}
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IncludeDelaySlot = true;
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}
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break;
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case R4300i_BNE:
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case R4300i_BLEZ:
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case R4300i_BGTZ:
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TargetPC = PC + ((short)Command.offset << 2) + 4;
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if (TargetPC == PC + 8)
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{
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TargetPC = (DWORD)-1;
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} else {
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if (TargetPC == PC)
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{
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_Notify->BreakPoint(__FILE__,__LINE__);
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if (!DelaySlotEffectsCompare(PC,Command.rs,Command.rt))
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{
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PermLoop = true;
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}
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}
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ContinuePC = PC + 8;
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IncludeDelaySlot = true;
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}
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break;
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case R4300i_CP0:
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switch (Command.rs)
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@ -502,14 +524,19 @@ bool CCodeBlock::AnalyzeInstruction ( DWORD PC, DWORD & TargetPC, DWORD & Contin
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break;
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case R4300i_CP1:
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switch (Command.fmt) {
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case R4300i_COP1_MF: case R4300i_COP1_CF: case R4300i_COP1_MT: case R4300i_COP1_CT:
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case R4300i_COP1_S: case R4300i_COP1_D: case R4300i_COP1_W: case R4300i_COP1_L:
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case R4300i_COP1_MF: case R4300i_COP1_DMF: case R4300i_COP1_CF: case R4300i_COP1_MT:
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case R4300i_COP1_DMT: case R4300i_COP1_CT: case R4300i_COP1_S: case R4300i_COP1_D:
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case R4300i_COP1_W: case R4300i_COP1_L:
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break;
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case R4300i_COP1_BC:
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switch (Command.ft) {
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case R4300i_COP1_BC_BCF:
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case R4300i_COP1_BC_BCT:
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TargetPC = PC + ((short)Command.offset << 2) + 4;
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if (TargetPC == PC + 8)
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{
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_Notify->BreakPoint(__FILE__,__LINE__);
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}
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if (TargetPC == PC)
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{
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_Notify->BreakPoint(__FILE__,__LINE__);
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@ -1273,12 +1273,17 @@ bool CCodeSection::GenerateX86Code ( DWORD Test )
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break;
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}
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if (m_DelaySlot && (CompilePC() & 0xFFC) != 0xFFC)
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if (m_DelaySlot)
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{
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if ((CompilePC() & 0xFFC) != 0xFFC)
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{
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m_CompilePC = m_Jump.JumpPC;
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m_Jump.RegSet = m_RegWorkingSet;
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m_Jump.FallThrough = true;
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GenerateSectionLinkage();
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} else {
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CompileExit (m_Jump.JumpPC, m_Jump.TargetPC,m_RegWorkingSet,CExitInfo::Normal,true,NULL);
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}
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m_NextInstruction = END_BLOCK;
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}
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else if (m_NextInstruction != END_BLOCK && m_CompilePC == ContinueSectionPC)
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@ -1927,7 +1932,7 @@ bool CCodeSection::InheritParentInfo ( void )
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bool CCodeSection::DisplaySectionInformation (DWORD ID, DWORD Test)
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{
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if (!bX86Logging || m_SectionID == 0)
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if (!bX86Logging)
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{
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return false;
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}
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@ -1945,6 +1950,11 @@ bool CCodeSection::DisplaySectionInformation (DWORD ID, DWORD Test)
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void CCodeSection::DisplaySectionInformation (void)
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{
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if (m_SectionID == 0)
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{
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return;
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}
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CPU_Message("====== Section %d ======",m_SectionID);
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CPU_Message("Start PC: %X",m_EnterPC);
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CPU_Message("End PC: %X",m_EndPC);
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@ -71,7 +71,7 @@ bool LoopAnalysis::SetupEnterSection ( CCodeSection * Section, bool & bChanged,
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CCodeSection * Parent = *iter;
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CPU_Message(__FUNCTION__ ": Parent Section ID %d Test: %X Section Test: %X CompiledLocation: %X",Parent->m_SectionID,m_Test,Parent->m_Test, Parent->m_CompiledLocation);
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if (Parent->m_Test != m_Test && (m_EnterSection != Section || Parent->m_CompiledLocation == NULL))
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if (Parent->m_Test != m_Test && (m_EnterSection != Section || Parent->m_CompiledLocation == NULL) && Parent->m_InLoop)
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{
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CPU_Message(__FUNCTION__ ": Ignore Parent Section ID %d Test: %X Section Test: %X CompiledLocation: %X",Parent->m_SectionID,m_Test,Parent->m_Test, Parent->m_CompiledLocation);
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bSkipedSection = true;
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@ -161,7 +161,7 @@ bool LoopAnalysis::CheckLoopRegisterUsage( CCodeSection * Section)
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return false;
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}
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CPU_Message(" %08X: %s",m_PC,R4300iOpcodeName(m_Command.Hex,m_PC));
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CPU_Message(" %s state: %X value: %X",CRegName::GPR[1],m_Reg.MipsRegState(1),m_Reg.MipsRegLo(1));
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CPU_Message(" %s state: %X value: %X",CRegName::GPR[3],m_Reg.MipsRegState(3),m_Reg.MipsRegLo(3));
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switch (m_Command.op) {
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case R4300i_SPECIAL:
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switch (m_Command.funct) {
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@ -366,6 +366,8 @@ bool LoopAnalysis::CheckLoopRegisterUsage( CCodeSection * Section)
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#endif
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break;
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case R4300i_BEQ:
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if (m_PC + ((short)m_Command.offset << 2) + 4 != m_PC + 8)
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{
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m_NextInstruction = DELAY_SLOT;
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#ifdef CHECKED_BUILD
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if (m_Command.rs != 0 || m_Command.rt != 0)
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@ -396,10 +398,13 @@ bool LoopAnalysis::CheckLoopRegisterUsage( CCodeSection * Section)
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#endif
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}
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#endif
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}
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break;
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case R4300i_BNE:
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case R4300i_BLEZ:
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case R4300i_BGTZ:
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if (m_PC + ((short)m_Command.offset << 2) + 4 != m_PC + 8)
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{
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m_NextInstruction = DELAY_SLOT;
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#ifdef CHECKED_BUILD
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if (Section->m_Cont.TargetPC != m_PC + 8 &&
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@ -420,6 +425,7 @@ bool LoopAnalysis::CheckLoopRegisterUsage( CCodeSection * Section)
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}
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}
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#endif
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}
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break;
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case R4300i_ADDI:
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case R4300i_ADDIU:
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@ -976,16 +982,7 @@ void LoopAnalysis::SPECIAL_DSRAV ( void )
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void LoopAnalysis::SPECIAL_ADD ( void )
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{
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if (m_Command.rd == 0) { return; }
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if (m_Command.rt == m_Command.rd || m_Command.rs == m_Command.rd)
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{
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m_Reg.SetMipsRegState(m_Command.rd,CRegInfo::STATE_MODIFIED);
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}
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if (m_Reg.IsConst(m_Command.rt) && m_Reg.IsConst(m_Command.rs)) {
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m_Reg.MipsRegLo(m_Command.rd) = m_Reg.MipsRegLo(m_Command.rs) + m_Reg.MipsRegLo(m_Command.rt);
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m_Reg.SetMipsRegState(m_Command.rd,CRegInfo::STATE_CONST_32);
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} else {
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m_Reg.SetMipsRegState(m_Command.rd,CRegInfo::STATE_MODIFIED);
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}
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}
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void LoopAnalysis::SPECIAL_ADDU ( void )
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@ -997,139 +994,37 @@ void LoopAnalysis::SPECIAL_ADDU ( void )
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void LoopAnalysis::SPECIAL_SUB ( void )
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{
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if (m_Command.rd == 0) { return; }
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if (m_Command.rt == m_Command.rd || m_Command.rs == m_Command.rd)
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{
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m_Reg.SetMipsRegState(m_Command.rd,CRegInfo::STATE_MODIFIED);
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}
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if (m_Reg.IsConst(m_Command.rt) && m_Reg.IsConst(m_Command.rs)) {
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m_Reg.MipsRegLo(m_Command.rd) = m_Reg.MipsRegLo(m_Command.rs) - m_Reg.MipsRegLo(m_Command.rt);
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m_Reg.SetMipsRegState(m_Command.rd,CRegInfo::STATE_CONST_32);
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} else {
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m_Reg.SetMipsRegState(m_Command.rd,CRegInfo::STATE_MODIFIED);
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}
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}
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void LoopAnalysis::SPECIAL_SUBU ( void )
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{
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if (m_Command.rd == 0) { return; }
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if (m_Command.rt == m_Command.rd || m_Command.rs == m_Command.rd)
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{
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m_Reg.SetMipsRegState(m_Command.rd,CRegInfo::STATE_MODIFIED);
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}
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if (m_Reg.IsConst(m_Command.rt) && m_Reg.IsConst(m_Command.rs)) {
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m_Reg.MipsRegLo(m_Command.rd) = m_Reg.MipsRegLo(m_Command.rs) - m_Reg.MipsRegLo(m_Command.rt);
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m_Reg.SetMipsRegState(m_Command.rd,CRegInfo::STATE_CONST_32);
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} else {
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m_Reg.SetMipsRegState(m_Command.rd,CRegInfo::STATE_MODIFIED);
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}
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}
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void LoopAnalysis::SPECIAL_AND ( void )
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{
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if (m_Command.rd == 0) { return; }
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if (m_Command.rt == m_Command.rd || m_Command.rs == m_Command.rd)
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{
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m_Reg.SetMipsRegState(m_Command.rd,CRegInfo::STATE_MODIFIED);
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}
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if (m_Reg.IsConst(m_Command.rt) && m_Reg.IsConst(m_Command.rs)) {
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if (m_Reg.Is64Bit(m_Command.rt) && m_Reg.Is64Bit(m_Command.rs)) {
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m_Reg.SetMipsReg(m_Command.rd,m_Reg.MipsReg(m_Command.rt) & m_Reg.MipsReg(m_Command.rs));
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m_Reg.SetMipsRegState(m_Command.rd,CRegInfo::STATE_CONST_64);
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} else if (m_Reg.Is64Bit(m_Command.rt) || m_Reg.Is64Bit(m_Command.rs)) {
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if (m_Reg.Is64Bit(m_Command.rt)) {
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m_Reg.SetMipsReg(m_Command.rd, m_Reg.MipsReg(m_Command.rt) & m_Reg.MipsRegLo(m_Command.rs));
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} else {
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m_Reg.SetMipsReg(m_Command.rd, m_Reg.MipsRegLo(m_Command.rt) & m_Reg.MipsReg(m_Command.rs));
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}
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m_Reg.SetMipsRegState(m_Command.rd,CRegInfo::ConstantsType(m_Reg.MipsReg(m_Command.rd)));
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} else {
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m_Reg.MipsRegLo(m_Command.rd) = m_Reg.MipsRegLo(m_Command.rt) & m_Reg.MipsRegLo(m_Command.rs);
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m_Reg.SetMipsRegState(m_Command.rd,CRegInfo::STATE_CONST_32);
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}
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} else {
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m_Reg.SetMipsRegState(m_Command.rd,CRegInfo::STATE_MODIFIED);
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}
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}
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void LoopAnalysis::SPECIAL_OR ( void )
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{
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if (m_Command.rd == 0) { return; }
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if (m_Command.rt == m_Command.rd || m_Command.rs == m_Command.rd)
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{
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m_Reg.SetMipsRegState(m_Command.rd,CRegInfo::STATE_MODIFIED);
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}
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if (m_Reg.IsConst(m_Command.rt) && m_Reg.IsConst(m_Command.rs)) {
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if (m_Reg.Is64Bit(m_Command.rt) && m_Reg.Is64Bit(m_Command.rs)) {
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m_Reg.SetMipsReg(m_Command.rd,m_Reg.MipsReg(m_Command.rt) | m_Reg.MipsReg(m_Command.rs));
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m_Reg.SetMipsRegState(m_Command.rd,CRegInfo::STATE_CONST_64);
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} else if (m_Reg.Is64Bit(m_Command.rt) || m_Reg.Is64Bit(m_Command.rs)) {
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if (m_Reg.Is64Bit(m_Command.rt)) {
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m_Reg.SetMipsReg(m_Command.rd,m_Reg.MipsReg(m_Command.rt) | m_Reg.MipsRegLo(m_Command.rs));
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} else {
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m_Reg.SetMipsReg(m_Command.rd,m_Reg.MipsRegLo(m_Command.rt) | m_Reg.MipsReg(m_Command.rs));
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}
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m_Reg.SetMipsRegState(m_Command.rd,CRegInfo::STATE_CONST_64);
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} else {
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m_Reg.MipsRegLo(m_Command.rd) = m_Reg.MipsRegLo(m_Command.rt) | m_Reg.MipsRegLo(m_Command.rs);
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m_Reg.SetMipsRegState(m_Command.rd,CRegInfo::STATE_CONST_32);
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}
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} else {
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m_Reg.SetMipsRegState(m_Command.rd,CRegInfo::STATE_MODIFIED);
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}
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}
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void LoopAnalysis::SPECIAL_XOR ( void )
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{
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if (m_Command.rd == 0) { return; }
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if (m_Command.rt == m_Command.rd || m_Command.rs == m_Command.rd)
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{
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m_Reg.SetMipsRegState(m_Command.rd,CRegInfo::STATE_MODIFIED);
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}
|
||||
if (m_Reg.IsConst(m_Command.rt) && m_Reg.IsConst(m_Command.rs)) {
|
||||
if (m_Reg.Is64Bit(m_Command.rt) && m_Reg.Is64Bit(m_Command.rs)) {
|
||||
m_Reg.SetMipsReg(m_Command.rd,m_Reg.MipsReg(m_Command.rt) ^ m_Reg.MipsReg(m_Command.rs));
|
||||
m_Reg.SetMipsRegState(m_Command.rd,CRegInfo::STATE_CONST_64);
|
||||
} else if (m_Reg.Is64Bit(m_Command.rt) || m_Reg.Is64Bit(m_Command.rs)) {
|
||||
if (m_Reg.Is64Bit(m_Command.rt)) {
|
||||
m_Reg.SetMipsReg(m_Command.rd, m_Reg.MipsReg(m_Command.rt) ^ m_Reg.MipsRegLo(m_Command.rs));
|
||||
} else {
|
||||
m_Reg.SetMipsReg(m_Command.rd, m_Reg.MipsRegLo(m_Command.rt) ^ m_Reg.MipsReg(m_Command.rs));
|
||||
}
|
||||
m_Reg.SetMipsRegState(m_Command.rd,CRegInfo::STATE_CONST_64);
|
||||
} else {
|
||||
m_Reg.MipsRegLo(m_Command.rd) = m_Reg.MipsRegLo(m_Command.rt) ^ m_Reg.MipsRegLo(m_Command.rs);
|
||||
m_Reg.SetMipsRegState(m_Command.rd,CRegInfo::STATE_CONST_32);
|
||||
}
|
||||
} else {
|
||||
m_Reg.SetMipsRegState(m_Command.rd,CRegInfo::STATE_MODIFIED);
|
||||
}
|
||||
}
|
||||
|
||||
void LoopAnalysis::SPECIAL_NOR ( void )
|
||||
{
|
||||
if (m_Command.rd == 0) { return; }
|
||||
if (m_Command.rt == m_Command.rd || m_Command.rs == m_Command.rd)
|
||||
{
|
||||
m_Reg.SetMipsRegState(m_Command.rd,CRegInfo::STATE_MODIFIED);
|
||||
}
|
||||
if (m_Reg.IsConst(m_Command.rt) && m_Reg.IsConst(m_Command.rs)) {
|
||||
if (m_Reg.Is64Bit(m_Command.rt) && m_Reg.Is64Bit(m_Command.rs)) {
|
||||
m_Reg.SetMipsReg(m_Command.rd,~(m_Reg.MipsReg(m_Command.rt) | m_Reg.MipsReg(m_Command.rs)));
|
||||
m_Reg.SetMipsRegState(m_Command.rd,CRegInfo::STATE_CONST_64);
|
||||
} else if (m_Reg.Is64Bit(m_Command.rt) || m_Reg.Is64Bit(m_Command.rs)) {
|
||||
if (m_Reg.Is64Bit(m_Command.rt)) {
|
||||
m_Reg.SetMipsReg(m_Command.rd, ~(m_Reg.MipsReg(m_Command.rt) | m_Reg.MipsRegLo(m_Command.rs)));
|
||||
} else {
|
||||
m_Reg.SetMipsReg(m_Command.rd, ~(m_Reg.MipsRegLo(m_Command.rt) | m_Reg.MipsReg(m_Command.rs)));
|
||||
}
|
||||
m_Reg.SetMipsRegState(m_Command.rd,CRegInfo::STATE_CONST_64);
|
||||
} else {
|
||||
m_Reg.MipsRegLo(m_Command.rd) = ~(m_Reg.MipsRegLo(m_Command.rt) | m_Reg.MipsRegLo(m_Command.rs));
|
||||
m_Reg.SetMipsRegState(m_Command.rd,CRegInfo::STATE_CONST_32);
|
||||
}
|
||||
} else {
|
||||
m_Reg.SetMipsRegState(m_Command.rd,CRegInfo::STATE_MODIFIED);
|
||||
}
|
||||
}
|
||||
|
||||
void LoopAnalysis::SPECIAL_SLT ( void )
|
||||
|
|
|
@ -32,6 +32,11 @@ void CRecompilerOps::Compile_Branch (CRecompilerOps::BranchFunction CompareFunc,
|
|||
if ( m_NextInstruction == NORMAL ) {
|
||||
CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC));
|
||||
|
||||
if (m_CompilePC + ((short)m_Opcode.offset << 2) + 4 == m_CompilePC + 8)
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
if ((m_CompilePC & 0xFFC) != 0xFFC)
|
||||
{
|
||||
switch (BranchType) {
|
||||
|
@ -285,24 +290,36 @@ void CRecompilerOps::Compile_BranchLikely (BranchFunction CompareFunc, BOOL Link
|
|||
if ( m_NextInstruction == NORMAL ) {
|
||||
CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC));
|
||||
|
||||
if (!bLinkBlocks())
|
||||
if (!bLinkBlocks() || (m_CompilePC & 0xFFC) == 0xFFC)
|
||||
{
|
||||
m_Section->m_Jump.JumpPC = m_CompilePC;
|
||||
m_Section->m_Jump.TargetPC = m_CompilePC + ((short)m_Opcode.offset << 2) + 4;
|
||||
m_Section->m_Cont.JumpPC = m_CompilePC;
|
||||
m_Section->m_Cont.TargetPC = m_CompilePC + 8;
|
||||
} else {
|
||||
if (m_Section->m_Jump.JumpPC != m_CompilePC)
|
||||
{
|
||||
_Notify->BreakPoint(__FILE__,__LINE__);
|
||||
}
|
||||
if (m_Section->m_Cont.JumpPC != m_CompilePC)
|
||||
{
|
||||
_Notify->BreakPoint(__FILE__,__LINE__);
|
||||
}
|
||||
if (m_Section->m_Cont.TargetPC != m_CompilePC + 8)
|
||||
{
|
||||
_Notify->BreakPoint(__FILE__,__LINE__);
|
||||
}
|
||||
}
|
||||
if (m_Section->m_JumpSection != NULL) {
|
||||
m_Section->m_Jump.BranchLabel.Format("Section_%d",((CCodeSection *)m_Section->m_JumpSection)->m_SectionID);
|
||||
} else {
|
||||
m_Section->m_Jump.BranchLabel = "ExitBlock";
|
||||
}
|
||||
|
||||
m_Section->m_Cont.JumpPC = m_CompilePC;
|
||||
m_Section->m_Cont.TargetPC = m_CompilePC + 8;
|
||||
if (m_Section->m_ContinueSection != NULL) {
|
||||
m_Section->m_Cont.BranchLabel.Format("Section_%d",((CCodeSection *)m_Section->m_ContinueSection)->m_SectionID);
|
||||
} else {
|
||||
m_Section->m_Cont.BranchLabel = "ExitBlock";
|
||||
}
|
||||
}
|
||||
m_Section->m_Jump.FallThrough = TRUE;
|
||||
m_Section->m_Jump.LinkLocation = NULL;
|
||||
m_Section->m_Jump.LinkLocation2 = NULL;
|
||||
|
@ -317,23 +334,8 @@ void CRecompilerOps::Compile_BranchLikely (BranchFunction CompareFunc, BOOL Link
|
|||
}
|
||||
CompareFunc();
|
||||
ResetX86Protection();
|
||||
if (bLinkBlocks())
|
||||
{
|
||||
m_Section->m_Jump.RegSet = m_RegWorkingSet;
|
||||
|
||||
m_Section->m_Cont.RegSet = m_RegWorkingSet;
|
||||
m_Section->GenerateSectionLinkage();
|
||||
m_NextInstruction = END_BLOCK;
|
||||
} else {
|
||||
m_Section->m_Cont.RegSet = m_RegWorkingSet;
|
||||
if (m_Section->m_Cont.FallThrough)
|
||||
{
|
||||
if (m_Section->m_Jump.LinkLocation != NULL)
|
||||
{
|
||||
_Notify->BreakPoint(__FILE__,__LINE__);
|
||||
}
|
||||
m_Section->GenerateSectionLinkage();
|
||||
m_NextInstruction = END_BLOCK;
|
||||
} else {
|
||||
if ((m_CompilePC & 0xFFC) == 0xFFC)
|
||||
{
|
||||
if (m_Section->m_Cont.FallThrough) { _Notify->BreakPoint(__FILE__,__LINE__); }
|
||||
|
@ -346,6 +348,7 @@ void CRecompilerOps::Compile_BranchLikely (BranchFunction CompareFunc, BOOL Link
|
|||
m_Section->m_Jump.LinkLocation2 = NULL;
|
||||
}
|
||||
}
|
||||
|
||||
MoveConstToVariable(m_Section->m_Jump.TargetPC,&R4300iOp::m_JumpToLocation,"R4300iOp::m_JumpToLocation");
|
||||
OverflowDelaySlot(false);
|
||||
CPU_Message(" ");
|
||||
|
@ -363,6 +366,21 @@ void CRecompilerOps::Compile_BranchLikely (BranchFunction CompareFunc, BOOL Link
|
|||
} else {
|
||||
m_NextInstruction = DO_DELAY_SLOT;
|
||||
}
|
||||
|
||||
if (bLinkBlocks())
|
||||
{
|
||||
m_Section->m_Jump.RegSet = m_RegWorkingSet;
|
||||
m_Section->GenerateSectionLinkage();
|
||||
m_NextInstruction = END_BLOCK;
|
||||
} else {
|
||||
if (m_Section->m_Cont.FallThrough)
|
||||
{
|
||||
if (m_Section->m_Jump.LinkLocation != NULL)
|
||||
{
|
||||
_Notify->BreakPoint(__FILE__,__LINE__);
|
||||
}
|
||||
m_Section->GenerateSectionLinkage();
|
||||
m_NextInstruction = END_BLOCK;
|
||||
}
|
||||
}
|
||||
} else if (m_NextInstruction == DELAY_SLOT_DONE ) {
|
||||
|
|
Loading…
Reference in New Issue