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Implement edge case for LDV, fix 2 typos as well. 

For LDV, it's the same deal as SDV. In WDC, RSPOpC.del could = 12, which
would result in a negative number when doing 16 - RSPOpC,del - 8.
This commit is contained in:
LegendOfDragoon 2015-01-14 01:48:47 -08:00
parent 5df4a806b4
commit 479b201ddc
2 changed files with 10 additions and 10 deletions
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18
Source/RSP/Recompiler Ops.c
View File

@ -3624,7 +3624,7 @@ void Compile_Vector_VCR ( void ) {
void Compile_Vector_VMRG ( void ) {
char Reg[256];
int count, el, del;
BOOL bWriteToAccum; = WriteToAccum(Low16BitAccum, CompilePC);
BOOL bWriteToAccum = WriteToAccum(Low16BitAccum, CompilePC);
#ifndef CompileVmrg
Cheat_r4300iOpcode(RSP_Vector_VMRG,"RSP_Vector_VMRG"); return;
@ -4474,10 +4474,10 @@ void Compile_Opcode_LDV ( void ) {
sprintf(Reg, "Dmem + %Xh", Addr + 4);
MoveVariableToX86reg(RSPInfo.DMEM + Addr + 4, Reg, x86_ECX);
sprintf(Reg, "RSP_Vect[%i].B[%i]", RSPOpC.rt, 16 - RSPOpC.del - 4);
MoveX86regToVariable(x86_EAX, &RSP_Vect[RSPOpC.rt].B[16 - RSPOpC.del - 4], Reg);
sprintf(Reg, "RSP_Vect[%i].B[%i]", RSPOpC.rt, 16 - RSPOpC.del - 8);
MoveX86regToVariable(x86_ECX, &RSP_Vect[RSPOpC.rt].B[16 - RSPOpC.del - 8], Reg);
sprintf(Reg, "RSP_Vect[%i].B[%i]", RSPOpC.rt, (16 - RSPOpC.del - 4) & 0xF);
MoveX86regToVariable(x86_EAX, &RSP_Vect[RSPOpC.rt].B[(16 - RSPOpC.del - 4) & 0xF], Reg);
sprintf(Reg, "RSP_Vect[%i].B[%i]", RSPOpC.rt, (16 - RSPOpC.del - 8) & 0xF);
MoveX86regToVariable(x86_ECX, &RSP_Vect[RSPOpC.rt].B[(16 - RSPOpC.del - 8) & 0xF], Reg);
return;
}
@ -4526,10 +4526,10 @@ void Compile_Opcode_LDV ( void ) {
MoveN64MemDispToX86reg(x86_ECX, x86_EBX, 4);
/* Because of byte swapping this swizzle works nicely */
sprintf(Reg, "RSP_Vect[%i].B[%i]", RSPOpC.rt, 16 - RSPOpC.del - 4);
MoveX86regToVariable(x86_EAX, &RSP_Vect[RSPOpC.rt].B[16 - RSPOpC.del - 4], Reg);
sprintf(Reg, "RSP_Vect[%i].B[%i]", RSPOpC.rt, 16 - RSPOpC.del - 8);
MoveX86regToVariable(x86_ECX, &RSP_Vect[RSPOpC.rt].B[16 - RSPOpC.del - 8], Reg);
sprintf(Reg, "RSP_Vect[%i].B[%i]", RSPOpC.rt, (16 - RSPOpC.del - 4) & 0xF);
MoveX86regToVariable(x86_EAX, &RSP_Vect[RSPOpC.rt].B[(16 - RSPOpC.del - 4) & 0xF], Reg);
sprintf(Reg, "RSP_Vect[%i].B[%i]", RSPOpC.rt, (16 - RSPOpC.del - 8) & 0xF);
MoveX86regToVariable(x86_ECX, &RSP_Vect[RSPOpC.rt].B[(16 - RSPOpC.del - 8) & 0xF], Reg);
CPU_Message(" Done:");
x86_SetBranch32b(Jump[1], RecompPos);

2
Source/RSP/Sse.c
View File

@ -294,7 +294,7 @@ void SseXorRegToReg(int Dest, int Source) {
case x86_XMM4: x86Command = 0x20; break;
case x86_XMM5: x86Command = 0x28; break;
case x86_XMM6: x86Command = 0x30; break;
case x86_XMM7: x86Command = 0x28; break;
case x86_XMM7: x86Command = 0x38; break;
}
switch (Source) {
case x86_XMM0: x86Command += 0x00; break;