Core: Change StackPos to be a reference
This commit is contained in:
parent
6044222be0
commit
46dcf967e1
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@ -377,7 +377,7 @@ void CX86RegInfo::Load_FPR_ToTop(int32_t Reg, int32_t RegToLoad, FPU_STATE Forma
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{
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UnMap_FPR(m_x86fpu_MappedTo[(StackTopPos() - 1) & 7], true);
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m_CodeBlock.Log(" regcache: allocate ST(0) to %s", CRegName::FPR[Reg]);
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m_Assembler.fpuLoadReg(&StackTopPos(), StackPosition(RegToLoad));
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m_Assembler.fpuLoadReg(StackTopPos(), StackPosition(RegToLoad));
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FpuRoundingModel(StackTopPos()) = RoundDefault;
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m_x86fpu_MappedTo[StackTopPos()] = Reg;
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m_x86fpu_State[StackTopPos()] = Format;
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@ -442,19 +442,19 @@ void CX86RegInfo::Load_FPR_ToTop(int32_t Reg, int32_t RegToLoad, FPU_STATE Forma
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{
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case FPU_Dword:
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m_Assembler.MoveVariableToX86reg(&g_Reg->m_FPR_S[RegToLoad], stdstr_f("m_FPR_S[%d]", RegToLoad).c_str(), TempReg);
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m_Assembler.fpuLoadIntegerDwordFromX86Reg(&StackTopPos(), TempReg);
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m_Assembler.fpuLoadIntegerDwordFromX86Reg(StackTopPos(), TempReg);
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break;
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case FPU_Qword:
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m_Assembler.MoveVariableToX86reg(&g_Reg->m_FPR_D[RegToLoad], stdstr_f("m_FPR_D[%d]", RegToLoad).c_str(), TempReg);
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m_Assembler.fpuLoadIntegerQwordFromX86Reg(&StackTopPos(), TempReg);
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m_Assembler.fpuLoadIntegerQwordFromX86Reg(StackTopPos(), TempReg);
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break;
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case FPU_Float:
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m_Assembler.MoveVariableToX86reg(&g_Reg->m_FPR_S[RegToLoad], stdstr_f("m_FPR_S[%d]", RegToLoad).c_str(), TempReg);
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m_Assembler.fpuLoadDwordFromX86Reg(&StackTopPos(), TempReg);
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m_Assembler.fpuLoadDwordFromX86Reg(StackTopPos(), TempReg);
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break;
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case FPU_Double:
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m_Assembler.MoveVariableToX86reg(&g_Reg->m_FPR_D[RegToLoad], stdstr_f("m_FPR_D[%d]", RegToLoad).c_str(), TempReg);
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m_Assembler.fpuLoadQwordFromX86Reg(&StackTopPos(), TempReg);
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m_Assembler.fpuLoadQwordFromX86Reg(StackTopPos(), TempReg);
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break;
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default:
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if (HaveDebugger())
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@ -1200,7 +1200,7 @@ void CX86RegInfo::UnMap_AllFPRs()
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{
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if (m_x86fpu_MappedTo[(StartPos + i) & 7] != -1)
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{
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m_Assembler.fpuIncStack(&StackTopPos());
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m_Assembler.fpuIncStack(StackTopPos());
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}
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}
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if (StackPos != StackTopPos())
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@ -1232,7 +1232,7 @@ void CX86RegInfo::UnMap_FPR(int32_t Reg, bool WriteBackValue)
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{
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if (m_x86fpu_MappedTo[StackTopPos()] == -1 && m_x86fpu_MappedTo[(StackTopPos() + 1) & 7] == Reg)
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{
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m_Assembler.fpuIncStack(&StackTopPos());
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m_Assembler.fpuIncStack(StackTopPos());
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}
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else
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{
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@ -1260,19 +1260,19 @@ void CX86RegInfo::UnMap_FPR(int32_t Reg, bool WriteBackValue)
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{
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case FPU_Dword:
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m_Assembler.MoveVariableToX86reg(&_FPR_S[m_x86fpu_MappedTo[StackTopPos()]], stdstr_f("_FPR_S[%d]", m_x86fpu_MappedTo[StackTopPos()]).c_str(), TempReg);
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m_Assembler.fpuStoreIntegerDwordFromX86Reg(&StackTopPos(), TempReg, true);
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m_Assembler.fpuStoreIntegerDwordFromX86Reg(StackTopPos(), TempReg, true);
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break;
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case FPU_Qword:
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m_Assembler.MoveVariableToX86reg(&_FPR_D[m_x86fpu_MappedTo[StackTopPos()]], stdstr_f("_FPR_D[%d]", m_x86fpu_MappedTo[StackTopPos()]).c_str(), TempReg);
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m_Assembler.fpuStoreIntegerQwordFromX86Reg(&StackTopPos(), TempReg, true);
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m_Assembler.fpuStoreIntegerQwordFromX86Reg(StackTopPos(), TempReg, true);
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break;
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case FPU_Float:
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m_Assembler.MoveVariableToX86reg(&_FPR_S[m_x86fpu_MappedTo[StackTopPos()]], stdstr_f("_FPR_S[%d]", m_x86fpu_MappedTo[StackTopPos()]).c_str(), TempReg);
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m_Assembler.fpuStoreDwordFromX86Reg(&StackTopPos(), TempReg, true);
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m_Assembler.fpuStoreDwordFromX86Reg(StackTopPos(), TempReg, true);
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break;
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case FPU_Double:
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m_Assembler.MoveVariableToX86reg(&_FPR_D[m_x86fpu_MappedTo[StackTopPos()]], stdstr_f("_FPR_D[%d]", m_x86fpu_MappedTo[StackTopPos()]).c_str(), TempReg);
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m_Assembler.fpuStoreQwordFromX86Reg(&StackTopPos(), TempReg, true);
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m_Assembler.fpuStoreQwordFromX86Reg(StackTopPos(), TempReg, true);
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break;
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default:
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if (HaveDebugger())
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@ -3386,10 +3386,10 @@ void CX86Ops::fpuAddReg(x86FpuValues x86reg)
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}
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}
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void CX86Ops::fpuAddRegPop(int32_t * StackPos, x86FpuValues reg)
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void CX86Ops::fpuAddRegPop(int32_t & StackPos, x86FpuValues reg)
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{
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CodeLog(" faddp ST(0), %s", fpu_Name(reg));
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*StackPos = (*StackPos + 1) & 7;
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StackPos = (StackPos + 1) & 7;
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switch (reg)
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{
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case x86_ST0: AddCode16(0xC0DE); break;
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@ -3615,17 +3615,17 @@ void CX86Ops::fpuFree(x86FpuValues Reg)
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}
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}
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void CX86Ops::fpuDecStack(int32_t * StackPos)
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void CX86Ops::fpuDecStack(int32_t & StackPos)
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{
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CodeLog(" fdecstp");
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*StackPos = (*StackPos - 1) & 7;
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StackPos = (StackPos - 1) & 7;
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AddCode16(0xF6D9);
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}
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void CX86Ops::fpuIncStack(int32_t * StackPos)
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void CX86Ops::fpuIncStack(int32_t & StackPos)
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{
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CodeLog(" fincstp");
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*StackPos = (*StackPos + 1) & 7;
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StackPos = (StackPos + 1) & 7;
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AddCode16(0xF7D9);
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}
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@ -3636,18 +3636,18 @@ void CX86Ops::fpuLoadControl(void * Variable, const char * VariableName)
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AddCode32((uint32_t)Variable);
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}
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void CX86Ops::fpuLoadDword(int32_t * StackPos, void * Variable, const char * VariableName)
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void CX86Ops::fpuLoadDword(int32_t & StackPos, void * Variable, const char * VariableName)
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{
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CodeLog(" fld dword ptr [%s]", VariableName);
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*StackPos = (*StackPos - 1) & 7;
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StackPos = (StackPos - 1) & 7;
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AddCode16(0x05D9);
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AddCode32((uint32_t)Variable);
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}
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void CX86Ops::fpuLoadDwordFromX86Reg(int32_t * StackPos, x86Reg x86reg)
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void CX86Ops::fpuLoadDwordFromX86Reg(int32_t & StackPos, x86Reg x86reg)
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{
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CodeLog(" fld dword ptr [%s]", x86_Name(x86reg));
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*StackPos = (*StackPos - 1) & 7;
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StackPos = (StackPos - 1) & 7;
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AddCode8(0xD9);
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switch (x86reg)
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{
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@ -3662,10 +3662,10 @@ void CX86Ops::fpuLoadDwordFromX86Reg(int32_t * StackPos, x86Reg x86reg)
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}
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}
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void CX86Ops::fpuLoadDwordFromN64Mem(int32_t * StackPos, x86Reg x86reg)
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void CX86Ops::fpuLoadDwordFromN64Mem(int32_t & StackPos, x86Reg x86reg)
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{
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CodeLog(" fld dword ptr [%s+N64mem]", x86_Name(x86reg));
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*StackPos = (*StackPos - 1) & 7;
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StackPos = (StackPos - 1) & 7;
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switch (x86reg)
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{
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case x86_EAX: AddCode16(0x80D9); break;
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@ -3681,10 +3681,10 @@ void CX86Ops::fpuLoadDwordFromN64Mem(int32_t * StackPos, x86Reg x86reg)
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AddCode32((uint32_t)g_MMU->Rdram());
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}
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void CX86Ops::fpuLoadInt32bFromN64Mem(int32_t * StackPos, x86Reg x86reg)
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void CX86Ops::fpuLoadInt32bFromN64Mem(int32_t & StackPos, x86Reg x86reg)
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{
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CodeLog(" fild dword ptr [%s+N64mem]", x86_Name(x86reg));
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*StackPos = (*StackPos - 1) & 7;
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StackPos = (StackPos - 1) & 7;
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switch (x86reg)
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{
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case x86_EAX: AddCode16(0x80DB); break;
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@ -3700,18 +3700,18 @@ void CX86Ops::fpuLoadInt32bFromN64Mem(int32_t * StackPos, x86Reg x86reg)
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AddCode32((uint32_t)g_MMU->Rdram());
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}
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void CX86Ops::fpuLoadIntegerDword(int32_t * StackPos, void * Variable, const char * VariableName)
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void CX86Ops::fpuLoadIntegerDword(int32_t & StackPos, void * Variable, const char * VariableName)
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{
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CodeLog(" fild dword ptr [%s]", VariableName);
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*StackPos = (*StackPos - 1) & 7;
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StackPos = (StackPos - 1) & 7;
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AddCode16(0x05DB);
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AddCode32((uint32_t)Variable);
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}
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void CX86Ops::fpuLoadIntegerDwordFromX86Reg(int32_t * StackPos, x86Reg x86reg)
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void CX86Ops::fpuLoadIntegerDwordFromX86Reg(int32_t & StackPos, x86Reg x86reg)
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{
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CodeLog(" fild dword ptr [%s]", x86_Name(x86reg));
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*StackPos = (*StackPos - 1) & 7;
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StackPos = (StackPos - 1) & 7;
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AddCode8(0xDB);
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switch (x86reg)
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{
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@ -3726,18 +3726,18 @@ void CX86Ops::fpuLoadIntegerDwordFromX86Reg(int32_t * StackPos, x86Reg x86reg)
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}
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}
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void CX86Ops::fpuLoadIntegerQword(int32_t * StackPos, void * Variable, const char * VariableName)
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void CX86Ops::fpuLoadIntegerQword(int32_t & StackPos, void * Variable, const char * VariableName)
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{
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CodeLog(" fild qword ptr [%s]", VariableName);
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*StackPos = (*StackPos - 1) & 7;
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StackPos = (StackPos - 1) & 7;
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AddCode16(0x2DDF);
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AddCode32((uint32_t)Variable);
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}
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void CX86Ops::fpuLoadIntegerQwordFromX86Reg(int32_t * StackPos, x86Reg x86reg)
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void CX86Ops::fpuLoadIntegerQwordFromX86Reg(int32_t & StackPos, x86Reg x86reg)
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{
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CodeLog(" fild qword ptr [%s]", x86_Name(x86reg));
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*StackPos = (*StackPos - 1) & 7;
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StackPos = (StackPos - 1) & 7;
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AddCode8(0xDF);
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switch (x86reg)
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{
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@ -3752,18 +3752,18 @@ void CX86Ops::fpuLoadIntegerQwordFromX86Reg(int32_t * StackPos, x86Reg x86reg)
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}
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}
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void CX86Ops::fpuLoadQword(int32_t * StackPos, void * Variable, const char * VariableName)
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void CX86Ops::fpuLoadQword(int32_t & StackPos, void * Variable, const char * VariableName)
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{
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CodeLog(" fld qword ptr [%s]", VariableName);
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*StackPos = (*StackPos - 1) & 7;
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StackPos = (StackPos - 1) & 7;
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AddCode16(0x05DD);
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AddCode32((uint32_t)Variable);
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}
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void CX86Ops::fpuLoadQwordFromX86Reg(int32_t * StackPos, x86Reg x86reg)
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void CX86Ops::fpuLoadQwordFromX86Reg(int32_t & StackPos, x86Reg x86reg)
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{
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CodeLog(" fld qword ptr [%s]", x86_Name(x86reg));
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*StackPos = (*StackPos - 1) & 7;
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StackPos = (StackPos - 1) & 7;
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AddCode8(0xDD);
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switch (x86reg)
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{
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@ -3778,10 +3778,10 @@ void CX86Ops::fpuLoadQwordFromX86Reg(int32_t * StackPos, x86Reg x86reg)
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}
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}
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void CX86Ops::fpuLoadQwordFromN64Mem(int32_t * StackPos, x86Reg x86reg)
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void CX86Ops::fpuLoadQwordFromN64Mem(int32_t & StackPos, x86Reg x86reg)
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{
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CodeLog(" fld qword ptr [%s+N64mem]", x86_Name(x86reg));
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*StackPos = (*StackPos - 1) & 7;
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StackPos = (StackPos - 1) & 7;
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switch (x86reg)
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{
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case x86_EAX: AddCode16(0x80DD); break;
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@ -3797,10 +3797,10 @@ void CX86Ops::fpuLoadQwordFromN64Mem(int32_t * StackPos, x86Reg x86reg)
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AddCode32((uint32_t)g_MMU->Rdram());
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}
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void CX86Ops::fpuLoadReg(int32_t * StackPos, x86FpuValues Reg)
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void CX86Ops::fpuLoadReg(int32_t & StackPos, x86FpuValues Reg)
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{
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CodeLog(" fld ST(0), %s", fpu_Name(Reg));
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*StackPos = (*StackPos - 1) & 7;
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StackPos = (StackPos - 1) & 7;
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switch (Reg)
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{
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case x86_ST0: AddCode16(0xC0D9); break;
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@ -3928,20 +3928,20 @@ void CX86Ops::fpuStoreControl(void * Variable, const char * VariableName)
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AddCode32((uint32_t)Variable);
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}
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void CX86Ops::fpuStoreDword(int32_t * StackPos, void * Variable, const char * VariableName, bool pop)
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void CX86Ops::fpuStoreDword(int32_t & StackPos, void * Variable, const char * VariableName, bool pop)
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{
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CodeLog(" fst%s dword ptr [%s]", m_fpupop[pop], VariableName);
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if (pop)
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{
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*StackPos = (*StackPos + 1) & 7;
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StackPos = (StackPos + 1) & 7;
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}
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AddCode16(pop ? 0x1DD9 : 0x15D9);
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AddCode32((uint32_t)Variable);
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}
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void CX86Ops::fpuStoreDwordFromX86Reg(int32_t * StackPos, x86Reg x86reg, bool pop)
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void CX86Ops::fpuStoreDwordFromX86Reg(int32_t & StackPos, x86Reg x86reg, bool pop)
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{
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uint8_t Command = 0;
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@ -3949,7 +3949,7 @@ void CX86Ops::fpuStoreDwordFromX86Reg(int32_t * StackPos, x86Reg x86reg, bool po
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if (pop)
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{
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*StackPos = (*StackPos + 1) & 7;
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StackPos = (StackPos + 1) & 7;
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}
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AddCode8(0xD9);
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@ -3969,7 +3969,7 @@ void CX86Ops::fpuStoreDwordFromX86Reg(int32_t * StackPos, x86Reg x86reg, bool po
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AddCode8(pop ? (Command + 0x8) : Command);
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}
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void CX86Ops::fpuStoreDwordToN64Mem(int32_t * StackPos, x86Reg x86reg, bool Pop)
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void CX86Ops::fpuStoreDwordToN64Mem(int32_t & StackPos, x86Reg x86reg, bool Pop)
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{
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int s = Pop ? 0x0800 : 0;
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@ -3977,7 +3977,7 @@ void CX86Ops::fpuStoreDwordToN64Mem(int32_t * StackPos, x86Reg x86reg, bool Pop)
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if (Pop)
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{
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*StackPos = (*StackPos + 1) & 7;
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StackPos = (StackPos + 1) & 7;
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}
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switch (x86reg)
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@ -3996,19 +3996,19 @@ void CX86Ops::fpuStoreDwordToN64Mem(int32_t * StackPos, x86Reg x86reg, bool Pop)
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AddCode32((uint32_t)g_MMU->Rdram());
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}
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void CX86Ops::fpuStoreIntegerDword(int32_t * StackPos, void * Variable, const char * VariableName, bool pop)
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void CX86Ops::fpuStoreIntegerDword(int32_t & StackPos, void * Variable, const char * VariableName, bool pop)
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{
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CodeLog(" fist%s dword ptr [%s]", m_fpupop[pop], VariableName);
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if (pop)
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{
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*StackPos = (*StackPos + 1) & 7;
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StackPos = (StackPos + 1) & 7;
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}
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AddCode16(pop ? 0x1DDB : 0x15DB);
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AddCode32((uint32_t)Variable);
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}
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void CX86Ops::fpuStoreIntegerDwordFromX86Reg(int32_t * StackPos, x86Reg x86reg, bool pop)
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void CX86Ops::fpuStoreIntegerDwordFromX86Reg(int32_t & StackPos, x86Reg x86reg, bool pop)
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{
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uint8_t Command = 0;
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@ -4016,7 +4016,7 @@ void CX86Ops::fpuStoreIntegerDwordFromX86Reg(int32_t * StackPos, x86Reg x86reg,
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if (pop)
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{
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*StackPos = (*StackPos + 1) & 7;
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StackPos = (StackPos + 1) & 7;
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}
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AddCode8(0xDB);
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@ -4036,13 +4036,13 @@ void CX86Ops::fpuStoreIntegerDwordFromX86Reg(int32_t * StackPos, x86Reg x86reg,
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AddCode8(pop ? (Command + 0x8) : Command);
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}
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void CX86Ops::fpuStoreIntegerQword(int32_t * StackPos, void * Variable, const char * VariableName, bool pop)
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void CX86Ops::fpuStoreIntegerQword(int32_t & StackPos, void * Variable, const char * VariableName, bool pop)
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{
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CodeLog(" fist%s qword ptr [%s]", m_fpupop[pop], VariableName);
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if (pop)
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{
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*StackPos = (*StackPos + 1) & 7;
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StackPos = (StackPos + 1) & 7;
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}
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AddCode16(pop ? 0x3DDF : 0x35DF);
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@ -4054,7 +4054,7 @@ void CX86Ops::fpuStoreIntegerQword(int32_t * StackPos, void * Variable, const ch
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}
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}
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void CX86Ops::fpuStoreIntegerQwordFromX86Reg(int32_t * StackPos, x86Reg x86reg, bool pop)
|
||||
void CX86Ops::fpuStoreIntegerQwordFromX86Reg(int32_t & StackPos, x86Reg x86reg, bool pop)
|
||||
{
|
||||
uint8_t Command = 0;
|
||||
|
||||
|
@ -4062,7 +4062,7 @@ void CX86Ops::fpuStoreIntegerQwordFromX86Reg(int32_t * StackPos, x86Reg x86reg,
|
|||
|
||||
if (pop)
|
||||
{
|
||||
*StackPos = (*StackPos + 1) & 7;
|
||||
StackPos = (StackPos + 1) & 7;
|
||||
}
|
||||
|
||||
AddCode8(0xDF);
|
||||
|
@ -4082,7 +4082,7 @@ void CX86Ops::fpuStoreIntegerQwordFromX86Reg(int32_t * StackPos, x86Reg x86reg,
|
|||
AddCode8(pop ? (Command + 0x8) : Command);
|
||||
}
|
||||
|
||||
void CX86Ops::fpuStoreQwordFromX86Reg(int32_t * StackPos, x86Reg x86reg, bool pop)
|
||||
void CX86Ops::fpuStoreQwordFromX86Reg(int32_t & StackPos, x86Reg x86reg, bool pop)
|
||||
{
|
||||
uint8_t Command = 0;
|
||||
|
||||
|
@ -4090,7 +4090,7 @@ void CX86Ops::fpuStoreQwordFromX86Reg(int32_t * StackPos, x86Reg x86reg, bool po
|
|||
|
||||
if (pop)
|
||||
{
|
||||
*StackPos = (*StackPos + 1) & 7;
|
||||
StackPos = (StackPos + 1) & 7;
|
||||
}
|
||||
|
||||
AddCode8(0xDD);
|
||||
|
|
|
@ -235,7 +235,7 @@ public:
|
|||
void fpuAddQword(void * Variable, const char * VariableName);
|
||||
void fpuAddQwordRegPointer(x86Reg X86Pointer);
|
||||
void fpuAddReg(x86FpuValues reg);
|
||||
void fpuAddRegPop(int32_t * StackPos, x86FpuValues reg);
|
||||
void fpuAddRegPop(int32_t & StackPos, x86FpuValues reg);
|
||||
void fpuComDword(void * Variable, const char * VariableName, bool Pop);
|
||||
void fpuComDwordRegPointer(x86Reg X86Pointer, bool Pop);
|
||||
void fpuComQword(void * Variable, const char * VariableName, bool Pop);
|
||||
|
@ -249,21 +249,21 @@ public:
|
|||
void fpuDivRegPop(x86FpuValues reg);
|
||||
void fpuExchange(x86FpuValues Reg);
|
||||
void fpuFree(x86FpuValues Reg);
|
||||
void fpuDecStack(int32_t * StackPos);
|
||||
void fpuIncStack(int32_t * StackPos);
|
||||
void fpuDecStack(int32_t & StackPos);
|
||||
void fpuIncStack(int32_t & StackPos);
|
||||
void fpuLoadControl(void * Variable, const char * VariableName);
|
||||
void fpuLoadDword(int32_t * StackPos, void * Variable, const char * VariableName);
|
||||
void fpuLoadDwordFromX86Reg(int32_t * StackPos, x86Reg reg);
|
||||
void fpuLoadDwordFromN64Mem(int32_t * StackPos, x86Reg reg);
|
||||
void fpuLoadInt32bFromN64Mem(int32_t * StackPos, x86Reg reg);
|
||||
void fpuLoadIntegerDword(int32_t * StackPos, void * Variable, const char * VariableName);
|
||||
void fpuLoadIntegerDwordFromX86Reg(int32_t * StackPos, x86Reg Reg);
|
||||
void fpuLoadIntegerQword(int32_t * StackPos, void * Variable, const char * VariableName);
|
||||
void fpuLoadIntegerQwordFromX86Reg(int32_t * StackPos, x86Reg Reg);
|
||||
void fpuLoadQword(int32_t * StackPos, void * Variable, const char * VariableName);
|
||||
void fpuLoadQwordFromX86Reg(int32_t * StackPos, x86Reg Reg);
|
||||
void fpuLoadQwordFromN64Mem(int32_t * StackPos, x86Reg reg);
|
||||
void fpuLoadReg(int32_t * StackPos, x86FpuValues Reg);
|
||||
void fpuLoadDword(int32_t & StackPos, void * Variable, const char * VariableName);
|
||||
void fpuLoadDwordFromX86Reg(int32_t & StackPos, x86Reg reg);
|
||||
void fpuLoadDwordFromN64Mem(int32_t & StackPos, x86Reg reg);
|
||||
void fpuLoadInt32bFromN64Mem(int32_t & StackPos, x86Reg reg);
|
||||
void fpuLoadIntegerDword(int32_t & StackPos, void * Variable, const char * VariableName);
|
||||
void fpuLoadIntegerDwordFromX86Reg(int32_t & StackPos, x86Reg Reg);
|
||||
void fpuLoadIntegerQword(int32_t & StackPos, void * Variable, const char * VariableName);
|
||||
void fpuLoadIntegerQwordFromX86Reg(int32_t & StackPos, x86Reg Reg);
|
||||
void fpuLoadQword(int32_t & StackPos, void * Variable, const char * VariableName);
|
||||
void fpuLoadQwordFromX86Reg(int32_t & StackPos, x86Reg Reg);
|
||||
void fpuLoadQwordFromN64Mem(int32_t & StackPos, x86Reg reg);
|
||||
void fpuLoadReg(int32_t & StackPos, x86FpuValues Reg);
|
||||
void fpuMulDword(void * Variable, const char * VariableName);
|
||||
void fpuMulDwordRegPointer(x86Reg X86Pointer);
|
||||
void fpuMulQword(void * Variable, const char * VariableName);
|
||||
|
@ -274,14 +274,14 @@ public:
|
|||
void fpuRound();
|
||||
void fpuSqrt();
|
||||
void fpuStoreControl(void * Variable, const char * VariableName);
|
||||
void fpuStoreDword(int32_t * StackPos, void * Variable, const char * VariableName, bool pop);
|
||||
void fpuStoreDwordFromX86Reg(int32_t * StackPos, x86Reg Reg, bool pop);
|
||||
void fpuStoreDwordToN64Mem(int32_t * StackPos, x86Reg reg, bool Pop);
|
||||
void fpuStoreIntegerDword(int32_t * StackPos, void * Variable, const char * VariableName, bool pop);
|
||||
void fpuStoreIntegerDwordFromX86Reg(int32_t * StackPos, x86Reg Reg, bool pop);
|
||||
void fpuStoreIntegerQword(int32_t * StackPos, void * Variable, const char * VariableName, bool pop);
|
||||
void fpuStoreIntegerQwordFromX86Reg(int32_t * StackPos, x86Reg Reg, bool pop);
|
||||
void fpuStoreQwordFromX86Reg(int32_t * StackPos, x86Reg Reg, bool pop);
|
||||
void fpuStoreDword(int32_t & StackPos, void * Variable, const char * VariableName, bool pop);
|
||||
void fpuStoreDwordFromX86Reg(int32_t & StackPos, x86Reg Reg, bool pop);
|
||||
void fpuStoreDwordToN64Mem(int32_t & StackPos, x86Reg reg, bool Pop);
|
||||
void fpuStoreIntegerDword(int32_t & StackPos, void * Variable, const char * VariableName, bool pop);
|
||||
void fpuStoreIntegerDwordFromX86Reg(int32_t & StackPos, x86Reg Reg, bool pop);
|
||||
void fpuStoreIntegerQword(int32_t & StackPos, void * Variable, const char * VariableName, bool pop);
|
||||
void fpuStoreIntegerQwordFromX86Reg(int32_t & StackPos, x86Reg Reg, bool pop);
|
||||
void fpuStoreQwordFromX86Reg(int32_t & StackPos, x86Reg Reg, bool pop);
|
||||
void fpuStoreStatus();
|
||||
void fpuSubDword(void * Variable, const char * VariableName);
|
||||
void fpuSubDwordRegPointer(x86Reg X86Pointer);
|
||||
|
|
Loading…
Reference in New Issue