From 464c280fa6ac82324961a3530b91545fdac64d94 Mon Sep 17 00:00:00 2001 From: zilmar Date: Sat, 3 Nov 2012 12:18:08 +1100 Subject: [PATCH] Change some of the Reg Info functions to be get and setters --- .../N64 System/Mips/Memory Virtual Mem.cpp | 172 ++-- .../N64 System/Recompiler/Code Section.cpp | 92 +- .../N64 System/Recompiler/Loop Analysis.cpp | 92 +- .../N64 System/Recompiler/Recompiler Ops.cpp | 832 +++++++++--------- .../N64 System/Recompiler/Recompiler Ops.h | 13 +- .../N64 System/Recompiler/Reg Info.cpp | 118 +-- .../N64 System/Recompiler/Reg Info.h | 35 +- 7 files changed, 674 insertions(+), 680 deletions(-) diff --git a/Source/Project64/N64 System/Mips/Memory Virtual Mem.cpp b/Source/Project64/N64 System/Mips/Memory Virtual Mem.cpp index ad9844471..c8148ce3d 100644 --- a/Source/Project64/N64 System/Mips/Memory Virtual Mem.cpp +++ b/Source/Project64/N64 System/Mips/Memory Virtual Mem.cpp @@ -1320,9 +1320,9 @@ void CMipsMemoryVM::ResetMemoryStack ( void) if (IsUnknown(MipsReg)) { MoveVariableToX86reg(&_GPR[MipsReg].UW[0],CRegName::GPR_Lo[MipsReg],Reg); } else if (IsMapped(MipsReg)) { - MoveX86RegToX86Reg(MipsRegMapLo(MipsReg),Reg); + MoveX86RegToX86Reg(GetMipsRegMapLo(MipsReg),Reg); } else { - MoveConstToX86reg(MipsRegLo(MipsReg),Reg); + MoveConstToX86reg(GetMipsRegLo(MipsReg),Reg); } } @@ -2432,7 +2432,7 @@ void CMipsMemoryVM::Compile_LB (void) if (IsConst(Opcode.base)) { DWORD Address = (cMipsRegLo(Opcode.base) + (short)Opcode.offset) ^ 3; Map_GPR_32bit(Opcode.rt,TRUE,0); - Compile_LB(MipsRegMapLo(Opcode.rt),Address,TRUE); + Compile_LB(GetMipsRegMapLo(Opcode.rt),Address,TRUE); return; } if (IsMapped(Opcode.rt)) { ProtectGPR(Opcode.rt); } @@ -2440,7 +2440,7 @@ void CMipsMemoryVM::Compile_LB (void) ProtectGPR(Opcode.base); if (Opcode.offset != 0) { TempReg1 = Map_TempReg(x86_Any,-1,FALSE); - LeaSourceAndOffset(TempReg1,MipsRegMapLo(Opcode.base),(short)Opcode.offset); + LeaSourceAndOffset(TempReg1,GetMipsRegMapLo(Opcode.base),(short)Opcode.offset); } else { TempReg1 = Map_TempReg(x86_Any,Opcode.base,FALSE); } @@ -2456,12 +2456,12 @@ void CMipsMemoryVM::Compile_LB (void) CompileReadTLBMiss(TempReg1,TempReg2); XorConstToX86Reg(TempReg1,3); Map_GPR_32bit(Opcode.rt,TRUE,-1); - MoveSxByteX86regPointerToX86reg(TempReg1, TempReg2,MipsRegMapLo(Opcode.rt)); + MoveSxByteX86regPointerToX86reg(TempReg1, TempReg2,GetMipsRegMapLo(Opcode.rt)); } else { AndConstToX86Reg(TempReg1,0x1FFFFFFF); XorConstToX86Reg(TempReg1,3); Map_GPR_32bit(Opcode.rt,TRUE,-1); - MoveSxN64MemToX86regByte(MipsRegMapLo(Opcode.rt), TempReg1); + MoveSxN64MemToX86regByte(GetMipsRegMapLo(Opcode.rt), TempReg1); } } @@ -2477,7 +2477,7 @@ void CMipsMemoryVM::Compile_LBU (void) if (IsConst(Opcode.base)) { DWORD Address = (cMipsRegLo(Opcode.base) + (short)Opcode.offset) ^ 3; Map_GPR_32bit(Opcode.rt,FALSE,0); - Compile_LB(MipsRegMapLo(Opcode.rt),Address,FALSE); + Compile_LB(GetMipsRegMapLo(Opcode.rt),Address,FALSE); return; } if (IsMapped(Opcode.rt)) { ProtectGPR(Opcode.rt); } @@ -2485,7 +2485,7 @@ void CMipsMemoryVM::Compile_LBU (void) ProtectGPR(Opcode.base); if (Opcode.offset != 0) { TempReg1 = Map_TempReg(x86_Any,-1,FALSE); - LeaSourceAndOffset(TempReg1,MipsRegMapLo(Opcode.base),(short)Opcode.offset); + LeaSourceAndOffset(TempReg1,GetMipsRegMapLo(Opcode.base),(short)Opcode.offset); } else { TempReg1 = Map_TempReg(x86_Any,Opcode.base,FALSE); } @@ -2501,12 +2501,12 @@ void CMipsMemoryVM::Compile_LBU (void) CompileReadTLBMiss(TempReg1,TempReg2); XorConstToX86Reg(TempReg1,3); Map_GPR_32bit(Opcode.rt,FALSE,-1); - MoveZxByteX86regPointerToX86reg(TempReg1, TempReg2,MipsRegMapLo(Opcode.rt)); + MoveZxByteX86regPointerToX86reg(TempReg1, TempReg2,GetMipsRegMapLo(Opcode.rt)); } else { AndConstToX86Reg(TempReg1,0x1FFFFFFF); XorConstToX86Reg(TempReg1,3); Map_GPR_32bit(Opcode.rt,FALSE,-1); - MoveZxN64MemToX86regByte(MipsRegMapLo(Opcode.rt), TempReg1); + MoveZxN64MemToX86regByte(GetMipsRegMapLo(Opcode.rt), TempReg1); } } @@ -2522,7 +2522,7 @@ void CMipsMemoryVM::Compile_LH (void) if (IsConst(Opcode.base)) { DWORD Address = (cMipsRegLo(Opcode.base) + (short)Opcode.offset) ^ 2; Map_GPR_32bit(Opcode.rt,TRUE,0); - Compile_LH(MipsRegMapLo(Opcode.rt),Address,TRUE); + Compile_LH(GetMipsRegMapLo(Opcode.rt),Address,TRUE); return; } if (IsMapped(Opcode.rt)) { ProtectGPR(Opcode.rt); } @@ -2530,7 +2530,7 @@ void CMipsMemoryVM::Compile_LH (void) ProtectGPR(Opcode.base); if (Opcode.offset != 0) { TempReg1 = Map_TempReg(x86_Any,-1,FALSE); - LeaSourceAndOffset(TempReg1,MipsRegMapLo(Opcode.base),(short)Opcode.offset); + LeaSourceAndOffset(TempReg1,GetMipsRegMapLo(Opcode.base),(short)Opcode.offset); } else { TempReg1 = Map_TempReg(x86_Any,Opcode.base,FALSE); } @@ -2546,12 +2546,12 @@ void CMipsMemoryVM::Compile_LH (void) CompileReadTLBMiss(TempReg1,TempReg2); XorConstToX86Reg(TempReg1,2); Map_GPR_32bit(Opcode.rt,TRUE,-1); - MoveSxHalfX86regPointerToX86reg(TempReg1, TempReg2,MipsRegMapLo(Opcode.rt)); + MoveSxHalfX86regPointerToX86reg(TempReg1, TempReg2,GetMipsRegMapLo(Opcode.rt)); } else { AndConstToX86Reg(TempReg1,0x1FFFFFFF); XorConstToX86Reg(TempReg1,2); Map_GPR_32bit(Opcode.rt,TRUE,-1); - MoveSxN64MemToX86regHalf(MipsRegMapLo(Opcode.rt), TempReg1); + MoveSxN64MemToX86regHalf(GetMipsRegMapLo(Opcode.rt), TempReg1); } } @@ -2567,7 +2567,7 @@ void CMipsMemoryVM::Compile_LHU (void) if (IsConst(Opcode.base)) { DWORD Address = (cMipsRegLo(Opcode.base) + (short)Opcode.offset) ^ 2; Map_GPR_32bit(Opcode.rt,FALSE,0); - Compile_LH(MipsRegMapLo(Opcode.rt),Address,FALSE); + Compile_LH(GetMipsRegMapLo(Opcode.rt),Address,FALSE); return; } if (IsMapped(Opcode.rt)) { ProtectGPR(Opcode.rt); } @@ -2575,7 +2575,7 @@ void CMipsMemoryVM::Compile_LHU (void) ProtectGPR(Opcode.base); if (Opcode.offset != 0) { TempReg1 = Map_TempReg(x86_Any,-1,FALSE); - LeaSourceAndOffset(TempReg1,MipsRegMapLo(Opcode.base),(short)Opcode.offset); + LeaSourceAndOffset(TempReg1,GetMipsRegMapLo(Opcode.base),(short)Opcode.offset); } else { TempReg1 = Map_TempReg(x86_Any,Opcode.base,FALSE); } @@ -2591,12 +2591,12 @@ void CMipsMemoryVM::Compile_LHU (void) CompileReadTLBMiss(TempReg1,TempReg2); XorConstToX86Reg(TempReg1,2); Map_GPR_32bit(Opcode.rt,FALSE,-1); - MoveZxHalfX86regPointerToX86reg(TempReg1, TempReg2,MipsRegMapLo(Opcode.rt)); + MoveZxHalfX86regPointerToX86reg(TempReg1, TempReg2,GetMipsRegMapLo(Opcode.rt)); } else { AndConstToX86Reg(TempReg1,0x1FFFFFFF); XorConstToX86Reg(TempReg1,2); Map_GPR_32bit(Opcode.rt,TRUE,-1); - MoveZxN64MemToX86regHalf(MipsRegMapLo(Opcode.rt), TempReg1); + MoveZxN64MemToX86regHalf(GetMipsRegMapLo(Opcode.rt), TempReg1); } } @@ -2614,24 +2614,24 @@ void CMipsMemoryVM::Compile_LW (void) Map_GPR_32bit(Opcode.rt,TRUE,-1); TempReg1 = Map_MemoryStack(x86_Any,true); sprintf(String,"%Xh",(short)Opcode.offset); - MoveVariableDispToX86Reg((void *)((DWORD)(short)Opcode.offset),String,MipsRegMapLo(Opcode.rt),TempReg1,1); + MoveVariableDispToX86Reg((void *)((DWORD)(short)Opcode.offset),String,GetMipsRegMapLo(Opcode.rt),TempReg1,1); } else { if (IsConst(Opcode.base)) { DWORD Address = cMipsRegLo(Opcode.base) + (short)Opcode.offset; Map_GPR_32bit(Opcode.rt,TRUE,-1); - Compile_LW(MipsRegMapLo(Opcode.rt),Address); + Compile_LW(GetMipsRegMapLo(Opcode.rt),Address); } else { if (bUseTlb()) { if (IsMapped(Opcode.rt)) { ProtectGPR(Opcode.rt); } if (IsMapped(Opcode.base) && Opcode.offset == 0) { ProtectGPR(Opcode.base); - TempReg1 = MipsRegMapLo(Opcode.base); + TempReg1 = GetMipsRegMapLo(Opcode.base); } else { if (IsMapped(Opcode.base)) { ProtectGPR(Opcode.base); if (Opcode.offset != 0) { TempReg1 = Map_TempReg(x86_Any,-1,FALSE); - LeaSourceAndOffset(TempReg1,MipsRegMapLo(Opcode.base),(short)Opcode.offset); + LeaSourceAndOffset(TempReg1,GetMipsRegMapLo(Opcode.base),(short)Opcode.offset); } else { TempReg1 = Map_TempReg(x86_Any,Opcode.base,FALSE); } @@ -2646,22 +2646,22 @@ void CMipsMemoryVM::Compile_LW (void) MoveVariableDispToX86Reg(m_TLB_ReadMap,"m_TLB_ReadMap",TempReg2,TempReg2,4); CompileReadTLBMiss(TempReg1,TempReg2); Map_GPR_32bit(Opcode.rt,TRUE,-1); - MoveX86regPointerToX86reg(TempReg1, TempReg2,MipsRegMapLo(Opcode.rt)); + MoveX86regPointerToX86reg(TempReg1, TempReg2,GetMipsRegMapLo(Opcode.rt)); } else { if (IsMapped(Opcode.base)) { ProtectGPR(Opcode.base); if (Opcode.offset != 0) { Map_GPR_32bit(Opcode.rt,TRUE,-1); - LeaSourceAndOffset(MipsRegMapLo(Opcode.rt),MipsRegMapLo(Opcode.base),(short)Opcode.offset); + LeaSourceAndOffset(GetMipsRegMapLo(Opcode.rt),GetMipsRegMapLo(Opcode.base),(short)Opcode.offset); } else { Map_GPR_32bit(Opcode.rt,TRUE,Opcode.base); } } else { Map_GPR_32bit(Opcode.rt,TRUE,Opcode.base); - AddConstToX86Reg(MipsRegMapLo(Opcode.rt),(short)Opcode.immediate); + AddConstToX86Reg(GetMipsRegMapLo(Opcode.rt),(short)Opcode.immediate); } - AndConstToX86Reg(MipsRegMapLo(Opcode.rt),0x1FFFFFFF); - MoveN64MemToX86reg(MipsRegMapLo(Opcode.rt),MipsRegMapLo(Opcode.rt)); + AndConstToX86Reg(GetMipsRegMapLo(Opcode.rt),0x1FFFFFFF); + MoveN64MemToX86reg(GetMipsRegMapLo(Opcode.rt),GetMipsRegMapLo(Opcode.rt)); } } } @@ -2706,7 +2706,7 @@ void CMipsMemoryVM::Compile_LWC1 (void) if (IsMapped(Opcode.base) && Opcode.offset == 0) { if (bUseTlb()) { ProtectGPR(Opcode.base); - TempReg1 = MipsRegMapLo(Opcode.base); + TempReg1 = GetMipsRegMapLo(Opcode.base); } else { TempReg1 = Map_TempReg(x86_Any,Opcode.base,FALSE); } @@ -2715,7 +2715,7 @@ void CMipsMemoryVM::Compile_LWC1 (void) ProtectGPR(Opcode.base); if (Opcode.offset != 0) { TempReg1 = Map_TempReg(x86_Any,-1,FALSE); - LeaSourceAndOffset(TempReg1,MipsRegMapLo(Opcode.base),(short)Opcode.offset); + LeaSourceAndOffset(TempReg1,GetMipsRegMapLo(Opcode.base),(short)Opcode.offset); } else { TempReg1 = Map_TempReg(x86_Any,Opcode.base,FALSE); } @@ -2767,9 +2767,9 @@ void CMipsMemoryVM::Compile_LWL (void) Map_GPR_32bit(Opcode.rt,TRUE,Opcode.rt); x86Reg Value = Map_TempReg(x86_Any,-1,FALSE); Compile_LW(Value,(Address & ~3)); - AndConstToX86Reg(MipsRegMapLo(Opcode.rt),LWL_MASK[Offset]); + AndConstToX86Reg(GetMipsRegMapLo(Opcode.rt),LWL_MASK[Offset]); ShiftLeftSignImmed(Value,(BYTE)LWL_SHIFT[Offset]); - AddX86RegToX86Reg(MipsRegMapLo(Opcode.rt),Value); + AddX86RegToX86Reg(GetMipsRegMapLo(Opcode.rt),Value); return; } @@ -2779,7 +2779,7 @@ void CMipsMemoryVM::Compile_LWL (void) ProtectGPR(Opcode.base); if (Opcode.offset != 0) { TempReg1 = Map_TempReg(x86_Any,-1,FALSE); - LeaSourceAndOffset(TempReg1,MipsRegMapLo(Opcode.base),(short)Opcode.offset); + LeaSourceAndOffset(TempReg1,GetMipsRegMapLo(Opcode.base),(short)Opcode.offset); } else { TempReg1 = Map_TempReg(x86_Any,Opcode.base,FALSE); } @@ -2802,7 +2802,7 @@ void CMipsMemoryVM::Compile_LWL (void) AndConstToX86Reg(TempReg1,(DWORD)~3); Map_GPR_32bit(Opcode.rt,TRUE,Opcode.rt); - AndVariableDispToX86Reg((void *)LWL_MASK,"LWL_MASK",MipsRegMapLo(Opcode.rt),OffsetReg,Multip_x4); + AndVariableDispToX86Reg((void *)LWL_MASK,"LWL_MASK",GetMipsRegMapLo(Opcode.rt),OffsetReg,Multip_x4); MoveVariableDispToX86Reg((void *)LWL_SHIFT,"LWL_SHIFT",shift,OffsetReg,4); if (bUseTlb()) { MoveX86regPointerToX86reg(TempReg1, TempReg2,TempReg1); @@ -2811,7 +2811,7 @@ void CMipsMemoryVM::Compile_LWL (void) MoveN64MemToX86reg(TempReg1,TempReg1); } ShiftLeftSign(TempReg1); - AddX86RegToX86Reg(MipsRegMapLo(Opcode.rt),TempReg1); + AddX86RegToX86Reg(GetMipsRegMapLo(Opcode.rt),TempReg1); } void CMipsMemoryVM::Compile_LWR (void) @@ -2830,9 +2830,9 @@ void CMipsMemoryVM::Compile_LWR (void) Map_GPR_32bit(Opcode.rt,TRUE,Opcode.rt); x86Reg Value = Map_TempReg(x86_Any,-1,FALSE); Compile_LW(Value,(Address & ~3)); - AndConstToX86Reg(MipsRegMapLo(Opcode.rt),LWR_MASK[Offset]); + AndConstToX86Reg(GetMipsRegMapLo(Opcode.rt),LWR_MASK[Offset]); ShiftRightUnsignImmed(Value,(BYTE)LWR_SHIFT[Offset]); - AddX86RegToX86Reg(MipsRegMapLo(Opcode.rt),Value); + AddX86RegToX86Reg(GetMipsRegMapLo(Opcode.rt),Value); return; } @@ -2842,7 +2842,7 @@ void CMipsMemoryVM::Compile_LWR (void) ProtectGPR(Opcode.base); if (Opcode.offset != 0) { TempReg1 = Map_TempReg(x86_Any,-1,FALSE); - LeaSourceAndOffset(TempReg1,MipsRegMapLo(Opcode.base),(short)Opcode.offset); + LeaSourceAndOffset(TempReg1,GetMipsRegMapLo(Opcode.base),(short)Opcode.offset); } else { TempReg1 = Map_TempReg(x86_Any,Opcode.base,FALSE); } @@ -2866,7 +2866,7 @@ void CMipsMemoryVM::Compile_LWR (void) AndConstToX86Reg(TempReg1,(DWORD)~3); Map_GPR_32bit(Opcode.rt,TRUE,Opcode.rt); - AndVariableDispToX86Reg((void *)LWR_MASK,"LWR_MASK",MipsRegMapLo(Opcode.rt),OffsetReg,Multip_x4); + AndVariableDispToX86Reg((void *)LWR_MASK,"LWR_MASK",GetMipsRegMapLo(Opcode.rt),OffsetReg,Multip_x4); MoveVariableDispToX86Reg((void *)LWR_SHIFT,"LWR_SHIFT",shift,OffsetReg,4); if (bUseTlb()) { MoveX86regPointerToX86reg(TempReg1, TempReg2,TempReg1); @@ -2875,7 +2875,7 @@ void CMipsMemoryVM::Compile_LWR (void) MoveN64MemToX86reg(TempReg1,TempReg1); } ShiftRightUnsign(TempReg1); - AddX86RegToX86Reg(MipsRegMapLo(Opcode.rt),TempReg1); + AddX86RegToX86Reg(GetMipsRegMapLo(Opcode.rt),TempReg1); } void CMipsMemoryVM::Compile_LWU (void) @@ -2890,7 +2890,7 @@ void CMipsMemoryVM::Compile_LWU (void) if (IsConst(Opcode.base)) { DWORD Address = (cMipsRegLo(Opcode.base) + (short)Opcode.offset); Map_GPR_32bit(Opcode.rt,FALSE,0); - Compile_LW(MipsRegMapLo(Opcode.rt),Address); + Compile_LW(GetMipsRegMapLo(Opcode.rt),Address); return; } if (IsMapped(Opcode.rt)) { ProtectGPR(Opcode.rt); } @@ -2898,7 +2898,7 @@ void CMipsMemoryVM::Compile_LWU (void) ProtectGPR(Opcode.base); if (Opcode.offset != 0) { TempReg1 = Map_TempReg(x86_Any,-1,FALSE); - LeaSourceAndOffset(TempReg1,MipsRegMapLo(Opcode.base),(short)Opcode.offset); + LeaSourceAndOffset(TempReg1,GetMipsRegMapLo(Opcode.base),(short)Opcode.offset); } else { TempReg1 = Map_TempReg(x86_Any,Opcode.base,FALSE); } @@ -2913,11 +2913,11 @@ void CMipsMemoryVM::Compile_LWU (void) MoveVariableDispToX86Reg(m_TLB_ReadMap,"m_TLB_ReadMap",TempReg2,TempReg2,4); CompileReadTLBMiss(TempReg1,TempReg2); Map_GPR_32bit(Opcode.rt,FALSE,-1); - MoveZxHalfX86regPointerToX86reg(TempReg1, TempReg2,MipsRegMapLo(Opcode.rt)); + MoveZxHalfX86regPointerToX86reg(TempReg1, TempReg2,GetMipsRegMapLo(Opcode.rt)); } else { AndConstToX86Reg(TempReg1,0x1FFFFFFF); Map_GPR_32bit(Opcode.rt,TRUE,-1); - MoveZxN64MemToX86regHalf(MipsRegMapLo(Opcode.rt), TempReg1); + MoveZxN64MemToX86regHalf(GetMipsRegMapLo(Opcode.rt), TempReg1); } } @@ -2933,8 +2933,8 @@ void CMipsMemoryVM::Compile_LD (void) if (IsConst(Opcode.base)) { DWORD Address = cMipsRegLo(Opcode.base) + (short)Opcode.offset; Map_GPR_64bit(Opcode.rt,-1); - Compile_LW(MipsRegMapHi(Opcode.rt),Address); - Compile_LW(MipsRegMapLo(Opcode.rt),Address + 4); + Compile_LW(GetMipsRegMapHi(Opcode.rt),Address); + Compile_LW(GetMipsRegMapLo(Opcode.rt),Address + 4); if (bFastSP() && Opcode.rt == 29) { ResetMemoryStack(); @@ -2945,7 +2945,7 @@ void CMipsMemoryVM::Compile_LD (void) if (IsMapped(Opcode.base) && Opcode.offset == 0) { if (bUseTlb()) { ProtectGPR(Opcode.base); - TempReg1 = MipsRegMapLo(Opcode.base); + TempReg1 = GetMipsRegMapLo(Opcode.base); } else { TempReg1 = Map_TempReg(x86_Any,Opcode.base,FALSE); } @@ -2954,7 +2954,7 @@ void CMipsMemoryVM::Compile_LD (void) ProtectGPR(Opcode.base); if (Opcode.offset != 0) { TempReg1 = Map_TempReg(x86_Any,-1,FALSE); - LeaSourceAndOffset(TempReg1,MipsRegMapLo(Opcode.base),(short)Opcode.offset); + LeaSourceAndOffset(TempReg1,GetMipsRegMapLo(Opcode.base),(short)Opcode.offset); } else { TempReg1 = Map_TempReg(x86_Any,Opcode.base,FALSE); } @@ -2972,13 +2972,13 @@ void CMipsMemoryVM::Compile_LD (void) //0041C522 85 C0 test eax,eax //0041C524 75 01 jne 0041C527 Map_GPR_64bit(Opcode.rt,-1); - MoveX86regPointerToX86reg(TempReg1, TempReg2,MipsRegMapHi(Opcode.rt)); - MoveX86regPointerToX86regDisp8(TempReg1, TempReg2,MipsRegMapLo(Opcode.rt),4); + MoveX86regPointerToX86reg(TempReg1, TempReg2,GetMipsRegMapHi(Opcode.rt)); + MoveX86regPointerToX86regDisp8(TempReg1, TempReg2,GetMipsRegMapLo(Opcode.rt),4); } else { AndConstToX86Reg(TempReg1,0x1FFFFFFF); Map_GPR_64bit(Opcode.rt,-1); - MoveN64MemToX86reg(MipsRegMapHi(Opcode.rt),TempReg1); - MoveN64MemDispToX86reg(MipsRegMapLo(Opcode.rt),TempReg1,4); + MoveN64MemToX86reg(GetMipsRegMapHi(Opcode.rt),TempReg1); + MoveN64MemDispToX86reg(GetMipsRegMapLo(Opcode.rt),TempReg1,4); } if (bFastSP() && Opcode.rt == 29) { @@ -3018,7 +3018,7 @@ void CMipsMemoryVM::Compile_LDC1 (void) if (IsMapped(Opcode.base) && Opcode.offset == 0) { if (bUseTlb()) { ProtectGPR(Opcode.base); - TempReg1 = MipsRegMapLo(Opcode.base); + TempReg1 = GetMipsRegMapLo(Opcode.base); } else { TempReg1 = Map_TempReg(x86_Any,Opcode.base,FALSE); } @@ -3027,7 +3027,7 @@ void CMipsMemoryVM::Compile_LDC1 (void) ProtectGPR(Opcode.base); if (Opcode.offset != 0) { TempReg1 = Map_TempReg(x86_Any,-1,FALSE); - LeaSourceAndOffset(TempReg1,MipsRegMapLo(Opcode.base),(short)Opcode.offset); + LeaSourceAndOffset(TempReg1,GetMipsRegMapLo(Opcode.base),(short)Opcode.offset); } else { TempReg1 = Map_TempReg(x86_Any,Opcode.base,FALSE); } @@ -3117,8 +3117,8 @@ void CMipsMemoryVM::Compile_SB (void) if (IsConst(Opcode.rt)) { Compile_SB_Const((BYTE)cMipsRegLo(Opcode.rt), Address); - } else if (IsMapped(Opcode.rt) && Is8BitReg(MipsRegMapLo(Opcode.rt))) { - Compile_SB_Register(MipsRegMapLo(Opcode.rt), Address); + } else if (IsMapped(Opcode.rt) && Is8BitReg(GetMipsRegMapLo(Opcode.rt))) { + Compile_SB_Register(GetMipsRegMapLo(Opcode.rt), Address); } else { Compile_SB_Register(Map_TempReg(x86_Any8Bit,Opcode.rt,FALSE), Address); } @@ -3129,7 +3129,7 @@ void CMipsMemoryVM::Compile_SB (void) ProtectGPR(Opcode.base); if (Opcode.offset != 0) { TempReg1 = Map_TempReg(x86_Any,-1,FALSE); - LeaSourceAndOffset(TempReg1,MipsRegMapLo(Opcode.base),(short)Opcode.offset); + LeaSourceAndOffset(TempReg1,GetMipsRegMapLo(Opcode.base),(short)Opcode.offset); } else { TempReg1 = Map_TempReg(x86_Any,Opcode.base,FALSE); } @@ -3151,8 +3151,8 @@ void CMipsMemoryVM::Compile_SB (void) XorConstToX86Reg(TempReg1,3); if (IsConst(Opcode.rt)) { MoveConstByteToX86regPointer((BYTE)cMipsRegLo(Opcode.rt),TempReg1, TempReg2); - } else if (IsMapped(Opcode.rt) && Is8BitReg(MipsRegMapLo(Opcode.rt))) { - MoveX86regByteToX86regPointer(MipsRegMapLo(Opcode.rt),TempReg1, TempReg2); + } else if (IsMapped(Opcode.rt) && Is8BitReg(GetMipsRegMapLo(Opcode.rt))) { + MoveX86regByteToX86regPointer(GetMipsRegMapLo(Opcode.rt),TempReg1, TempReg2); } else { UnProtectGPR(Opcode.rt); MoveX86regByteToX86regPointer(Map_TempReg(x86_Any8Bit,Opcode.rt,FALSE),TempReg1, TempReg2); @@ -3162,8 +3162,8 @@ void CMipsMemoryVM::Compile_SB (void) XorConstToX86Reg(TempReg1,3); if (IsConst(Opcode.rt)) { MoveConstByteToN64Mem((BYTE)cMipsRegLo(Opcode.rt),TempReg1); - } else if (IsMapped(Opcode.rt) && Is8BitReg(MipsRegMapLo(Opcode.rt))) { - MoveX86regByteToN64Mem(MipsRegMapLo(Opcode.rt),TempReg1); + } else if (IsMapped(Opcode.rt) && Is8BitReg(GetMipsRegMapLo(Opcode.rt))) { + MoveX86regByteToN64Mem(GetMipsRegMapLo(Opcode.rt),TempReg1); } else { UnProtectGPR(Opcode.rt); MoveX86regByteToN64Mem(Map_TempReg(x86_Any8Bit,Opcode.rt,FALSE),TempReg1); @@ -3184,7 +3184,7 @@ void CMipsMemoryVM::Compile_SH (void) if (IsConst(Opcode.rt)) { Compile_SH_Const((WORD)cMipsRegLo(Opcode.rt), Address); } else if (IsMapped(Opcode.rt)) { - Compile_SH_Register(MipsRegMapLo(Opcode.rt), Address); + Compile_SH_Register(GetMipsRegMapLo(Opcode.rt), Address); } else { Compile_SH_Register(Map_TempReg(x86_Any,Opcode.rt,FALSE), Address); } @@ -3195,7 +3195,7 @@ void CMipsMemoryVM::Compile_SH (void) ProtectGPR(Opcode.base); if (Opcode.offset != 0) { TempReg1 = Map_TempReg(x86_Any,-1,FALSE); - LeaSourceAndOffset(TempReg1,MipsRegMapLo(Opcode.base),(short)Opcode.offset); + LeaSourceAndOffset(TempReg1,GetMipsRegMapLo(Opcode.base),(short)Opcode.offset); } else { TempReg1 = Map_TempReg(x86_Any,Opcode.base,FALSE); } @@ -3217,7 +3217,7 @@ void CMipsMemoryVM::Compile_SH (void) if (IsConst(Opcode.rt)) { MoveConstHalfToX86regPointer((WORD)cMipsRegLo(Opcode.rt),TempReg1, TempReg2); } else if (IsMapped(Opcode.rt)) { - MoveX86regHalfToX86regPointer(MipsRegMapLo(Opcode.rt),TempReg1, TempReg2); + MoveX86regHalfToX86regPointer(GetMipsRegMapLo(Opcode.rt),TempReg1, TempReg2); } else { MoveX86regHalfToX86regPointer(Map_TempReg(x86_Any,Opcode.rt,FALSE),TempReg1, TempReg2); } @@ -3227,7 +3227,7 @@ void CMipsMemoryVM::Compile_SH (void) if (IsConst(Opcode.rt)) { MoveConstHalfToN64Mem((WORD)cMipsRegLo(Opcode.rt),TempReg1); } else if (IsMapped(Opcode.rt)) { - MoveX86regHalfToN64Mem(MipsRegMapLo(Opcode.rt),TempReg1); + MoveX86regHalfToN64Mem(GetMipsRegMapLo(Opcode.rt),TempReg1); } else { MoveX86regHalfToN64Mem(Map_TempReg(x86_Any,Opcode.rt,FALSE),TempReg1); } @@ -3247,7 +3247,7 @@ void CMipsMemoryVM::Compile_SW (void) if (IsConst(Opcode.rt)) { MoveConstToMemoryDisp (cMipsRegLo(Opcode.rt),TempReg1, (DWORD)((short)Opcode.offset)); } else if (IsMapped(Opcode.rt)) { - MoveX86regToMemory(MipsRegMapLo(Opcode.rt),TempReg1,(DWORD)((short)Opcode.offset)); + MoveX86regToMemory(GetMipsRegMapLo(Opcode.rt),TempReg1,(DWORD)((short)Opcode.offset)); } else { TempReg2 = Map_TempReg(x86_Any,Opcode.rt,FALSE); MoveX86regToMemory(TempReg2,TempReg1,(DWORD)((short)Opcode.offset)); @@ -3259,7 +3259,7 @@ void CMipsMemoryVM::Compile_SW (void) if (IsConst(Opcode.rt)) { Compile_SW_Const(cMipsRegLo(Opcode.rt), Address); } else if (IsMapped(Opcode.rt)) { - Compile_SW_Register(MipsRegMapLo(Opcode.rt), Address); + Compile_SW_Register(GetMipsRegMapLo(Opcode.rt), Address); } else { Compile_SW_Register(Map_TempReg(x86_Any,Opcode.rt,FALSE), Address); } @@ -3276,7 +3276,7 @@ void CMipsMemoryVM::Compile_SW (void) } if (Opcode.offset != 0) { TempReg1 = Map_TempReg(x86_Any,-1,FALSE); - LeaSourceAndOffset(TempReg1,MipsRegMapLo(Opcode.base),(short)Opcode.offset); + LeaSourceAndOffset(TempReg1,GetMipsRegMapLo(Opcode.base),(short)Opcode.offset); } else { TempReg1 = Map_TempReg(x86_Any,Opcode.base,FALSE); } @@ -3298,7 +3298,7 @@ void CMipsMemoryVM::Compile_SW (void) if (IsConst(Opcode.rt)) { MoveConstToX86regPointer(cMipsRegLo(Opcode.rt),TempReg1, TempReg2); } else if (IsMapped(Opcode.rt)) { - MoveX86regToX86regPointer(MipsRegMapLo(Opcode.rt),TempReg1, TempReg2); + MoveX86regToX86regPointer(GetMipsRegMapLo(Opcode.rt),TempReg1, TempReg2); } else { MoveX86regToX86regPointer(Map_TempReg(x86_Any,Opcode.rt,FALSE),TempReg1, TempReg2); } @@ -3307,7 +3307,7 @@ void CMipsMemoryVM::Compile_SW (void) if (IsConst(Opcode.rt)) { MoveConstToN64Mem(cMipsRegLo(Opcode.rt),TempReg1); } else if (IsMapped(Opcode.rt)) { - MoveX86regToN64Mem(MipsRegMapLo(Opcode.rt),TempReg1); + MoveX86regToN64Mem(GetMipsRegMapLo(Opcode.rt),TempReg1); } else { MoveX86regToN64Mem(Map_TempReg(x86_Any,Opcode.rt,FALSE),TempReg1); } @@ -3341,7 +3341,7 @@ void CMipsMemoryVM::Compile_SWC1 (void) ProtectGPR(Opcode.base); if (Opcode.offset != 0) { TempReg1 = Map_TempReg(x86_Any,-1,FALSE); - LeaSourceAndOffset(TempReg1,MipsRegMapLo(Opcode.base),(short)Opcode.offset); + LeaSourceAndOffset(TempReg1,GetMipsRegMapLo(Opcode.base),(short)Opcode.offset); } else { TempReg1 = Map_TempReg(x86_Any,Opcode.base,FALSE); } @@ -3410,7 +3410,7 @@ void CMipsMemoryVM::Compile_SWL (void) ProtectGPR(Opcode.base); if (Opcode.offset != 0) { TempReg1 = Map_TempReg(x86_Any,-1,FALSE); - LeaSourceAndOffset(TempReg1,MipsRegMapLo(Opcode.base),(short)Opcode.offset); + LeaSourceAndOffset(TempReg1,GetMipsRegMapLo(Opcode.base),(short)Opcode.offset); } else { TempReg1 = Map_TempReg(x86_Any,Opcode.base,FALSE); } @@ -3449,7 +3449,7 @@ void CMipsMemoryVM::Compile_SWL (void) if (IsConst(Opcode.rt)) { MoveConstToX86reg(cMipsRegLo(Opcode.rt),OffsetReg); } else if (IsMapped(Opcode.rt)) { - MoveX86RegToX86Reg(MipsRegMapLo(Opcode.rt),OffsetReg); + MoveX86RegToX86Reg(GetMipsRegMapLo(Opcode.rt),OffsetReg); } else { MoveVariableToX86reg(&_GPR[Opcode.rt].UW[0],CRegName::GPR_Lo[Opcode.rt],OffsetReg); } @@ -3494,7 +3494,7 @@ void CMipsMemoryVM::Compile_SWR (void) ProtectGPR(Opcode.base); if (Opcode.offset != 0) { TempReg1 = Map_TempReg(x86_Any,-1,FALSE); - LeaSourceAndOffset(TempReg1,MipsRegMapLo(Opcode.base),(short)Opcode.offset); + LeaSourceAndOffset(TempReg1,GetMipsRegMapLo(Opcode.base),(short)Opcode.offset); } else { TempReg1 = Map_TempReg(x86_Any,Opcode.base,FALSE); } @@ -3533,7 +3533,7 @@ void CMipsMemoryVM::Compile_SWR (void) if (IsConst(Opcode.rt)) { MoveConstToX86reg(cMipsRegLo(Opcode.rt),OffsetReg); } else if (IsMapped(Opcode.rt)) { - MoveX86RegToX86Reg(MipsRegMapLo(Opcode.rt),OffsetReg); + MoveX86RegToX86Reg(GetMipsRegMapLo(Opcode.rt),OffsetReg); } else { MoveVariableToX86reg(&_GPR[Opcode.rt].UW[0],CRegName::GPR_Lo[Opcode.rt],OffsetReg); } @@ -3615,11 +3615,11 @@ void CMipsMemoryVM::Compile_SD (void) DWORD Address = cMipsRegLo(Opcode.base) + (short)Opcode.offset; if (IsConst(Opcode.rt)) { - Compile_SW_Const(Is64Bit(Opcode.rt) ? MipsRegHi(Opcode.rt) : (MipsRegLo_S(Opcode.rt) >> 31), Address); + Compile_SW_Const(Is64Bit(Opcode.rt) ? GetMipsRegHi(Opcode.rt) : (GetMipsRegLo_S(Opcode.rt) >> 31), Address); Compile_SW_Const(cMipsRegLo(Opcode.rt), Address + 4); } else if (IsMapped(Opcode.rt)) { - Compile_SW_Register(Is64Bit(Opcode.rt) ? MipsRegMapHi(Opcode.rt) : Map_TempReg(x86_Any,Opcode.rt,TRUE), Address); - Compile_SW_Register(MipsRegMapLo(Opcode.rt), Address + 4); + Compile_SW_Register(Is64Bit(Opcode.rt) ? GetMipsRegMapHi(Opcode.rt) : Map_TempReg(x86_Any,Opcode.rt,TRUE), Address); + Compile_SW_Register(GetMipsRegMapLo(Opcode.rt), Address + 4); } else { TempReg1 = Map_TempReg(x86_Any,Opcode.rt,TRUE); Compile_SW_Register(TempReg1, Address); @@ -3631,7 +3631,7 @@ void CMipsMemoryVM::Compile_SD (void) ProtectGPR(Opcode.base); if (Opcode.offset != 0) { TempReg1 = Map_TempReg(x86_Any,-1,FALSE); - LeaSourceAndOffset(TempReg1,MipsRegMapLo(Opcode.base),(short)Opcode.offset); + LeaSourceAndOffset(TempReg1,GetMipsRegMapLo(Opcode.base),(short)Opcode.offset); } else { TempReg1 = Map_TempReg(x86_Any,Opcode.base,FALSE); } @@ -3654,20 +3654,20 @@ void CMipsMemoryVM::Compile_SD (void) if (IsConst(Opcode.rt)) { if (Is64Bit(Opcode.rt)) { - MoveConstToX86regPointer(MipsRegHi(Opcode.rt),TempReg1, TempReg2); + MoveConstToX86regPointer(GetMipsRegHi(Opcode.rt),TempReg1, TempReg2); } else { - MoveConstToX86regPointer((MipsRegLo_S(Opcode.rt) >> 31),TempReg1, TempReg2); + MoveConstToX86regPointer((GetMipsRegLo_S(Opcode.rt) >> 31),TempReg1, TempReg2); } AddConstToX86Reg(TempReg1,4); MoveConstToX86regPointer(cMipsRegLo(Opcode.rt),TempReg1, TempReg2); } else if (IsMapped(Opcode.rt)) { if (Is64Bit(Opcode.rt)) { - MoveX86regToX86regPointer(MipsRegMapHi(Opcode.rt),TempReg1, TempReg2); + MoveX86regToX86regPointer(GetMipsRegMapHi(Opcode.rt),TempReg1, TempReg2); } else { MoveX86regToX86regPointer(Map_TempReg(x86_Any,Opcode.rt,TRUE),TempReg1, TempReg2); } AddConstToX86Reg(TempReg1,4); - MoveX86regToX86regPointer(MipsRegMapLo(Opcode.rt),TempReg1, TempReg2); + MoveX86regToX86regPointer(GetMipsRegMapLo(Opcode.rt),TempReg1, TempReg2); } else { x86Reg Reg = Map_TempReg(x86_Any,Opcode.rt,TRUE); MoveX86regToX86regPointer(Reg,TempReg1, TempReg2); @@ -3678,7 +3678,7 @@ void CMipsMemoryVM::Compile_SD (void) AndConstToX86Reg(TempReg1,0x1FFFFFFF); if (IsConst(Opcode.rt)) { if (Is64Bit(Opcode.rt)) { - MoveConstToN64Mem(MipsRegHi(Opcode.rt),TempReg1); + MoveConstToN64Mem(GetMipsRegHi(Opcode.rt),TempReg1); } else if (IsSigned(Opcode.rt)) { MoveConstToN64Mem((cMipsRegLo_S(Opcode.rt) >> 31),TempReg1); } else { @@ -3687,13 +3687,13 @@ void CMipsMemoryVM::Compile_SD (void) MoveConstToN64MemDisp(cMipsRegLo(Opcode.rt),TempReg1,4); } else if (IsKnown(Opcode.rt) && IsMapped(Opcode.rt)) { if (Is64Bit(Opcode.rt)) { - MoveX86regToN64Mem(MipsRegMapHi(Opcode.rt),TempReg1); + MoveX86regToN64Mem(GetMipsRegMapHi(Opcode.rt),TempReg1); } else if (IsSigned(Opcode.rt)) { MoveX86regToN64Mem(Map_TempReg(x86_Any,Opcode.rt,TRUE), TempReg1); } else { MoveConstToN64Mem(0,TempReg1); } - MoveX86regToN64MemDisp(MipsRegMapLo(Opcode.rt),TempReg1, 4); + MoveX86regToN64MemDisp(GetMipsRegMapLo(Opcode.rt),TempReg1, 4); } else { x86Reg Reg; MoveX86regToN64Mem(Reg = Map_TempReg(x86_Any,Opcode.rt,TRUE), TempReg1); @@ -3733,7 +3733,7 @@ void CMipsMemoryVM::Compile_SDC1 (void) ProtectGPR(Opcode.base); if (Opcode.offset != 0) { TempReg1 = Map_TempReg(x86_Any,-1,FALSE); - LeaSourceAndOffset(TempReg1,MipsRegMapLo(Opcode.base),(short)Opcode.offset); + LeaSourceAndOffset(TempReg1,GetMipsRegMapLo(Opcode.base),(short)Opcode.offset); } else { TempReg1 = Map_TempReg(x86_Any,Opcode.base,FALSE); } diff --git a/Source/Project64/N64 System/Recompiler/Code Section.cpp b/Source/Project64/N64 System/Recompiler/Code Section.cpp index eb1aefff6..e94bafa1a 100644 --- a/Source/Project64/N64 System/Recompiler/Code Section.cpp +++ b/Source/Project64/N64 System/Recompiler/Code Section.cpp @@ -654,15 +654,15 @@ void CCodeSection::SyncRegState ( const CRegInfo & SyncTo ) switch (MipsRegState(i)) { case CRegInfo::STATE_UNKNOWN: continue; case CRegInfo::STATE_MAPPED_64: - if (MipsRegMapHi(i) == SyncTo.MipsRegMapHi(i) && - MipsRegMapLo(i) == SyncTo.MipsRegMapLo(i)) + if (GetMipsRegMapHi(i) == SyncTo.GetMipsRegMapHi(i) && + GetMipsRegMapLo(i) == SyncTo.GetMipsRegMapLo(i)) { continue; } break; case CRegInfo::STATE_MAPPED_32_ZERO: case CRegInfo::STATE_MAPPED_32_SIGN: - if (MipsRegMapLo(i) == SyncTo.MipsRegMapLo(i)) { + if (GetMipsRegMapLo(i) == SyncTo.GetMipsRegMapLo(i)) { continue; } break; @@ -673,9 +673,9 @@ void CCodeSection::SyncRegState ( const CRegInfo & SyncTo ) } continue; case CRegInfo::STATE_CONST_32: - if (MipsRegLo(i) != SyncTo.cMipsRegLo(i)) + if (GetMipsRegLo(i) != SyncTo.cMipsRegLo(i)) { - CPU_Message("Value of const is different Reg %d (%s) Value: 0x%08X to 0x%08X",i,CRegName::GPR[i],MipsRegLo(i),SyncTo.cMipsRegLo(i)); + CPU_Message("Value of const is different Reg %d (%s) Value: 0x%08X to 0x%08X",i,CRegName::GPR[i],GetMipsRegLo(i),SyncTo.cMipsRegLo(i)); _Notify->BreakPoint(__FILE__,__LINE__); } continue; @@ -690,8 +690,8 @@ void CCodeSection::SyncRegState ( const CRegInfo & SyncTo ) case CRegInfo::STATE_UNKNOWN: UnMap_GPR(i,true); break; case CRegInfo::STATE_MAPPED_64: { - x86Reg Reg = SyncTo.MipsRegMapLo(i); - x86Reg x86RegHi = SyncTo.MipsRegMapHi(i); + x86Reg Reg = SyncTo.GetMipsRegMapLo(i); + x86Reg x86RegHi = SyncTo.GetMipsRegMapHi(i); UnMap_X86reg(Reg); UnMap_X86reg(x86RegHi); switch (MipsRegState(i)) { @@ -700,29 +700,29 @@ void CCodeSection::SyncRegState ( const CRegInfo & SyncTo ) MoveVariableToX86reg(&_GPR[i].UW[1],CRegName::GPR_Hi[i],x86RegHi); break; case CRegInfo::STATE_MAPPED_64: - MoveX86RegToX86Reg(MipsRegMapLo(i),Reg); - m_RegWorkingSet.SetX86Mapped(MipsRegMapLo(i),CRegInfo::NotMapped); - MoveX86RegToX86Reg(MipsRegMapHi(i),x86RegHi); - m_RegWorkingSet.SetX86Mapped(MipsRegMapHi(i),CRegInfo::NotMapped); + MoveX86RegToX86Reg(GetMipsRegMapLo(i),Reg); + m_RegWorkingSet.SetX86Mapped(GetMipsRegMapLo(i),CRegInfo::NotMapped); + MoveX86RegToX86Reg(GetMipsRegMapHi(i),x86RegHi); + m_RegWorkingSet.SetX86Mapped(GetMipsRegMapHi(i),CRegInfo::NotMapped); break; case CRegInfo::STATE_MAPPED_32_SIGN: - MoveX86RegToX86Reg(MipsRegMapLo(i),x86RegHi); + MoveX86RegToX86Reg(GetMipsRegMapLo(i),x86RegHi); ShiftRightSignImmed(x86RegHi,31); - MoveX86RegToX86Reg(MipsRegMapLo(i),Reg); - m_RegWorkingSet.SetX86Mapped(MipsRegMapLo(i),CRegInfo::NotMapped); + MoveX86RegToX86Reg(GetMipsRegMapLo(i),Reg); + m_RegWorkingSet.SetX86Mapped(GetMipsRegMapLo(i),CRegInfo::NotMapped); break; case CRegInfo::STATE_MAPPED_32_ZERO: XorX86RegToX86Reg(x86RegHi,x86RegHi); - MoveX86RegToX86Reg(MipsRegMapLo(i),Reg); - m_RegWorkingSet.SetX86Mapped(MipsRegMapLo(i), CRegInfo::NotMapped); + MoveX86RegToX86Reg(GetMipsRegMapLo(i),Reg); + m_RegWorkingSet.SetX86Mapped(GetMipsRegMapLo(i), CRegInfo::NotMapped); break; case CRegInfo::STATE_CONST_64: - MoveConstToX86reg(MipsRegHi(i),x86RegHi); - MoveConstToX86reg(MipsRegLo(i),Reg); + MoveConstToX86reg(GetMipsRegHi(i),x86RegHi); + MoveConstToX86reg(GetMipsRegLo(i),Reg); break; case CRegInfo::STATE_CONST_32: - MoveConstToX86reg(MipsRegLo_S(i) >> 31,x86RegHi); - MoveConstToX86reg(MipsRegLo(i),Reg); + MoveConstToX86reg(GetMipsRegLo_S(i) >> 31,x86RegHi); + MoveConstToX86reg(GetMipsRegLo(i),Reg); break; default: CPU_Message("Do something with states in SyncRegState\nSTATE_MAPPED_64\n%d",MipsRegState(i)); @@ -740,28 +740,28 @@ void CCodeSection::SyncRegState ( const CRegInfo & SyncTo ) break; case CRegInfo::STATE_MAPPED_32_SIGN: { - x86Reg Reg = SyncTo.MipsRegMapLo(i); + x86Reg Reg = SyncTo.GetMipsRegMapLo(i); UnMap_X86reg(Reg); switch (MipsRegState(i)) { case CRegInfo::STATE_UNKNOWN: MoveVariableToX86reg(&_GPR[i].UW[0],CRegName::GPR_Lo[i],Reg); break; - case CRegInfo::STATE_CONST_32: MoveConstToX86reg(MipsRegLo(i),Reg); break; + case CRegInfo::STATE_CONST_32: MoveConstToX86reg(GetMipsRegLo(i),Reg); break; case CRegInfo::STATE_MAPPED_32_SIGN: - MoveX86RegToX86Reg(MipsRegMapLo(i),Reg); - m_RegWorkingSet.SetX86Mapped(MipsRegMapLo(i),CRegInfo::NotMapped); + MoveX86RegToX86Reg(GetMipsRegMapLo(i),Reg); + m_RegWorkingSet.SetX86Mapped(GetMipsRegMapLo(i),CRegInfo::NotMapped); break; case CRegInfo::STATE_MAPPED_32_ZERO: - if (MipsRegMapLo(i) != Reg) { - MoveX86RegToX86Reg(MipsRegMapLo(i),Reg); - m_RegWorkingSet.SetX86Mapped(MipsRegMapLo(i),CRegInfo::NotMapped); + if (GetMipsRegMapLo(i) != Reg) { + MoveX86RegToX86Reg(GetMipsRegMapLo(i),Reg); + m_RegWorkingSet.SetX86Mapped(GetMipsRegMapLo(i),CRegInfo::NotMapped); } break; case CRegInfo::STATE_MAPPED_64: - MoveX86RegToX86Reg(MipsRegMapLo(i),Reg); - m_RegWorkingSet.SetX86Mapped(MipsRegMapLo(i),CRegInfo::NotMapped) ; - m_RegWorkingSet.SetX86Mapped(MipsRegMapHi(i),CRegInfo::NotMapped); + MoveX86RegToX86Reg(GetMipsRegMapLo(i),Reg); + m_RegWorkingSet.SetX86Mapped(GetMipsRegMapLo(i),CRegInfo::NotMapped) ; + m_RegWorkingSet.SetX86Mapped(GetMipsRegMapHi(i),CRegInfo::NotMapped); break; case CRegInfo::STATE_CONST_64: - CPU_Message("hi %X\nLo %X",MipsRegHi(i),MipsRegLo(i)); + CPU_Message("hi %X\nLo %X",GetMipsRegHi(i),GetMipsRegLo(i)); default: CPU_Message("Do something with states in SyncRegState\nSTATE_MAPPED_32_SIGN\n%d",MipsRegState(i)); _Notify->BreakPoint(__FILE__,__LINE__); @@ -774,7 +774,7 @@ void CCodeSection::SyncRegState ( const CRegInfo & SyncTo ) break; case CRegInfo::STATE_MAPPED_32_ZERO: { - x86Reg Reg = SyncTo.MipsRegMapLo(i); + x86Reg Reg = SyncTo.GetMipsRegMapLo(i); UnMap_X86reg(Reg); switch (MipsRegState(i)) { case CRegInfo::STATE_MAPPED_64: @@ -782,27 +782,27 @@ void CCodeSection::SyncRegState ( const CRegInfo & SyncTo ) MoveVariableToX86reg(&_GPR[i].UW[0],CRegName::GPR_Lo[i],Reg); break; case CRegInfo::STATE_MAPPED_32_ZERO: - MoveX86RegToX86Reg(MipsRegMapLo(i),Reg); - m_RegWorkingSet.SetX86Mapped(MipsRegMapLo(i),CRegInfo::NotMapped); + MoveX86RegToX86Reg(GetMipsRegMapLo(i),Reg); + m_RegWorkingSet.SetX86Mapped(GetMipsRegMapLo(i),CRegInfo::NotMapped); break; case CRegInfo::STATE_MAPPED_32_SIGN: if (b32BitCore()) { - MoveX86RegToX86Reg(MipsRegMapLo(i),Reg); - m_RegWorkingSet.SetX86Mapped(MipsRegMapLo(i),CRegInfo::NotMapped); + MoveX86RegToX86Reg(GetMipsRegMapLo(i),Reg); + m_RegWorkingSet.SetX86Mapped(GetMipsRegMapLo(i),CRegInfo::NotMapped); } else { CPU_Message("Do something with states in SyncRegState\nSTATE_MAPPED_32_ZERO\n%d",MipsRegState(i)); _Notify->BreakPoint(__FILE__,__LINE__); } break; case CRegInfo::STATE_CONST_32: - if (!b32BitCore() && MipsRegLo_S(i) < 0) + if (!b32BitCore() && GetMipsRegLo_S(i) < 0) { CPU_Message("Sign Problems in SyncRegState\nSTATE_MAPPED_32_ZERO"); - CPU_Message("%s: %X",CRegName::GPR[i],MipsRegLo_S(i)); + CPU_Message("%s: %X",CRegName::GPR[i],GetMipsRegLo_S(i)); _Notify->BreakPoint(__FILE__,__LINE__); } - MoveConstToX86reg(MipsRegLo(i),Reg); + MoveConstToX86reg(GetMipsRegLo(i),Reg); break; default: CPU_Message("Do something with states in SyncRegState\nSTATE_MAPPED_32_ZERO\n%d",MipsRegState(i)); @@ -1406,7 +1406,7 @@ void CCodeSection::TestRegConstantStates( CRegInfo & Base, CRegInfo & Reg ) { if (Reg.Is32Bit(i)) { - if (Reg.MipsRegLo(i) != Base.MipsRegLo(i)) + if (Reg.GetMipsRegLo(i) != Base.GetMipsRegLo(i)) { Reg.SetMipsRegState(i, CRegInfo::STATE_UNKNOWN); } @@ -1801,7 +1801,7 @@ bool CCodeSection::InheritParentInfo ( void ) break; case CRegInfo::STATE_CONST_64: Map_GPR_64bit(i2,i2); break; case CRegInfo::STATE_CONST_32: - if ((RegSet->MipsRegLo_S(i2) < 0) && IsUnsigned(i2)) { + if ((RegSet->GetMipsRegLo_S(i2) < 0) && IsUnsigned(i2)) { m_RegWorkingSet.SetMipsRegState(i2,CRegInfo::STATE_MAPPED_32_SIGN); } break; @@ -1826,7 +1826,7 @@ bool CCodeSection::InheritParentInfo ( void ) } else { Map_GPR_32bit(i2,true,i2); } - } else if (Is32Bit(i2) && MipsRegLo(i2) != RegSet->MipsRegLo(i2)) { + } else if (Is32Bit(i2) && GetMipsRegLo(i2) != RegSet->GetMipsRegLo(i2)) { Map_GPR_32bit(i2,true,i2); } else if (Is64Bit(i2) && MipsReg(i2) != RegSet->MipsReg(i2)) { Map_GPR_32bit(i2,true,i2); @@ -1882,21 +1882,21 @@ bool CCodeSection::InheritParentInfo ( void ) switch (m_RegWorkingSet.MipsRegState(i2)) { case CRegInfo::STATE_UNKNOWN: break; case CRegInfo::STATE_MAPPED_64: - if (MipsRegMapHi(i2) != RegSet->MipsRegMapHi(i2) || - MipsRegMapLo(i2) != RegSet->MipsRegMapLo(i2)) + if (GetMipsRegMapHi(i2) != RegSet->GetMipsRegMapHi(i2) || + GetMipsRegMapLo(i2) != RegSet->GetMipsRegMapLo(i2)) { NeedSync = true; } break; case CRegInfo::STATE_MAPPED_32_ZERO: case CRegInfo::STATE_MAPPED_32_SIGN: - if (MipsRegMapLo(i2) != RegSet->MipsRegMapLo(i2)) { + if (GetMipsRegMapLo(i2) != RegSet->GetMipsRegMapLo(i2)) { //DisplayError("Parent: %d",Parent->SectionID); NeedSync = true; } break; case CRegInfo::STATE_CONST_32: - if (MipsRegLo(i2) != RegSet->MipsRegLo(i2)) + if (GetMipsRegLo(i2) != RegSet->GetMipsRegLo(i2)) { _Notify->BreakPoint(__FILE__,__LINE__); NeedSync = true; diff --git a/Source/Project64/N64 System/Recompiler/Loop Analysis.cpp b/Source/Project64/N64 System/Recompiler/Loop Analysis.cpp index cdd8b8aa7..3fec3caff 100644 --- a/Source/Project64/N64 System/Recompiler/Loop Analysis.cpp +++ b/Source/Project64/N64 System/Recompiler/Loop Analysis.cpp @@ -161,7 +161,7 @@ bool LoopAnalysis::CheckLoopRegisterUsage( CCodeSection * Section) return false; } CPU_Message(" %08X: %s",m_PC,R4300iOpcodeName(m_Command.Hex,m_PC)); - CPU_Message(" %s state: %X value: %X",CRegName::GPR[3],m_Reg.MipsRegState(3),m_Reg.MipsRegLo(3)); + CPU_Message(" %s state: %X value: %X",CRegName::GPR[3],m_Reg.MipsRegState(3),m_Reg.GetMipsRegLo(3)); switch (m_Command.op) { case R4300i_SPECIAL: switch (m_Command.funct) { @@ -280,7 +280,7 @@ bool LoopAnalysis::CheckLoopRegisterUsage( CCodeSection * Section) case R4300i_REGIMM_BLTZAL: _Notify->BreakPoint(__FILE__,__LINE__); #ifdef tofix - m_Reg.MipsRegLo(31) = m_PC + 8; + m_Reg.GetMipsRegLo(31) = m_PC + 8; m_Reg.SetMipsRegState(31,CRegInfo::STATE_CONST_32); Section->m_Cont.TargetPC = m_PC + 8; Section->m_Jump.TargetPC = m_PC + ((short)m_Command.offset << 2) + 4; @@ -300,12 +300,12 @@ bool LoopAnalysis::CheckLoopRegisterUsage( CCodeSection * Section) __int64 Value; if (m_Reg.Is32Bit(m_Command.rs)) { - Value = m_Reg.MipsRegLo_S(m_Command.rs); + Value = m_Reg.GetMipsRegLo_S(m_Command.rs); } else { Value = m_Reg.cMipsReg_S(m_Command.rs); } if (Value >= 0) { - m_Reg.MipsRegLo(31) = m_PC + 8; + m_Reg.GetMipsRegLo(31) = m_PC + 8; m_Reg.SetMipsRegState(31,CRegInfo::STATE_CONST_32); Section->m_Jump.TargetPC = m_PC + ((short)m_Command.offset << 2) + 4; if (m_PC == Section->m_Jump.TargetPC) { @@ -318,7 +318,7 @@ bool LoopAnalysis::CheckLoopRegisterUsage( CCodeSection * Section) } - m_Reg.MipsRegLo(31) = m_PC + 8; + m_Reg.GetMipsRegLo(31) = m_PC + 8; m_Reg.SetMipsRegState(31,CRegInfo::STATE_CONST_32); Section->m_Cont.TargetPC = m_PC + 8; Section->m_Jump.TargetPC = m_PC + ((short)m_Command.offset << 2) + 4; @@ -344,7 +344,7 @@ bool LoopAnalysis::CheckLoopRegisterUsage( CCodeSection * Section) _Notify->BreakPoint(__FILE__,__LINE__); #ifdef tofix m_NextInstruction = DELAY_SLOT; - m_Reg.MipsRegLo(31) = m_PC + 8; + m_Reg.GetMipsRegLo(31) = m_PC + 8; m_Reg.SetMipsRegState(31,CRegInfo::STATE_CONST_32); Section->m_Jump.TargetPC = (m_PC & 0xF0000000) + (m_Command.target << 2); if (m_PC == Section->m_Jump.TargetPC) { @@ -433,7 +433,7 @@ bool LoopAnalysis::CheckLoopRegisterUsage( CCodeSection * Section) case R4300i_ADDIU: if (m_Command.rt == 0) { break; } /*if (m_Command.rs == 0) { - m_Reg.MipsRegLo(m_Command.rt) = (short)m_Command.immediate; + m_Reg.GetMipsRegLo(m_Command.rt) = (short)m_Command.immediate; m_Reg.SetMipsRegState(m_Command.rt,CRegInfo::STATE_CONST_32); } else {*/ m_Reg.SetMipsRegState(m_Command.rt,CRegInfo::STATE_MODIFIED); @@ -443,9 +443,9 @@ bool LoopAnalysis::CheckLoopRegisterUsage( CCodeSection * Section) if (m_Command.rt == 0) { break; } if (m_Reg.IsConst(m_Command.rs)) { if (m_Reg.Is64Bit(m_Command.rs)) { - m_Reg.MipsRegLo(m_Command.rt) = (m_Reg.cMipsReg_S(m_Command.rs) < (_int64)((short)m_Command.immediate))?1:0; + m_Reg.SetMipsRegLo(m_Command.rt, (m_Reg.cMipsReg_S(m_Command.rs) < (_int64)((short)m_Command.immediate))?1:0); } else { - m_Reg.MipsRegLo(m_Command.rt) = (m_Reg.MipsRegLo_S(m_Command.rs) < (int)((short)m_Command.immediate))?1:0; + m_Reg.SetMipsRegLo(m_Command.rt, (m_Reg.GetMipsRegLo_S(m_Command.rs) < (int)((short)m_Command.immediate))?1:0); } m_Reg.SetMipsRegState(m_Command.rt,CRegInfo::STATE_CONST_32); } else { @@ -456,9 +456,9 @@ bool LoopAnalysis::CheckLoopRegisterUsage( CCodeSection * Section) if (m_Command.rt == 0) { break; } if (m_Reg.IsConst(m_Command.rs)) { if (m_Reg.Is64Bit(m_Command.rs)) { - m_Reg.MipsRegLo(m_Command.rt) = (m_Reg.MipsReg(m_Command.rs) < (unsigned _int64)((short)m_Command.immediate))?1:0; + m_Reg.SetMipsRegLo(m_Command.rt,(m_Reg.MipsReg(m_Command.rs) < (unsigned _int64)((short)m_Command.immediate))?1:0); } else { - m_Reg.MipsRegLo(m_Command.rt) = (m_Reg.MipsRegLo(m_Command.rs) < (DWORD)((short)m_Command.immediate))?1:0; + m_Reg.SetMipsRegLo(m_Command.rt,(m_Reg.GetMipsRegLo(m_Command.rs) < (DWORD)((short)m_Command.immediate))?1:0); } m_Reg.SetMipsRegState(m_Command.rt,CRegInfo::STATE_CONST_32); } else { @@ -469,7 +469,7 @@ bool LoopAnalysis::CheckLoopRegisterUsage( CCodeSection * Section) if (m_Command.rt == 0) { break; } if (!m_Reg.IsModified(m_Command.rt)) { - m_Reg.MipsRegLo(m_Command.rt) = ((short)m_Command.offset << 16); + m_Reg.SetMipsRegLo(m_Command.rt,((short)m_Command.offset << 16)); m_Reg.SetMipsRegState(m_Command.rt,CRegInfo::STATE_CONST_32); } break; @@ -485,7 +485,7 @@ bool LoopAnalysis::CheckLoopRegisterUsage( CCodeSection * Section) } if (m_Reg.IsConst(m_Command.rs)) { m_Reg.SetMipsRegState(m_Command.rt,CRegInfo::STATE_CONST_32); - m_Reg.MipsRegLo(m_Command.rt) = m_Reg.MipsRegLo(m_Command.rs) | m_Command.immediate; + m_Reg.SetMipsRegLo(m_Command.rt,m_Reg.GetMipsRegLo(m_Command.rs) | m_Command.immediate); } else { m_Reg.SetMipsRegState(m_Command.rt,CRegInfo::STATE_MODIFIED); } @@ -498,7 +498,7 @@ bool LoopAnalysis::CheckLoopRegisterUsage( CCodeSection * Section) } if (m_Reg.IsConst(m_Command.rs)) { m_Reg.SetMipsRegState(m_Command.rt,CRegInfo::STATE_CONST_32); - m_Reg.MipsRegLo(m_Command.rt) = m_Reg.MipsRegLo(m_Command.rs) ^ m_Command.immediate; + m_Reg.SetMipsRegLo(m_Command.rt, m_Reg.GetMipsRegLo(m_Command.rs) ^ m_Command.immediate); } else { m_Reg.SetMipsRegState(m_Command.rt,CRegInfo::STATE_MODIFIED); } @@ -648,9 +648,9 @@ bool LoopAnalysis::CheckLoopRegisterUsage( CCodeSection * Section) if (m_Reg.Is64Bit(m_Command.rs)) { int imm32 = (short)m_Command.immediate; __int64 imm64 = imm32; - m_Reg.MipsReg_S(m_Command.rt) = m_Reg.MipsRegLo_S(m_Command.rs) + imm64; + m_Reg.MipsReg_S(m_Command.rt) = m_Reg.GetMipsRegLo_S(m_Command.rs) + imm64; } else { - m_Reg.MipsReg_S(m_Command.rt) = m_Reg.MipsRegLo_S(m_Command.rs) + (short)m_Command.immediate; + m_Reg.MipsReg_S(m_Command.rt) = m_Reg.GetMipsRegLo_S(m_Command.rs) + (short)m_Command.immediate; } m_Reg.SetMipsRegState(m_Command.rt,CRegInfo::STATE_CONST_64); } else { @@ -701,7 +701,7 @@ bool LoopAnalysis::CheckLoopRegisterUsage( CCodeSection * Section) R4300iOpcodeName(m_Command.Hex,m_PC),m_Command.Hex); } - CPU_Message(" %s state: %X value: %X",CRegName::GPR[5],m_Reg.MipsRegState(5),m_Reg.MipsRegLo(5)); + CPU_Message(" %s state: %X value: %X",CRegName::GPR[5],m_Reg.MipsRegState(5),m_Reg.GetMipsRegLo(5)); if (Section->m_DelaySlot) { @@ -839,7 +839,7 @@ void LoopAnalysis::SPECIAL_SLLV ( void ) } if (m_Reg.IsConst(m_Command.rt) && m_Reg.IsConst(m_Command.rs)) { m_Reg.SetMipsRegState(m_Command.rd,CRegInfo::STATE_CONST_32); - m_Reg.MipsRegLo(m_Command.rd) = m_Reg.MipsRegLo(m_Command.rt) << (m_Reg.MipsRegLo(m_Command.rs) & 0x1F); + m_Reg.SetMipsRegLo(m_Command.rd, m_Reg.GetMipsRegLo(m_Command.rt) << (m_Reg.GetMipsRegLo(m_Command.rs) & 0x1F)); } else { m_Reg.SetMipsRegState(m_Command.rd,CRegInfo::STATE_MODIFIED); } @@ -854,7 +854,7 @@ void LoopAnalysis::SPECIAL_SRLV ( void ) } if (m_Reg.IsConst(m_Command.rt) && m_Reg.IsConst(m_Command.rs)) { m_Reg.SetMipsRegState(m_Command.rd,CRegInfo::STATE_CONST_32); - m_Reg.MipsRegLo(m_Command.rd) = m_Reg.MipsRegLo(m_Command.rt) >> (m_Reg.MipsRegLo(m_Command.rs) & 0x1F); + m_Reg.SetMipsRegLo(m_Command.rd, m_Reg.GetMipsRegLo(m_Command.rt) >> (m_Reg.GetMipsRegLo(m_Command.rs) & 0x1F)); } else { m_Reg.SetMipsRegState(m_Command.rd,CRegInfo::STATE_MODIFIED); } @@ -869,7 +869,7 @@ void LoopAnalysis::SPECIAL_SRAV ( void ) } if (m_Reg.IsConst(m_Command.rt) && m_Reg.IsConst(m_Command.rs)) { m_Reg.SetMipsRegState(m_Command.rd,CRegInfo::STATE_CONST_32); - m_Reg.MipsRegLo(m_Command.rd) = m_Reg.MipsRegLo_S(m_Command.rt) >> (m_Reg.MipsRegLo(m_Command.rs) & 0x1F); + m_Reg.SetMipsRegLo(m_Command.rd, m_Reg.GetMipsRegLo_S(m_Command.rt) >> (m_Reg.GetMipsRegLo(m_Command.rs) & 0x1F)); } else { m_Reg.SetMipsRegState(m_Command.rd,CRegInfo::STATE_MODIFIED); } @@ -880,7 +880,7 @@ void LoopAnalysis::SPECIAL_JR ( void ) _Notify->BreakPoint(__FILE__,__LINE__); #ifdef tofix if (m_Reg.IsConst(m_Command.rs)) { - Section->m_Jump.TargetPC = m_Reg.MipsRegLo(m_Command.rs); + Section->m_Jump.TargetPC = m_Reg.GetMipsRegLo(m_Command.rs); } else { Section->m_Jump.TargetPC = (DWORD)-1; } @@ -892,10 +892,10 @@ void LoopAnalysis::SPECIAL_JALR ( void ) { _Notify->BreakPoint(__FILE__,__LINE__); #ifdef tofix - m_Reg.MipsRegLo(m_Command.rd) = m_PC + 8; + m_Reg.GetMipsRegLo(m_Command.rd) = m_PC + 8; m_Reg.SetMipsRegState(m_Command.rd,CRegInfo::STATE_CONST_32); if (m_Reg.IsConst(m_Command.rs)) { - Section->m_Jump.TargetPC = m_Reg.MipsRegLo(m_Command.rs); + Section->m_Jump.TargetPC = m_Reg.GetMipsRegLo(m_Command.rs); } else { Section->m_Jump.TargetPC = (DWORD)-1; } @@ -944,7 +944,7 @@ void LoopAnalysis::SPECIAL_DSLLV ( void ) } if (m_Reg.IsConst(m_Command.rt) && m_Reg.IsConst(m_Command.rs)) { m_Reg.SetMipsRegState(m_Command.rd,CRegInfo::STATE_CONST_64); - m_Reg.SetMipsReg(m_Command.rd, m_Reg.Is64Bit(m_Command.rt)?m_Reg.MipsReg(m_Command.rt):(QWORD)m_Reg.MipsRegLo_S(m_Command.rt) << (m_Reg.MipsRegLo(m_Command.rs) & 0x3F)); + m_Reg.SetMipsReg(m_Command.rd, m_Reg.Is64Bit(m_Command.rt)?m_Reg.MipsReg(m_Command.rt):(QWORD)m_Reg.GetMipsRegLo_S(m_Command.rt) << (m_Reg.GetMipsRegLo(m_Command.rs) & 0x3F)); } else { m_Reg.SetMipsRegState(m_Command.rd,CRegInfo::STATE_MODIFIED); } @@ -959,7 +959,7 @@ void LoopAnalysis::SPECIAL_DSRLV ( void ) } if (m_Reg.IsConst(m_Command.rt) && m_Reg.IsConst(m_Command.rs)) { m_Reg.SetMipsRegState(m_Command.rd,CRegInfo::STATE_CONST_64); - m_Reg.SetMipsReg(m_Command.rd,m_Reg.Is64Bit(m_Command.rt)?m_Reg.MipsReg(m_Command.rt):(QWORD)m_Reg.MipsRegLo_S(m_Command.rt) >> (m_Reg.MipsRegLo(m_Command.rs) & 0x3F)); + m_Reg.SetMipsReg(m_Command.rd,m_Reg.Is64Bit(m_Command.rt)?m_Reg.MipsReg(m_Command.rt):(QWORD)m_Reg.GetMipsRegLo_S(m_Command.rt) >> (m_Reg.GetMipsRegLo(m_Command.rs) & 0x3F)); } else { m_Reg.SetMipsRegState(m_Command.rd,CRegInfo::STATE_MODIFIED); } @@ -975,7 +975,7 @@ void LoopAnalysis::SPECIAL_DSRAV ( void ) } if (m_Reg.IsConst(m_Command.rt) && m_Reg.IsConst(m_Command.rs)) { m_Reg.SetMipsRegState(m_Command.rd,CRegInfo::STATE_CONST_64); - m_Reg.SetMipsReg(m_Command.rd,m_Reg.Is64Bit(m_Command.rt)?m_Reg.cMipsReg_S(m_Command.rt):(_int64)m_Reg.MipsRegLo_S(m_Command.rt) >> (m_Reg.MipsRegLo(m_Command.rs) & 0x3F)); + m_Reg.SetMipsReg(m_Command.rd,m_Reg.Is64Bit(m_Command.rt)?m_Reg.cMipsReg_S(m_Command.rt):(_int64)m_Reg.GetMipsRegLo_S(m_Command.rt) >> (m_Reg.GetMipsRegLo(m_Command.rs) & 0x3F)); } else { m_Reg.SetMipsRegState(m_Command.rd,CRegInfo::STATE_MODIFIED); } @@ -1035,12 +1035,12 @@ void LoopAnalysis::SPECIAL_SLT ( void ) if (m_Reg.IsConst(m_Command.rt) && m_Reg.IsConst(m_Command.rs)) { if (m_Reg.Is64Bit(m_Command.rt) || m_Reg.Is64Bit(m_Command.rs)) { if (m_Reg.Is64Bit(m_Command.rt)) { - m_Reg.MipsRegLo(m_Command.rd) = (m_Reg.MipsRegLo_S(m_Command.rs) < m_Reg.cMipsReg_S(m_Command.rt))?1:0; + m_Reg.SetMipsRegLo(m_Command.rd, (m_Reg.GetMipsRegLo_S(m_Command.rs) < m_Reg.cMipsReg_S(m_Command.rt))?1:0); } else { - m_Reg.MipsRegLo(m_Command.rd) = (m_Reg.cMipsReg_S(m_Command.rs) < m_Reg.MipsRegLo_S(m_Command.rt))?1:0; + m_Reg.SetMipsRegLo(m_Command.rd, (m_Reg.cMipsReg_S(m_Command.rs) < m_Reg.GetMipsRegLo_S(m_Command.rt))?1:0); } } else { - m_Reg.MipsRegLo(m_Command.rd) = (m_Reg.MipsRegLo_S(m_Command.rs) < m_Reg.MipsRegLo_S(m_Command.rt))?1:0; + m_Reg.SetMipsRegLo(m_Command.rd, (m_Reg.GetMipsRegLo_S(m_Command.rs) < m_Reg.GetMipsRegLo_S(m_Command.rt))?1:0); } m_Reg.SetMipsRegState(m_Command.rd,CRegInfo::STATE_CONST_32); } else { @@ -1054,12 +1054,12 @@ void LoopAnalysis::SPECIAL_SLTU ( void ) if (m_Reg.IsConst(m_Command.rt) && m_Reg.IsConst(m_Command.rs)) { if (m_Reg.Is64Bit(m_Command.rt) || m_Reg.Is64Bit(m_Command.rs)) { if (m_Reg.Is64Bit(m_Command.rt)) { - m_Reg.MipsRegLo(m_Command.rd) = (m_Reg.MipsRegLo(m_Command.rs) < m_Reg.MipsReg(m_Command.rt))?1:0; + m_Reg.SetMipsRegLo(m_Command.rd,(m_Reg.GetMipsRegLo(m_Command.rs) < m_Reg.MipsReg(m_Command.rt))?1:0); } else { - m_Reg.MipsRegLo(m_Command.rd) = (m_Reg.MipsReg(m_Command.rs) < m_Reg.MipsRegLo(m_Command.rt))?1:0; + m_Reg.SetMipsRegLo(m_Command.rd,(m_Reg.MipsReg(m_Command.rs) < m_Reg.GetMipsRegLo(m_Command.rt))?1:0); } } else { - m_Reg.MipsRegLo(m_Command.rd) = (m_Reg.MipsRegLo(m_Command.rs) < m_Reg.MipsRegLo(m_Command.rt))?1:0; + m_Reg.SetMipsRegLo(m_Command.rd,(m_Reg.GetMipsRegLo(m_Command.rs) < m_Reg.GetMipsRegLo(m_Command.rt))?1:0); } m_Reg.SetMipsRegState(m_Command.rd,CRegInfo::STATE_CONST_32); } else { @@ -1076,8 +1076,8 @@ void LoopAnalysis::SPECIAL_DADD ( void ) } if (m_Reg.IsConst(m_Command.rt) && m_Reg.IsConst(m_Command.rs)) { m_Reg.SetMipsReg(m_Command.rd, - m_Reg.Is64Bit(m_Command.rs)?m_Reg.MipsReg(m_Command.rs):(_int64)m_Reg.MipsRegLo_S(m_Command.rs) + - m_Reg.Is64Bit(m_Command.rt)?m_Reg.MipsReg(m_Command.rt):(_int64)m_Reg.MipsRegLo_S(m_Command.rt) + m_Reg.Is64Bit(m_Command.rs)?m_Reg.MipsReg(m_Command.rs):(_int64)m_Reg.GetMipsRegLo_S(m_Command.rs) + + m_Reg.Is64Bit(m_Command.rt)?m_Reg.MipsReg(m_Command.rt):(_int64)m_Reg.GetMipsRegLo_S(m_Command.rt) ); m_Reg.SetMipsRegState(m_Command.rd,CRegInfo::STATE_CONST_64); } else { @@ -1094,8 +1094,8 @@ void LoopAnalysis::SPECIAL_DADDU ( void ) } if (m_Reg.IsConst(m_Command.rt) && m_Reg.IsConst(m_Command.rs)) { m_Reg.SetMipsReg(m_Command.rd, - m_Reg.Is64Bit(m_Command.rs)?m_Reg.MipsReg(m_Command.rs):(_int64)m_Reg.MipsRegLo_S(m_Command.rs) + - m_Reg.Is64Bit(m_Command.rt)?m_Reg.MipsReg(m_Command.rt):(_int64)m_Reg.MipsRegLo_S(m_Command.rt) + m_Reg.Is64Bit(m_Command.rs)?m_Reg.MipsReg(m_Command.rs):(_int64)m_Reg.GetMipsRegLo_S(m_Command.rs) + + m_Reg.Is64Bit(m_Command.rt)?m_Reg.MipsReg(m_Command.rt):(_int64)m_Reg.GetMipsRegLo_S(m_Command.rt) ); m_Reg.SetMipsRegState(m_Command.rd,CRegInfo::STATE_CONST_64); } else { @@ -1112,8 +1112,8 @@ void LoopAnalysis::SPECIAL_DSUB ( void ) } if (m_Reg.IsConst(m_Command.rt) && m_Reg.IsConst(m_Command.rs)) { m_Reg.SetMipsReg(m_Command.rd, - m_Reg.Is64Bit(m_Command.rs)?m_Reg.MipsReg(m_Command.rs):(_int64)m_Reg.MipsRegLo_S(m_Command.rs) - - m_Reg.Is64Bit(m_Command.rt)?m_Reg.MipsReg(m_Command.rt):(_int64)m_Reg.MipsRegLo_S(m_Command.rt) + m_Reg.Is64Bit(m_Command.rs)?m_Reg.MipsReg(m_Command.rs):(_int64)m_Reg.GetMipsRegLo_S(m_Command.rs) - + m_Reg.Is64Bit(m_Command.rt)?m_Reg.MipsReg(m_Command.rt):(_int64)m_Reg.GetMipsRegLo_S(m_Command.rt) ); m_Reg.SetMipsRegState(m_Command.rd,CRegInfo::STATE_CONST_64); } else { @@ -1130,8 +1130,8 @@ void LoopAnalysis::SPECIAL_DSUBU ( void ) } if (m_Reg.IsConst(m_Command.rt) && m_Reg.IsConst(m_Command.rs)) { m_Reg.SetMipsReg(m_Command.rd, - m_Reg.Is64Bit(m_Command.rs)?m_Reg.MipsReg(m_Command.rs):(_int64)m_Reg.MipsRegLo_S(m_Command.rs) - - m_Reg.Is64Bit(m_Command.rt)?m_Reg.MipsReg(m_Command.rt):(_int64)m_Reg.MipsRegLo_S(m_Command.rt) + m_Reg.Is64Bit(m_Command.rs)?m_Reg.MipsReg(m_Command.rs):(_int64)m_Reg.GetMipsRegLo_S(m_Command.rs) - + m_Reg.Is64Bit(m_Command.rt)?m_Reg.MipsReg(m_Command.rt):(_int64)m_Reg.GetMipsRegLo_S(m_Command.rt) ); m_Reg.SetMipsRegState(m_Command.rd,CRegInfo::STATE_CONST_64); } else { @@ -1148,7 +1148,7 @@ void LoopAnalysis::SPECIAL_DSLL ( void ) } if (m_Reg.IsConst(m_Command.rt)) { m_Reg.SetMipsRegState(m_Command.rd,CRegInfo::STATE_CONST_64); - m_Reg.SetMipsReg(m_Command.rd,m_Reg.Is64Bit(m_Command.rt)?m_Reg.MipsReg(m_Command.rt):(_int64)m_Reg.MipsRegLo_S(m_Command.rt) << m_Command.sa); + m_Reg.SetMipsReg(m_Command.rd,m_Reg.Is64Bit(m_Command.rt)?m_Reg.MipsReg(m_Command.rt):(_int64)m_Reg.GetMipsRegLo_S(m_Command.rt) << m_Command.sa); } else { m_Reg.SetMipsRegState(m_Command.rd,CRegInfo::STATE_MODIFIED); } @@ -1163,7 +1163,7 @@ void LoopAnalysis::SPECIAL_DSRL ( void ) } if (m_Reg.IsConst(m_Command.rt)) { m_Reg.SetMipsRegState(m_Command.rd,CRegInfo::STATE_CONST_64); - m_Reg.SetMipsReg(m_Command.rd, m_Reg.Is64Bit(m_Command.rt)?m_Reg.MipsReg(m_Command.rt):(QWORD)m_Reg.MipsRegLo_S(m_Command.rt) >> m_Command.sa); + m_Reg.SetMipsReg(m_Command.rd, m_Reg.Is64Bit(m_Command.rt)?m_Reg.MipsReg(m_Command.rt):(QWORD)m_Reg.GetMipsRegLo_S(m_Command.rt) >> m_Command.sa); } else { m_Reg.SetMipsRegState(m_Command.rd,CRegInfo::STATE_MODIFIED); } @@ -1178,7 +1178,7 @@ void LoopAnalysis::SPECIAL_DSRA ( void ) } if (m_Reg.IsConst(m_Command.rt)) { m_Reg.SetMipsRegState(m_Command.rd,CRegInfo::STATE_CONST_64); - m_Reg.MipsReg_S(m_Command.rd) = m_Reg.Is64Bit(m_Command.rt)?m_Reg.cMipsReg_S(m_Command.rt):(_int64)m_Reg.MipsRegLo_S(m_Command.rt) >> m_Command.sa; + m_Reg.MipsReg_S(m_Command.rd) = m_Reg.Is64Bit(m_Command.rt)?m_Reg.cMipsReg_S(m_Command.rt):(_int64)m_Reg.GetMipsRegLo_S(m_Command.rt) >> m_Command.sa; } else { m_Reg.SetMipsRegState(m_Command.rd,CRegInfo::STATE_MODIFIED); } @@ -1193,7 +1193,7 @@ void LoopAnalysis::SPECIAL_DSLL32 ( void ) } if (m_Reg.IsConst(m_Command.rt)) { m_Reg.SetMipsRegState(m_Command.rd,CRegInfo::STATE_CONST_64); - m_Reg.SetMipsReg(m_Command.rd, m_Reg.MipsRegLo(m_Command.rt) << (m_Command.sa + 32)); + m_Reg.SetMipsReg(m_Command.rd, m_Reg.GetMipsRegLo(m_Command.rt) << (m_Command.sa + 32)); } else { m_Reg.SetMipsRegState(m_Command.rd,CRegInfo::STATE_MODIFIED); } @@ -1208,7 +1208,7 @@ void LoopAnalysis::SPECIAL_DSRL32 ( void ) } if (m_Reg.IsConst(m_Command.rt)) { m_Reg.SetMipsRegState(m_Command.rd,CRegInfo::STATE_CONST_32); - m_Reg.MipsRegLo(m_Command.rd) = (DWORD)(m_Reg.MipsReg(m_Command.rt) >> (m_Command.sa + 32)); + m_Reg.SetMipsRegLo(m_Command.rd,(DWORD)(m_Reg.MipsReg(m_Command.rt) >> (m_Command.sa + 32))); } else { m_Reg.SetMipsRegState(m_Command.rd,CRegInfo::STATE_MODIFIED); } @@ -1223,7 +1223,7 @@ void LoopAnalysis::SPECIAL_DSRA32 ( void ) } if (m_Reg.IsConst(m_Command.rt)) { m_Reg.SetMipsRegState(m_Command.rd,CRegInfo::STATE_CONST_32); - m_Reg.MipsRegLo(m_Command.rd) = (DWORD)(m_Reg.cMipsReg_S(m_Command.rt) >> (m_Command.sa + 32)); + m_Reg.SetMipsRegLo(m_Command.rd,(DWORD)(m_Reg.cMipsReg_S(m_Command.rt) >> (m_Command.sa + 32))); } else { m_Reg.SetMipsRegState(m_Command.rd,CRegInfo::STATE_MODIFIED); } diff --git a/Source/Project64/N64 System/Recompiler/Recompiler Ops.cpp b/Source/Project64/N64 System/Recompiler/Recompiler Ops.cpp index e336d3af0..9cbed1c41 100644 --- a/Source/Project64/N64 System/Recompiler/Recompiler Ops.cpp +++ b/Source/Project64/N64 System/Recompiler/Recompiler Ops.cpp @@ -107,7 +107,7 @@ void CRecompilerOps::Compile_Branch (CRecompilerOps::BranchFunction CompareFunc, if (Link) { UnMap_GPR( 31, FALSE); - MipsRegLo(31) = m_CompilePC + 8; + m_RegWorkingSet.SetMipsRegLo(31,m_CompilePC + 8); m_RegWorkingSet.SetMipsRegState(31,CRegInfo::STATE_CONST_32); } if (EffectDelaySlot) { @@ -336,7 +336,7 @@ void CRecompilerOps::Compile_BranchLikely (BranchFunction CompareFunc, BOOL Link if (Link) { UnMap_GPR( 31, FALSE); - MipsRegLo(31) = m_CompilePC + 8; + m_RegWorkingSet.SetMipsRegLo(31, m_CompilePC + 8); m_RegWorkingSet.SetMipsRegState(31,CRegInfo::STATE_CONST_32); } CompareFunc(); @@ -423,8 +423,8 @@ void CRecompilerOps::BNE_Compare (void) ProtectGPR(m_Opcode.rt); CompX86RegToX86Reg( - Is32Bit(m_Opcode.rs)?Map_TempReg(x86_Any,m_Opcode.rs,TRUE):MipsRegMapHi(m_Opcode.rs), - Is32Bit(m_Opcode.rt)?Map_TempReg(x86_Any,m_Opcode.rt,TRUE):MipsRegMapHi(m_Opcode.rt) + Is32Bit(m_Opcode.rs)?Map_TempReg(x86_Any,m_Opcode.rs,TRUE):GetMipsRegMapHi(m_Opcode.rs), + Is32Bit(m_Opcode.rt)?Map_TempReg(x86_Any,m_Opcode.rt,TRUE):GetMipsRegMapHi(m_Opcode.rt) ); if (m_Section->m_Jump.FallThrough) { @@ -434,7 +434,7 @@ void CRecompilerOps::BNE_Compare (void) JneLabel32(m_Section->m_Jump.BranchLabel.c_str(),0); m_Section->m_Jump.LinkLocation = (DWORD *)(m_RecompPos - 4); } - CompX86RegToX86Reg(MipsRegMapLo(m_Opcode.rs),MipsRegMapLo(m_Opcode.rt)); + CompX86RegToX86Reg(GetMipsRegMapLo(m_Opcode.rs),GetMipsRegMapLo(m_Opcode.rt)); if (m_Section->m_Cont.FallThrough) { JneLabel32 ( m_Section->m_Jump.BranchLabel.c_str(), 0 ); m_Section->m_Jump.LinkLocation2 = (DWORD *)(m_RecompPos - 4); @@ -451,7 +451,7 @@ void CRecompilerOps::BNE_Compare (void) m_Section->m_Jump.LinkLocation2 = (DWORD *)(m_RecompPos - 4); } } else { - CompX86RegToX86Reg(MipsRegMapLo(m_Opcode.rs),MipsRegMapLo(m_Opcode.rt)); + CompX86RegToX86Reg(GetMipsRegMapLo(m_Opcode.rs),GetMipsRegMapLo(m_Opcode.rt)); if (m_Section->m_Cont.FallThrough) { JneLabel32 ( m_Section->m_Jump.BranchLabel.c_str(), 0 ); m_Section->m_Jump.LinkLocation = (DWORD *)(m_RecompPos - 4); @@ -473,12 +473,12 @@ void CRecompilerOps::BNE_Compare (void) if (Is32Bit(ConstReg) || Is32Bit(MappedReg)) { ProtectGPR(MappedReg); if (Is32Bit(MappedReg)) { - CompConstToX86reg(Map_TempReg(x86_Any,MappedReg,TRUE),MipsRegHi(ConstReg)); + CompConstToX86reg(Map_TempReg(x86_Any,MappedReg,TRUE),GetMipsRegHi(ConstReg)); } else { - CompConstToX86reg(MipsRegMapHi(MappedReg),cMipsRegLo_S(ConstReg) >> 31); + CompConstToX86reg(GetMipsRegMapHi(MappedReg),cMipsRegLo_S(ConstReg) >> 31); } } else { - CompConstToX86reg(MipsRegMapHi(MappedReg),MipsRegHi(ConstReg)); + CompConstToX86reg(GetMipsRegMapHi(MappedReg),GetMipsRegHi(ConstReg)); } if (m_Section->m_Jump.FallThrough) { JneLabel8("continue",0); @@ -487,7 +487,7 @@ void CRecompilerOps::BNE_Compare (void) JneLabel32(m_Section->m_Jump.BranchLabel.c_str(),0); m_Section->m_Jump.LinkLocation = (DWORD *)(m_RecompPos - 4); } - CompConstToX86reg(MipsRegMapLo(MappedReg),cMipsRegLo(ConstReg)); + CompConstToX86reg(GetMipsRegMapLo(MappedReg),cMipsRegLo(ConstReg)); if (m_Section->m_Cont.FallThrough) { JneLabel32 ( m_Section->m_Jump.BranchLabel.c_str(), 0 ); m_Section->m_Jump.LinkLocation2 = (DWORD *)(m_RecompPos - 4); @@ -504,7 +504,7 @@ void CRecompilerOps::BNE_Compare (void) m_Section->m_Jump.LinkLocation2 = (DWORD *)(m_RecompPos - 4); } } else { - CompConstToX86reg(MipsRegMapLo(MappedReg),cMipsRegLo(ConstReg)); + CompConstToX86reg(GetMipsRegMapLo(MappedReg),cMipsRegLo(ConstReg)); if (m_Section->m_Cont.FallThrough) { JneLabel32 ( m_Section->m_Jump.BranchLabel.c_str(), 0 ); m_Section->m_Jump.LinkLocation = (DWORD *)(m_RecompPos - 4); @@ -527,7 +527,7 @@ void CRecompilerOps::BNE_Compare (void) { if (IsConst(KnownReg)) { if (Is64Bit(KnownReg)) { - CompConstToVariable(MipsRegHi(KnownReg),&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg]); + CompConstToVariable(GetMipsRegHi(KnownReg),&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg]); } else if (IsSigned(KnownReg)) { CompConstToVariable((cMipsRegLo_S(KnownReg) >> 31),&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg]); } else { @@ -535,7 +535,7 @@ void CRecompilerOps::BNE_Compare (void) } } else { if (Is64Bit(KnownReg)) { - CompX86regToVariable(MipsRegMapHi(KnownReg),&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg]); + CompX86regToVariable(GetMipsRegMapHi(KnownReg),&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg]); } else if (IsSigned(KnownReg)) { ProtectGPR(KnownReg); CompX86regToVariable(Map_TempReg(x86_Any,KnownReg,TRUE),&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg]); @@ -554,7 +554,7 @@ void CRecompilerOps::BNE_Compare (void) if (IsConst(KnownReg)) { CompConstToVariable(cMipsRegLo(KnownReg),&_GPR[UnknownReg].W[0],CRegName::GPR_Lo[UnknownReg]); } else { - CompX86regToVariable(MipsRegMapLo(KnownReg),&_GPR[UnknownReg].W[0],CRegName::GPR_Lo[UnknownReg]); + CompX86regToVariable(GetMipsRegMapLo(KnownReg),&_GPR[UnknownReg].W[0],CRegName::GPR_Lo[UnknownReg]); } if (m_Section->m_Cont.FallThrough) { JneLabel32 ( m_Section->m_Jump.BranchLabel.c_str(), 0 ); @@ -658,8 +658,8 @@ void CRecompilerOps::BEQ_Compare (void) { ProtectGPR(m_Opcode.rt); CompX86RegToX86Reg( - Is32Bit(m_Opcode.rs)?Map_TempReg(x86_Any,m_Opcode.rs,TRUE):MipsRegMapHi(m_Opcode.rs), - Is32Bit(m_Opcode.rt)?Map_TempReg(x86_Any,m_Opcode.rt,TRUE):MipsRegMapHi(m_Opcode.rt) + Is32Bit(m_Opcode.rs)?Map_TempReg(x86_Any,m_Opcode.rs,TRUE):GetMipsRegMapHi(m_Opcode.rs), + Is32Bit(m_Opcode.rt)?Map_TempReg(x86_Any,m_Opcode.rt,TRUE):GetMipsRegMapHi(m_Opcode.rt) ); if (m_Section->m_Cont.FallThrough) { JneLabel8("continue",0); @@ -668,7 +668,7 @@ void CRecompilerOps::BEQ_Compare (void) { JneLabel32(m_Section->m_Cont.BranchLabel.c_str(),0); m_Section->m_Cont.LinkLocation = (DWORD *)(m_RecompPos - 4); } - CompX86RegToX86Reg(MipsRegMapLo(m_Opcode.rs),MipsRegMapLo(m_Opcode.rt)); + CompX86RegToX86Reg(GetMipsRegMapLo(m_Opcode.rs),GetMipsRegMapLo(m_Opcode.rt)); if (m_Section->m_Cont.FallThrough) { JeLabel32 ( m_Section->m_Jump.BranchLabel.c_str(), 0 ); m_Section->m_Jump.LinkLocation = (DWORD *)(m_RecompPos - 4); @@ -685,7 +685,7 @@ void CRecompilerOps::BEQ_Compare (void) { m_Section->m_Jump.LinkLocation = (DWORD *)(m_RecompPos - 4); } } else { - CompX86RegToX86Reg(MipsRegMapLo(m_Opcode.rs),MipsRegMapLo(m_Opcode.rt)); + CompX86RegToX86Reg(GetMipsRegMapLo(m_Opcode.rs),GetMipsRegMapLo(m_Opcode.rt)); if (m_Section->m_Cont.FallThrough) { JeLabel32 ( m_Section->m_Jump.BranchLabel.c_str(), 0 ); m_Section->m_Jump.LinkLocation = (DWORD *)(m_RecompPos - 4); @@ -707,12 +707,12 @@ void CRecompilerOps::BEQ_Compare (void) { if (Is32Bit(ConstReg) || Is32Bit(MappedReg)) { if (Is32Bit(MappedReg)) { ProtectGPR(MappedReg); - CompConstToX86reg(Map_TempReg(x86_Any,MappedReg,TRUE),MipsRegHi(ConstReg)); + CompConstToX86reg(Map_TempReg(x86_Any,MappedReg,TRUE),GetMipsRegHi(ConstReg)); } else { - CompConstToX86reg(MipsRegMapHi(MappedReg),cMipsRegLo_S(ConstReg) >> 31); + CompConstToX86reg(GetMipsRegMapHi(MappedReg),cMipsRegLo_S(ConstReg) >> 31); } } else { - CompConstToX86reg(MipsRegMapHi(MappedReg),MipsRegHi(ConstReg)); + CompConstToX86reg(GetMipsRegMapHi(MappedReg),GetMipsRegHi(ConstReg)); } if (m_Section->m_Cont.FallThrough) { JneLabel8("continue",0); @@ -721,7 +721,7 @@ void CRecompilerOps::BEQ_Compare (void) { JneLabel32(m_Section->m_Cont.BranchLabel.c_str(),0); m_Section->m_Cont.LinkLocation = (DWORD *)(m_RecompPos - 4); } - CompConstToX86reg(MipsRegMapLo(MappedReg),cMipsRegLo(ConstReg)); + CompConstToX86reg(GetMipsRegMapLo(MappedReg),cMipsRegLo(ConstReg)); if (m_Section->m_Cont.FallThrough) { JeLabel32 ( m_Section->m_Jump.BranchLabel.c_str(), 0 ); m_Section->m_Jump.LinkLocation = (DWORD *)(m_RecompPos - 4); @@ -738,7 +738,7 @@ void CRecompilerOps::BEQ_Compare (void) { m_Section->m_Jump.LinkLocation = (DWORD *)(m_RecompPos - 4); } } else { - CompConstToX86reg(MipsRegMapLo(MappedReg),cMipsRegLo(ConstReg)); + CompConstToX86reg(GetMipsRegMapLo(MappedReg),cMipsRegLo(ConstReg)); if (m_Section->m_Cont.FallThrough) { JeLabel32 ( m_Section->m_Jump.BranchLabel.c_str(), 0 ); m_Section->m_Jump.LinkLocation = (DWORD *)(m_RecompPos - 4); @@ -761,7 +761,7 @@ void CRecompilerOps::BEQ_Compare (void) { { if (IsConst(KnownReg)) { if (Is64Bit(KnownReg)) { - CompConstToVariable(MipsRegHi(KnownReg),&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg]); + CompConstToVariable(GetMipsRegHi(KnownReg),&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg]); } else if (IsSigned(KnownReg)) { CompConstToVariable(cMipsRegLo_S(KnownReg) >> 31,&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg]); } else { @@ -770,7 +770,7 @@ void CRecompilerOps::BEQ_Compare (void) { } else { ProtectGPR(KnownReg); if (Is64Bit(KnownReg)) { - CompX86regToVariable(MipsRegMapHi(KnownReg),&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg]); + CompX86regToVariable(GetMipsRegMapHi(KnownReg),&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg]); } else if (IsSigned(KnownReg)) { CompX86regToVariable(Map_TempReg(x86_Any,KnownReg,TRUE),&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg]); } else { @@ -788,7 +788,7 @@ void CRecompilerOps::BEQ_Compare (void) { if (IsConst(KnownReg)) { CompConstToVariable(cMipsRegLo(KnownReg),&_GPR[UnknownReg].W[0],CRegName::GPR_Lo[UnknownReg]); } else { - CompX86regToVariable(MipsRegMapLo(KnownReg),&_GPR[UnknownReg].W[0],CRegName::GPR_Lo[UnknownReg]); + CompX86regToVariable(GetMipsRegMapLo(KnownReg),&_GPR[UnknownReg].W[0],CRegName::GPR_Lo[UnknownReg]); } if (m_Section->m_Cont.FallThrough) { JeLabel32 ( m_Section->m_Jump.BranchLabel.c_str(), 0 ); @@ -870,7 +870,7 @@ void CRecompilerOps::BGTZ_Compare (void) { m_Section->m_Cont.FallThrough = TRUE; } } else { - if (MipsRegLo_S(m_Opcode.rs) > 0) { + if (GetMipsRegLo_S(m_Opcode.rs) > 0) { m_Section->m_Jump.FallThrough = TRUE; m_Section->m_Cont.FallThrough = FALSE; } else { @@ -879,7 +879,7 @@ void CRecompilerOps::BGTZ_Compare (void) { } } } else if (IsMapped(m_Opcode.rs) && Is32Bit(m_Opcode.rs)) { - CompConstToX86reg(MipsRegMapLo(m_Opcode.rs),0); + CompConstToX86reg(GetMipsRegMapLo(m_Opcode.rs),0); if (m_Section->m_Jump.FallThrough) { JleLabel32 (m_Section->m_Cont.BranchLabel.c_str(), 0 ); m_Section->m_Cont.LinkLocation = (DWORD *)(m_RecompPos - 4); @@ -910,7 +910,7 @@ void CRecompilerOps::BGTZ_Compare (void) { BYTE *Jump = NULL; if (IsMapped(m_Opcode.rs)) { - CompConstToX86reg(MipsRegMapHi(m_Opcode.rs),0); + CompConstToX86reg(GetMipsRegMapHi(m_Opcode.rs),0); } else { CompConstToVariable(0,&_GPR[m_Opcode.rs].W[1],CRegName::GPR_Hi[m_Opcode.rs]); } @@ -932,7 +932,7 @@ void CRecompilerOps::BGTZ_Compare (void) { } if (IsMapped(m_Opcode.rs)) { - CompConstToX86reg(MipsRegMapLo(m_Opcode.rs),0); + CompConstToX86reg(GetMipsRegMapLo(m_Opcode.rs),0); } else { CompConstToVariable(0,&_GPR[m_Opcode.rs].W[0],CRegName::GPR_Lo[m_Opcode.rs]); } @@ -966,7 +966,7 @@ void CRecompilerOps::BLEZ_Compare (void) { m_Section->m_Cont.FallThrough = TRUE; } } else if (IsSigned(m_Opcode.rs)) { - if (MipsRegLo_S(m_Opcode.rs) <= 0) { + if (GetMipsRegLo_S(m_Opcode.rs) <= 0) { m_Section->m_Jump.FallThrough = TRUE; m_Section->m_Cont.FallThrough = FALSE; } else { @@ -985,7 +985,7 @@ void CRecompilerOps::BLEZ_Compare (void) { } else if (IsMapped(m_Opcode.rs)) { if (Is32Bit(m_Opcode.rs)) { - CompConstToX86reg(MipsRegMapLo(m_Opcode.rs),0); + CompConstToX86reg(GetMipsRegMapLo(m_Opcode.rs),0); if (m_Section->m_Jump.FallThrough) { JgLabel32 (m_Section->m_Cont.BranchLabel.c_str(), 0 ); m_Section->m_Cont.LinkLocation = (DWORD *)(m_RecompPos - 4); @@ -1002,7 +1002,7 @@ void CRecompilerOps::BLEZ_Compare (void) { BYTE *Jump = NULL; if (IsMapped(m_Opcode.rs)) { - CompConstToX86reg(MipsRegMapHi(m_Opcode.rs),0); + CompConstToX86reg(GetMipsRegMapHi(m_Opcode.rs),0); } else { CompConstToVariable(0,&_GPR[m_Opcode.rs].W[1],CRegName::GPR_Hi[m_Opcode.rs]); } @@ -1024,7 +1024,7 @@ void CRecompilerOps::BLEZ_Compare (void) { } if (IsMapped(m_Opcode.rs)) { - CompConstToX86reg(MipsRegMapLo(m_Opcode.rs),0); + CompConstToX86reg(GetMipsRegMapLo(m_Opcode.rs),0); } else { CompConstToVariable(0,&_GPR[m_Opcode.rs].W[0],CRegName::GPR_Lo[m_Opcode.rs]); } @@ -1124,7 +1124,7 @@ void CRecompilerOps::BLTZ_Compare (void) { m_Section->m_Cont.FallThrough = TRUE; } } else if (IsSigned(m_Opcode.rs)) { - if (MipsRegLo_S(m_Opcode.rs) < 0) { + if (GetMipsRegLo_S(m_Opcode.rs) < 0) { m_Section->m_Jump.FallThrough = TRUE; m_Section->m_Cont.FallThrough = FALSE; } else { @@ -1137,7 +1137,7 @@ void CRecompilerOps::BLTZ_Compare (void) { } } else if (IsMapped(m_Opcode.rs)) { if (Is64Bit(m_Opcode.rs)) { - CompConstToX86reg(MipsRegMapHi(m_Opcode.rs),0); + CompConstToX86reg(GetMipsRegMapHi(m_Opcode.rs),0); if (m_Section->m_Jump.FallThrough) { JgeLabel32 (m_Section->m_Cont.BranchLabel.c_str(), 0 ); m_Section->m_Cont.LinkLocation = (DWORD *)(m_RecompPos - 4); @@ -1151,7 +1151,7 @@ void CRecompilerOps::BLTZ_Compare (void) { m_Section->m_Jump.LinkLocation = (DWORD *)(m_RecompPos - 4); } } else if (IsSigned(m_Opcode.rs)) { - CompConstToX86reg(MipsRegMapLo(m_Opcode.rs),0); + CompConstToX86reg(GetMipsRegMapLo(m_Opcode.rs),0); if (m_Section->m_Jump.FallThrough) { JgeLabel32 (m_Section->m_Cont.BranchLabel.c_str(), 0 ); m_Section->m_Cont.LinkLocation = (DWORD *)(m_RecompPos - 4); @@ -1196,7 +1196,7 @@ void CRecompilerOps::BGEZ_Compare (void) { _Notify->BreakPoint(__FILE__,__LINE__); CRecompilerOps::UnknownOpcode(); } else if (IsSigned(m_Opcode.rs)) { - if (MipsRegLo_S(m_Opcode.rs) >= 0) { + if (GetMipsRegLo_S(m_Opcode.rs) >= 0) { m_Section->m_Jump.FallThrough = TRUE; m_Section->m_Cont.FallThrough = FALSE; } else { @@ -1209,7 +1209,7 @@ void CRecompilerOps::BGEZ_Compare (void) { } } else if (IsMapped(m_Opcode.rs)) { if (Is64Bit(m_Opcode.rs)) { - CompConstToX86reg(MipsRegMapHi(m_Opcode.rs),0); + CompConstToX86reg(GetMipsRegMapHi(m_Opcode.rs),0); if (m_Section->m_Cont.FallThrough) { JgeLabel32 ( m_Section->m_Jump.BranchLabel.c_str(), 0 ); m_Section->m_Jump.LinkLocation = (DWORD *)(m_RecompPos - 4); @@ -1223,7 +1223,7 @@ void CRecompilerOps::BGEZ_Compare (void) { m_Section->m_Jump.LinkLocation = (DWORD *)(m_RecompPos - 4); } } else if (IsSigned(m_Opcode.rs)) { - CompConstToX86reg(MipsRegMapLo(m_Opcode.rs),0); + CompConstToX86reg(GetMipsRegMapLo(m_Opcode.rs),0); if (m_Section->m_Cont.FallThrough) { JgeLabel32 ( m_Section->m_Jump.BranchLabel.c_str(), 0 ); m_Section->m_Jump.LinkLocation = (DWORD *)(m_RecompPos - 4); @@ -1331,7 +1331,7 @@ void CRecompilerOps::JAL (void) { if ( m_NextInstruction == NORMAL ) { CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC)); UnMap_GPR( 31, FALSE); - MipsRegLo(31) = m_CompilePC + 8; + m_RegWorkingSet.SetMipsRegLo(31,m_CompilePC + 8); m_RegWorkingSet.SetMipsRegState(31,CRegInfo::STATE_CONST_32); if ((m_CompilePC & 0xFFC) == 0xFFC) { @@ -1379,11 +1379,11 @@ void CRecompilerOps::ADDI (void) { if (IsConst(m_Opcode.rs)) { if (IsMapped(m_Opcode.rt)) { UnMap_GPR(m_Opcode.rt, FALSE); } - MipsRegLo(m_Opcode.rt) = cMipsRegLo(m_Opcode.rs) + (short)m_Opcode.immediate; + m_RegWorkingSet.SetMipsRegLo(m_Opcode.rt, cMipsRegLo(m_Opcode.rs) + (short)m_Opcode.immediate); m_RegWorkingSet.SetMipsRegState(m_Opcode.rt,CRegInfo::STATE_CONST_32); } else { Map_GPR_32bit(m_Opcode.rt,TRUE,m_Opcode.rs); - AddConstToX86Reg(MipsRegMapLo(m_Opcode.rt),(short)m_Opcode.immediate); + AddConstToX86Reg(GetMipsRegMapLo(m_Opcode.rt),(short)m_Opcode.immediate); } if (bFastSP() && m_Opcode.rt == 29 && m_Opcode.rs != 29) { ResetX86Protection(); @@ -1406,11 +1406,11 @@ void CRecompilerOps::ADDIU (void) { if (IsConst(m_Opcode.rs)) { if (IsMapped(m_Opcode.rt)) { UnMap_GPR(m_Opcode.rt, FALSE); } - MipsRegLo(m_Opcode.rt) = cMipsRegLo(m_Opcode.rs) + (short)m_Opcode.immediate; + m_RegWorkingSet.SetMipsRegLo(m_Opcode.rt, cMipsRegLo(m_Opcode.rs) + (short)m_Opcode.immediate); m_RegWorkingSet.SetMipsRegState(m_Opcode.rt,CRegInfo::STATE_CONST_32); } else { Map_GPR_32bit(m_Opcode.rt,TRUE,m_Opcode.rs); - AddConstToX86Reg(MipsRegMapLo(m_Opcode.rt),(short)m_Opcode.immediate); + AddConstToX86Reg(GetMipsRegMapLo(m_Opcode.rt),(short)m_Opcode.immediate); } if (bFastSP() && m_Opcode.rt == 29 && m_Opcode.rs != 29) { @@ -1429,12 +1429,12 @@ void CRecompilerOps::SLTIU (void) { cMipsRegLo(m_Opcode.rs) < ((unsigned)((short)m_Opcode.immediate))?1:0; UnMap_GPR(m_Opcode.rt, FALSE); m_RegWorkingSet.SetMipsRegState(m_Opcode.rt,CRegInfo::STATE_CONST_32); - MipsRegLo(m_Opcode.rt) = Result; + m_RegWorkingSet.SetMipsRegLo(m_Opcode.rt,Result); } else if (IsMapped(m_Opcode.rs)) { if (Is64Bit(m_Opcode.rs)) { BYTE * Jump[2]; - CompConstToX86reg(MipsRegMapHi(m_Opcode.rs),((short)m_Opcode.immediate >> 31)); + CompConstToX86reg(GetMipsRegMapHi(m_Opcode.rs),((short)m_Opcode.immediate >> 31)); JeLabel8("Low Compare",0); Jump[0] = m_RecompPos - 1; SetbVariable(&m_BranchCompare,"m_BranchCompare"); @@ -1443,24 +1443,24 @@ void CRecompilerOps::SLTIU (void) { CPU_Message(""); CPU_Message(" Low Compare:"); SetJump8(Jump[0],m_RecompPos); - CompConstToX86reg(MipsRegMapLo(m_Opcode.rs),(short)m_Opcode.immediate); + CompConstToX86reg(GetMipsRegMapLo(m_Opcode.rs),(short)m_Opcode.immediate); SetbVariable(&m_BranchCompare,"m_BranchCompare"); CPU_Message(""); CPU_Message(" Continue:"); SetJump8(Jump[1],m_RecompPos); Map_GPR_32bit(m_Opcode.rt,FALSE, -1); - MoveVariableToX86reg(&m_BranchCompare,"m_BranchCompare",MipsRegMapLo(m_Opcode.rt)); + MoveVariableToX86reg(&m_BranchCompare,"m_BranchCompare",GetMipsRegMapLo(m_Opcode.rt)); } else { - CompConstToX86reg(MipsRegMapLo(m_Opcode.rs),(short)m_Opcode.immediate); + CompConstToX86reg(GetMipsRegMapLo(m_Opcode.rs),(short)m_Opcode.immediate); SetbVariable(&m_BranchCompare,"m_BranchCompare"); Map_GPR_32bit(m_Opcode.rt,FALSE, -1); - MoveVariableToX86reg(&m_BranchCompare,"m_BranchCompare",MipsRegMapLo(m_Opcode.rt)); + MoveVariableToX86reg(&m_BranchCompare,"m_BranchCompare",GetMipsRegMapLo(m_Opcode.rt)); } } else if (b32BitCore()) { CompConstToVariable((short)m_Opcode.immediate,&_GPR[m_Opcode.rs].W[0],CRegName::GPR_Lo[m_Opcode.rs]); SetbVariable(&m_BranchCompare,"m_BranchCompare"); Map_GPR_32bit(m_Opcode.rt,FALSE, -1); - MoveVariableToX86reg(&m_BranchCompare,"m_BranchCompare",MipsRegMapLo(m_Opcode.rt)); + MoveVariableToX86reg(&m_BranchCompare,"m_BranchCompare",GetMipsRegMapLo(m_Opcode.rt)); } else { BYTE * Jump = NULL; @@ -1473,7 +1473,7 @@ void CRecompilerOps::SLTIU (void) { SetJump8(Jump,m_RecompPos); SetbVariable(&m_BranchCompare,"m_BranchCompare"); Map_GPR_32bit(m_Opcode.rt,FALSE, -1); - MoveVariableToX86reg(&m_BranchCompare,"m_BranchCompare",MipsRegMapLo(m_Opcode.rt)); + MoveVariableToX86reg(&m_BranchCompare,"m_BranchCompare",GetMipsRegMapLo(m_Opcode.rt)); } } @@ -1485,16 +1485,16 @@ void CRecompilerOps::SLTI (void) if (IsConst(m_Opcode.rs)) { DWORD Result = Is64Bit(m_Opcode.rs) ? ((__int64)MipsReg(m_Opcode.rs) < (__int64)((short)m_Opcode.immediate) ? 1:0) : - ( MipsRegLo_S(m_Opcode.rs) < (short)m_Opcode.immediate?1:0); + ( GetMipsRegLo_S(m_Opcode.rs) < (short)m_Opcode.immediate?1:0); UnMap_GPR(m_Opcode.rt, FALSE); m_RegWorkingSet.SetMipsRegState(m_Opcode.rt,CRegInfo::STATE_CONST_32); - MipsRegLo(m_Opcode.rt) = Result; + m_RegWorkingSet.SetMipsRegLo(m_Opcode.rt,Result); } else if (IsMapped(m_Opcode.rs)) { if (Is64Bit(m_Opcode.rs)) { BYTE * Jump[2]; - CompConstToX86reg(MipsRegMapHi(m_Opcode.rs),((short)m_Opcode.immediate >> 31)); + CompConstToX86reg(GetMipsRegMapHi(m_Opcode.rs),((short)m_Opcode.immediate >> 31)); JeLabel8("Low Compare",0); Jump[0] = m_RecompPos - 1; SetlVariable(&m_BranchCompare,"m_BranchCompare"); @@ -1503,41 +1503,41 @@ void CRecompilerOps::SLTI (void) CPU_Message(""); CPU_Message(" Low Compare:"); *((BYTE *)(Jump[0]))=(BYTE)(m_RecompPos - Jump[0] - 1); - CompConstToX86reg(MipsRegMapLo(m_Opcode.rs),(short)m_Opcode.immediate); + CompConstToX86reg(GetMipsRegMapLo(m_Opcode.rs),(short)m_Opcode.immediate); SetbVariable(&m_BranchCompare,"m_BranchCompare"); CPU_Message(""); CPU_Message(" Continue:"); *((BYTE *)(Jump[1]))=(BYTE)(m_RecompPos - Jump[1] - 1); Map_GPR_32bit(m_Opcode.rt,FALSE, -1); - MoveVariableToX86reg(&m_BranchCompare,"m_BranchCompare",MipsRegMapLo(m_Opcode.rt)); + MoveVariableToX86reg(&m_BranchCompare,"m_BranchCompare",GetMipsRegMapLo(m_Opcode.rt)); } else { - /* CompConstToX86reg(MipsRegMapLo(m_Opcode.rs),(short)m_Opcode.immediate); + /* CompConstToX86reg(GetMipsRegMapLo(m_Opcode.rs),(short)m_Opcode.immediate); SetlVariable(&m_BranchCompare,"m_BranchCompare"); Map_GPR_32bit(m_Opcode.rt,FALSE, -1); - MoveVariableToX86reg(&m_BranchCompare,"m_BranchCompare",MipsRegMapLo(m_Opcode.rt)); + MoveVariableToX86reg(&m_BranchCompare,"m_BranchCompare",GetMipsRegMapLo(m_Opcode.rt)); */ ProtectGPR( m_Opcode.rs); Map_GPR_32bit(m_Opcode.rt,FALSE, -1); - CompConstToX86reg(MipsRegMapLo(m_Opcode.rs),(short)m_Opcode.immediate); + CompConstToX86reg(GetMipsRegMapLo(m_Opcode.rs),(short)m_Opcode.immediate); - if (MipsRegMapLo(m_Opcode.rt) > x86_EBX) { + if (GetMipsRegMapLo(m_Opcode.rt) > x86_EBX) { SetlVariable(&m_BranchCompare,"m_BranchCompare"); - MoveVariableToX86reg(&m_BranchCompare,"m_BranchCompare",MipsRegMapLo(m_Opcode.rt)); + MoveVariableToX86reg(&m_BranchCompare,"m_BranchCompare",GetMipsRegMapLo(m_Opcode.rt)); } else { - Setl(MipsRegMapLo(m_Opcode.rt)); - AndConstToX86Reg(MipsRegMapLo(m_Opcode.rt), 1); + Setl(GetMipsRegMapLo(m_Opcode.rt)); + AndConstToX86Reg(GetMipsRegMapLo(m_Opcode.rt), 1); } } } else if (b32BitCore()) { Map_GPR_32bit(m_Opcode.rt,FALSE, -1); CompConstToVariable((short)m_Opcode.immediate,&_GPR[m_Opcode.rs].W[0],CRegName::GPR_Lo[m_Opcode.rs]); - if (MipsRegMapLo(m_Opcode.rt) > x86_EBX) { + if (GetMipsRegMapLo(m_Opcode.rt) > x86_EBX) { SetlVariable(&m_BranchCompare,"m_BranchCompare"); - MoveVariableToX86reg(&m_BranchCompare,"m_BranchCompare",MipsRegMapLo(m_Opcode.rt)); + MoveVariableToX86reg(&m_BranchCompare,"m_BranchCompare",GetMipsRegMapLo(m_Opcode.rt)); } else { - Setl(MipsRegMapLo(m_Opcode.rt)); - AndConstToX86Reg(MipsRegMapLo(m_Opcode.rt), 1); + Setl(GetMipsRegMapLo(m_Opcode.rt)); + AndConstToX86Reg(GetMipsRegMapLo(m_Opcode.rt), 1); } } else { BYTE * Jump[2] = { NULL, NULL }; @@ -1559,7 +1559,7 @@ void CRecompilerOps::SLTI (void) SetJump8(Jump[1],m_RecompPos); } Map_GPR_32bit(m_Opcode.rt,FALSE, -1); - MoveVariableToX86reg(&m_BranchCompare,"m_BranchCompare",MipsRegMapLo(m_Opcode.rt)); + MoveVariableToX86reg(&m_BranchCompare,"m_BranchCompare",GetMipsRegMapLo(m_Opcode.rt)); } } @@ -1571,10 +1571,10 @@ void CRecompilerOps::ANDI (void) { if (IsConst(m_Opcode.rs)) { if (IsMapped(m_Opcode.rt)) { UnMap_GPR(m_Opcode.rt, FALSE); } m_RegWorkingSet.SetMipsRegState(m_Opcode.rt,CRegInfo::STATE_CONST_32); - MipsRegLo(m_Opcode.rt) = cMipsRegLo(m_Opcode.rs) & m_Opcode.immediate; + m_RegWorkingSet.SetMipsRegLo(m_Opcode.rt, cMipsRegLo(m_Opcode.rs) & m_Opcode.immediate); } else if (m_Opcode.immediate != 0) { Map_GPR_32bit(m_Opcode.rt,FALSE,m_Opcode.rs); - AndConstToX86Reg(MipsRegMapLo(m_Opcode.rt),m_Opcode.immediate); + AndConstToX86Reg(GetMipsRegMapLo(m_Opcode.rt),m_Opcode.immediate); } else { Map_GPR_32bit(m_Opcode.rt,FALSE,0); } @@ -1591,8 +1591,8 @@ void CRecompilerOps::ORI (void) { if (IsConst(m_Opcode.rs)) { if (IsMapped(m_Opcode.rt)) { UnMap_GPR(m_Opcode.rt, FALSE); } m_RegWorkingSet.SetMipsRegState(m_Opcode.rt,MipsRegState(m_Opcode.rs)); - MipsRegHi(m_Opcode.rt) = MipsRegHi(m_Opcode.rs); - MipsRegLo(m_Opcode.rt) = cMipsRegLo(m_Opcode.rs) | m_Opcode.immediate; + m_RegWorkingSet.SetMipsRegHi(m_Opcode.rt,GetMipsRegHi(m_Opcode.rs)); + m_RegWorkingSet.SetMipsRegLo(m_Opcode.rt,cMipsRegLo(m_Opcode.rs) | m_Opcode.immediate); } else if (IsMapped(m_Opcode.rs)) { if (b32BitCore()) { @@ -1604,7 +1604,7 @@ void CRecompilerOps::ORI (void) { Map_GPR_32bit(m_Opcode.rt,IsSigned(m_Opcode.rs),m_Opcode.rs); } } - OrConstToX86Reg(m_Opcode.immediate,MipsRegMapLo(m_Opcode.rt)); + OrConstToX86Reg(m_Opcode.immediate,GetMipsRegMapLo(m_Opcode.rt)); } else { if (b32BitCore()) { @@ -1612,7 +1612,7 @@ void CRecompilerOps::ORI (void) { } else { Map_GPR_64bit(m_Opcode.rt,m_Opcode.rs); } - OrConstToX86Reg(m_Opcode.immediate,MipsRegMapLo(m_Opcode.rt)); + OrConstToX86Reg(m_Opcode.immediate,GetMipsRegMapLo(m_Opcode.rt)); } if (bFastSP() && m_Opcode.rt == 29 && m_Opcode.rs != 29) { @@ -1628,8 +1628,8 @@ void CRecompilerOps::XORI (void) { if (IsConst(m_Opcode.rs)) { if (m_Opcode.rs != m_Opcode.rt) { UnMap_GPR(m_Opcode.rt, FALSE); } m_RegWorkingSet.SetMipsRegState(m_Opcode.rt,MipsRegState(m_Opcode.rs)); - MipsRegHi(m_Opcode.rt) = MipsRegHi(m_Opcode.rs); - MipsRegLo(m_Opcode.rt) = cMipsRegLo(m_Opcode.rs) ^ m_Opcode.immediate; + m_RegWorkingSet.SetMipsRegHi(m_Opcode.rt,GetMipsRegHi(m_Opcode.rs)); + m_RegWorkingSet.SetMipsRegLo(m_Opcode.rt,cMipsRegLo(m_Opcode.rs) ^ m_Opcode.immediate); } else { if (IsMapped(m_Opcode.rs) && Is32Bit(m_Opcode.rs)) { Map_GPR_32bit(m_Opcode.rt,IsSigned(m_Opcode.rs),m_Opcode.rs); @@ -1638,7 +1638,7 @@ void CRecompilerOps::XORI (void) { } else { Map_GPR_64bit(m_Opcode.rt,m_Opcode.rs); } - if (m_Opcode.immediate != 0) { XorConstToX86Reg(MipsRegMapLo(m_Opcode.rt),m_Opcode.immediate); } + if (m_Opcode.immediate != 0) { XorConstToX86Reg(GetMipsRegMapLo(m_Opcode.rt),m_Opcode.immediate); } } } @@ -1659,7 +1659,7 @@ void CRecompilerOps::LUI (void) { } UnMap_GPR(m_Opcode.rt, FALSE); - MipsRegLo(m_Opcode.rt) = ((short)m_Opcode.offset << 16); + m_RegWorkingSet.SetMipsRegLo(m_Opcode.rt, ((short)m_Opcode.offset << 16)); m_RegWorkingSet.SetMipsRegState(m_Opcode.rt,CRegInfo::STATE_CONST_32); } @@ -1692,8 +1692,8 @@ void CRecompilerOps::CACHE (void){ DWORD Address = cMipsRegLo(m_Opcode.base) + (short)m_Opcode.offset; PushImm32("Address",Address); } else if (IsMapped(m_Opcode.base)) { - AddConstToX86Reg(MipsRegMapLo(m_Opcode.base),(short)m_Opcode.offset); - Push(MipsRegMapLo(m_Opcode.base)); + AddConstToX86Reg(GetMipsRegMapLo(m_Opcode.base),(short)m_Opcode.offset); + Push(GetMipsRegMapLo(m_Opcode.base)); } else { MoveVariableToX86reg(&_GPR[m_Opcode.base].UW[0],CRegName::GPR_Lo[m_Opcode.base],x86_EAX); AddConstToX86Reg(x86_EAX,(short)m_Opcode.offset); @@ -1783,7 +1783,7 @@ void CRecompilerOps::LL (void) { } } else { Map_GPR_32bit(m_Opcode.rt,TRUE,m_Opcode.base); - AddConstToX86Reg(MipsRegMapLo(m_Opcode.rt),(short)m_Opcode.immediate); + AddConstToX86Reg(GetMipsRegMapLo(m_Opcode.rt),(short)m_Opcode.immediate); } AndConstToX86Reg(cMipsRegLo(m_Opcode.rt),0x1FFFFFFF); MoveX86regToVariable(cMipsRegLo(m_Opcode.rt),_LLAddr,"LLAddr"); @@ -1874,7 +1874,7 @@ void CRecompilerOps::SPECIAL_SLL (void) { if (IsConst(m_Opcode.rt)) { if (IsMapped(m_Opcode.rd)) { UnMap_GPR(m_Opcode.rd, FALSE); } - MipsRegLo(m_Opcode.rd) = cMipsRegLo(m_Opcode.rt) << m_Opcode.sa; + m_RegWorkingSet.SetMipsRegLo(m_Opcode.rd, cMipsRegLo(m_Opcode.rt) << m_Opcode.sa); m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32); return; } @@ -1886,25 +1886,25 @@ void CRecompilerOps::SPECIAL_SLL (void) { case 1: ProtectGPR(m_Opcode.rt); Map_GPR_32bit(m_Opcode.rd,TRUE,-1); - LeaRegReg(MipsRegMapLo(m_Opcode.rd),MipsRegMapLo(m_Opcode.rt), 0, Multip_x2); + LeaRegReg(GetMipsRegMapLo(m_Opcode.rd),GetMipsRegMapLo(m_Opcode.rt), 0, Multip_x2); break; case 2: ProtectGPR(m_Opcode.rt); Map_GPR_32bit(m_Opcode.rd,TRUE,-1); - LeaRegReg(MipsRegMapLo(m_Opcode.rd),MipsRegMapLo(m_Opcode.rt), 0, Multip_x4); + LeaRegReg(GetMipsRegMapLo(m_Opcode.rd),GetMipsRegMapLo(m_Opcode.rt), 0, Multip_x4); break; case 3: ProtectGPR(m_Opcode.rt); Map_GPR_32bit(m_Opcode.rd,TRUE,-1); - LeaRegReg(MipsRegMapLo(m_Opcode.rd),MipsRegMapLo(m_Opcode.rt), 0, Multip_x8); + LeaRegReg(GetMipsRegMapLo(m_Opcode.rd),GetMipsRegMapLo(m_Opcode.rt), 0, Multip_x8); break; default: Map_GPR_32bit(m_Opcode.rd,TRUE,m_Opcode.rt); - ShiftLeftSignImmed(MipsRegMapLo(m_Opcode.rd),(BYTE)m_Opcode.sa); + ShiftLeftSignImmed(GetMipsRegMapLo(m_Opcode.rd),(BYTE)m_Opcode.sa); } } else { Map_GPR_32bit(m_Opcode.rd,TRUE,m_Opcode.rt); - ShiftLeftSignImmed(MipsRegMapLo(m_Opcode.rd),(BYTE)m_Opcode.sa); + ShiftLeftSignImmed(GetMipsRegMapLo(m_Opcode.rd),(BYTE)m_Opcode.sa); } } @@ -1914,12 +1914,12 @@ void CRecompilerOps::SPECIAL_SRL (void) { if (IsConst(m_Opcode.rt)) { if (IsMapped(m_Opcode.rd)) { UnMap_GPR(m_Opcode.rd, FALSE); } - MipsRegLo(m_Opcode.rd) = cMipsRegLo(m_Opcode.rt) >> m_Opcode.sa; + m_RegWorkingSet.SetMipsRegLo(m_Opcode.rd, cMipsRegLo(m_Opcode.rt) >> m_Opcode.sa); m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32); return; } Map_GPR_32bit(m_Opcode.rd,TRUE,m_Opcode.rt); - ShiftRightUnsignImmed(MipsRegMapLo(m_Opcode.rd),(BYTE)m_Opcode.sa); + ShiftRightUnsignImmed(GetMipsRegMapLo(m_Opcode.rd),(BYTE)m_Opcode.sa); } void CRecompilerOps::SPECIAL_SRA (void) { @@ -1928,12 +1928,12 @@ void CRecompilerOps::SPECIAL_SRA (void) { if (IsConst(m_Opcode.rt)) { if (IsMapped(m_Opcode.rd)) { UnMap_GPR(m_Opcode.rd, FALSE); } - MipsRegLo(m_Opcode.rd) = MipsRegLo_S(m_Opcode.rt) >> m_Opcode.sa; + m_RegWorkingSet.SetMipsRegLo(m_Opcode.rd, GetMipsRegLo_S(m_Opcode.rt) >> m_Opcode.sa); m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32); return; } Map_GPR_32bit(m_Opcode.rd,TRUE,m_Opcode.rt); - ShiftRightSignImmed(MipsRegMapLo(m_Opcode.rd),(BYTE)m_Opcode.sa); + ShiftRightSignImmed(GetMipsRegMapLo(m_Opcode.rd),(BYTE)m_Opcode.sa); } void CRecompilerOps::SPECIAL_SLLV (void) { @@ -1944,18 +1944,18 @@ void CRecompilerOps::SPECIAL_SLLV (void) { DWORD Shift = (cMipsRegLo(m_Opcode.rs) & 0x1F); if (IsConst(m_Opcode.rt)) { if (IsMapped(m_Opcode.rd)) { UnMap_GPR(m_Opcode.rd, FALSE); } - MipsRegLo(m_Opcode.rd) = cMipsRegLo(m_Opcode.rt) << Shift; + m_RegWorkingSet.SetMipsRegLo(m_Opcode.rd, cMipsRegLo(m_Opcode.rt) << Shift); m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32); } else { Map_GPR_32bit(m_Opcode.rd,TRUE,m_Opcode.rt); - ShiftLeftSignImmed(MipsRegMapLo(m_Opcode.rd),(BYTE)Shift); + ShiftLeftSignImmed(GetMipsRegMapLo(m_Opcode.rd),(BYTE)Shift); } return; } Map_TempReg(x86_ECX,m_Opcode.rs,FALSE); AndConstToX86Reg(x86_ECX,0x1F); Map_GPR_32bit(m_Opcode.rd,TRUE,m_Opcode.rt); - ShiftLeftSign(MipsRegMapLo(m_Opcode.rd)); + ShiftLeftSign(GetMipsRegMapLo(m_Opcode.rd)); } void CRecompilerOps::SPECIAL_SRLV (void) { @@ -1966,18 +1966,18 @@ void CRecompilerOps::SPECIAL_SRLV (void) { DWORD Shift = (cMipsRegLo(m_Opcode.rs) & 0x1F); if (IsConst(m_Opcode.rt)) { if (IsMapped(m_Opcode.rd)) { UnMap_GPR(m_Opcode.rd, FALSE); } - MipsRegLo(m_Opcode.rd) = cMipsRegLo(m_Opcode.rt) >> Shift; + m_RegWorkingSet.SetMipsRegLo(m_Opcode.rd, cMipsRegLo(m_Opcode.rt) >> Shift); m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32); return; } Map_GPR_32bit(m_Opcode.rd,TRUE,m_Opcode.rt); - ShiftRightUnsignImmed(MipsRegMapLo(m_Opcode.rd),(BYTE)Shift); + ShiftRightUnsignImmed(GetMipsRegMapLo(m_Opcode.rd),(BYTE)Shift); return; } Map_TempReg(x86_ECX,m_Opcode.rs,FALSE); AndConstToX86Reg(x86_ECX,0x1F); Map_GPR_32bit(m_Opcode.rd,TRUE,m_Opcode.rt); - ShiftRightUnsign(MipsRegMapLo(m_Opcode.rd)); + ShiftRightUnsign(GetMipsRegMapLo(m_Opcode.rd)); } void CRecompilerOps::SPECIAL_SRAV (void) { @@ -1988,18 +1988,18 @@ void CRecompilerOps::SPECIAL_SRAV (void) { DWORD Shift = (cMipsRegLo(m_Opcode.rs) & 0x1F); if (IsConst(m_Opcode.rt)) { if (IsMapped(m_Opcode.rd)) { UnMap_GPR(m_Opcode.rd, FALSE); } - MipsRegLo(m_Opcode.rd) = MipsRegLo_S(m_Opcode.rt) >> Shift; + m_RegWorkingSet.SetMipsRegLo(m_Opcode.rd, GetMipsRegLo_S(m_Opcode.rt) >> Shift); m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32); return; } Map_GPR_32bit(m_Opcode.rd,TRUE,m_Opcode.rt); - ShiftRightSignImmed(MipsRegMapLo(m_Opcode.rd),(BYTE)Shift); + ShiftRightSignImmed(GetMipsRegMapLo(m_Opcode.rd),(BYTE)Shift); return; } Map_TempReg(x86_ECX,m_Opcode.rs,FALSE); AndConstToX86Reg(x86_ECX,0x1F); Map_GPR_32bit(m_Opcode.rd,TRUE,m_Opcode.rt); - ShiftRightSign(MipsRegMapLo(m_Opcode.rd)); + ShiftRightSign(GetMipsRegMapLo(m_Opcode.rd)); } void CRecompilerOps::SPECIAL_JR (void) { @@ -2009,7 +2009,7 @@ void CRecompilerOps::SPECIAL_JR (void) { if ((m_CompilePC & 0xFFC) == 0xFFC) { if (IsMapped(m_Opcode.rs)) { - MoveX86regToVariable(MipsRegMapLo(m_Opcode.rs),&R4300iOp::m_JumpToLocation,"R4300iOp::m_JumpToLocation"); + MoveX86regToVariable(GetMipsRegMapLo(m_Opcode.rs),&R4300iOp::m_JumpToLocation,"R4300iOp::m_JumpToLocation"); m_RegWorkingSet.WriteBackRegisters(); } else { m_RegWorkingSet.WriteBackRegisters(); @@ -2030,7 +2030,7 @@ void CRecompilerOps::SPECIAL_JR (void) { if (IsConst(m_Opcode.rs)) { MoveConstToVariable(cMipsRegLo(m_Opcode.rs),_PROGRAM_COUNTER, "PROGRAM_COUNTER"); } else if (IsMapped(m_Opcode.rs)) { - MoveX86regToVariable(MipsRegMapLo(m_Opcode.rs),_PROGRAM_COUNTER, "PROGRAM_COUNTER"); + MoveX86regToVariable(GetMipsRegMapLo(m_Opcode.rs),_PROGRAM_COUNTER, "PROGRAM_COUNTER"); } else { MoveX86regToVariable(Map_TempReg(x86_Any,m_Opcode.rs,FALSE),_PROGRAM_COUNTER, "PROGRAM_COUNTER"); } @@ -2044,7 +2044,7 @@ void CRecompilerOps::SPECIAL_JR (void) { if (IsConst(m_Opcode.rs)) { MoveConstToVariable(cMipsRegLo(m_Opcode.rs),_PROGRAM_COUNTER, "PROGRAM_COUNTER"); } else if (IsMapped(m_Opcode.rs)) { - MoveX86regToVariable(MipsRegMapLo(m_Opcode.rs),_PROGRAM_COUNTER, "PROGRAM_COUNTER"); + MoveX86regToVariable(GetMipsRegMapLo(m_Opcode.rs),_PROGRAM_COUNTER, "PROGRAM_COUNTER"); } else { MoveX86regToVariable(Map_TempReg(x86_Any,m_Opcode.rs,FALSE),_PROGRAM_COUNTER, "PROGRAM_COUNTER"); } @@ -2072,12 +2072,12 @@ void CRecompilerOps::SPECIAL_JALR (void) CRecompilerOps::UnknownOpcode(); } UnMap_GPR( m_Opcode.rd, FALSE); - MipsRegLo(m_Opcode.rd) = m_CompilePC + 8; + m_RegWorkingSet.SetMipsRegLo(m_Opcode.rd,m_CompilePC + 8); m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32); if ((m_CompilePC & 0xFFC) == 0xFFC) { if (IsMapped(m_Opcode.rs)) { - MoveX86regToVariable(MipsRegMapLo(m_Opcode.rs),&R4300iOp::m_JumpToLocation,"R4300iOp::m_JumpToLocation"); + MoveX86regToVariable(GetMipsRegMapLo(m_Opcode.rs),&R4300iOp::m_JumpToLocation,"R4300iOp::m_JumpToLocation"); m_RegWorkingSet.WriteBackRegisters(); } else { m_RegWorkingSet.WriteBackRegisters(); @@ -2102,7 +2102,7 @@ void CRecompilerOps::SPECIAL_JALR (void) m_Section->GenerateSectionLinkage(); } else { if (IsMapped(m_Opcode.rs)) { - MoveX86regToVariable(MipsRegMapLo(m_Opcode.rs),_PROGRAM_COUNTER, "PROGRAM_COUNTER"); + MoveX86regToVariable(GetMipsRegMapLo(m_Opcode.rs),_PROGRAM_COUNTER, "PROGRAM_COUNTER"); } else { MoveX86regToVariable(Map_TempReg(x86_Any,m_Opcode.rs,FALSE),_PROGRAM_COUNTER, "PROGRAM_COUNTER"); } @@ -2128,8 +2128,8 @@ void CRecompilerOps::SPECIAL_MFLO (void) { if (m_Opcode.rd == 0) { return; } Map_GPR_64bit(m_Opcode.rd,-1); - MoveVariableToX86reg(&_RegLO->UW[0],"_RegLO->UW[0]",MipsRegMapLo(m_Opcode.rd)); - MoveVariableToX86reg(&_RegLO->UW[1],"_RegLO->UW[1]",MipsRegMapHi(m_Opcode.rd)); + MoveVariableToX86reg(&_RegLO->UW[0],"_RegLO->UW[0]",GetMipsRegMapLo(m_Opcode.rd)); + MoveVariableToX86reg(&_RegLO->UW[1],"_RegLO->UW[1]",GetMipsRegMapHi(m_Opcode.rd)); } void CRecompilerOps::SPECIAL_MTLO (void) { @@ -2137,7 +2137,7 @@ void CRecompilerOps::SPECIAL_MTLO (void) { if (IsKnown(m_Opcode.rs) && IsConst(m_Opcode.rs)) { if (Is64Bit(m_Opcode.rs)) { - MoveConstToVariable(MipsRegHi(m_Opcode.rs),&_RegLO->UW[1],"_RegLO->UW[1]"); + MoveConstToVariable(GetMipsRegHi(m_Opcode.rs),&_RegLO->UW[1],"_RegLO->UW[1]"); } else if (IsSigned(m_Opcode.rs) && ((cMipsRegLo(m_Opcode.rs) & 0x80000000) != 0)) { MoveConstToVariable(0xFFFFFFFF,&_RegLO->UW[1],"_RegLO->UW[1]"); } else { @@ -2146,13 +2146,13 @@ void CRecompilerOps::SPECIAL_MTLO (void) { MoveConstToVariable(cMipsRegLo(m_Opcode.rs), &_RegLO->UW[0],"_RegLO->UW[0]"); } else if (IsKnown(m_Opcode.rs) && IsMapped(m_Opcode.rs)) { if (Is64Bit(m_Opcode.rs)) { - MoveX86regToVariable(MipsRegMapHi(m_Opcode.rs),&_RegLO->UW[1],"_RegLO->UW[1]"); + MoveX86regToVariable(GetMipsRegMapHi(m_Opcode.rs),&_RegLO->UW[1],"_RegLO->UW[1]"); } else if (IsSigned(m_Opcode.rs)) { MoveX86regToVariable(Map_TempReg(x86_Any,m_Opcode.rs,TRUE),&_RegLO->UW[1],"_RegLO->UW[1]"); } else { MoveConstToVariable(0,&_RegLO->UW[1],"_RegLO->UW[1]"); } - MoveX86regToVariable(MipsRegMapLo(m_Opcode.rs), &_RegLO->UW[0],"_RegLO->UW[0]"); + MoveX86regToVariable(GetMipsRegMapLo(m_Opcode.rs), &_RegLO->UW[0],"_RegLO->UW[0]"); } else { x86Reg reg = Map_TempReg(x86_Any,m_Opcode.rs,TRUE); MoveX86regToVariable(reg,&_RegLO->UW[1],"_RegLO->UW[1]"); @@ -2165,8 +2165,8 @@ void CRecompilerOps::SPECIAL_MFHI (void) { if (m_Opcode.rd == 0) { return; } Map_GPR_64bit(m_Opcode.rd,-1); - MoveVariableToX86reg(&_RegHI->UW[0],"_RegHI->UW[0]",MipsRegMapLo(m_Opcode.rd)); - MoveVariableToX86reg(&_RegHI->UW[1],"_RegHI->UW[1]",MipsRegMapHi(m_Opcode.rd)); + MoveVariableToX86reg(&_RegHI->UW[0],"_RegHI->UW[0]",GetMipsRegMapLo(m_Opcode.rd)); + MoveVariableToX86reg(&_RegHI->UW[1],"_RegHI->UW[1]",GetMipsRegMapHi(m_Opcode.rd)); } void CRecompilerOps::SPECIAL_MTHI (void) { @@ -2174,7 +2174,7 @@ void CRecompilerOps::SPECIAL_MTHI (void) { if (IsKnown(m_Opcode.rs) && IsConst(m_Opcode.rs)) { if (Is64Bit(m_Opcode.rs)) { - MoveConstToVariable(MipsRegHi(m_Opcode.rs),&_RegHI->UW[1],"_RegHI->UW[1]"); + MoveConstToVariable(GetMipsRegHi(m_Opcode.rs),&_RegHI->UW[1],"_RegHI->UW[1]"); } else if (IsSigned(m_Opcode.rs) && ((cMipsRegLo(m_Opcode.rs) & 0x80000000) != 0)) { MoveConstToVariable(0xFFFFFFFF,&_RegHI->UW[1],"_RegHI->UW[1]"); } else { @@ -2183,13 +2183,13 @@ void CRecompilerOps::SPECIAL_MTHI (void) { MoveConstToVariable(cMipsRegLo(m_Opcode.rs), &_RegHI->UW[0],"_RegHI->UW[0]"); } else if (IsKnown(m_Opcode.rs) && IsMapped(m_Opcode.rs)) { if (Is64Bit(m_Opcode.rs)) { - MoveX86regToVariable(MipsRegMapHi(m_Opcode.rs),&_RegHI->UW[1],"_RegHI->UW[1]"); + MoveX86regToVariable(GetMipsRegMapHi(m_Opcode.rs),&_RegHI->UW[1],"_RegHI->UW[1]"); } else if (IsSigned(m_Opcode.rs)) { MoveX86regToVariable(Map_TempReg(x86_Any,m_Opcode.rs,TRUE),&_RegHI->UW[1],"_RegHI->UW[1]"); } else { MoveConstToVariable(0,&_RegHI->UW[1],"_RegHI->UW[1]"); } - MoveX86regToVariable(MipsRegMapLo(m_Opcode.rs), &_RegHI->UW[0],"_RegHI->UW[0]"); + MoveX86regToVariable(GetMipsRegMapLo(m_Opcode.rs), &_RegHI->UW[0],"_RegHI->UW[0]"); } else { x86Reg reg = Map_TempReg(x86_Any,m_Opcode.rs,TRUE); MoveX86regToVariable(reg,&_RegHI->UW[1],"_RegHI->UW[1]"); @@ -2215,8 +2215,8 @@ void CRecompilerOps::SPECIAL_DSLLV (void) { CompConstToX86reg(x86_ECX,0x20); JaeLabel8("MORE32", 0); Jump[0] = m_RecompPos - 1; - ShiftLeftDouble(MipsRegMapHi(m_Opcode.rd),MipsRegMapLo(m_Opcode.rd)); - ShiftLeftSign(MipsRegMapLo(m_Opcode.rd)); + ShiftLeftDouble(GetMipsRegMapHi(m_Opcode.rd),GetMipsRegMapLo(m_Opcode.rd)); + ShiftLeftSign(GetMipsRegMapLo(m_Opcode.rd)); JmpLabel8("continue", 0); Jump[1] = m_RecompPos - 1; @@ -2224,10 +2224,10 @@ void CRecompilerOps::SPECIAL_DSLLV (void) { CPU_Message(""); CPU_Message(" MORE32:"); *((BYTE *)(Jump[0]))=(BYTE)(m_RecompPos - Jump[0] - 1); - MoveX86RegToX86Reg(MipsRegMapLo(m_Opcode.rd),MipsRegMapHi(m_Opcode.rd)); - XorX86RegToX86Reg(MipsRegMapLo(m_Opcode.rd),MipsRegMapLo(m_Opcode.rd)); + MoveX86RegToX86Reg(GetMipsRegMapLo(m_Opcode.rd),GetMipsRegMapHi(m_Opcode.rd)); + XorX86RegToX86Reg(GetMipsRegMapLo(m_Opcode.rd),GetMipsRegMapLo(m_Opcode.rd)); AndConstToX86Reg(x86_ECX,0x1F); - ShiftLeftSign(MipsRegMapHi(m_Opcode.rd)); + ShiftLeftSign(GetMipsRegMapHi(m_Opcode.rd)); //continue: CPU_Message(""); @@ -2245,11 +2245,11 @@ void CRecompilerOps::SPECIAL_DSRLV (void) { DWORD Shift = (cMipsRegLo(m_Opcode.rs) & 0x3F); if (IsConst(m_Opcode.rt)) { if (IsMapped(m_Opcode.rd)) { UnMap_GPR(m_Opcode.rd, FALSE); } - m_RegWorkingSet.SetMipsReg(m_Opcode.rd, Is64Bit(m_Opcode.rt)?MipsReg(m_Opcode.rt):(__int64)MipsRegLo_S(m_Opcode.rt)); + m_RegWorkingSet.SetMipsReg(m_Opcode.rd, Is64Bit(m_Opcode.rt)?MipsReg(m_Opcode.rt):(__int64)GetMipsRegLo_S(m_Opcode.rt)); m_RegWorkingSet.SetMipsReg(m_Opcode.rd, MipsReg(m_Opcode.rd) >> Shift); - if ((MipsRegHi(m_Opcode.rd) == 0) && (cMipsRegLo(m_Opcode.rd) & 0x80000000) == 0) { + if ((GetMipsRegHi(m_Opcode.rd) == 0) && (cMipsRegLo(m_Opcode.rd) & 0x80000000) == 0) { m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32); - } else if ((MipsRegHi(m_Opcode.rd) == 0xFFFFFFFF) && (cMipsRegLo(m_Opcode.rd) & 0x80000000) != 0) { + } else if ((GetMipsRegHi(m_Opcode.rd) == 0xFFFFFFFF) && (cMipsRegLo(m_Opcode.rd) & 0x80000000) != 0) { m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32); } else { m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_64); @@ -2267,8 +2267,8 @@ void CRecompilerOps::SPECIAL_DSRLV (void) { CompConstToX86reg(x86_ECX,0x20); JaeLabel8("MORE32", 0); Jump[0] = m_RecompPos - 1; - ShiftRightDouble(MipsRegMapLo(m_Opcode.rd),MipsRegMapHi(m_Opcode.rd)); - ShiftRightUnsign(MipsRegMapHi(m_Opcode.rd)); + ShiftRightDouble(GetMipsRegMapLo(m_Opcode.rd),GetMipsRegMapHi(m_Opcode.rd)); + ShiftRightUnsign(GetMipsRegMapHi(m_Opcode.rd)); JmpLabel8("continue", 0); Jump[1] = m_RecompPos - 1; @@ -2276,10 +2276,10 @@ void CRecompilerOps::SPECIAL_DSRLV (void) { CPU_Message(""); CPU_Message(" MORE32:"); *((BYTE *)(Jump[0]))=(BYTE)(m_RecompPos - Jump[0] - 1); - MoveX86RegToX86Reg(MipsRegMapHi(m_Opcode.rd),MipsRegMapLo(m_Opcode.rd)); - XorX86RegToX86Reg(MipsRegMapHi(m_Opcode.rd),MipsRegMapHi(m_Opcode.rd)); + MoveX86RegToX86Reg(GetMipsRegMapHi(m_Opcode.rd),GetMipsRegMapLo(m_Opcode.rd)); + XorX86RegToX86Reg(GetMipsRegMapHi(m_Opcode.rd),GetMipsRegMapHi(m_Opcode.rd)); AndConstToX86Reg(x86_ECX,0x1F); - ShiftRightUnsign(MipsRegMapLo(m_Opcode.rd)); + ShiftRightUnsign(GetMipsRegMapLo(m_Opcode.rd)); //continue: CPU_Message(""); @@ -2307,8 +2307,8 @@ void CRecompilerOps::SPECIAL_DSRAV (void) { CompConstToX86reg(x86_ECX,0x20); JaeLabel8("MORE32", 0); Jump[0] = m_RecompPos - 1; - ShiftRightDouble(cMipsRegLo(m_Opcode.rd),MipsRegHi(m_Opcode.rd)); - ShiftRightSign(MipsRegHi(m_Opcode.rd)); + ShiftRightDouble(cMipsRegLo(m_Opcode.rd),GetMipsRegHi(m_Opcode.rd)); + ShiftRightSign(GetMipsRegHi(m_Opcode.rd)); JmpLabel8("continue", 0); Jump[1] = m_RecompPos - 1; @@ -2316,8 +2316,8 @@ void CRecompilerOps::SPECIAL_DSRAV (void) { CPU_Message(""); CPU_Message(" MORE32:"); *((BYTE *)(Jump[0]))=(BYTE)(m_RecompPos - Jump[0] - 1); - MoveX86RegToX86Reg(MipsRegHi(m_Opcode.rd),cMipsRegLo(m_Opcode.rd)); - ShiftRightSignImmed(MipsRegHi(m_Opcode.rd),0x1F); + MoveX86RegToX86Reg(GetMipsRegHi(m_Opcode.rd),cMipsRegLo(m_Opcode.rd)); + ShiftRightSignImmed(GetMipsRegHi(m_Opcode.rd),0x1F); AndConstToX86Reg(x86_ECX,0x1F); ShiftRightSign(cMipsRegLo(m_Opcode.rd)); @@ -2369,7 +2369,7 @@ void CRecompilerOps::SPECIAL_DIV (void) CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC)); if (IsConst(m_Opcode.rt)) { - if (MipsRegLo(m_Opcode.rt) == 0) { + if (GetMipsRegLo(m_Opcode.rt) == 0) { MoveConstToVariable(0, &_RegLO->UW[0], "_RegLO->UW[0]"); MoveConstToVariable(0, &_RegLO->UW[1], "_RegLO->UW[1]"); MoveConstToVariable(0, &_RegHI->UW[0], "_RegHI->UW[0]"); @@ -2378,7 +2378,7 @@ void CRecompilerOps::SPECIAL_DIV (void) } } else { if (IsMapped(m_Opcode.rt)) { - CompConstToX86reg(MipsRegMapLo(m_Opcode.rt),0); + CompConstToX86reg(GetMipsRegMapLo(m_Opcode.rt),0); } else { CompConstToVariable(0, &_GPR[m_Opcode.rt].W[0], CRegName::GPR_Lo[m_Opcode.rt]); } @@ -2398,7 +2398,7 @@ void CRecompilerOps::SPECIAL_DIV (void) ShiftRightSignImmed(x86_EDX,31); if (IsMapped(m_Opcode.rt)) { - idivX86reg(MipsRegMapLo(m_Opcode.rt)); + idivX86reg(GetMipsRegMapLo(m_Opcode.rt)); } else { idivX86reg(Map_TempReg(x86_Any,m_Opcode.rt,FALSE)); } @@ -2419,7 +2419,7 @@ void CRecompilerOps::SPECIAL_DIVU ( void) { CPU_Message(" %X %s",m_CompilePC,R4300iOpcodeName(m_Opcode.Hex,m_CompilePC)); if (IsConst(m_Opcode.rt)) { - if (MipsRegLo(m_Opcode.rt) == 0) { + if (GetMipsRegLo(m_Opcode.rt) == 0) { MoveConstToVariable(0, &_RegLO->UW[0], "_RegLO->UW[0]"); MoveConstToVariable(0, &_RegLO->UW[1], "_RegLO->UW[1]"); MoveConstToVariable(0, &_RegHI->UW[0], "_RegHI->UW[0]"); @@ -2429,7 +2429,7 @@ void CRecompilerOps::SPECIAL_DIVU ( void) { Jump[1] = NULL; } else { if (IsMapped(m_Opcode.rt)) { - CompConstToX86reg(MipsRegMapLo(m_Opcode.rt),0); + CompConstToX86reg(GetMipsRegMapLo(m_Opcode.rt),0); } else { CompConstToVariable(0, &_GPR[m_Opcode.rt].W[0], CRegName::GPR_Lo[m_Opcode.rt]); } @@ -2602,18 +2602,18 @@ void CRecompilerOps::SPECIAL_ADD (void) { if (IsConst(source1) && IsConst(source2)) { DWORD temp = cMipsRegLo(source1) + cMipsRegLo(source2); if (IsMapped(m_Opcode.rd)) { UnMap_GPR(m_Opcode.rd, FALSE); } - MipsRegLo(m_Opcode.rd) = temp; + m_RegWorkingSet.SetMipsRegLo(m_Opcode.rd,temp); m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32); return; } Map_GPR_32bit(m_Opcode.rd,TRUE, source1); if (IsConst(source2)) { - AddConstToX86Reg(MipsRegMapLo(m_Opcode.rd),cMipsRegLo(source2)); + AddConstToX86Reg(GetMipsRegMapLo(m_Opcode.rd),cMipsRegLo(source2)); } else if (IsKnown(source2) && IsMapped(source2)) { - AddX86RegToX86Reg(MipsRegMapLo(m_Opcode.rd),MipsRegMapLo(source2)); + AddX86RegToX86Reg(GetMipsRegMapLo(m_Opcode.rd),GetMipsRegMapLo(source2)); } else { - AddVariableToX86reg(MipsRegMapLo(m_Opcode.rd),&_GPR[source2].W[0],CRegName::GPR_Lo[source2]); + AddVariableToX86reg(GetMipsRegMapLo(m_Opcode.rd),&_GPR[source2].W[0],CRegName::GPR_Lo[source2]); } if (bFastSP() && m_Opcode.rd == 29) { @@ -2631,18 +2631,18 @@ void CRecompilerOps::SPECIAL_ADDU (void) { if (IsConst(source1) && IsConst(source2)) { DWORD temp = cMipsRegLo(source1) + cMipsRegLo(source2); if (IsMapped(m_Opcode.rd)) { UnMap_GPR(m_Opcode.rd, FALSE); } - MipsRegLo(m_Opcode.rd) = temp; + m_RegWorkingSet.SetMipsRegLo(m_Opcode.rd,temp); m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32); return; } Map_GPR_32bit(m_Opcode.rd,TRUE, source1); if (IsConst(source2)) { - AddConstToX86Reg(MipsRegMapLo(m_Opcode.rd),cMipsRegLo(source2)); + AddConstToX86Reg(GetMipsRegMapLo(m_Opcode.rd),cMipsRegLo(source2)); } else if (IsKnown(source2) && IsMapped(source2)) { - AddX86RegToX86Reg(MipsRegMapLo(m_Opcode.rd),MipsRegMapLo(source2)); + AddX86RegToX86Reg(GetMipsRegMapLo(m_Opcode.rd),GetMipsRegMapLo(source2)); } else { - AddVariableToX86reg(MipsRegMapLo(m_Opcode.rd),&_GPR[source2].W[0],CRegName::GPR_Lo[source2]); + AddVariableToX86reg(GetMipsRegMapLo(m_Opcode.rd),&_GPR[source2].W[0],CRegName::GPR_Lo[source2]); } if (bFastSP() && m_Opcode.rd == 29) { @@ -2657,22 +2657,22 @@ void CRecompilerOps::SPECIAL_SUB (void) { if (IsConst(m_Opcode.rt) && IsConst(m_Opcode.rs)) { DWORD temp = cMipsRegLo(m_Opcode.rs) - cMipsRegLo(m_Opcode.rt); if (IsMapped(m_Opcode.rd)) { UnMap_GPR(m_Opcode.rd, FALSE); } - MipsRegLo(m_Opcode.rd) = temp; + m_RegWorkingSet.SetMipsRegLo(m_Opcode.rd,temp); m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32); } else { if (m_Opcode.rd == m_Opcode.rt) { x86Reg Reg = Map_TempReg(x86_Any,m_Opcode.rt,FALSE); Map_GPR_32bit(m_Opcode.rd,TRUE, m_Opcode.rs); - SubX86RegToX86Reg(MipsRegMapLo(m_Opcode.rd),Reg); + SubX86RegToX86Reg(GetMipsRegMapLo(m_Opcode.rd),Reg); return; } Map_GPR_32bit(m_Opcode.rd,TRUE, m_Opcode.rs); if (IsConst(m_Opcode.rt)) { - SubConstFromX86Reg(MipsRegMapLo(m_Opcode.rd),cMipsRegLo(m_Opcode.rt)); + SubConstFromX86Reg(GetMipsRegMapLo(m_Opcode.rd),cMipsRegLo(m_Opcode.rt)); } else if (IsMapped(m_Opcode.rt)) { - SubX86RegToX86Reg(MipsRegMapLo(m_Opcode.rd),MipsRegMapLo(m_Opcode.rt)); + SubX86RegToX86Reg(GetMipsRegMapLo(m_Opcode.rd),GetMipsRegMapLo(m_Opcode.rt)); } else { - SubVariableFromX86reg(MipsRegMapLo(m_Opcode.rd),&_GPR[m_Opcode.rt].W[0],CRegName::GPR_Lo[m_Opcode.rt]); + SubVariableFromX86reg(GetMipsRegMapLo(m_Opcode.rd),&_GPR[m_Opcode.rt].W[0],CRegName::GPR_Lo[m_Opcode.rt]); } } if (bFastSP() && m_Opcode.rd == 29) @@ -2688,22 +2688,22 @@ void CRecompilerOps::SPECIAL_SUBU (void) { if (IsConst(m_Opcode.rt) && IsConst(m_Opcode.rs)) { DWORD temp = cMipsRegLo(m_Opcode.rs) - cMipsRegLo(m_Opcode.rt); if (IsMapped(m_Opcode.rd)) { UnMap_GPR(m_Opcode.rd, FALSE); } - MipsRegLo(m_Opcode.rd) = temp; + m_RegWorkingSet.SetMipsRegLo(m_Opcode.rd,temp); m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32); } else { if (m_Opcode.rd == m_Opcode.rt) { x86Reg Reg = Map_TempReg(x86_Any,m_Opcode.rt,FALSE); Map_GPR_32bit(m_Opcode.rd,TRUE, m_Opcode.rs); - SubX86RegToX86Reg(MipsRegMapLo(m_Opcode.rd),Reg); + SubX86RegToX86Reg(GetMipsRegMapLo(m_Opcode.rd),Reg); return; } Map_GPR_32bit(m_Opcode.rd,TRUE, m_Opcode.rs); if (IsConst(m_Opcode.rt)) { - SubConstFromX86Reg(MipsRegMapLo(m_Opcode.rd),cMipsRegLo(m_Opcode.rt)); + SubConstFromX86Reg(GetMipsRegMapLo(m_Opcode.rd),cMipsRegLo(m_Opcode.rt)); } else if (IsMapped(m_Opcode.rt)) { - SubX86RegToX86Reg(MipsRegMapLo(m_Opcode.rd),MipsRegMapLo(m_Opcode.rt)); + SubX86RegToX86Reg(GetMipsRegMapLo(m_Opcode.rd),GetMipsRegMapLo(m_Opcode.rt)); } else { - SubVariableFromX86reg(MipsRegMapLo(m_Opcode.rd),&_GPR[m_Opcode.rt].W[0],CRegName::GPR_Lo[m_Opcode.rt]); + SubVariableFromX86reg(GetMipsRegMapLo(m_Opcode.rd),&_GPR[m_Opcode.rt].W[0],CRegName::GPR_Lo[m_Opcode.rt]); } } @@ -2721,13 +2721,13 @@ void CRecompilerOps::SPECIAL_AND (void) if (IsConst(m_Opcode.rt) && IsConst(m_Opcode.rs)) { if (Is64Bit(m_Opcode.rt) || Is64Bit(m_Opcode.rs)) { m_RegWorkingSet.SetMipsReg(m_Opcode.rd, - (Is64Bit(m_Opcode.rt)?MipsReg(m_Opcode.rt):(__int64)MipsRegLo_S(m_Opcode.rt)) & - (Is64Bit(m_Opcode.rs)?MipsReg(m_Opcode.rs):(__int64)MipsRegLo_S(m_Opcode.rs)) + (Is64Bit(m_Opcode.rt)?MipsReg(m_Opcode.rt):(__int64)GetMipsRegLo_S(m_Opcode.rt)) & + (Is64Bit(m_Opcode.rs)?MipsReg(m_Opcode.rs):(__int64)GetMipsRegLo_S(m_Opcode.rs)) ); - if (MipsRegLo_S(m_Opcode.rd) < 0 && MipsRegHi_S(m_Opcode.rd) == -1){ + if (GetMipsRegLo_S(m_Opcode.rd) < 0 && GetMipsRegHi_S(m_Opcode.rd) == -1){ m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32); - } else if (MipsRegLo_S(m_Opcode.rd) >= 0 && MipsRegHi_S(m_Opcode.rd) == 0){ + } else if (GetMipsRegLo_S(m_Opcode.rd) >= 0 && GetMipsRegHi_S(m_Opcode.rd) == 0){ m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32); } else { m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_64); @@ -2745,24 +2745,24 @@ void CRecompilerOps::SPECIAL_AND (void) if (Is32Bit(source1) && Is32Bit(source2)) { bool Sign = (IsSigned(m_Opcode.rt) && IsSigned(m_Opcode.rs))?true:false; Map_GPR_32bit(m_Opcode.rd,Sign,source1); - AndX86RegToX86Reg(MipsRegMapLo(m_Opcode.rd),MipsRegMapLo(source2)); + AndX86RegToX86Reg(GetMipsRegMapLo(m_Opcode.rd),GetMipsRegMapLo(source2)); } else if (Is32Bit(source1) || Is32Bit(source2)) { if (IsUnsigned(Is32Bit(source1)?source1:source2)) { Map_GPR_32bit(m_Opcode.rd,FALSE,source1); - AndX86RegToX86Reg(MipsRegMapLo(m_Opcode.rd),MipsRegMapLo(source2)); + AndX86RegToX86Reg(GetMipsRegMapLo(m_Opcode.rd),GetMipsRegMapLo(source2)); } else { Map_GPR_64bit(m_Opcode.rd,source1); if (Is32Bit(source2)) { - AndX86RegToX86Reg(MipsRegMapHi(m_Opcode.rd),Map_TempReg(x86_Any,source2,TRUE)); + AndX86RegToX86Reg(GetMipsRegMapHi(m_Opcode.rd),Map_TempReg(x86_Any,source2,TRUE)); } else { - AndX86RegToX86Reg(MipsRegMapHi(m_Opcode.rd),MipsRegMapHi(source2)); + AndX86RegToX86Reg(GetMipsRegMapHi(m_Opcode.rd),GetMipsRegMapHi(source2)); } - AndX86RegToX86Reg(MipsRegMapLo(m_Opcode.rd),MipsRegMapLo(source2)); + AndX86RegToX86Reg(GetMipsRegMapLo(m_Opcode.rd),GetMipsRegMapLo(source2)); } } else { Map_GPR_64bit(m_Opcode.rd,source1); - AndX86RegToX86Reg(MipsRegMapHi(m_Opcode.rd),MipsRegMapHi(source2)); - AndX86RegToX86Reg(MipsRegMapLo(m_Opcode.rd),MipsRegMapLo(source2)); + AndX86RegToX86Reg(GetMipsRegMapHi(m_Opcode.rd),GetMipsRegMapHi(source2)); + AndX86RegToX86Reg(GetMipsRegMapLo(m_Opcode.rd),GetMipsRegMapLo(source2)); } } else { int ConstReg = IsConst(m_Opcode.rt)?m_Opcode.rt:m_Opcode.rs; @@ -2775,19 +2775,19 @@ void CRecompilerOps::SPECIAL_AND (void) } else { DWORD Value = cMipsRegLo(ConstReg); Map_GPR_32bit(m_Opcode.rd,FALSE, MappedReg); - AndConstToX86Reg(MipsRegMapLo(m_Opcode.rd),Value); + AndConstToX86Reg(GetMipsRegMapLo(m_Opcode.rd),Value); } } else { __int64 Value = MipsReg(ConstReg); Map_GPR_64bit(m_Opcode.rd,MappedReg); - AndConstToX86Reg(MipsRegMapHi(m_Opcode.rd),(DWORD)(Value >> 32)); - AndConstToX86Reg(MipsRegMapLo(m_Opcode.rd),(DWORD)Value); + AndConstToX86Reg(GetMipsRegMapHi(m_Opcode.rd),(DWORD)(Value >> 32)); + AndConstToX86Reg(GetMipsRegMapLo(m_Opcode.rd),(DWORD)Value); } } else if (Is64Bit(MappedReg)) { DWORD Value = cMipsRegLo(ConstReg); if (Value != 0) { Map_GPR_32bit(m_Opcode.rd,IsSigned(ConstReg)?TRUE:FALSE,MappedReg); - AndConstToX86Reg(MipsRegMapLo(m_Opcode.rd),(DWORD)Value); + AndConstToX86Reg(GetMipsRegMapLo(m_Opcode.rd),(DWORD)Value); } else { Map_GPR_32bit(m_Opcode.rd,IsSigned(ConstReg)?TRUE:FALSE, 0); } @@ -2797,7 +2797,7 @@ void CRecompilerOps::SPECIAL_AND (void) if (IsSigned(ConstReg) && IsSigned(MappedReg)) { Sign = true; } if (Value != 0) { Map_GPR_32bit(m_Opcode.rd,Sign,MappedReg); - AndConstToX86Reg(MipsRegMapLo(m_Opcode.rd),Value); + AndConstToX86Reg(GetMipsRegMapLo(m_Opcode.rd),Value); } else { Map_GPR_32bit(m_Opcode.rd,false, 0); } @@ -2811,32 +2811,32 @@ void CRecompilerOps::SPECIAL_AND (void) if (Is64Bit(KnownReg)) { unsigned __int64 Value = MipsReg(KnownReg); Map_GPR_64bit(m_Opcode.rd,UnknownReg); - AndConstToX86Reg(MipsRegMapHi(m_Opcode.rd),(DWORD)(Value >> 32)); - AndConstToX86Reg(MipsRegMapLo(m_Opcode.rd),(DWORD)Value); + AndConstToX86Reg(GetMipsRegMapHi(m_Opcode.rd),(DWORD)(Value >> 32)); + AndConstToX86Reg(GetMipsRegMapLo(m_Opcode.rd),(DWORD)Value); } else { DWORD Value = cMipsRegLo(KnownReg); Map_GPR_32bit(m_Opcode.rd,IsSigned(KnownReg),UnknownReg); - AndConstToX86Reg(MipsRegMapLo(m_Opcode.rd),(DWORD)Value); + AndConstToX86Reg(GetMipsRegMapLo(m_Opcode.rd),(DWORD)Value); } } else { ProtectGPR(KnownReg); if (KnownReg == m_Opcode.rd) { if (Is64Bit(KnownReg)) { Map_GPR_64bit(m_Opcode.rd,KnownReg); - AndVariableToX86Reg(&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg],MipsRegMapHi(m_Opcode.rd)); - AndVariableToX86Reg(&_GPR[UnknownReg].W[0],CRegName::GPR_Lo[UnknownReg],MipsRegMapLo(m_Opcode.rd)); + AndVariableToX86Reg(&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg],GetMipsRegMapHi(m_Opcode.rd)); + AndVariableToX86Reg(&_GPR[UnknownReg].W[0],CRegName::GPR_Lo[UnknownReg],GetMipsRegMapLo(m_Opcode.rd)); } else { Map_GPR_32bit(m_Opcode.rd,IsSigned(KnownReg),KnownReg); - AndVariableToX86Reg(&_GPR[UnknownReg].W[0],CRegName::GPR_Lo[UnknownReg],MipsRegMapLo(m_Opcode.rd)); + AndVariableToX86Reg(&_GPR[UnknownReg].W[0],CRegName::GPR_Lo[UnknownReg],GetMipsRegMapLo(m_Opcode.rd)); } } else { if (Is64Bit(KnownReg)) { Map_GPR_64bit(m_Opcode.rd,UnknownReg); - AndX86RegToX86Reg(MipsRegMapHi(m_Opcode.rd),MipsRegMapHi(KnownReg)); - AndX86RegToX86Reg(MipsRegMapLo(m_Opcode.rd),MipsRegMapLo(KnownReg)); + AndX86RegToX86Reg(GetMipsRegMapHi(m_Opcode.rd),GetMipsRegMapHi(KnownReg)); + AndX86RegToX86Reg(GetMipsRegMapLo(m_Opcode.rd),GetMipsRegMapLo(KnownReg)); } else { Map_GPR_32bit(m_Opcode.rd,IsSigned(KnownReg),UnknownReg); - AndX86RegToX86Reg(MipsRegMapLo(m_Opcode.rd),MipsRegMapLo(KnownReg)); + AndX86RegToX86Reg(GetMipsRegMapLo(m_Opcode.rd),GetMipsRegMapLo(KnownReg)); } } } @@ -2846,9 +2846,9 @@ void CRecompilerOps::SPECIAL_AND (void) Map_GPR_32bit(m_Opcode.rd,true,m_Opcode.rt); } else { Map_GPR_64bit(m_Opcode.rd,m_Opcode.rt); - AndVariableToX86Reg(&_GPR[m_Opcode.rs].W[1],CRegName::GPR_Hi[m_Opcode.rs],MipsRegMapHi(m_Opcode.rd)); + AndVariableToX86Reg(&_GPR[m_Opcode.rs].W[1],CRegName::GPR_Hi[m_Opcode.rs],GetMipsRegMapHi(m_Opcode.rd)); } - AndVariableToX86Reg(&_GPR[m_Opcode.rs].W[0],CRegName::GPR_Lo[m_Opcode.rs],MipsRegMapLo(m_Opcode.rd)); + AndVariableToX86Reg(&_GPR[m_Opcode.rs].W[0],CRegName::GPR_Lo[m_Opcode.rs],GetMipsRegMapLo(m_Opcode.rd)); } } @@ -2860,18 +2860,18 @@ void CRecompilerOps::SPECIAL_OR (void) { if (IsMapped(m_Opcode.rd)) { UnMap_GPR(m_Opcode.rd, FALSE); } if (Is64Bit(m_Opcode.rt) || Is64Bit(m_Opcode.rs)) { m_RegWorkingSet.SetMipsReg(m_Opcode.rd, - (Is64Bit(m_Opcode.rt)?MipsReg(m_Opcode.rt):(__int64)MipsRegLo_S(m_Opcode.rt)) | - (Is64Bit(m_Opcode.rs)?MipsReg(m_Opcode.rs):(__int64)MipsRegLo_S(m_Opcode.rs)) + (Is64Bit(m_Opcode.rt)?MipsReg(m_Opcode.rt):(__int64)GetMipsRegLo_S(m_Opcode.rt)) | + (Is64Bit(m_Opcode.rs)?MipsReg(m_Opcode.rs):(__int64)GetMipsRegLo_S(m_Opcode.rs)) ); - if (MipsRegLo_S(m_Opcode.rd) < 0 && MipsRegHi_S(m_Opcode.rd) == -1){ + if (GetMipsRegLo_S(m_Opcode.rd) < 0 && GetMipsRegHi_S(m_Opcode.rd) == -1){ m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32); - } else if (MipsRegLo_S(m_Opcode.rd) >= 0 && MipsRegHi_S(m_Opcode.rd) == 0){ + } else if (GetMipsRegLo_S(m_Opcode.rd) >= 0 && GetMipsRegHi_S(m_Opcode.rd) == 0){ m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32); } else { m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_64); } } else { - MipsRegLo(m_Opcode.rd) = cMipsRegLo(m_Opcode.rt) | cMipsRegLo(m_Opcode.rs); + m_RegWorkingSet.SetMipsRegLo(m_Opcode.rd, cMipsRegLo(m_Opcode.rt) | cMipsRegLo(m_Opcode.rs)); m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32); } } else if (IsMapped(m_Opcode.rt) && IsMapped(m_Opcode.rs)) { @@ -2883,15 +2883,15 @@ void CRecompilerOps::SPECIAL_OR (void) { if (Is64Bit(m_Opcode.rt) || Is64Bit(m_Opcode.rs)) { Map_GPR_64bit(m_Opcode.rd,source1); if (Is64Bit(source2)) { - OrX86RegToX86Reg(MipsRegMapHi(m_Opcode.rd),MipsRegMapHi(source2)); + OrX86RegToX86Reg(GetMipsRegMapHi(m_Opcode.rd),GetMipsRegMapHi(source2)); } else { - OrX86RegToX86Reg(MipsRegMapHi(m_Opcode.rd),Map_TempReg(x86_Any,source2,TRUE)); + OrX86RegToX86Reg(GetMipsRegMapHi(m_Opcode.rd),Map_TempReg(x86_Any,source2,TRUE)); } } else { ProtectGPR(source2); Map_GPR_32bit(m_Opcode.rd,TRUE,source1); } - OrX86RegToX86Reg(MipsRegMapLo(m_Opcode.rd),MipsRegMapLo(source2)); + OrX86RegToX86Reg(GetMipsRegMapLo(m_Opcode.rd),GetMipsRegMapLo(source2)); } else { DWORD ConstReg = IsConst(m_Opcode.rt)?m_Opcode.rt:m_Opcode.rs; DWORD MappedReg = IsConst(m_Opcode.rt)?m_Opcode.rs:m_Opcode.rt; @@ -2902,19 +2902,19 @@ void CRecompilerOps::SPECIAL_OR (void) { if (Is64Bit(ConstReg)) { Value = MipsReg(ConstReg); } else { - Value = IsSigned(ConstReg)?(__int64)MipsRegLo_S(ConstReg):cMipsRegLo(ConstReg); + Value = IsSigned(ConstReg)?(__int64)GetMipsRegLo_S(ConstReg):cMipsRegLo(ConstReg); } Map_GPR_64bit(m_Opcode.rd,MappedReg); if ((Value >> 32) != 0) { - OrConstToX86Reg((DWORD)(Value >> 32),MipsRegMapHi(m_Opcode.rd)); + OrConstToX86Reg((DWORD)(Value >> 32),GetMipsRegMapHi(m_Opcode.rd)); } if ((DWORD)Value != 0) { - OrConstToX86Reg((DWORD)Value,MipsRegMapLo(m_Opcode.rd)); + OrConstToX86Reg((DWORD)Value,GetMipsRegMapLo(m_Opcode.rd)); } } else { int Value = cMipsRegLo(ConstReg); Map_GPR_32bit(m_Opcode.rd,TRUE, MappedReg); - if (Value != 0) { OrConstToX86Reg(Value,MipsRegMapLo(m_Opcode.rd)); } + if (Value != 0) { OrConstToX86Reg(Value,GetMipsRegMapLo(m_Opcode.rd)); } } } } else if (IsKnown(m_Opcode.rt) || IsKnown(m_Opcode.rs)) { @@ -2924,43 +2924,43 @@ void CRecompilerOps::SPECIAL_OR (void) { if (IsConst(KnownReg)) { unsigned __int64 Value; - Value = Is64Bit(KnownReg)?MipsReg(KnownReg):MipsRegLo_S(KnownReg); + Value = Is64Bit(KnownReg)?MipsReg(KnownReg):GetMipsRegLo_S(KnownReg); if (b32BitCore() && Is32Bit(KnownReg)) { Map_GPR_32bit(m_Opcode.rd,true,UnknownReg); if ((DWORD)Value != 0) { - OrConstToX86Reg((DWORD)Value,MipsRegMapLo(m_Opcode.rd)); + OrConstToX86Reg((DWORD)Value,GetMipsRegMapLo(m_Opcode.rd)); } } else { Map_GPR_64bit(m_Opcode.rd,UnknownReg); if ((Value >> 32) != 0) { - OrConstToX86Reg((DWORD)(Value >> 32),MipsRegMapHi(m_Opcode.rd)); + OrConstToX86Reg((DWORD)(Value >> 32),GetMipsRegMapHi(m_Opcode.rd)); } if ((DWORD)Value != 0) { - OrConstToX86Reg((DWORD)Value,MipsRegMapLo(m_Opcode.rd)); + OrConstToX86Reg((DWORD)Value,GetMipsRegMapLo(m_Opcode.rd)); } } } else { if (b32BitCore()) { Map_GPR_32bit(m_Opcode.rd,true,KnownReg); - OrVariableToX86Reg(&_GPR[UnknownReg].W[0],CRegName::GPR_Lo[UnknownReg],MipsRegMapLo(m_Opcode.rd)); + OrVariableToX86Reg(&_GPR[UnknownReg].W[0],CRegName::GPR_Lo[UnknownReg],GetMipsRegMapLo(m_Opcode.rd)); } else { Map_GPR_64bit(m_Opcode.rd,KnownReg); - OrVariableToX86Reg(&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg],MipsRegMapHi(m_Opcode.rd)); - OrVariableToX86Reg(&_GPR[UnknownReg].W[0],CRegName::GPR_Lo[UnknownReg],MipsRegMapLo(m_Opcode.rd)); + OrVariableToX86Reg(&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg],GetMipsRegMapHi(m_Opcode.rd)); + OrVariableToX86Reg(&_GPR[UnknownReg].W[0],CRegName::GPR_Lo[UnknownReg],GetMipsRegMapLo(m_Opcode.rd)); } } } else { if (b32BitCore()) { Map_GPR_32bit(m_Opcode.rd,true,m_Opcode.rt); - OrVariableToX86Reg(&_GPR[m_Opcode.rs].W[0],CRegName::GPR_Lo[m_Opcode.rs],MipsRegMapLo(m_Opcode.rd)); + OrVariableToX86Reg(&_GPR[m_Opcode.rs].W[0],CRegName::GPR_Lo[m_Opcode.rs],GetMipsRegMapLo(m_Opcode.rd)); } else { Map_GPR_64bit(m_Opcode.rd,m_Opcode.rt); - OrVariableToX86Reg(&_GPR[m_Opcode.rs].W[1],CRegName::GPR_Hi[m_Opcode.rs],MipsRegMapHi(m_Opcode.rd)); - OrVariableToX86Reg(&_GPR[m_Opcode.rs].W[0],CRegName::GPR_Lo[m_Opcode.rs],MipsRegMapLo(m_Opcode.rd)); + OrVariableToX86Reg(&_GPR[m_Opcode.rs].W[1],CRegName::GPR_Hi[m_Opcode.rs],GetMipsRegMapHi(m_Opcode.rd)); + OrVariableToX86Reg(&_GPR[m_Opcode.rs].W[0],CRegName::GPR_Lo[m_Opcode.rs],GetMipsRegMapLo(m_Opcode.rd)); } } if (bFastSP() && m_Opcode.rd == 29) { @@ -2976,7 +2976,7 @@ void CRecompilerOps::SPECIAL_XOR (void) { if (m_Opcode.rt == m_Opcode.rs) { UnMap_GPR( m_Opcode.rd, FALSE); m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32); - MipsRegLo(m_Opcode.rd) = 0; + m_RegWorkingSet.SetMipsRegLo(m_Opcode.rd, 0); return; } if (IsKnown(m_Opcode.rt) && IsKnown(m_Opcode.rs)) { @@ -2989,7 +2989,7 @@ void CRecompilerOps::SPECIAL_XOR (void) { CRecompilerOps::UnknownOpcode(); } else { m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32); - MipsRegLo(m_Opcode.rd) = cMipsRegLo(m_Opcode.rt) ^ cMipsRegLo(m_Opcode.rs); + m_RegWorkingSet.SetMipsRegLo(m_Opcode.rd, cMipsRegLo(m_Opcode.rt) ^ cMipsRegLo(m_Opcode.rs)); } } else if (IsMapped(m_Opcode.rt) && IsMapped(m_Opcode.rs)) { int source1 = m_Opcode.rd == m_Opcode.rt?m_Opcode.rt:m_Opcode.rs; @@ -3000,18 +3000,18 @@ void CRecompilerOps::SPECIAL_XOR (void) { if (Is64Bit(m_Opcode.rt) || Is64Bit(m_Opcode.rs)) { Map_GPR_64bit(m_Opcode.rd,source1); if (Is64Bit(source2)) { - XorX86RegToX86Reg(MipsRegMapHi(m_Opcode.rd),MipsRegMapHi(source2)); + XorX86RegToX86Reg(GetMipsRegMapHi(m_Opcode.rd),GetMipsRegMapHi(source2)); } else if (IsSigned(source2)) { - XorX86RegToX86Reg(MipsRegMapHi(m_Opcode.rd),Map_TempReg(x86_Any,source2,TRUE)); + XorX86RegToX86Reg(GetMipsRegMapHi(m_Opcode.rd),Map_TempReg(x86_Any,source2,TRUE)); } - XorX86RegToX86Reg(MipsRegMapLo(m_Opcode.rd),MipsRegMapLo(source2)); + XorX86RegToX86Reg(GetMipsRegMapLo(m_Opcode.rd),GetMipsRegMapLo(source2)); } else { if (IsSigned(m_Opcode.rt) != IsSigned(m_Opcode.rs)) { Map_GPR_32bit(m_Opcode.rd,TRUE,source1); } else { Map_GPR_32bit(m_Opcode.rd,IsSigned(m_Opcode.rt),source1); } - XorX86RegToX86Reg(MipsRegMapLo(m_Opcode.rd),MipsRegMapLo(source2)); + XorX86RegToX86Reg(GetMipsRegMapLo(m_Opcode.rd),GetMipsRegMapLo(source2)); } } else { DWORD ConstReg = IsConst(m_Opcode.rt)?m_Opcode.rt:m_Opcode.rs; @@ -3020,11 +3020,11 @@ void CRecompilerOps::SPECIAL_XOR (void) { if (Is64Bit(m_Opcode.rt) || Is64Bit(m_Opcode.rs)) { DWORD ConstHi, ConstLo; - ConstHi = Is32Bit(ConstReg)?(DWORD)(MipsRegLo_S(ConstReg) >> 31):MipsRegHi(ConstReg); + ConstHi = Is32Bit(ConstReg)?(DWORD)(GetMipsRegLo_S(ConstReg) >> 31):GetMipsRegHi(ConstReg); ConstLo = cMipsRegLo(ConstReg); Map_GPR_64bit(m_Opcode.rd,MappedReg); - if (ConstHi != 0) { XorConstToX86Reg(MipsRegMapHi(m_Opcode.rd),ConstHi); } - if (ConstLo != 0) { XorConstToX86Reg(MipsRegMapLo(m_Opcode.rd),ConstLo); } + if (ConstHi != 0) { XorConstToX86Reg(GetMipsRegMapHi(m_Opcode.rd),ConstHi); } + if (ConstLo != 0) { XorConstToX86Reg(GetMipsRegMapLo(m_Opcode.rd),ConstLo); } } else { int Value = cMipsRegLo(ConstReg); if (IsSigned(m_Opcode.rt) != IsSigned(m_Opcode.rs)) { @@ -3032,7 +3032,7 @@ void CRecompilerOps::SPECIAL_XOR (void) { } else { Map_GPR_32bit(m_Opcode.rd,IsSigned(MappedReg)?TRUE:FALSE, MappedReg); } - if (Value != 0) { XorConstToX86Reg(MipsRegMapLo(m_Opcode.rd),Value); } + if (Value != 0) { XorConstToX86Reg(GetMipsRegMapLo(m_Opcode.rd),Value); } } } } else if (IsKnown(m_Opcode.rt) || IsKnown(m_Opcode.rs)) { @@ -3046,7 +3046,7 @@ void CRecompilerOps::SPECIAL_XOR (void) { Value = MipsReg(KnownReg); Map_GPR_64bit(m_Opcode.rd,UnknownReg); if ((Value >> 32) != 0) { - XorConstToX86Reg(MipsRegMapHi(m_Opcode.rd),(DWORD)(Value >> 32)); + XorConstToX86Reg(GetMipsRegMapHi(m_Opcode.rd),(DWORD)(Value >> 32)); } } else { Map_GPR_32bit(m_Opcode.rd,true,UnknownReg); @@ -3057,26 +3057,26 @@ void CRecompilerOps::SPECIAL_XOR (void) { } } if ((DWORD)Value != 0) { - XorConstToX86Reg(MipsRegMapLo(m_Opcode.rd),(DWORD)Value); + XorConstToX86Reg(GetMipsRegMapLo(m_Opcode.rd),(DWORD)Value); } } else { if (b32BitCore()) { Map_GPR_32bit(m_Opcode.rd,true,KnownReg); - XorVariableToX86reg(&_GPR[UnknownReg].W[0],CRegName::GPR_Lo[UnknownReg],MipsRegMapLo(m_Opcode.rd)); + XorVariableToX86reg(&_GPR[UnknownReg].W[0],CRegName::GPR_Lo[UnknownReg],GetMipsRegMapLo(m_Opcode.rd)); } else { Map_GPR_64bit(m_Opcode.rd,KnownReg); - XorVariableToX86reg(&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg],MipsRegMapHi(m_Opcode.rd)); - XorVariableToX86reg(&_GPR[UnknownReg].W[0],CRegName::GPR_Lo[UnknownReg],MipsRegMapLo(m_Opcode.rd)); + XorVariableToX86reg(&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg],GetMipsRegMapHi(m_Opcode.rd)); + XorVariableToX86reg(&_GPR[UnknownReg].W[0],CRegName::GPR_Lo[UnknownReg],GetMipsRegMapLo(m_Opcode.rd)); } } } else if (b32BitCore()) { Map_GPR_32bit(m_Opcode.rd,true,m_Opcode.rt); - XorVariableToX86reg(&_GPR[m_Opcode.rs].W[0],CRegName::GPR_Lo[m_Opcode.rs],MipsRegMapLo(m_Opcode.rd)); + XorVariableToX86reg(&_GPR[m_Opcode.rs].W[0],CRegName::GPR_Lo[m_Opcode.rs],GetMipsRegMapLo(m_Opcode.rd)); } else { Map_GPR_64bit(m_Opcode.rd,m_Opcode.rt); - XorVariableToX86reg(&_GPR[m_Opcode.rs].W[1],CRegName::GPR_Hi[m_Opcode.rs],MipsRegMapHi(m_Opcode.rd)); - XorVariableToX86reg(&_GPR[m_Opcode.rs].W[0],CRegName::GPR_Lo[m_Opcode.rs],MipsRegMapLo(m_Opcode.rd)); + XorVariableToX86reg(&_GPR[m_Opcode.rs].W[1],CRegName::GPR_Hi[m_Opcode.rs],GetMipsRegMapHi(m_Opcode.rd)); + XorVariableToX86reg(&_GPR[m_Opcode.rs].W[0],CRegName::GPR_Lo[m_Opcode.rs],GetMipsRegMapLo(m_Opcode.rd)); } } @@ -3088,18 +3088,18 @@ void CRecompilerOps::SPECIAL_NOR (void) { if (IsMapped(m_Opcode.rd)) { UnMap_GPR(m_Opcode.rd, FALSE); } if (Is64Bit(m_Opcode.rt) || Is64Bit(m_Opcode.rs)) { m_RegWorkingSet.SetMipsReg(m_Opcode.rd, - ~((Is64Bit(m_Opcode.rt)?MipsReg(m_Opcode.rt):(__int64)MipsRegLo_S(m_Opcode.rt)) | - (Is64Bit(m_Opcode.rs)?MipsReg(m_Opcode.rs):(__int64)MipsRegLo_S(m_Opcode.rs))) + ~((Is64Bit(m_Opcode.rt)?MipsReg(m_Opcode.rt):(__int64)GetMipsRegLo_S(m_Opcode.rt)) | + (Is64Bit(m_Opcode.rs)?MipsReg(m_Opcode.rs):(__int64)GetMipsRegLo_S(m_Opcode.rs))) ); - if (MipsRegLo_S(m_Opcode.rd) < 0 && MipsRegHi_S(m_Opcode.rd) == -1){ + if (GetMipsRegLo_S(m_Opcode.rd) < 0 && GetMipsRegHi_S(m_Opcode.rd) == -1){ m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32); - } else if (MipsRegLo_S(m_Opcode.rd) >= 0 && MipsRegHi_S(m_Opcode.rd) == 0){ + } else if (GetMipsRegLo_S(m_Opcode.rd) >= 0 && GetMipsRegHi_S(m_Opcode.rd) == 0){ m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32); } else { m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_64); } } else { - MipsRegLo(m_Opcode.rd) = ~(cMipsRegLo(m_Opcode.rt) | cMipsRegLo(m_Opcode.rs)); + m_RegWorkingSet.SetMipsRegLo(m_Opcode.rd,~(cMipsRegLo(m_Opcode.rt) | cMipsRegLo(m_Opcode.rs))); m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32); } } else if (IsMapped(m_Opcode.rt) && IsMapped(m_Opcode.rs)) { @@ -3111,15 +3111,15 @@ void CRecompilerOps::SPECIAL_NOR (void) { if (Is64Bit(m_Opcode.rt) || Is64Bit(m_Opcode.rs)) { Map_GPR_64bit(m_Opcode.rd,source1); if (Is64Bit(source2)) { - OrX86RegToX86Reg(MipsRegMapHi(m_Opcode.rd),MipsRegMapHi(source2)); + OrX86RegToX86Reg(GetMipsRegMapHi(m_Opcode.rd),GetMipsRegMapHi(source2)); } else { - OrX86RegToX86Reg(MipsRegMapHi(m_Opcode.rd),Map_TempReg(x86_Any,source2,TRUE)); + OrX86RegToX86Reg(GetMipsRegMapHi(m_Opcode.rd),Map_TempReg(x86_Any,source2,TRUE)); } } else { ProtectGPR(source2); Map_GPR_32bit(m_Opcode.rd,TRUE,source1); } - OrX86RegToX86Reg(MipsRegMapLo(m_Opcode.rd),MipsRegMapLo(source2)); + OrX86RegToX86Reg(GetMipsRegMapLo(m_Opcode.rd),GetMipsRegMapLo(source2)); } else { DWORD ConstReg = IsConst(m_Opcode.rt)?m_Opcode.rt:m_Opcode.rs; DWORD MappedReg = IsConst(m_Opcode.rt)?m_Opcode.rs:m_Opcode.rt; @@ -3130,19 +3130,19 @@ void CRecompilerOps::SPECIAL_NOR (void) { if (Is64Bit(ConstReg)) { Value = MipsReg(ConstReg); } else { - Value = IsSigned(ConstReg)?(__int64)MipsRegLo_S(ConstReg):cMipsRegLo(ConstReg); + Value = IsSigned(ConstReg)?(__int64)GetMipsRegLo_S(ConstReg):cMipsRegLo(ConstReg); } Map_GPR_64bit(m_Opcode.rd,MappedReg); if ((Value >> 32) != 0) { - OrConstToX86Reg((DWORD)(Value >> 32),MipsRegMapHi(m_Opcode.rd)); + OrConstToX86Reg((DWORD)(Value >> 32),GetMipsRegMapHi(m_Opcode.rd)); } if ((DWORD)Value != 0) { - OrConstToX86Reg((DWORD)Value,MipsRegMapLo(m_Opcode.rd)); + OrConstToX86Reg((DWORD)Value,GetMipsRegMapLo(m_Opcode.rd)); } } else { int Value = cMipsRegLo(ConstReg); Map_GPR_32bit(m_Opcode.rd,TRUE, MappedReg); - if (Value != 0) { OrConstToX86Reg(Value,MipsRegMapLo(m_Opcode.rd)); } + if (Value != 0) { OrConstToX86Reg(Value,GetMipsRegMapLo(m_Opcode.rd)); } } } } else if (IsKnown(m_Opcode.rt) || IsKnown(m_Opcode.rs)) { @@ -3152,43 +3152,43 @@ void CRecompilerOps::SPECIAL_NOR (void) { if (IsConst(KnownReg)) { unsigned __int64 Value; - Value = Is64Bit(KnownReg)?MipsReg(KnownReg):MipsRegLo_S(KnownReg); + Value = Is64Bit(KnownReg)?MipsReg(KnownReg):GetMipsRegLo_S(KnownReg); if (b32BitCore() && Is32Bit(KnownReg)) { Map_GPR_32bit(m_Opcode.rd,true,UnknownReg); if ((DWORD)Value != 0) { - OrConstToX86Reg((DWORD)Value,MipsRegMapLo(m_Opcode.rd)); + OrConstToX86Reg((DWORD)Value,GetMipsRegMapLo(m_Opcode.rd)); } } else { Map_GPR_64bit(m_Opcode.rd,UnknownReg); if ((Value >> 32) != 0) { - OrConstToX86Reg((DWORD)(Value >> 32),MipsRegMapHi(m_Opcode.rd)); + OrConstToX86Reg((DWORD)(Value >> 32),GetMipsRegMapHi(m_Opcode.rd)); } if ((DWORD)Value != 0) { - OrConstToX86Reg((DWORD)Value,MipsRegMapLo(m_Opcode.rd)); + OrConstToX86Reg((DWORD)Value,GetMipsRegMapLo(m_Opcode.rd)); } } } else { if (b32BitCore()) { Map_GPR_32bit(m_Opcode.rd,true,KnownReg); - OrVariableToX86Reg(&_GPR[UnknownReg].W[0],CRegName::GPR_Lo[UnknownReg],MipsRegMapLo(m_Opcode.rd)); + OrVariableToX86Reg(&_GPR[UnknownReg].W[0],CRegName::GPR_Lo[UnknownReg],GetMipsRegMapLo(m_Opcode.rd)); } else { Map_GPR_64bit(m_Opcode.rd,KnownReg); - OrVariableToX86Reg(&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg],MipsRegMapHi(m_Opcode.rd)); - OrVariableToX86Reg(&_GPR[UnknownReg].W[0],CRegName::GPR_Lo[UnknownReg],MipsRegMapLo(m_Opcode.rd)); + OrVariableToX86Reg(&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg],GetMipsRegMapHi(m_Opcode.rd)); + OrVariableToX86Reg(&_GPR[UnknownReg].W[0],CRegName::GPR_Lo[UnknownReg],GetMipsRegMapLo(m_Opcode.rd)); } } } else { if (b32BitCore()) { Map_GPR_32bit(m_Opcode.rd,true,m_Opcode.rt); - OrVariableToX86Reg(&_GPR[m_Opcode.rs].W[0],CRegName::GPR_Lo[m_Opcode.rs],MipsRegMapLo(m_Opcode.rd)); + OrVariableToX86Reg(&_GPR[m_Opcode.rs].W[0],CRegName::GPR_Lo[m_Opcode.rs],GetMipsRegMapLo(m_Opcode.rd)); } else { Map_GPR_64bit(m_Opcode.rd,m_Opcode.rt); - OrVariableToX86Reg(&_GPR[m_Opcode.rs].W[1],CRegName::GPR_Hi[m_Opcode.rs],MipsRegMapHi(m_Opcode.rd)); - OrVariableToX86Reg(&_GPR[m_Opcode.rs].W[0],CRegName::GPR_Lo[m_Opcode.rs],MipsRegMapLo(m_Opcode.rd)); + OrVariableToX86Reg(&_GPR[m_Opcode.rs].W[1],CRegName::GPR_Hi[m_Opcode.rs],GetMipsRegMapHi(m_Opcode.rd)); + OrVariableToX86Reg(&_GPR[m_Opcode.rs].W[0],CRegName::GPR_Lo[m_Opcode.rs],GetMipsRegMapLo(m_Opcode.rd)); } } @@ -3196,9 +3196,9 @@ void CRecompilerOps::SPECIAL_NOR (void) { { if (Is64Bit(m_Opcode.rd)) { - NotX86Reg(MipsRegMapHi(m_Opcode.rd)); + NotX86Reg(GetMipsRegMapHi(m_Opcode.rd)); } - NotX86Reg(MipsRegMapLo(m_Opcode.rd)); + NotX86Reg(GetMipsRegMapLo(m_Opcode.rd)); } } @@ -3215,9 +3215,9 @@ void CRecompilerOps::SPECIAL_SLT (void) { if (IsMapped(m_Opcode.rd)) { UnMap_GPR(m_Opcode.rd, FALSE); } m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32); if (cMipsRegLo_S(m_Opcode.rs) < cMipsRegLo_S(m_Opcode.rt)) { - MipsRegLo(m_Opcode.rd) = 1; + m_RegWorkingSet.SetMipsRegLo(m_Opcode.rd,1); } else { - MipsRegLo(m_Opcode.rd) = 0; + m_RegWorkingSet.SetMipsRegLo(m_Opcode.rd,0); } } } else if (IsMapped(m_Opcode.rt) && IsMapped(m_Opcode.rs)) { @@ -3229,8 +3229,8 @@ void CRecompilerOps::SPECIAL_SLT (void) { BYTE *Jump[2]; CompX86RegToX86Reg( - Is64Bit(m_Opcode.rs)?MipsRegMapHi(m_Opcode.rs):Map_TempReg(x86_Any,m_Opcode.rs,TRUE), - Is64Bit(m_Opcode.rt)?MipsRegMapHi(m_Opcode.rt):Map_TempReg(x86_Any,m_Opcode.rt,TRUE) + Is64Bit(m_Opcode.rs)?GetMipsRegMapHi(m_Opcode.rs):Map_TempReg(x86_Any,m_Opcode.rs,TRUE), + Is64Bit(m_Opcode.rt)?GetMipsRegMapHi(m_Opcode.rt):Map_TempReg(x86_Any,m_Opcode.rt,TRUE) ); JeLabel8("Low Compare",0); Jump[0] = m_RecompPos - 1; @@ -3241,23 +3241,23 @@ void CRecompilerOps::SPECIAL_SLT (void) { CPU_Message(""); CPU_Message(" Low Compare:"); *((BYTE *)(Jump[0]))=(BYTE)(m_RecompPos - Jump[0] - 1); - CompX86RegToX86Reg(MipsRegMapLo(m_Opcode.rs), MipsRegMapLo(m_Opcode.rt)); + CompX86RegToX86Reg(GetMipsRegMapLo(m_Opcode.rs), GetMipsRegMapLo(m_Opcode.rt)); SetbVariable(&m_BranchCompare,"m_BranchCompare"); CPU_Message(""); CPU_Message(" Continue:"); *((BYTE *)(Jump[1]))=(BYTE)(m_RecompPos - Jump[1] - 1); Map_GPR_32bit(m_Opcode.rd,TRUE, -1); - MoveVariableToX86reg(&m_BranchCompare,"m_BranchCompare",MipsRegMapLo(m_Opcode.rd)); + MoveVariableToX86reg(&m_BranchCompare,"m_BranchCompare",GetMipsRegMapLo(m_Opcode.rd)); } else { Map_GPR_32bit(m_Opcode.rd,TRUE, -1); - CompX86RegToX86Reg(MipsRegMapLo(m_Opcode.rs), MipsRegMapLo(m_Opcode.rt)); + CompX86RegToX86Reg(GetMipsRegMapLo(m_Opcode.rs), GetMipsRegMapLo(m_Opcode.rt)); - if (MipsRegMapLo(m_Opcode.rd) > x86_EBX) { + if (GetMipsRegMapLo(m_Opcode.rd) > x86_EBX) { SetlVariable(&m_BranchCompare,"m_BranchCompare"); - MoveVariableToX86reg(&m_BranchCompare,"m_BranchCompare",MipsRegMapLo(m_Opcode.rd)); + MoveVariableToX86reg(&m_BranchCompare,"m_BranchCompare",GetMipsRegMapLo(m_Opcode.rd)); } else { - Setl(MipsRegMapLo(m_Opcode.rd)); - AndConstToX86Reg(MipsRegMapLo(m_Opcode.rd), 1); + Setl(GetMipsRegMapLo(m_Opcode.rd)); + AndConstToX86Reg(GetMipsRegMapLo(m_Opcode.rd), 1); } } } else { @@ -3269,8 +3269,8 @@ void CRecompilerOps::SPECIAL_SLT (void) { BYTE *Jump[2]; CompConstToX86reg( - Is64Bit(MappedReg)?MipsRegMapHi(MappedReg):Map_TempReg(x86_Any,MappedReg,TRUE), - Is64Bit(ConstReg)?MipsRegHi(ConstReg):(MipsRegLo_S(ConstReg) >> 31) + Is64Bit(MappedReg)?GetMipsRegMapHi(MappedReg):Map_TempReg(x86_Any,MappedReg,TRUE), + Is64Bit(ConstReg)?GetMipsRegHi(ConstReg):(GetMipsRegLo_S(ConstReg) >> 31) ); JeLabel8("Low Compare",0); Jump[0] = m_RecompPos - 1; @@ -3285,7 +3285,7 @@ void CRecompilerOps::SPECIAL_SLT (void) { CPU_Message(""); CPU_Message(" Low Compare:"); *((BYTE *)(Jump[0]))=(BYTE)(m_RecompPos - Jump[0] - 1); - CompConstToX86reg(MipsRegMapLo(MappedReg), cMipsRegLo(ConstReg)); + CompConstToX86reg(GetMipsRegMapLo(MappedReg), cMipsRegLo(ConstReg)); if (MappedReg == m_Opcode.rs) { SetbVariable(&m_BranchCompare,"m_BranchCompare"); } else { @@ -3295,26 +3295,26 @@ void CRecompilerOps::SPECIAL_SLT (void) { CPU_Message(" Continue:"); *((BYTE *)(Jump[1]))=(BYTE)(m_RecompPos - Jump[1] - 1); Map_GPR_32bit(m_Opcode.rd,TRUE, -1); - MoveVariableToX86reg(&m_BranchCompare,"m_BranchCompare",MipsRegMapLo(m_Opcode.rd)); + MoveVariableToX86reg(&m_BranchCompare,"m_BranchCompare",GetMipsRegMapLo(m_Opcode.rd)); } else { DWORD Constant = cMipsRegLo(ConstReg); Map_GPR_32bit(m_Opcode.rd,TRUE, -1); - CompConstToX86reg(MipsRegMapLo(MappedReg), Constant); + CompConstToX86reg(GetMipsRegMapLo(MappedReg), Constant); - if (MipsRegMapLo(m_Opcode.rd) > x86_EBX) { + if (GetMipsRegMapLo(m_Opcode.rd) > x86_EBX) { if (MappedReg == m_Opcode.rs) { SetlVariable(&m_BranchCompare,"m_BranchCompare"); } else { SetgVariable(&m_BranchCompare,"m_BranchCompare"); } - MoveVariableToX86reg(&m_BranchCompare,"m_BranchCompare",MipsRegMapLo(m_Opcode.rd)); + MoveVariableToX86reg(&m_BranchCompare,"m_BranchCompare",GetMipsRegMapLo(m_Opcode.rd)); } else { if (MappedReg == m_Opcode.rs) { - Setl(MipsRegMapLo(m_Opcode.rd)); + Setl(GetMipsRegMapLo(m_Opcode.rd)); } else { - Setg(MipsRegMapLo(m_Opcode.rd)); + Setg(GetMipsRegMapLo(m_Opcode.rd)); } - AndConstToX86Reg(MipsRegMapLo(m_Opcode.rd), 1); + AndConstToX86Reg(GetMipsRegMapLo(m_Opcode.rd), 1); } } } @@ -3327,9 +3327,9 @@ void CRecompilerOps::SPECIAL_SLT (void) { { if (Is64Bit(KnownReg)) { if (IsConst(KnownReg)) { - CompConstToVariable(MipsRegHi(KnownReg),&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg]); + CompConstToVariable(GetMipsRegHi(KnownReg),&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg]); } else { - CompX86regToVariable(MipsRegMapHi(KnownReg),&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg]); + CompX86regToVariable(GetMipsRegMapHi(KnownReg),&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg]); } } else { if (IsConst(KnownReg)) { @@ -3355,7 +3355,7 @@ void CRecompilerOps::SPECIAL_SLT (void) { if (IsConst(KnownReg)) { CompConstToVariable(cMipsRegLo(KnownReg),&_GPR[UnknownReg].W[0],CRegName::GPR_Lo[UnknownReg]); } else { - CompX86regToVariable(MipsRegMapLo(KnownReg),&_GPR[UnknownReg].W[0],CRegName::GPR_Lo[UnknownReg]); + CompX86regToVariable(GetMipsRegMapLo(KnownReg),&_GPR[UnknownReg].W[0],CRegName::GPR_Lo[UnknownReg]); } if (KnownReg == (IsConst(KnownReg)?m_Opcode.rs:m_Opcode.rt)) { SetaVariable(&m_BranchCompare,"m_BranchCompare"); @@ -3366,47 +3366,47 @@ void CRecompilerOps::SPECIAL_SLT (void) { CPU_Message(" Continue:"); SetJump8(Jump[1],m_RecompPos); Map_GPR_32bit(m_Opcode.rd,TRUE, -1); - MoveVariableToX86reg(&m_BranchCompare,"m_BranchCompare",MipsRegMapLo(m_Opcode.rd)); + MoveVariableToX86reg(&m_BranchCompare,"m_BranchCompare",GetMipsRegMapLo(m_Opcode.rd)); } else { if (IsMapped(KnownReg)) { ProtectGPR(KnownReg); } bool bConstant = IsConst(KnownReg); - DWORD Value = IsConst(KnownReg) ? MipsRegLo(KnownReg) : 0; + DWORD Value = IsConst(KnownReg) ? GetMipsRegLo(KnownReg) : 0; Map_GPR_32bit(m_Opcode.rd,TRUE, -1); if (bConstant) { CompConstToVariable(Value,&_GPR[UnknownReg].W[0],CRegName::GPR_Lo[UnknownReg]); } else { - CompX86regToVariable(MipsRegMapLo(KnownReg),&_GPR[UnknownReg].W[0],CRegName::GPR_Lo[UnknownReg]); + CompX86regToVariable(GetMipsRegMapLo(KnownReg),&_GPR[UnknownReg].W[0],CRegName::GPR_Lo[UnknownReg]); } - if (MipsRegMapLo(m_Opcode.rd) > x86_EBX) { + if (GetMipsRegMapLo(m_Opcode.rd) > x86_EBX) { if (KnownReg == (bConstant?m_Opcode.rs:m_Opcode.rt)) { SetgVariable(&m_BranchCompare,"m_BranchCompare"); } else { SetlVariable(&m_BranchCompare,"m_BranchCompare"); } - MoveVariableToX86reg(&m_BranchCompare,"m_BranchCompare",MipsRegMapLo(m_Opcode.rd)); + MoveVariableToX86reg(&m_BranchCompare,"m_BranchCompare",GetMipsRegMapLo(m_Opcode.rd)); } else { if (KnownReg == (bConstant?m_Opcode.rs:m_Opcode.rt)) { - Setg(MipsRegMapLo(m_Opcode.rd)); + Setg(GetMipsRegMapLo(m_Opcode.rd)); } else { - Setl(MipsRegMapLo(m_Opcode.rd)); + Setl(GetMipsRegMapLo(m_Opcode.rd)); } - AndConstToX86Reg(MipsRegMapLo(m_Opcode.rd), 1); + AndConstToX86Reg(GetMipsRegMapLo(m_Opcode.rd), 1); } } } else if (b32BitCore()) { x86Reg Reg = Map_TempReg(x86_Any,m_Opcode.rs,false); Map_GPR_32bit(m_Opcode.rd,false, -1); CompX86regToVariable(Reg,&_GPR[m_Opcode.rt].W[0],CRegName::GPR_Lo[m_Opcode.rt]); - if (MipsRegMapLo(m_Opcode.rd) > x86_EBX) { + if (GetMipsRegMapLo(m_Opcode.rd) > x86_EBX) { SetlVariable(&m_BranchCompare,"m_BranchCompare"); - MoveVariableToX86reg(&m_BranchCompare,"m_BranchCompare",MipsRegMapLo(m_Opcode.rd)); + MoveVariableToX86reg(&m_BranchCompare,"m_BranchCompare",GetMipsRegMapLo(m_Opcode.rd)); } else { - Setl(MipsRegMapLo(m_Opcode.rd)); - AndConstToX86Reg(MipsRegMapLo(m_Opcode.rd), 1); + Setl(GetMipsRegMapLo(m_Opcode.rd)); + AndConstToX86Reg(GetMipsRegMapLo(m_Opcode.rd), 1); } } else { BYTE *Jump[2] = { NULL, NULL }; @@ -3431,7 +3431,7 @@ void CRecompilerOps::SPECIAL_SLT (void) { SetJump8(Jump[1],m_RecompPos); } Map_GPR_32bit(m_Opcode.rd,TRUE, -1); - MoveVariableToX86reg(&m_BranchCompare,"m_BranchCompare",MipsRegMapLo(m_Opcode.rd)); + MoveVariableToX86reg(&m_BranchCompare,"m_BranchCompare",GetMipsRegMapLo(m_Opcode.rd)); } } @@ -3448,9 +3448,9 @@ void CRecompilerOps::SPECIAL_SLTU (void) { if (IsMapped(m_Opcode.rd)) { UnMap_GPR(m_Opcode.rd, FALSE); } m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32); if (cMipsRegLo(m_Opcode.rs) < cMipsRegLo(m_Opcode.rt)) { - MipsRegLo(m_Opcode.rd) = 1; + m_RegWorkingSet.SetMipsRegLo(m_Opcode.rd,1); } else { - MipsRegLo(m_Opcode.rd) = 0; + m_RegWorkingSet.SetMipsRegLo(m_Opcode.rd,0); } } } else if (IsMapped(m_Opcode.rt) && IsMapped(m_Opcode.rs)) { @@ -3462,8 +3462,8 @@ void CRecompilerOps::SPECIAL_SLTU (void) { BYTE *Jump[2]; CompX86RegToX86Reg( - Is64Bit(m_Opcode.rs)?MipsRegMapHi(m_Opcode.rs):Map_TempReg(x86_Any,m_Opcode.rs,TRUE), - Is64Bit(m_Opcode.rt)?MipsRegMapHi(m_Opcode.rt):Map_TempReg(x86_Any,m_Opcode.rt,TRUE) + Is64Bit(m_Opcode.rs)?GetMipsRegMapHi(m_Opcode.rs):Map_TempReg(x86_Any,m_Opcode.rs,TRUE), + Is64Bit(m_Opcode.rt)?GetMipsRegMapHi(m_Opcode.rt):Map_TempReg(x86_Any,m_Opcode.rt,TRUE) ); JeLabel8("Low Compare",0); Jump[0] = m_RecompPos - 1; @@ -3474,18 +3474,18 @@ void CRecompilerOps::SPECIAL_SLTU (void) { CPU_Message(""); CPU_Message(" Low Compare:"); *((BYTE *)(Jump[0]))=(BYTE)(m_RecompPos - Jump[0] - 1); - CompX86RegToX86Reg(MipsRegMapLo(m_Opcode.rs), MipsRegMapLo(m_Opcode.rt)); + CompX86RegToX86Reg(GetMipsRegMapLo(m_Opcode.rs), GetMipsRegMapLo(m_Opcode.rt)); SetbVariable(&m_BranchCompare,"m_BranchCompare"); CPU_Message(""); CPU_Message(" Continue:"); *((BYTE *)(Jump[1]))=(BYTE)(m_RecompPos - Jump[1] - 1); Map_GPR_32bit(m_Opcode.rd,TRUE, -1); - MoveVariableToX86reg(&m_BranchCompare,"m_BranchCompare",MipsRegMapLo(m_Opcode.rd)); + MoveVariableToX86reg(&m_BranchCompare,"m_BranchCompare",GetMipsRegMapLo(m_Opcode.rd)); } else { - CompX86RegToX86Reg(MipsRegMapLo(m_Opcode.rs), MipsRegMapLo(m_Opcode.rt)); + CompX86RegToX86Reg(GetMipsRegMapLo(m_Opcode.rs), GetMipsRegMapLo(m_Opcode.rt)); SetbVariable(&m_BranchCompare,"m_BranchCompare"); Map_GPR_32bit(m_Opcode.rd,TRUE, -1); - MoveVariableToX86reg(&m_BranchCompare,"m_BranchCompare",MipsRegMapLo(m_Opcode.rd)); + MoveVariableToX86reg(&m_BranchCompare,"m_BranchCompare",GetMipsRegMapLo(m_Opcode.rd)); } } else { if (Is64Bit(m_Opcode.rt) || Is64Bit(m_Opcode.rs)) { @@ -3498,11 +3498,11 @@ void CRecompilerOps::SPECIAL_SLTU (void) { ConstLo = cMipsRegLo_S(ConstReg); ConstHi = cMipsRegLo_S(ConstReg) >> 31; - if (Is64Bit(ConstReg)) { ConstHi = MipsRegHi(ConstReg); } + if (Is64Bit(ConstReg)) { ConstHi = GetMipsRegHi(ConstReg); } ProtectGPR(MappedReg); - MappedRegLo = MipsRegMapLo(MappedReg); - MappedRegHi = MipsRegMapHi(MappedReg); + MappedRegLo = GetMipsRegMapLo(MappedReg); + MappedRegHi = GetMipsRegMapHi(MappedReg); if (Is32Bit(MappedReg)) { MappedRegHi = Map_TempReg(x86_Any,MappedReg,TRUE); } @@ -3533,19 +3533,19 @@ void CRecompilerOps::SPECIAL_SLTU (void) { CPU_Message(" Continue:"); *((BYTE *)(Jump[1]))=(BYTE)(m_RecompPos - Jump[1] - 1); Map_GPR_32bit(m_Opcode.rd,TRUE, -1); - MoveVariableToX86reg(&m_BranchCompare,"m_BranchCompare",MipsRegMapLo(m_Opcode.rd)); + MoveVariableToX86reg(&m_BranchCompare,"m_BranchCompare",GetMipsRegMapLo(m_Opcode.rd)); } else { DWORD Const = IsConst(m_Opcode.rs)?cMipsRegLo(m_Opcode.rs):cMipsRegLo(m_Opcode.rt); DWORD MappedReg = IsConst(m_Opcode.rt)?m_Opcode.rs:m_Opcode.rt; - CompConstToX86reg(MipsRegMapLo(MappedReg), Const); + CompConstToX86reg(GetMipsRegMapLo(MappedReg), Const); if (MappedReg == m_Opcode.rs) { SetbVariable(&m_BranchCompare,"m_BranchCompare"); } else { SetaVariable(&m_BranchCompare,"m_BranchCompare"); } Map_GPR_32bit(m_Opcode.rd,TRUE, -1); - MoveVariableToX86reg(&m_BranchCompare,"m_BranchCompare",MipsRegMapLo(m_Opcode.rd)); + MoveVariableToX86reg(&m_BranchCompare,"m_BranchCompare",GetMipsRegMapLo(m_Opcode.rd)); } } } else if (IsKnown(m_Opcode.rt) || IsKnown(m_Opcode.rs)) { @@ -3558,11 +3558,11 @@ void CRecompilerOps::SPECIAL_SLTU (void) { { DWORD TestReg = IsConst(KnownReg)?m_Opcode.rs:m_Opcode.rt; if (IsConst(KnownReg)) { - DWORD Value = MipsRegLo(KnownReg); + DWORD Value = GetMipsRegLo(KnownReg); Map_GPR_32bit(m_Opcode.rd,TRUE,-1); CompConstToVariable(Value,&_GPR[UnknownReg].W[0],CRegName::GPR_Lo[UnknownReg]); } else { - CompX86regToVariable(MipsRegMapLo(KnownReg),&_GPR[UnknownReg].W[0],CRegName::GPR_Lo[UnknownReg]); + CompX86regToVariable(GetMipsRegMapLo(KnownReg),&_GPR[UnknownReg].W[0],CRegName::GPR_Lo[UnknownReg]); } if (KnownReg == TestReg) { @@ -3573,13 +3573,13 @@ void CRecompilerOps::SPECIAL_SLTU (void) { } else { if (IsConst(KnownReg)) { if (Is64Bit(KnownReg)) { - CompConstToVariable(MipsRegHi(KnownReg),&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg]); + CompConstToVariable(GetMipsRegHi(KnownReg),&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg]); } else { CompConstToVariable((cMipsRegLo_S(KnownReg) >> 31),&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg]); } } else { if (Is64Bit(KnownReg)) { - CompX86regToVariable(MipsRegMapHi(KnownReg),&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg]); + CompX86regToVariable(GetMipsRegMapHi(KnownReg),&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg]); } else { ProtectGPR(KnownReg); CompX86regToVariable(Map_TempReg(x86_Any,KnownReg,TRUE),&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg]); @@ -3602,7 +3602,7 @@ void CRecompilerOps::SPECIAL_SLTU (void) { if (IsConst(KnownReg)) { CompConstToVariable(cMipsRegLo(KnownReg),&_GPR[UnknownReg].W[0],CRegName::GPR_Lo[UnknownReg]); } else { - CompX86regToVariable(MipsRegMapLo(KnownReg),&_GPR[UnknownReg].W[0],CRegName::GPR_Lo[UnknownReg]); + CompX86regToVariable(GetMipsRegMapLo(KnownReg),&_GPR[UnknownReg].W[0],CRegName::GPR_Lo[UnknownReg]); } if (KnownReg == (IsConst(KnownReg)?m_Opcode.rs:m_Opcode.rt)) { SetaVariable(&m_BranchCompare,"m_BranchCompare"); @@ -3617,13 +3617,13 @@ void CRecompilerOps::SPECIAL_SLTU (void) { } } Map_GPR_32bit(m_Opcode.rd,TRUE,-1); - MoveVariableToX86reg(&m_BranchCompare,"m_BranchCompare",MipsRegMapLo(m_Opcode.rd)); + MoveVariableToX86reg(&m_BranchCompare,"m_BranchCompare",GetMipsRegMapLo(m_Opcode.rd)); } else if (b32BitCore()) { x86Reg Reg = Map_TempReg(x86_Any,m_Opcode.rs,false); Map_GPR_32bit(m_Opcode.rd,false, -1); CompX86regToVariable(Reg,&_GPR[m_Opcode.rt].W[0],CRegName::GPR_Lo[m_Opcode.rt]); SetbVariable(&m_BranchCompare,"m_BranchCompare"); - MoveVariableToX86reg(&m_BranchCompare,"m_BranchCompare",MipsRegMapLo(m_Opcode.rd)); + MoveVariableToX86reg(&m_BranchCompare,"m_BranchCompare",GetMipsRegMapLo(m_Opcode.rd)); } else { BYTE *Jump[2] = { NULL, NULL }; @@ -3647,7 +3647,7 @@ void CRecompilerOps::SPECIAL_SLTU (void) { SetJump8(Jump[1],m_RecompPos); } Map_GPR_32bit(m_Opcode.rd,TRUE, -1); - MoveVariableToX86reg(&m_BranchCompare,"m_BranchCompare",MipsRegMapLo(m_Opcode.rd)); + MoveVariableToX86reg(&m_BranchCompare,"m_BranchCompare",GetMipsRegMapLo(m_Opcode.rd)); } } @@ -3658,12 +3658,12 @@ void CRecompilerOps::SPECIAL_DADD (void) { if (IsConst(m_Opcode.rt) && IsConst(m_Opcode.rs)) { if (IsMapped(m_Opcode.rd)) { UnMap_GPR(m_Opcode.rd, FALSE); } m_RegWorkingSet.SetMipsReg(m_Opcode.rd, - Is64Bit(m_Opcode.rs)?MipsReg(m_Opcode.rs):(__int64)MipsRegLo_S(m_Opcode.rs) + - Is64Bit(m_Opcode.rt)?MipsReg(m_Opcode.rt):(__int64)MipsRegLo_S(m_Opcode.rt) + Is64Bit(m_Opcode.rs)?MipsReg(m_Opcode.rs):(__int64)GetMipsRegLo_S(m_Opcode.rs) + + Is64Bit(m_Opcode.rt)?MipsReg(m_Opcode.rt):(__int64)GetMipsRegLo_S(m_Opcode.rt) ); - if (MipsRegLo_S(m_Opcode.rd) < 0 && MipsRegHi_S(m_Opcode.rd) == -1){ + if (GetMipsRegLo_S(m_Opcode.rd) < 0 && GetMipsRegHi_S(m_Opcode.rd) == -1){ m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32); - } else if (MipsRegLo_S(m_Opcode.rd) >= 0 && MipsRegHi_S(m_Opcode.rd) == 0){ + } else if (GetMipsRegLo_S(m_Opcode.rd) >= 0 && GetMipsRegHi_S(m_Opcode.rd) == 0){ m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32); } else { m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_64); @@ -3674,16 +3674,16 @@ void CRecompilerOps::SPECIAL_DADD (void) { Map_GPR_64bit(m_Opcode.rd,source1); if (IsConst(source2)) { - AddConstToX86Reg(MipsRegMapLo(m_Opcode.rd),cMipsRegLo(source2)); - AddConstToX86Reg(MipsRegMapHi(m_Opcode.rd),MipsRegHi(source2)); + AddConstToX86Reg(GetMipsRegMapLo(m_Opcode.rd),cMipsRegLo(source2)); + AddConstToX86Reg(GetMipsRegMapHi(m_Opcode.rd),GetMipsRegHi(source2)); } else if (IsMapped(source2)) { - x86Reg HiReg = Is64Bit(source2)?MipsRegMapHi(source2):Map_TempReg(x86_Any,source2,TRUE); + x86Reg HiReg = Is64Bit(source2)?GetMipsRegMapHi(source2):Map_TempReg(x86_Any,source2,TRUE); ProtectGPR(source2); - AddX86RegToX86Reg(MipsRegMapLo(m_Opcode.rd),MipsRegMapLo(source2)); - AdcX86RegToX86Reg(MipsRegMapHi(m_Opcode.rd),HiReg); + AddX86RegToX86Reg(GetMipsRegMapLo(m_Opcode.rd),GetMipsRegMapLo(source2)); + AdcX86RegToX86Reg(GetMipsRegMapHi(m_Opcode.rd),HiReg); } else { - AddVariableToX86reg(MipsRegMapLo(m_Opcode.rd),&_GPR[source2].W[0],CRegName::GPR_Lo[source2]); - AdcVariableToX86reg(MipsRegMapHi(m_Opcode.rd),&_GPR[source2].W[1],CRegName::GPR_Hi[source2]); + AddVariableToX86reg(GetMipsRegMapLo(m_Opcode.rd),&_GPR[source2].W[0],CRegName::GPR_Lo[source2]); + AdcVariableToX86reg(GetMipsRegMapHi(m_Opcode.rd),&_GPR[source2].W[1],CRegName::GPR_Hi[source2]); } } } @@ -3693,13 +3693,13 @@ void CRecompilerOps::SPECIAL_DADDU (void) { if (m_Opcode.rd == 0) { return; } if (IsConst(m_Opcode.rt) && IsConst(m_Opcode.rs)) { - __int64 ValRs = Is64Bit(m_Opcode.rs)?MipsReg(m_Opcode.rs):(__int64)MipsRegLo_S(m_Opcode.rs); - __int64 ValRt = Is64Bit(m_Opcode.rt)?MipsReg(m_Opcode.rt):(__int64)MipsRegLo_S(m_Opcode.rt); + __int64 ValRs = Is64Bit(m_Opcode.rs)?MipsReg(m_Opcode.rs):(__int64)GetMipsRegLo_S(m_Opcode.rs); + __int64 ValRt = Is64Bit(m_Opcode.rt)?MipsReg(m_Opcode.rt):(__int64)GetMipsRegLo_S(m_Opcode.rt); if (IsMapped(m_Opcode.rd)) { UnMap_GPR(m_Opcode.rd, FALSE); } m_RegWorkingSet.SetMipsReg(m_Opcode.rd, ValRs + ValRt); - if ((MipsRegHi(m_Opcode.rd) == 0) && (cMipsRegLo(m_Opcode.rd) & 0x80000000) == 0) { + if ((GetMipsRegHi(m_Opcode.rd) == 0) && (cMipsRegLo(m_Opcode.rd) & 0x80000000) == 0) { m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32); - } else if ((MipsRegHi(m_Opcode.rd) == 0xFFFFFFFF) && (cMipsRegLo(m_Opcode.rd) & 0x80000000) != 0) { + } else if ((GetMipsRegHi(m_Opcode.rd) == 0xFFFFFFFF) && (cMipsRegLo(m_Opcode.rd) & 0x80000000) != 0) { m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32); } else { m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_64); @@ -3710,16 +3710,16 @@ void CRecompilerOps::SPECIAL_DADDU (void) { Map_GPR_64bit(m_Opcode.rd,source1); if (IsConst(source2)) { - AddConstToX86Reg(MipsRegMapLo(m_Opcode.rd),cMipsRegLo(source2)); - AddConstToX86Reg(MipsRegMapHi(m_Opcode.rd),MipsRegHi(source2)); + AddConstToX86Reg(GetMipsRegMapLo(m_Opcode.rd),cMipsRegLo(source2)); + AddConstToX86Reg(GetMipsRegMapHi(m_Opcode.rd),GetMipsRegHi(source2)); } else if (IsMapped(source2)) { - x86Reg HiReg = Is64Bit(source2)?MipsRegMapHi(source2):Map_TempReg(x86_Any,source2,TRUE); + x86Reg HiReg = Is64Bit(source2)?GetMipsRegMapHi(source2):Map_TempReg(x86_Any,source2,TRUE); ProtectGPR(source2); - AddX86RegToX86Reg(MipsRegMapLo(m_Opcode.rd),MipsRegMapLo(source2)); - AdcX86RegToX86Reg(MipsRegMapHi(m_Opcode.rd),HiReg); + AddX86RegToX86Reg(GetMipsRegMapLo(m_Opcode.rd),GetMipsRegMapLo(source2)); + AdcX86RegToX86Reg(GetMipsRegMapHi(m_Opcode.rd),HiReg); } else { - AddVariableToX86reg(MipsRegMapLo(m_Opcode.rd),&_GPR[source2].W[0],CRegName::GPR_Lo[source2]); - AdcVariableToX86reg(MipsRegMapHi(m_Opcode.rd),&_GPR[source2].W[1],CRegName::GPR_Hi[source2]); + AddVariableToX86reg(GetMipsRegMapLo(m_Opcode.rd),&_GPR[source2].W[0],CRegName::GPR_Lo[source2]); + AdcVariableToX86reg(GetMipsRegMapHi(m_Opcode.rd),&_GPR[source2].W[1],CRegName::GPR_Hi[source2]); } } } @@ -3731,12 +3731,12 @@ void CRecompilerOps::SPECIAL_DSUB (void) { if (IsConst(m_Opcode.rt) && IsConst(m_Opcode.rs)) { if (IsMapped(m_Opcode.rd)) { UnMap_GPR(m_Opcode.rd, FALSE); } m_RegWorkingSet.SetMipsReg(m_Opcode.rd, - Is64Bit(m_Opcode.rs)?MipsReg(m_Opcode.rs):(__int64)MipsRegLo_S(m_Opcode.rs) - - Is64Bit(m_Opcode.rt)?MipsReg(m_Opcode.rt):(__int64)MipsRegLo_S(m_Opcode.rt) + Is64Bit(m_Opcode.rs)?MipsReg(m_Opcode.rs):(__int64)GetMipsRegLo_S(m_Opcode.rs) - + Is64Bit(m_Opcode.rt)?MipsReg(m_Opcode.rt):(__int64)GetMipsRegLo_S(m_Opcode.rt) ); - if (MipsRegLo_S(m_Opcode.rd) < 0 && MipsRegHi_S(m_Opcode.rd) == -1){ + if (GetMipsRegLo_S(m_Opcode.rd) < 0 && GetMipsRegHi_S(m_Opcode.rd) == -1){ m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32); - } else if (MipsRegLo_S(m_Opcode.rd) >= 0 && MipsRegHi_S(m_Opcode.rd) == 0){ + } else if (GetMipsRegLo_S(m_Opcode.rd) >= 0 && GetMipsRegHi_S(m_Opcode.rd) == 0){ m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32); } else { m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_64); @@ -3746,22 +3746,22 @@ void CRecompilerOps::SPECIAL_DSUB (void) { x86Reg HiReg = Map_TempReg(x86_Any,m_Opcode.rt,TRUE); x86Reg LoReg = Map_TempReg(x86_Any,m_Opcode.rt,FALSE); Map_GPR_64bit(m_Opcode.rd,m_Opcode.rs); - SubX86RegToX86Reg(MipsRegMapLo(m_Opcode.rd),LoReg); - SbbX86RegToX86Reg(MipsRegMapHi(m_Opcode.rd),HiReg); + SubX86RegToX86Reg(GetMipsRegMapLo(m_Opcode.rd),LoReg); + SbbX86RegToX86Reg(GetMipsRegMapHi(m_Opcode.rd),HiReg); return; } Map_GPR_64bit(m_Opcode.rd,m_Opcode.rs); if (IsConst(m_Opcode.rt)) { - SubConstFromX86Reg(MipsRegMapLo(m_Opcode.rd),cMipsRegLo(m_Opcode.rt)); - SbbConstFromX86Reg(MipsRegMapHi(m_Opcode.rd),MipsRegHi(m_Opcode.rt)); + SubConstFromX86Reg(GetMipsRegMapLo(m_Opcode.rd),cMipsRegLo(m_Opcode.rt)); + SbbConstFromX86Reg(GetMipsRegMapHi(m_Opcode.rd),GetMipsRegHi(m_Opcode.rt)); } else if (IsMapped(m_Opcode.rt)) { - x86Reg HiReg = Is64Bit(m_Opcode.rt)?MipsRegMapHi(m_Opcode.rt):Map_TempReg(x86_Any,m_Opcode.rt,TRUE); + x86Reg HiReg = Is64Bit(m_Opcode.rt)?GetMipsRegMapHi(m_Opcode.rt):Map_TempReg(x86_Any,m_Opcode.rt,TRUE); ProtectGPR(m_Opcode.rt); - SubX86RegToX86Reg(MipsRegMapLo(m_Opcode.rd),MipsRegMapLo(m_Opcode.rt)); - SbbX86RegToX86Reg(MipsRegMapHi(m_Opcode.rd),HiReg); + SubX86RegToX86Reg(GetMipsRegMapLo(m_Opcode.rd),GetMipsRegMapLo(m_Opcode.rt)); + SbbX86RegToX86Reg(GetMipsRegMapHi(m_Opcode.rd),HiReg); } else { - SubVariableFromX86reg(MipsRegMapLo(m_Opcode.rd),&_GPR[m_Opcode.rt].W[0],CRegName::GPR_Lo[m_Opcode.rt]); - SbbVariableFromX86reg(MipsRegMapHi(m_Opcode.rd),&_GPR[m_Opcode.rt].W[1],CRegName::GPR_Hi[m_Opcode.rt]); + SubVariableFromX86reg(GetMipsRegMapLo(m_Opcode.rd),&_GPR[m_Opcode.rt].W[0],CRegName::GPR_Lo[m_Opcode.rt]); + SbbVariableFromX86reg(GetMipsRegMapHi(m_Opcode.rd),&_GPR[m_Opcode.rt].W[1],CRegName::GPR_Hi[m_Opcode.rt]); } } } @@ -3773,12 +3773,12 @@ void CRecompilerOps::SPECIAL_DSUBU (void) { if (IsConst(m_Opcode.rt) && IsConst(m_Opcode.rs)) { if (IsMapped(m_Opcode.rd)) { UnMap_GPR(m_Opcode.rd, FALSE); } m_RegWorkingSet.SetMipsReg(m_Opcode.rd, - Is64Bit(m_Opcode.rs)?MipsReg(m_Opcode.rs):(__int64)MipsRegLo_S(m_Opcode.rs) - - Is64Bit(m_Opcode.rt)?MipsReg(m_Opcode.rt):(__int64)MipsRegLo_S(m_Opcode.rt) + Is64Bit(m_Opcode.rs)?MipsReg(m_Opcode.rs):(__int64)GetMipsRegLo_S(m_Opcode.rs) - + Is64Bit(m_Opcode.rt)?MipsReg(m_Opcode.rt):(__int64)GetMipsRegLo_S(m_Opcode.rt) ); - if (MipsRegLo_S(m_Opcode.rd) < 0 && MipsRegHi_S(m_Opcode.rd) == -1){ + if (GetMipsRegLo_S(m_Opcode.rd) < 0 && GetMipsRegHi_S(m_Opcode.rd) == -1){ m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32); - } else if (MipsRegLo_S(m_Opcode.rd) >= 0 && MipsRegHi_S(m_Opcode.rd) == 0){ + } else if (GetMipsRegLo_S(m_Opcode.rd) >= 0 && GetMipsRegHi_S(m_Opcode.rd) == 0){ m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32); } else { m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_64); @@ -3788,22 +3788,22 @@ void CRecompilerOps::SPECIAL_DSUBU (void) { x86Reg HiReg = Map_TempReg(x86_Any,m_Opcode.rt,TRUE); x86Reg LoReg = Map_TempReg(x86_Any,m_Opcode.rt,FALSE); Map_GPR_64bit(m_Opcode.rd,m_Opcode.rs); - SubX86RegToX86Reg(MipsRegMapLo(m_Opcode.rd),LoReg); - SbbX86RegToX86Reg(MipsRegMapHi(m_Opcode.rd),HiReg); + SubX86RegToX86Reg(GetMipsRegMapLo(m_Opcode.rd),LoReg); + SbbX86RegToX86Reg(GetMipsRegMapHi(m_Opcode.rd),HiReg); return; } Map_GPR_64bit(m_Opcode.rd,m_Opcode.rs); if (IsConst(m_Opcode.rt)) { - SubConstFromX86Reg(MipsRegMapLo(m_Opcode.rd),cMipsRegLo(m_Opcode.rt)); - SbbConstFromX86Reg(MipsRegMapHi(m_Opcode.rd),MipsRegHi(m_Opcode.rt)); + SubConstFromX86Reg(GetMipsRegMapLo(m_Opcode.rd),cMipsRegLo(m_Opcode.rt)); + SbbConstFromX86Reg(GetMipsRegMapHi(m_Opcode.rd),GetMipsRegHi(m_Opcode.rt)); } else if (IsMapped(m_Opcode.rt)) { - x86Reg HiReg = Is64Bit(m_Opcode.rt)?MipsRegMapHi(m_Opcode.rt):Map_TempReg(x86_Any,m_Opcode.rt,TRUE); + x86Reg HiReg = Is64Bit(m_Opcode.rt)?GetMipsRegMapHi(m_Opcode.rt):Map_TempReg(x86_Any,m_Opcode.rt,TRUE); ProtectGPR(m_Opcode.rt); - SubX86RegToX86Reg(MipsRegMapLo(m_Opcode.rd),MipsRegMapLo(m_Opcode.rt)); - SbbX86RegToX86Reg(MipsRegMapHi(m_Opcode.rd),HiReg); + SubX86RegToX86Reg(GetMipsRegMapLo(m_Opcode.rd),GetMipsRegMapLo(m_Opcode.rt)); + SbbX86RegToX86Reg(GetMipsRegMapHi(m_Opcode.rd),HiReg); } else { - SubVariableFromX86reg(MipsRegMapLo(m_Opcode.rd),&_GPR[m_Opcode.rt].W[0],CRegName::GPR_Lo[m_Opcode.rt]); - SbbVariableFromX86reg(MipsRegMapHi(m_Opcode.rd),&_GPR[m_Opcode.rt].W[1],CRegName::GPR_Hi[m_Opcode.rt]); + SubVariableFromX86reg(GetMipsRegMapLo(m_Opcode.rd),&_GPR[m_Opcode.rt].W[0],CRegName::GPR_Lo[m_Opcode.rt]); + SbbVariableFromX86reg(GetMipsRegMapHi(m_Opcode.rd),&_GPR[m_Opcode.rt].W[1],CRegName::GPR_Hi[m_Opcode.rt]); } } } @@ -3817,10 +3817,10 @@ void CRecompilerOps::SPECIAL_DSLL (void) { { if (IsMapped(m_Opcode.rd)) { UnMap_GPR(m_Opcode.rd, FALSE); } - m_RegWorkingSet.SetMipsReg(m_Opcode.rd, Is64Bit(m_Opcode.rt)?MipsReg(m_Opcode.rt):(__int64)MipsRegLo_S(m_Opcode.rt) << m_Opcode.sa); - if (MipsRegLo_S(m_Opcode.rd) < 0 && MipsRegHi_S(m_Opcode.rd) == -1){ + m_RegWorkingSet.SetMipsReg(m_Opcode.rd, Is64Bit(m_Opcode.rt)?MipsReg(m_Opcode.rt):(__int64)GetMipsRegLo_S(m_Opcode.rt) << m_Opcode.sa); + if (GetMipsRegLo_S(m_Opcode.rd) < 0 && GetMipsRegHi_S(m_Opcode.rd) == -1){ m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32); - } else if (MipsRegLo_S(m_Opcode.rd) >= 0 && MipsRegHi_S(m_Opcode.rd) == 0){ + } else if (GetMipsRegLo_S(m_Opcode.rd) >= 0 && GetMipsRegHi_S(m_Opcode.rd) == 0){ m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32); } else { m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_64); @@ -3829,8 +3829,8 @@ void CRecompilerOps::SPECIAL_DSLL (void) { } Map_GPR_64bit(m_Opcode.rd,m_Opcode.rt); - ShiftLeftDoubleImmed(MipsRegMapHi(m_Opcode.rd),MipsRegMapLo(m_Opcode.rd),(BYTE)m_Opcode.sa); - ShiftLeftSignImmed( MipsRegMapLo(m_Opcode.rd),(BYTE)m_Opcode.sa); + ShiftLeftDoubleImmed(GetMipsRegMapHi(m_Opcode.rd),GetMipsRegMapLo(m_Opcode.rd),(BYTE)m_Opcode.sa); + ShiftLeftSignImmed( GetMipsRegMapLo(m_Opcode.rd),(BYTE)m_Opcode.sa); } void CRecompilerOps::SPECIAL_DSRL (void) { @@ -3841,10 +3841,10 @@ void CRecompilerOps::SPECIAL_DSRL (void) { if (IsConst(m_Opcode.rt)) { if (IsMapped(m_Opcode.rd)) { UnMap_GPR(m_Opcode.rd, FALSE); } - m_RegWorkingSet.SetMipsReg(m_Opcode.rd,Is64Bit(m_Opcode.rt)?MipsReg(m_Opcode.rt):(QWORD)MipsRegLo_S(m_Opcode.rt) >> m_Opcode.sa); - if (MipsRegLo_S(m_Opcode.rd) < 0 && MipsRegHi_S(m_Opcode.rd) == -1){ + m_RegWorkingSet.SetMipsReg(m_Opcode.rd,Is64Bit(m_Opcode.rt)?MipsReg(m_Opcode.rt):(QWORD)GetMipsRegLo_S(m_Opcode.rt) >> m_Opcode.sa); + if (GetMipsRegLo_S(m_Opcode.rd) < 0 && GetMipsRegHi_S(m_Opcode.rd) == -1){ m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32); - } else if (MipsRegLo_S(m_Opcode.rd) >= 0 && MipsRegHi_S(m_Opcode.rd) == 0){ + } else if (GetMipsRegLo_S(m_Opcode.rd) >= 0 && GetMipsRegHi_S(m_Opcode.rd) == 0){ m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32); } else { m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_64); @@ -3852,8 +3852,8 @@ void CRecompilerOps::SPECIAL_DSRL (void) { return; } Map_GPR_64bit(m_Opcode.rd,m_Opcode.rt); - ShiftRightDoubleImmed(MipsRegMapLo(m_Opcode.rd),MipsRegMapHi(m_Opcode.rd),(BYTE)m_Opcode.sa); - ShiftRightUnsignImmed(MipsRegMapHi(m_Opcode.rd),(BYTE)m_Opcode.sa); + ShiftRightDoubleImmed(GetMipsRegMapLo(m_Opcode.rd),GetMipsRegMapHi(m_Opcode.rd),(BYTE)m_Opcode.sa); + ShiftRightUnsignImmed(GetMipsRegMapHi(m_Opcode.rd),(BYTE)m_Opcode.sa); } void CRecompilerOps::SPECIAL_DSRA (void) { @@ -3864,10 +3864,10 @@ void CRecompilerOps::SPECIAL_DSRA (void) { if (IsConst(m_Opcode.rt)) { if (IsMapped(m_Opcode.rd)) { UnMap_GPR(m_Opcode.rd, FALSE); } - MipsReg_S(m_Opcode.rd) = Is64Bit(m_Opcode.rt)?MipsReg_S(m_Opcode.rt):(__int64)MipsRegLo_S(m_Opcode.rt) >> m_Opcode.sa; - if (MipsRegLo_S(m_Opcode.rd) < 0 && MipsRegHi_S(m_Opcode.rd) == -1){ + MipsReg_S(m_Opcode.rd) = Is64Bit(m_Opcode.rt)?MipsReg_S(m_Opcode.rt):(__int64)GetMipsRegLo_S(m_Opcode.rt) >> m_Opcode.sa; + if (GetMipsRegLo_S(m_Opcode.rd) < 0 && GetMipsRegHi_S(m_Opcode.rd) == -1){ m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32); - } else if (MipsRegLo_S(m_Opcode.rd) >= 0 && MipsRegHi_S(m_Opcode.rd) == 0){ + } else if (GetMipsRegLo_S(m_Opcode.rd) >= 0 && GetMipsRegHi_S(m_Opcode.rd) == 0){ m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32); } else { m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_64); @@ -3875,8 +3875,8 @@ void CRecompilerOps::SPECIAL_DSRA (void) { return; } Map_GPR_64bit(m_Opcode.rd,m_Opcode.rt); - ShiftRightDoubleImmed(MipsRegMapLo(m_Opcode.rd),MipsRegMapHi(m_Opcode.rd),(BYTE)m_Opcode.sa); - ShiftRightSignImmed(MipsRegMapHi(m_Opcode.rd),(BYTE)m_Opcode.sa); + ShiftRightDoubleImmed(GetMipsRegMapLo(m_Opcode.rd),GetMipsRegMapHi(m_Opcode.rd),(BYTE)m_Opcode.sa); + ShiftRightSignImmed(GetMipsRegMapHi(m_Opcode.rd),(BYTE)m_Opcode.sa); } void CRecompilerOps::SPECIAL_DSLL32 (void) { @@ -3885,11 +3885,11 @@ void CRecompilerOps::SPECIAL_DSLL32 (void) { if (m_Opcode.rd == 0) { return; } if (IsConst(m_Opcode.rt)) { if (m_Opcode.rt != m_Opcode.rd) { UnMap_GPR(m_Opcode.rd, FALSE); } - MipsRegHi(m_Opcode.rd) = cMipsRegLo(m_Opcode.rt) << m_Opcode.sa; - MipsRegLo(m_Opcode.rd) = 0; - if (MipsRegLo_S(m_Opcode.rd) < 0 && MipsRegHi_S(m_Opcode.rd) == -1){ + m_RegWorkingSet.SetMipsRegHi(m_Opcode.rd,cMipsRegLo(m_Opcode.rt) << m_Opcode.sa); + m_RegWorkingSet.SetMipsRegLo(m_Opcode.rd,0); + if (GetMipsRegLo_S(m_Opcode.rd) < 0 && GetMipsRegHi_S(m_Opcode.rd) == -1){ m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32); - } else if (MipsRegLo_S(m_Opcode.rd) >= 0 && MipsRegHi_S(m_Opcode.rd) == 0){ + } else if (GetMipsRegLo_S(m_Opcode.rd) >= 0 && GetMipsRegHi_S(m_Opcode.rd) == 0){ m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32); } else { m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_64); @@ -3899,24 +3899,24 @@ void CRecompilerOps::SPECIAL_DSLL32 (void) { ProtectGPR(m_Opcode.rt); Map_GPR_64bit(m_Opcode.rd,-1); if (m_Opcode.rt != m_Opcode.rd) { - MoveX86RegToX86Reg(MipsRegMapLo(m_Opcode.rt),MipsRegMapHi(m_Opcode.rd)); + MoveX86RegToX86Reg(GetMipsRegMapLo(m_Opcode.rt),GetMipsRegMapHi(m_Opcode.rd)); } else { - CPU_Message(" regcache: switch hi (%s) with lo (%s) for %s",x86_Name(MipsRegMapHi(m_Opcode.rt)),x86_Name(MipsRegMapLo(m_Opcode.rt)),CRegName::GPR[m_Opcode.rt]); - x86Reg HiReg = MipsRegMapHi(m_Opcode.rt); - m_RegWorkingSet.SetMipsRegMapHi(m_Opcode.rt,MipsRegMapLo(m_Opcode.rt)); + CPU_Message(" regcache: switch hi (%s) with lo (%s) for %s",x86_Name(GetMipsRegMapHi(m_Opcode.rt)),x86_Name(GetMipsRegMapLo(m_Opcode.rt)),CRegName::GPR[m_Opcode.rt]); + x86Reg HiReg = GetMipsRegMapHi(m_Opcode.rt); + m_RegWorkingSet.SetMipsRegMapHi(m_Opcode.rt,GetMipsRegMapLo(m_Opcode.rt)); m_RegWorkingSet.SetMipsRegMapLo(m_Opcode.rt,HiReg); } if ((BYTE)m_Opcode.sa != 0) { - ShiftLeftSignImmed(MipsRegMapHi(m_Opcode.rd),(BYTE)m_Opcode.sa); + ShiftLeftSignImmed(GetMipsRegMapHi(m_Opcode.rd),(BYTE)m_Opcode.sa); } - XorX86RegToX86Reg(MipsRegMapLo(m_Opcode.rd),MipsRegMapLo(m_Opcode.rd)); + XorX86RegToX86Reg(GetMipsRegMapLo(m_Opcode.rd),GetMipsRegMapLo(m_Opcode.rd)); } else { Map_GPR_64bit(m_Opcode.rd,-1); - MoveVariableToX86reg(&_GPR[m_Opcode.rt],CRegName::GPR_Hi[m_Opcode.rt],MipsRegMapHi(m_Opcode.rd)); + MoveVariableToX86reg(&_GPR[m_Opcode.rt],CRegName::GPR_Hi[m_Opcode.rt],GetMipsRegMapHi(m_Opcode.rd)); if ((BYTE)m_Opcode.sa != 0) { - ShiftLeftSignImmed(MipsRegMapHi(m_Opcode.rd),(BYTE)m_Opcode.sa); + ShiftLeftSignImmed(GetMipsRegMapHi(m_Opcode.rd),(BYTE)m_Opcode.sa); } - XorX86RegToX86Reg(MipsRegMapLo(m_Opcode.rd),MipsRegMapLo(m_Opcode.rd)); + XorX86RegToX86Reg(GetMipsRegMapLo(m_Opcode.rd),GetMipsRegMapLo(m_Opcode.rd)); } } @@ -3926,31 +3926,31 @@ void CRecompilerOps::SPECIAL_DSRL32 (void) { if (IsConst(m_Opcode.rt)) { if (m_Opcode.rt != m_Opcode.rd) { UnMap_GPR(m_Opcode.rd, FALSE); } m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32); - MipsRegLo(m_Opcode.rd) = (DWORD)(MipsReg(m_Opcode.rt) >> (m_Opcode.sa + 32)); + m_RegWorkingSet.SetMipsRegLo(m_Opcode.rd, (DWORD)(MipsReg(m_Opcode.rt) >> (m_Opcode.sa + 32))); } else if (IsMapped(m_Opcode.rt)) { ProtectGPR(m_Opcode.rt); if (Is64Bit(m_Opcode.rt)) { if (m_Opcode.rt == m_Opcode.rd) { - CPU_Message(" regcache: switch hi (%s) with lo (%s) for %s",x86_Name(MipsRegMapHi(m_Opcode.rt)),x86_Name(MipsRegMapLo(m_Opcode.rt)),CRegName::GPR[m_Opcode.rt]); - x86Reg HiReg = MipsRegMapHi(m_Opcode.rt); - m_RegWorkingSet.SetMipsRegMapHi(m_Opcode.rt,MipsRegMapLo(m_Opcode.rt)); + CPU_Message(" regcache: switch hi (%s) with lo (%s) for %s",x86_Name(GetMipsRegMapHi(m_Opcode.rt)),x86_Name(GetMipsRegMapLo(m_Opcode.rt)),CRegName::GPR[m_Opcode.rt]); + x86Reg HiReg = GetMipsRegMapHi(m_Opcode.rt); + m_RegWorkingSet.SetMipsRegMapHi(m_Opcode.rt,GetMipsRegMapLo(m_Opcode.rt)); m_RegWorkingSet.SetMipsRegMapLo(m_Opcode.rt,HiReg); Map_GPR_32bit(m_Opcode.rd,FALSE,-1); } else { Map_GPR_32bit(m_Opcode.rd,FALSE,-1); - MoveX86RegToX86Reg(MipsRegMapHi(m_Opcode.rt),MipsRegMapLo(m_Opcode.rd)); + MoveX86RegToX86Reg(GetMipsRegMapHi(m_Opcode.rt),GetMipsRegMapLo(m_Opcode.rd)); } if ((BYTE)m_Opcode.sa != 0) { - ShiftRightUnsignImmed(MipsRegMapLo(m_Opcode.rd),(BYTE)m_Opcode.sa); + ShiftRightUnsignImmed(GetMipsRegMapLo(m_Opcode.rd),(BYTE)m_Opcode.sa); } } else { CRecompilerOps::UnknownOpcode(); } } else { Map_GPR_32bit(m_Opcode.rd,FALSE,-1); - MoveVariableToX86reg(&_GPR[m_Opcode.rt].UW[1],CRegName::GPR_Hi[m_Opcode.rt],MipsRegMapLo(m_Opcode.rd)); + MoveVariableToX86reg(&_GPR[m_Opcode.rt].UW[1],CRegName::GPR_Hi[m_Opcode.rt],GetMipsRegMapLo(m_Opcode.rd)); if ((BYTE)m_Opcode.sa != 0) { - ShiftRightUnsignImmed(MipsRegMapLo(m_Opcode.rd),(BYTE)m_Opcode.sa); + ShiftRightUnsignImmed(GetMipsRegMapLo(m_Opcode.rd),(BYTE)m_Opcode.sa); } } } @@ -3961,31 +3961,31 @@ void CRecompilerOps::SPECIAL_DSRA32 (void) { if (IsConst(m_Opcode.rt)) { if (m_Opcode.rt != m_Opcode.rd) { UnMap_GPR(m_Opcode.rd, FALSE); } m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32); - MipsRegLo(m_Opcode.rd) = (DWORD)(MipsReg_S(m_Opcode.rt) >> (m_Opcode.sa + 32)); + m_RegWorkingSet.SetMipsRegLo(m_Opcode.rd,(DWORD)(MipsReg_S(m_Opcode.rt) >> (m_Opcode.sa + 32))); } else if (IsMapped(m_Opcode.rt)) { ProtectGPR(m_Opcode.rt); if (Is64Bit(m_Opcode.rt)) { if (m_Opcode.rt == m_Opcode.rd) { - CPU_Message(" regcache: switch hi (%s) with lo (%s) for %s",x86_Name(MipsRegMapHi(m_Opcode.rt)),x86_Name(MipsRegMapLo(m_Opcode.rt)),CRegName::GPR[m_Opcode.rt]); - x86Reg HiReg = MipsRegMapHi(m_Opcode.rt); - m_RegWorkingSet.SetMipsRegMapHi(m_Opcode.rt,MipsRegMapLo(m_Opcode.rt)); + CPU_Message(" regcache: switch hi (%s) with lo (%s) for %s",x86_Name(GetMipsRegMapHi(m_Opcode.rt)),x86_Name(GetMipsRegMapLo(m_Opcode.rt)),CRegName::GPR[m_Opcode.rt]); + x86Reg HiReg = GetMipsRegMapHi(m_Opcode.rt); + m_RegWorkingSet.SetMipsRegMapHi(m_Opcode.rt,GetMipsRegMapLo(m_Opcode.rt)); m_RegWorkingSet.SetMipsRegMapLo(m_Opcode.rt,HiReg); Map_GPR_32bit(m_Opcode.rd,TRUE,-1); } else { Map_GPR_32bit(m_Opcode.rd,TRUE,-1); - MoveX86RegToX86Reg(MipsRegMapHi(m_Opcode.rt),MipsRegMapLo(m_Opcode.rd)); + MoveX86RegToX86Reg(GetMipsRegMapHi(m_Opcode.rt),GetMipsRegMapLo(m_Opcode.rd)); } if ((BYTE)m_Opcode.sa != 0) { - ShiftRightSignImmed(MipsRegMapLo(m_Opcode.rd),(BYTE)m_Opcode.sa); + ShiftRightSignImmed(GetMipsRegMapLo(m_Opcode.rd),(BYTE)m_Opcode.sa); } } else { CRecompilerOps::UnknownOpcode(); } } else { Map_GPR_32bit(m_Opcode.rd,TRUE,-1); - MoveVariableToX86reg(&_GPR[m_Opcode.rt].UW[1],CRegName::GPR_Lo[m_Opcode.rt],MipsRegMapLo(m_Opcode.rd)); + MoveVariableToX86reg(&_GPR[m_Opcode.rt].UW[1],CRegName::GPR_Lo[m_Opcode.rt],GetMipsRegMapLo(m_Opcode.rd)); if ((BYTE)m_Opcode.sa != 0) { - ShiftRightSignImmed(MipsRegMapLo(m_Opcode.rd),(BYTE)m_Opcode.sa); + ShiftRightSignImmed(GetMipsRegMapLo(m_Opcode.rd),(BYTE)m_Opcode.sa); } } } @@ -4005,7 +4005,7 @@ void CRecompilerOps::COP0_MF(void) { AfterCallDirect(m_RegWorkingSet); } Map_GPR_32bit(m_Opcode.rt,TRUE,-1); - MoveVariableToX86reg(&_CP0[m_Opcode.rd],CRegName::Cop0[m_Opcode.rd],MipsRegMapLo(m_Opcode.rt)); + MoveVariableToX86reg(&_CP0[m_Opcode.rd],CRegName::Cop0[m_Opcode.rd],GetMipsRegMapLo(m_Opcode.rt)); } void CRecompilerOps::COP0_MT (void) { @@ -4030,7 +4030,7 @@ void CRecompilerOps::COP0_MT (void) { if (IsConst(m_Opcode.rt)) { MoveConstToVariable(cMipsRegLo(m_Opcode.rt), &_CP0[m_Opcode.rd], CRegName::Cop0[m_Opcode.rd]); } else if (IsMapped(m_Opcode.rt)) { - MoveX86regToVariable(MipsRegMapLo(m_Opcode.rt), &_CP0[m_Opcode.rd], CRegName::Cop0[m_Opcode.rd]); + MoveX86regToVariable(GetMipsRegMapLo(m_Opcode.rt), &_CP0[m_Opcode.rd], CRegName::Cop0[m_Opcode.rd]); } else { MoveX86regToVariable(Map_TempReg(x86_Any,m_Opcode.rt,FALSE), &_CP0[m_Opcode.rd], CRegName::Cop0[m_Opcode.rd]); } @@ -4050,7 +4050,7 @@ void CRecompilerOps::COP0_MT (void) { if (IsConst(m_Opcode.rt)) { MoveConstToVariable(cMipsRegLo(m_Opcode.rt), &_CP0[m_Opcode.rd], CRegName::Cop0[m_Opcode.rd]); } else if (IsMapped(m_Opcode.rt)) { - MoveX86regToVariable(MipsRegMapLo(m_Opcode.rt), &_CP0[m_Opcode.rd], CRegName::Cop0[m_Opcode.rd]); + MoveX86regToVariable(GetMipsRegMapLo(m_Opcode.rt), &_CP0[m_Opcode.rd], CRegName::Cop0[m_Opcode.rd]); } else { MoveX86regToVariable(Map_TempReg(x86_Any,m_Opcode.rt,FALSE), &_CP0[m_Opcode.rd], CRegName::Cop0[m_Opcode.rd]); } @@ -4071,7 +4071,7 @@ void CRecompilerOps::COP0_MT (void) { if (IsConst(m_Opcode.rt)) { MoveConstToVariable(cMipsRegLo(m_Opcode.rt), &_CP0[m_Opcode.rd], CRegName::Cop0[m_Opcode.rd]); } else if (IsMapped(m_Opcode.rt)) { - MoveX86regToVariable(MipsRegMapLo(m_Opcode.rt), &_CP0[m_Opcode.rd], CRegName::Cop0[m_Opcode.rd]); + MoveX86regToVariable(GetMipsRegMapLo(m_Opcode.rt), &_CP0[m_Opcode.rd], CRegName::Cop0[m_Opcode.rd]); } else { MoveX86regToVariable(Map_TempReg(x86_Any,m_Opcode.rt,FALSE), &_CP0[m_Opcode.rd], CRegName::Cop0[m_Opcode.rd]); } @@ -4087,7 +4087,7 @@ void CRecompilerOps::COP0_MT (void) { if (IsConst(m_Opcode.rt)) { MoveConstToVariable(cMipsRegLo(m_Opcode.rt), &_CP0[m_Opcode.rd], CRegName::Cop0[m_Opcode.rd]); } else if (IsMapped(m_Opcode.rt)) { - MoveX86regToVariable(MipsRegMapLo(m_Opcode.rt), &_CP0[m_Opcode.rd], CRegName::Cop0[m_Opcode.rd]); + MoveX86regToVariable(GetMipsRegMapLo(m_Opcode.rt), &_CP0[m_Opcode.rd], CRegName::Cop0[m_Opcode.rd]); } else { MoveX86regToVariable(Map_TempReg(x86_Any,m_Opcode.rt,FALSE), &_CP0[m_Opcode.rd], CRegName::Cop0[m_Opcode.rd]); } @@ -4118,7 +4118,7 @@ void CRecompilerOps::COP0_MT (void) { if (IsConst(m_Opcode.rt)) { MoveConstToVariable(cMipsRegLo(m_Opcode.rt), &_CP0[m_Opcode.rd], CRegName::Cop0[m_Opcode.rd]); } else if (IsMapped(m_Opcode.rt)) { - MoveX86regToVariable(MipsRegMapLo(m_Opcode.rt), &_CP0[m_Opcode.rd], CRegName::Cop0[m_Opcode.rd]); + MoveX86regToVariable(GetMipsRegMapLo(m_Opcode.rt), &_CP0[m_Opcode.rd], CRegName::Cop0[m_Opcode.rd]); } else { MoveX86regToVariable(Map_TempReg(x86_Any,m_Opcode.rt,FALSE), &_CP0[m_Opcode.rd], CRegName::Cop0[m_Opcode.rd]); } @@ -4247,7 +4247,7 @@ void CRecompilerOps::COP1_MF (void) { char Name[100]; sprintf(Name,"_FPR_S[%d]",m_Opcode.fs); MoveVariableToX86reg((BYTE *)&_FPR_S[m_Opcode.fs],Name,TempReg); - MoveX86PointerToX86reg(MipsRegMapLo(m_Opcode.rt),TempReg); + MoveX86PointerToX86reg(GetMipsRegMapLo(m_Opcode.rt),TempReg); } void CRecompilerOps::COP1_DMF (void) { @@ -4263,10 +4263,10 @@ void CRecompilerOps::COP1_DMF (void) { sprintf(Name,"_FPR_D[%d]",m_Opcode.fs); MoveVariableToX86reg((BYTE *)&_FPR_D[m_Opcode.fs],Name,TempReg); AddConstToX86Reg(TempReg,4); - MoveX86PointerToX86reg(MipsRegMapHi(m_Opcode.rt),TempReg); + MoveX86PointerToX86reg(GetMipsRegMapHi(m_Opcode.rt),TempReg); sprintf(Name,"_FPR_D[%d]",m_Opcode.fs); MoveVariableToX86reg((BYTE *)&_FPR_D[m_Opcode.fs],Name,TempReg); - MoveX86PointerToX86reg(MipsRegMapLo(m_Opcode.rt),TempReg); + MoveX86PointerToX86reg(GetMipsRegMapLo(m_Opcode.rt),TempReg); } void CRecompilerOps::COP1_CF(void) { @@ -4276,7 +4276,7 @@ void CRecompilerOps::COP1_CF(void) { if (m_Opcode.fs != 31 && m_Opcode.fs != 0) { UnknownOpcode(); return; } Map_GPR_32bit(m_Opcode.rt,TRUE,-1); - MoveVariableToX86reg(&_FPCR[m_Opcode.fs],CRegName::FPR_Ctrl[m_Opcode.fs],MipsRegMapLo(m_Opcode.rt)); + MoveVariableToX86reg(&_FPCR[m_Opcode.fs],CRegName::FPR_Ctrl[m_Opcode.fs],GetMipsRegMapLo(m_Opcode.rt)); } void CRecompilerOps::COP1_MT( void) { @@ -4299,7 +4299,7 @@ void CRecompilerOps::COP1_MT( void) { if (IsConst(m_Opcode.rt)) { MoveConstToX86Pointer(cMipsRegLo(m_Opcode.rt),TempReg); } else if (IsMapped(m_Opcode.rt)) { - MoveX86regToX86Pointer(MipsRegMapLo(m_Opcode.rt),TempReg); + MoveX86regToX86Pointer(GetMipsRegMapLo(m_Opcode.rt),TempReg); } else { MoveX86regToX86Pointer(Map_TempReg(x86_Any, m_Opcode.rt, FALSE),TempReg); } @@ -4326,15 +4326,15 @@ void CRecompilerOps::COP1_DMT( void) { MoveConstToX86Pointer(cMipsRegLo(m_Opcode.rt),TempReg); AddConstToX86Reg(TempReg,4); if (Is64Bit(m_Opcode.rt)) { - MoveConstToX86Pointer(MipsRegHi(m_Opcode.rt),TempReg); + MoveConstToX86Pointer(GetMipsRegHi(m_Opcode.rt),TempReg); } else { - MoveConstToX86Pointer(MipsRegLo_S(m_Opcode.rt) >> 31,TempReg); + MoveConstToX86Pointer(GetMipsRegLo_S(m_Opcode.rt) >> 31,TempReg); } } else if (IsMapped(m_Opcode.rt)) { - MoveX86regToX86Pointer(MipsRegMapLo(m_Opcode.rt),TempReg); + MoveX86regToX86Pointer(GetMipsRegMapLo(m_Opcode.rt),TempReg); AddConstToX86Reg(TempReg,4); if (Is64Bit(m_Opcode.rt)) { - MoveX86regToX86Pointer(MipsRegMapHi(m_Opcode.rt),TempReg); + MoveX86regToX86Pointer(GetMipsRegMapHi(m_Opcode.rt),TempReg); } else { MoveX86regToX86Pointer(Map_TempReg(x86_Any, m_Opcode.rt, TRUE),TempReg); } @@ -4355,7 +4355,7 @@ void CRecompilerOps::COP1_CT(void) { if (IsConst(m_Opcode.rt)) { MoveConstToVariable(cMipsRegLo(m_Opcode.rt),&_FPCR[m_Opcode.fs],CRegName::FPR_Ctrl[m_Opcode.fs]); } else if (IsMapped(m_Opcode.rt)) { - MoveX86regToVariable(MipsRegMapLo(m_Opcode.rt),&_FPCR[m_Opcode.fs],CRegName::FPR_Ctrl[m_Opcode.fs]); + MoveX86regToVariable(GetMipsRegMapLo(m_Opcode.rt),&_FPCR[m_Opcode.fs],CRegName::FPR_Ctrl[m_Opcode.fs]); } else { MoveX86regToVariable(Map_TempReg(x86_Any,m_Opcode.rt,FALSE),&_FPCR[m_Opcode.fs],CRegName::FPR_Ctrl[m_Opcode.fs]); } diff --git a/Source/Project64/N64 System/Recompiler/Recompiler Ops.h b/Source/Project64/N64 System/Recompiler/Recompiler Ops.h index 43a9312d3..5f3cc6bad 100644 --- a/Source/Project64/N64 System/Recompiler/Recompiler Ops.h +++ b/Source/Project64/N64 System/Recompiler/Recompiler Ops.h @@ -219,13 +219,12 @@ protected: static inline REG_STATE MipsRegState ( int Reg ) { return m_RegWorkingSet.MipsRegState(Reg); } static inline unsigned __int64 MipsReg ( int Reg ) { return m_RegWorkingSet.MipsReg(Reg); } static inline _int64 & MipsReg_S ( int Reg ) { return m_RegWorkingSet.MipsReg_S(Reg); } - static inline DWORD & MipsRegLo ( int Reg ) { return m_RegWorkingSet.MipsRegLo(Reg); } - static inline long & MipsRegLo_S ( int Reg ) { return m_RegWorkingSet.MipsRegLo_S(Reg); } - static inline DWORD & MipsRegHi ( int Reg ) { return m_RegWorkingSet.MipsRegHi(Reg); } - static inline long & MipsRegHi_S ( int Reg ) { return m_RegWorkingSet.MipsRegHi_S(Reg); } - static inline CX86Ops::x86Reg MipsRegMapLo ( int Reg ) { return m_RegWorkingSet.MipsRegMapLo(Reg); } - static inline CX86Ops::x86Reg MipsRegMapHi ( int Reg ) { return m_RegWorkingSet.MipsRegMapHi(Reg); } - static inline bool X86Protected ( x86Reg Reg ) { return m_RegWorkingSet.X86Protected(Reg); } + static inline DWORD GetMipsRegLo ( int Reg ) { return m_RegWorkingSet.GetMipsRegLo(Reg); } + static inline long GetMipsRegLo_S ( int Reg ) { return m_RegWorkingSet.GetMipsRegLo_S(Reg); } + static inline DWORD GetMipsRegHi ( int Reg ) { return m_RegWorkingSet.GetMipsRegHi(Reg); } + static inline long GetMipsRegHi_S ( int Reg ) { return m_RegWorkingSet.GetMipsRegHi_S(Reg); } + static inline CX86Ops::x86Reg GetMipsRegMapLo ( int Reg ) { return m_RegWorkingSet.GetMipsRegMapLo(Reg); } + static inline CX86Ops::x86Reg GetMipsRegMapHi ( int Reg ) { return m_RegWorkingSet.GetMipsRegMapHi(Reg); } static inline bool IsKnown ( int Reg ) { return m_RegWorkingSet.IsKnown(Reg); } static inline bool IsUnknown ( int Reg ) { return m_RegWorkingSet.IsUnknown(Reg); } diff --git a/Source/Project64/N64 System/Recompiler/Reg Info.cpp b/Source/Project64/N64 System/Recompiler/Reg Info.cpp index 2e5589af5..0fa207cd0 100644 --- a/Source/Project64/N64 System/Recompiler/Reg Info.cpp +++ b/Source/Project64/N64 System/Recompiler/Reg Info.cpp @@ -563,13 +563,13 @@ void CRegInfo::Map_GPR_32bit (int MipsReg, bool SignValue, int MipsRegToLoad) } else { if (Is64Bit(MipsReg)) { - CPU_Message(" regcache: unallocate %s from high 32bit of %s",x86_Name(MipsRegMapHi(MipsReg)),CRegName::GPR_Hi[MipsReg]); - SetX86MapOrder(MipsRegMapHi(MipsReg),0); - SetX86Mapped(MipsRegMapHi(MipsReg),NotMapped); - SetX86Protected(MipsRegMapHi(MipsReg),FALSE); - MipsRegHi(MipsReg) = 0; + CPU_Message(" regcache: unallocate %s from high 32bit of %s",x86_Name(GetMipsRegMapHi(MipsReg)),CRegName::GPR_Hi[MipsReg]); + SetX86MapOrder(GetMipsRegMapHi(MipsReg),0); + SetX86Mapped(GetMipsRegMapHi(MipsReg),NotMapped); + SetX86Protected(GetMipsRegMapHi(MipsReg),FALSE); + SetMipsRegHi(MipsReg,0); } - Reg = MipsRegMapLo(MipsReg); + Reg = GetMipsRegMapLo(MipsReg); } for (count = 0; count < 10; count ++) { @@ -589,10 +589,10 @@ void CRegInfo::Map_GPR_32bit (int MipsReg, bool SignValue, int MipsRegToLoad) } else if (IsMapped(MipsRegToLoad)) { if (MipsReg != MipsRegToLoad) { - MoveX86RegToX86Reg(MipsRegMapLo(MipsRegToLoad),Reg); + MoveX86RegToX86Reg(GetMipsRegMapLo(MipsRegToLoad),Reg); } } else { - MoveConstToX86reg(MipsRegLo(MipsRegToLoad),Reg); + MoveConstToX86reg(GetMipsRegLo(MipsRegToLoad),Reg); } } else if (MipsRegToLoad == 0) { XorX86RegToX86Reg(Reg,Reg); @@ -628,7 +628,7 @@ void CRegInfo::Map_GPR_64bit ( int MipsReg, int MipsRegToLoad) CPU_Message(" regcache: allocate %s to hi word of %s",x86_Name(x86Hi),CRegName::GPR[MipsReg]); CPU_Message(" regcache: allocate %s to low word of %s",x86_Name(x86lo),CRegName::GPR[MipsReg]); } else { - x86lo = MipsRegMapLo(MipsReg); + x86lo = GetMipsRegMapLo(MipsReg); if (Is32Bit(MipsReg)) { SetX86Protected(x86lo,TRUE); x86Hi = FreeX86Reg(); @@ -641,7 +641,7 @@ void CRegInfo::Map_GPR_64bit ( int MipsReg, int MipsRegToLoad) CPU_Message(" regcache: allocate %s to hi word of %s",x86_Name(x86Hi),CRegName::GPR[MipsReg]); } else { - x86Hi = MipsRegMapHi(MipsReg); + x86Hi = GetMipsRegMapHi(MipsReg); } } @@ -663,32 +663,32 @@ void CRegInfo::Map_GPR_64bit ( int MipsReg, int MipsRegToLoad) } else if (IsMapped(MipsRegToLoad)) { if (Is32Bit(MipsRegToLoad)) { if (IsSigned(MipsRegToLoad)) { - MoveX86RegToX86Reg(MipsRegMapLo(MipsRegToLoad),x86Hi); + MoveX86RegToX86Reg(GetMipsRegMapLo(MipsRegToLoad),x86Hi); ShiftRightSignImmed(x86Hi,31); } else { XorX86RegToX86Reg(x86Hi,x86Hi); } if (MipsReg != MipsRegToLoad) { - MoveX86RegToX86Reg(MipsRegMapLo(MipsRegToLoad),x86lo); + MoveX86RegToX86Reg(GetMipsRegMapLo(MipsRegToLoad),x86lo); } } else { if (MipsReg != MipsRegToLoad) { - MoveX86RegToX86Reg(MipsRegMapHi(MipsRegToLoad),x86Hi); - MoveX86RegToX86Reg(MipsRegMapLo(MipsRegToLoad),x86lo); + MoveX86RegToX86Reg(GetMipsRegMapHi(MipsRegToLoad),x86Hi); + MoveX86RegToX86Reg(GetMipsRegMapLo(MipsRegToLoad),x86lo); } } } else { CPU_Message("Map_GPR_64bit 11"); if (Is32Bit(MipsRegToLoad)) { if (IsSigned(MipsRegToLoad)) { - MoveConstToX86reg(MipsRegLo_S(MipsRegToLoad) >> 31,x86Hi); + MoveConstToX86reg(GetMipsRegLo_S(MipsRegToLoad) >> 31,x86Hi); } else { MoveConstToX86reg(0,x86Hi); } } else { - MoveConstToX86reg(MipsRegHi(MipsRegToLoad),x86Hi); + MoveConstToX86reg(GetMipsRegHi(MipsRegToLoad),x86Hi); } - MoveConstToX86reg(MipsRegLo(MipsRegToLoad),x86lo); + MoveConstToX86reg(GetMipsRegLo(MipsRegToLoad),x86lo); } } else if (MipsRegToLoad == 0) { XorX86RegToX86Reg(x86Hi,x86Hi); @@ -758,7 +758,7 @@ CX86Ops::x86Reg CRegInfo::Map_TempReg (CX86Ops::x86Reg Reg, int MipsReg, BOOL Lo { continue; } - if (MipsRegMapLo(count) == Reg) + if (GetMipsRegMapLo(count) == Reg) { if (NewReg == x86_Unknown) { @@ -773,7 +773,7 @@ CX86Ops::x86Reg CRegInfo::Map_TempReg (CX86Ops::x86Reg Reg, int MipsReg, BOOL Lo if (MipsReg == count && LoadHiWord == FALSE) { MipsReg = -1; } break; } - if (Is64Bit(count) && MipsRegMapHi(count) == Reg) + if (Is64Bit(count) && GetMipsRegMapHi(count) == Reg) { if (NewReg == x86_Unknown) { @@ -805,9 +805,9 @@ CX86Ops::x86Reg CRegInfo::Map_TempReg (CX86Ops::x86Reg Reg, int MipsReg, BOOL Lo else if (IsMapped(MipsReg)) { if (Is64Bit(MipsReg)) { - MoveX86RegToX86Reg(MipsRegMapHi(MipsReg),Reg); + MoveX86RegToX86Reg(GetMipsRegMapHi(MipsReg),Reg); } else if (IsSigned(MipsReg)){ - MoveX86RegToX86Reg(MipsRegMapLo(MipsReg),Reg); + MoveX86RegToX86Reg(GetMipsRegMapLo(MipsReg),Reg); ShiftRightSignImmed(Reg,31); } else { MoveConstToX86reg(0,Reg); @@ -815,18 +815,18 @@ CX86Ops::x86Reg CRegInfo::Map_TempReg (CX86Ops::x86Reg Reg, int MipsReg, BOOL Lo } else { if (Is64Bit(MipsReg)) { - MoveConstToX86reg(MipsRegHi(MipsReg),Reg); + MoveConstToX86reg(GetMipsRegHi(MipsReg),Reg); } else { - MoveConstToX86reg(MipsRegLo_S(MipsReg) >> 31,Reg); + MoveConstToX86reg(GetMipsRegLo_S(MipsReg) >> 31,Reg); } } } else { if (IsUnknown(MipsReg)) { MoveVariableToX86reg(&_GPR[MipsReg].UW[0],CRegName::GPR_Lo[MipsReg],Reg); } else if (IsMapped(MipsReg)) { - MoveX86RegToX86Reg(MipsRegMapLo(MipsReg),Reg); + MoveX86RegToX86Reg(GetMipsRegMapLo(MipsReg),Reg); } else { - MoveConstToX86reg(MipsRegLo(MipsReg),Reg); + MoveConstToX86reg(GetMipsRegLo(MipsReg),Reg); } } } @@ -846,17 +846,17 @@ CX86Ops::x86Reg CRegInfo::Map_TempReg (CX86Ops::x86Reg Reg, int MipsReg, BOOL Lo void CRegInfo::ProtectGPR(DWORD Reg) { if (IsUnknown(Reg) || IsConst(Reg)) { return; } if (Is64Bit(Reg)) { - SetX86Protected(MipsRegMapHi(Reg),TRUE); + SetX86Protected(GetMipsRegMapHi(Reg),TRUE); } - SetX86Protected(MipsRegMapLo(Reg),TRUE); + SetX86Protected(GetMipsRegMapLo(Reg),TRUE); } void CRegInfo::UnProtectGPR(DWORD Reg) { if (IsUnknown(Reg) || IsConst(Reg)) { return; } if (Is64Bit(Reg)) { - SetX86Protected(MipsRegMapHi(Reg),false); + SetX86Protected(GetMipsRegMapHi(Reg),false); } - SetX86Protected(MipsRegMapLo(Reg),false); + SetX86Protected(GetMipsRegMapLo(Reg),false); } void CRegInfo::ResetX86Protection (void) @@ -999,43 +999,43 @@ void CRegInfo::UnMap_GPR (DWORD Reg, bool WriteBackValue) return; } if (Is64Bit(Reg)) { - MoveConstToVariable(MipsRegHi(Reg),&_GPR[Reg].UW[1],CRegName::GPR_Hi[Reg]); - MoveConstToVariable(MipsRegLo(Reg),&_GPR[Reg].UW[0],CRegName::GPR_Lo[Reg]); + MoveConstToVariable(GetMipsRegHi(Reg),&_GPR[Reg].UW[1],CRegName::GPR_Hi[Reg]); + MoveConstToVariable(GetMipsRegLo(Reg),&_GPR[Reg].UW[0],CRegName::GPR_Lo[Reg]); SetMipsRegState(Reg,STATE_UNKNOWN); return; } - if ((MipsRegLo(Reg) & 0x80000000) != 0) { + if ((GetMipsRegLo(Reg) & 0x80000000) != 0) { MoveConstToVariable(0xFFFFFFFF,&_GPR[Reg].UW[1],CRegName::GPR_Hi[Reg]); } else { MoveConstToVariable(0,&_GPR[Reg].UW[1],CRegName::GPR_Hi[Reg]); } - MoveConstToVariable(MipsRegLo(Reg),&_GPR[Reg].UW[0],CRegName::GPR_Lo[Reg]); + MoveConstToVariable(GetMipsRegLo(Reg),&_GPR[Reg].UW[0],CRegName::GPR_Lo[Reg]); SetMipsRegState(Reg,STATE_UNKNOWN); return; } if (Is64Bit(Reg)) { - CPU_Message(" regcache: unallocate %s from %s",x86_Name(MipsRegMapHi(Reg)),CRegName::GPR_Hi[Reg]); - SetX86Mapped(MipsRegMapHi(Reg),NotMapped); - SetX86Protected(MipsRegMapHi(Reg),FALSE); + CPU_Message(" regcache: unallocate %s from %s",x86_Name(GetMipsRegMapHi(Reg)),CRegName::GPR_Hi[Reg]); + SetX86Mapped(GetMipsRegMapHi(Reg),NotMapped); + SetX86Protected(GetMipsRegMapHi(Reg),FALSE); } - CPU_Message(" regcache: unallocate %s from %s",x86_Name(MipsRegMapLo(Reg)),CRegName::GPR_Lo[Reg]); - SetX86Mapped(MipsRegMapLo(Reg),NotMapped); - SetX86Protected(MipsRegMapLo(Reg),FALSE); + CPU_Message(" regcache: unallocate %s from %s",x86_Name(GetMipsRegMapLo(Reg)),CRegName::GPR_Lo[Reg]); + SetX86Mapped(GetMipsRegMapLo(Reg),NotMapped); + SetX86Protected(GetMipsRegMapLo(Reg),FALSE); if (!WriteBackValue) { SetMipsRegState(Reg,STATE_UNKNOWN); return; } - MoveX86regToVariable(MipsRegMapLo(Reg),&_GPR[Reg].UW[0],CRegName::GPR_Lo[Reg]); + MoveX86regToVariable(GetMipsRegMapLo(Reg),&_GPR[Reg].UW[0],CRegName::GPR_Lo[Reg]); if (Is64Bit(Reg)) { SetMipsRegMapLo(Reg, x86_Unknown); - MoveX86regToVariable(MipsRegMapHi(Reg),&_GPR[Reg].UW[1],CRegName::GPR_Hi[Reg]); + MoveX86regToVariable(GetMipsRegMapHi(Reg),&_GPR[Reg].UW[1],CRegName::GPR_Hi[Reg]); SetMipsRegMapHi(Reg,x86_Unknown); } else { if (!b32BitCore()) { if (IsSigned(Reg)) { - ShiftRightSignImmed(MipsRegMapLo(Reg),31); - MoveX86regToVariable(MipsRegMapLo(Reg),&_GPR[Reg].UW[1],CRegName::GPR_Hi[Reg]); + ShiftRightSignImmed(GetMipsRegMapLo(Reg),31); + MoveX86regToVariable(GetMipsRegMapLo(Reg),&_GPR[Reg].UW[1],CRegName::GPR_Hi[Reg]); } else { MoveConstToVariable(0,&_GPR[Reg].UW[1],CRegName::GPR_Hi[Reg]); } @@ -1086,7 +1086,7 @@ bool CRegInfo::UnMap_X86reg ( CX86Ops::x86Reg Reg ) { continue; } - if (Is64Bit(count) && MipsRegMapHi(count) == Reg) + if (Is64Bit(count) && GetMipsRegMapHi(count) == Reg) { if (GetX86Protected(Reg) == FALSE) { @@ -1095,7 +1095,7 @@ bool CRegInfo::UnMap_X86reg ( CX86Ops::x86Reg Reg ) } break; } - if (MipsRegMapLo(count) == Reg) + if (GetMipsRegMapLo(count) == Reg) { if (GetX86Protected(Reg) == FALSE) { @@ -1140,22 +1140,22 @@ void CRegInfo::WriteBackRegisters () case CRegInfo::STATE_CONST_32: if (!b32BitCore()) { - if (!bEdiZero && (!MipsRegLo(count) || !(MipsRegLo(count) & 0x80000000))) { + if (!bEdiZero && (!GetMipsRegLo(count) || !(GetMipsRegLo(count) & 0x80000000))) { XorX86RegToX86Reg(x86_EDI, x86_EDI); bEdiZero = TRUE; } - if (!bEsiSign && (MipsRegLo(count) & 0x80000000)) { + if (!bEsiSign && (GetMipsRegLo(count) & 0x80000000)) { MoveConstToX86reg(0xFFFFFFFF, x86_ESI); bEsiSign = TRUE; } - if ((MipsRegLo(count) & 0x80000000) != 0) { + if ((GetMipsRegLo(count) & 0x80000000) != 0) { MoveX86regToVariable(x86_ESI,&_GPR[count].UW[1],CRegName::GPR_Hi[count]); } else { MoveX86regToVariable(x86_EDI,&_GPR[count].UW[1],CRegName::GPR_Hi[count]); } } - if (MipsRegLo(count) == 0) { + if (GetMipsRegLo(count) == 0) { if (b32BitCore()) { if (!bEdiZero) @@ -1165,7 +1165,7 @@ void CRegInfo::WriteBackRegisters () } } MoveX86regToVariable(x86_EDI,&_GPR[count].UW[0],CRegName::GPR_Lo[count]); - } else if (MipsRegLo(count) == 0xFFFFFFFF) { + } else if (GetMipsRegLo(count) == 0xFFFFFFFF) { if (b32BitCore()) { if (!bEsiSign) @@ -1176,34 +1176,34 @@ void CRegInfo::WriteBackRegisters () } MoveX86regToVariable(x86_ESI,&_GPR[count].UW[0],CRegName::GPR_Lo[count]); } else - MoveConstToVariable(MipsRegLo(count),&_GPR[count].UW[0],CRegName::GPR_Lo[count]); + MoveConstToVariable(GetMipsRegLo(count),&_GPR[count].UW[0],CRegName::GPR_Lo[count]); SetMipsRegState(count, CRegInfo::STATE_UNKNOWN); break; case CRegInfo::STATE_CONST_64: - if (MipsRegLo(count) == 0 || MipsRegHi(count) == 0) { + if (GetMipsRegLo(count) == 0 || GetMipsRegHi(count) == 0) { XorX86RegToX86Reg(x86_EDI, x86_EDI); bEdiZero = TRUE; } - if (MipsRegLo(count) == 0xFFFFFFFF || MipsRegHi(count) == 0xFFFFFFFF) { + if (GetMipsRegLo(count) == 0xFFFFFFFF || GetMipsRegHi(count) == 0xFFFFFFFF) { MoveConstToX86reg(0xFFFFFFFF, x86_ESI); bEsiSign = TRUE; } - if (MipsRegHi(count) == 0) { + if (GetMipsRegHi(count) == 0) { MoveX86regToVariable(x86_EDI,&_GPR[count].UW[1],CRegName::GPR_Hi[count]); - } else if (MipsRegLo(count) == 0xFFFFFFFF) { + } else if (GetMipsRegLo(count) == 0xFFFFFFFF) { MoveX86regToVariable(x86_ESI,&_GPR[count].UW[1],CRegName::GPR_Hi[count]); } else { - MoveConstToVariable(MipsRegHi(count),&_GPR[count].UW[1],CRegName::GPR_Hi[count]); + MoveConstToVariable(GetMipsRegHi(count),&_GPR[count].UW[1],CRegName::GPR_Hi[count]); } - if (MipsRegLo(count) == 0) { + if (GetMipsRegLo(count) == 0) { MoveX86regToVariable(x86_EDI,&_GPR[count].UW[0],CRegName::GPR_Lo[count]); - } else if (MipsRegLo(count) == 0xFFFFFFFF) { + } else if (GetMipsRegLo(count) == 0xFFFFFFFF) { MoveX86regToVariable(x86_ESI,&_GPR[count].UW[0],CRegName::GPR_Lo[count]); } else { - MoveConstToVariable(MipsRegLo(count),&_GPR[count].UW[0],CRegName::GPR_Lo[count]); + MoveConstToVariable(GetMipsRegLo(count),&_GPR[count].UW[0],CRegName::GPR_Lo[count]); } SetMipsRegState(count, CRegInfo::STATE_UNKNOWN); break; diff --git a/Source/Project64/N64 System/Recompiler/Reg Info.h b/Source/Project64/N64 System/Recompiler/Reg Info.h index 98714f5ec..845198763 100644 --- a/Source/Project64/N64 System/Recompiler/Reg Info.h +++ b/Source/Project64/N64 System/Recompiler/Reg Info.h @@ -105,13 +105,12 @@ public: inline REG_STATE MipsRegState ( int Reg ) const { return m_MIPS_RegState[Reg]; } inline unsigned _int64 MipsReg ( int Reg ) const { return m_MIPS_RegVal[Reg].UDW; } inline _int64 & MipsReg_S ( int Reg ) { return m_MIPS_RegVal[Reg].DW; } - inline DWORD & MipsRegLo ( int Reg ) { return m_MIPS_RegVal[Reg].UW[0]; } - inline long & MipsRegLo_S ( int Reg ) { return m_MIPS_RegVal[Reg].W[0]; } - inline DWORD & MipsRegHi ( int Reg ) { return m_MIPS_RegVal[Reg].UW[1]; } - inline long & MipsRegHi_S ( int Reg ) { return m_MIPS_RegVal[Reg].W[1]; } - inline CX86Ops::x86Reg MipsRegMapLo ( int Reg ) const { return m_RegMapLo[Reg]; } - inline CX86Ops::x86Reg MipsRegMapHi ( int Reg ) const { return m_RegMapHi[Reg]; } - inline bool X86Protected ( x86Reg Reg ) const { return m_x86reg_Protected[Reg]; } + inline DWORD GetMipsRegLo ( int Reg ) const { return m_MIPS_RegVal[Reg].UW[0]; } + inline long GetMipsRegLo_S ( int Reg ) const { return m_MIPS_RegVal[Reg].W[0]; } + inline DWORD GetMipsRegHi ( int Reg ) const { return m_MIPS_RegVal[Reg].UW[1]; } + inline long GetMipsRegHi_S ( int Reg ) const { return m_MIPS_RegVal[Reg].W[1]; } + inline CX86Ops::x86Reg GetMipsRegMapLo ( int Reg ) const { return m_RegMapLo[Reg]; } + inline CX86Ops::x86Reg GetMipsRegMapHi ( int Reg ) const { return m_RegMapHi[Reg]; } inline DWORD GetX86MapOrder ( x86Reg Reg ) const { return m_x86reg_MapOrder[Reg]; } inline bool GetX86Protected ( x86Reg Reg ) const { return m_x86reg_Protected[Reg]; } @@ -119,20 +118,16 @@ public: inline DWORD GetBlockCycleCount ( void ) const { return m_CycleCount; } - inline void SetMipsReg ( int Reg, unsigned __int64 value ) { m_MIPS_RegVal[Reg].UDW = value; } - inline void SetMipsRegMapLo ( int MipsReg, x86Reg Reg ) - { - m_RegMapLo[MipsReg] = Reg; - } - inline void SetMipsRegMapHi ( int MipsReg, x86Reg Reg ) - { - m_RegMapHi[MipsReg] = Reg; - } - inline void SetMipsRegState ( int MipsReg, REG_STATE State ) { m_MIPS_RegState[MipsReg] = State; } + inline void SetMipsReg ( int Reg, unsigned __int64 Value ) { m_MIPS_RegVal[Reg].UDW = Value; } + inline void SetMipsRegLo ( int Reg, DWORD Value ) { m_MIPS_RegVal[Reg].UW[0] = Value; } + inline void SetMipsRegHi ( int Reg, DWORD Value ) { m_MIPS_RegVal[Reg].UW[1] = Value; } + inline void SetMipsRegMapLo ( int MipsReg, x86Reg Reg ) { m_RegMapLo[MipsReg] = Reg; } + inline void SetMipsRegMapHi ( int MipsReg, x86Reg Reg ) { m_RegMapHi[MipsReg] = Reg; } + inline void SetMipsRegState ( int MipsReg, REG_STATE State ) { m_MIPS_RegState[MipsReg] = State; } - inline void SetX86MapOrder ( x86Reg Reg, DWORD Order ) { m_x86reg_MapOrder[Reg] = Order; } - inline void SetX86Protected ( x86Reg Reg, bool Protected ) { m_x86reg_Protected[Reg] = Protected; } - inline void SetX86Mapped ( x86Reg Reg, REG_MAPPED Mapping ) { m_x86reg_MappedTo[Reg] = Mapping; } + inline void SetX86MapOrder ( x86Reg Reg, DWORD Order ) { m_x86reg_MapOrder[Reg] = Order; } + inline void SetX86Protected ( x86Reg Reg, bool Protected ) { m_x86reg_Protected[Reg] = Protected; } + inline void SetX86Mapped ( x86Reg Reg, REG_MAPPED Mapping ) { m_x86reg_MappedTo[Reg] = Mapping; } inline void SetBlockCycleCount ( DWORD CyleCount ) { m_CycleCount = CyleCount; }