Fix bug in TLB writes
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e848cbcded
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42dbc691bd
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@ -335,6 +335,11 @@ void CMipsMemoryVM::Compile_LB ( x86Reg Reg, DWORD VAddr, BOOL SignExtend) {
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DWORD PAddr;
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char VarName[100];
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if (VAddr < 0x80000000 || VAddr >= 0xC0000000)
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{
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g_Notify->BreakPoint(__FILE__,__LINE__);
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}
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if (!TranslateVaddr(VAddr,PAddr)) {
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MoveConstToX86reg(0,Reg);
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CPU_Message("Compile_LB\nFailed to translate address %X",VAddr);
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@ -369,6 +374,11 @@ void CMipsMemoryVM::Compile_LH ( x86Reg Reg, DWORD VAddr, BOOL SignExtend) {
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char VarName[100];
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DWORD PAddr;
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if (VAddr < 0x80000000 || VAddr >= 0xC0000000)
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{
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g_Notify->BreakPoint(__FILE__,__LINE__);
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}
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if (!TranslateVaddr(VAddr, PAddr)) {
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MoveConstToX86reg(0,Reg);
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CPU_Message("Compile_LH\nFailed to translate address %X",VAddr);
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@ -588,6 +598,11 @@ void CMipsMemoryVM::Compile_SB_Const ( BYTE Value, DWORD VAddr ) {
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char VarName[100];
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DWORD PAddr;
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if (VAddr < 0x80000000 || VAddr >= 0xC0000000)
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{
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g_Notify->BreakPoint(__FILE__,__LINE__);
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}
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if (!TranslateVaddr(VAddr, PAddr)) {
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CPU_Message("Compile_SB\nFailed to translate address %X",VAddr);
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if (g_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { g_Notify->DisplayError("Compile_SB\nFailed to translate address %X",VAddr); }
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@ -615,6 +630,11 @@ void CMipsMemoryVM::Compile_SB_Register ( x86Reg Reg, DWORD VAddr ) {
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char VarName[100];
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DWORD PAddr;
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if (VAddr < 0x80000000 || VAddr >= 0xC0000000)
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{
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g_Notify->BreakPoint(__FILE__,__LINE__);
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}
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if (!TranslateVaddr(VAddr, PAddr)) {
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CPU_Message("Compile_SB\nFailed to translate address %X",VAddr);
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if (g_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { g_Notify->DisplayError("Compile_SB\nFailed to translate address %X",VAddr); }
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@ -642,6 +662,11 @@ void CMipsMemoryVM::Compile_SH_Const ( WORD Value, DWORD VAddr ) {
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char VarName[100];
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DWORD PAddr;
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if (VAddr < 0x80000000 || VAddr >= 0xC0000000)
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{
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g_Notify->BreakPoint(__FILE__,__LINE__);
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}
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if (!TranslateVaddr(VAddr, PAddr)) {
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CPU_Message("Compile_SH\nFailed to translate address %X",VAddr);
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if (g_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { g_Notify->DisplayError("Compile_SH\nFailed to translate address %X",VAddr); }
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@ -669,6 +694,11 @@ void CMipsMemoryVM::Compile_SH_Register ( x86Reg Reg, DWORD VAddr ) {
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char VarName[100];
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DWORD PAddr;
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if (VAddr < 0x80000000 || VAddr >= 0xC0000000)
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{
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g_Notify->BreakPoint(__FILE__,__LINE__);
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}
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if (!TranslateVaddr(VAddr, PAddr)) {
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CPU_Message("Compile_SH\nFailed to translate address %X",VAddr);
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if (g_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { g_Notify->DisplayError("Compile_SH\nFailed to translate address %X",VAddr); }
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@ -697,6 +727,19 @@ void CMipsMemoryVM::Compile_SW_Const ( DWORD Value, DWORD VAddr ) {
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BYTE * Jump;
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DWORD PAddr;
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if (VAddr < 0x80000000 || VAddr >= 0xC0000000)
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{
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x86Reg TempReg1 = Map_TempReg(x86_Any,-1,FALSE);
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x86Reg TempReg2 = Map_TempReg(x86_Any,-1,FALSE);
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MoveConstToX86reg(VAddr, TempReg1);
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MoveX86RegToX86Reg(TempReg1, TempReg2);
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ShiftRightUnsignImmed(TempReg2,12);
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MoveVariableDispToX86Reg(m_TLB_WriteMap,"m_TLB_WriteMap",TempReg2,TempReg2,4);
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CompileWriteTLBMiss(TempReg1,TempReg2);
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MoveConstToX86regPointer(Value,TempReg1, TempReg2);
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return;
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}
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if (!TranslateVaddr(VAddr, PAddr)) {
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CPU_Message("Compile_SW\nFailed to translate address %X",VAddr);
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if (g_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { g_Notify->DisplayError("Compile_SW\nFailed to translate address %X",VAddr); }
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@ -947,10 +990,7 @@ void CMipsMemoryVM::Compile_SW_Const ( DWORD Value, DWORD VAddr ) {
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case 0x0450000C:
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/* Clear Interrupt */;
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AndConstToVariable((DWORD)~MI_INTR_AI,&g_Reg->MI_INTR_REG,"MI_INTR_REG");
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if (!g_System->bFixedAudio())
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{
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AndConstToVariable((DWORD)~MI_INTR_AI,&g_Reg->m_AudioIntrReg,"m_AudioIntrReg");
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}
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BeforeCallDirect(m_RegWorkingSet);
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MoveConstToX86reg((DWORD)g_Reg,x86_ECX);
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Call_Direct(AddressOf(&CRegisters::CheckInterrupts),"CRegisters::CheckInterrupts");
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@ -1054,6 +1094,19 @@ void CMipsMemoryVM::Compile_SW_Const ( DWORD Value, DWORD VAddr ) {
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void CMipsMemoryVM::Compile_SW_Register (x86Reg Reg, DWORD VAddr )
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{
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if (VAddr < 0x80000000 || VAddr >= 0xC0000000)
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{
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x86Reg TempReg1 = Map_TempReg(x86_Any,-1,FALSE);
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x86Reg TempReg2 = Map_TempReg(x86_Any,-1,FALSE);
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MoveConstToX86reg(VAddr, TempReg1);
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MoveX86RegToX86Reg(TempReg1, TempReg2);
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ShiftRightUnsignImmed(TempReg2,12);
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MoveVariableDispToX86Reg(m_TLB_WriteMap,"m_TLB_WriteMap",TempReg2,TempReg2,4);
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CompileWriteTLBMiss(TempReg1,TempReg2);
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MoveX86regToX86regPointer(Reg,TempReg1, TempReg2);
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return;
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}
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char VarName[100];
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BYTE * Jump;
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DWORD PAddr;
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@ -1231,10 +1284,7 @@ void CMipsMemoryVM::Compile_SW_Register (x86Reg Reg, DWORD VAddr )
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case 0x0450000C:
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/* Clear Interrupt */;
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AndConstToVariable((DWORD)~MI_INTR_AI,&g_Reg->MI_INTR_REG,"MI_INTR_REG");
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if (!g_System->bFixedAudio())
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{
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AndConstToVariable((DWORD)~MI_INTR_AI,&g_Reg->m_AudioIntrReg,"m_AudioIntrReg");
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}
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BeforeCallDirect(m_RegWorkingSet);
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MoveConstToX86reg((DWORD)g_Reg,x86_ECX);
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Call_Direct(AddressOf(&CRegisters::CheckInterrupts),"CRegisters::CheckInterrupts");
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@ -3029,9 +3079,7 @@ void CMipsMemoryVM::Compile_LD (void)
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MoveX86RegToX86Reg(TempReg1, TempReg2);
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ShiftRightUnsignImmed(TempReg2,12);
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MoveVariableDispToX86Reg(m_TLB_ReadMap,"m_TLB_ReadMap",TempReg2,TempReg2,4);
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//For tlb miss
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//0041C522 85 C0 test eax,eax
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//0041C524 75 01 jne 0041C527
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CompileReadTLBMiss(TempReg1,TempReg2);
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Map_GPR_64bit(Opcode.rt,-1);
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MoveX86regPointerToX86reg(TempReg1, TempReg2,GetMipsRegMapHi(Opcode.rt));
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MoveX86regPointerToX86regDisp8(TempReg1, TempReg2,GetMipsRegMapLo(Opcode.rt),4);
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@ -3205,10 +3253,7 @@ void CMipsMemoryVM::Compile_SB (void)
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MoveX86RegToX86Reg(TempReg1, TempReg2);
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ShiftRightUnsignImmed(TempReg2,12);
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MoveVariableDispToX86Reg(m_TLB_WriteMap,"m_TLB_WriteMap",TempReg2,TempReg2,4);
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//For tlb miss
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//0041C522 85 C0 test eax,eax
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//0041C524 75 01 jne 0041C527
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CompileWriteTLBMiss(TempReg1,TempReg2);
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XorConstToX86Reg(TempReg1,3);
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if (IsConst(Opcode.rt)) {
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MoveConstByteToX86regPointer((BYTE)(GetMipsRegLo(Opcode.rt) & 0xFF),TempReg1, TempReg2);
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@ -3270,10 +3315,7 @@ void CMipsMemoryVM::Compile_SH (void)
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MoveX86RegToX86Reg(TempReg1, TempReg2);
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ShiftRightUnsignImmed(TempReg2,12);
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MoveVariableDispToX86Reg(m_TLB_WriteMap,"m_TLB_WriteMap",TempReg2,TempReg2,4);
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//For tlb miss
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//0041C522 85 C0 test eax,eax
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//0041C524 75 01 jne 0041C527
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CompileWriteTLBMiss(TempReg1,TempReg2);
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XorConstToX86Reg(TempReg1,2);
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if (IsConst(Opcode.rt)) {
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MoveConstHalfToX86regPointer((WORD)(GetMipsRegLo(Opcode.rt) & 0xFFFF),TempReg1, TempReg2);
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@ -3352,10 +3394,7 @@ void CMipsMemoryVM::Compile_SW (void)
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MoveX86RegToX86Reg(TempReg1, TempReg2);
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ShiftRightUnsignImmed(TempReg2,12);
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MoveVariableDispToX86Reg(m_TLB_WriteMap,"m_TLB_WriteMap",TempReg2,TempReg2,4);
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//For tlb miss
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//0041C522 85 C0 test eax,eax
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//0041C524 75 01 jne 0041C527
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CompileWriteTLBMiss(TempReg1,TempReg2);
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if (IsConst(Opcode.rt)) {
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MoveConstToX86regPointer(GetMipsRegLo(Opcode.rt),TempReg1, TempReg2);
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} else if (IsMapped(Opcode.rt)) {
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@ -3422,9 +3461,7 @@ void CMipsMemoryVM::Compile_SWC1 (void)
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MoveX86RegToX86Reg(TempReg1, TempReg2);
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ShiftRightUnsignImmed(TempReg2,12);
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MoveVariableDispToX86Reg(m_TLB_WriteMap,"m_TLB_WriteMap",TempReg2,TempReg2,4);
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//For tlb miss
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//0041C522 85 C0 test eax,eax
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//0041C524 75 01 jne 0041C527
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CompileWriteTLBMiss(TempReg1,TempReg2);
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UnMap_FPR(Opcode.ft,TRUE);
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TempReg3 = Map_TempReg(x86_Any,-1,FALSE);
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@ -3485,10 +3522,7 @@ void CMipsMemoryVM::Compile_SWL (void)
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MoveX86RegToX86Reg(TempReg1, TempReg2);
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ShiftRightUnsignImmed(TempReg2,12);
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MoveVariableDispToX86Reg(m_TLB_ReadMap,"m_TLB_ReadMap",TempReg2,TempReg2,4);
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//For tlb miss
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//0041C522 85 C0 test eax,eax
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//0041C524 75 01 jne 0041C527
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CompileReadTLBMiss(TempReg1,TempReg2);
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}
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OffsetReg = Map_TempReg(x86_Any,-1,FALSE);
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@ -3569,10 +3603,7 @@ void CMipsMemoryVM::Compile_SWR (void)
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MoveX86RegToX86Reg(TempReg1, TempReg2);
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ShiftRightUnsignImmed(TempReg2,12);
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MoveVariableDispToX86Reg(m_TLB_ReadMap,"m_TLB_ReadMap",TempReg2,TempReg2,4);
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//For tlb miss
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//0041C522 85 C0 test eax,eax
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//0041C524 75 01 jne 0041C527
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CompileReadTLBMiss(TempReg1,TempReg2);
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}
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OffsetReg = Map_TempReg(x86_Any,-1,FALSE);
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@ -3709,9 +3740,7 @@ void CMipsMemoryVM::Compile_SD (void)
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MoveX86RegToX86Reg(TempReg1, TempReg2);
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ShiftRightUnsignImmed(TempReg2,12);
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MoveVariableDispToX86Reg(m_TLB_WriteMap,"m_TLB_WriteMap",TempReg2,TempReg2,4);
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//For tlb miss
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//0041C522 85 C0 test eax,eax
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//0041C524 75 01 jne 0041C527
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CompileWriteTLBMiss(TempReg1,TempReg2);
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if (IsConst(Opcode.rt)) {
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if (Is64Bit(Opcode.rt)) {
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@ -3814,9 +3843,7 @@ void CMipsMemoryVM::Compile_SDC1 (void)
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MoveX86RegToX86Reg(TempReg1, TempReg2);
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ShiftRightUnsignImmed(TempReg2,12);
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MoveVariableDispToX86Reg(m_TLB_WriteMap,"m_TLB_WriteMap",TempReg2,TempReg2,4);
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//For tlb miss
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//0041C522 85 C0 test eax,eax
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//0041C524 75 01 jne 0041C527
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CompileWriteTLBMiss(TempReg1,TempReg2);
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TempReg3 = Map_TempReg(x86_Any,-1,FALSE);
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sprintf(Name,"_FPR_D[%d]",Opcode.ft);
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@ -316,6 +316,10 @@ void CCodeSection::CompileExit ( DWORD JumpPC, DWORD TargetPC, CRegInfo &ExitReg
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}
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ExitCodeBlock();
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break;
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case CExitInfo::TLBWriteMiss:
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X86BreakPoint(__FILE__,__LINE__);
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ExitCodeBlock();
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break;
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case CExitInfo::DivByZero:
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AddConstToVariable(4,_PROGRAM_COUNTER,"PROGRAM_COUNTER");
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if (!g_System->b32BitCore())
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@ -332,7 +336,8 @@ void CCodeSection::CompileExit ( DWORD JumpPC, DWORD TargetPC, CRegInfo &ExitReg
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ExitCodeBlock();
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break;
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default:
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g_Notify->DisplayError("how did you want to exit on reason (%d) ???",reason);
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WriteTraceF(TraceError,__FUNCTION__ ": how did you want to exit on reason (%d) ???",reason);
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g_Notify->BreakPoint(__FILE__,__LINE__);
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}
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}
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@ -202,6 +202,7 @@ protected:
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static void ExitCodeBlock ( void );
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static void CompileReadTLBMiss (DWORD VirtualAddress, x86Reg LookUpReg );
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static void CompileReadTLBMiss (x86Reg AddressReg, x86Reg LookUpReg );
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static void CompileWriteTLBMiss (DWORD VirtualAddress, x86Reg LookUpReg );
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static void CompileWriteTLBMiss (x86Reg AddressReg, x86Reg LookUpReg );
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static void UpdateSyncCPU (CRegInfo & RegSet, DWORD Cycles);
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static void UpdateCounters (CRegInfo & RegSet, bool CheckTimer, bool ClearValues = false );
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