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Core: Sign extend cop0

This commit is contained in:
zilmar 2022-10-03 09:34:13 +10:30
parent 0c078049c0
commit 42cc34964b
2 changed files with 20 additions and 20 deletions
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36
Source/Project64-core/N64System/Mips/Register.cpp
View File

@ -556,11 +556,11 @@ void CRegisters::DoBreakException(bool DelaySlot)
if (DelaySlot)
{
CAUSE_REGISTER |= CAUSE_BD;
EPC_REGISTER = m_PROGRAM_COUNTER - 4;
EPC_REGISTER = (int64_t)((int32_t)m_PROGRAM_COUNTER - 4);
}
else
{
EPC_REGISTER = m_PROGRAM_COUNTER;
EPC_REGISTER = (int64_t)((int32_t)m_PROGRAM_COUNTER);
}
STATUS_REGISTER |= STATUS_EXL;
m_PROGRAM_COUNTER = 0x80000180;
@ -571,12 +571,12 @@ void CRegisters::DoTrapException(bool DelaySlot)
CAUSE_REGISTER = EXC_TRAP;
if (DelaySlot)
{
EPC_REGISTER = m_PROGRAM_COUNTER - 4;
EPC_REGISTER = (int64_t)((int32_t)m_PROGRAM_COUNTER - 4);
CAUSE_REGISTER |= CAUSE_BD;
}
else
{
EPC_REGISTER = m_PROGRAM_COUNTER;
EPC_REGISTER = (int64_t)((int32_t)m_PROGRAM_COUNTER);
}
m_PROGRAM_COUNTER = 0x80000180;
@ -604,11 +604,11 @@ void CRegisters::DoCopUnusableException(bool DelaySlot, int32_t Coprocessor)
if (DelaySlot)
{
CAUSE_REGISTER |= CAUSE_BD;
EPC_REGISTER = m_PROGRAM_COUNTER - 4;
EPC_REGISTER = (int64_t)((int32_t)m_PROGRAM_COUNTER - 4);
}
else
{
EPC_REGISTER = m_PROGRAM_COUNTER;
EPC_REGISTER = (int64_t)((int32_t)m_PROGRAM_COUNTER);
}
STATUS_REGISTER |= STATUS_EXL;
m_PROGRAM_COUNTER = 0x80000180;
@ -642,11 +642,11 @@ bool CRegisters::DoIntrException(bool DelaySlot)
if (DelaySlot)
{
CAUSE_REGISTER |= CAUSE_BD;
EPC_REGISTER = m_PROGRAM_COUNTER - 4;
EPC_REGISTER = (int64_t)((int32_t)m_PROGRAM_COUNTER - 4);
}
else
{
EPC_REGISTER = m_PROGRAM_COUNTER;
EPC_REGISTER = (int64_t)((int32_t)m_PROGRAM_COUNTER);
}
STATUS_REGISTER |= STATUS_EXL;
@ -660,11 +660,11 @@ void CRegisters::DoIllegalInstructionException(bool DelaySlot)
if (DelaySlot)
{
CAUSE_REGISTER |= CAUSE_BD;
EPC_REGISTER = m_PROGRAM_COUNTER - 4;
EPC_REGISTER = (int64_t)((int32_t)m_PROGRAM_COUNTER - 4);
}
else
{
EPC_REGISTER = m_PROGRAM_COUNTER;
EPC_REGISTER = (int64_t)((int32_t)m_PROGRAM_COUNTER);
}
m_PROGRAM_COUNTER = 0x80000180;
STATUS_REGISTER |= STATUS_EXL;
@ -676,11 +676,11 @@ void CRegisters::DoOverflowException(bool DelaySlot)
if (DelaySlot)
{
CAUSE_REGISTER |= CAUSE_BD;
EPC_REGISTER = m_PROGRAM_COUNTER - 4;
EPC_REGISTER = (int64_t)((int32_t)m_PROGRAM_COUNTER - 4);
}
else
{
EPC_REGISTER = m_PROGRAM_COUNTER;
EPC_REGISTER = (int64_t)((int32_t)m_PROGRAM_COUNTER);
}
m_PROGRAM_COUNTER = 0x80000180;
STATUS_REGISTER |= STATUS_EXL;
@ -697,11 +697,11 @@ void CRegisters::DoTLBReadMiss(bool DelaySlot, uint64_t BadVaddr)
if (DelaySlot)
{
CAUSE_REGISTER |= CAUSE_BD;
EPC_REGISTER = m_PROGRAM_COUNTER - 4;
EPC_REGISTER = (int64_t)((int32_t)m_PROGRAM_COUNTER - 4);
}
else
{
EPC_REGISTER = m_PROGRAM_COUNTER;
EPC_REGISTER = (int64_t)((int32_t)m_PROGRAM_COUNTER);
}
if (g_TLB->AddressDefined((uint32_t)BadVaddr))
{
@ -734,11 +734,11 @@ void CRegisters::DoTLBWriteMiss(bool DelaySlot, uint64_t BadVaddr)
if (DelaySlot)
{
CAUSE_REGISTER |= CAUSE_BD;
EPC_REGISTER = m_PROGRAM_COUNTER - 4;
EPC_REGISTER = (int64_t)((int32_t)m_PROGRAM_COUNTER - 4);
}
else
{
EPC_REGISTER = m_PROGRAM_COUNTER;
EPC_REGISTER = (int64_t)((int32_t)m_PROGRAM_COUNTER);
}
if (g_TLB->AddressDefined((uint32_t)BadVaddr))
{
@ -778,11 +778,11 @@ void CRegisters::DoSysCallException(bool DelaySlot)
if (DelaySlot)
{
CAUSE_REGISTER |= CAUSE_BD;
EPC_REGISTER = m_PROGRAM_COUNTER - 4;
EPC_REGISTER = (int64_t)((int32_t)m_PROGRAM_COUNTER - 4);
}
else
{
EPC_REGISTER = m_PROGRAM_COUNTER;
EPC_REGISTER = (int64_t)(int32_t)m_PROGRAM_COUNTER;
}
STATUS_REGISTER |= STATUS_EXL;
m_PROGRAM_COUNTER = 0x80000180;

4
Source/Project64-core/N64System/N64System.cpp
View File

@ -1568,8 +1568,8 @@ void CN64System::DumpSyncErrors(CN64System * SecondCPU)
{
if (m_Reg.m_CP0[count] != SecondCPU->m_Reg.m_CP0[count])
{
Error.LogF("CP0[%s] 0x%08X, 0x%08X\r\n", CRegName::Cop0[count],
m_Reg.m_CP0[count], SecondCPU->m_Reg.m_CP0[count]);
Error.LogF("CP0[%s] 0x%08X%08X, 0x%08X%08X\r\n", CRegName::Cop0[count],
(uint32_t)(m_Reg.m_CP0[count] >> 32), (uint32_t)m_Reg.m_CP0[count], (uint32_t)(SecondCPU->m_Reg.m_CP0[count] >> 32), (uint32_t)(SecondCPU->m_Reg.m_CP0[count]));
}
}
if (m_Reg.m_HI.DW != SecondCPU->m_Reg.m_HI.DW)