ShuriZma
/
project64
mirror of https://github.com/project64/project64.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

git-svn-id: https://localhost/svn/Project64/trunk@28 111125ac-702d-7242-af9c-5ba8ae61c1ef

This commit is contained in:
zilmar 2010-05-23 10:05:41 +00:00
parent f9db52309f
commit 4200b4b6af
46 changed files with 1860 additions and 1446 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
Docs/pj64 changes.txt
View File

@ -1,5 +1,6 @@
Project64 1.7.0.51
------------------
Update: Inernal Code redesign
Project64 1.7.0.50

45
Source/7zip/7zip.plg
View File

@ -3,9 +3,52 @@
<pre>
<h1>Build Log</h1>
<h3>
--------------------Configuration: 7zip - Win32 Debug--------------------
--------------------Configuration: 7zip - Win32 External Release--------------------
</h3>
<h3>Command Lines</h3>
Creating temporary file "C:\DOCUME~1\NICHOL~1\LOCALS~1\Temp\RSP707.tmp" with contents
[
/nologo /MD /W3 /GX /O2 /D "WIN32" /D "NDEBUG" /D "_MBCS" /D "_LIB" /Fp"../../Build/7zip/External/7zip.pch" /YX /Fo"../../Build/7zip/External/" /Fd"../../Build/7zip/External/" /FD /c
"D:\My Programs\Emulation\Projedt64\SOURCE\7zip\7zAlloc.c"
"D:\My Programs\Emulation\Projedt64\SOURCE\7zip\7zBuffer.c"
"D:\My Programs\Emulation\Projedt64\SOURCE\7zip\7zCrc.c"
"D:\My Programs\Emulation\Projedt64\SOURCE\7zip\7zDecode.c"
"D:\My Programs\Emulation\Projedt64\SOURCE\7zip\7zExtract.c"
"D:\My Programs\Emulation\Projedt64\SOURCE\7zip\7zHeader.c"
"D:\My Programs\Emulation\Projedt64\SOURCE\7zip\7zIn.c"
"D:\My Programs\Emulation\Projedt64\SOURCE\7zip\7zItem.c"
"D:\My Programs\Emulation\Projedt64\SOURCE\7zip\7zMethodID.c"
"D:\My Programs\Emulation\Projedt64\SOURCE\7zip\Compress\LzmaDecode.c"
]
Creating command line "cl.exe @C:\DOCUME~1\NICHOL~1\LOCALS~1\Temp\RSP707.tmp"
Creating temporary file "C:\DOCUME~1\NICHOL~1\LOCALS~1\Temp\RSP708.tmp" with contents
[
/nologo /out:"../../Bin/External\7zip.lib"
"\My Programs\Emulation\Projedt64\Build\7zip\External\7zAlloc.obj"
"\My Programs\Emulation\Projedt64\Build\7zip\External\7zBuffer.obj"
"\My Programs\Emulation\Projedt64\Build\7zip\External\7zCrc.obj"
"\My Programs\Emulation\Projedt64\Build\7zip\External\7zDecode.obj"
"\My Programs\Emulation\Projedt64\Build\7zip\External\7zExtract.obj"
"\My Programs\Emulation\Projedt64\Build\7zip\External\7zHeader.obj"
"\My Programs\Emulation\Projedt64\Build\7zip\External\7zIn.obj"
"\My Programs\Emulation\Projedt64\Build\7zip\External\7zItem.obj"
"\My Programs\Emulation\Projedt64\Build\7zip\External\7zMethodID.obj"
"\My Programs\Emulation\Projedt64\Build\7zip\External\LzmaDecode.obj"
]
Creating command line "link.exe -lib @C:\DOCUME~1\NICHOL~1\LOCALS~1\Temp\RSP708.tmp"
<h3>Output Window</h3>
Compiling...
7zAlloc.c
7zBuffer.c
7zCrc.c
7zDecode.c
7zExtract.c
7zHeader.c
7zIn.c
7zItem.c
7zMethodID.c
LzmaDecode.c
Creating library...

2
Source/Common/Trace.h
View File

@ -24,7 +24,7 @@ class CTraceFileLog : public CTraceModule
public:
CTraceFileLog (LPCTSTR FileName, bool FlushFile = true);
CTraceFileLog (LPCTSTR FileName, bool FlushFile, LOG_OPEN_MODE eMode, DWORD dwMaxFileSize = 5 * CTraceFileLog::MB);
CTraceFileLog (LPCTSTR FileName, bool FlushFile, LOG_OPEN_MODE eMode, DWORD dwMaxFileSize = 5);
virtual ~CTraceFileLog ();
void Write ( LPCTSTR Message, bool EndOfLine );

1
Source/Project64/N64 System.h
View File

@ -21,6 +21,7 @@ class CNotification;
#include "N64 System/Mips/Memory Class.h"
#include "N64 System/Mips/OpCode Class.h"
#include "N64 System/Mips/Audio.h"
#include "N64 System/Mips/System Timing.h"
//Recompiler
#include "N64 System/Recompiler/Section Info.h"

114
Source/Project64/N64 System/C Core/C Core Interface.cpp
View File

@ -27,19 +27,15 @@ CPlugins * _Plugins = NULL;
CN64Rom * _Rom = NULL; //The current rom that this system is executing.. it can only execute one file at the time
//registers
MULTI_ACCESS_QWORD * _GPR = NULL, * _FPR = NULL, * g_HI = NULL, * g_LO = NULL;
MIPS_DWORD * _GPR = NULL, * _FPR = NULL, * g_HI = NULL, * g_LO = NULL;
DWORD * _PROGRAM_COUNTER = NULL, * _CP0 = NULL, * _RegMI = NULL, * _LLBit = NULL,
* _LLAddr = NULL, * _FPCR = NULL, * _RegSI = NULL, * _RegRI = NULL, * _RegPI = NULL,
* _RegAI = NULL, * _RegVI = NULL, * _RegDPC = NULL, * _RegSP = NULL, * _RegRDRAM = NULL;
double ** _FPRDoubleLocation;
float ** _FPRFloatLocation;
enum TimerType * _CurrentTimerType;
int * _Timer = NULL;
#endif
//Register Name
const char ** g_Cop0_Name;
//settings
BOOL g_ShowUnhandledMemory = false, g_ShowCPUPer = false, g_ShowTLBMisses = false, g_UseTlb = true,
g_HaveDebugger = false, g_AudioSignal = false, g_ShowDListAListCount = false,
@ -241,45 +237,33 @@ void CC_Core::SetCurrentSystem (CN64System * System )
}
if (_Reg)
{
_GPR = _Reg->GPR;
_CP0 = _Reg->CP0;
_FPR = _Reg->FPR;
_FPCR = _Reg->FPCR;
_FPRFloatLocation = _Reg->FPR_S;
_FPRDoubleLocation = _Reg->FPR_D;
_RegHI = &_Reg->HI;
_RegLO = &_Reg->LO;
_LLBit = &_Reg->LLBit;
_LLAddr = &_Reg->LLAddr;
_RegRI = _Reg->RDRAM_Interface;
_RegRDRAM = _Reg->RDRAM_Registers;
_RegMI = _Reg->Mips_Interface;
_RegVI = _Reg->Video_Interface;
_RegDPC = _Reg->Display_ControlReg;
_RegAI = _Reg->Audio_Interface;
_RegSP = _Reg->SigProcessor_Interface;
_RegPI = _Reg->Peripheral_Interface;
_RegSI = _Reg->SerialInterface;
_AudioIntrReg = &_Reg->AudioIntrReg;
_PROGRAM_COUNTER = &_Reg->PROGRAM_COUNTER;
g_Cop0_Name = _Reg->Cop0_Name;
_Timer = &_Reg->Timer;
_CurrentTimerType = &_Reg->CurrentTimerType;
_GPR = _Reg->m_GPR;
_CP0 = _Reg->m_CP0;
_FPR = _Reg->m_FPR;
_FPCR = _Reg->m_FPCR;
_FPRFloatLocation = _Reg->m_FPR_S;
_FPRDoubleLocation = _Reg->m_FPR_D;
_RegHI = &_Reg->m_HI;
_RegLO = &_Reg->m_LO;
_LLBit = &_Reg->m_LLBit;
_LLAddr = &_Reg->m_LLAddr;
_RegRI = _Reg->m_RDRAM_Interface;
_RegRDRAM = _Reg->m_RDRAM_Registers;
_RegMI = _Reg->m_Mips_Interface;
_RegVI = _Reg->m_Video_Interface;
_RegDPC = _Reg->m_Display_ControlReg;
_RegAI = _Reg->m_Audio_Interface;
_RegSP = _Reg->m_SigProcessor_Interface;
_RegPI = _Reg->m_Peripheral_Interface;
_RegSI = _Reg->m_SerialInterface;
_AudioIntrReg = &_Reg->m_AudioIntrReg;
_PROGRAM_COUNTER = &_Reg->m_PROGRAM_COUNTER;
_NextTimer = &_N64System->m_NextTimer;
}
CaptureScreen = _Plugins->Gfx()->CaptureScreen;
ChangeWindow = _Plugins->Gfx()->ChangeWindow;
// GetGfxDebugInfo = _Plugins->Gfx()->GetGfxDebugInfo;
// GFXCloseDLL = _Plugins->Gfx()->GFXCloseDLL;
// GFXDllAbout = _Plugins->Gfx()->GFXDllAbout;
// GFXDllConfig = _Plugins->Gfx()->GFXDllConfig;
// GfxRomClosed = _Plugins->Gfx()->GfxRomClosed;
// GfxRomOpen = _Plugins->Gfx()->GfxRomOpen;
DrawScreen = _Plugins->Gfx()->DrawScreen;
// FrameBufferRead = _Plugins->Gfx()->FrameBufferRead;
// FrameBufferWrite = _Plugins->Gfx()->FrameBufferWrite;
// InitiateGFX = _Plugins->Gfx()->InitiateGFX;
// InitiateGFXDebugger = _Plugins->Gfx()->InitiateGFXDebugger;
MoveScreen = _Plugins->Gfx()->MoveScreen;
ProcessDList = _Plugins->Gfx()->ProcessDList;
ProcessRDPList = _Plugins->Gfx()->ProcessRDPList;
@ -287,43 +271,61 @@ void CC_Core::SetCurrentSystem (CN64System * System )
UpdateScreen = _Plugins->Gfx()->UpdateScreen;
ViStatusChanged = _Plugins->Gfx()->ViStatusChanged;
ViWidthChanged = _Plugins->Gfx()->ViWidthChanged;
#ifdef tofix
// GetGfxDebugInfo = _Plugins->Gfx()->GetGfxDebugInfo;
// GFXCloseDLL = _Plugins->Gfx()->GFXCloseDLL;
// GFXDllAbout = _Plugins->Gfx()->GFXDllAbout;
// GFXDllConfig = _Plugins->Gfx()->GFXDllConfig;
// GfxRomClosed = _Plugins->Gfx()->GfxRomClosed;
// GfxRomOpen = _Plugins->Gfx()->GfxRomOpen;
// FrameBufferRead = _Plugins->Gfx()->FrameBufferRead;
// FrameBufferWrite = _Plugins->Gfx()->FrameBufferWrite;
// InitiateGFX = _Plugins->Gfx()->InitiateGFX;
// InitiateGFXDebugger = _Plugins->Gfx()->InitiateGFXDebugger;
#endif
// ContCloseDLL = _Plugins->Control()->ContCloseDLL;
ControllerCommand = _Plugins->Control()->ControllerCommand;
GetKeys = _Plugins->Control()->GetKeys;
ReadController = _Plugins->Control()->ReadController;
RumbleCommand = _Plugins->Control()->RumbleCommand;
g_Controllers = _Plugins->Control()->m_PluginControllers;
#ifdef tofix
// ContCloseDLL = _Plugins->Control()->ContCloseDLL;
// ContDllAbout = _Plugins->Control()->ContDllAbout;
// ContConfig = _Plugins->Control()->ContConfig;
// InitiateControllers_1_0= _Plugins->Control()->InitiateControllers_1_0;
// InitiateControllers_1_1= _Plugins->Control()->InitiateControllers_1_1;
GetKeys = _Plugins->Control()->GetKeys;
ReadController = _Plugins->Control()->ReadController;
// ContRomOpen = _Plugins->Control()->ContRomOpen;
// ContRomClosed = _Plugins->Control()->ContRomClosed;
// WM_KeyDown = _Plugins->Control()->WM_KeyDown;
// WM_KeyUp = _Plugins->Control()->WM_KeyUp;
RumbleCommand = _Plugins->Control()->RumbleCommand;
g_Controllers = _Plugins->Control()->m_PluginControllers;
#endif
DoRspCycles = _Plugins->RSP()->DoRspCycles;
#ifdef tofix
// GetRspDebugInfo = _Plugins->RSP()->GetRspDebugInfo;
// RSPCloseDLL = _Plugins->RSP()->RSPCloseDLL;
// RSPDllAbout = _Plugins->RSP()->RSPDllAbout;
// RSPDllConfig = _Plugins->RSP()->RSPDllConfig;
// RSPRomClosed = _Plugins->RSP()->RSPRomClosed;
DoRspCycles = _Plugins->RSP()->DoRspCycles;
// InitiateRSP_1_0 = _Plugins->RSP()->InitiateRSP_1_0;
// InitiateRSP_1_1 = _Plugins->RSP()->InitiateRSP_1_1;
// InitiateRSPDebugger = _Plugins->RSP()->InitiateRSPDebugger;
#endif
AiLenChanged = _Plugins->Audio()->LenChanged;
AiReadLength = _Plugins->Audio()->ReadLength;
ProcessAList = _Plugins->Audio()->ProcessAList;
#ifdef tofix
// AiCloseDLL = _Plugins->Audio()->AiCloseDLL;
// AiDacrateChanged = _Plugins->Audio()->AiDacrateChanged;
AiLenChanged = _Plugins->Audio()->LenChanged;
// AiDllAbout = _Plugins->Audio()->AiDllAbout;
// AiDllConfig = _Plugins->Audio()->AiDllConfig;
// AiDllTest = _Plugins->Audio()->AiDllTest;
AiReadLength = _Plugins->Audio()->ReadLength;
// AiRomClosed = _Plugins->Audio()->AiRomClosed;
// AiUpdate = _Plugins->Audio()->Update;
// InitiateAudio = _Plugins->Audio()->InitiateAudio;
ProcessAList = _Plugins->Audio()->ProcessAList;
#endif
g_RDRAM = _MMU->Rdram();
g_DMEM = _MMU->Dmem();
@ -506,22 +508,6 @@ void SyncSystem (void)
_N64System->SyncCPU(_SyncSystem);
}
void ChangeTimer ( enum TimerType Type, int Value )
{
if (Value == 0)
{
_Reg->DeactiateTimer(Type);
} else
{
_Reg->ChangeTimerFixed(Type,Value);
}
}
void ChangeTimerRelative ( enum TimerType Type, int Value )
{
_Reg->ChangeTimerRelative(Type,Value);
}
void ApplyGSButtonCheats ( void )
{
CC_Core::ApplyGSButtonCheats(_N64System);

10
Source/Project64/N64 System/C Core/C Core Interface.h
View File

@ -1,3 +1,5 @@
#pragma once
#ifdef __cplusplus
#include "..\\..\\N64 System.h"
#include "..\\..\\User Interface.h"
@ -66,8 +68,6 @@ void StopEmulation ( void );
void __stdcall UpdateSyncCPU ( DWORD const Cycles );
void ExecuteCycles ( DWORD Cycles );
void SyncSystem ( void );
void ChangeTimer ( enum TimerType Type, int Value );
void ChangeTimerRelative( enum TimerType Type, int Value );
BOOL Machine_LoadState ( void );
BOOL Machine_SaveState ( void );
void BreakPoint ( LPCSTR FileName, int LineNumber );
@ -100,19 +100,15 @@ DWORD StopTimer ( void );
//registers
#ifdef toremove
extern MULTI_ACCESS_QWORD * g_GPR, * g_FPR, * g_HI, * g_LO;
extern MIPS_DWORD * g_GPR, * g_FPR, * g_HI, * g_LO;
extern DWORD * g_PROGRAM_COUNTER, * g_CP0, * g_RegMI, * g_LLBit,
* g_LLAddr, * g_FPCR, * g_RegSI, * g_RegRI, * g_RegPI, * g_RegAI,
* g_RegVI, * g_RegDPC, * g_RegSP, * g_RegRDRAM;
extern double ** g_FPRDoubleLocation;
extern float ** g_FPRFloatLocation;
extern enum TimerType * g_CurrentTimerType;
extern int * g_Timer;
#endif
//Register Name
extern const char ** g_Cop0_Name;
//settings
extern BOOL g_ShowUnhandledMemory, g_ShowCPUPer, g_ShowTLBMisses, g_UseTlb,
g_HaveDebugger, g_AudioSignal, g_ShowDListAListCount, g_ShowPifRamErrors,

3
Source/Project64/N64 System/C Core/C Global Variable.h
View File

@ -25,9 +25,6 @@
#define FPRDoubleLocation g_FPRDoubleLocation
#define FPRFloatLocation g_FPRFloatLocation*/
//Register Names
#define Cop0_Name g_Cop0_Name
//Settings
#define ShowUnhandledMemory g_ShowUnhandledMemory
#define ShowCPUPer g_ShowCPUPer

97
Source/Project64/N64 System/C Core/CPU.cpp
View File

@ -137,9 +137,9 @@ void DoSomething ( void ) {
{
CPU_Action.SoftReset = false;
ChangeTimer(SoftResetTimer,0x3000000);
_SystemTimer->SetTimer(CSystemTimer::SoftResetTimer,0x3000000,false);
ShowCFB();
FAKE_CAUSE_REGISTER |= CAUSE_IP4;
_Reg->FAKE_CAUSE_REGISTER |= CAUSE_IP4;
CheckInterrupts();
_Plugins->Gfx()->SoftReset();
}
@ -147,7 +147,7 @@ void DoSomething ( void ) {
if (CPU_Action.GenerateInterrupt)
{
CPU_Action.GenerateInterrupt = FALSE;
MI_INTR_REG |= CPU_Action.InterruptFlag;
_Reg->MI_INTR_REG |= CPU_Action.InterruptFlag;
CPU_Action.InterruptFlag = 0;
CheckInterrupts();
}
@ -212,63 +212,6 @@ void DoSomething ( void ) {
if (CPU_Action.DoInterrupt == TRUE) { CPU_Action.DoSomething = TRUE; }
}
void TimerDone (void) {
DWORD LastTimer;
if (Profiling) {
LastTimer = StartTimer(Timer_Done);
}
#if (!defined(EXTERNAL_RELEASE))
if (LogOptions.GenerateLog && LogOptions.LogExceptions && !LogOptions.NoInterrupts) {
LogMessage("%08X: Timer Done (Type: %d CurrentTimer: %d)", *_PROGRAM_COUNTER, *_CurrentTimerType, *_Timer );
}
#endif
switch (*_CurrentTimerType) {
case CompareTimer:
FAKE_CAUSE_REGISTER |= CAUSE_IP7;
CheckInterrupts();
ChangeCompareTimer();
break;
case SoftResetTimer:
ChangeTimer(SoftResetTimer,0);
_N64System->SoftReset();
break;
case SiTimer:
ChangeTimer(SiTimer,0);
MI_INTR_REG |= MI_INTR_SI;
SI_STATUS_REG |= SI_STATUS_INTERRUPT;
CheckInterrupts();
break;
case PiTimer:
ChangeTimer(PiTimer,0);
PI_STATUS_REG &= ~PI_STATUS_DMA_BUSY;
MI_INTR_REG |= MI_INTR_PI;
CheckInterrupts();
break;
case ViTimer:
RefreshScreen();
MI_INTR_REG |= MI_INTR_VI;
CheckInterrupts();
break;
case RspTimer:
ChangeTimer(RspTimer,0);
RunRsp();
break;
case AiTimer:
ChangeTimer(AiTimer,0);
MI_INTR_REG |= MI_INTR_AI;
CheckInterrupts();
_Audio->AiCallBack();
break;
default:
BreakPoint(__FILE__,__LINE__);
}
//CheckTimer();
if (Profiling) {
StartTimer(LastTimer);
}
}
void InPermLoop (void) {
// *** Changed ***/
if (CPU_Action.DoInterrupt)
@ -280,10 +223,10 @@ void InPermLoop (void) {
//if (CPU_Type == CPU_SyncCores) { SyncRegisters.CP0[9] +=5; }
/* Interrupts enabled */
if (( STATUS_REGISTER & STATUS_IE ) == 0 ) { goto InterruptsDisabled; }
if (( STATUS_REGISTER & STATUS_EXL ) != 0 ) { goto InterruptsDisabled; }
if (( STATUS_REGISTER & STATUS_ERL ) != 0 ) { goto InterruptsDisabled; }
if (( STATUS_REGISTER & 0xFF00) == 0) { goto InterruptsDisabled; }
if (( _Reg->STATUS_REGISTER & STATUS_IE ) == 0 ) { goto InterruptsDisabled; }
if (( _Reg->STATUS_REGISTER & STATUS_EXL ) != 0 ) { goto InterruptsDisabled; }
if (( _Reg->STATUS_REGISTER & STATUS_ERL ) != 0 ) { goto InterruptsDisabled; }
if (( _Reg->STATUS_REGISTER & 0xFF00) == 0) { goto InterruptsDisabled; }
/* check sound playing */
_N64System->SyncToAudio();
@ -291,10 +234,10 @@ void InPermLoop (void) {
/* check RSP running */
/* check RDP running */
if (*_Timer > 0) {
COUNT_REGISTER += *_Timer + 1;
if (*_NextTimer > 0) {
//_Reg->COUNT_REGISTER += *_Timer + 1;
//if (CPU_Type == CPU_SyncCores) { SyncRegisters.CP0[9] += Timers.Timer + 1; }
*_Timer = -1;
*_NextTimer = -1;
}
return;
@ -467,26 +410,14 @@ int DelaySlotEffectsCompare (DWORD PC, DWORD Reg1, DWORD Reg2) {
return FALSE;
}
#ifdef toremove
void ChangeCompareTimer(void) {
DWORD NextCompare = COMPARE_REGISTER - COUNT_REGISTER;
DWORD NextCompare = _Reg->COMPARE_REGISTER - _Reg->COUNT_REGISTER;
if ((NextCompare & 0x80000000) != 0) { NextCompare = 0x7FFFFFFF; }
if (NextCompare == 0) { NextCompare = 0x1; }
ChangeTimer(CompareTimer,NextCompare);
_SystemTimer->SetTimer(CSystemTimer::CompareTimer,NextCompare,false);
}
//void ChangeTimer(enum TimerType Type, int Value) {
// _Reg->ChangeTimerFixed(CompareTimer,COMPARE_REGISTER - COUNT_REGISTER);
/*if (Value == 0) {
Timers.NextTimer[Type] = 0;
Timers.Active[Type] = FALSE;
return;
}
Timers.NextTimer[Type] = Value - Timers.Timer;
Timers.Active[Type] = TRUE;
CheckTimer();*/
// _asm int 3
//}
#endif
void CheckTimer (void) {
BreakPoint(__FILE__,__LINE__);

4
Source/Project64/N64 System/C Core/CPU.h
View File

@ -51,12 +51,12 @@ extern SYSTEM_TIMERS Timers;*/
AutoSleep, UseIni, RomBrowser,
IgnoreMove, Rercursion, ShowCPUPer, AutoZip,
AutoFullScreen, SystemABL, AlwaysOnTop, BasicMode, RememberCheats,AudioSignal;
*/
void ChangeCompareTimer ( void );
void ChangeTimer ( enum TimerType Type, int Value );
void CheckTimer ( void );
void TimerDone ( void );
*/
void DoSomething ( void );
int DelaySlotEffectsCompare ( DWORD PC, DWORD Reg1, DWORD Reg2 );
int DelaySlotEffectsJump (DWORD JumpPC);

168
Source/Project64/N64 System/C Core/Dma.cpp
View File

@ -43,98 +43,98 @@ void OnFirstDMA (void) {
void PI_DMA_READ (void) {
// PI_STATUS_REG |= PI_STATUS_DMA_BUSY;
if ( PI_DRAM_ADDR_REG + PI_RD_LEN_REG + 1 > RdramSize) {
if ( _Reg->PI_DRAM_ADDR_REG + _Reg->PI_RD_LEN_REG + 1 > RdramSize) {
#ifndef EXTERNAL_RELEASE
DisplayError("PI_DMA_READ not in Memory");
#endif
PI_STATUS_REG &= ~PI_STATUS_DMA_BUSY;
MI_INTR_REG |= MI_INTR_PI;
_Reg->PI_STATUS_REG &= ~PI_STATUS_DMA_BUSY;
_Reg->MI_INTR_REG |= MI_INTR_PI;
CheckInterrupts();
return;
}
if ( PI_CART_ADDR_REG >= 0x08000000 && PI_CART_ADDR_REG <= 0x08010000) {
if ( _Reg->PI_CART_ADDR_REG >= 0x08000000 && _Reg->PI_CART_ADDR_REG <= 0x08010000) {
if (SaveUsing == SaveChip_Auto) { SaveUsing = SaveChip_Sram; }
if (SaveUsing == SaveChip_Sram) {
DmaToSram(
RDRAM+PI_DRAM_ADDR_REG,
PI_CART_ADDR_REG - 0x08000000,
PI_RD_LEN_REG + 1
RDRAM+_Reg->PI_DRAM_ADDR_REG,
_Reg->PI_CART_ADDR_REG - 0x08000000,
_Reg->PI_RD_LEN_REG + 1
);
PI_STATUS_REG &= ~PI_STATUS_DMA_BUSY;
MI_INTR_REG |= MI_INTR_PI;
_Reg->PI_STATUS_REG &= ~PI_STATUS_DMA_BUSY;
_Reg->MI_INTR_REG |= MI_INTR_PI;
CheckInterrupts();
return;
}
if (SaveUsing == SaveChip_FlashRam) {
DmaToFlashram(
RDRAM+PI_DRAM_ADDR_REG,
PI_CART_ADDR_REG - 0x08000000,
PI_WR_LEN_REG + 1
RDRAM+_Reg->PI_DRAM_ADDR_REG,
_Reg->PI_CART_ADDR_REG - 0x08000000,
_Reg->PI_WR_LEN_REG + 1
);
PI_STATUS_REG &= ~PI_STATUS_DMA_BUSY;
MI_INTR_REG |= MI_INTR_PI;
_Reg->PI_STATUS_REG &= ~PI_STATUS_DMA_BUSY;
_Reg->MI_INTR_REG |= MI_INTR_PI;
CheckInterrupts();
return;
}
}
if (SaveUsing == SaveChip_FlashRam) {
#ifndef EXTERNAL_RELEASE
DisplayError("**** FLashRam DMA Read address %X *****",PI_CART_ADDR_REG);
DisplayError("**** FLashRam DMA Read address %X *****",_Reg->PI_CART_ADDR_REG);
#endif
PI_STATUS_REG &= ~PI_STATUS_DMA_BUSY;
MI_INTR_REG |= MI_INTR_PI;
_Reg->PI_STATUS_REG &= ~PI_STATUS_DMA_BUSY;
_Reg->MI_INTR_REG |= MI_INTR_PI;
CheckInterrupts();
return;
}
#ifndef EXTERNAL_RELEASE
DisplayError("PI_DMA_READ where are you dmaing to ?");
#endif
PI_STATUS_REG &= ~PI_STATUS_DMA_BUSY;
MI_INTR_REG |= MI_INTR_PI;
_Reg->PI_STATUS_REG &= ~PI_STATUS_DMA_BUSY;
_Reg->MI_INTR_REG |= MI_INTR_PI;
CheckInterrupts();
return;
}
void PI_DMA_WRITE (void) {
PI_STATUS_REG |= PI_STATUS_DMA_BUSY;
if ( PI_DRAM_ADDR_REG + PI_WR_LEN_REG + 1 > RdramSize)
_Reg->PI_STATUS_REG |= PI_STATUS_DMA_BUSY;
if ( _Reg->PI_DRAM_ADDR_REG + _Reg->PI_WR_LEN_REG + 1 > RdramSize)
{
if (ShowUnhandledMemory) { DisplayError("PI_DMA_WRITE not in Memory"); }
PI_STATUS_REG &= ~PI_STATUS_DMA_BUSY;
MI_INTR_REG |= MI_INTR_PI;
_Reg->PI_STATUS_REG &= ~PI_STATUS_DMA_BUSY;
_Reg->MI_INTR_REG |= MI_INTR_PI;
CheckInterrupts();
return;
}
if ( PI_CART_ADDR_REG >= 0x08000000 && PI_CART_ADDR_REG <= 0x08010000) {
if ( _Reg->PI_CART_ADDR_REG >= 0x08000000 && _Reg->PI_CART_ADDR_REG <= 0x08010000) {
if (SaveUsing == SaveChip_Auto) { SaveUsing = SaveChip_Sram; }
if (SaveUsing == SaveChip_Sram) {
DmaFromSram(
RDRAM+PI_DRAM_ADDR_REG,
PI_CART_ADDR_REG - 0x08000000,
PI_WR_LEN_REG + 1
RDRAM+_Reg->PI_DRAM_ADDR_REG,
_Reg->PI_CART_ADDR_REG - 0x08000000,
_Reg->PI_WR_LEN_REG + 1
);
PI_STATUS_REG &= ~PI_STATUS_DMA_BUSY;
MI_INTR_REG |= MI_INTR_PI;
_Reg->PI_STATUS_REG &= ~PI_STATUS_DMA_BUSY;
_Reg->MI_INTR_REG |= MI_INTR_PI;
CheckInterrupts();
return;
}
if (SaveUsing == SaveChip_FlashRam) {
DmaFromFlashram(
RDRAM+PI_DRAM_ADDR_REG,
PI_CART_ADDR_REG - 0x08000000,
PI_WR_LEN_REG + 1
RDRAM+_Reg->PI_DRAM_ADDR_REG,
_Reg->PI_CART_ADDR_REG - 0x08000000,
_Reg->PI_WR_LEN_REG + 1
);
PI_STATUS_REG &= ~PI_STATUS_DMA_BUSY;
MI_INTR_REG |= MI_INTR_PI;
_Reg->PI_STATUS_REG &= ~PI_STATUS_DMA_BUSY;
_Reg->MI_INTR_REG |= MI_INTR_PI;
CheckInterrupts();
}
return;
}
if ( PI_CART_ADDR_REG >= 0x10000000 && PI_CART_ADDR_REG <= 0x1FBFFFFF) {
if ( _Reg->PI_CART_ADDR_REG >= 0x10000000 && _Reg->PI_CART_ADDR_REG <= 0x1FBFFFFF) {
DWORD i;
#ifdef tofix
#ifdef ROM_IN_MAPSPACE
@ -145,22 +145,22 @@ void PI_DMA_WRITE (void) {
#endif
#endif
BYTE * ROM = _Rom->GetRomAddress();
PI_CART_ADDR_REG -= 0x10000000;
if (PI_CART_ADDR_REG + PI_WR_LEN_REG + 1 < RomFileSize) {
for (i = 0; i < PI_WR_LEN_REG + 1; i ++) {
*(RDRAM+((PI_DRAM_ADDR_REG + i) ^ 3)) = *(ROM+((PI_CART_ADDR_REG + i) ^ 3));
_Reg->PI_CART_ADDR_REG -= 0x10000000;
if (_Reg->PI_CART_ADDR_REG + _Reg->PI_WR_LEN_REG + 1 < RomFileSize) {
for (i = 0; i < _Reg->PI_WR_LEN_REG + 1; i ++) {
*(RDRAM+((_Reg->PI_DRAM_ADDR_REG + i) ^ 3)) = *(ROM+((_Reg->PI_CART_ADDR_REG + i) ^ 3));
}
} else {
DWORD Len;
Len = RomFileSize - PI_CART_ADDR_REG;
Len = RomFileSize - _Reg->PI_CART_ADDR_REG;
for (i = 0; i < Len; i ++) {
*(RDRAM+((PI_DRAM_ADDR_REG + i) ^ 3)) = *(ROM+((PI_CART_ADDR_REG + i) ^ 3));
*(RDRAM+((_Reg->PI_DRAM_ADDR_REG + i) ^ 3)) = *(ROM+((_Reg->PI_CART_ADDR_REG + i) ^ 3));
}
for (i = Len; i < PI_WR_LEN_REG + 1 - Len; i ++) {
*(RDRAM+((PI_DRAM_ADDR_REG + i) ^ 3)) = 0;
for (i = Len; i < _Reg->PI_WR_LEN_REG + 1 - Len; i ++) {
*(RDRAM+((_Reg->PI_DRAM_ADDR_REG + i) ^ 3)) = 0;
}
}
PI_CART_ADDR_REG += 0x10000000;
_Reg->PI_CART_ADDR_REG += 0x10000000;
if (!CPU_Action.DMAUsed) {
CPU_Action.DMAUsed = TRUE;
@ -168,10 +168,10 @@ void PI_DMA_WRITE (void) {
}
if (_Recompiler && _Recompiler->bSMM_PIDMA())
{
_Recompiler->ClearRecompCode_Phys(PI_DRAM_ADDR_REG, PI_WR_LEN_REG,CRecompiler::Remove_DMA);
_Recompiler->ClearRecompCode_Phys(_Reg->PI_DRAM_ADDR_REG, _Reg->PI_WR_LEN_REG,CRecompiler::Remove_DMA);
}
PI_STATUS_REG &= ~PI_STATUS_DMA_BUSY;
MI_INTR_REG |= MI_INTR_PI;
_Reg->PI_STATUS_REG &= ~PI_STATUS_DMA_BUSY;
_Reg->MI_INTR_REG |= MI_INTR_PI;
CheckInterrupts();
//ChangeTimer(PiTimer,(int)(PI_WR_LEN_REG * 8.9) + 50);
//ChangeTimer(PiTimer,(int)(PI_WR_LEN_REG * 8.9));
@ -179,8 +179,8 @@ void PI_DMA_WRITE (void) {
}
if (ShowUnhandledMemory) { DisplayError("PI_DMA_WRITE not in ROM"); }
PI_STATUS_REG &= ~PI_STATUS_DMA_BUSY;
MI_INTR_REG |= MI_INTR_PI;
_Reg->PI_STATUS_REG &= ~PI_STATUS_DMA_BUSY;
_Reg->MI_INTR_REG |= MI_INTR_PI;
CheckInterrupts();
}
@ -189,7 +189,7 @@ void SI_DMA_READ (void) {
BYTE * PIF_Ram = _MMU->PifRam();
BYTE * PifRamPos = _MMU->PifRam();
if ((int)SI_DRAM_ADDR_REG > (int)RdramSize) {
if ((int)_Reg->SI_DRAM_ADDR_REG > (int)RdramSize) {
#ifndef EXTERNAL_RELEASE
DisplayError("SI DMA\nSI_DRAM_ADDR_REG not in RDRam space");
#endif
@ -197,11 +197,11 @@ void SI_DMA_READ (void) {
}
PifRamRead();
SI_DRAM_ADDR_REG &= 0xFFFFFFF8;
if ((int)SI_DRAM_ADDR_REG < 0) {
_Reg->SI_DRAM_ADDR_REG &= 0xFFFFFFF8;
if ((int)_Reg->SI_DRAM_ADDR_REG < 0) {
int count, RdramPos;
RdramPos = (int)SI_DRAM_ADDR_REG;
RdramPos = (int)_Reg->SI_DRAM_ADDR_REG;
for (count = 0; count < 0x40; count++, RdramPos++) {
if (RdramPos < 0) { continue; }
RDRAM[RdramPos ^3] = PIF_Ram[count];
@ -266,10 +266,10 @@ void SI_DMA_READ (void) {
#endif
if (DelaySI) {
ChangeTimer(SiTimer,0x900);
_SystemTimer->SetTimer(CSystemTimer::SiTimer,0x900,false);
} else {
MI_INTR_REG |= MI_INTR_SI;
SI_STATUS_REG |= SI_STATUS_INTERRUPT;
_Reg->MI_INTR_REG |= MI_INTR_SI;
_Reg->SI_STATUS_REG |= SI_STATUS_INTERRUPT;
CheckInterrupts();
}
}
@ -278,18 +278,18 @@ void SI_DMA_WRITE (void) {
BYTE * PIF_Ram = _MMU->PifRam();
BYTE * PifRamPos = PIF_Ram;
if ((int)SI_DRAM_ADDR_REG > (int)RdramSize) {
if ((int)_Reg->SI_DRAM_ADDR_REG > (int)RdramSize) {
#ifndef EXTERNAL_RELEASE
DisplayError("SI DMA\nSI_DRAM_ADDR_REG not in RDRam space");
#endif
return;
}
SI_DRAM_ADDR_REG &= 0xFFFFFFF8;
if ((int)SI_DRAM_ADDR_REG < 0) {
_Reg->SI_DRAM_ADDR_REG &= 0xFFFFFFF8;
if ((int)_Reg->SI_DRAM_ADDR_REG < 0) {
int count, RdramPos;
RdramPos = (int)SI_DRAM_ADDR_REG;
RdramPos = (int)_Reg->SI_DRAM_ADDR_REG;
for (count = 0; count < 0x40; count++, RdramPos++) {
if (RdramPos < 0) { PIF_Ram[count] = 0; continue; }
PIF_Ram[count] = RDRAM[RdramPos ^3];
@ -357,66 +357,66 @@ void SI_DMA_WRITE (void) {
PifRamWrite();
if (DelaySI) {
ChangeTimer(SiTimer,0x900);
_SystemTimer->SetTimer(CSystemTimer::SiTimer,0x900,false);
} else {
MI_INTR_REG |= MI_INTR_SI;
SI_STATUS_REG |= SI_STATUS_INTERRUPT;
_Reg->MI_INTR_REG |= MI_INTR_SI;
_Reg->SI_STATUS_REG |= SI_STATUS_INTERRUPT;
CheckInterrupts();
}
}
void SP_DMA_READ (void) {
SP_DRAM_ADDR_REG &= 0x1FFFFFFF;
_Reg->SP_DRAM_ADDR_REG &= 0x1FFFFFFF;
if (SP_DRAM_ADDR_REG > RdramSize) {
if (_Reg->SP_DRAM_ADDR_REG > RdramSize) {
#ifndef EXTERNAL_RELEASE
DisplayError("SP DMA\nSP_DRAM_ADDR_REG not in RDRam space");
#endif
SP_DMA_BUSY_REG = 0;
SP_STATUS_REG &= ~SP_STATUS_DMA_BUSY;
_Reg->SP_DMA_BUSY_REG = 0;
_Reg->SP_STATUS_REG &= ~SP_STATUS_DMA_BUSY;
return;
}
if (SP_RD_LEN_REG + 1 + (SP_MEM_ADDR_REG & 0xFFF) > 0x1000) {
if (_Reg->SP_RD_LEN_REG + 1 + (_Reg->SP_MEM_ADDR_REG & 0xFFF) > 0x1000) {
#ifndef EXTERNAL_RELEASE
DisplayError("SP DMA\ncould not fit copy in memory segement");
#endif
return;
}
if ((SP_MEM_ADDR_REG & 3) != 0) { BreakPoint(__FILE__,__LINE__); }
if ((SP_DRAM_ADDR_REG & 3) != 0) { BreakPoint(__FILE__,__LINE__); }
if (((SP_RD_LEN_REG + 1) & 3) != 0) { BreakPoint(__FILE__,__LINE__); }
if ((_Reg->SP_MEM_ADDR_REG & 3) != 0) { BreakPoint(__FILE__,__LINE__); }
if ((_Reg->SP_DRAM_ADDR_REG & 3) != 0) { BreakPoint(__FILE__,__LINE__); }
if (((_Reg->SP_RD_LEN_REG + 1) & 3) != 0) { BreakPoint(__FILE__,__LINE__); }
memcpy( DMEM + (SP_MEM_ADDR_REG & 0x1FFF), RDRAM + SP_DRAM_ADDR_REG,
SP_RD_LEN_REG + 1 );
memcpy( DMEM + (_Reg->SP_MEM_ADDR_REG & 0x1FFF), RDRAM + _Reg->SP_DRAM_ADDR_REG,
_Reg->SP_RD_LEN_REG + 1 );
SP_DMA_BUSY_REG = 0;
SP_STATUS_REG &= ~SP_STATUS_DMA_BUSY;
_Reg->SP_DMA_BUSY_REG = 0;
_Reg->SP_STATUS_REG &= ~SP_STATUS_DMA_BUSY;
}
void SP_DMA_WRITE (void) {
if (SP_DRAM_ADDR_REG > RdramSize) {
if (_Reg->SP_DRAM_ADDR_REG > RdramSize) {
#ifndef EXTERNAL_RELEASE
DisplayError("SP DMA WRITE\nSP_DRAM_ADDR_REG not in RDRam space");
#endif
return;
}
if (SP_WR_LEN_REG + 1 + (SP_MEM_ADDR_REG & 0xFFF) > 0x1000) {
if (_Reg->SP_WR_LEN_REG + 1 + (_Reg->SP_MEM_ADDR_REG & 0xFFF) > 0x1000) {
#ifndef EXTERNAL_RELEASE
DisplayError("SP DMA WRITE\ncould not fit copy in memory segement");
#endif
return;
}
if ((SP_MEM_ADDR_REG & 3) != 0) { BreakPoint(__FILE__,__LINE__); }
if ((SP_DRAM_ADDR_REG & 3) != 0) { BreakPoint(__FILE__,__LINE__); }
if (((SP_WR_LEN_REG + 1) & 3) != 0) { BreakPoint(__FILE__,__LINE__); }
if ((_Reg->SP_MEM_ADDR_REG & 3) != 0) { BreakPoint(__FILE__,__LINE__); }
if ((_Reg->SP_DRAM_ADDR_REG & 3) != 0) { BreakPoint(__FILE__,__LINE__); }
if (((_Reg->SP_WR_LEN_REG + 1) & 3) != 0) { BreakPoint(__FILE__,__LINE__); }
memcpy( RDRAM + SP_DRAM_ADDR_REG, DMEM + (SP_MEM_ADDR_REG & 0x1FFF),
SP_WR_LEN_REG + 1);
memcpy( RDRAM + _Reg->SP_DRAM_ADDR_REG, DMEM + (_Reg->SP_MEM_ADDR_REG & 0x1FFF),
_Reg->SP_WR_LEN_REG + 1);
SP_DMA_BUSY_REG = 0;
SP_STATUS_REG &= ~SP_STATUS_DMA_BUSY;
_Reg->SP_DMA_BUSY_REG = 0;
_Reg->SP_STATUS_REG &= ~SP_STATUS_DMA_BUSY;
}

122
Source/Project64/N64 System/C Core/Exception.cpp
View File

@ -34,23 +34,23 @@ void __cdecl AiCheckInterrupts ( void ) {
CPU_Action.DoSomething = TRUE;
}
void __cdecl CheckInterrupts ( void ) {
void __cdecl CheckInterrupts ( void )
{
if (!g_FixedAudio && CPU_Type != CPU_SyncCores) {
MI_INTR_REG &= ~MI_INTR_AI;
MI_INTR_REG |= (_Reg->AudioIntrReg & MI_INTR_AI);
_Reg->MI_INTR_REG &= ~MI_INTR_AI;
_Reg->MI_INTR_REG |= (_Reg->m_AudioIntrReg & MI_INTR_AI);
}
if ((MI_INTR_MASK_REG & MI_INTR_REG) != 0) {
FAKE_CAUSE_REGISTER |= CAUSE_IP2;
if ((_Reg->MI_INTR_MASK_REG & _Reg->MI_INTR_REG) != 0) {
_Reg->FAKE_CAUSE_REGISTER |= CAUSE_IP2;
} else {
FAKE_CAUSE_REGISTER &= ~CAUSE_IP2;
_Reg->FAKE_CAUSE_REGISTER &= ~CAUSE_IP2;
}
if (( STATUS_REGISTER & STATUS_IE ) == 0 ) { return; }
if (( STATUS_REGISTER & STATUS_EXL ) != 0 ) { return; }
if (( STATUS_REGISTER & STATUS_ERL ) != 0 ) { return; }
if (( _Reg->STATUS_REGISTER & STATUS_IE ) == 0 ) { return; }
if (( _Reg->STATUS_REGISTER & STATUS_EXL ) != 0 ) { return; }
if (( _Reg->STATUS_REGISTER & STATUS_ERL ) != 0 ) { return; }
if (( STATUS_REGISTER & FAKE_CAUSE_REGISTER & 0xFF00) != 0) {
if (( _Reg->STATUS_REGISTER & _Reg->FAKE_CAUSE_REGISTER & 0xFF00) != 0) {
if (!CPU_Action.DoInterrupt) {
CPU_Action.DoSomething = TRUE;
CPU_Action.DoInterrupt = TRUE;
@ -61,106 +61,106 @@ void __cdecl CheckInterrupts ( void ) {
void DoAddressError ( BOOL DelaySlot, DWORD BadVaddr, BOOL FromRead) {
#ifndef EXTERNAL_RELEASE
DisplayError("AddressError");
if (( STATUS_REGISTER & STATUS_EXL ) != 0 ) {
if (( _Reg->STATUS_REGISTER & STATUS_EXL ) != 0 ) {
DisplayError("EXL set in AddressError Exception");
}
if (( STATUS_REGISTER & STATUS_ERL ) != 0 ) {
if (( _Reg->STATUS_REGISTER & STATUS_ERL ) != 0 ) {
DisplayError("ERL set in AddressError Exception");
}
#endif
if (FromRead) {
CAUSE_REGISTER = EXC_RADE;
_Reg->CAUSE_REGISTER = EXC_RADE;
} else {
CAUSE_REGISTER = EXC_WADE;
_Reg->CAUSE_REGISTER = EXC_WADE;
}
BAD_VADDR_REGISTER = BadVaddr;
_Reg->BAD_VADDR_REGISTER = BadVaddr;
if (DelaySlot) {
CAUSE_REGISTER |= CAUSE_BD;
EPC_REGISTER = (*_PROGRAM_COUNTER) - 4;
_Reg->CAUSE_REGISTER |= CAUSE_BD;
_Reg->EPC_REGISTER = (*_PROGRAM_COUNTER) - 4;
} else {
EPC_REGISTER = (*_PROGRAM_COUNTER);
_Reg->EPC_REGISTER = (*_PROGRAM_COUNTER);
}
STATUS_REGISTER |= STATUS_EXL;
_Reg->STATUS_REGISTER |= STATUS_EXL;
(*_PROGRAM_COUNTER) = 0x80000180;
}
void DoBreakException ( BOOL DelaySlot) {
#ifndef EXTERNAL_RELEASE
if (( STATUS_REGISTER & STATUS_EXL ) != 0 ) {
if (( _Reg->STATUS_REGISTER & STATUS_EXL ) != 0 ) {
DisplayError("EXL set in Break Exception");
}
if (( STATUS_REGISTER & STATUS_ERL ) != 0 ) {
if (( _Reg->STATUS_REGISTER & STATUS_ERL ) != 0 ) {
DisplayError("ERL set in Break Exception");
}
#endif
CAUSE_REGISTER = EXC_BREAK;
_Reg->CAUSE_REGISTER = EXC_BREAK;
if (DelaySlot) {
CAUSE_REGISTER |= CAUSE_BD;
EPC_REGISTER = (*_PROGRAM_COUNTER) - 4;
_Reg->CAUSE_REGISTER |= CAUSE_BD;
_Reg->EPC_REGISTER = (*_PROGRAM_COUNTER) - 4;
} else {
EPC_REGISTER = (*_PROGRAM_COUNTER);
_Reg->EPC_REGISTER = (*_PROGRAM_COUNTER);
}
STATUS_REGISTER |= STATUS_EXL;
_Reg->STATUS_REGISTER |= STATUS_EXL;
(*_PROGRAM_COUNTER) = 0x80000180;
}
void _fastcall DoCopUnusableException ( BOOL DelaySlot, int Coprocessor ) {
#ifndef EXTERNAL_RELEASE
if (( STATUS_REGISTER & STATUS_EXL ) != 0 ) {
if (( _Reg->STATUS_REGISTER & STATUS_EXL ) != 0 ) {
DisplayError("EXL set in Break Exception");
}
if (( STATUS_REGISTER & STATUS_ERL ) != 0 ) {
if (( _Reg->STATUS_REGISTER & STATUS_ERL ) != 0 ) {
DisplayError("ERL set in Break Exception");
}
#endif
CAUSE_REGISTER = EXC_CPU;
if (Coprocessor == 1) { CAUSE_REGISTER |= 0x10000000; }
_Reg->CAUSE_REGISTER = EXC_CPU;
if (Coprocessor == 1) { _Reg->CAUSE_REGISTER |= 0x10000000; }
if (DelaySlot) {
CAUSE_REGISTER |= CAUSE_BD;
EPC_REGISTER = (*_PROGRAM_COUNTER) - 4;
_Reg->CAUSE_REGISTER |= CAUSE_BD;
_Reg->EPC_REGISTER = (*_PROGRAM_COUNTER) - 4;
} else {
EPC_REGISTER = (*_PROGRAM_COUNTER);
_Reg->EPC_REGISTER = (*_PROGRAM_COUNTER);
}
STATUS_REGISTER |= STATUS_EXL;
_Reg->STATUS_REGISTER |= STATUS_EXL;
(*_PROGRAM_COUNTER) = 0x80000180;
}
BOOL DoIntrException ( BOOL DelaySlot ) {
if (( STATUS_REGISTER & STATUS_IE ) == 0 ) { return FALSE; }
if (( STATUS_REGISTER & STATUS_EXL ) != 0 ) { return FALSE; }
if (( STATUS_REGISTER & STATUS_ERL ) != 0 ) { return FALSE; }
if (( _Reg->STATUS_REGISTER & STATUS_IE ) == 0 ) { return FALSE; }
if (( _Reg->STATUS_REGISTER & STATUS_EXL ) != 0 ) { return FALSE; }
if (( _Reg->STATUS_REGISTER & STATUS_ERL ) != 0 ) { return FALSE; }
#if (!defined(EXTERNAL_RELEASE))
if (LogOptions.GenerateLog && LogOptions.LogExceptions && !LogOptions.NoInterrupts) {
LogMessage("%08X: Interupt Generated", (*_PROGRAM_COUNTER) );
}
#endif
CAUSE_REGISTER = FAKE_CAUSE_REGISTER;
CAUSE_REGISTER |= EXC_INT;
_Reg->CAUSE_REGISTER = _Reg->FAKE_CAUSE_REGISTER;
_Reg->CAUSE_REGISTER |= EXC_INT;
if (DelaySlot) {
CAUSE_REGISTER |= CAUSE_BD;
EPC_REGISTER = (*_PROGRAM_COUNTER) - 4;
_Reg->CAUSE_REGISTER |= CAUSE_BD;
_Reg->EPC_REGISTER = (*_PROGRAM_COUNTER) - 4;
} else {
EPC_REGISTER = (*_PROGRAM_COUNTER);
_Reg->EPC_REGISTER = (*_PROGRAM_COUNTER);
}
STATUS_REGISTER |= STATUS_EXL;
_Reg->STATUS_REGISTER |= STATUS_EXL;
(*_PROGRAM_COUNTER) = 0x80000180;
return TRUE;
}
void _fastcall DoTLBMiss ( BOOL DelaySlot, DWORD BadVaddr ) {
CAUSE_REGISTER = EXC_RMISS;
BAD_VADDR_REGISTER = BadVaddr;
CONTEXT_REGISTER &= 0xFF80000F;
CONTEXT_REGISTER |= (BadVaddr >> 9) & 0x007FFFF0;
ENTRYHI_REGISTER = (BadVaddr & 0xFFFFE000);
if ((STATUS_REGISTER & STATUS_EXL) == 0) {
_Reg->CAUSE_REGISTER = EXC_RMISS;
_Reg->BAD_VADDR_REGISTER = BadVaddr;
_Reg->CONTEXT_REGISTER &= 0xFF80000F;
_Reg->CONTEXT_REGISTER |= (BadVaddr >> 9) & 0x007FFFF0;
_Reg->ENTRYHI_REGISTER = (BadVaddr & 0xFFFFE000);
if ((_Reg->STATUS_REGISTER & STATUS_EXL) == 0) {
if (DelaySlot) {
CAUSE_REGISTER |= CAUSE_BD;
EPC_REGISTER = (*_PROGRAM_COUNTER) - 4;
_Reg->CAUSE_REGISTER |= CAUSE_BD;
_Reg->EPC_REGISTER = (*_PROGRAM_COUNTER) - 4;
} else {
EPC_REGISTER = (*_PROGRAM_COUNTER);
_Reg->EPC_REGISTER = (*_PROGRAM_COUNTER);
}
if (_TLB->AddressDefined(BadVaddr))
{
@ -168,7 +168,7 @@ void _fastcall DoTLBMiss ( BOOL DelaySlot, DWORD BadVaddr ) {
} else {
(*_PROGRAM_COUNTER) = 0x80000000;
}
STATUS_REGISTER |= STATUS_EXL;
_Reg->STATUS_REGISTER |= STATUS_EXL;
} else {
_Notify->BreakPoint(__FILE__,__LINE__);
#ifdef tofix
@ -182,21 +182,21 @@ void _fastcall DoTLBMiss ( BOOL DelaySlot, DWORD BadVaddr ) {
void _fastcall DoSysCallException ( BOOL DelaySlot) {
#ifndef EXTERNAL_RELEASE
if (( STATUS_REGISTER & STATUS_EXL ) != 0 ) {
if (( _Reg->STATUS_REGISTER & STATUS_EXL ) != 0 ) {
DisplayError("EXL set in SysCall Exception");
}
if (( STATUS_REGISTER & STATUS_ERL ) != 0 ) {
if (( _Reg->STATUS_REGISTER & STATUS_ERL ) != 0 ) {
DisplayError("ERL set in SysCall Exception");
}
#endif
CAUSE_REGISTER = EXC_SYSCALL;
_Reg->CAUSE_REGISTER = EXC_SYSCALL;
if (DelaySlot) {
CAUSE_REGISTER |= CAUSE_BD;
EPC_REGISTER = (*_PROGRAM_COUNTER) - 4;
_Reg->CAUSE_REGISTER |= CAUSE_BD;
_Reg->EPC_REGISTER = (*_PROGRAM_COUNTER) - 4;
} else {
EPC_REGISTER = (*_PROGRAM_COUNTER);
_Reg->EPC_REGISTER = (*_PROGRAM_COUNTER);
}
STATUS_REGISTER |= STATUS_EXL;
_Reg->STATUS_REGISTER |= STATUS_EXL;
(*_PROGRAM_COUNTER) = 0x80000180;
}

22
Source/Project64/N64 System/C Core/Interpreter CPU.cpp
View File

@ -44,13 +44,21 @@ BOOL ExecuteInterpreterOpCode (void)
return FALSE;
}
COUNT_REGISTER += CountPerOp;
*_Timer -= CountPerOp;
/*if (*_PROGRAM_COUNTER > 0x80310000 && *_PROGRAM_COUNTER < 0x80380000)
{
WriteTraceF((TraceType)(TraceError | TraceNoHeader),"%X: %s",*_PROGRAM_COUNTER,R4300iOpcodeName(Opcode.Hex,*_PROGRAM_COUNTER));
WriteTraceF((TraceType)(TraceError | TraceNoHeader),"%X: %d %d",*_PROGRAM_COUNTER,*_NextTimer,_SystemTimer->CurrentType());
}*/
RANDOM_REGISTER -= 1;
if ((int)RANDOM_REGISTER < (int)WIRED_REGISTER) {
RANDOM_REGISTER = 31;
*_NextTimer -= CountPerOp;
#ifdef toremove
_Reg->COUNT_REGISTER += CountPerOp;
_Reg->RANDOM_REGISTER -= 1;
if ((int)_Reg->RANDOM_REGISTER < (int)_Reg->WIRED_REGISTER) {
_Reg->RANDOM_REGISTER = 31;
}
#endif
((void (_fastcall *)()) R4300i_Opcode[ Opcode.op ])();
@ -82,9 +90,9 @@ BOOL ExecuteInterpreterOpCode (void)
if (CheckTimer)
{
TestTimer = FALSE;
if (*_Timer < 0)
if (*_NextTimer < 0)
{
TimerDone();
_SystemTimer->TimerDone();
}
if (CPU_Action.DoSomething) { DoSomething(); }
}

32
Source/Project64/N64 System/C Core/Interpreter Ops 32.cpp
View File

@ -28,7 +28,7 @@ R4300iOp_FUNC R4300iOp32::Jump_CoP1_L[64];
//#define TEST_COP1_USABLE_EXCEPTION
#define TEST_COP1_USABLE_EXCEPTION \
if ((STATUS_REGISTER & STATUS_CU1) == 0) {\
if ((_Reg->STATUS_REGISTER & STATUS_CU1) == 0) {\
DoCopUnusableException(NextInstruction == JUMP,1);\
NextInstruction = JUMP;\
JumpToLocation = (*_PROGRAM_COUNTER);\
@ -1350,7 +1350,7 @@ void _fastcall R4300iOp32::COP0_MF (void) {
#if (!defined(EXTERNAL_RELEASE))
if (LogOptions.LogCP0reads) {
LogMessage("%08X: R4300i Read from %s (0x%08X)", (*_PROGRAM_COUNTER),
Cop0_Name[Opcode.rd], _CP0[Opcode.rd]);
CRegName::Cop0[Opcode.rd], _CP0[Opcode.rd]);
}
#endif
_GPR[Opcode.rt].W[0] = (int)_CP0[Opcode.rd];
@ -1360,10 +1360,10 @@ void _fastcall R4300iOp32::COP0_MT (void) {
#if (!defined(EXTERNAL_RELEASE))
if (LogOptions.LogCP0changes) {
LogMessage("%08X: Writing 0x%X to %s register (Originally: 0x%08X)",(*_PROGRAM_COUNTER),
_GPR[Opcode.rt].UW[0],Cop0_Name[Opcode.rd], _CP0[Opcode.rd]);
_GPR[Opcode.rt].UW[0],CRegName::Cop0[Opcode.rd], _CP0[Opcode.rd]);
if (Opcode.rd == 11) { //Compare
LogMessage("%08X: Cause register changed from %08X to %08X",(*_PROGRAM_COUNTER),
CAUSE_REGISTER, (CAUSE_REGISTER & ~CAUSE_IP7));
_Reg->CAUSE_REGISTER, (_Reg->CAUSE_REGISTER & ~CAUSE_IP7));
}
}
#endif
@ -1387,13 +1387,15 @@ void _fastcall R4300iOp32::COP0_MT (void) {
_CP0[Opcode.rd] = _GPR[Opcode.rt].UW[0] & 0xFF800000;
break;
case 9: //Count
_CP0[Opcode.rd]= _GPR[Opcode.rt].UW[0];
ChangeCompareTimer();
_SystemTimer->UpdateTimers();
_CP0[Opcode.rd] = _GPR[Opcode.rt].UW[0];
_SystemTimer->UpdateCompareTimer();
break;
case 11: //Compare
_SystemTimer->UpdateTimers();
_CP0[Opcode.rd] = _GPR[Opcode.rt].UW[0];
FAKE_CAUSE_REGISTER &= ~CAUSE_IP7;
ChangeCompareTimer();
_Reg->FAKE_CAUSE_REGISTER &= ~CAUSE_IP7;
_SystemTimer->UpdateCompareTimer();
break;
case 12: //Status
if ((_CP0[Opcode.rd] ^ _GPR[Opcode.rt].UW[0]) != 0) {
@ -1428,12 +1430,12 @@ void _fastcall R4300iOp32::COP0_CO_TLBR (void) {
void _fastcall R4300iOp32::COP0_CO_TLBWI (void) {
if (!UseTlb) { return; }
TLB_WriteEntry(INDEX_REGISTER & 0x1F,FALSE);
TLB_WriteEntry(_Reg->INDEX_REGISTER & 0x1F,FALSE);
}
void _fastcall R4300iOp32::COP0_CO_TLBWR (void) {
if (!UseTlb) { return; }
TLB_WriteEntry(RANDOM_REGISTER & 0x1F,TRUE);
TLB_WriteEntry(_Reg->RANDOM_REGISTER & 0x1F,TRUE);
}
void _fastcall R4300iOp32::COP0_CO_TLBP (void) {
@ -1443,12 +1445,12 @@ void _fastcall R4300iOp32::COP0_CO_TLBP (void) {
void _fastcall R4300iOp32::COP0_CO_ERET (void) {
NextInstruction = JUMP;
if ((STATUS_REGISTER & STATUS_ERL) != 0) {
JumpToLocation = ERROREPC_REGISTER;
STATUS_REGISTER &= ~STATUS_ERL;
if ((_Reg->STATUS_REGISTER & STATUS_ERL) != 0) {
JumpToLocation = _Reg->ERROREPC_REGISTER;
_Reg->STATUS_REGISTER &= ~STATUS_ERL;
} else {
JumpToLocation = EPC_REGISTER;
STATUS_REGISTER &= ~STATUS_EXL;
JumpToLocation = _Reg->EPC_REGISTER;
_Reg->STATUS_REGISTER &= ~STATUS_EXL;
}
(*_LLBit) = 0;
CheckInterrupts();

32
Source/Project64/N64 System/C Core/Interpreter Ops.cpp
View File

@ -54,7 +54,7 @@ int RoundingModel = _RC_NEAR;
//#define TEST_COP1_USABLE_EXCEPTION
#define TEST_COP1_USABLE_EXCEPTION \
if ((STATUS_REGISTER & STATUS_CU1) == 0) {\
if ((_Reg->STATUS_REGISTER & STATUS_CU1) == 0) {\
DoCopUnusableException(NextInstruction == JUMP,1);\
NextInstruction = JUMP;\
JumpToLocation = (*_PROGRAM_COUNTER);\
@ -1692,7 +1692,7 @@ void _fastcall R4300iOp::COP0_MF (void) {
#if (!defined(EXTERNAL_RELEASE))
if (LogOptions.LogCP0reads) {
LogMessage("%08X: R4300i Read from %s (0x%08X)", (*_PROGRAM_COUNTER),
Cop0_Name[Opcode.rd], _CP0[Opcode.rd]);
CRegName::Cop0[Opcode.rd], _CP0[Opcode.rd]);
}
#endif
_GPR[Opcode.rt].DW = (int)_CP0[Opcode.rd];
@ -1702,10 +1702,10 @@ void _fastcall R4300iOp::COP0_MT (void) {
#if (!defined(EXTERNAL_RELEASE))
if (LogOptions.LogCP0changes) {
LogMessage("%08X: Writing 0x%X to %s register (Originally: 0x%08X)",(*_PROGRAM_COUNTER),
_GPR[Opcode.rt].UW[0],Cop0_Name[Opcode.rd], _CP0[Opcode.rd]);
_GPR[Opcode.rt].UW[0],CRegName::Cop0[Opcode.rd], _CP0[Opcode.rd]);
if (Opcode.rd == 11) { //Compare
LogMessage("%08X: Cause register changed from %08X to %08X",(*_PROGRAM_COUNTER),
CAUSE_REGISTER, (CAUSE_REGISTER & ~CAUSE_IP7));
_Reg->CAUSE_REGISTER, (_Reg->CAUSE_REGISTER & ~CAUSE_IP7));
}
}
#endif
@ -1729,13 +1729,15 @@ void _fastcall R4300iOp::COP0_MT (void) {
_CP0[Opcode.rd] = _GPR[Opcode.rt].UW[0] & 0xFF800000;
break;
case 9: //Count
_CP0[Opcode.rd]= _GPR[Opcode.rt].UW[0];
ChangeCompareTimer();
_SystemTimer->UpdateTimers();
_CP0[Opcode.rd] = _GPR[Opcode.rt].UW[0];
_SystemTimer->UpdateCompareTimer();
break;
case 11: //Compare
_SystemTimer->UpdateTimers();
_CP0[Opcode.rd] = _GPR[Opcode.rt].UW[0];
FAKE_CAUSE_REGISTER &= ~CAUSE_IP7;
ChangeCompareTimer();
_Reg->FAKE_CAUSE_REGISTER &= ~CAUSE_IP7;
_SystemTimer->UpdateCompareTimer();
break;
case 12: //Status
if ((_CP0[Opcode.rd] ^ _GPR[Opcode.rt].UW[0]) != 0) {
@ -1770,12 +1772,12 @@ void _fastcall R4300iOp::COP0_CO_TLBR (void) {
void _fastcall R4300iOp::COP0_CO_TLBWI (void) {
if (!UseTlb) { return; }
TLB_WriteEntry(INDEX_REGISTER & 0x1F,FALSE);
TLB_WriteEntry(_Reg->INDEX_REGISTER & 0x1F,FALSE);
}
void _fastcall R4300iOp::COP0_CO_TLBWR (void) {
if (!UseTlb) { return; }
TLB_WriteEntry(RANDOM_REGISTER & 0x1F,TRUE);
TLB_WriteEntry(_Reg->RANDOM_REGISTER & 0x1F,TRUE);
}
void _fastcall R4300iOp::COP0_CO_TLBP (void) {
@ -1785,12 +1787,12 @@ void _fastcall R4300iOp::COP0_CO_TLBP (void) {
void _fastcall R4300iOp::COP0_CO_ERET (void) {
NextInstruction = JUMP;
if ((STATUS_REGISTER & STATUS_ERL) != 0) {
JumpToLocation = ERROREPC_REGISTER;
STATUS_REGISTER &= ~STATUS_ERL;
if ((_Reg->STATUS_REGISTER & STATUS_ERL) != 0) {
JumpToLocation = _Reg->ERROREPC_REGISTER;
_Reg->STATUS_REGISTER &= ~STATUS_ERL;
} else {
JumpToLocation = EPC_REGISTER;
STATUS_REGISTER &= ~STATUS_EXL;
JumpToLocation = _Reg->EPC_REGISTER;
_Reg->STATUS_REGISTER &= ~STATUS_EXL;
}
(*_LLBit) = 0;
CheckInterrupts();

4
Source/Project64/N64 System/C Core/Pif.cpp
View File

@ -253,8 +253,8 @@ void PifRamWrite (void) {
switch (PIF_Ram[0x3F]) {
case 0x08:
PIF_Ram[0x3F] = 0;
MI_INTR_REG |= MI_INTR_SI;
SI_STATUS_REG |= SI_STATUS_INTERRUPT;
_Reg->MI_INTR_REG |= MI_INTR_SI;
_Reg->SI_STATUS_REG |= SI_STATUS_INTERRUPT;
CheckInterrupts();
break;
case 0x10:

16
Source/Project64/N64 System/C Core/Recompiler Fpu Ops.cpp
View File

@ -46,7 +46,7 @@ void ChangeDefaultRoundingModel (void) {
void CompileCop1Test (CBlockSection * Section) {
if (Section->FpuBeenUsed()) { return; }
TestVariable(STATUS_CU1,&STATUS_REGISTER,"STATUS_REGISTER");
TestVariable(STATUS_CU1,&_Reg->STATUS_REGISTER,"STATUS_REGISTER");
_N64System->GetRecompiler()->CompileExit(Section,Section->CompilePC,Section->CompilePC,Section->RegWorking,CExitInfo::COP1_Unuseable,FALSE,JeLabel32);
Section->FpuBeenUsed() = TRUE;
}
@ -401,7 +401,7 @@ void Compile_R4300i_COP1_CF(CBlockSection * Section) {
if (Opcode.fs != 31 && Opcode.fs != 0) { Compile_R4300i_UnknownOpcode (Section); return; }
Map_GPR_32bit(Section,Opcode.rt,TRUE,-1);
MoveVariableToX86reg(&_FPCR[Opcode.fs],FPR_Ctrl_Name[Opcode.fs],Section->MipsRegLo(Opcode.rt));
MoveVariableToX86reg(&_FPCR[Opcode.fs],CRegName::FPR_Ctrl[Opcode.fs],Section->MipsRegLo(Opcode.rt));
}
void Compile_R4300i_COP1_MT( CBlockSection * Section) {
@ -477,11 +477,11 @@ void Compile_R4300i_COP1_CT(CBlockSection * Section) {
if (Opcode.fs != 31) { Compile_R4300i_UnknownOpcode (Section); return; }
if (Section->IsConst(Opcode.rt)) {
MoveConstToVariable(Section->MipsRegLo(Opcode.rt),&_FPCR[Opcode.fs],FPR_Ctrl_Name[Opcode.fs]);
MoveConstToVariable(Section->MipsRegLo(Opcode.rt),&_FPCR[Opcode.fs],CRegName::FPR_Ctrl[Opcode.fs]);
} else if (Section->IsMapped(Opcode.rt)) {
MoveX86regToVariable(Section->MipsRegLo(Opcode.rt),&_FPCR[Opcode.fs],FPR_Ctrl_Name[Opcode.fs]);
MoveX86regToVariable(Section->MipsRegLo(Opcode.rt),&_FPCR[Opcode.fs],CRegName::FPR_Ctrl[Opcode.fs]);
} else {
MoveX86regToVariable(Map_TempReg(Section,x86_Any,Opcode.rt,FALSE),&_FPCR[Opcode.fs],FPR_Ctrl_Name[Opcode.fs]);
MoveX86regToVariable(Map_TempReg(Section,x86_Any,Opcode.rt,FALSE),&_FPCR[Opcode.fs],CRegName::FPR_Ctrl[Opcode.fs]);
}
Pushad();
Call_Direct(ChangeDefaultRoundingModel, "ChangeDefaultRoundingModel");
@ -773,7 +773,10 @@ void Compile_R4300i_COP1_S_CMP (CBlockSection * Section) {
MoveVariableToX86reg((BYTE *)&_FPRFloatLocation[Reg2],Name,TempReg);
fpuComDwordRegPointer(TempReg,FALSE);
}
_Notify->BreakPoint(__FILE__,__LINE__);
#ifdef tofix
AndConstToVariable(~FPCSR_C, &FSTATUS_REGISTER, "FSTATUS_REGISTER");
#endif
fpuStoreStatus();
x86reg = Map_TempReg(Section,x86_Any8Bit, 0, FALSE);
TestConstToX86Reg(cmp,x86_EAX);
@ -1090,7 +1093,10 @@ void Compile_R4300i_COP1_D_CMP (CBlockSection * Section) {
Load_FPR_ToTop(Section,Reg1,Reg1, CRegInfo::FPU_Double);
fpuComQwordRegPointer(TempReg,FALSE);
}
_Notify->BreakPoint(__FILE__,__LINE__);
#ifdef tofix
AndConstToVariable(~FPCSR_C, &FSTATUS_REGISTER, "FSTATUS_REGISTER");
#endif
fpuStoreStatus();
x86reg = Map_TempReg(Section,x86_Any8Bit, 0, FALSE);
TestConstToX86Reg(cmp,x86_EAX);

224
Source/Project64/N64 System/C Core/Recompiler Ops.cpp
View File

@ -462,20 +462,20 @@ void BNE_Compare (CBlockSection * Section) {
if (Section->IsConst(KnownReg)) {
if (Section->Is64Bit(KnownReg)) {
CompConstToVariable(Section->MipsRegHi(KnownReg),&_GPR[UnknownReg].W[1],GPR_NameHi[UnknownReg]);
CompConstToVariable(Section->MipsRegHi(KnownReg),&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg]);
} else if (Section->IsSigned(KnownReg)) {
CompConstToVariable(((int)Section->MipsRegLo(KnownReg) >> 31),&_GPR[UnknownReg].W[1],GPR_NameHi[UnknownReg]);
CompConstToVariable(((int)Section->MipsRegLo(KnownReg) >> 31),&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg]);
} else {
CompConstToVariable(0,&_GPR[UnknownReg].W[1],GPR_NameHi[UnknownReg]);
CompConstToVariable(0,&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg]);
}
} else {
if (Section->Is64Bit(KnownReg)) {
CompX86regToVariable(Section->MipsRegHi(KnownReg),&_GPR[UnknownReg].W[1],GPR_NameHi[UnknownReg]);
CompX86regToVariable(Section->MipsRegHi(KnownReg),&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg]);
} else if (Section->IsSigned(KnownReg)) {
ProtectGPR(Section,KnownReg);
CompX86regToVariable(Map_TempReg(Section,x86_Any,KnownReg,TRUE),&_GPR[UnknownReg].W[1],GPR_NameHi[UnknownReg]);
CompX86regToVariable(Map_TempReg(Section,x86_Any,KnownReg,TRUE),&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg]);
} else {
CompConstToVariable(0,&_GPR[UnknownReg].W[1],GPR_NameHi[UnknownReg]);
CompConstToVariable(0,&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg]);
}
}
if (Section->Jump.FallThrough) {
@ -486,9 +486,9 @@ void BNE_Compare (CBlockSection * Section) {
Section->Jump.LinkLocation = RecompPos - 4;
}
if (Section->IsConst(KnownReg)) {
CompConstToVariable(Section->MipsRegLo(KnownReg),&_GPR[UnknownReg].W[0],GPR_NameLo[UnknownReg]);
CompConstToVariable(Section->MipsRegLo(KnownReg),&_GPR[UnknownReg].W[0],CRegName::GPR_Lo[UnknownReg]);
} else {
CompX86regToVariable(Section->MipsRegLo(KnownReg),&_GPR[UnknownReg].W[0],GPR_NameLo[UnknownReg]);
CompX86regToVariable(Section->MipsRegLo(KnownReg),&_GPR[UnknownReg].W[0],CRegName::GPR_Lo[UnknownReg]);
}
if (Section->Cont.FallThrough) {
JneLabel32 ( Section->Jump.BranchLabel, 0 );
@ -509,7 +509,7 @@ void BNE_Compare (CBlockSection * Section) {
int x86Reg;
x86Reg = Map_TempReg(Section,x86_Any,Opcode.rt,TRUE);
CompX86regToVariable(x86Reg,&_GPR[Opcode.rs].W[1],GPR_NameHi[Opcode.rs]);
CompX86regToVariable(x86Reg,&_GPR[Opcode.rs].W[1],CRegName::GPR_Hi[Opcode.rs]);
if (Section->Jump.FallThrough) {
JneLabel8("continue",0);
Jump = RecompPos - 1;
@ -519,7 +519,7 @@ void BNE_Compare (CBlockSection * Section) {
}
x86Reg = Map_TempReg(Section,x86Reg,Opcode.rt,FALSE);
CompX86regToVariable(x86Reg,&_GPR[Opcode.rs].W[0],GPR_NameLo[Opcode.rs]);
CompX86regToVariable(x86Reg,&_GPR[Opcode.rs].W[0],CRegName::GPR_Lo[Opcode.rs]);
if (Section->Cont.FallThrough) {
JneLabel32 ( Section->Jump.BranchLabel, 0 );
Section->Jump.LinkLocation2 = RecompPos - 4;
@ -667,20 +667,20 @@ void BEQ_Compare (CBlockSection * Section) {
if (Section->IsConst(KnownReg)) {
if (Section->Is64Bit(KnownReg)) {
CompConstToVariable(Section->MipsRegHi(KnownReg),&_GPR[UnknownReg].W[1],GPR_NameHi[UnknownReg]);
CompConstToVariable(Section->MipsRegHi(KnownReg),&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg]);
} else if (Section->IsSigned(KnownReg)) {
CompConstToVariable((int)Section->MipsRegLo(KnownReg) >> 31,&_GPR[UnknownReg].W[1],GPR_NameHi[UnknownReg]);
CompConstToVariable((int)Section->MipsRegLo(KnownReg) >> 31,&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg]);
} else {
CompConstToVariable(0,&_GPR[UnknownReg].W[1],GPR_NameHi[UnknownReg]);
CompConstToVariable(0,&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg]);
}
} else {
ProtectGPR(Section,KnownReg);
if (Section->Is64Bit(KnownReg)) {
CompX86regToVariable(Section->MipsRegHi(KnownReg),&_GPR[UnknownReg].W[1],GPR_NameHi[UnknownReg]);
CompX86regToVariable(Section->MipsRegHi(KnownReg),&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg]);
} else if (Section->IsSigned(KnownReg)) {
CompX86regToVariable(Map_TempReg(Section,x86_Any,KnownReg,TRUE),&_GPR[UnknownReg].W[1],GPR_NameHi[UnknownReg]);
CompX86regToVariable(Map_TempReg(Section,x86_Any,KnownReg,TRUE),&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg]);
} else {
CompConstToVariable(0,&_GPR[UnknownReg].W[1],GPR_NameHi[UnknownReg]);
CompConstToVariable(0,&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg]);
}
}
if (Section->Cont.FallThrough) {
@ -691,9 +691,9 @@ void BEQ_Compare (CBlockSection * Section) {
Section->Cont.LinkLocation = RecompPos - 4;
}
if (Section->IsConst(KnownReg)) {
CompConstToVariable(Section->MipsRegLo(KnownReg),&_GPR[UnknownReg].W[0],GPR_NameLo[UnknownReg]);
CompConstToVariable(Section->MipsRegLo(KnownReg),&_GPR[UnknownReg].W[0],CRegName::GPR_Lo[UnknownReg]);
} else {
CompX86regToVariable(Section->MipsRegLo(KnownReg),&_GPR[UnknownReg].W[0],GPR_NameLo[UnknownReg]);
CompX86regToVariable(Section->MipsRegLo(KnownReg),&_GPR[UnknownReg].W[0],CRegName::GPR_Lo[UnknownReg]);
}
if (Section->Cont.FallThrough) {
JeLabel32 ( Section->Jump.BranchLabel, 0 );
@ -712,7 +712,7 @@ void BEQ_Compare (CBlockSection * Section) {
}
} else {
int x86Reg = Map_TempReg(Section,x86_Any,Opcode.rs,TRUE);
CompX86regToVariable(x86Reg,&_GPR[Opcode.rt].W[1],GPR_NameHi[Opcode.rt]);
CompX86regToVariable(x86Reg,&_GPR[Opcode.rt].W[1],CRegName::GPR_Hi[Opcode.rt]);
if (Section->Cont.FallThrough) {
JneLabel8("continue",0);
Jump = RecompPos - 1;
@ -720,7 +720,7 @@ void BEQ_Compare (CBlockSection * Section) {
JneLabel32(Section->Cont.BranchLabel,0);
Section->Cont.LinkLocation = RecompPos - 4;
}
CompX86regToVariable(Map_TempReg(Section,x86Reg,Opcode.rs,FALSE),&_GPR[Opcode.rt].W[0],GPR_NameLo[Opcode.rt]);
CompX86regToVariable(Map_TempReg(Section,x86Reg,Opcode.rs,FALSE),&_GPR[Opcode.rt].W[0],CRegName::GPR_Lo[Opcode.rt]);
if (Section->Cont.FallThrough) {
JeLabel32 ( Section->Jump.BranchLabel, 0 );
Section->Jump.LinkLocation = RecompPos - 4;
@ -778,7 +778,7 @@ void BGTZ_Compare (CBlockSection * Section) {
if (Section->IsMapped(Opcode.rs)) {
CompConstToX86reg(Section->MipsRegHi(Opcode.rs),0);
} else {
CompConstToVariable(0,&_GPR[Opcode.rs].W[1],GPR_NameHi[Opcode.rs]);
CompConstToVariable(0,&_GPR[Opcode.rs].W[1],CRegName::GPR_Hi[Opcode.rs]);
}
if (Section->Jump.FallThrough) {
JlLabel32 (Section->Cont.BranchLabel, 0 );
@ -800,7 +800,7 @@ void BGTZ_Compare (CBlockSection * Section) {
if (Section->IsMapped(Opcode.rs)) {
CompConstToX86reg(Section->MipsRegLo(Opcode.rs),0);
} else {
CompConstToVariable(0,&_GPR[Opcode.rs].W[0],GPR_NameLo[Opcode.rs]);
CompConstToVariable(0,&_GPR[Opcode.rs].W[0],CRegName::GPR_Lo[Opcode.rs]);
}
if (Section->Jump.FallThrough) {
JeLabel32 (Section->Cont.BranchLabel, 0 );
@ -869,7 +869,7 @@ void BLEZ_Compare (CBlockSection * Section) {
if (Section->IsMapped(Opcode.rs)) {
CompConstToX86reg(Section->MipsRegHi(Opcode.rs),0);
} else {
CompConstToVariable(0,&_GPR[Opcode.rs].W[1],GPR_NameHi[Opcode.rs]);
CompConstToVariable(0,&_GPR[Opcode.rs].W[1],CRegName::GPR_Hi[Opcode.rs]);
}
if (Section->Jump.FallThrough) {
JgLabel32 (Section->Cont.BranchLabel, 0 );
@ -891,7 +891,7 @@ void BLEZ_Compare (CBlockSection * Section) {
if (Section->IsMapped(Opcode.rs)) {
CompConstToX86reg(Section->MipsRegLo(Opcode.rs),0);
} else {
CompConstToVariable(0,&_GPR[Opcode.rs].W[0],GPR_NameLo[Opcode.rs]);
CompConstToVariable(0,&_GPR[Opcode.rs].W[0],CRegName::GPR_Lo[Opcode.rs]);
}
if (Section->Jump.FallThrough) {
JneLabel32 (Section->Cont.BranchLabel, 0 );
@ -969,7 +969,7 @@ void BLTZ_Compare (CBlockSection * Section) {
Section->Cont.FallThrough = TRUE;
}
} else if (Section->IsUnknown(Opcode.rs)) {
CompConstToVariable(0,&_GPR[Opcode.rs].W[1],GPR_NameHi[Opcode.rs]);
CompConstToVariable(0,&_GPR[Opcode.rs].W[1],CRegName::GPR_Hi[Opcode.rs]);
if (Section->Jump.FallThrough) {
JgeLabel32 (Section->Cont.BranchLabel, 0 );
Section->Cont.LinkLocation = RecompPos - 4;
@ -1038,7 +1038,7 @@ void BGEZ_Compare (CBlockSection * Section) {
Section->Cont.FallThrough = FALSE;
}
} else {
CompConstToVariable(0,&_GPR[Opcode.rs].W[1],GPR_NameHi[Opcode.rs]);
CompConstToVariable(0,&_GPR[Opcode.rs].W[1],CRegName::GPR_Hi[Opcode.rs]);
if (Section->Cont.FallThrough) {
JgeLabel32 ( Section->Jump.BranchLabel, 0 );
Section->Jump.LinkLocation = RecompPos - 4;
@ -1293,10 +1293,10 @@ void Compile_R4300i_SLTIU (CBlockSection * Section) {
} else {
BYTE * Jump;
CompConstToVariable(((short)Opcode.immediate >> 31),&_GPR[Opcode.rs].W[1],GPR_NameHi[Opcode.rs]);
CompConstToVariable(((short)Opcode.immediate >> 31),&_GPR[Opcode.rs].W[1],CRegName::GPR_Hi[Opcode.rs]);
JneLabel8("CompareSet",0);
Jump = RecompPos - 1;
CompConstToVariable((short)Opcode.immediate,&_GPR[Opcode.rs].W[0],GPR_NameLo[Opcode.rs]);
CompConstToVariable((short)Opcode.immediate,&_GPR[Opcode.rs].W[0],CRegName::GPR_Lo[Opcode.rs]);
CPU_Message("");
CPU_Message(" CompareSet:");
*((BYTE *)(Jump))=(BYTE)(RecompPos - Jump - 1);
@ -1311,7 +1311,7 @@ void Compile_R4300i_SLTIU (CBlockSection * Section) {
CPU_Message("");
CPU_Message(" Low Compare:");
*((BYTE *)(Jump[0]))=(BYTE)(RecompPos - Jump[0] - 1);
CompConstToVariable((short)Opcode.immediate,&_GPR[Opcode.rs].W[0],GPR_NameLo[Opcode.rs]);
CompConstToVariable((short)Opcode.immediate,&_GPR[Opcode.rs].W[0],CRegName::GPR_Lo[Opcode.rs]);
SetbVariable(&BranchCompare,"BranchCompare");
CPU_Message("");
CPU_Message(" Continue:");
@ -1378,7 +1378,7 @@ void Compile_R4300i_SLTI (CBlockSection * Section) {
} else {
BYTE * Jump[2];
CompConstToVariable(((short)Opcode.immediate >> 31),&_GPR[Opcode.rs].W[1],GPR_NameHi[Opcode.rs]);
CompConstToVariable(((short)Opcode.immediate >> 31),&_GPR[Opcode.rs].W[1],CRegName::GPR_Hi[Opcode.rs]);
JeLabel8("Low Compare",0);
Jump[0] = RecompPos - 1;
SetlVariable(&BranchCompare,"BranchCompare");
@ -1387,7 +1387,7 @@ void Compile_R4300i_SLTI (CBlockSection * Section) {
CPU_Message("");
CPU_Message(" Low Compare:");
*((BYTE *)(Jump[0]))=(BYTE)(RecompPos - Jump[0] - 1);
CompConstToVariable((short)Opcode.immediate,&_GPR[Opcode.rs].W[0],GPR_NameLo[Opcode.rs]);
CompConstToVariable((short)Opcode.immediate,&_GPR[Opcode.rs].W[0],CRegName::GPR_Lo[Opcode.rs]);
SetbVariable(&BranchCompare,"BranchCompare");
CPU_Message("");
CPU_Message(" Continue:");
@ -2197,7 +2197,7 @@ void Compile_R4300i_SWL (CBlockSection * Section) {
} else if (Section->IsMapped(Opcode.rt)) {
MoveX86RegToX86Reg(Section->MipsRegLo(Opcode.rt),Offset);
} else {
MoveVariableToX86reg(&_GPR[Opcode.rt].UW[0],GPR_NameLo[Opcode.rt],Offset);
MoveVariableToX86reg(&_GPR[Opcode.rt].UW[0],CRegName::GPR_Lo[Opcode.rt],Offset);
}
ShiftRightUnsign(Offset);
AddX86RegToX86Reg(Value,Offset);
@ -2367,7 +2367,7 @@ void Compile_R4300i_SWR (CBlockSection * Section) {
} else if (Section->IsMapped(Opcode.rt)) {
MoveX86RegToX86Reg(Section->MipsRegLo(Opcode.rt),Offset);
} else {
MoveVariableToX86reg(&_GPR[Opcode.rt].UW[0],GPR_NameLo[Opcode.rt],Offset);
MoveVariableToX86reg(&_GPR[Opcode.rt].UW[0],CRegName::GPR_Lo[Opcode.rt],Offset);
}
ShiftLeftSign(Offset);
AddX86RegToX86Reg(Value,Offset);
@ -2427,7 +2427,7 @@ void Compile_R4300i_CACHE (CBlockSection * Section){
AddConstToX86Reg(Section->MipsRegLo(Opcode.base),(short)Opcode.offset);
Push(Section->MipsRegLo(Opcode.base));
} else {
MoveVariableToX86reg(&_GPR[Opcode.base].UW[0],GPR_NameLo[Opcode.base],x86_EAX);
MoveVariableToX86reg(&_GPR[Opcode.base].UW[0],CRegName::GPR_Lo[Opcode.base],x86_EAX);
AddConstToX86Reg(x86_EAX,(short)Opcode.offset);
Push(x86_EAX);
}
@ -3309,7 +3309,7 @@ void Compile_R4300i_SPECIAL_DIV (CBlockSection * Section) {
if (Section->IsMapped(Opcode.rt)) {
CompConstToX86reg(Section->MipsRegLo(Opcode.rt),0);
} else {
CompConstToVariable(0, &_GPR[Opcode.rt].W[0], GPR_NameLo[Opcode.rt]);
CompConstToVariable(0, &_GPR[Opcode.rt].W[0], CRegName::GPR_Lo[Opcode.rt]);
}
JneLabel8("NoExcept", 0);
Jump[0] = RecompPos - 1;
@ -3379,7 +3379,7 @@ void Compile_R4300i_SPECIAL_DIVU ( CBlockSection * Section) {
if (Section->IsMapped(Opcode.rt)) {
CompConstToX86reg(Section->MipsRegLo(Opcode.rt),0);
} else {
CompConstToVariable(0, &_GPR[Opcode.rt].W[0], GPR_NameLo[Opcode.rt]);
CompConstToVariable(0, &_GPR[Opcode.rt].W[0], CRegName::GPR_Lo[Opcode.rt]);
}
JneLabel8("NoExcept", 0);
Jump[0] = RecompPos - 1;
@ -3552,7 +3552,7 @@ void Compile_R4300i_SPECIAL_ADD (CBlockSection * Section) {
} else if (Section->IsKnown(source2) && Section->IsMapped(source2)) {
AddX86RegToX86Reg(Section->MipsRegLo(Opcode.rd),Section->MipsRegLo(source2));
} else {
AddVariableToX86reg(Section->MipsRegLo(Opcode.rd),&_GPR[source2].W[0],GPR_NameLo[source2]);
AddVariableToX86reg(Section->MipsRegLo(Opcode.rd),&_GPR[source2].W[0],CRegName::GPR_Lo[source2]);
}
}
@ -3579,7 +3579,7 @@ void Compile_R4300i_SPECIAL_ADDU (CBlockSection * Section) {
} else if (Section->IsKnown(source2) && Section->IsMapped(source2)) {
AddX86RegToX86Reg(Section->MipsRegLo(Opcode.rd),Section->MipsRegLo(source2));
} else {
AddVariableToX86reg(Section->MipsRegLo(Opcode.rd),&_GPR[source2].W[0],GPR_NameLo[source2]);
AddVariableToX86reg(Section->MipsRegLo(Opcode.rd),&_GPR[source2].W[0],CRegName::GPR_Lo[source2]);
}
}
@ -3605,7 +3605,7 @@ void Compile_R4300i_SPECIAL_SUB (CBlockSection * Section) {
} else if (Section->IsMapped(Opcode.rt)) {
SubX86RegToX86Reg(Section->MipsRegLo(Opcode.rd),Section->MipsRegLo(Opcode.rt));
} else {
SubVariableFromX86reg(Section->MipsRegLo(Opcode.rd),&_GPR[Opcode.rt].W[0],GPR_NameLo[Opcode.rt]);
SubVariableFromX86reg(Section->MipsRegLo(Opcode.rd),&_GPR[Opcode.rt].W[0],CRegName::GPR_Lo[Opcode.rt]);
}
}
}
@ -3632,7 +3632,7 @@ void Compile_R4300i_SPECIAL_SUBU (CBlockSection * Section) {
} else if (Section->IsMapped(Opcode.rt)) {
SubX86RegToX86Reg(Section->MipsRegLo(Opcode.rd),Section->MipsRegLo(Opcode.rt));
} else {
SubVariableFromX86reg(Section->MipsRegLo(Opcode.rd),&_GPR[Opcode.rt].W[0],GPR_NameLo[Opcode.rt]);
SubVariableFromX86reg(Section->MipsRegLo(Opcode.rd),&_GPR[Opcode.rt].W[0],CRegName::GPR_Lo[Opcode.rt]);
}
}
}
@ -3744,11 +3744,11 @@ void Compile_R4300i_SPECIAL_AND (CBlockSection * Section) {
if (KnownReg == Opcode.rd) {
if (Section->Is64Bit(KnownReg)) {
Map_GPR_64bit(Section,Opcode.rd,KnownReg);
AndVariableToX86Reg(&_GPR[UnknownReg].W[1],GPR_NameHi[UnknownReg],Section->MipsRegHi(Opcode.rd));
AndVariableToX86Reg(&_GPR[UnknownReg].W[0],GPR_NameLo[UnknownReg],Section->MipsRegLo(Opcode.rd));
AndVariableToX86Reg(&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg],Section->MipsRegHi(Opcode.rd));
AndVariableToX86Reg(&_GPR[UnknownReg].W[0],CRegName::GPR_Lo[UnknownReg],Section->MipsRegLo(Opcode.rd));
} else {
Map_GPR_32bit(Section,Opcode.rd,Section->IsSigned(KnownReg),KnownReg);
AndVariableToX86Reg(&_GPR[UnknownReg].W[0],GPR_NameLo[UnknownReg],Section->MipsRegLo(Opcode.rd));
AndVariableToX86Reg(&_GPR[UnknownReg].W[0],CRegName::GPR_Lo[UnknownReg],Section->MipsRegLo(Opcode.rd));
}
} else {
if (Section->Is64Bit(KnownReg)) {
@ -3763,8 +3763,8 @@ void Compile_R4300i_SPECIAL_AND (CBlockSection * Section) {
}
} else {
Map_GPR_64bit(Section,Opcode.rd,Opcode.rt);
AndVariableToX86Reg(&_GPR[Opcode.rs].W[1],GPR_NameHi[Opcode.rs],Section->MipsRegHi(Opcode.rd));
AndVariableToX86Reg(&_GPR[Opcode.rs].W[0],GPR_NameLo[Opcode.rs],Section->MipsRegLo(Opcode.rd));
AndVariableToX86Reg(&_GPR[Opcode.rs].W[1],CRegName::GPR_Hi[Opcode.rs],Section->MipsRegHi(Opcode.rd));
AndVariableToX86Reg(&_GPR[Opcode.rs].W[0],CRegName::GPR_Lo[Opcode.rs],Section->MipsRegLo(Opcode.rd));
}
}
@ -3849,13 +3849,13 @@ void Compile_R4300i_SPECIAL_OR (CBlockSection * Section) {
}
} else {
Map_GPR_64bit(Section,Opcode.rd,KnownReg);
OrVariableToX86Reg(&_GPR[UnknownReg].W[1],GPR_NameHi[UnknownReg],Section->MipsRegHi(Opcode.rd));
OrVariableToX86Reg(&_GPR[UnknownReg].W[0],GPR_NameLo[UnknownReg],Section->MipsRegLo(Opcode.rd));
OrVariableToX86Reg(&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg],Section->MipsRegHi(Opcode.rd));
OrVariableToX86Reg(&_GPR[UnknownReg].W[0],CRegName::GPR_Lo[UnknownReg],Section->MipsRegLo(Opcode.rd));
}
} else {
Map_GPR_64bit(Section,Opcode.rd,Opcode.rt);
OrVariableToX86Reg(&_GPR[Opcode.rs].W[1],GPR_NameHi[Opcode.rs],Section->MipsRegHi(Opcode.rd));
OrVariableToX86Reg(&_GPR[Opcode.rs].W[0],GPR_NameLo[Opcode.rs],Section->MipsRegLo(Opcode.rd));
OrVariableToX86Reg(&_GPR[Opcode.rs].W[1],CRegName::GPR_Hi[Opcode.rs],Section->MipsRegHi(Opcode.rd));
OrVariableToX86Reg(&_GPR[Opcode.rs].W[0],CRegName::GPR_Lo[Opcode.rs],Section->MipsRegLo(Opcode.rd));
}
if (SPHack && Opcode.rd == 29) {
Section->ResetX86Protection();
@ -3955,13 +3955,13 @@ void Compile_R4300i_SPECIAL_XOR (CBlockSection * Section) {
}
} else {
Map_GPR_64bit(Section,Opcode.rd,KnownReg);
XorVariableToX86reg(&_GPR[UnknownReg].W[1],GPR_NameHi[UnknownReg],Section->MipsRegHi(Opcode.rd));
XorVariableToX86reg(&_GPR[UnknownReg].W[0],GPR_NameLo[UnknownReg],Section->MipsRegLo(Opcode.rd));
XorVariableToX86reg(&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg],Section->MipsRegHi(Opcode.rd));
XorVariableToX86reg(&_GPR[UnknownReg].W[0],CRegName::GPR_Lo[UnknownReg],Section->MipsRegLo(Opcode.rd));
}
} else {
Map_GPR_64bit(Section,Opcode.rd,Opcode.rt);
XorVariableToX86reg(&_GPR[Opcode.rs].W[1],GPR_NameHi[Opcode.rs],Section->MipsRegHi(Opcode.rd));
XorVariableToX86reg(&_GPR[Opcode.rs].W[0],GPR_NameLo[Opcode.rs],Section->MipsRegLo(Opcode.rd));
XorVariableToX86reg(&_GPR[Opcode.rs].W[1],CRegName::GPR_Hi[Opcode.rs],Section->MipsRegHi(Opcode.rd));
XorVariableToX86reg(&_GPR[Opcode.rs].W[0],CRegName::GPR_Lo[Opcode.rs],Section->MipsRegLo(Opcode.rd));
}
}
@ -4052,15 +4052,15 @@ void Compile_R4300i_SPECIAL_NOR (CBlockSection * Section) {
}
} else {
Map_GPR_64bit(Section,Opcode.rd,KnownReg);
OrVariableToX86Reg(&_GPR[UnknownReg].W[1],GPR_NameHi[UnknownReg],Section->MipsRegHi(Opcode.rd));
OrVariableToX86Reg(&_GPR[UnknownReg].W[0],GPR_NameLo[UnknownReg],Section->MipsRegLo(Opcode.rd));
OrVariableToX86Reg(&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg],Section->MipsRegHi(Opcode.rd));
OrVariableToX86Reg(&_GPR[UnknownReg].W[0],CRegName::GPR_Lo[UnknownReg],Section->MipsRegLo(Opcode.rd));
}
NotX86Reg(Section->MipsRegHi(Opcode.rd));
NotX86Reg(Section->MipsRegLo(Opcode.rd));
} else {
Map_GPR_64bit(Section,Opcode.rd,Opcode.rt);
OrVariableToX86Reg(&_GPR[Opcode.rs].W[1],GPR_NameHi[Opcode.rs],Section->MipsRegHi(Opcode.rd));
OrVariableToX86Reg(&_GPR[Opcode.rs].W[0],GPR_NameLo[Opcode.rs],Section->MipsRegLo(Opcode.rd));
OrVariableToX86Reg(&_GPR[Opcode.rs].W[1],CRegName::GPR_Hi[Opcode.rs],Section->MipsRegHi(Opcode.rd));
OrVariableToX86Reg(&_GPR[Opcode.rs].W[0],CRegName::GPR_Lo[Opcode.rs],Section->MipsRegLo(Opcode.rd));
NotX86Reg(Section->MipsRegHi(Opcode.rd));
NotX86Reg(Section->MipsRegLo(Opcode.rd));
}
@ -4186,16 +4186,16 @@ void Compile_R4300i_SPECIAL_SLT (CBlockSection * Section) {
if (Section->IsConst(KnownReg)) {
if (Section->Is64Bit(KnownReg)) {
CompConstToVariable(Section->MipsRegHi(KnownReg),&_GPR[UnknownReg].W[1],GPR_NameHi[UnknownReg]);
CompConstToVariable(Section->MipsRegHi(KnownReg),&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg]);
} else {
CompConstToVariable(((int)Section->MipsRegLo(KnownReg) >> 31),&_GPR[UnknownReg].W[1],GPR_NameHi[UnknownReg]);
CompConstToVariable(((int)Section->MipsRegLo(KnownReg) >> 31),&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg]);
}
} else {
if (Section->Is64Bit(KnownReg)) {
CompX86regToVariable(Section->MipsRegHi(KnownReg),&_GPR[UnknownReg].W[1],GPR_NameHi[UnknownReg]);
CompX86regToVariable(Section->MipsRegHi(KnownReg),&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg]);
} else {
ProtectGPR(Section,KnownReg);
CompX86regToVariable(Map_TempReg(Section,x86_Any,KnownReg,TRUE),&_GPR[UnknownReg].W[1],GPR_NameHi[UnknownReg]);
CompX86regToVariable(Map_TempReg(Section,x86_Any,KnownReg,TRUE),&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg]);
}
}
JeLabel8("Low Compare",0);
@ -4212,9 +4212,9 @@ void Compile_R4300i_SPECIAL_SLT (CBlockSection * Section) {
CPU_Message(" Low Compare:");
*((BYTE *)(Jump[0]))=(BYTE)(RecompPos - Jump[0] - 1);
if (Section->IsConst(KnownReg)) {
CompConstToVariable(Section->MipsRegLo(KnownReg),&_GPR[UnknownReg].W[0],GPR_NameLo[UnknownReg]);
CompConstToVariable(Section->MipsRegLo(KnownReg),&_GPR[UnknownReg].W[0],CRegName::GPR_Lo[UnknownReg]);
} else {
CompX86regToVariable(Section->MipsRegLo(KnownReg),&_GPR[UnknownReg].W[0],GPR_NameLo[UnknownReg]);
CompX86regToVariable(Section->MipsRegLo(KnownReg),&_GPR[UnknownReg].W[0],CRegName::GPR_Lo[UnknownReg]);
}
if (KnownReg == (Section->IsConst(KnownReg)?Opcode.rs:Opcode.rt)) {
SetaVariable(&BranchCompare,"BranchCompare");
@ -4231,7 +4231,7 @@ void Compile_R4300i_SPECIAL_SLT (CBlockSection * Section) {
int x86Reg;
x86Reg = Map_TempReg(Section,x86_Any,Opcode.rs,TRUE);
CompX86regToVariable(x86Reg,&_GPR[Opcode.rt].W[1],GPR_NameHi[Opcode.rt]);
CompX86regToVariable(x86Reg,&_GPR[Opcode.rt].W[1],CRegName::GPR_Hi[Opcode.rt]);
JeLabel8("Low Compare",0);
Jump[0] = RecompPos - 1;
SetlVariable(&BranchCompare,"BranchCompare");
@ -4241,7 +4241,7 @@ void Compile_R4300i_SPECIAL_SLT (CBlockSection * Section) {
CPU_Message("");
CPU_Message(" Low Compare:");
*((BYTE *)(Jump[0]))=(BYTE)(RecompPos - Jump[0] - 1);
CompX86regToVariable(Map_TempReg(Section,x86Reg,Opcode.rs,FALSE),&_GPR[Opcode.rt].W[0],GPR_NameLo[Opcode.rt]);
CompX86regToVariable(Map_TempReg(Section,x86Reg,Opcode.rs,FALSE),&_GPR[Opcode.rt].W[0],CRegName::GPR_Lo[Opcode.rt]);
SetbVariable(&BranchCompare,"BranchCompare");
CPU_Message("");
CPU_Message(" Continue:");
@ -4370,16 +4370,16 @@ void Compile_R4300i_SPECIAL_SLTU (CBlockSection * Section) {
if (Section->IsConst(KnownReg)) {
if (Section->Is64Bit(KnownReg)) {
CompConstToVariable(Section->MipsRegHi(KnownReg),&_GPR[UnknownReg].W[1],GPR_NameHi[UnknownReg]);
CompConstToVariable(Section->MipsRegHi(KnownReg),&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg]);
} else {
CompConstToVariable(((int)Section->MipsRegLo(KnownReg) >> 31),&_GPR[UnknownReg].W[1],GPR_NameHi[UnknownReg]);
CompConstToVariable(((int)Section->MipsRegLo(KnownReg) >> 31),&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg]);
}
} else {
if (Section->Is64Bit(KnownReg)) {
CompX86regToVariable(Section->MipsRegHi(KnownReg),&_GPR[UnknownReg].W[1],GPR_NameHi[UnknownReg]);
CompX86regToVariable(Section->MipsRegHi(KnownReg),&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg]);
} else {
ProtectGPR(Section,KnownReg);
CompX86regToVariable(Map_TempReg(Section,x86_Any,KnownReg,TRUE),&_GPR[UnknownReg].W[1],GPR_NameHi[UnknownReg]);
CompX86regToVariable(Map_TempReg(Section,x86_Any,KnownReg,TRUE),&_GPR[UnknownReg].W[1],CRegName::GPR_Hi[UnknownReg]);
}
}
JeLabel8("Low Compare",0);
@ -4396,9 +4396,9 @@ void Compile_R4300i_SPECIAL_SLTU (CBlockSection * Section) {
CPU_Message(" Low Compare:");
*((BYTE *)(Jump[0]))=(BYTE)(RecompPos - Jump[0] - 1);
if (Section->IsConst(KnownReg)) {
CompConstToVariable(Section->MipsRegLo(KnownReg),&_GPR[UnknownReg].W[0],GPR_NameLo[UnknownReg]);
CompConstToVariable(Section->MipsRegLo(KnownReg),&_GPR[UnknownReg].W[0],CRegName::GPR_Lo[UnknownReg]);
} else {
CompX86regToVariable(Section->MipsRegLo(KnownReg),&_GPR[UnknownReg].W[0],GPR_NameLo[UnknownReg]);
CompX86regToVariable(Section->MipsRegLo(KnownReg),&_GPR[UnknownReg].W[0],CRegName::GPR_Lo[UnknownReg]);
}
if (KnownReg == (Section->IsConst(KnownReg)?Opcode.rs:Opcode.rt)) {
SetaVariable(&BranchCompare,"BranchCompare");
@ -4415,7 +4415,7 @@ void Compile_R4300i_SPECIAL_SLTU (CBlockSection * Section) {
int x86Reg;
x86Reg = Map_TempReg(Section,x86_Any,Opcode.rs,TRUE);
CompX86regToVariable(x86Reg,&_GPR[Opcode.rt].W[1],GPR_NameHi[Opcode.rt]);
CompX86regToVariable(x86Reg,&_GPR[Opcode.rt].W[1],CRegName::GPR_Hi[Opcode.rt]);
JeLabel8("Low Compare",0);
Jump[0] = RecompPos - 1;
SetbVariable(&BranchCompare,"BranchCompare");
@ -4425,7 +4425,7 @@ void Compile_R4300i_SPECIAL_SLTU (CBlockSection * Section) {
CPU_Message("");
CPU_Message(" Low Compare:");
*((BYTE *)(Jump[0]))=(BYTE)(RecompPos - Jump[0] - 1);
CompX86regToVariable(Map_TempReg(Section,x86Reg,Opcode.rs,FALSE),&_GPR[Opcode.rt].W[0],GPR_NameLo[Opcode.rt]);
CompX86regToVariable(Map_TempReg(Section,x86Reg,Opcode.rs,FALSE),&_GPR[Opcode.rt].W[0],CRegName::GPR_Lo[Opcode.rt]);
SetbVariable(&BranchCompare,"BranchCompare");
CPU_Message("");
CPU_Message(" Continue:");
@ -4465,8 +4465,8 @@ void Compile_R4300i_SPECIAL_DADD (CBlockSection * Section) {
AddX86RegToX86Reg(Section->MipsRegLo(Opcode.rd),Section->MipsRegLo(source2));
AdcX86RegToX86Reg(Section->MipsRegHi(Opcode.rd),HiReg);
} else {
AddVariableToX86reg(Section->MipsRegLo(Opcode.rd),&_GPR[source2].W[0],GPR_NameLo[source2]);
AdcVariableToX86reg(Section->MipsRegHi(Opcode.rd),&_GPR[source2].W[1],GPR_NameHi[source2]);
AddVariableToX86reg(Section->MipsRegLo(Opcode.rd),&_GPR[source2].W[0],CRegName::GPR_Lo[source2]);
AdcVariableToX86reg(Section->MipsRegHi(Opcode.rd),&_GPR[source2].W[1],CRegName::GPR_Hi[source2]);
}
}
}
@ -4501,8 +4501,8 @@ void Compile_R4300i_SPECIAL_DADDU (CBlockSection * Section) {
AddX86RegToX86Reg(Section->MipsRegLo(Opcode.rd),Section->MipsRegLo(source2));
AdcX86RegToX86Reg(Section->MipsRegHi(Opcode.rd),HiReg);
} else {
AddVariableToX86reg(Section->MipsRegLo(Opcode.rd),&_GPR[source2].W[0],GPR_NameLo[source2]);
AdcVariableToX86reg(Section->MipsRegHi(Opcode.rd),&_GPR[source2].W[1],GPR_NameHi[source2]);
AddVariableToX86reg(Section->MipsRegLo(Opcode.rd),&_GPR[source2].W[0],CRegName::GPR_Lo[source2]);
AdcVariableToX86reg(Section->MipsRegHi(Opcode.rd),&_GPR[source2].W[1],CRegName::GPR_Hi[source2]);
}
}
}
@ -4542,8 +4542,8 @@ void Compile_R4300i_SPECIAL_DSUB (CBlockSection * Section) {
SubX86RegToX86Reg(Section->MipsRegLo(Opcode.rd),Section->MipsRegLo(Opcode.rt));
SbbX86RegToX86Reg(Section->MipsRegHi(Opcode.rd),HiReg);
} else {
SubVariableFromX86reg(Section->MipsRegLo(Opcode.rd),&_GPR[Opcode.rt].W[0],GPR_NameLo[Opcode.rt]);
SbbVariableFromX86reg(Section->MipsRegHi(Opcode.rd),&_GPR[Opcode.rt].W[1],GPR_NameHi[Opcode.rt]);
SubVariableFromX86reg(Section->MipsRegLo(Opcode.rd),&_GPR[Opcode.rt].W[0],CRegName::GPR_Lo[Opcode.rt]);
SbbVariableFromX86reg(Section->MipsRegHi(Opcode.rd),&_GPR[Opcode.rt].W[1],CRegName::GPR_Hi[Opcode.rt]);
}
}
}
@ -4583,8 +4583,8 @@ void Compile_R4300i_SPECIAL_DSUBU (CBlockSection * Section) {
SubX86RegToX86Reg(Section->MipsRegLo(Opcode.rd),Section->MipsRegLo(Opcode.rt));
SbbX86RegToX86Reg(Section->MipsRegHi(Opcode.rd),HiReg);
} else {
SubVariableFromX86reg(Section->MipsRegLo(Opcode.rd),&_GPR[Opcode.rt].W[0],GPR_NameLo[Opcode.rt]);
SbbVariableFromX86reg(Section->MipsRegHi(Opcode.rd),&_GPR[Opcode.rt].W[1],GPR_NameHi[Opcode.rt]);
SubVariableFromX86reg(Section->MipsRegLo(Opcode.rd),&_GPR[Opcode.rt].W[0],CRegName::GPR_Lo[Opcode.rt]);
SbbVariableFromX86reg(Section->MipsRegHi(Opcode.rd),&_GPR[Opcode.rt].W[1],CRegName::GPR_Hi[Opcode.rt]);
}
}
}
@ -4688,7 +4688,7 @@ void Compile_R4300i_SPECIAL_DSLL32 (CBlockSection * Section) {
XorX86RegToX86Reg(Section->MipsRegLo(Opcode.rd),Section->MipsRegLo(Opcode.rd));
} else {
Map_GPR_64bit(Section,Opcode.rd,-1);
MoveVariableToX86reg(&_GPR[Opcode.rt],GPR_NameHi[Opcode.rt],Section->MipsRegHi(Opcode.rd));
MoveVariableToX86reg(&_GPR[Opcode.rt],CRegName::GPR_Hi[Opcode.rt],Section->MipsRegHi(Opcode.rd));
if ((BYTE)Opcode.sa != 0) {
ShiftLeftSignImmed(Section->MipsRegHi(Opcode.rd),(BYTE)Opcode.sa);
}
@ -4722,7 +4722,7 @@ void Compile_R4300i_SPECIAL_DSRL32 (CBlockSection * Section) {
}
} else {
Map_GPR_32bit(Section,Opcode.rd,FALSE,-1);
MoveVariableToX86reg(&_GPR[Opcode.rt].UW[1],GPR_NameLo[Opcode.rt],Section->MipsRegLo(Opcode.rd));
MoveVariableToX86reg(&_GPR[Opcode.rt].UW[1],CRegName::GPR_Lo[Opcode.rt],Section->MipsRegLo(Opcode.rd));
if ((BYTE)Opcode.sa != 0) {
ShiftRightUnsignImmed(Section->MipsRegLo(Opcode.rd),(BYTE)Opcode.sa);
}
@ -4755,7 +4755,7 @@ void Compile_R4300i_SPECIAL_DSRA32 (CBlockSection * Section) {
}
} else {
Map_GPR_32bit(Section,Opcode.rd,TRUE,-1);
MoveVariableToX86reg(&_GPR[Opcode.rt].UW[1],GPR_NameLo[Opcode.rt],Section->MipsRegLo(Opcode.rd));
MoveVariableToX86reg(&_GPR[Opcode.rt].UW[1],CRegName::GPR_Lo[Opcode.rt],Section->MipsRegLo(Opcode.rd));
if ((BYTE)Opcode.sa != 0) {
ShiftRightSignImmed(Section->MipsRegLo(Opcode.rd),(BYTE)Opcode.sa);
}
@ -4773,7 +4773,7 @@ void Compile_R4300i_COP0_MF(CBlockSection * Section) {
Section->BlockRandomModifier() = 0;
}
Map_GPR_32bit(Section,Opcode.rt,TRUE,-1);
MoveVariableToX86reg(&_CP0[Opcode.rd],Cop0_Name[Opcode.rd],Section->MipsRegLo(Opcode.rt));
MoveVariableToX86reg(&_CP0[Opcode.rd],CRegName::Cop0[Opcode.rd],Section->MipsRegLo(Opcode.rt));
}
void Compile_R4300i_COP0_MT (CBlockSection * Section) {
@ -4798,23 +4798,24 @@ void Compile_R4300i_COP0_MT (CBlockSection * Section) {
case 29: //Tag Hi
case 30: //ErrEPC
if (Section->IsConst(Opcode.rt)) {
MoveConstToVariable(Section->MipsRegLo(Opcode.rt), &_CP0[Opcode.rd], Cop0_Name[Opcode.rd]);
MoveConstToVariable(Section->MipsRegLo(Opcode.rt), &_CP0[Opcode.rd], CRegName::Cop0[Opcode.rd]);
} else if (Section->IsMapped(Opcode.rt)) {
MoveX86regToVariable(Section->MipsRegLo(Opcode.rt), &_CP0[Opcode.rd], Cop0_Name[Opcode.rd]);
MoveX86regToVariable(Section->MipsRegLo(Opcode.rt), &_CP0[Opcode.rd], CRegName::Cop0[Opcode.rd]);
} else {
MoveX86regToVariable(Map_TempReg(Section,x86_Any,Opcode.rt,FALSE), &_CP0[Opcode.rd], Cop0_Name[Opcode.rd]);
MoveX86regToVariable(Map_TempReg(Section,x86_Any,Opcode.rt,FALSE), &_CP0[Opcode.rd], CRegName::Cop0[Opcode.rd]);
}
switch (Opcode.rd) {
case 4: //Context
AndConstToVariable(0xFF800000,&_CP0[Opcode.rd], Cop0_Name[Opcode.rd]);
AndConstToVariable(0xFF800000,&_CP0[Opcode.rd], CRegName::Cop0[Opcode.rd]);
break;
case 11: //Compare
_N64System->GetRecompiler()->UpdateCounters(&Section->BlockCycleCount(),&Section->BlockRandomModifier(),FALSE);
Section->BlockCycleCount() = 0;
Section->BlockRandomModifier() = 0;
AndConstToVariable(~CAUSE_IP7,&FAKE_CAUSE_REGISTER,"FAKE_CAUSE_REGISTER");
AndConstToVariable(~CAUSE_IP7,&_Reg->FAKE_CAUSE_REGISTER,"FAKE_CAUSE_REGISTER");
Pushad();
Call_Direct(ChangeCompareTimer,"ChangeCompareTimer");
_Notify->BreakPoint(__FILE__,__LINE__);
//Call_Direct(ChangeCompareTimer,"ChangeCompareTimer");
Popad();
}
break;
@ -4823,27 +4824,28 @@ void Compile_R4300i_COP0_MT (CBlockSection * Section) {
Section->BlockCycleCount() = 0;
Section->BlockRandomModifier() = 0;
if (Section->IsConst(Opcode.rt)) {
MoveConstToVariable(Section->MipsRegLo(Opcode.rt), &_CP0[Opcode.rd], Cop0_Name[Opcode.rd]);
MoveConstToVariable(Section->MipsRegLo(Opcode.rt), &_CP0[Opcode.rd], CRegName::Cop0[Opcode.rd]);
} else if (Section->IsMapped(Opcode.rt)) {
MoveX86regToVariable(Section->MipsRegLo(Opcode.rt), &_CP0[Opcode.rd], Cop0_Name[Opcode.rd]);
MoveX86regToVariable(Section->MipsRegLo(Opcode.rt), &_CP0[Opcode.rd], CRegName::Cop0[Opcode.rd]);
} else {
MoveX86regToVariable(Map_TempReg(Section,x86_Any,Opcode.rt,FALSE), &_CP0[Opcode.rd], Cop0_Name[Opcode.rd]);
MoveX86regToVariable(Map_TempReg(Section,x86_Any,Opcode.rt,FALSE), &_CP0[Opcode.rd], CRegName::Cop0[Opcode.rd]);
}
Pushad();
Call_Direct(ChangeCompareTimer,"ChangeCompareTimer");
_Notify->BreakPoint(__FILE__,__LINE__);
//Call_Direct(ChangeCompareTimer,"ChangeCompareTimer");
Popad();
break;
case 12: //Status
OldStatusReg = Map_TempReg(Section,x86_Any,-1,FALSE);
MoveVariableToX86reg(&_CP0[Opcode.rd],Cop0_Name[Opcode.rd],OldStatusReg);
MoveVariableToX86reg(&_CP0[Opcode.rd],CRegName::Cop0[Opcode.rd],OldStatusReg);
if (Section->IsConst(Opcode.rt)) {
MoveConstToVariable(Section->MipsRegLo(Opcode.rt), &_CP0[Opcode.rd], Cop0_Name[Opcode.rd]);
MoveConstToVariable(Section->MipsRegLo(Opcode.rt), &_CP0[Opcode.rd], CRegName::Cop0[Opcode.rd]);
} else if (Section->IsMapped(Opcode.rt)) {
MoveX86regToVariable(Section->MipsRegLo(Opcode.rt), &_CP0[Opcode.rd], Cop0_Name[Opcode.rd]);
MoveX86regToVariable(Section->MipsRegLo(Opcode.rt), &_CP0[Opcode.rd], CRegName::Cop0[Opcode.rd]);
} else {
MoveX86regToVariable(Map_TempReg(Section,x86_Any,Opcode.rt,FALSE), &_CP0[Opcode.rd], Cop0_Name[Opcode.rd]);
MoveX86regToVariable(Map_TempReg(Section,x86_Any,Opcode.rt,FALSE), &_CP0[Opcode.rd], CRegName::Cop0[Opcode.rd]);
}
XorVariableToX86reg(&_CP0[Opcode.rd], Cop0_Name[Opcode.rd],OldStatusReg);
XorVariableToX86reg(&_CP0[Opcode.rd], CRegName::Cop0[Opcode.rd],OldStatusReg);
TestConstToX86Reg(STATUS_FR,OldStatusReg);
JeLabel8("FpuFlagFine",0);
Jump = RecompPos - 1;
@ -4866,16 +4868,16 @@ void Compile_R4300i_COP0_MT (CBlockSection * Section) {
Call_Direct(FixRandomReg,"FixRandomReg");
Popad();
if (Section->IsConst(Opcode.rt)) {
MoveConstToVariable(Section->MipsRegLo(Opcode.rt), &_CP0[Opcode.rd], Cop0_Name[Opcode.rd]);
MoveConstToVariable(Section->MipsRegLo(Opcode.rt), &_CP0[Opcode.rd], CRegName::Cop0[Opcode.rd]);
} else if (Section->IsMapped(Opcode.rt)) {
MoveX86regToVariable(Section->MipsRegLo(Opcode.rt), &_CP0[Opcode.rd], Cop0_Name[Opcode.rd]);
MoveX86regToVariable(Section->MipsRegLo(Opcode.rt), &_CP0[Opcode.rd], CRegName::Cop0[Opcode.rd]);
} else {
MoveX86regToVariable(Map_TempReg(Section,x86_Any,Opcode.rt,FALSE), &_CP0[Opcode.rd], Cop0_Name[Opcode.rd]);
MoveX86regToVariable(Map_TempReg(Section,x86_Any,Opcode.rt,FALSE), &_CP0[Opcode.rd], CRegName::Cop0[Opcode.rd]);
}
break;
case 13: //cause
if (Section->IsConst(Opcode.rt)) {
AndConstToVariable(0xFFFFCFF,&_CP0[Opcode.rd], Cop0_Name[Opcode.rd]);
AndConstToVariable(0xFFFFCFF,&_CP0[Opcode.rd], CRegName::Cop0[Opcode.rd]);
#ifndef EXTERNAL_RELEASE
if ((Section->MipsRegLo(Opcode.rt) & 0x300) != 0 ){ DisplayError("Set IP0 or IP1"); }
#endif
@ -4905,7 +4907,7 @@ void Compile_R4300i_COP0_CO_TLBWI( CBlockSection * Section) {
if (!UseTlb) { return; }
Pushad();
PushImm32("FALSE",FALSE);
MoveVariableToX86reg(&INDEX_REGISTER,"INDEX_REGISTER",x86_ECX);
MoveVariableToX86reg(&_Reg->INDEX_REGISTER,"INDEX_REGISTER",x86_ECX);
AndConstToX86Reg(x86_ECX,0x1F);
Push(x86_ECX);
Call_Direct(TLB_WriteEntry,"TLB_WriteEntry");
@ -4923,7 +4925,7 @@ void Compile_R4300i_COP0_CO_TLBWR( CBlockSection * Section) {
Pushad();
Call_Direct(FixRandomReg,"FixRandomReg");
PushImm32("TRUE",TRUE);
MoveVariableToX86reg(&RANDOM_REGISTER,"RANDOM_REGISTER",x86_ECX);
MoveVariableToX86reg(&_Reg->RANDOM_REGISTER,"RANDOM_REGISTER",x86_ECX);
AndConstToX86Reg(x86_ECX,0x1F);
Push(x86_ECX);
Call_Direct(TLB_WriteEntry,"TLB_WriteEntry");
@ -4942,12 +4944,12 @@ void Compile_R4300i_COP0_CO_TLBP( CBlockSection * Section) {
}
void compiler_COP0_CO_ERET (void) {
if ((STATUS_REGISTER & STATUS_ERL) != 0) {
*_PROGRAM_COUNTER = ERROREPC_REGISTER;
STATUS_REGISTER &= ~STATUS_ERL;
if ((_Reg->STATUS_REGISTER & STATUS_ERL) != 0) {
*_PROGRAM_COUNTER = _Reg->ERROREPC_REGISTER;
_Reg->STATUS_REGISTER &= ~STATUS_ERL;
} else {
*_PROGRAM_COUNTER = EPC_REGISTER;
STATUS_REGISTER &= ~STATUS_EXL;
*_PROGRAM_COUNTER = _Reg->EPC_REGISTER;
_Reg->STATUS_REGISTER &= ~STATUS_EXL;
}
*_LLBit = 0;
CheckInterrupts();

94
Source/Project64/N64 System/C Core/Registers.cpp
View File

@ -109,67 +109,67 @@ void ChangeFPURegFormat (CBlockSection * Section, int Reg, CRegInfo::FPU_STATE O
}
void ChangeMiIntrMask (void) {
if ( ( RegModValue & MI_INTR_MASK_CLR_SP ) != 0 ) { MI_INTR_MASK_REG &= ~MI_INTR_MASK_SP; }
if ( ( RegModValue & MI_INTR_MASK_SET_SP ) != 0 ) { MI_INTR_MASK_REG |= MI_INTR_MASK_SP; }
if ( ( RegModValue & MI_INTR_MASK_CLR_SI ) != 0 ) { MI_INTR_MASK_REG &= ~MI_INTR_MASK_SI; }
if ( ( RegModValue & MI_INTR_MASK_SET_SI ) != 0 ) { MI_INTR_MASK_REG |= MI_INTR_MASK_SI; }
if ( ( RegModValue & MI_INTR_MASK_CLR_AI ) != 0 ) { MI_INTR_MASK_REG &= ~MI_INTR_MASK_AI; }
if ( ( RegModValue & MI_INTR_MASK_SET_AI ) != 0 ) { MI_INTR_MASK_REG |= MI_INTR_MASK_AI; }
if ( ( RegModValue & MI_INTR_MASK_CLR_VI ) != 0 ) { MI_INTR_MASK_REG &= ~MI_INTR_MASK_VI; }
if ( ( RegModValue & MI_INTR_MASK_SET_VI ) != 0 ) { MI_INTR_MASK_REG |= MI_INTR_MASK_VI; }
if ( ( RegModValue & MI_INTR_MASK_CLR_PI ) != 0 ) { MI_INTR_MASK_REG &= ~MI_INTR_MASK_PI; }
if ( ( RegModValue & MI_INTR_MASK_SET_PI ) != 0 ) { MI_INTR_MASK_REG |= MI_INTR_MASK_PI; }
if ( ( RegModValue & MI_INTR_MASK_CLR_DP ) != 0 ) { MI_INTR_MASK_REG &= ~MI_INTR_MASK_DP; }
if ( ( RegModValue & MI_INTR_MASK_SET_DP ) != 0 ) { MI_INTR_MASK_REG |= MI_INTR_MASK_DP; }
if ( ( RegModValue & MI_INTR_MASK_CLR_SP ) != 0 ) { _Reg->MI_INTR_MASK_REG &= ~MI_INTR_MASK_SP; }
if ( ( RegModValue & MI_INTR_MASK_SET_SP ) != 0 ) { _Reg->MI_INTR_MASK_REG |= MI_INTR_MASK_SP; }
if ( ( RegModValue & MI_INTR_MASK_CLR_SI ) != 0 ) { _Reg->MI_INTR_MASK_REG &= ~MI_INTR_MASK_SI; }
if ( ( RegModValue & MI_INTR_MASK_SET_SI ) != 0 ) { _Reg->MI_INTR_MASK_REG |= MI_INTR_MASK_SI; }
if ( ( RegModValue & MI_INTR_MASK_CLR_AI ) != 0 ) { _Reg->MI_INTR_MASK_REG &= ~MI_INTR_MASK_AI; }
if ( ( RegModValue & MI_INTR_MASK_SET_AI ) != 0 ) { _Reg->MI_INTR_MASK_REG |= MI_INTR_MASK_AI; }
if ( ( RegModValue & MI_INTR_MASK_CLR_VI ) != 0 ) { _Reg->MI_INTR_MASK_REG &= ~MI_INTR_MASK_VI; }
if ( ( RegModValue & MI_INTR_MASK_SET_VI ) != 0 ) { _Reg->MI_INTR_MASK_REG |= MI_INTR_MASK_VI; }
if ( ( RegModValue & MI_INTR_MASK_CLR_PI ) != 0 ) { _Reg->MI_INTR_MASK_REG &= ~MI_INTR_MASK_PI; }
if ( ( RegModValue & MI_INTR_MASK_SET_PI ) != 0 ) { _Reg->MI_INTR_MASK_REG |= MI_INTR_MASK_PI; }
if ( ( RegModValue & MI_INTR_MASK_CLR_DP ) != 0 ) { _Reg->MI_INTR_MASK_REG &= ~MI_INTR_MASK_DP; }
if ( ( RegModValue & MI_INTR_MASK_SET_DP ) != 0 ) { _Reg->MI_INTR_MASK_REG |= MI_INTR_MASK_DP; }
}
void ChangeMiModeReg (void) {
MI_MODE_REG &= ~0x7F;
MI_MODE_REG |= (RegModValue & 0x7F);
if ( ( RegModValue & MI_CLR_INIT ) != 0 ) { MI_MODE_REG &= ~MI_MODE_INIT; }
if ( ( RegModValue & MI_SET_INIT ) != 0 ) { MI_MODE_REG |= MI_MODE_INIT; }
if ( ( RegModValue & MI_CLR_EBUS ) != 0 ) { MI_MODE_REG &= ~MI_MODE_EBUS; }
if ( ( RegModValue & MI_SET_EBUS ) != 0 ) { MI_MODE_REG |= MI_MODE_EBUS; }
if ( ( RegModValue & MI_CLR_DP_INTR ) != 0 ) { MI_INTR_REG &= ~MI_INTR_DP; }
if ( ( RegModValue & MI_CLR_RDRAM ) != 0 ) { MI_MODE_REG &= ~MI_MODE_RDRAM; }
if ( ( RegModValue & MI_SET_RDRAM ) != 0 ) { MI_MODE_REG |= MI_MODE_RDRAM; }
_Reg->MI_MODE_REG &= ~0x7F;
_Reg->MI_MODE_REG |= (RegModValue & 0x7F);
if ( ( RegModValue & MI_CLR_INIT ) != 0 ) { _Reg->MI_MODE_REG &= ~MI_MODE_INIT; }
if ( ( RegModValue & MI_SET_INIT ) != 0 ) { _Reg->MI_MODE_REG |= MI_MODE_INIT; }
if ( ( RegModValue & MI_CLR_EBUS ) != 0 ) { _Reg->MI_MODE_REG &= ~MI_MODE_EBUS; }
if ( ( RegModValue & MI_SET_EBUS ) != 0 ) { _Reg->MI_MODE_REG |= MI_MODE_EBUS; }
if ( ( RegModValue & MI_CLR_DP_INTR ) != 0 ) { _Reg->MI_INTR_REG &= ~MI_INTR_DP; }
if ( ( RegModValue & MI_CLR_RDRAM ) != 0 ) { _Reg->MI_MODE_REG &= ~MI_MODE_RDRAM; }
if ( ( RegModValue & MI_SET_RDRAM ) != 0 ) { _Reg->MI_MODE_REG |= MI_MODE_RDRAM; }
}
void ChangeSpStatus (void) {
if ( ( RegModValue & SP_CLR_HALT ) != 0) { SP_STATUS_REG &= ~SP_STATUS_HALT; }
if ( ( RegModValue & SP_SET_HALT ) != 0) { SP_STATUS_REG |= SP_STATUS_HALT; }
if ( ( RegModValue & SP_CLR_BROKE ) != 0) { SP_STATUS_REG &= ~SP_STATUS_BROKE; }
if ( ( RegModValue & SP_CLR_HALT ) != 0) { _Reg->SP_STATUS_REG &= ~SP_STATUS_HALT; }
if ( ( RegModValue & SP_SET_HALT ) != 0) { _Reg->SP_STATUS_REG |= SP_STATUS_HALT; }
if ( ( RegModValue & SP_CLR_BROKE ) != 0) { _Reg->SP_STATUS_REG &= ~SP_STATUS_BROKE; }
if ( ( RegModValue & SP_CLR_INTR ) != 0) {
MI_INTR_REG &= ~MI_INTR_SP;
_Reg->MI_INTR_REG &= ~MI_INTR_SP;
CheckInterrupts();
}
#ifndef EXTERNAL_RELEASE
if ( ( RegModValue & SP_SET_INTR ) != 0) { DisplayError("SP_SET_INTR"); }
#endif
if ( ( RegModValue & SP_CLR_SSTEP ) != 0) { SP_STATUS_REG &= ~SP_STATUS_SSTEP; }
if ( ( RegModValue & SP_SET_SSTEP ) != 0) { SP_STATUS_REG |= SP_STATUS_SSTEP; }
if ( ( RegModValue & SP_CLR_INTR_BREAK ) != 0) { SP_STATUS_REG &= ~SP_STATUS_INTR_BREAK; }
if ( ( RegModValue & SP_SET_INTR_BREAK ) != 0) { SP_STATUS_REG |= SP_STATUS_INTR_BREAK; }
if ( ( RegModValue & SP_CLR_SIG0 ) != 0) { SP_STATUS_REG &= ~SP_STATUS_SIG0; }
if ( ( RegModValue & SP_SET_SIG0 ) != 0) { SP_STATUS_REG |= SP_STATUS_SIG0; }
if ( ( RegModValue & SP_CLR_SIG1 ) != 0) { SP_STATUS_REG &= ~SP_STATUS_SIG1; }
if ( ( RegModValue & SP_SET_SIG1 ) != 0) { SP_STATUS_REG |= SP_STATUS_SIG1; }
if ( ( RegModValue & SP_CLR_SIG2 ) != 0) { SP_STATUS_REG &= ~SP_STATUS_SIG2; }
if ( ( RegModValue & SP_SET_SIG2 ) != 0) { SP_STATUS_REG |= SP_STATUS_SIG2; }
if ( ( RegModValue & SP_CLR_SIG3 ) != 0) { SP_STATUS_REG &= ~SP_STATUS_SIG3; }
if ( ( RegModValue & SP_SET_SIG3 ) != 0) { SP_STATUS_REG |= SP_STATUS_SIG3; }
if ( ( RegModValue & SP_CLR_SIG4 ) != 0) { SP_STATUS_REG &= ~SP_STATUS_SIG4; }
if ( ( RegModValue & SP_SET_SIG4 ) != 0) { SP_STATUS_REG |= SP_STATUS_SIG4; }
if ( ( RegModValue & SP_CLR_SIG5 ) != 0) { SP_STATUS_REG &= ~SP_STATUS_SIG5; }
if ( ( RegModValue & SP_SET_SIG5 ) != 0) { SP_STATUS_REG |= SP_STATUS_SIG5; }
if ( ( RegModValue & SP_CLR_SIG6 ) != 0) { SP_STATUS_REG &= ~SP_STATUS_SIG6; }
if ( ( RegModValue & SP_SET_SIG6 ) != 0) { SP_STATUS_REG |= SP_STATUS_SIG6; }
if ( ( RegModValue & SP_CLR_SIG7 ) != 0) { SP_STATUS_REG &= ~SP_STATUS_SIG7; }
if ( ( RegModValue & SP_SET_SIG7 ) != 0) { SP_STATUS_REG |= SP_STATUS_SIG7; }
if ( ( RegModValue & SP_CLR_SSTEP ) != 0) { _Reg->SP_STATUS_REG &= ~SP_STATUS_SSTEP; }
if ( ( RegModValue & SP_SET_SSTEP ) != 0) { _Reg->SP_STATUS_REG |= SP_STATUS_SSTEP; }
if ( ( RegModValue & SP_CLR_INTR_BREAK ) != 0) { _Reg->SP_STATUS_REG &= ~SP_STATUS_INTR_BREAK; }
if ( ( RegModValue & SP_SET_INTR_BREAK ) != 0) { _Reg->SP_STATUS_REG |= SP_STATUS_INTR_BREAK; }
if ( ( RegModValue & SP_CLR_SIG0 ) != 0) { _Reg->SP_STATUS_REG &= ~SP_STATUS_SIG0; }
if ( ( RegModValue & SP_SET_SIG0 ) != 0) { _Reg->SP_STATUS_REG |= SP_STATUS_SIG0; }
if ( ( RegModValue & SP_CLR_SIG1 ) != 0) { _Reg->SP_STATUS_REG &= ~SP_STATUS_SIG1; }
if ( ( RegModValue & SP_SET_SIG1 ) != 0) { _Reg->SP_STATUS_REG |= SP_STATUS_SIG1; }
if ( ( RegModValue & SP_CLR_SIG2 ) != 0) { _Reg->SP_STATUS_REG &= ~SP_STATUS_SIG2; }
if ( ( RegModValue & SP_SET_SIG2 ) != 0) { _Reg->SP_STATUS_REG |= SP_STATUS_SIG2; }
if ( ( RegModValue & SP_CLR_SIG3 ) != 0) { _Reg->SP_STATUS_REG &= ~SP_STATUS_SIG3; }
if ( ( RegModValue & SP_SET_SIG3 ) != 0) { _Reg->SP_STATUS_REG |= SP_STATUS_SIG3; }
if ( ( RegModValue & SP_CLR_SIG4 ) != 0) { _Reg->SP_STATUS_REG &= ~SP_STATUS_SIG4; }
if ( ( RegModValue & SP_SET_SIG4 ) != 0) { _Reg->SP_STATUS_REG |= SP_STATUS_SIG4; }
if ( ( RegModValue & SP_CLR_SIG5 ) != 0) { _Reg->SP_STATUS_REG &= ~SP_STATUS_SIG5; }
if ( ( RegModValue & SP_SET_SIG5 ) != 0) { _Reg->SP_STATUS_REG |= SP_STATUS_SIG5; }
if ( ( RegModValue & SP_CLR_SIG6 ) != 0) { _Reg->SP_STATUS_REG &= ~SP_STATUS_SIG6; }
if ( ( RegModValue & SP_SET_SIG6 ) != 0) { _Reg->SP_STATUS_REG |= SP_STATUS_SIG6; }
if ( ( RegModValue & SP_CLR_SIG7 ) != 0) { _Reg->SP_STATUS_REG &= ~SP_STATUS_SIG7; }
if ( ( RegModValue & SP_SET_SIG7 ) != 0) { _Reg->SP_STATUS_REG |= SP_STATUS_SIG7; }
if ( ( RegModValue & SP_SET_SIG0 ) != 0 && AudioSignal)
{
MI_INTR_REG |= MI_INTR_SP;
_Reg->MI_INTR_REG |= MI_INTR_SP;
CheckInterrupts();
}
//if (*( DWORD *)(DMEM + 0xFC0) == 1) {
@ -273,7 +273,7 @@ int FreeX86Reg (CBlockSection * Section) {
return -1;
}
#ifdef ggg
#ifdef toremove
void InitalizeR4300iRegisters (int UsePif, int Country, int CIC_Chip) {
memset(CP0,0,sizeof(Registers.CP0));
memset(FPCR,0,sizeof(Registers.FPCR));

10
Source/Project64/N64 System/C Core/Registers.h
View File

@ -1,3 +1,5 @@
#ifdef toremove
/*
* Project 64 - A Nintendo 64 emulator.
*
@ -217,12 +219,16 @@ void ChangeMiIntrMask ( void );
void ChangeMiModeReg ( void );
void ChangeSpStatus ( void );
void InitalizeR4300iRegisters ( int UsePif, int Country, int CIC_Chip );
BOOL Is8BitReg ( int x86Reg);
void SetFpuLocations ( void );
void SetupRegisters ( N64_REGISTERS * n64_Registers );
#ifdef __cplusplus
}
#endif
#endif
BOOL Is8BitReg ( int x86Reg);
void ChangeFPURegFormat ( CBlockSection * Section, int Reg, CRegInfo::FPU_STATE OldFormat, CRegInfo::FPU_STATE NewFormat, CRegInfo::FPU_ROUND RoundingModel );
void Load_FPR_ToTop ( CBlockSection * Section, int Reg, int RegToLoad, CRegInfo::FPU_STATE Format);
void Map_GPR_32bit ( CBlockSection * Section, int Reg, BOOL SignValue, int MipsRegToLoad );
@ -239,5 +245,3 @@ BOOL UnMap_X86reg ( CBlockSection * Section, DWORD x86Reg );
void UnProtectGPR ( CBlockSection * Section, DWORD Reg );
void WriteBackRegisters ( CBlockSection * Section );
void FixRoundModel ( CBlockSection * Section, CRegInfo::FPU_ROUND RoundMethod );
}
#endif

362
Source/Project64/N64 System/C Core/r4300i Commands.cpp
View File

@ -54,37 +54,37 @@ char * R4300iSpecialName ( DWORD OpCode, DWORD PC ) {
switch (command.funct) {
case R4300i_SPECIAL_SLL:
if (command.Hex != 0) {
sprintf(CommandName,"sll\t%s, %s, 0x%X",GPR_Name[command.rd],
GPR_Name[command.rt], command.sa);
sprintf(CommandName,"sll\t%s, %s, 0x%X",CRegName::GPR[command.rd],
CRegName::GPR[command.rt], command.sa);
} else {
sprintf(CommandName,"nop");
}
break;
case R4300i_SPECIAL_SRL:
sprintf(CommandName,"srl\t%s, %s, 0x%X",GPR_Name[command.rd], GPR_Name[command.rt],
sprintf(CommandName,"srl\t%s, %s, 0x%X",CRegName::GPR[command.rd], CRegName::GPR[command.rt],
command.sa);
break;
case R4300i_SPECIAL_SRA:
sprintf(CommandName,"sra\t%s, %s, 0x%X",GPR_Name[command.rd], GPR_Name[command.rt],
sprintf(CommandName,"sra\t%s, %s, 0x%X",CRegName::GPR[command.rd], CRegName::GPR[command.rt],
command.sa);
break;
case R4300i_SPECIAL_SLLV:
sprintf(CommandName,"sllv\t%s, %s, %s",GPR_Name[command.rd], GPR_Name[command.rt],
GPR_Name[command.rs]);
sprintf(CommandName,"sllv\t%s, %s, %s",CRegName::GPR[command.rd], CRegName::GPR[command.rt],
CRegName::GPR[command.rs]);
break;
case R4300i_SPECIAL_SRLV:
sprintf(CommandName,"srlv\t%s, %s, %s",GPR_Name[command.rd], GPR_Name[command.rt],
GPR_Name[command.rs]);
sprintf(CommandName,"srlv\t%s, %s, %s",CRegName::GPR[command.rd], CRegName::GPR[command.rt],
CRegName::GPR[command.rs]);
break;
case R4300i_SPECIAL_SRAV:
sprintf(CommandName,"srav\t%s, %s, %s",GPR_Name[command.rd], GPR_Name[command.rt],
GPR_Name[command.rs]);
sprintf(CommandName,"srav\t%s, %s, %s",CRegName::GPR[command.rd], CRegName::GPR[command.rt],
CRegName::GPR[command.rs]);
break;
case R4300i_SPECIAL_JR:
sprintf(CommandName,"jr\t%s",GPR_Name[command.rs]);
sprintf(CommandName,"jr\t%s",CRegName::GPR[command.rs]);
break;
case R4300i_SPECIAL_JALR:
sprintf(CommandName,"jalr\t%s, %s",GPR_Name[command.rd],GPR_Name[command.rs]);
sprintf(CommandName,"jalr\t%s, %s",CRegName::GPR[command.rd],CRegName::GPR[command.rs]);
break;
case R4300i_SPECIAL_SYSCALL:
sprintf(CommandName,"system call");
@ -96,147 +96,147 @@ char * R4300iSpecialName ( DWORD OpCode, DWORD PC ) {
sprintf(CommandName,"sync");
break;
case R4300i_SPECIAL_MFHI:
sprintf(CommandName,"mfhi\t%s",GPR_Name[command.rd]);
sprintf(CommandName,"mfhi\t%s",CRegName::GPR[command.rd]);
break;
case R4300i_SPECIAL_MTHI:
sprintf(CommandName,"mthi\t%s",GPR_Name[command.rs]);
sprintf(CommandName,"mthi\t%s",CRegName::GPR[command.rs]);
break;
case R4300i_SPECIAL_MFLO:
sprintf(CommandName,"mflo\t%s",GPR_Name[command.rd]);
sprintf(CommandName,"mflo\t%s",CRegName::GPR[command.rd]);
break;
case R4300i_SPECIAL_MTLO:
sprintf(CommandName,"mtlo\t%s",GPR_Name[command.rs]);
sprintf(CommandName,"mtlo\t%s",CRegName::GPR[command.rs]);
break;
case R4300i_SPECIAL_DSLLV:
sprintf(CommandName,"dsllv\t%s, %s, %s",GPR_Name[command.rd], GPR_Name[command.rt],
GPR_Name[command.rs]);
sprintf(CommandName,"dsllv\t%s, %s, %s",CRegName::GPR[command.rd], CRegName::GPR[command.rt],
CRegName::GPR[command.rs]);
break;
case R4300i_SPECIAL_DSRLV:
sprintf(CommandName,"dsrlv\t%s, %s, %s",GPR_Name[command.rd], GPR_Name[command.rt],
GPR_Name[command.rs]);
sprintf(CommandName,"dsrlv\t%s, %s, %s",CRegName::GPR[command.rd], CRegName::GPR[command.rt],
CRegName::GPR[command.rs]);
break;
case R4300i_SPECIAL_DSRAV:
sprintf(CommandName,"dsrav\t%s, %s, %s",GPR_Name[command.rd], GPR_Name[command.rt],
GPR_Name[command.rs]);
sprintf(CommandName,"dsrav\t%s, %s, %s",CRegName::GPR[command.rd], CRegName::GPR[command.rt],
CRegName::GPR[command.rs]);
break;
case R4300i_SPECIAL_MULT:
sprintf(CommandName,"mult\t%s, %s",GPR_Name[command.rs], GPR_Name[command.rt]);
sprintf(CommandName,"mult\t%s, %s",CRegName::GPR[command.rs], CRegName::GPR[command.rt]);
break;
case R4300i_SPECIAL_MULTU:
sprintf(CommandName,"multu\t%s, %s",GPR_Name[command.rs], GPR_Name[command.rt]);
sprintf(CommandName,"multu\t%s, %s",CRegName::GPR[command.rs], CRegName::GPR[command.rt]);
break;
case R4300i_SPECIAL_DIV:
sprintf(CommandName,"div\t%s, %s",GPR_Name[command.rs], GPR_Name[command.rt]);
sprintf(CommandName,"div\t%s, %s",CRegName::GPR[command.rs], CRegName::GPR[command.rt]);
break;
case R4300i_SPECIAL_DIVU:
sprintf(CommandName,"divu\t%s, %s",GPR_Name[command.rs], GPR_Name[command.rt]);
sprintf(CommandName,"divu\t%s, %s",CRegName::GPR[command.rs], CRegName::GPR[command.rt]);
break;
case R4300i_SPECIAL_DMULT:
sprintf(CommandName,"dmult\t%s, %s",GPR_Name[command.rs], GPR_Name[command.rt]);
sprintf(CommandName,"dmult\t%s, %s",CRegName::GPR[command.rs], CRegName::GPR[command.rt]);
break;
case R4300i_SPECIAL_DMULTU:
sprintf(CommandName,"dmultu\t%s, %s",GPR_Name[command.rs], GPR_Name[command.rt]);
sprintf(CommandName,"dmultu\t%s, %s",CRegName::GPR[command.rs], CRegName::GPR[command.rt]);
break;
case R4300i_SPECIAL_DDIV:
sprintf(CommandName,"ddiv\t%s, %s",GPR_Name[command.rs], GPR_Name[command.rt]);
sprintf(CommandName,"ddiv\t%s, %s",CRegName::GPR[command.rs], CRegName::GPR[command.rt]);
break;
case R4300i_SPECIAL_DDIVU:
sprintf(CommandName,"ddivu\t%s, %s",GPR_Name[command.rs], GPR_Name[command.rt]);
sprintf(CommandName,"ddivu\t%s, %s",CRegName::GPR[command.rs], CRegName::GPR[command.rt]);
break;
case R4300i_SPECIAL_ADD:
sprintf(CommandName,"add\t%s, %s, %s",GPR_Name[command.rd], GPR_Name[command.rs],
GPR_Name[command.rt]);
sprintf(CommandName,"add\t%s, %s, %s",CRegName::GPR[command.rd], CRegName::GPR[command.rs],
CRegName::GPR[command.rt]);
break;
case R4300i_SPECIAL_ADDU:
sprintf(CommandName,"addu\t%s, %s, %s",GPR_Name[command.rd], GPR_Name[command.rs],
GPR_Name[command.rt]);
sprintf(CommandName,"addu\t%s, %s, %s",CRegName::GPR[command.rd], CRegName::GPR[command.rs],
CRegName::GPR[command.rt]);
break;
case R4300i_SPECIAL_SUB:
sprintf(CommandName,"sub\t%s, %s, %s",GPR_Name[command.rd], GPR_Name[command.rs],
GPR_Name[command.rt]);
sprintf(CommandName,"sub\t%s, %s, %s",CRegName::GPR[command.rd], CRegName::GPR[command.rs],
CRegName::GPR[command.rt]);
break;
case R4300i_SPECIAL_SUBU:
sprintf(CommandName,"subu\t%s, %s, %s",GPR_Name[command.rd], GPR_Name[command.rs],
GPR_Name[command.rt]);
sprintf(CommandName,"subu\t%s, %s, %s",CRegName::GPR[command.rd], CRegName::GPR[command.rs],
CRegName::GPR[command.rt]);
break;
case R4300i_SPECIAL_AND:
sprintf(CommandName,"and\t%s, %s, %s",GPR_Name[command.rd], GPR_Name[command.rs],
GPR_Name[command.rt]);
sprintf(CommandName,"and\t%s, %s, %s",CRegName::GPR[command.rd], CRegName::GPR[command.rs],
CRegName::GPR[command.rt]);
break;
case R4300i_SPECIAL_OR:
sprintf(CommandName,"or\t%s, %s, %s",GPR_Name[command.rd], GPR_Name[command.rs],
GPR_Name[command.rt]);
sprintf(CommandName,"or\t%s, %s, %s",CRegName::GPR[command.rd], CRegName::GPR[command.rs],
CRegName::GPR[command.rt]);
break;
case R4300i_SPECIAL_XOR:
sprintf(CommandName,"xor\t%s, %s, %s",GPR_Name[command.rd], GPR_Name[command.rs],
GPR_Name[command.rt]);
sprintf(CommandName,"xor\t%s, %s, %s",CRegName::GPR[command.rd], CRegName::GPR[command.rs],
CRegName::GPR[command.rt]);
break;
case R4300i_SPECIAL_NOR:
sprintf(CommandName,"nor\t%s, %s, %s",GPR_Name[command.rd], GPR_Name[command.rs],
GPR_Name[command.rt]);
sprintf(CommandName,"nor\t%s, %s, %s",CRegName::GPR[command.rd], CRegName::GPR[command.rs],
CRegName::GPR[command.rt]);
break;
case R4300i_SPECIAL_SLT:
sprintf(CommandName,"slt\t%s, %s, %s",GPR_Name[command.rd], GPR_Name[command.rs],
GPR_Name[command.rt]);
sprintf(CommandName,"slt\t%s, %s, %s",CRegName::GPR[command.rd], CRegName::GPR[command.rs],
CRegName::GPR[command.rt]);
break;
case R4300i_SPECIAL_SLTU:
sprintf(CommandName,"sltu\t%s, %s, %s",GPR_Name[command.rd], GPR_Name[command.rs],
GPR_Name[command.rt]);
sprintf(CommandName,"sltu\t%s, %s, %s",CRegName::GPR[command.rd], CRegName::GPR[command.rs],
CRegName::GPR[command.rt]);
break;
case R4300i_SPECIAL_DADD:
sprintf(CommandName,"dadd\t%s, %s, %s",GPR_Name[command.rd], GPR_Name[command.rs],
GPR_Name[command.rt]);
sprintf(CommandName,"dadd\t%s, %s, %s",CRegName::GPR[command.rd], CRegName::GPR[command.rs],
CRegName::GPR[command.rt]);
break;
case R4300i_SPECIAL_DADDU:
sprintf(CommandName,"daddu\t%s, %s, %s",GPR_Name[command.rd], GPR_Name[command.rs],
GPR_Name[command.rt]);
sprintf(CommandName,"daddu\t%s, %s, %s",CRegName::GPR[command.rd], CRegName::GPR[command.rs],
CRegName::GPR[command.rt]);
break;
case R4300i_SPECIAL_DSUB:
sprintf(CommandName,"dsub\t%s, %s, %s",GPR_Name[command.rd], GPR_Name[command.rs],
GPR_Name[command.rt]);
sprintf(CommandName,"dsub\t%s, %s, %s",CRegName::GPR[command.rd], CRegName::GPR[command.rs],
CRegName::GPR[command.rt]);
break;
case R4300i_SPECIAL_DSUBU:
sprintf(CommandName,"dsubu\t%s, %s, %s",GPR_Name[command.rd], GPR_Name[command.rs],
GPR_Name[command.rt]);
sprintf(CommandName,"dsubu\t%s, %s, %s",CRegName::GPR[command.rd], CRegName::GPR[command.rs],
CRegName::GPR[command.rt]);
break;
case R4300i_SPECIAL_TGE:
sprintf(CommandName,"tge\t%s, %s",GPR_Name[command.rs],GPR_Name[command.rt]);
sprintf(CommandName,"tge\t%s, %s",CRegName::GPR[command.rs],CRegName::GPR[command.rt]);
break;
case R4300i_SPECIAL_TGEU:
sprintf(CommandName,"tgeu\t%s, %s",GPR_Name[command.rs],GPR_Name[command.rt]);
sprintf(CommandName,"tgeu\t%s, %s",CRegName::GPR[command.rs],CRegName::GPR[command.rt]);
break;
case R4300i_SPECIAL_TLT:
sprintf(CommandName,"tlt\t%s, %s",GPR_Name[command.rs],GPR_Name[command.rt]);
sprintf(CommandName,"tlt\t%s, %s",CRegName::GPR[command.rs],CRegName::GPR[command.rt]);
break;
case R4300i_SPECIAL_TLTU:
sprintf(CommandName,"tltu\t%s, %s",GPR_Name[command.rs],GPR_Name[command.rt]);
sprintf(CommandName,"tltu\t%s, %s",CRegName::GPR[command.rs],CRegName::GPR[command.rt]);
break;
case R4300i_SPECIAL_TEQ:
sprintf(CommandName,"teq\t%s, %s",GPR_Name[command.rs],GPR_Name[command.rt]);
sprintf(CommandName,"teq\t%s, %s",CRegName::GPR[command.rs],CRegName::GPR[command.rt]);
break;
case R4300i_SPECIAL_TNE:
sprintf(CommandName,"tne\t%s, %s",GPR_Name[command.rs],GPR_Name[command.rt]);
sprintf(CommandName,"tne\t%s, %s",CRegName::GPR[command.rs],CRegName::GPR[command.rt]);
break;
case R4300i_SPECIAL_DSLL:
sprintf(CommandName,"dsll\t%s, %s, 0x%X",GPR_Name[command.rd],
GPR_Name[command.rt], command.sa);
sprintf(CommandName,"dsll\t%s, %s, 0x%X",CRegName::GPR[command.rd],
CRegName::GPR[command.rt], command.sa);
break;
case R4300i_SPECIAL_DSRL:
sprintf(CommandName,"dsrl\t%s, %s, 0x%X",GPR_Name[command.rd], GPR_Name[command.rt],
sprintf(CommandName,"dsrl\t%s, %s, 0x%X",CRegName::GPR[command.rd], CRegName::GPR[command.rt],
command.sa);
break;
case R4300i_SPECIAL_DSRA:
sprintf(CommandName,"dsra\t%s, %s, 0x%X",GPR_Name[command.rd], GPR_Name[command.rt],
sprintf(CommandName,"dsra\t%s, %s, 0x%X",CRegName::GPR[command.rd], CRegName::GPR[command.rt],
command.sa);
break;
case R4300i_SPECIAL_DSLL32:
sprintf(CommandName,"dsll32\t%s, %s, 0x%X",GPR_Name[command.rd],GPR_Name[command.rt], command.sa);
sprintf(CommandName,"dsll32\t%s, %s, 0x%X",CRegName::GPR[command.rd],CRegName::GPR[command.rt], command.sa);
break;
case R4300i_SPECIAL_DSRL32:
sprintf(CommandName,"dsrl32\t%s, %s, 0x%X",GPR_Name[command.rd], GPR_Name[command.rt], command.sa);
sprintf(CommandName,"dsrl32\t%s, %s, 0x%X",CRegName::GPR[command.rd], CRegName::GPR[command.rt], command.sa);
break;
case R4300i_SPECIAL_DSRA32:
sprintf(CommandName,"dsra32\t%s, %s, 0x%X",GPR_Name[command.rd], GPR_Name[command.rt], command.sa);
sprintf(CommandName,"dsra32\t%s, %s, 0x%X",CRegName::GPR[command.rd], CRegName::GPR[command.rt], command.sa);
break;
default:
sprintf(CommandName,"Unknown\t%02X %02X %02X %02X",
@ -251,54 +251,54 @@ char * R4300iRegImmName ( DWORD OpCode, DWORD PC ) {
switch (command.rt) {
case R4300i_REGIMM_BLTZ:
sprintf(CommandName,"bltz\t%s, %s",GPR_Name[command.rs], LabelName(PC + ((short)command.offset << 2) + 4));
sprintf(CommandName,"bltz\t%s, %s",CRegName::GPR[command.rs], LabelName(PC + ((short)command.offset << 2) + 4));
break;
case R4300i_REGIMM_BGEZ:
if (command.rs == 0) {
sprintf(CommandName,"b\t%s", LabelName(PC + ((short)command.offset << 2) + 4));
} else {
sprintf(CommandName,"bgez\t%s, %s",GPR_Name[command.rs], LabelName(PC + ((short)command.offset << 2) + 4));
sprintf(CommandName,"bgez\t%s, %s",CRegName::GPR[command.rs], LabelName(PC + ((short)command.offset << 2) + 4));
}
break;
case R4300i_REGIMM_BLTZL:
sprintf(CommandName,"bltzl\t%s, %s",GPR_Name[command.rs], LabelName(PC + ((short)command.offset << 2) + 4));
sprintf(CommandName,"bltzl\t%s, %s",CRegName::GPR[command.rs], LabelName(PC + ((short)command.offset << 2) + 4));
break;
case R4300i_REGIMM_BGEZL:
sprintf(CommandName,"bgezl\t%s, %s",GPR_Name[command.rs], LabelName(PC + ((short)command.offset << 2) + 4));
sprintf(CommandName,"bgezl\t%s, %s",CRegName::GPR[command.rs], LabelName(PC + ((short)command.offset << 2) + 4));
break;
case R4300i_REGIMM_TGEI:
sprintf(CommandName,"tgei\t%s, 0x%X",GPR_Name[command.rs],command.immediate);
sprintf(CommandName,"tgei\t%s, 0x%X",CRegName::GPR[command.rs],command.immediate);
break;
case R4300i_REGIMM_TGEIU:
sprintf(CommandName,"tgeiu\t%s, 0x%X",GPR_Name[command.rs],command.immediate);
sprintf(CommandName,"tgeiu\t%s, 0x%X",CRegName::GPR[command.rs],command.immediate);
break;
case R4300i_REGIMM_TLTI:
sprintf(CommandName,"tlti\t%s, 0x%X",GPR_Name[command.rs],command.immediate);
sprintf(CommandName,"tlti\t%s, 0x%X",CRegName::GPR[command.rs],command.immediate);
break;
case R4300i_REGIMM_TLTIU:
sprintf(CommandName,"tltiu\t%s, 0x%X",GPR_Name[command.rs],command.immediate);
sprintf(CommandName,"tltiu\t%s, 0x%X",CRegName::GPR[command.rs],command.immediate);
break;
case R4300i_REGIMM_TEQI:
sprintf(CommandName,"teqi\t%s, 0x%X",GPR_Name[command.rs],command.immediate);
sprintf(CommandName,"teqi\t%s, 0x%X",CRegName::GPR[command.rs],command.immediate);
break;
case R4300i_REGIMM_TNEI:
sprintf(CommandName,"tnei\t%s, 0x%X",GPR_Name[command.rs],command.immediate);
sprintf(CommandName,"tnei\t%s, 0x%X",CRegName::GPR[command.rs],command.immediate);
break;
case R4300i_REGIMM_BLTZAL:
sprintf(CommandName,"bltzal\t%s, %s",GPR_Name[command.rs], LabelName(PC + ((short)command.offset << 2) + 4));
sprintf(CommandName,"bltzal\t%s, %s",CRegName::GPR[command.rs], LabelName(PC + ((short)command.offset << 2) + 4));
break;
case R4300i_REGIMM_BGEZAL:
if (command.rs == 0) {
sprintf(CommandName,"bal\t%s",LabelName(PC + ((short)command.offset << 2) + 4));
} else {
sprintf(CommandName,"bgezal\t%s, %s",GPR_Name[command.rs], LabelName(PC + ((short)command.offset << 2) + 4));
sprintf(CommandName,"bgezal\t%s, %s",CRegName::GPR[command.rs], LabelName(PC + ((short)command.offset << 2) + 4));
}
break;
case R4300i_REGIMM_BLTZALL:
sprintf(CommandName,"bltzall\t%s, %s",GPR_Name[command.rs], LabelName(PC + ((short)command.offset << 2) + 4));
sprintf(CommandName,"bltzall\t%s, %s",CRegName::GPR[command.rs], LabelName(PC + ((short)command.offset << 2) + 4));
break;
case R4300i_REGIMM_BGEZALL:
sprintf(CommandName,"bgezall\t%s, %s",GPR_Name[command.rs], LabelName(PC + ((short)command.offset << 2) + 4));
sprintf(CommandName,"bgezall\t%s, %s",CRegName::GPR[command.rs], LabelName(PC + ((short)command.offset << 2) + 4));
break;
default:
sprintf(CommandName,"Unknown\t%02X %02X %02X %02X",
@ -313,22 +313,22 @@ char * R4300iCop1Name ( DWORD OpCode, DWORD PC ) {
switch (command.fmt) {
case R4300i_COP1_MF:
sprintf(CommandName,"mfc1\t%s, %s",GPR_Name[command.rt], FPR_Name[command.fs]);
sprintf(CommandName,"mfc1\t%s, %s",CRegName::GPR[command.rt], CRegName::FPR[command.fs]);
break;
case R4300i_COP1_DMF:
sprintf(CommandName,"dmfc1\t%s, %s",GPR_Name[command.rt], FPR_Name[command.fs]);
sprintf(CommandName,"dmfc1\t%s, %s",CRegName::GPR[command.rt], CRegName::FPR[command.fs]);
break;
case R4300i_COP1_CF:
sprintf(CommandName,"cfc1\t%s, %s",GPR_Name[command.rt], FPR_Ctrl_Name[command.fs]);
sprintf(CommandName,"cfc1\t%s, %s",CRegName::GPR[command.rt], CRegName::FPR_Ctrl[command.fs]);
break;
case R4300i_COP1_MT:
sprintf(CommandName,"mtc1\t%s, %s",GPR_Name[command.rt], FPR_Name[command.fs]);
sprintf(CommandName,"mtc1\t%s, %s",CRegName::GPR[command.rt], CRegName::FPR[command.fs]);
break;
case R4300i_COP1_DMT:
sprintf(CommandName,"dmtc1\t%s, %s",GPR_Name[command.rt], FPR_Name[command.fs]);
sprintf(CommandName,"dmtc1\t%s, %s",CRegName::GPR[command.rt], CRegName::FPR[command.fs]);
break;
case R4300i_COP1_CT:
sprintf(CommandName,"ctc1\t%s, %s",GPR_Name[command.rt], FPR_Ctrl_Name[command.fs]);
sprintf(CommandName,"ctc1\t%s, %s",CRegName::GPR[command.rt], CRegName::FPR_Ctrl[command.fs]);
break;
case R4300i_COP1_BC:
switch (command.ft) {
@ -356,151 +356,151 @@ char * R4300iCop1Name ( DWORD OpCode, DWORD PC ) {
switch (command.funct) {
case R4300i_COP1_FUNCT_ADD:
sprintf(CommandName,"ADD.%s\t%s, %s, %s",FPR_Type(command.fmt),
FPR_Name[command.fd], FPR_Name[command.fs],
FPR_Name[command.ft]);
CRegName::FPR[command.fd], CRegName::FPR[command.fs],
CRegName::FPR[command.ft]);
break;
case R4300i_COP1_FUNCT_SUB:
sprintf(CommandName,"SUB.%s\t%s, %s, %s",FPR_Type(command.fmt),
FPR_Name[command.fd], FPR_Name[command.fs],
FPR_Name[command.ft]);
CRegName::FPR[command.fd], CRegName::FPR[command.fs],
CRegName::FPR[command.ft]);
break;
case R4300i_COP1_FUNCT_MUL:
sprintf(CommandName,"MUL.%s\t%s, %s, %s",FPR_Type(command.fmt),
FPR_Name[command.fd], FPR_Name[command.fs],
FPR_Name[command.ft]);
CRegName::FPR[command.fd], CRegName::FPR[command.fs],
CRegName::FPR[command.ft]);
break;
case R4300i_COP1_FUNCT_DIV:
sprintf(CommandName,"DIV.%s\t%s, %s, %s",FPR_Type(command.fmt),
FPR_Name[command.fd], FPR_Name[command.fs],
FPR_Name[command.ft]);
CRegName::FPR[command.fd], CRegName::FPR[command.fs],
CRegName::FPR[command.ft]);
break;
case R4300i_COP1_FUNCT_SQRT:
sprintf(CommandName,"SQRT.%s\t%s, %s",FPR_Type(command.fmt),
FPR_Name[command.fd], FPR_Name[command.fs]);
CRegName::FPR[command.fd], CRegName::FPR[command.fs]);
break;
case R4300i_COP1_FUNCT_ABS:
sprintf(CommandName,"ABS.%s\t%s, %s",FPR_Type(command.fmt),
FPR_Name[command.fd], FPR_Name[command.fs]);
CRegName::FPR[command.fd], CRegName::FPR[command.fs]);
break;
case R4300i_COP1_FUNCT_MOV:
sprintf(CommandName,"MOV.%s\t%s, %s",FPR_Type(command.fmt),
FPR_Name[command.fd], FPR_Name[command.fs]);
CRegName::FPR[command.fd], CRegName::FPR[command.fs]);
break;
case R4300i_COP1_FUNCT_NEG:
sprintf(CommandName,"NEG.%s\t%s, %s",FPR_Type(command.fmt),
FPR_Name[command.fd], FPR_Name[command.fs]);
CRegName::FPR[command.fd], CRegName::FPR[command.fs]);
break;
case R4300i_COP1_FUNCT_ROUND_L:
sprintf(CommandName,"ROUND.L.%s\t%s, %s",FPR_Type(command.fmt),
FPR_Name[command.fd], FPR_Name[command.fs]);
CRegName::FPR[command.fd], CRegName::FPR[command.fs]);
break;
case R4300i_COP1_FUNCT_TRUNC_L:
sprintf(CommandName,"TRUNC.L.%s\t%s, %s",FPR_Type(command.fmt),
FPR_Name[command.fd], FPR_Name[command.fs]);
CRegName::FPR[command.fd], CRegName::FPR[command.fs]);
break;
case R4300i_COP1_FUNCT_CEIL_L:
sprintf(CommandName,"CEIL.L.%s\t%s, %s",FPR_Type(command.fmt),
FPR_Name[command.fd], FPR_Name[command.fs]);
CRegName::FPR[command.fd], CRegName::FPR[command.fs]);
break;
case R4300i_COP1_FUNCT_FLOOR_L:
sprintf(CommandName,"FLOOR.L.%s\t%s, %s",FPR_Type(command.fmt),
FPR_Name[command.fd], FPR_Name[command.fs]);
CRegName::FPR[command.fd], CRegName::FPR[command.fs]);
break;
case R4300i_COP1_FUNCT_ROUND_W:
sprintf(CommandName,"ROUND.W.%s\t%s, %s",FPR_Type(command.fmt),
FPR_Name[command.fd], FPR_Name[command.fs]);
CRegName::FPR[command.fd], CRegName::FPR[command.fs]);
break;
case R4300i_COP1_FUNCT_TRUNC_W:
sprintf(CommandName,"TRUNC.W.%s\t%s, %s",FPR_Type(command.fmt),
FPR_Name[command.fd], FPR_Name[command.fs]);
CRegName::FPR[command.fd], CRegName::FPR[command.fs]);
break;
case R4300i_COP1_FUNCT_CEIL_W:
sprintf(CommandName,"CEIL.W.%s\t%s, %s",FPR_Type(command.fmt),
FPR_Name[command.fd], FPR_Name[command.fs]);
CRegName::FPR[command.fd], CRegName::FPR[command.fs]);
break;
case R4300i_COP1_FUNCT_FLOOR_W:
sprintf(CommandName,"FLOOR.W.%s\t%s, %s",FPR_Type(command.fmt),
FPR_Name[command.fd], FPR_Name[command.fs]);
CRegName::FPR[command.fd], CRegName::FPR[command.fs]);
break;
case R4300i_COP1_FUNCT_CVT_S:
sprintf(CommandName,"CVT.S.%s\t%s, %s",FPR_Type(command.fmt),
FPR_Name[command.fd], FPR_Name[command.fs]);
CRegName::FPR[command.fd], CRegName::FPR[command.fs]);
break;
case R4300i_COP1_FUNCT_CVT_D:
sprintf(CommandName,"CVT.D.%s\t%s, %s",FPR_Type(command.fmt),
FPR_Name[command.fd], FPR_Name[command.fs]);
CRegName::FPR[command.fd], CRegName::FPR[command.fs]);
break;
case R4300i_COP1_FUNCT_CVT_W:
sprintf(CommandName,"CVT.W.%s\t%s, %s",FPR_Type(command.fmt),
FPR_Name[command.fd], FPR_Name[command.fs]);
CRegName::FPR[command.fd], CRegName::FPR[command.fs]);
break;
case R4300i_COP1_FUNCT_CVT_L:
sprintf(CommandName,"CVT.L.%s\t%s, %s",FPR_Type(command.fmt),
FPR_Name[command.fd], FPR_Name[command.fs]);
CRegName::FPR[command.fd], CRegName::FPR[command.fs]);
break;
case R4300i_COP1_FUNCT_C_F:
sprintf(CommandName,"C.F.%s\t%s, %s",FPR_Type(command.fmt),
FPR_Name[command.fs], FPR_Name[command.ft]);
CRegName::FPR[command.fs], CRegName::FPR[command.ft]);
break;
case R4300i_COP1_FUNCT_C_UN:
sprintf(CommandName,"C.UN.%s\t%s, %s",FPR_Type(command.fmt),
FPR_Name[command.fs], FPR_Name[command.ft]);
CRegName::FPR[command.fs], CRegName::FPR[command.ft]);
break;
case R4300i_COP1_FUNCT_C_EQ:
sprintf(CommandName,"C.EQ.%s\t%s, %s",FPR_Type(command.fmt),
FPR_Name[command.fs], FPR_Name[command.ft]);
CRegName::FPR[command.fs], CRegName::FPR[command.ft]);
break;
case R4300i_COP1_FUNCT_C_UEQ:
sprintf(CommandName,"C.UEQ.%s\t%s, %s",FPR_Type(command.fmt),
FPR_Name[command.fs], FPR_Name[command.ft]);
CRegName::FPR[command.fs], CRegName::FPR[command.ft]);
break;
case R4300i_COP1_FUNCT_C_OLT:
sprintf(CommandName,"C.OLT.%s\t%s, %s",FPR_Type(command.fmt),
FPR_Name[command.fs], FPR_Name[command.ft]);
CRegName::FPR[command.fs], CRegName::FPR[command.ft]);
break;
case R4300i_COP1_FUNCT_C_ULT:
sprintf(CommandName,"C.ULT.%s\t%s, %s",FPR_Type(command.fmt),
FPR_Name[command.fs], FPR_Name[command.ft]);
CRegName::FPR[command.fs], CRegName::FPR[command.ft]);
break;
case R4300i_COP1_FUNCT_C_OLE:
sprintf(CommandName,"C.OLE.%s\t%s, %s",FPR_Type(command.fmt),
FPR_Name[command.fs], FPR_Name[command.ft]);
CRegName::FPR[command.fs], CRegName::FPR[command.ft]);
break;
case R4300i_COP1_FUNCT_C_ULE:
sprintf(CommandName,"C.ULE.%s\t%s, %s",FPR_Type(command.fmt),
FPR_Name[command.fs], FPR_Name[command.ft]);
CRegName::FPR[command.fs], CRegName::FPR[command.ft]);
break;
case R4300i_COP1_FUNCT_C_SF:
sprintf(CommandName,"C.SF.%s\t%s, %s",FPR_Type(command.fmt),
FPR_Name[command.fs], FPR_Name[command.ft]);
CRegName::FPR[command.fs], CRegName::FPR[command.ft]);
break;
case R4300i_COP1_FUNCT_C_NGLE:
sprintf(CommandName,"C.NGLE.%s\t%s, %s",FPR_Type(command.fmt),
FPR_Name[command.fs], FPR_Name[command.ft]);
CRegName::FPR[command.fs], CRegName::FPR[command.ft]);
break;
case R4300i_COP1_FUNCT_C_SEQ:
sprintf(CommandName,"C.SEQ.%s\t%s, %s",FPR_Type(command.fmt),
FPR_Name[command.fs], FPR_Name[command.ft]);
CRegName::FPR[command.fs], CRegName::FPR[command.ft]);
break;
case R4300i_COP1_FUNCT_C_NGL:
sprintf(CommandName,"C.NGL.%s\t%s, %s",FPR_Type(command.fmt),
FPR_Name[command.fs], FPR_Name[command.ft]);
CRegName::FPR[command.fs], CRegName::FPR[command.ft]);
break;
case R4300i_COP1_FUNCT_C_LT:
sprintf(CommandName,"C.LT.%s\t%s, %s",FPR_Type(command.fmt),
FPR_Name[command.fs], FPR_Name[command.ft]);
CRegName::FPR[command.fs], CRegName::FPR[command.ft]);
break;
case R4300i_COP1_FUNCT_C_NGE:
sprintf(CommandName,"C.NGE.%s\t%s, %s",FPR_Type(command.fmt),
FPR_Name[command.fs], FPR_Name[command.ft]);
CRegName::FPR[command.fs], CRegName::FPR[command.ft]);
break;
case R4300i_COP1_FUNCT_C_LE:
sprintf(CommandName,"C.LE.%s\t%s, %s",FPR_Type(command.fmt),
FPR_Name[command.fs], FPR_Name[command.ft]);
CRegName::FPR[command.fs], CRegName::FPR[command.ft]);
break;
case R4300i_COP1_FUNCT_C_NGT:
sprintf(CommandName,"C.NGT.%s\t%s, %s",FPR_Type(command.fmt),
FPR_Name[command.fs], FPR_Name[command.ft]);
CRegName::FPR[command.fs], CRegName::FPR[command.ft]);
break;
default:
sprintf(CommandName,"Unknown Cop1\t%02X %02X %02X %02X",
@ -535,59 +535,59 @@ char * R4300iOpcodeName ( DWORD OpCode, DWORD PC ) {
if (command.rs == 0 && command.rt == 0) {
sprintf(CommandName,"b\t%s", LabelName(PC + ((short)command.offset << 2) + 4));
} else if (command.rs == 0 || command.rt == 0) {
sprintf(CommandName,"beqz\t%s, %s", GPR_Name[command.rs == 0 ? command.rt : command.rs ],
sprintf(CommandName,"beqz\t%s, %s", CRegName::GPR[command.rs == 0 ? command.rt : command.rs ],
LabelName(PC + ((short)command.offset << 2) + 4));
} else {
sprintf(CommandName,"beq\t%s, %s, %s", GPR_Name[command.rs], GPR_Name[command.rt],
sprintf(CommandName,"beq\t%s, %s, %s", CRegName::GPR[command.rs], CRegName::GPR[command.rt],
LabelName(PC + ((short)command.offset << 2) + 4));
}
break;
case R4300i_BNE:
if ((command.rs == 0) ^ (command.rt == 0)){
sprintf(CommandName,"bnez\t%s, %s", GPR_Name[command.rs == 0 ? command.rt : command.rs ],
sprintf(CommandName,"bnez\t%s, %s", CRegName::GPR[command.rs == 0 ? command.rt : command.rs ],
LabelName(PC + ((short)command.offset << 2) + 4));
} else {
sprintf(CommandName,"bne\t%s, %s, %s", GPR_Name[command.rs], GPR_Name[command.rt],
sprintf(CommandName,"bne\t%s, %s, %s", CRegName::GPR[command.rs], CRegName::GPR[command.rt],
LabelName(PC + ((short)command.offset << 2) + 4));
}
break;
case R4300i_BLEZ:
sprintf(CommandName,"blez\t%s, %s",GPR_Name[command.rs], LabelName(PC + ((short)command.offset << 2) + 4));
sprintf(CommandName,"blez\t%s, %s",CRegName::GPR[command.rs], LabelName(PC + ((short)command.offset << 2) + 4));
break;
case R4300i_BGTZ:
sprintf(CommandName,"bgtz\t%s, %s",GPR_Name[command.rs], LabelName(PC + ((short)command.offset << 2) + 4));
sprintf(CommandName,"bgtz\t%s, %s",CRegName::GPR[command.rs], LabelName(PC + ((short)command.offset << 2) + 4));
break;
case R4300i_ADDI:
sprintf(CommandName,"addi\t%s, %s, 0x%X",GPR_Name[command.rt], GPR_Name[command.rs],command.immediate);
sprintf(CommandName,"addi\t%s, %s, 0x%X",CRegName::GPR[command.rt], CRegName::GPR[command.rs],command.immediate);
break;
case R4300i_ADDIU:
sprintf(CommandName,"addiu\t%s, %s, 0x%X",GPR_Name[command.rt], GPR_Name[command.rs],command.immediate);
sprintf(CommandName,"addiu\t%s, %s, 0x%X",CRegName::GPR[command.rt], CRegName::GPR[command.rs],command.immediate);
break;
case R4300i_SLTI:
sprintf(CommandName,"slti\t%s, %s, 0x%X",GPR_Name[command.rt], GPR_Name[command.rs],command.immediate);
sprintf(CommandName,"slti\t%s, %s, 0x%X",CRegName::GPR[command.rt], CRegName::GPR[command.rs],command.immediate);
break;
case R4300i_SLTIU:
sprintf(CommandName,"sltiu\t%s, %s, 0x%X",GPR_Name[command.rt], GPR_Name[command.rs],command.immediate);
sprintf(CommandName,"sltiu\t%s, %s, 0x%X",CRegName::GPR[command.rt], CRegName::GPR[command.rs],command.immediate);
break;
case R4300i_ANDI:
sprintf(CommandName,"andi\t%s, %s, 0x%X",GPR_Name[command.rt], GPR_Name[command.rs],command.immediate);
sprintf(CommandName,"andi\t%s, %s, 0x%X",CRegName::GPR[command.rt], CRegName::GPR[command.rs],command.immediate);
break;
case R4300i_ORI:
sprintf(CommandName,"ori\t%s, %s, 0x%X",GPR_Name[command.rt], GPR_Name[command.rs],command.immediate);
sprintf(CommandName,"ori\t%s, %s, 0x%X",CRegName::GPR[command.rt], CRegName::GPR[command.rs],command.immediate);
break;
case R4300i_XORI:
sprintf(CommandName,"xori\t%s, %s, 0x%X",GPR_Name[command.rt], GPR_Name[command.rs],command.immediate);
sprintf(CommandName,"xori\t%s, %s, 0x%X",CRegName::GPR[command.rt], CRegName::GPR[command.rs],command.immediate);
break;
case R4300i_LUI:
sprintf(CommandName,"lui\t%s, 0x%X",GPR_Name[command.rt], command.immediate);
sprintf(CommandName,"lui\t%s, 0x%X",CRegName::GPR[command.rt], command.immediate);
break;
case R4300i_CP0:
switch (command.rs) {
case R4300i_COP0_MF:
sprintf(CommandName,"mfc0\t%s, %s",GPR_Name[command.rt], Cop0_Name[command.rd]);
sprintf(CommandName,"mfc0\t%s, %s",CRegName::GPR[command.rt], CRegName::Cop0[command.rd]);
break;
case R4300i_COP0_MT:
sprintf(CommandName,"mtc0\t%s, %s",GPR_Name[command.rt], Cop0_Name[command.rd]);
sprintf(CommandName,"mtc0\t%s, %s",CRegName::GPR[command.rt], CRegName::Cop0[command.rd]);
break;
default:
if ( (command.rs & 0x10 ) != 0 ) {
@ -614,111 +614,111 @@ char * R4300iOpcodeName ( DWORD OpCode, DWORD PC ) {
if (command.rs == command.rt) {
sprintf(CommandName,"b\t%s", LabelName(PC + ((short)command.offset << 2) + 4));
} else if ((command.rs == 0) ^ (command.rt == 0)){
sprintf(CommandName,"beqzl\t%s, %s", GPR_Name[command.rs == 0 ? command.rt : command.rs ],
sprintf(CommandName,"beqzl\t%s, %s", CRegName::GPR[command.rs == 0 ? command.rt : command.rs ],
LabelName(PC + ((short)command.offset << 2) + 4));
} else {
sprintf(CommandName,"beql\t%s, %s, %s", GPR_Name[command.rs], GPR_Name[command.rt],
sprintf(CommandName,"beql\t%s, %s, %s", CRegName::GPR[command.rs], CRegName::GPR[command.rt],
LabelName(PC + ((short)command.offset << 2) + 4));
}
break;
case R4300i_BNEL:
if ((command.rs == 0) ^ (command.rt == 0)){
sprintf(CommandName,"bnezl\t%s, %s", GPR_Name[command.rs == 0 ? command.rt : command.rs ],
sprintf(CommandName,"bnezl\t%s, %s", CRegName::GPR[command.rs == 0 ? command.rt : command.rs ],
LabelName(PC + ((short)command.offset << 2) + 4));
} else {
sprintf(CommandName,"bnel\t%s, %s, %s", GPR_Name[command.rs], GPR_Name[command.rt],
sprintf(CommandName,"bnel\t%s, %s, %s", CRegName::GPR[command.rs], CRegName::GPR[command.rt],
LabelName(PC + ((short)command.offset << 2) + 4));
}
break;
case R4300i_BLEZL:
sprintf(CommandName,"blezl\t%s, %s",GPR_Name[command.rs], LabelName(PC + ((short)command.offset << 2) + 4));
sprintf(CommandName,"blezl\t%s, %s",CRegName::GPR[command.rs], LabelName(PC + ((short)command.offset << 2) + 4));
break;
case R4300i_BGTZL:
sprintf(CommandName,"bgtzl\t%s, %s",GPR_Name[command.rs], LabelName(PC + ((short)command.offset << 2) + 4));
sprintf(CommandName,"bgtzl\t%s, %s",CRegName::GPR[command.rs], LabelName(PC + ((short)command.offset << 2) + 4));
break;
case R4300i_DADDI:
sprintf(CommandName,"daddi\t%s, %s, 0x%X",GPR_Name[command.rt], GPR_Name[command.rs],command.immediate);
sprintf(CommandName,"daddi\t%s, %s, 0x%X",CRegName::GPR[command.rt], CRegName::GPR[command.rs],command.immediate);
break;
case R4300i_DADDIU:
sprintf(CommandName,"daddiu\t%s, %s, 0x%X",GPR_Name[command.rt], GPR_Name[command.rs],command.immediate);
sprintf(CommandName,"daddiu\t%s, %s, 0x%X",CRegName::GPR[command.rt], CRegName::GPR[command.rs],command.immediate);
break;
case R4300i_LDL:
sprintf(CommandName,"ldl\t%s, 0x%X (%s)",GPR_Name[command.rt], command.offset, GPR_Name[command.base]);
sprintf(CommandName,"ldl\t%s, 0x%X (%s)",CRegName::GPR[command.rt], command.offset, CRegName::GPR[command.base]);
break;
case R4300i_LDR:
sprintf(CommandName,"ldr\t%s, 0x%X (%s)",GPR_Name[command.rt], command.offset, GPR_Name[command.base]);
sprintf(CommandName,"ldr\t%s, 0x%X (%s)",CRegName::GPR[command.rt], command.offset, CRegName::GPR[command.base]);
break;
case R4300i_LB:
sprintf(CommandName,"lb\t%s, 0x%X (%s)",GPR_Name[command.rt], command.offset, GPR_Name[command.base]);
sprintf(CommandName,"lb\t%s, 0x%X (%s)",CRegName::GPR[command.rt], command.offset, CRegName::GPR[command.base]);
break;
case R4300i_LH:
sprintf(CommandName,"lh\t%s, 0x%X (%s)",GPR_Name[command.rt], command.offset, GPR_Name[command.base]);
sprintf(CommandName,"lh\t%s, 0x%X (%s)",CRegName::GPR[command.rt], command.offset, CRegName::GPR[command.base]);
break;
case R4300i_LWL:
sprintf(CommandName,"lwl\t%s, 0x%X (%s)",GPR_Name[command.rt], command.offset, GPR_Name[command.base]);
sprintf(CommandName,"lwl\t%s, 0x%X (%s)",CRegName::GPR[command.rt], command.offset, CRegName::GPR[command.base]);
break;
case R4300i_LW:
sprintf(CommandName,"lw\t%s, 0x%X (%s)",GPR_Name[command.rt], command.offset, GPR_Name[command.base]);
sprintf(CommandName,"lw\t%s, 0x%X (%s)",CRegName::GPR[command.rt], command.offset, CRegName::GPR[command.base]);
break;
case R4300i_LBU:
sprintf(CommandName,"lbu\t%s, 0x%X (%s)",GPR_Name[command.rt], command.offset, GPR_Name[command.base]);
sprintf(CommandName,"lbu\t%s, 0x%X (%s)",CRegName::GPR[command.rt], command.offset, CRegName::GPR[command.base]);
break;
case R4300i_LHU:
sprintf(CommandName,"lhu\t%s, 0x%X (%s)",GPR_Name[command.rt], command.offset, GPR_Name[command.base]);
sprintf(CommandName,"lhu\t%s, 0x%X (%s)",CRegName::GPR[command.rt], command.offset, CRegName::GPR[command.base]);
break;
case R4300i_LWR:
sprintf(CommandName,"lwr\t%s, 0x%X (%s)",GPR_Name[command.rt], command.offset, GPR_Name[command.base]);
sprintf(CommandName,"lwr\t%s, 0x%X (%s)",CRegName::GPR[command.rt], command.offset, CRegName::GPR[command.base]);
break;
case R4300i_LWU:
sprintf(CommandName,"lwu\t%s, 0x%X (%s)",GPR_Name[command.rt], command.offset, GPR_Name[command.base]);
sprintf(CommandName,"lwu\t%s, 0x%X (%s)",CRegName::GPR[command.rt], command.offset, CRegName::GPR[command.base]);
break;
case R4300i_SB:
sprintf(CommandName,"sb\t%s, 0x%X (%s)",GPR_Name[command.rt], command.offset, GPR_Name[command.base]);
sprintf(CommandName,"sb\t%s, 0x%X (%s)",CRegName::GPR[command.rt], command.offset, CRegName::GPR[command.base]);
break;
case R4300i_SH:
sprintf(CommandName,"sh\t%s, 0x%X (%s)",GPR_Name[command.rt], command.offset, GPR_Name[command.base]);
sprintf(CommandName,"sh\t%s, 0x%X (%s)",CRegName::GPR[command.rt], command.offset, CRegName::GPR[command.base]);
break;
case R4300i_SWL:
sprintf(CommandName,"swl\t%s, 0x%X (%s)",GPR_Name[command.rt], command.offset, GPR_Name[command.base]);
sprintf(CommandName,"swl\t%s, 0x%X (%s)",CRegName::GPR[command.rt], command.offset, CRegName::GPR[command.base]);
break;
case R4300i_SW:
sprintf(CommandName,"sw\t%s, 0x%X (%s)",GPR_Name[command.rt], command.offset, GPR_Name[command.base]);
sprintf(CommandName,"sw\t%s, 0x%X (%s)",CRegName::GPR[command.rt], command.offset, CRegName::GPR[command.base]);
break;
case R4300i_SDL:
sprintf(CommandName,"sdl\t%s, 0x%X (%s)",GPR_Name[command.rt], command.offset, GPR_Name[command.base]);
sprintf(CommandName,"sdl\t%s, 0x%X (%s)",CRegName::GPR[command.rt], command.offset, CRegName::GPR[command.base]);
break;
case R4300i_SDR:
sprintf(CommandName,"sdr\t%s, 0x%X (%s)",GPR_Name[command.rt], command.offset, GPR_Name[command.base]);
sprintf(CommandName,"sdr\t%s, 0x%X (%s)",CRegName::GPR[command.rt], command.offset, CRegName::GPR[command.base]);
break;
case R4300i_SWR:
sprintf(CommandName,"swr\t%s, 0x%X (%s)",GPR_Name[command.rt], command.offset, GPR_Name[command.base]);
sprintf(CommandName,"swr\t%s, 0x%X (%s)",CRegName::GPR[command.rt], command.offset, CRegName::GPR[command.base]);
break;
case R4300i_CACHE:
sprintf(CommandName,"cache\t%d, 0x%X (%s)",command.rt, command.offset, GPR_Name[command.base]);
sprintf(CommandName,"cache\t%d, 0x%X (%s)",command.rt, command.offset, CRegName::GPR[command.base]);
break;
case R4300i_LL:
sprintf(CommandName,"ll\t%s, 0x%X (%s)",GPR_Name[command.rt], command.offset, GPR_Name[command.base]);
sprintf(CommandName,"ll\t%s, 0x%X (%s)",CRegName::GPR[command.rt], command.offset, CRegName::GPR[command.base]);
break;
case R4300i_LWC1:
sprintf(CommandName,"lwc1\t%s, 0x%X (%s)",FPR_Name[command.rt], command.offset, GPR_Name[command.base]);
sprintf(CommandName,"lwc1\t%s, 0x%X (%s)",CRegName::FPR[command.rt], command.offset, CRegName::GPR[command.base]);
break;
case R4300i_LDC1:
sprintf(CommandName,"ldc1\t%s, 0x%X (%s)",FPR_Name[command.rt], command.offset, GPR_Name[command.base]);
sprintf(CommandName,"ldc1\t%s, 0x%X (%s)",CRegName::FPR[command.rt], command.offset, CRegName::GPR[command.base]);
break;
case R4300i_LD:
sprintf(CommandName,"ld\t%s, 0x%X (%s)",GPR_Name[command.rt], command.offset, GPR_Name[command.base]);
sprintf(CommandName,"ld\t%s, 0x%X (%s)",CRegName::GPR[command.rt], command.offset, CRegName::GPR[command.base]);
break;
case R4300i_SC:
sprintf(CommandName,"sc\t%s, 0x%X (%s)",GPR_Name[command.rt], command.offset, GPR_Name[command.base]);
sprintf(CommandName,"sc\t%s, 0x%X (%s)",CRegName::GPR[command.rt], command.offset, CRegName::GPR[command.base]);
break;
case R4300i_SWC1:
sprintf(CommandName,"swc1\t%s, 0x%X (%s)",FPR_Name[command.rt], command.offset, GPR_Name[command.base]);
sprintf(CommandName,"swc1\t%s, 0x%X (%s)",CRegName::FPR[command.rt], command.offset, CRegName::GPR[command.base]);
break;
case R4300i_SDC1:
sprintf(CommandName,"sdc1\t%s, 0x%X (%s)",FPR_Name[command.rt], command.offset, GPR_Name[command.base]);
sprintf(CommandName,"sdc1\t%s, 0x%X (%s)",CRegName::FPR[command.rt], command.offset, CRegName::GPR[command.base]);
break;
case R4300i_SD:
sprintf(CommandName,"sd\t%s, 0x%X (%s)",GPR_Name[command.rt], command.offset, GPR_Name[command.base]);
sprintf(CommandName,"sd\t%s, 0x%X (%s)",CRegName::GPR[command.rt], command.offset, CRegName::GPR[command.base]);
break;
default:
sprintf(CommandName,"Unknown\t%02X %02X %02X %02X",

6
Source/Project64/N64 System/Cheat Class.cpp
View File

@ -1,8 +1,4 @@
#include "..\N64 System.h"
#include <Windows.h>
#include <windowsx.h>
#include <commctrl.h>
#include "stdafx.h"
#include "Settings/SettingType/SettingsType-Cheats.h"

2
Source/Project64/N64 System/Debugger/Debugger - Memory Dump.cpp
View File

@ -84,7 +84,7 @@ LRESULT CDumpMemory::OnClicked(WORD wNotifyCode, WORD wID, HWND hWndCtl, BOOL& b
}
if (SendDlgItemMessage(IDC_USE_ALT_PC,BM_GETSTATE, 0,0) != BST_CHECKED)
{
DumpPC = _Reg->PROGRAM_COUNTER;
DumpPC = _Reg->m_PROGRAM_COUNTER;
}
//disable buttons
::EnableWindow(GetDlgItem(IDC_E_START_ADDR),FALSE);

35
Source/Project64/N64 System/Mips/Audio.cpp
View File

@ -1,32 +1,4 @@
/*
* Project 64 - A Nintendo 64 emulator.
*
* (c) Copyright 2001 zilmar (zilmar@emulation64.com) and
* Jabo (jabo@emulation64.com).
*
* pj64 homepage: www.pj64.net
*
* Permission to use, copy, modify and distribute Project64 in both binary and
* source form, for non-commercial purposes, is hereby granted without fee,
* providing that this license information and copyright notice appear with
* all copies and any derived work.
*
* This software is provided 'as-is', without any express or implied
* warranty. In no event shall the authors be held liable for any damages
* arising from the use of this software.
*
* Project64 is freeware for PERSONAL USE only. Commercial users should
* seek permission of the copyright holders first. Commercial use includes
* charging money for Project64 or software derived from Project64.
*
* The copyright holders request that bug fixes and improvements to the code
* should be forwarded to them so if they want them.
*
*/
#include <windows.h>
#include <stdio.h>
#include "..\..\N64 System.h"
#include "stdafx.h"
// ****************** Testing Audio Stuff *****************
CAudio::CAudio (void)
@ -55,7 +27,10 @@ void CAudio::AiCallBack ()
{
if (m_SecondBuff != 0) {
m_IntScheduled = (DWORD)((double)m_SecondBuff * m_CountsPerByte);
_Notify->BreakPoint(__FILE__,__LINE__);
#ifdef tofix
_Reg->ChangeTimerFixed(AiTimer, m_IntScheduled);
#endif
}
m_CurrentCount = _Reg->COUNT_REGISTER;
m_CurrentLength = m_SecondBuff;
@ -96,7 +71,7 @@ void CAudio::AiSetLength (void)
m_CurrentLength = _Reg->AI_LEN_REG;
m_CurrentCount = _Reg->COUNT_REGISTER;
m_IntScheduled = (DWORD)((double)_Reg->AI_LEN_REG * m_CountsPerByte);
_Reg->ChangeTimerFixed(AiTimer, m_IntScheduled);
_SystemTimer->SetTimer(CSystemTimer::AiTimer,m_IntScheduled,false);
} else {
m_SecondBuff = _Reg->AI_LEN_REG;
m_Status |= 0x80000000;

2
Source/Project64/N64 System/Mips/Memory Class.h
View File

@ -74,7 +74,7 @@ class CMipsMemoryVM :
friend CRSP_Plugin;
friend CControl_Plugin;
friend CN64System; //Need to manipulate all memory in loading/saveing save state
friend CC_Core;
// friend CC_Core;
#ifdef toremove
CNotification * const _Notify; //Original Notify member used to notify the user when something occurs

3
Source/Project64/N64 System/Mips/Memory Labels Class.cpp
View File

@ -1,5 +1,4 @@
#include "..\..\N64 System.h"
#include <windows.h>
#include "stdafx.h"
DWORD CMemoryLabel::AsciiToHex (char * HexValue) {
DWORD Count, Finish, Value = 0;

498
Source/Project64/N64 System/Mips/Memory.cpp
View File

@ -1,17 +1,4 @@
#include "..\..\N64 System.h"
#include "..\..\Plugin.h"
#include "../C Core/Registers.h"
#include "../C Core/CPU Log.h"
#include "../C Core/X86.h"
#include "../C Core/Dma.h"
#include "../C Core/Plugin.h"
#include "../C Core/Exception.h"
#include "../C Core/C Core Interface.h"
#include "../C Core/Pif.h"
#include <windows.h> //needed for virtual memory
void DisplayError ( const char * Message, ... );
#include "stdafx.h"
void ** JumpTable, ** DelaySlotTable;
BYTE *RecompCode, *RecompPos;
@ -2008,16 +1995,16 @@ int CMipsMemoryVM::LW_NonMemory ( DWORD PAddr, DWORD * Value ) {
switch (PAddr & 0xFFF00000) {
case 0x03F00000:
switch (PAddr) {
case 0x03F00000: * Value = RDRAM_CONFIG_REG; break;
case 0x03F00004: * Value = RDRAM_DEVICE_ID_REG; break;
case 0x03F00008: * Value = RDRAM_DELAY_REG; break;
case 0x03F0000C: * Value = RDRAM_MODE_REG; break;
case 0x03F00010: * Value = RDRAM_REF_INTERVAL_REG; break;
case 0x03F00014: * Value = RDRAM_REF_ROW_REG; break;
case 0x03F00018: * Value = RDRAM_RAS_INTERVAL_REG; break;
case 0x03F0001C: * Value = RDRAM_MIN_INTERVAL_REG; break;
case 0x03F00020: * Value = RDRAM_ADDR_SELECT_REG; break;
case 0x03F00024: * Value = RDRAM_DEVICE_MANUF_REG; break;
case 0x03F00000: * Value = _Reg->RDRAM_CONFIG_REG; break;
case 0x03F00004: * Value = _Reg->RDRAM_DEVICE_ID_REG; break;
case 0x03F00008: * Value = _Reg->RDRAM_DELAY_REG; break;
case 0x03F0000C: * Value = _Reg->RDRAM_MODE_REG; break;
case 0x03F00010: * Value = _Reg->RDRAM_REF_INTERVAL_REG; break;
case 0x03F00014: * Value = _Reg->RDRAM_REF_ROW_REG; break;
case 0x03F00018: * Value = _Reg->RDRAM_RAS_INTERVAL_REG; break;
case 0x03F0001C: * Value = _Reg->RDRAM_MIN_INTERVAL_REG; break;
case 0x03F00020: * Value = _Reg->RDRAM_ADDR_SELECT_REG; break;
case 0x03F00024: * Value = _Reg->RDRAM_DEVICE_MANUF_REG; break;
default:
* Value = 0;
return FALSE;
@ -2025,10 +2012,10 @@ int CMipsMemoryVM::LW_NonMemory ( DWORD PAddr, DWORD * Value ) {
break;
case 0x04000000:
switch (PAddr) {
case 0x04040010: *Value = SP_STATUS_REG; break;
case 0x04040014: *Value = SP_DMA_FULL_REG; break;
case 0x04040018: *Value = SP_DMA_BUSY_REG; break;
case 0x04080000: *Value = SP_PC_REG; break;
case 0x04040010: *Value = _Reg->SP_STATUS_REG; break;
case 0x04040014: *Value = _Reg->SP_DMA_FULL_REG; break;
case 0x04040018: *Value = _Reg->SP_DMA_BUSY_REG; break;
case 0x04080000: *Value = _Reg->SP_PC_REG; break;
default:
* Value = 0;
return FALSE;
@ -2036,11 +2023,11 @@ int CMipsMemoryVM::LW_NonMemory ( DWORD PAddr, DWORD * Value ) {
break;
case 0x04100000:
switch (PAddr) {
case 0x0410000C: *Value = DPC_STATUS_REG; break;
case 0x04100010: *Value = DPC_CLOCK_REG; break;
case 0x04100014: *Value = DPC_BUFBUSY_REG; break;
case 0x04100018: *Value = DPC_PIPEBUSY_REG; break;
case 0x0410001C: *Value = DPC_TMEM_REG; break;
case 0x0410000C: *Value = _Reg->DPC_STATUS_REG; break;
case 0x04100010: *Value = _Reg->DPC_CLOCK_REG; break;
case 0x04100014: *Value = _Reg->DPC_BUFBUSY_REG; break;
case 0x04100018: *Value = _Reg->DPC_PIPEBUSY_REG; break;
case 0x0410001C: *Value = _Reg->DPC_TMEM_REG; break;
default:
* Value = 0;
return FALSE;
@ -2048,10 +2035,10 @@ int CMipsMemoryVM::LW_NonMemory ( DWORD PAddr, DWORD * Value ) {
break;
case 0x04300000:
switch (PAddr) {
case 0x04300000: * Value = MI_MODE_REG; break;
case 0x04300004: * Value = MI_VERSION_REG; break;
case 0x04300008: * Value = MI_INTR_REG; break;
case 0x0430000C: * Value = MI_INTR_MASK_REG; break;
case 0x04300000: * Value = _Reg->MI_MODE_REG; break;
case 0x04300004: * Value = _Reg->MI_VERSION_REG; break;
case 0x04300008: * Value = _Reg->MI_INTR_REG; break;
case 0x0430000C: * Value = _Reg->MI_INTR_MASK_REG; break;
default:
* Value = 0;
return FALSE;
@ -2059,23 +2046,23 @@ int CMipsMemoryVM::LW_NonMemory ( DWORD PAddr, DWORD * Value ) {
break;
case 0x04400000:
switch (PAddr) {
case 0x04400000: *Value = VI_STATUS_REG; break;
case 0x04400004: *Value = VI_ORIGIN_REG; break;
case 0x04400008: *Value = VI_WIDTH_REG; break;
case 0x0440000C: *Value = VI_INTR_REG; break;
case 0x04400000: *Value = _Reg->VI_STATUS_REG; break;
case 0x04400004: *Value = _Reg->VI_ORIGIN_REG; break;
case 0x04400008: *Value = _Reg->VI_WIDTH_REG; break;
case 0x0440000C: *Value = _Reg->VI_INTR_REG; break;
case 0x04400010:
UpdateHalfLine();
*Value = m_HalfLine;
break;
case 0x04400014: *Value = VI_BURST_REG; break;
case 0x04400018: *Value = VI_V_SYNC_REG; break;
case 0x0440001C: *Value = VI_H_SYNC_REG; break;
case 0x04400020: *Value = VI_LEAP_REG; break;
case 0x04400024: *Value = VI_H_START_REG; break;
case 0x04400028: *Value = VI_V_START_REG ; break;
case 0x0440002C: *Value = VI_V_BURST_REG; break;
case 0x04400030: *Value = VI_X_SCALE_REG; break;
case 0x04400034: *Value = VI_Y_SCALE_REG; break;
case 0x04400014: *Value = _Reg->VI_BURST_REG; break;
case 0x04400018: *Value = _Reg->VI_V_SYNC_REG; break;
case 0x0440001C: *Value = _Reg->VI_H_SYNC_REG; break;
case 0x04400020: *Value = _Reg->VI_LEAP_REG; break;
case 0x04400024: *Value = _Reg->VI_H_START_REG; break;
case 0x04400028: *Value = _Reg->VI_V_START_REG ; break;
case 0x0440002C: *Value = _Reg->VI_V_BURST_REG; break;
case 0x04400030: *Value = _Reg->VI_X_SCALE_REG; break;
case 0x04400034: *Value = _Reg->VI_Y_SCALE_REG; break;
default:
* Value = 0;
return FALSE;
@ -2106,7 +2093,7 @@ int CMipsMemoryVM::LW_NonMemory ( DWORD PAddr, DWORD * Value ) {
*Value = CAudio::AiGetStatus(g_Audio);
} else {
#endif
*Value = AI_STATUS_REG;
*Value = _Reg->AI_STATUS_REG;
#ifdef tofix
}
#endif
@ -2118,15 +2105,15 @@ int CMipsMemoryVM::LW_NonMemory ( DWORD PAddr, DWORD * Value ) {
break;
case 0x04600000:
switch (PAddr) {
case 0x04600010: *Value = PI_STATUS_REG; break;
case 0x04600014: *Value = PI_DOMAIN1_REG; break;
case 0x04600018: *Value = PI_BSD_DOM1_PWD_REG; break;
case 0x0460001C: *Value = PI_BSD_DOM1_PGS_REG; break;
case 0x04600020: *Value = PI_BSD_DOM1_RLS_REG; break;
case 0x04600024: *Value = PI_DOMAIN2_REG; break;
case 0x04600028: *Value = PI_BSD_DOM2_PWD_REG; break;
case 0x0460002C: *Value = PI_BSD_DOM2_PGS_REG; break;
case 0x04600030: *Value = PI_BSD_DOM2_RLS_REG; break;
case 0x04600010: *Value = _Reg->PI_STATUS_REG; break;
case 0x04600014: *Value = _Reg->PI_DOMAIN1_REG; break;
case 0x04600018: *Value = _Reg->PI_BSD_DOM1_PWD_REG; break;
case 0x0460001C: *Value = _Reg->PI_BSD_DOM1_PGS_REG; break;
case 0x04600020: *Value = _Reg->PI_BSD_DOM1_RLS_REG; break;
case 0x04600024: *Value = _Reg->PI_DOMAIN2_REG; break;
case 0x04600028: *Value = _Reg->PI_BSD_DOM2_PWD_REG; break;
case 0x0460002C: *Value = _Reg->PI_BSD_DOM2_PGS_REG; break;
case 0x04600030: *Value = _Reg->PI_BSD_DOM2_RLS_REG; break;
default:
* Value = 0;
return FALSE;
@ -2134,14 +2121,14 @@ int CMipsMemoryVM::LW_NonMemory ( DWORD PAddr, DWORD * Value ) {
break;
case 0x04700000:
switch (PAddr) {
case 0x04700000: * Value = RI_MODE_REG; break;
case 0x04700004: * Value = RI_CONFIG_REG; break;
case 0x04700008: * Value = RI_CURRENT_LOAD_REG; break;
case 0x0470000C: * Value = RI_SELECT_REG; break;
case 0x04700010: * Value = RI_REFRESH_REG; break;
case 0x04700014: * Value = RI_LATENCY_REG; break;
case 0x04700018: * Value = RI_RERROR_REG; break;
case 0x0470001C: * Value = RI_WERROR_REG; break;
case 0x04700000: * Value = _Reg->RI_MODE_REG; break;
case 0x04700004: * Value = _Reg->RI_CONFIG_REG; break;
case 0x04700008: * Value = _Reg->RI_CURRENT_LOAD_REG; break;
case 0x0470000C: * Value = _Reg->RI_SELECT_REG; break;
case 0x04700010: * Value = _Reg->RI_REFRESH_REG; break;
case 0x04700014: * Value = _Reg->RI_LATENCY_REG; break;
case 0x04700018: * Value = _Reg->RI_RERROR_REG; break;
case 0x0470001C: * Value = _Reg->RI_WERROR_REG; break;
default:
* Value = 0;
return FALSE;
@ -2149,7 +2136,7 @@ int CMipsMemoryVM::LW_NonMemory ( DWORD PAddr, DWORD * Value ) {
break;
case 0x04800000:
switch (PAddr) {
case 0x04800018: *Value = SI_STATUS_REG; break;
case 0x04800018: *Value = _Reg->SI_STATUS_REG; break;
default:
*Value = 0;
return FALSE;
@ -2354,16 +2341,16 @@ int CMipsMemoryVM::SW_NonMemory ( DWORD PAddr, DWORD Value ) {
break;
case 0x03F00000:
switch (PAddr) {
case 0x03F00000: RDRAM_CONFIG_REG = Value; break;
case 0x03F00004: RDRAM_DEVICE_ID_REG = Value; break;
case 0x03F00008: RDRAM_DELAY_REG = Value; break;
case 0x03F0000C: RDRAM_MODE_REG = Value; break;
case 0x03F00010: RDRAM_REF_INTERVAL_REG = Value; break;
case 0x03F00014: RDRAM_REF_ROW_REG = Value; break;
case 0x03F00018: RDRAM_RAS_INTERVAL_REG = Value; break;
case 0x03F0001C: RDRAM_MIN_INTERVAL_REG = Value; break;
case 0x03F00020: RDRAM_ADDR_SELECT_REG = Value; break;
case 0x03F00024: RDRAM_DEVICE_MANUF_REG = Value; break;
case 0x03F00000: _Reg->RDRAM_CONFIG_REG = Value; break;
case 0x03F00004: _Reg->RDRAM_DEVICE_ID_REG = Value; break;
case 0x03F00008: _Reg->RDRAM_DELAY_REG = Value; break;
case 0x03F0000C: _Reg->RDRAM_MODE_REG = Value; break;
case 0x03F00010: _Reg->RDRAM_REF_INTERVAL_REG = Value; break;
case 0x03F00014: _Reg->RDRAM_REF_ROW_REG = Value; break;
case 0x03F00018: _Reg->RDRAM_RAS_INTERVAL_REG = Value; break;
case 0x03F0001C: _Reg->RDRAM_MIN_INTERVAL_REG = Value; break;
case 0x03F00020: _Reg->RDRAM_ADDR_SELECT_REG = Value; break;
case 0x03F00024: _Reg->RDRAM_DEVICE_MANUF_REG = Value; break;
case 0x03F04004: break;
case 0x03F08004: break;
case 0x03F80004: break;
@ -2391,47 +2378,47 @@ int CMipsMemoryVM::SW_NonMemory ( DWORD PAddr, DWORD Value ) {
}
} else {
switch (PAddr) {
case 0x04040000: SP_MEM_ADDR_REG = Value; break;
case 0x04040004: SP_DRAM_ADDR_REG = Value; break;
case 0x04040000: _Reg->SP_MEM_ADDR_REG = Value; break;
case 0x04040004: _Reg->SP_DRAM_ADDR_REG = Value; break;
case 0x04040008:
SP_RD_LEN_REG = Value;
_Reg->SP_RD_LEN_REG = Value;
SP_DMA_READ();
break;
case 0x0404000C:
SP_WR_LEN_REG = Value;
_Reg->SP_WR_LEN_REG = Value;
SP_DMA_WRITE();
break;
case 0x04040010:
if ( ( Value & SP_CLR_HALT ) != 0) { SP_STATUS_REG &= ~SP_STATUS_HALT; }
if ( ( Value & SP_SET_HALT ) != 0) { SP_STATUS_REG |= SP_STATUS_HALT; }
if ( ( Value & SP_CLR_BROKE ) != 0) { SP_STATUS_REG &= ~SP_STATUS_BROKE; }
if ( ( Value & SP_CLR_HALT ) != 0) { _Reg->SP_STATUS_REG &= ~SP_STATUS_HALT; }
if ( ( Value & SP_SET_HALT ) != 0) { _Reg->SP_STATUS_REG |= SP_STATUS_HALT; }
if ( ( Value & SP_CLR_BROKE ) != 0) { _Reg->SP_STATUS_REG &= ~SP_STATUS_BROKE; }
if ( ( Value & SP_CLR_INTR ) != 0) {
MI_INTR_REG &= ~MI_INTR_SP;
_Reg->MI_INTR_REG &= ~MI_INTR_SP;
CheckInterrupts();
}
#ifndef EXTERNAL_RELEASE
if ( ( Value & SP_SET_INTR ) != 0) { DisplayError("SP_SET_INTR"); }
#endif
if ( ( Value & SP_CLR_SSTEP ) != 0) { SP_STATUS_REG &= ~SP_STATUS_SSTEP; }
if ( ( Value & SP_SET_SSTEP ) != 0) { SP_STATUS_REG |= SP_STATUS_SSTEP; }
if ( ( Value & SP_CLR_INTR_BREAK ) != 0) { SP_STATUS_REG &= ~SP_STATUS_INTR_BREAK; }
if ( ( Value & SP_SET_INTR_BREAK ) != 0) { SP_STATUS_REG |= SP_STATUS_INTR_BREAK; }
if ( ( Value & SP_CLR_SIG0 ) != 0) { SP_STATUS_REG &= ~SP_STATUS_SIG0; }
if ( ( Value & SP_SET_SIG0 ) != 0) { SP_STATUS_REG |= SP_STATUS_SIG0; }
if ( ( Value & SP_CLR_SIG1 ) != 0) { SP_STATUS_REG &= ~SP_STATUS_SIG1; }
if ( ( Value & SP_SET_SIG1 ) != 0) { SP_STATUS_REG |= SP_STATUS_SIG1; }
if ( ( Value & SP_CLR_SIG2 ) != 0) { SP_STATUS_REG &= ~SP_STATUS_SIG2; }
if ( ( Value & SP_SET_SIG2 ) != 0) { SP_STATUS_REG |= SP_STATUS_SIG2; }
if ( ( Value & SP_CLR_SIG3 ) != 0) { SP_STATUS_REG &= ~SP_STATUS_SIG3; }
if ( ( Value & SP_SET_SIG3 ) != 0) { SP_STATUS_REG |= SP_STATUS_SIG3; }
if ( ( Value & SP_CLR_SIG4 ) != 0) { SP_STATUS_REG &= ~SP_STATUS_SIG4; }
if ( ( Value & SP_SET_SIG4 ) != 0) { SP_STATUS_REG |= SP_STATUS_SIG4; }
if ( ( Value & SP_CLR_SIG5 ) != 0) { SP_STATUS_REG &= ~SP_STATUS_SIG5; }
if ( ( Value & SP_SET_SIG5 ) != 0) { SP_STATUS_REG |= SP_STATUS_SIG5; }
if ( ( Value & SP_CLR_SIG6 ) != 0) { SP_STATUS_REG &= ~SP_STATUS_SIG6; }
if ( ( Value & SP_SET_SIG6 ) != 0) { SP_STATUS_REG |= SP_STATUS_SIG6; }
if ( ( Value & SP_CLR_SIG7 ) != 0) { SP_STATUS_REG &= ~SP_STATUS_SIG7; }
if ( ( Value & SP_SET_SIG7 ) != 0) { SP_STATUS_REG |= SP_STATUS_SIG7; }
if ( ( Value & SP_CLR_SSTEP ) != 0) { _Reg->SP_STATUS_REG &= ~SP_STATUS_SSTEP; }
if ( ( Value & SP_SET_SSTEP ) != 0) { _Reg->SP_STATUS_REG |= SP_STATUS_SSTEP; }
if ( ( Value & SP_CLR_INTR_BREAK ) != 0) { _Reg->SP_STATUS_REG &= ~SP_STATUS_INTR_BREAK; }
if ( ( Value & SP_SET_INTR_BREAK ) != 0) { _Reg->SP_STATUS_REG |= SP_STATUS_INTR_BREAK; }
if ( ( Value & SP_CLR_SIG0 ) != 0) { _Reg->SP_STATUS_REG &= ~SP_STATUS_SIG0; }
if ( ( Value & SP_SET_SIG0 ) != 0) { _Reg->SP_STATUS_REG |= SP_STATUS_SIG0; }
if ( ( Value & SP_CLR_SIG1 ) != 0) { _Reg->SP_STATUS_REG &= ~SP_STATUS_SIG1; }
if ( ( Value & SP_SET_SIG1 ) != 0) { _Reg->SP_STATUS_REG |= SP_STATUS_SIG1; }
if ( ( Value & SP_CLR_SIG2 ) != 0) { _Reg->SP_STATUS_REG &= ~SP_STATUS_SIG2; }
if ( ( Value & SP_SET_SIG2 ) != 0) { _Reg->SP_STATUS_REG |= SP_STATUS_SIG2; }
if ( ( Value & SP_CLR_SIG3 ) != 0) { _Reg->SP_STATUS_REG &= ~SP_STATUS_SIG3; }
if ( ( Value & SP_SET_SIG3 ) != 0) { _Reg->SP_STATUS_REG |= SP_STATUS_SIG3; }
if ( ( Value & SP_CLR_SIG4 ) != 0) { _Reg->SP_STATUS_REG &= ~SP_STATUS_SIG4; }
if ( ( Value & SP_SET_SIG4 ) != 0) { _Reg->SP_STATUS_REG |= SP_STATUS_SIG4; }
if ( ( Value & SP_CLR_SIG5 ) != 0) { _Reg->SP_STATUS_REG &= ~SP_STATUS_SIG5; }
if ( ( Value & SP_SET_SIG5 ) != 0) { _Reg->SP_STATUS_REG |= SP_STATUS_SIG5; }
if ( ( Value & SP_CLR_SIG6 ) != 0) { _Reg->SP_STATUS_REG &= ~SP_STATUS_SIG6; }
if ( ( Value & SP_SET_SIG6 ) != 0) { _Reg->SP_STATUS_REG |= SP_STATUS_SIG6; }
if ( ( Value & SP_CLR_SIG7 ) != 0) { _Reg->SP_STATUS_REG &= ~SP_STATUS_SIG7; }
if ( ( Value & SP_SET_SIG7 ) != 0) { _Reg->SP_STATUS_REG |= SP_STATUS_SIG7; }
#ifdef tofix
if ( ( Value & SP_SET_SIG0 ) != 0 && AudioSignal)
@ -2446,8 +2433,8 @@ int CMipsMemoryVM::SW_NonMemory ( DWORD PAddr, DWORD Value ) {
RunRsp();
//}
break;
case 0x0404001C: SP_SEMAPHORE_REG = 0; break;
case 0x04080000: SP_PC_REG = Value & 0xFFC; break;
case 0x0404001C: _Reg->SP_SEMAPHORE_REG = 0; break;
case 0x04080000: _Reg->SP_PC_REG = Value & 0xFFC; break;
default:
return FALSE;
}
@ -2456,26 +2443,26 @@ int CMipsMemoryVM::SW_NonMemory ( DWORD PAddr, DWORD Value ) {
case 0x04100000:
switch (PAddr) {
case 0x04100000:
DPC_START_REG = Value;
DPC_CURRENT_REG = Value;
_Reg->DPC_START_REG = Value;
_Reg->DPC_CURRENT_REG = Value;
break;
case 0x04100004:
DPC_END_REG = Value;
_Reg->DPC_END_REG = Value;
if (ProcessRDPList) { ProcessRDPList(); }
break;
//case 0x04100008: DPC_CURRENT_REG = Value; break;
//case 0x04100008: _Reg->DPC_CURRENT_REG = Value; break;
case 0x0410000C:
if ( ( Value & DPC_CLR_XBUS_DMEM_DMA ) != 0) { DPC_STATUS_REG &= ~DPC_STATUS_XBUS_DMEM_DMA; }
if ( ( Value & DPC_SET_XBUS_DMEM_DMA ) != 0) { DPC_STATUS_REG |= DPC_STATUS_XBUS_DMEM_DMA; }
if ( ( Value & DPC_CLR_FREEZE ) != 0) { DPC_STATUS_REG &= ~DPC_STATUS_FREEZE; }
if ( ( Value & DPC_SET_FREEZE ) != 0) { DPC_STATUS_REG |= DPC_STATUS_FREEZE; }
if ( ( Value & DPC_CLR_FLUSH ) != 0) { DPC_STATUS_REG &= ~DPC_STATUS_FLUSH; }
if ( ( Value & DPC_SET_FLUSH ) != 0) { DPC_STATUS_REG |= DPC_STATUS_FLUSH; }
if ( ( Value & DPC_CLR_XBUS_DMEM_DMA ) != 0) { _Reg->DPC_STATUS_REG &= ~DPC_STATUS_XBUS_DMEM_DMA; }
if ( ( Value & DPC_SET_XBUS_DMEM_DMA ) != 0) { _Reg->DPC_STATUS_REG |= DPC_STATUS_XBUS_DMEM_DMA; }
if ( ( Value & DPC_CLR_FREEZE ) != 0) { _Reg->DPC_STATUS_REG &= ~DPC_STATUS_FREEZE; }
if ( ( Value & DPC_SET_FREEZE ) != 0) { _Reg->DPC_STATUS_REG |= DPC_STATUS_FREEZE; }
if ( ( Value & DPC_CLR_FLUSH ) != 0) { _Reg->DPC_STATUS_REG &= ~DPC_STATUS_FLUSH; }
if ( ( Value & DPC_SET_FLUSH ) != 0) { _Reg->DPC_STATUS_REG |= DPC_STATUS_FLUSH; }
if ( ( Value & DPC_CLR_FREEZE ) != 0)
{
if ( ( SP_STATUS_REG & SP_STATUS_HALT ) == 0)
if ( ( _Reg->SP_STATUS_REG & SP_STATUS_HALT ) == 0)
{
if ( ( SP_STATUS_REG & SP_STATUS_BROKE ) == 0 )
if ( ( _Reg->SP_STATUS_REG & SP_STATUS_BROKE ) == 0 )
{
RunRsp();
}
@ -2497,32 +2484,32 @@ int CMipsMemoryVM::SW_NonMemory ( DWORD PAddr, DWORD Value ) {
case 0x04300000:
switch (PAddr) {
case 0x04300000:
MI_MODE_REG &= ~0x7F;
MI_MODE_REG |= (Value & 0x7F);
if ( ( Value & MI_CLR_INIT ) != 0 ) { MI_MODE_REG &= ~MI_MODE_INIT; }
if ( ( Value & MI_SET_INIT ) != 0 ) { MI_MODE_REG |= MI_MODE_INIT; }
if ( ( Value & MI_CLR_EBUS ) != 0 ) { MI_MODE_REG &= ~MI_MODE_EBUS; }
if ( ( Value & MI_SET_EBUS ) != 0 ) { MI_MODE_REG |= MI_MODE_EBUS; }
_Reg->MI_MODE_REG &= ~0x7F;
_Reg->MI_MODE_REG |= (Value & 0x7F);
if ( ( Value & MI_CLR_INIT ) != 0 ) { _Reg->MI_MODE_REG &= ~MI_MODE_INIT; }
if ( ( Value & MI_SET_INIT ) != 0 ) { _Reg->MI_MODE_REG |= MI_MODE_INIT; }
if ( ( Value & MI_CLR_EBUS ) != 0 ) { _Reg->MI_MODE_REG &= ~MI_MODE_EBUS; }
if ( ( Value & MI_SET_EBUS ) != 0 ) { _Reg->MI_MODE_REG |= MI_MODE_EBUS; }
if ( ( Value & MI_CLR_DP_INTR ) != 0 ) {
MI_INTR_REG &= ~MI_INTR_DP;
_Reg->MI_INTR_REG &= ~MI_INTR_DP;
CheckInterrupts();
}
if ( ( Value & MI_CLR_RDRAM ) != 0 ) { MI_MODE_REG &= ~MI_MODE_RDRAM; }
if ( ( Value & MI_SET_RDRAM ) != 0 ) { MI_MODE_REG |= MI_MODE_RDRAM; }
if ( ( Value & MI_CLR_RDRAM ) != 0 ) { _Reg->MI_MODE_REG &= ~MI_MODE_RDRAM; }
if ( ( Value & MI_SET_RDRAM ) != 0 ) { _Reg->MI_MODE_REG |= MI_MODE_RDRAM; }
break;
case 0x0430000C:
if ( ( Value & MI_INTR_MASK_CLR_SP ) != 0 ) { MI_INTR_MASK_REG &= ~MI_INTR_MASK_SP; }
if ( ( Value & MI_INTR_MASK_SET_SP ) != 0 ) { MI_INTR_MASK_REG |= MI_INTR_MASK_SP; }
if ( ( Value & MI_INTR_MASK_CLR_SI ) != 0 ) { MI_INTR_MASK_REG &= ~MI_INTR_MASK_SI; }
if ( ( Value & MI_INTR_MASK_SET_SI ) != 0 ) { MI_INTR_MASK_REG |= MI_INTR_MASK_SI; }
if ( ( Value & MI_INTR_MASK_CLR_AI ) != 0 ) { MI_INTR_MASK_REG &= ~MI_INTR_MASK_AI; }
if ( ( Value & MI_INTR_MASK_SET_AI ) != 0 ) { MI_INTR_MASK_REG |= MI_INTR_MASK_AI; }
if ( ( Value & MI_INTR_MASK_CLR_VI ) != 0 ) { MI_INTR_MASK_REG &= ~MI_INTR_MASK_VI; }
if ( ( Value & MI_INTR_MASK_SET_VI ) != 0 ) { MI_INTR_MASK_REG |= MI_INTR_MASK_VI; }
if ( ( Value & MI_INTR_MASK_CLR_PI ) != 0 ) { MI_INTR_MASK_REG &= ~MI_INTR_MASK_PI; }
if ( ( Value & MI_INTR_MASK_SET_PI ) != 0 ) { MI_INTR_MASK_REG |= MI_INTR_MASK_PI; }
if ( ( Value & MI_INTR_MASK_CLR_DP ) != 0 ) { MI_INTR_MASK_REG &= ~MI_INTR_MASK_DP; }
if ( ( Value & MI_INTR_MASK_SET_DP ) != 0 ) { MI_INTR_MASK_REG |= MI_INTR_MASK_DP; }
if ( ( Value & MI_INTR_MASK_CLR_SP ) != 0 ) { _Reg->MI_INTR_MASK_REG &= ~MI_INTR_MASK_SP; }
if ( ( Value & MI_INTR_MASK_SET_SP ) != 0 ) { _Reg->MI_INTR_MASK_REG |= MI_INTR_MASK_SP; }
if ( ( Value & MI_INTR_MASK_CLR_SI ) != 0 ) { _Reg->MI_INTR_MASK_REG &= ~MI_INTR_MASK_SI; }
if ( ( Value & MI_INTR_MASK_SET_SI ) != 0 ) { _Reg->MI_INTR_MASK_REG |= MI_INTR_MASK_SI; }
if ( ( Value & MI_INTR_MASK_CLR_AI ) != 0 ) { _Reg->MI_INTR_MASK_REG &= ~MI_INTR_MASK_AI; }
if ( ( Value & MI_INTR_MASK_SET_AI ) != 0 ) { _Reg->MI_INTR_MASK_REG |= MI_INTR_MASK_AI; }
if ( ( Value & MI_INTR_MASK_CLR_VI ) != 0 ) { _Reg->MI_INTR_MASK_REG &= ~MI_INTR_MASK_VI; }
if ( ( Value & MI_INTR_MASK_SET_VI ) != 0 ) { _Reg->MI_INTR_MASK_REG |= MI_INTR_MASK_VI; }
if ( ( Value & MI_INTR_MASK_CLR_PI ) != 0 ) { _Reg->MI_INTR_MASK_REG &= ~MI_INTR_MASK_PI; }
if ( ( Value & MI_INTR_MASK_SET_PI ) != 0 ) { _Reg->MI_INTR_MASK_REG |= MI_INTR_MASK_PI; }
if ( ( Value & MI_INTR_MASK_CLR_DP ) != 0 ) { _Reg->MI_INTR_MASK_REG &= ~MI_INTR_MASK_DP; }
if ( ( Value & MI_INTR_MASK_SET_DP ) != 0 ) { _Reg->MI_INTR_MASK_REG |= MI_INTR_MASK_DP; }
break;
default:
return FALSE;
@ -2531,68 +2518,64 @@ int CMipsMemoryVM::SW_NonMemory ( DWORD PAddr, DWORD Value ) {
case 0x04400000:
switch (PAddr) {
case 0x04400000:
if (VI_STATUS_REG != Value) {
VI_STATUS_REG = Value;
if (_Reg->VI_STATUS_REG != Value) {
_Reg->VI_STATUS_REG = Value;
if (ViStatusChanged != NULL ) { ViStatusChanged(); }
}
break;
case 0x04400004:
#ifdef CFB_READ
if (VI_ORIGIN_REG > 0x280) {
SetFrameBuffer(VI_ORIGIN_REG, (DWORD)(VI_WIDTH_REG * (VI_WIDTH_REG *.75)));
if (_Reg->VI_ORIGIN_REG > 0x280) {
SetFrameBuffer(_Reg->VI_ORIGIN_REG, (DWORD)(VI_WIDTH_REG * (VI_WIDTH_REG *.75)));
}
#endif
VI_ORIGIN_REG = (Value & 0xFFFFFF);
_Reg->VI_ORIGIN_REG = (Value & 0xFFFFFF);
//if (UpdateScreen != NULL ) { UpdateScreen(); }
break;
case 0x04400008:
if (VI_WIDTH_REG != Value) {
VI_WIDTH_REG = Value;
if (_Reg->VI_WIDTH_REG != Value) {
_Reg->VI_WIDTH_REG = Value;
if (ViWidthChanged != NULL ) { ViWidthChanged(); }
}
break;
case 0x0440000C: VI_INTR_REG = Value; break;
case 0x0440000C: _Reg->VI_INTR_REG = Value; break;
case 0x04400010:
MI_INTR_REG &= ~MI_INTR_VI;
_Reg->MI_INTR_REG &= ~MI_INTR_VI;
CheckInterrupts();
break;
case 0x04400014: VI_BURST_REG = Value; break;
case 0x04400018: VI_V_SYNC_REG = Value; break;
case 0x0440001C: VI_H_SYNC_REG = Value; break;
case 0x04400020: VI_LEAP_REG = Value; break;
case 0x04400024: VI_H_START_REG = Value; break;
case 0x04400028: VI_V_START_REG = Value; break;
case 0x0440002C: VI_V_BURST_REG = Value; break;
case 0x04400030: VI_X_SCALE_REG = Value; break;
case 0x04400034: VI_Y_SCALE_REG = Value; break;
case 0x04400014: _Reg->VI_BURST_REG = Value; break;
case 0x04400018: _Reg->VI_V_SYNC_REG = Value; break;
case 0x0440001C: _Reg->VI_H_SYNC_REG = Value; break;
case 0x04400020: _Reg->VI_LEAP_REG = Value; break;
case 0x04400024: _Reg->VI_H_START_REG = Value; break;
case 0x04400028: _Reg->VI_V_START_REG = Value; break;
case 0x0440002C: _Reg->VI_V_BURST_REG = Value; break;
case 0x04400030: _Reg->VI_X_SCALE_REG = Value; break;
case 0x04400034: _Reg->VI_Y_SCALE_REG = Value; break;
default:
return FALSE;
}
break;
case 0x04500000:
switch (PAddr) {
case 0x04500000: AI_DRAM_ADDR_REG = Value; break;
case 0x04500000: _Reg->AI_DRAM_ADDR_REG = Value; break;
case 0x04500004:
AI_LEN_REG = Value;
#ifdef tofix
if (_Settings->LoadBool(Game_FixedAudio))
_Reg->AI_LEN_REG = Value;
if (g_FixedAudio)
{
CAudio::AiSetLength(g_Audio,Value);
_Audio->AiSetLength();
}
#endif
if (AiLenChanged != NULL) { AiLenChanged(); }
break;
case 0x04500008: AI_CONTROL_REG = (Value & 1); break;
case 0x04500008: _Reg->AI_CONTROL_REG = (Value & 1); break;
case 0x0450000C:
/* Clear Interrupt */;
MI_INTR_REG &= ~MI_INTR_AI;
#ifdef tofix
AudioIntrReg &= ~MI_INTR_AI;
#endif
_Reg->MI_INTR_REG &= ~MI_INTR_AI;
_Reg->m_AudioIntrReg &= ~MI_INTR_AI;
CheckInterrupts();
break;
case 0x04500010:
AI_DACRATE_REG = Value;
_Reg->AI_DACRATE_REG = Value;
DacrateChanged(g_SystemType);
if (_Settings->LoadBool(Game_FixedAudio))
{
@ -2601,66 +2584,66 @@ int CMipsMemoryVM::SW_NonMemory ( DWORD PAddr, DWORD Value ) {
#endif
}
break;
case 0x04500014: AI_BITRATE_REG = Value; break;
case 0x04500014: _Reg->AI_BITRATE_REG = Value; break;
default:
return FALSE;
}
break;
case 0x04600000:
switch (PAddr) {
case 0x04600000: PI_DRAM_ADDR_REG = Value; break;
case 0x04600004: PI_CART_ADDR_REG = Value; break;
case 0x04600000: _Reg->PI_DRAM_ADDR_REG = Value; break;
case 0x04600004: _Reg->PI_CART_ADDR_REG = Value; break;
case 0x04600008:
PI_RD_LEN_REG = Value;
_Reg->PI_RD_LEN_REG = Value;
PI_DMA_READ();
break;
case 0x0460000C:
PI_WR_LEN_REG = Value;
_Reg->PI_WR_LEN_REG = Value;
PI_DMA_WRITE();
break;
case 0x04600010:
//if ((Value & PI_SET_RESET) != 0 ) { DisplayError("reset Controller"); }
if ((Value & PI_CLR_INTR) != 0 ) {
MI_INTR_REG &= ~MI_INTR_PI;
_Reg->MI_INTR_REG &= ~MI_INTR_PI;
CheckInterrupts();
}
break;
case 0x04600014: PI_DOMAIN1_REG = (Value & 0xFF); break;
case 0x04600018: PI_BSD_DOM1_PWD_REG = (Value & 0xFF); break;
case 0x0460001C: PI_BSD_DOM1_PGS_REG = (Value & 0xFF); break;
case 0x04600020: PI_BSD_DOM1_RLS_REG = (Value & 0xFF); break;
case 0x04600014: _Reg->PI_DOMAIN1_REG = (Value & 0xFF); break;
case 0x04600018: _Reg->PI_BSD_DOM1_PWD_REG = (Value & 0xFF); break;
case 0x0460001C: _Reg->PI_BSD_DOM1_PGS_REG = (Value & 0xFF); break;
case 0x04600020: _Reg->PI_BSD_DOM1_RLS_REG = (Value & 0xFF); break;
default:
return FALSE;
}
break;
case 0x04700000:
switch (PAddr) {
case 0x04700000: RI_MODE_REG = Value; break;
case 0x04700004: RI_CONFIG_REG = Value; break;
case 0x04700008: RI_CURRENT_LOAD_REG = Value; break;
case 0x0470000C: RI_SELECT_REG = Value; break;
case 0x04700010: RI_REFRESH_REG = Value; break;
case 0x04700014: RI_LATENCY_REG = Value; break;
case 0x04700018: RI_RERROR_REG = Value; break;
case 0x0470001C: RI_WERROR_REG = Value; break;
case 0x04700000: _Reg->RI_MODE_REG = Value; break;
case 0x04700004: _Reg->RI_CONFIG_REG = Value; break;
case 0x04700008: _Reg->RI_CURRENT_LOAD_REG = Value; break;
case 0x0470000C: _Reg->RI_SELECT_REG = Value; break;
case 0x04700010: _Reg->RI_REFRESH_REG = Value; break;
case 0x04700014: _Reg->RI_LATENCY_REG = Value; break;
case 0x04700018: _Reg->RI_RERROR_REG = Value; break;
case 0x0470001C: _Reg->RI_WERROR_REG = Value; break;
default:
return FALSE;
}
break;
case 0x04800000:
switch (PAddr) {
case 0x04800000: SI_DRAM_ADDR_REG = Value; break;
case 0x04800000: _Reg->SI_DRAM_ADDR_REG = Value; break;
case 0x04800004:
SI_PIF_ADDR_RD64B_REG = Value;
_Reg->SI_PIF_ADDR_RD64B_REG = Value;
SI_DMA_READ ();
break;
case 0x04800010:
SI_PIF_ADDR_WR64B_REG = Value;
_Reg->SI_PIF_ADDR_WR64B_REG = Value;
SI_DMA_WRITE();
break;
case 0x04800018:
MI_INTR_REG &= ~MI_INTR_SI;
SI_STATUS_REG &= ~SI_STATUS_INTERRUPT;
_Reg->MI_INTR_REG &= ~MI_INTR_SI;
_Reg->SI_STATUS_REG &= ~SI_STATUS_INTERRUPT;
CheckInterrupts();
break;
default:
@ -2701,29 +2684,16 @@ int CMipsMemoryVM::SW_NonMemory ( DWORD PAddr, DWORD Value ) {
return TRUE;
}
extern DWORD g_ViRefreshRate;
void CMipsMemoryVM::UpdateHalfLine (void)
{
#ifdef toremove
if (*_Timer < 0) {
if (*_NextTimer < 0) {
m_HalfLine = 0;
return;
}
//DisplayError("Timer: %X",Timers.Timer);
//HalfLine = (Timer / 1500) + VI_INTR_REG;
m_HalfLine = (DWORD)(*_Timer / g_ViRefreshRate);
m_HalfLine = (DWORD)(*_NextTimer / g_ViRefreshRate);
m_HalfLine &= ~1;
// *g_HalfLine += ViFieldNumber;
//Timers.Timer -= g_ViRefreshRate;
#endif
#ifdef toremove
m_HalfLine += 1;
if (m_HalfLine > 250) { m_HalfLine = 0; }
// m_HalfLine = (_Reg->GetTimer(ViTimer) / 1500);
// m_HalfLine &= ~1;
// m_HalfLine += ViFieldNumber;
#endif
}
#ifdef toremove
@ -2830,16 +2800,16 @@ bool CMipsMemoryVM::LoadWord_NonMemory ( DWORD PAddr, DWORD * Value ) {
switch (PAddr & 0xFFF00000) {
case 0x03F00000:
switch (PAddr) {
case 0x03F00000: * Value = RDRAM_CONFIG_REG; break;
case 0x03F00004: * Value = RDRAM_DEVICE_ID_REG; break;
case 0x03F00008: * Value = RDRAM_DELAY_REG; break;
case 0x03F0000C: * Value = RDRAM_MODE_REG; break;
case 0x03F00010: * Value = RDRAM_REF_INTERVAL_REG; break;
case 0x03F00014: * Value = RDRAM_REF_ROW_REG; break;
case 0x03F00018: * Value = RDRAM_RAS_INTERVAL_REG; break;
case 0x03F0001C: * Value = RDRAM_MIN_INTERVAL_REG; break;
case 0x03F00020: * Value = RDRAM_ADDR_SELECT_REG; break;
case 0x03F00024: * Value = RDRAM_DEVICE_MANUF_REG; break;
case 0x03F00000: * Value = _Reg->RDRAM_CONFIG_REG; break;
case 0x03F00004: * Value = _Reg->RDRAM_DEVICE_ID_REG; break;
case 0x03F00008: * Value = _Reg->RDRAM_DELAY_REG; break;
case 0x03F0000C: * Value = _Reg->RDRAM_MODE_REG; break;
case 0x03F00010: * Value = _Reg->RDRAM_REF_INTERVAL_REG; break;
case 0x03F00014: * Value = _Reg->RDRAM_REF_ROW_REG; break;
case 0x03F00018: * Value = _Reg->RDRAM_RAS_INTERVAL_REG; break;
case 0x03F0001C: * Value = _Reg->RDRAM_MIN_INTERVAL_REG; break;
case 0x03F00020: * Value = _Reg->RDRAM_ADDR_SELECT_REG; break;
case 0x03F00024: * Value = _Reg->RDRAM_DEVICE_MANUF_REG; break;
default:
*Value = ((PAddr & 0xFFFF) << 16) | (PAddr & 0xFFFF);
return false;
@ -2847,10 +2817,10 @@ bool CMipsMemoryVM::LoadWord_NonMemory ( DWORD PAddr, DWORD * Value ) {
break;
case 0x04000000:
switch (PAddr) {
case 0x04040010: * Value = SP_STATUS_REG; break;
case 0x04040014: * Value = SP_DMA_FULL_REG; break;
case 0x04040018: * Value = SP_DMA_BUSY_REG; break;
case 0x04080000: * Value = SP_PC_REG; break;
case 0x04040010: * Value = _Reg->SP_STATUS_REG; break;
case 0x04040014: * Value = _Reg->SP_DMA_FULL_REG; break;
case 0x04040018: * Value = _Reg->SP_DMA_BUSY_REG; break;
case 0x04080000: * Value = _Reg->SP_PC_REG; break;
default:
* Value = 0;
return FALSE;
@ -2858,11 +2828,11 @@ bool CMipsMemoryVM::LoadWord_NonMemory ( DWORD PAddr, DWORD * Value ) {
break;
case 0x04100000:
switch (PAddr) {
case 0x0410000C: *Value = DPC_STATUS_REG; break;
case 0x04100010: *Value = DPC_CLOCK_REG; break;
case 0x04100014: *Value = DPC_BUFBUSY_REG; break;
case 0x04100018: *Value = DPC_PIPEBUSY_REG; break;
case 0x0410001C: *Value = DPC_TMEM_REG; break;
case 0x0410000C: *Value = _Reg->DPC_STATUS_REG; break;
case 0x04100010: *Value = _Reg->DPC_CLOCK_REG; break;
case 0x04100014: *Value = _Reg->DPC_BUFBUSY_REG; break;
case 0x04100018: *Value = _Reg->DPC_PIPEBUSY_REG; break;
case 0x0410001C: *Value = _Reg->DPC_TMEM_REG; break;
default:
* Value = 0;
return FALSE;
@ -3179,37 +3149,37 @@ bool CMipsMemoryVM::StoreWord_NonMemory ( DWORD PAddr, DWORD Value ) {
SP_DMA_WRITE();
break;
case 0x04040010:
if ( ( Value & SP_CLR_HALT ) != 0) { SP_STATUS_REG &= ~SP_STATUS_HALT; }
if ( ( Value & SP_SET_HALT ) != 0) { SP_STATUS_REG |= SP_STATUS_HALT; }
if ( ( Value & SP_CLR_BROKE ) != 0) { SP_STATUS_REG &= ~SP_STATUS_BROKE; }
if ( ( Value & SP_CLR_HALT ) != 0) { _Reg->SP_STATUS_REG &= ~SP_STATUS_HALT; }
if ( ( Value & SP_SET_HALT ) != 0) { _Reg->SP_STATUS_REG |= SP_STATUS_HALT; }
if ( ( Value & SP_CLR_BROKE ) != 0) { _Reg->SP_STATUS_REG &= ~SP_STATUS_BROKE; }
if ( ( Value & SP_CLR_INTR ) != 0) {
MI_INTR_REG &= ~MI_INTR_SP;
_Reg->CheckInterrupts();
}
// if ( ( Value & SP_SET_INTR ) != 0) { DisplayError("SP_SET_INTR"); }
if ( ( Value & SP_CLR_SSTEP ) != 0) { SP_STATUS_REG &= ~SP_STATUS_SSTEP; }
if ( ( Value & SP_SET_SSTEP ) != 0) { SP_STATUS_REG |= SP_STATUS_SSTEP; }
if ( ( Value & SP_CLR_INTR_BREAK ) != 0) { SP_STATUS_REG &= ~SP_STATUS_INTR_BREAK; }
if ( ( Value & SP_SET_INTR_BREAK ) != 0) { SP_STATUS_REG |= SP_STATUS_INTR_BREAK; }
if ( ( Value & SP_CLR_SIG0 ) != 0) { SP_STATUS_REG &= ~SP_STATUS_SIG0; }
if ( ( Value & SP_CLR_SSTEP ) != 0) { _Reg->SP_STATUS_REG &= ~SP_STATUS_SSTEP; }
if ( ( Value & SP_SET_SSTEP ) != 0) { _Reg->SP_STATUS_REG |= SP_STATUS_SSTEP; }
if ( ( Value & SP_CLR_INTR_BREAK ) != 0) { _Reg->SP_STATUS_REG &= ~SP_STATUS_INTR_BREAK; }
if ( ( Value & SP_SET_INTR_BREAK ) != 0) { _Reg->SP_STATUS_REG |= SP_STATUS_INTR_BREAK; }
if ( ( Value & SP_CLR_SIG0 ) != 0) { _Reg->SP_STATUS_REG &= ~SP_STATUS_SIG0; }
if ( ( Value & SP_SET_SIG0 ) != 0) {
SP_STATUS_REG |= SP_STATUS_SIG0;
MI_INTR_REG |= MI_INTR_SP;
_Reg->CheckInterrupts();
}
if ( ( Value & SP_CLR_SIG1 ) != 0) { SP_STATUS_REG &= ~SP_STATUS_SIG1; }
if ( ( Value & SP_CLR_SIG1 ) != 0) { _Reg->SP_STATUS_REG &= ~SP_STATUS_SIG1; }
if ( ( Value & SP_SET_SIG1 ) != 0) { _Notify->BreakPoint(__FILE__,__LINE__); SP_STATUS_REG |= SP_STATUS_SIG1; }
if ( ( Value & SP_CLR_SIG2 ) != 0) { SP_STATUS_REG &= ~SP_STATUS_SIG2; }
if ( ( Value & SP_CLR_SIG2 ) != 0) { _Reg->SP_STATUS_REG &= ~SP_STATUS_SIG2; }
if ( ( Value & SP_SET_SIG2 ) != 0) { _Notify->BreakPoint(__FILE__,__LINE__); SP_STATUS_REG |= SP_STATUS_SIG2; }
if ( ( Value & SP_CLR_SIG3 ) != 0) { SP_STATUS_REG &= ~SP_STATUS_SIG3; }
if ( ( Value & SP_CLR_SIG3 ) != 0) { _Reg->SP_STATUS_REG &= ~SP_STATUS_SIG3; }
if ( ( Value & SP_SET_SIG3 ) != 0) { _Notify->BreakPoint(__FILE__,__LINE__); SP_STATUS_REG |= SP_STATUS_SIG3; }
if ( ( Value & SP_CLR_SIG4 ) != 0) { SP_STATUS_REG &= ~SP_STATUS_SIG4; }
if ( ( Value & SP_CLR_SIG4 ) != 0) { _Reg->SP_STATUS_REG &= ~SP_STATUS_SIG4; }
if ( ( Value & SP_SET_SIG4 ) != 0) { _Notify->BreakPoint(__FILE__,__LINE__); SP_STATUS_REG |= SP_STATUS_SIG4; }
if ( ( Value & SP_CLR_SIG5 ) != 0) { SP_STATUS_REG &= ~SP_STATUS_SIG5; }
if ( ( Value & SP_CLR_SIG5 ) != 0) { _Reg->SP_STATUS_REG &= ~SP_STATUS_SIG5; }
if ( ( Value & SP_SET_SIG5 ) != 0) { _Notify->BreakPoint(__FILE__,__LINE__); SP_STATUS_REG |= SP_STATUS_SIG5; }
if ( ( Value & SP_CLR_SIG6 ) != 0) { SP_STATUS_REG &= ~SP_STATUS_SIG6; }
if ( ( Value & SP_CLR_SIG6 ) != 0) { _Reg->SP_STATUS_REG &= ~SP_STATUS_SIG6; }
if ( ( Value & SP_SET_SIG6 ) != 0) { _Notify->BreakPoint(__FILE__,__LINE__); SP_STATUS_REG |= SP_STATUS_SIG6; }
if ( ( Value & SP_CLR_SIG7 ) != 0) { SP_STATUS_REG &= ~SP_STATUS_SIG7; }
if ( ( Value & SP_CLR_SIG7 ) != 0) { _Reg->SP_STATUS_REG &= ~SP_STATUS_SIG7; }
if ( ( Value & SP_SET_SIG7 ) != 0) { _Notify->BreakPoint(__FILE__,__LINE__); SP_STATUS_REG |= SP_STATUS_SIG7; }
if ( ( SP_STATUS_REG & SP_STATUS_HALT ) == 0) {
if ( ( SP_STATUS_REG & SP_STATUS_BROKE ) == 0 ) {
@ -3259,30 +3229,30 @@ bool CMipsMemoryVM::StoreWord_NonMemory ( DWORD PAddr, DWORD Value ) {
case 0x04300000:
MI_MODE_REG &= ~0x7F;
MI_MODE_REG |= (Value & 0x7F);
if ( ( Value & MI_CLR_INIT ) != 0 ) { MI_MODE_REG &= ~MI_MODE_INIT; }
if ( ( Value & MI_SET_INIT ) != 0 ) { MI_MODE_REG |= MI_MODE_INIT; }
if ( ( Value & MI_CLR_EBUS ) != 0 ) { MI_MODE_REG &= ~MI_MODE_EBUS; }
if ( ( Value & MI_SET_EBUS ) != 0 ) { MI_MODE_REG |= MI_MODE_EBUS; }
if ( ( Value & MI_CLR_INIT ) != 0 ) { _Reg->MI_MODE_REG &= ~MI_MODE_INIT; }
if ( ( Value & MI_SET_INIT ) != 0 ) { _Reg->MI_MODE_REG |= MI_MODE_INIT; }
if ( ( Value & MI_CLR_EBUS ) != 0 ) { _Reg->MI_MODE_REG &= ~MI_MODE_EBUS; }
if ( ( Value & MI_SET_EBUS ) != 0 ) { _Reg->MI_MODE_REG |= MI_MODE_EBUS; }
if ( ( Value & MI_CLR_DP_INTR ) != 0 ) {
MI_INTR_REG &= ~MI_INTR_DP;
_Reg->CheckInterrupts();
}
if ( ( Value & MI_CLR_RDRAM ) != 0 ) { MI_MODE_REG &= ~MI_MODE_RDRAM; }
if ( ( Value & MI_SET_RDRAM ) != 0 ) { MI_MODE_REG |= MI_MODE_RDRAM; }
if ( ( Value & MI_CLR_RDRAM ) != 0 ) { _Reg->MI_MODE_REG &= ~MI_MODE_RDRAM; }
if ( ( Value & MI_SET_RDRAM ) != 0 ) { _Reg->MI_MODE_REG |= MI_MODE_RDRAM; }
break;
case 0x0430000C:
if ( ( Value & MI_INTR_MASK_CLR_SP ) != 0 ) { MI_INTR_MASK_REG &= ~MI_INTR_MASK_SP; }
if ( ( Value & MI_INTR_MASK_SET_SP ) != 0 ) { MI_INTR_MASK_REG |= MI_INTR_MASK_SP; }
if ( ( Value & MI_INTR_MASK_CLR_SI ) != 0 ) { MI_INTR_MASK_REG &= ~MI_INTR_MASK_SI; }
if ( ( Value & MI_INTR_MASK_SET_SI ) != 0 ) { MI_INTR_MASK_REG |= MI_INTR_MASK_SI; }
if ( ( Value & MI_INTR_MASK_CLR_AI ) != 0 ) { MI_INTR_MASK_REG &= ~MI_INTR_MASK_AI; }
if ( ( Value & MI_INTR_MASK_SET_AI ) != 0 ) { MI_INTR_MASK_REG |= MI_INTR_MASK_AI; }
if ( ( Value & MI_INTR_MASK_CLR_VI ) != 0 ) { MI_INTR_MASK_REG &= ~MI_INTR_MASK_VI; }
if ( ( Value & MI_INTR_MASK_SET_VI ) != 0 ) { MI_INTR_MASK_REG |= MI_INTR_MASK_VI; }
if ( ( Value & MI_INTR_MASK_CLR_PI ) != 0 ) { MI_INTR_MASK_REG &= ~MI_INTR_MASK_PI; }
if ( ( Value & MI_INTR_MASK_SET_PI ) != 0 ) { MI_INTR_MASK_REG |= MI_INTR_MASK_PI; }
if ( ( Value & MI_INTR_MASK_CLR_DP ) != 0 ) { MI_INTR_MASK_REG &= ~MI_INTR_MASK_DP; }
if ( ( Value & MI_INTR_MASK_SET_DP ) != 0 ) { MI_INTR_MASK_REG |= MI_INTR_MASK_DP; }
if ( ( Value & MI_INTR_MASK_CLR_SP ) != 0 ) { _Reg->MI_INTR_MASK_REG &= ~MI_INTR_MASK_SP; }
if ( ( Value & MI_INTR_MASK_SET_SP ) != 0 ) { _Reg->MI_INTR_MASK_REG |= MI_INTR_MASK_SP; }
if ( ( Value & MI_INTR_MASK_CLR_SI ) != 0 ) { _Reg->MI_INTR_MASK_REG &= ~MI_INTR_MASK_SI; }
if ( ( Value & MI_INTR_MASK_SET_SI ) != 0 ) { _Reg->MI_INTR_MASK_REG |= MI_INTR_MASK_SI; }
if ( ( Value & MI_INTR_MASK_CLR_AI ) != 0 ) { _Reg->MI_INTR_MASK_REG &= ~MI_INTR_MASK_AI; }
if ( ( Value & MI_INTR_MASK_SET_AI ) != 0 ) { _Reg->MI_INTR_MASK_REG |= MI_INTR_MASK_AI; }
if ( ( Value & MI_INTR_MASK_CLR_VI ) != 0 ) { _Reg->MI_INTR_MASK_REG &= ~MI_INTR_MASK_VI; }
if ( ( Value & MI_INTR_MASK_SET_VI ) != 0 ) { _Reg->MI_INTR_MASK_REG |= MI_INTR_MASK_VI; }
if ( ( Value & MI_INTR_MASK_CLR_PI ) != 0 ) { _Reg->MI_INTR_MASK_REG &= ~MI_INTR_MASK_PI; }
if ( ( Value & MI_INTR_MASK_SET_PI ) != 0 ) { _Reg->MI_INTR_MASK_REG |= MI_INTR_MASK_PI; }
if ( ( Value & MI_INTR_MASK_CLR_DP ) != 0 ) { _Reg->MI_INTR_MASK_REG &= ~MI_INTR_MASK_DP; }
if ( ( Value & MI_INTR_MASK_SET_DP ) != 0 ) { _Reg->MI_INTR_MASK_REG |= MI_INTR_MASK_DP; }
break;
default:
return FALSE;

94
Source/Project64/N64 System/Mips/OpCode Analysis Class.cpp
View File

@ -1,4 +1,4 @@
#include "..\..\N64 System.h"
#include "stdafx.h"
extern CLog TlbLog;
COpcodeAnalysis::COpcodeAnalysis(OPCODE &opcode) :
@ -438,21 +438,21 @@ stdstr COpcodeAnalysis::FullName(bool * MultipleOps) {
*MultipleOps = true;
}
char Param[100];
sprintf(Param, "%s, 0x%08X",GPR_Name[Register],Value);
sprintf(Param, "%s, 0x%08X",CRegName::GPR[Register],Value);
OpName = stdstr("li");
OpParam = stdstr(Param);
}
if (m_opcode.op == R4300i_ADDIU && m_opcode.rs == 0) {
char Param[100];
sprintf(Param, "%s, 0x%08X",GPR_Name[m_opcode.rt], (DWORD)((short)m_opcode.immediate));
sprintf(Param, "%s, 0x%08X",CRegName::GPR[m_opcode.rt], (DWORD)((short)m_opcode.immediate));
OpName = stdstr("li");
OpParam = stdstr(Param);
}
if (m_opcode.op == R4300i_ORI && m_opcode.rs == 0) {
char Param[100];
sprintf(Param, "%s, 0x%08X",GPR_Name[m_opcode.rt],m_opcode.immediate);
sprintf(Param, "%s, 0x%08X",CRegName::GPR[m_opcode.rt],m_opcode.immediate);
OpName = stdstr("li");
OpParam = stdstr(Param);
@ -835,14 +835,14 @@ void COpcodeAnalysis::OpcodeParam(char * CommandName)
switch (m_opcode.funct) {
case R4300i_SPECIAL_SLL:
if (m_opcode.Hex != 0) {
sprintf(CommandName,"%s, %s, 0x%X",GPR_Name[m_opcode.rd],GPR_Name[m_opcode.rt], m_opcode.sa);
sprintf(CommandName,"%s, %s, 0x%X",CRegName::GPR[m_opcode.rd],CRegName::GPR[m_opcode.rt], m_opcode.sa);
} else {
strcpy(CommandName,"");
}
break;
case R4300i_SPECIAL_SRL:
case R4300i_SPECIAL_SRA:
sprintf(CommandName,"%s, %s, 0x%X",GPR_Name[m_opcode.rd], GPR_Name[m_opcode.rt],m_opcode.sa);
sprintf(CommandName,"%s, %s, 0x%X",CRegName::GPR[m_opcode.rd], CRegName::GPR[m_opcode.rt],m_opcode.sa);
break;
case R4300i_SPECIAL_SLLV:
case R4300i_SPECIAL_SRLV:
@ -850,14 +850,14 @@ void COpcodeAnalysis::OpcodeParam(char * CommandName)
case R4300i_SPECIAL_DSLLV:
case R4300i_SPECIAL_DSRLV:
case R4300i_SPECIAL_DSRAV:
sprintf(CommandName,"%s, %s, %s",GPR_Name[m_opcode.rd], GPR_Name[m_opcode.rt],
GPR_Name[m_opcode.rs]);
sprintf(CommandName,"%s, %s, %s",CRegName::GPR[m_opcode.rd], CRegName::GPR[m_opcode.rt],
CRegName::GPR[m_opcode.rs]);
break;
case R4300i_SPECIAL_JR:
sprintf(CommandName,"%s",GPR_Name[m_opcode.rs]);
sprintf(CommandName,"%s",CRegName::GPR[m_opcode.rs]);
break;
case R4300i_SPECIAL_JALR:
sprintf(CommandName,"%s, %s",GPR_Name[m_opcode.rd],GPR_Name[m_opcode.rs]);
sprintf(CommandName,"%s, %s",CRegName::GPR[m_opcode.rd],CRegName::GPR[m_opcode.rs]);
break;
case R4300i_SPECIAL_SYNC:
case R4300i_SPECIAL_SYSCALL:
@ -866,11 +866,11 @@ void COpcodeAnalysis::OpcodeParam(char * CommandName)
break;
case R4300i_SPECIAL_MFHI:
case R4300i_SPECIAL_MFLO:
sprintf(CommandName,"%s",GPR_Name[m_opcode.rd]);
sprintf(CommandName,"%s",CRegName::GPR[m_opcode.rd]);
break;
case R4300i_SPECIAL_MTHI:
case R4300i_SPECIAL_MTLO:
sprintf(CommandName,"%s",GPR_Name[m_opcode.rs]);
sprintf(CommandName,"%s",CRegName::GPR[m_opcode.rs]);
break;
case R4300i_SPECIAL_MULT:
case R4300i_SPECIAL_MULTU:
@ -880,7 +880,7 @@ void COpcodeAnalysis::OpcodeParam(char * CommandName)
case R4300i_SPECIAL_DMULTU:
case R4300i_SPECIAL_DDIV:
case R4300i_SPECIAL_DDIVU:
sprintf(CommandName,"%s, %s",GPR_Name[m_opcode.rs], GPR_Name[m_opcode.rt]);
sprintf(CommandName,"%s, %s",CRegName::GPR[m_opcode.rs], CRegName::GPR[m_opcode.rt]);
break;
case R4300i_SPECIAL_ADD:
case R4300i_SPECIAL_ADDU:
@ -896,8 +896,8 @@ void COpcodeAnalysis::OpcodeParam(char * CommandName)
case R4300i_SPECIAL_DADDU:
case R4300i_SPECIAL_DSUB:
case R4300i_SPECIAL_DSUBU:
sprintf(CommandName,"%s, %s, %s",GPR_Name[m_opcode.rd], GPR_Name[m_opcode.rs],
GPR_Name[m_opcode.rt]);
sprintf(CommandName,"%s, %s, %s",CRegName::GPR[m_opcode.rd], CRegName::GPR[m_opcode.rs],
CRegName::GPR[m_opcode.rt]);
break;
case R4300i_SPECIAL_TGE:
case R4300i_SPECIAL_TGEU:
@ -905,18 +905,18 @@ void COpcodeAnalysis::OpcodeParam(char * CommandName)
case R4300i_SPECIAL_TLTU:
case R4300i_SPECIAL_TEQ:
case R4300i_SPECIAL_TNE:
sprintf(CommandName,"%s, %s",GPR_Name[m_opcode.rs],GPR_Name[m_opcode.rt]);
sprintf(CommandName,"%s, %s",CRegName::GPR[m_opcode.rs],CRegName::GPR[m_opcode.rt]);
break;
case R4300i_SPECIAL_DSLL:
case R4300i_SPECIAL_DSRL:
case R4300i_SPECIAL_DSRA:
sprintf(CommandName,"%s, %s, 0x%X",GPR_Name[m_opcode.rd],
GPR_Name[m_opcode.rt], m_opcode.sa);
sprintf(CommandName,"%s, %s, 0x%X",CRegName::GPR[m_opcode.rd],
CRegName::GPR[m_opcode.rt], m_opcode.sa);
break;
case R4300i_SPECIAL_DSLL32:
case R4300i_SPECIAL_DSRL32:
case R4300i_SPECIAL_DSRA32:
sprintf(CommandName,"%s, %s, 0x%X",GPR_Name[m_opcode.rd],GPR_Name[m_opcode.rt], m_opcode.sa);
sprintf(CommandName,"%s, %s, 0x%X",CRegName::GPR[m_opcode.rd],CRegName::GPR[m_opcode.rt], m_opcode.sa);
break;
}
break;
@ -928,19 +928,19 @@ void COpcodeAnalysis::OpcodeParam(char * CommandName)
if (m_opcode.rs == 0 && m_opcode.rt == 0) {
sprintf(CommandName,"%s", _Labels->LabelName(m_opcode.VirtualAddress + ((short)m_opcode.offset << 2) + 4));
} else if (m_opcode.rs == 0 || m_opcode.rt == 0) {
sprintf(CommandName,"%s, %s", GPR_Name[m_opcode.rs == 0 ? m_opcode.rt : m_opcode.rs ],
sprintf(CommandName,"%s, %s", CRegName::GPR[m_opcode.rs == 0 ? m_opcode.rt : m_opcode.rs ],
_Labels->LabelName(m_opcode.VirtualAddress + ((short)m_opcode.offset << 2) + 4));
} else {
sprintf(CommandName,"%s, %s, %s", GPR_Name[m_opcode.rs], GPR_Name[m_opcode.rt],
sprintf(CommandName,"%s, %s, %s", CRegName::GPR[m_opcode.rs], CRegName::GPR[m_opcode.rt],
_Labels->LabelName(m_opcode.VirtualAddress + ((short)m_opcode.offset << 2) + 4));
}
break;
case R4300i_BNE:
if ((m_opcode.rs == 0) ^ (m_opcode.rt == 0)){
sprintf(CommandName,"%s, %s", GPR_Name[m_opcode.rs == 0 ? m_opcode.rt : m_opcode.rs ],
sprintf(CommandName,"%s, %s", CRegName::GPR[m_opcode.rs == 0 ? m_opcode.rt : m_opcode.rs ],
_Labels->LabelName(m_opcode.VirtualAddress + ((short)m_opcode.offset << 2) + 4));
} else {
sprintf(CommandName,"%s, %s, %s", GPR_Name[m_opcode.rs], GPR_Name[m_opcode.rt],
sprintf(CommandName,"%s, %s, %s", CRegName::GPR[m_opcode.rs], CRegName::GPR[m_opcode.rt],
_Labels->LabelName(m_opcode.VirtualAddress + ((short)m_opcode.offset << 2) + 4));
}
break;
@ -952,14 +952,14 @@ void COpcodeAnalysis::OpcodeParam(char * CommandName)
case R4300i_REGIMM_BLTZAL:
case R4300i_REGIMM_BLTZALL:
case R4300i_REGIMM_BGEZALL:
sprintf(CommandName,"%s, %s", GPR_Name[m_opcode.rs], _Labels->LabelName(m_opcode.VirtualAddress + ((short)m_opcode.offset << 2) + 4));
sprintf(CommandName,"%s, %s", CRegName::GPR[m_opcode.rs], _Labels->LabelName(m_opcode.VirtualAddress + ((short)m_opcode.offset << 2) + 4));
break;
case R4300i_REGIMM_BGEZ:
case R4300i_REGIMM_BGEZAL:
if (m_opcode.rs == 0) {
sprintf(CommandName,"%s", _Labels->LabelName(m_opcode.VirtualAddress + ((short)m_opcode.offset << 2) + 4));
} else {
sprintf(CommandName,"%s, %s", GPR_Name[m_opcode.rs], _Labels->LabelName(m_opcode.VirtualAddress + ((short)m_opcode.offset << 2) + 4));
sprintf(CommandName,"%s, %s", CRegName::GPR[m_opcode.rs], _Labels->LabelName(m_opcode.VirtualAddress + ((short)m_opcode.offset << 2) + 4));
}
break;
case R4300i_REGIMM_TGEI:
@ -968,13 +968,13 @@ void COpcodeAnalysis::OpcodeParam(char * CommandName)
case R4300i_REGIMM_TLTIU:
case R4300i_REGIMM_TEQI:
case R4300i_REGIMM_TNEI:
sprintf(CommandName,"%s, 0x%X",GPR_Name[m_opcode.rs],m_opcode.immediate);
sprintf(CommandName,"%s, 0x%X",CRegName::GPR[m_opcode.rs],m_opcode.immediate);
break;
}
break;
case R4300i_BLEZ:
case R4300i_BGTZ:
sprintf(CommandName,"%s, %s",GPR_Name[m_opcode.rs], _Labels->LabelName(m_opcode.VirtualAddress + ((short)m_opcode.offset << 2) + 4));
sprintf(CommandName,"%s, %s",CRegName::GPR[m_opcode.rs], _Labels->LabelName(m_opcode.VirtualAddress + ((short)m_opcode.offset << 2) + 4));
break;
case R4300i_ADDI:
case R4300i_ADDIU:
@ -984,19 +984,19 @@ void COpcodeAnalysis::OpcodeParam(char * CommandName)
case R4300i_ORI:
case R4300i_XORI:
if (m_opcode.rt == m_opcode.rs) {
sprintf(CommandName,"%s, 0x%X",GPR_Name[m_opcode.rt], m_opcode.immediate);
sprintf(CommandName,"%s, 0x%X",CRegName::GPR[m_opcode.rt], m_opcode.immediate);
} else {
sprintf(CommandName,"%s, %s, 0x%X",GPR_Name[m_opcode.rt], GPR_Name[m_opcode.rs],m_opcode.immediate);
sprintf(CommandName,"%s, %s, 0x%X",CRegName::GPR[m_opcode.rt], CRegName::GPR[m_opcode.rs],m_opcode.immediate);
}
break;
case R4300i_LUI:
sprintf(CommandName,"%s, 0x%X",GPR_Name[m_opcode.rt], m_opcode.immediate);
sprintf(CommandName,"%s, 0x%X",CRegName::GPR[m_opcode.rt], m_opcode.immediate);
break;
case R4300i_CP0:
switch (m_opcode.rs) {
case R4300i_COP0_MF:
case R4300i_COP0_MT:
sprintf(CommandName,"%s, %s",GPR_Name[m_opcode.rt], Cop0_Name[m_opcode.rd]);
sprintf(CommandName,"%s, %s",CRegName::GPR[m_opcode.rt], CRegName::Cop0[m_opcode.rd]);
break;
default:
if ( (m_opcode.rs & 0x10 ) != 0 ) {
@ -1017,11 +1017,11 @@ void COpcodeAnalysis::OpcodeParam(char * CommandName)
case R4300i_COP1_DMF:
case R4300i_COP1_MT:
case R4300i_COP1_DMT:
sprintf(CommandName,"%s, %s",GPR_Name[m_opcode.rt], FPR_Name[m_opcode.fs]);
sprintf(CommandName,"%s, %s",CRegName::GPR[m_opcode.rt], CRegName::FPR[m_opcode.fs]);
break;
case R4300i_COP1_CF:
case R4300i_COP1_CT:
sprintf(CommandName,"%s, %s",GPR_Name[m_opcode.rt], FPR_Ctrl_Name[m_opcode.fs]);
sprintf(CommandName,"%s, %s",CRegName::GPR[m_opcode.rt], CRegName::FPR_Ctrl[m_opcode.fs]);
break;
case R4300i_COP1_BC:
switch (m_opcode.ft) {
@ -1042,8 +1042,8 @@ void COpcodeAnalysis::OpcodeParam(char * CommandName)
case R4300i_COP1_FUNCT_SUB:
case R4300i_COP1_FUNCT_MUL:
case R4300i_COP1_FUNCT_DIV:
sprintf(CommandName,"%s, %s, %s",FPR_Name[m_opcode.fd], FPR_Name[m_opcode.fs],
FPR_Name[m_opcode.ft]);
sprintf(CommandName,"%s, %s, %s",CRegName::FPR[m_opcode.fd], CRegName::FPR[m_opcode.fs],
CRegName::FPR[m_opcode.ft]);
break;
case R4300i_COP1_FUNCT_SQRT:
case R4300i_COP1_FUNCT_ABS:
@ -1061,7 +1061,7 @@ void COpcodeAnalysis::OpcodeParam(char * CommandName)
case R4300i_COP1_FUNCT_CVT_D:
case R4300i_COP1_FUNCT_CVT_W:
case R4300i_COP1_FUNCT_CVT_L:
sprintf(CommandName,"%s, %s",FPR_Name[m_opcode.fd], FPR_Name[m_opcode.fs]);
sprintf(CommandName,"%s, %s",CRegName::FPR[m_opcode.fd], CRegName::FPR[m_opcode.fs]);
break;
case R4300i_COP1_FUNCT_C_F:
case R4300i_COP1_FUNCT_C_UN:
@ -1079,7 +1079,7 @@ void COpcodeAnalysis::OpcodeParam(char * CommandName)
case R4300i_COP1_FUNCT_C_NGE:
case R4300i_COP1_FUNCT_C_LE:
case R4300i_COP1_FUNCT_C_NGT:
sprintf(CommandName,"%s, %s",FPR_Name[m_opcode.fs], FPR_Name[m_opcode.ft]);
sprintf(CommandName,"%s, %s",CRegName::FPR[m_opcode.fs], CRegName::FPR[m_opcode.ft]);
break;
}
}
@ -1088,29 +1088,29 @@ void COpcodeAnalysis::OpcodeParam(char * CommandName)
if (m_opcode.rs == m_opcode.rt) {
sprintf(CommandName,"%s", _Labels->LabelName(m_opcode.VirtualAddress + ((short)m_opcode.offset << 2) + 4));
} else if ((m_opcode.rs == 0) ^ (m_opcode.rt == 0)){
sprintf(CommandName,"%s, %s", GPR_Name[m_opcode.rs == 0 ? m_opcode.rt : m_opcode.rs ],
sprintf(CommandName,"%s, %s", CRegName::GPR[m_opcode.rs == 0 ? m_opcode.rt : m_opcode.rs ],
_Labels->LabelName(m_opcode.VirtualAddress + ((short)m_opcode.offset << 2) + 4));
} else {
sprintf(CommandName,"%s, %s, %s", GPR_Name[m_opcode.rs], GPR_Name[m_opcode.rt],
sprintf(CommandName,"%s, %s, %s", CRegName::GPR[m_opcode.rs], CRegName::GPR[m_opcode.rt],
_Labels->LabelName(m_opcode.VirtualAddress + ((short)m_opcode.offset << 2) + 4));
}
break;
case R4300i_BNEL:
if ((m_opcode.rs == 0) ^ (m_opcode.rt == 0)){
sprintf(CommandName,"%s, %s", GPR_Name[m_opcode.rs == 0 ? m_opcode.rt : m_opcode.rs ],
sprintf(CommandName,"%s, %s", CRegName::GPR[m_opcode.rs == 0 ? m_opcode.rt : m_opcode.rs ],
_Labels->LabelName(m_opcode.VirtualAddress + ((short)m_opcode.offset << 2) + 4));
} else {
sprintf(CommandName,"%s, %s, %s", GPR_Name[m_opcode.rs], GPR_Name[m_opcode.rt],
sprintf(CommandName,"%s, %s, %s", CRegName::GPR[m_opcode.rs], CRegName::GPR[m_opcode.rt],
_Labels->LabelName(m_opcode.VirtualAddress + ((short)m_opcode.offset << 2) + 4));
}
break;
case R4300i_BLEZL:
case R4300i_BGTZL:
sprintf(CommandName,"%s, %s",GPR_Name[m_opcode.rs], _Labels->LabelName(m_opcode.VirtualAddress + ((short)m_opcode.offset << 2) + 4));
sprintf(CommandName,"%s, %s",CRegName::GPR[m_opcode.rs], _Labels->LabelName(m_opcode.VirtualAddress + ((short)m_opcode.offset << 2) + 4));
break;
case R4300i_DADDI:
case R4300i_DADDIU:
sprintf(CommandName,"%s, %s, 0x%X",GPR_Name[m_opcode.rt], GPR_Name[m_opcode.rs],m_opcode.immediate);
sprintf(CommandName,"%s, %s, 0x%X",CRegName::GPR[m_opcode.rt], CRegName::GPR[m_opcode.rs],m_opcode.immediate);
break;
case R4300i_LDL:
case R4300i_LDR:
@ -1134,19 +1134,19 @@ void COpcodeAnalysis::OpcodeParam(char * CommandName)
case R4300i_SD:
case R4300i_SC:
if (m_opcode.offset == 0) {
sprintf(CommandName,"%s, %s",GPR_Name[m_opcode.rt], GPR_Name[m_opcode.base]);
sprintf(CommandName,"%s, %s",CRegName::GPR[m_opcode.rt], CRegName::GPR[m_opcode.base]);
} else {
sprintf(CommandName,"%s, 0x%X (%s)",GPR_Name[m_opcode.rt], m_opcode.offset, GPR_Name[m_opcode.base]);
sprintf(CommandName,"%s, 0x%X (%s)",CRegName::GPR[m_opcode.rt], m_opcode.offset, CRegName::GPR[m_opcode.base]);
}
break;
case R4300i_CACHE:
sprintf(CommandName,"%d, 0x%X (%s)",m_opcode.rt, m_opcode.offset, GPR_Name[m_opcode.base]);
sprintf(CommandName,"%d, 0x%X (%s)",m_opcode.rt, m_opcode.offset, CRegName::GPR[m_opcode.base]);
break;
case R4300i_LWC1:
case R4300i_LDC1:
case R4300i_SWC1:
case R4300i_SDC1:
sprintf(CommandName,"%s, 0x%X (%s)",FPR_Name[m_opcode.rt], m_opcode.offset, GPR_Name[m_opcode.base]);
sprintf(CommandName,"%s, 0x%X (%s)",CRegName::FPR[m_opcode.rt], m_opcode.offset, CRegName::GPR[m_opcode.base]);
break;
}
}

3
Source/Project64/N64 System/Mips/OpCode Analysis Class.h
View File

@ -1,5 +1,4 @@
class COpcodeAnalysis :
private CRegistersName
class COpcodeAnalysis
{
OPCODE &m_opcode;

2
Source/Project64/N64 System/Mips/OpCode Class.cpp
View File

@ -1,4 +1,4 @@
#include "..\..\N64 System.h"
#include "stdafx.h"
QWORD const COpcode::LDL_MASK[8] = { 0x0000000000000000,0x00000000000000FF,0x000000000000FFFF,
0x0000000000FFFFFF,0x00000000FFFFFFFF,0x000000FFFFFFFFFF,

161
Source/Project64/N64 System/Mips/Register Class.cpp
View File

@ -1,38 +1,35 @@
#include "..\..\N64 System.h"
#include <float.h> //needed for fpu setting flag
#include "stdafx.h"
extern CLog TlbLog;
const char * CRegistersName::GPR_Name[32] = {"r0","at","v0","v1","a0","a1","a2","a3",
const char * CRegName::GPR[32] = {"r0","at","v0","v1","a0","a1","a2","a3",
"t0","t1","t2","t3","t4","t5","t6","t7",
"s0","s1","s2","s3","s4","s5","s6","s7",
"t8","t9","k0","k1","gp","sp","s8","ra"};
const char *CRegistersName::GPR_NameHi[32] = {"r0.HI","at.HI","v0.HI","v1.HI","a0.HI","a1.HI",
const char *CRegName::GPR_Hi[32] = {"r0.HI","at.HI","v0.HI","v1.HI","a0.HI","a1.HI",
"a2.HI","a3.HI","t0.HI","t1.HI","t2.HI","t3.HI",
"t4.HI","t5.HI","t6.HI","t7.HI","s0.HI","s1.HI",
"s2.HI","s3.HI","s4.HI","s5.HI","s6.HI","s7.HI",
"t8.HI","t9.HI","k0.HI","k1.HI","gp.HI","sp.HI",
"s8.HI","ra.HI"};
const char *CRegistersName::GPR_NameLo[32] = {"r0.LO","at.LO","v0.LO","v1.LO","a0.LO","a1.LO",
const char *CRegName::GPR_Lo[32] = {"r0.LO","at.LO","v0.LO","v1.LO","a0.LO","a1.LO",
"a2.LO","a3.LO","t0.LO","t1.LO","t2.LO","t3.LO",
"t4.LO","t5.LO","t6.LO","t7.LO","s0.LO","s1.LO",
"s2.LO","s3.LO","s4.LO","s5.LO","s6.LO","s7.LO",
"t8.LO","t9.LO","k0.LO","k1.LO","gp.LO","sp.LO",
"s8.LO","ra.LO"};
const char * CRegistersName::Cop0_Name[32] = {"Index","Random","EntryLo0","EntryLo1","Context","PageMask","Wired","",
const char * CRegName::Cop0[32] = {"Index","Random","EntryLo0","EntryLo1","Context","PageMask","Wired","",
"BadVAddr","Count","EntryHi","Compare","Status","Cause","EPC","PRId",
"Config","LLAddr","WatchLo","WatchHi","XContext","","","",
"","","ECC","CacheErr","TagLo","TagHi","ErrEPC",""};
const char * CRegistersName::FPR_Name[32] = {"f0","f1","f2","f3","f4","f5","f6","f7",
const char * CRegName::FPR[32] = {"f0","f1","f2","f3","f4","f5","f6","f7",
"f8","f9","f10","f11","f12","f13","f14","f15",
"f16","f17","f18","f19","f20","f21","f22","f23",
"f24","f25","f26","f27","f28","f29","f30","f31"};
const char * CRegistersName::FPR_Ctrl_Name[32] = {"Revision","Unknown","Unknown","Unknown","Unknown",
const char * CRegName::FPR_Ctrl[32] = {"Revision","Unknown","Unknown","Unknown","Unknown",
"Unknown","Unknown","Unknown","Unknown","Unknown","Unknown",
"Unknown","Unknown","Unknown","Unknown","Unknown","Unknown",
"Unknown","Unknown","Unknown","Unknown","Unknown","Unknown",
@ -62,6 +59,21 @@ CP0registers::CP0registers(DWORD * _CP0) :
{
}
Rdram_InterfaceReg::Rdram_InterfaceReg(DWORD * _RdramInterface) :
RDRAM_CONFIG_REG(_RdramInterface[0]),
RDRAM_DEVICE_TYPE_REG(_RdramInterface[0]),
RDRAM_DEVICE_ID_REG(_RdramInterface[1]),
RDRAM_DELAY_REG(_RdramInterface[2]),
RDRAM_MODE_REG(_RdramInterface[3]),
RDRAM_REF_INTERVAL_REG(_RdramInterface[4]),
RDRAM_REF_ROW_REG(_RdramInterface[5]),
RDRAM_RAS_INTERVAL_REG(_RdramInterface[6]),
RDRAM_MIN_INTERVAL_REG(_RdramInterface[7]),
RDRAM_ADDR_SELECT_REG(_RdramInterface[8]),
RDRAM_DEVICE_MANUF_REG(_RdramInterface[9])
{
}
Mips_InterfaceReg::Mips_InterfaceReg(DWORD * _MipsInterface) :
MI_INIT_MODE_REG(_MipsInterface[0]),
MI_MODE_REG(_MipsInterface[0]),
@ -72,16 +84,6 @@ Mips_InterfaceReg::Mips_InterfaceReg(DWORD * _MipsInterface) :
{
}
AudioInterfaceReg::AudioInterfaceReg(DWORD * _AudioInterface) :
AI_DRAM_ADDR_REG(_AudioInterface[0]),
AI_LEN_REG(_AudioInterface[1]),
AI_CONTROL_REG(_AudioInterface[2]),
AI_STATUS_REG(_AudioInterface[3]),
AI_DACRATE_REG(_AudioInterface[4]),
AI_BITRATE_REG(_AudioInterface[5])
{
}
Video_InterfaceReg::Video_InterfaceReg(DWORD * _VideoInterface) :
VI_STATUS_REG(_VideoInterface[0]),
VI_CONTROL_REG(_VideoInterface[0]),
@ -109,7 +111,48 @@ Video_InterfaceReg::Video_InterfaceReg(DWORD * _VideoInterface) :
{
}
AudioInterfaceReg::AudioInterfaceReg(DWORD * _AudioInterface) :
AI_DRAM_ADDR_REG(_AudioInterface[0]),
AI_LEN_REG(_AudioInterface[1]),
AI_CONTROL_REG(_AudioInterface[2]),
AI_STATUS_REG(_AudioInterface[3]),
AI_DACRATE_REG(_AudioInterface[4]),
AI_BITRATE_REG(_AudioInterface[5])
{
}
PeripheralInterfaceReg::PeripheralInterfaceReg(DWORD * PeripheralInterface) :
PI_DRAM_ADDR_REG(PeripheralInterface[0]),
PI_CART_ADDR_REG(PeripheralInterface[1]),
PI_RD_LEN_REG(PeripheralInterface[2]),
PI_WR_LEN_REG(PeripheralInterface[3]),
PI_STATUS_REG(PeripheralInterface[4]),
PI_BSD_DOM1_LAT_REG(PeripheralInterface[5]),
PI_DOMAIN1_REG(PeripheralInterface[5]),
PI_BSD_DOM1_PWD_REG(PeripheralInterface[6]),
PI_BSD_DOM1_PGS_REG(PeripheralInterface[7]),
PI_BSD_DOM1_RLS_REG(PeripheralInterface[8]),
PI_BSD_DOM2_LAT_REG(PeripheralInterface[9]),
PI_DOMAIN2_REG(PeripheralInterface[9]),
PI_BSD_DOM2_PWD_REG(PeripheralInterface[10]),
PI_BSD_DOM2_PGS_REG(PeripheralInterface[11]),
PI_BSD_DOM2_RLS_REG(PeripheralInterface[12])
{
}
RDRAMInt_InterfaceReg::RDRAMInt_InterfaceReg(DWORD * RdramInterface) :
RI_MODE_REG(RdramInterface[0]),
RI_CONFIG_REG(RdramInterface[1]),
RI_CURRENT_LOAD_REG(RdramInterface[2]),
RI_SELECT_REG(RdramInterface[3]),
RI_COUNT_REG(RdramInterface[4]),
RI_REFRESH_REG(RdramInterface[4]),
RI_LATENCY_REG(RdramInterface[5]),
RI_RERROR_REG(RdramInterface[6]),
RI_WERROR_REG(RdramInterface[7])
{
}
DisplayControlReg::DisplayControlReg(DWORD * _DisplayProcessor) :
DPC_START_REG(_DisplayProcessor[0]),
DPC_END_REG(_DisplayProcessor[1]),
@ -136,6 +179,64 @@ SigProcessor_InterfaceReg::SigProcessor_InterfaceReg(DWORD * _SignalProcessorInt
{
}
Serial_InterfaceReg::Serial_InterfaceReg(DWORD * SerialInterface) :
SI_DRAM_ADDR_REG(SerialInterface[0]),
SI_PIF_ADDR_RD64B_REG(SerialInterface[1]),
SI_PIF_ADDR_WR64B_REG(SerialInterface[2]),
SI_STATUS_REG(SerialInterface[3])
{
}
CRegisters::CRegisters (void) :
CP0registers(m_CP0),
Rdram_InterfaceReg(m_RDRAM_Registers),
Mips_InterfaceReg(m_Mips_Interface),
Video_InterfaceReg(m_Video_Interface),
AudioInterfaceReg(m_Audio_Interface),
PeripheralInterfaceReg(m_Peripheral_Interface),
RDRAMInt_InterfaceReg(m_RDRAM_Interface),
SigProcessor_InterfaceReg(m_SigProcessor_Interface),
DisplayControlReg(m_Display_ControlReg),
Serial_InterfaceReg(m_SerialInterface)
{
memset(m_GPR,0,sizeof(m_GPR));
memset(m_CP0,0,sizeof(m_CP0));
memset(m_FPR,0,sizeof(m_FPR));
memset(m_FPCR,0,sizeof(m_FPCR));
m_HI.DW = 0;
m_LO.DW = 0;
//LLBit = 0;
//LLAddr = 0;
//Reset System Registers
memset(m_RDRAM_Interface,0,sizeof(m_RDRAM_Interface));
memset(m_RDRAM_Registers,0,sizeof(m_RDRAM_Registers));
memset(m_Mips_Interface,0,sizeof(m_Mips_Interface));
memset(m_Video_Interface,0,sizeof(m_Video_Interface));
memset(m_Display_ControlReg,0,sizeof(m_Display_ControlReg));
memset(m_Audio_Interface,0,sizeof(m_Audio_Interface));
memset(m_SigProcessor_Interface,0,sizeof(m_SigProcessor_Interface));
memset(m_Peripheral_Interface,0,sizeof(m_Peripheral_Interface));
memset(m_SerialInterface,0,sizeof(m_SerialInterface));
FixFpuLocations();
}
void CRegisters::FixFpuLocations ( void ) {
if ((STATUS_REGISTER & STATUS_FR) == 0) {
for (int count = 0; count < 32; count ++) {
m_FPR_S[count] = &m_FPR[count >> 1].F[count & 1];
m_FPR_D[count] = &m_FPR[count >> 1].D;
}
} else {
for (int count = 0; count < 32; count ++) {
m_FPR_S[count] = &m_FPR[count].F[1];
m_FPR_D[count] = &m_FPR[count].D;
}
}
}
#ifdef toremove
void CRegisters::InitalizeR4300iRegisters (CMipsMemory & MMU, bool PostPif, int Country, CICChip CIC_Chip)
{
//Reset General Registers
@ -326,22 +427,9 @@ void CRegisters::InitalizeR4300iRegisters (CMipsMemory & MMU, bool PostPif, int
}
FixFpuLocations();
}
#endif
void CRegisters::FixFpuLocations ( void ) {
if ((STATUS_REGISTER & STATUS_FR) == 0) {
for (int count = 0; count < 32; count ++) {
FPR_S[count] = &FPR[count >> 1].F[count & 1];
FPR_D[count] = &FPR[count >> 1].D;
}
} else {
for (int count = 0; count < 32; count ++) {
FPR_S[count] = &FPR[count].F[1];
FPR_D[count] = &FPR[count].D;
}
}
}
#ifdef tofix
void CRegisters::CheckInterrupts ( void ) {
if ((MI_INTR_MASK_REG & MI_INTR_REG) != 0) {
FAKE_CAUSE_REGISTER |= CAUSE_IP2;
@ -358,7 +446,7 @@ void CRegisters::CheckInterrupts ( void ) {
}
}
#ifdef hhh
#ifdef toremove
void CRegisters::ExecuteInterruptException ( bool DelaySlot ) {
if (( STATUS_REGISTER & STATUS_IE ) == 0 ) { return; }
@ -462,4 +550,5 @@ void CRegisters::ChangeDefaultRoundingModel (int Reg) {
case 3: _RoundingModel = ROUND_DOWN; break;
}
}
#endif
#endif

286
Source/Project64/N64 System/Mips/Register Class.h
View File

@ -1,22 +1,8 @@
#ifndef __REGISTER_CLASS__H__
#define __REGISTER_CLASS__H__
#include "System Timing.h" //base class
enum ROUNDING_MODE {
ROUND_NEAR = 0x00000000,
ROUND_CHOP = 0x00000300,
ROUND_UP = 0x00000200,
ROUND_DOWN = 0x00000100,
};
//registers general come from a mapping from the memory class to a pointer
//inside Classes. To make the code cleaner with out using global variables
//we just use this pointer.
//CPO registers by name
class CP0registers
{
CP0registers (void);
protected:
CP0registers (DWORD * _CP0);
@ -111,36 +97,33 @@ enum {
FPCSR_RM_RM = 0x00000003, /* round to negative infinity */
};
/*
//Rdram Interface Registers
#define RDRAM_Interface _Reg->_RDRAMInterface
#define RI_MODE_REG _Reg->_RDRAMInterface[0]
#define RI_CONFIG_REG _Reg->_RDRAMInterface[1]
#define RI_CURRENT_LOAD_REG _Reg->_RDRAMInterface[2]
#define RI_SELECT_REG _Reg->_RDRAMInterface[3]
#define RI_COUNT_REG _Reg->_RDRAMInterface[4]
#define RI_REFRESH_REG _Reg->_RDRAMInterface[4]
#define RI_LATENCY_REG _Reg->_RDRAMInterface[5]
#define RI_RERROR_REG _Reg->_RDRAMInterface[6]
#define RI_WERROR_REG _Reg->_RDRAMInterface[7]
//Rdram Registers
class Rdram_InterfaceReg
{
Rdram_InterfaceReg (void);
protected:
Rdram_InterfaceReg (DWORD * _RdramInterface);
public:
DWORD & RDRAM_CONFIG_REG;
DWORD & RDRAM_DEVICE_TYPE_REG;
DWORD & RDRAM_DEVICE_ID_REG;
DWORD & RDRAM_DELAY_REG;
DWORD & RDRAM_MODE_REG;
DWORD & RDRAM_REF_INTERVAL_REG;
DWORD & RDRAM_REF_ROW_REG;
DWORD & RDRAM_RAS_INTERVAL_REG;
DWORD & RDRAM_MIN_INTERVAL_REG;
DWORD & RDRAM_ADDR_SELECT_REG;
DWORD & RDRAM_DEVICE_MANUF_REG;
};
//Rdram registers
#define RDRAM_Registers _Reg->_RDRAMRegisters
#define RDRAM_CONFIG_REG _Reg->_RDRAMRegisters[0]
#define RDRAM_DEVICE_TYPE_REG _Reg->_RDRAMRegisters[0]
#define RDRAM_DEVICE_ID_REG _Reg->_RDRAMRegisters[1]
#define RDRAM_DELAY_REG _Reg->_RDRAMRegisters[2]
#define RDRAM_MODE_REG _Reg->_RDRAMRegisters[3]
#define RDRAM_REF_INTERVAL_REG _Reg->_RDRAMRegisters[4]
#define RDRAM_REF_ROW_REG _Reg->_RDRAMRegisters[5]
#define RDRAM_RAS_INTERVAL_REG _Reg->_RDRAMRegisters[6]
#define RDRAM_MIN_INTERVAL_REG _Reg->_RDRAMRegisters[7]
#define RDRAM_ADDR_SELECT_REG _Reg->_RDRAMRegisters[8]
#define RDRAM_DEVICE_MANUF_REG _Reg->_RDRAMRegisters[9]
*/
//Mips interface registers
class Mips_InterfaceReg
{
Mips_InterfaceReg ();
protected:
Mips_InterfaceReg (DWORD * _MipsInterface);
@ -153,9 +136,12 @@ public:
DWORD & MI_INTR_MASK_REG;
};
//Mips interface flags
enum {
MI_MODE_INIT = 0x0080, /* Bit 7: init mode */
MI_MODE_EBUS = 0x0100, /* Bit 8: ebus test mode */
MI_MODE_RDRAM = 0x0200, /* Bit 9: RDRAM reg mode */
MI_CLR_INIT = 0x0080, /* Bit 7: clear init mode */
MI_SET_INIT = 0x0100, /* Bit 8: set init mode */
MI_CLR_EBUS = 0x0200, /* Bit 9: clear ebus test */
@ -197,6 +183,8 @@ enum {
//Mips interface registers
class Video_InterfaceReg
{
Video_InterfaceReg (void);
protected:
Video_InterfaceReg (DWORD * _VideoInterface);
@ -229,6 +217,8 @@ public:
//Display Processor Control Registers
class DisplayControlReg
{
DisplayControlReg (void);
protected:
DisplayControlReg (DWORD * _DisplayProcessor);
@ -243,9 +233,6 @@ public:
DWORD & DPC_TMEM_REG;
};
/*#define DisplayControlReg _Reg->_DisplayProcessor
*/
enum {
DPC_CLR_XBUS_DMEM_DMA = 0x0001, /* Bit 0: clear xbus_dmem_dma */
DPC_SET_XBUS_DMEM_DMA = 0x0002, /* Bit 1: set xbus_dmem_dma */
@ -276,6 +263,8 @@ enum {
*/
class AudioInterfaceReg
{
AudioInterfaceReg (void);
protected:
AudioInterfaceReg (DWORD * _AudioInterface);
@ -293,6 +282,52 @@ enum {
AI_STATUS_DMA_BUSY = 0x40000000, /* Bit 30: busy */
};
//Audio Interface registers;
class PeripheralInterfaceReg
{
PeripheralInterfaceReg (void);
protected:
PeripheralInterfaceReg (DWORD * PeripheralInterface);
public:
DWORD & PI_DRAM_ADDR_REG;
DWORD & PI_CART_ADDR_REG;
DWORD & PI_RD_LEN_REG;
DWORD & PI_WR_LEN_REG;
DWORD & PI_STATUS_REG;
DWORD & PI_BSD_DOM1_LAT_REG;
DWORD & PI_DOMAIN1_REG;
DWORD & PI_BSD_DOM1_PWD_REG;
DWORD & PI_BSD_DOM1_PGS_REG;
DWORD & PI_BSD_DOM1_RLS_REG;
DWORD & PI_BSD_DOM2_LAT_REG;
DWORD & PI_DOMAIN2_REG;
DWORD & PI_BSD_DOM2_PWD_REG;
DWORD & PI_BSD_DOM2_PGS_REG;
DWORD & PI_BSD_DOM2_RLS_REG;
};
class RDRAMInt_InterfaceReg
{
RDRAMInt_InterfaceReg (void);
protected:
RDRAMInt_InterfaceReg (DWORD * RdramInterface);
public:
DWORD & RI_MODE_REG;
DWORD & RI_CONFIG_REG;
DWORD & RI_CURRENT_LOAD_REG;
DWORD & RI_SELECT_REG;
DWORD & RI_COUNT_REG;
DWORD & RI_REFRESH_REG;
DWORD & RI_LATENCY_REG;
DWORD & RI_RERROR_REG;
DWORD & RI_WERROR_REG;
};
//Signal Processor Interface;
class SigProcessor_InterfaceReg
{
@ -357,24 +392,6 @@ enum {
SP_STATUS_SIG7 = 0x4000, /* Bit 14: signal 7 set */
};
//Peripheral Interface
/*#define Peripheral_Interface _Reg->_PeripheralInterface
#define PI_DRAM_ADDR_REG _Reg->_PeripheralInterface[0]
#define PI_CART_ADDR_REG _Reg->_PeripheralInterface[1]
#define PI_RD_LEN_REG _Reg->_PeripheralInterface[2]
#define PI_WR_LEN_REG _Reg->_PeripheralInterface[3]
#define PI_STATUS_REG _Reg->_PeripheralInterface[4]
#define PI_BSD_DOM1_LAT_REG _Reg->_PeripheralInterface[5]
#define PI_DOMAIN1_REG _Reg->_PeripheralInterface[5]
#define PI_BSD_DOM1_PWD_REG _Reg->_PeripheralInterface[6]
#define PI_BSD_DOM1_PGS_REG _Reg->_PeripheralInterface[7]
#define PI_BSD_DOM1_RLS_REG _Reg->_PeripheralInterface[8]
#define PI_BSD_DOM2_LAT_REG _Reg->_PeripheralInterface[9]
#define PI_DOMAIN2_REG _Reg->_PeripheralInterface[9]
#define PI_BSD_DOM2_PWD_REG _Reg->_PeripheralInterface[10]
#define PI_BSD_DOM2_PGS_REG _Reg->_PeripheralInterface[11]
#define PI_BSD_DOM2_RLS_REG _Reg->_PeripheralInterface[12]
*/
//Peripheral Interface flags
enum {
PI_STATUS_DMA_BUSY = 0x01,
@ -385,13 +402,21 @@ enum {
PI_CLR_INTR = 0x02,
};
//Serial Interface
/*#define SerialInterface _Reg->_SerialInterface
#define SI_DRAM_ADDR_REG _Reg->_SerialInterface[0]
#define SI_PIF_ADDR_RD64B_REG _Reg->_SerialInterface[1]
#define SI_PIF_ADDR_WR64B_REG _Reg->_SerialInterface[2]
#define SI_STATUS_REG _Reg->_SerialInterface[3]
*/
class Serial_InterfaceReg
{
Serial_InterfaceReg (void);
protected:
Serial_InterfaceReg (DWORD * SerialInterface);
public:
DWORD & SI_DRAM_ADDR_REG;
DWORD & SI_PIF_ADDR_RD64B_REG;
DWORD & SI_PIF_ADDR_WR64B_REG;
DWORD & SI_STATUS_REG;
};
//Serial Interface flags
enum {
SI_STATUS_DMA_BUSY = 0x0001,
@ -401,80 +426,90 @@ enum {
};
class CRegistersName {
class CRegName {
public:
static const char *GPR_Name[32];
static const char *GPR_NameHi[32];
static const char *GPR_NameLo[32];
static const char *Cop0_Name[32];
static const char *FPR_Name[32];
static const char *FPR_Ctrl_Name[32];
static const char *GPR[32];
static const char *GPR_Hi[32];
static const char *GPR_Lo[32];
static const char *Cop0[32];
static const char *FPR[32];
static const char *FPR_Ctrl[32];
};
class CMipsMemory;
class CRegisters:
public CP0registers,
public Rdram_InterfaceReg,
public Mips_InterfaceReg,
public Video_InterfaceReg,
public AudioInterfaceReg,
public PeripheralInterfaceReg,
public RDRAMInt_InterfaceReg,
public SigProcessor_InterfaceReg,
public DisplayControlReg,
public CSystemTimer,
public CRegistersName
public Serial_InterfaceReg
{
public:
//Constructor/Deconstructor
CRegisters ( void ) :
CP0registers(CP0),
AudioInterfaceReg(Audio_Interface),
Mips_InterfaceReg(Mips_Interface),
Video_InterfaceReg(Video_Interface),
SigProcessor_InterfaceReg(SigProcessor_Interface),
DisplayControlReg(Display_ControlReg)
{
FixFpuLocations();
}
CRegisters();
enum ROUNDING_MODE {
ROUND_NEAR = 0x00000000,
ROUND_CHOP = 0x00000300,
ROUND_UP = 0x00000200,
ROUND_DOWN = 0x00000100,
};
//General Registers
DWORD PROGRAM_COUNTER;
MULTI_ACCESS_QWORD GPR[32];
DWORD CP0[33];
DWORD FPCR[32];
MULTI_ACCESS_QWORD HI, LO; //High and Low registers used for mult and div
DWORD LLBit;
DWORD LLAddr;
DWORD m_PROGRAM_COUNTER;
MIPS_DWORD m_GPR[32];
DWORD m_CP0[33];
MIPS_DWORD m_HI;
MIPS_DWORD m_LO;
DWORD m_LLBit;
DWORD m_LLAddr;
//Floating point registers/information
ROUNDING_MODE RoundingModel;
MULTI_ACCESS_QWORD FPR[32];
float * FPR_S[32];
double * FPR_D[32];
DWORD m_FPCR[32];
ROUNDING_MODE m_RoundingModel;
MIPS_DWORD m_FPR[32];
float * m_FPR_S[32];
double * m_FPR_D[32];
//Memory Mapped N64 registers
DWORD RDRAM_Interface[8];
DWORD RDRAM_Registers[10];
DWORD Mips_Interface[4];
DWORD Video_Interface[14];
DWORD Display_ControlReg[10];
DWORD Audio_Interface[6];
DWORD SigProcessor_Interface[10];
DWORD Peripheral_Interface[13];
DWORD SerialInterface[4];
DWORD AudioIntrReg;
DWORD m_RDRAM_Registers[10];
DWORD m_SigProcessor_Interface[10];
DWORD m_Display_ControlReg[10];
DWORD m_Mips_Interface[4];
DWORD m_Video_Interface[14];
DWORD m_Audio_Interface[6];
DWORD m_Peripheral_Interface[13];
DWORD m_RDRAM_Interface[8];
DWORD m_SerialInterface[4];
DWORD m_AudioIntrReg;
void InitalizeR4300iRegisters ( CMipsMemory & MMU, bool PostPif, int Country, CICChip CIC_Chip);
void CheckInterrupts ( void );
void ExecuteCopUnusableException ( bool DelaySlot, int Coprocessor );
void ExecuteInterruptException ( bool DelaySlot );
void ExecuteTLBMissException ( CMipsMemory * MMU, bool DelaySlot, DWORD BadVaddr );
void ExecuteSysCallException ( bool DelaySlot );
void UpdateRegisterAfterOpcode ( float StepIncrease );
void FixFpuLocations ( void );
void SetCurrentRoundingModel ( ROUNDING_MODE RoundMode );
void ChangeDefaultRoundingModel ( int Reg );
void FixFpuLocations ( void );
};
#ifdef toremove
#ifndef __REGISTER_CLASS__H__
#define __REGISTER_CLASS__H__
#include "System Timing.h" //base class
enum ROUNDING_MODE {
ROUND_NEAR = 0x00000000,
ROUND_CHOP = 0x00000300,
ROUND_UP = 0x00000200,
ROUND_DOWN = 0x00000100,
};
//registers general come from a mapping from the memory class to a pointer
//inside Classes. To make the code cleaner with out using global variables
//we just use this pointer.
//Converting FPU
__inline void S_RoundToInteger32( int * Dest, float * Source ) {
_asm {
@ -513,3 +548,4 @@ __inline void D_RoundToInteger64( __int64 * Dest, double * Source ) {
}
#endif
#endif

220
Source/Project64/N64 System/Mips/System Timing.cpp
View File

@ -1,12 +1,193 @@
#include "..\..\N64 System.h"
#include "stdafx.h"
extern CLog TlbLog;
CSystemTimer::CSystemTimer( void )
CSystemTimer::CSystemTimer( int & NextTimer ) :
m_NextTimer(NextTimer)
{
ResetTimer(50000);
Reset();
SetTimer(ViTimer,50000,false);
}
void CSystemTimer::Reset ( void )
{
//initialise Structure
for (int i = 0; i < MaxTimer; i++)
{
m_TimerDetatils[i].Active = false;
m_TimerDetatils[i].CyclesToTimer = 0;
}
m_Current = UnknownTimer;
m_Timer = 0;
m_NextTimer = 0;
}
void CSystemTimer::SetTimer ( TimerType Type, DWORD Cycles, bool bRelative )
{
if (Type >= MaxTimer || Type == UnknownTimer)
{
_Notify->BreakPoint(__FILE__,__LINE__);
return;
}
UpdateTimers();
m_TimerDetatils[Type].Active = true;
if (bRelative)
{
if (m_TimerDetatils[Type].Active)
{
m_TimerDetatils[Type].CyclesToTimer += Cycles; //Add to the timer
} else {
m_TimerDetatils[Type].CyclesToTimer = (__int64)Cycles - (__int64)m_Timer; //replace the new cycles
}
} else {
m_TimerDetatils[Type].CyclesToTimer = (__int64)Cycles - (__int64)m_Timer; //replace the new cycles
}
FixTimers();
}
void CSystemTimer::StopTimer ( TimerType Type )
{
if (Type >= MaxTimer || Type == UnknownTimer)
{
_Notify->BreakPoint(__FILE__,__LINE__);
return;
}
m_TimerDetatils[Type].Active = false;
FixTimers();
}
void CSystemTimer::FixTimers (void)
{
int count;
//Update the cycles for the remaining number of cycles to timer
for (count = 0; count < MaxTimer; count++)
{
if (!m_TimerDetatils[count].Active)
{
continue;
}
m_TimerDetatils[count].CyclesToTimer += m_Timer;
}
//Set Max timer
m_Timer = 0x7FFFFFFF;
//Find the smallest timer left to go
for (count = 0; count < MaxTimer; count++)
{
if (!m_TimerDetatils[count].Active)
{
continue;
}
if (m_TimerDetatils[count].CyclesToTimer >= m_Timer)
{
continue;
}
m_Timer = m_TimerDetatils[count].CyclesToTimer;
m_Current = (TimerType)count;
}
//Move the timer back this value
for (count = 0; count < MaxTimer; count++)
{
if (!m_TimerDetatils[count].Active)
{
continue;
}
m_TimerDetatils[count].CyclesToTimer -= m_Timer;
}
m_NextTimer = m_Timer;
}
void CSystemTimer::UpdateTimers ( void )
{
int TimeTaken = m_Timer - m_NextTimer;
if (TimeTaken != 0)
{
m_Timer = m_NextTimer;
_Reg->COUNT_REGISTER += TimeTaken;
_Reg->RANDOM_REGISTER -= TimeTaken / g_CountPerOp;
while ((int)_Reg->RANDOM_REGISTER < (int)_Reg->WIRED_REGISTER)
{
_Reg->RANDOM_REGISTER += 32 - _Reg->WIRED_REGISTER;
}
}
}
void CSystemTimer::TimerDone (void)
{
UpdateTimers();
/* DWORD LastTimer;
if (Profiling) {
LastTimer = StartTimer(Timer_Done);
}
#if (!defined(EXTERNAL_RELEASE))
if (LogOptions.GenerateLog && LogOptions.LogExceptions && !LogOptions.NoInterrupts) {
LogMessage("%08X: Timer Done (Type: %d CurrentTimer: %d)", *_PROGRAM_COUNTER, m_Current, *_Timer );
}
#endif
*/
switch (m_Current) {
case CSystemTimer::CompareTimer:
_Reg->FAKE_CAUSE_REGISTER |= CAUSE_IP7;
CheckInterrupts();
UpdateCompareTimer();
break;
case CSystemTimer::SoftResetTimer:
_SystemTimer->StopTimer(CSystemTimer::SoftResetTimer);
_N64System->SoftReset();
break;
case CSystemTimer::SiTimer:
_SystemTimer->StopTimer(CSystemTimer::SiTimer);
_Reg->MI_INTR_REG |= MI_INTR_SI;
_Reg->SI_STATUS_REG |= SI_STATUS_INTERRUPT;
CheckInterrupts();
break;
case CSystemTimer::PiTimer:
_SystemTimer->StopTimer(CSystemTimer::PiTimer);
_Reg->PI_STATUS_REG &= ~PI_STATUS_DMA_BUSY;
_Reg->MI_INTR_REG |= MI_INTR_PI;
CheckInterrupts();
break;
case CSystemTimer::ViTimer:
RefreshScreen();
_Reg->MI_INTR_REG |= MI_INTR_VI;
CheckInterrupts();
break;
case CSystemTimer::RspTimer:
_SystemTimer->StopTimer(CSystemTimer::RspTimer);
RunRsp();
break;
case CSystemTimer::AiTimer:
_SystemTimer->StopTimer(CSystemTimer::AiTimer);
_Reg->MI_INTR_REG |= MI_INTR_AI;
CheckInterrupts();
_Audio->AiCallBack();
break;
default:
BreakPoint(__FILE__,__LINE__);
}
//CheckTimer();
/*if (Profiling) {
StartTimer(LastTimer);
}*/
}
void CSystemTimer::UpdateCompareTimer ( void )
{
DWORD NextCompare = _Reg->COMPARE_REGISTER - _Reg->COUNT_REGISTER;
if ((NextCompare & 0x80000000) != 0)
{
NextCompare = 0x7FFFFFFF;
}
_SystemTimer->SetTimer(CSystemTimer::CompareTimer,NextCompare,false);
}
#ifdef tofix
extern CLog TlbLog;
void CSystemTimer::ChangeTimerFixed (TimerType Type, DWORD Cycles) {
if (Type >= MaxTimer || Type == UnknownTimer) { return; }
if (Cycles == 0) {
@ -55,33 +236,6 @@ double CSystemTimer::GetTimer (TimerType Type) const {
return TimerDetatils[Type].CyclesToTimer + Timer;
}
void CSystemTimer::FixTimers (void) {
int count;
//Update the cycles for the remaining number of cycles to timer
for (count = 0; count < MaxTimer; count++) {
if (!TimerDetatils[count].Active) { continue; }
TimerDetatils[count].CyclesToTimer += Timer;
}
//Set Max timer
Timer = 0x7FFFFFFF;
//Find the smallest timer left to go
for (count = 0; count < MaxTimer; count++) {
if (!TimerDetatils[count].Active) { continue; }
if (TimerDetatils[count].CyclesToTimer >= Timer) { continue; }
Timer = TimerDetatils[count].CyclesToTimer;
CurrentTimerType = (TimerType)count;
}
//Move the timer back this value
for (count = 0; count < MaxTimer; count++) {
if (!TimerDetatils[count].Active) { continue; }
TimerDetatils[count].CyclesToTimer -= Timer;
}
}
void CSystemTimer::ResetTimer ( int NextVITimer ) {
//initilize Structure
for (int count = 0; count < MaxTimer; count ++) {
@ -98,3 +252,5 @@ void CSystemTimer::ResetTimer ( int NextVITimer ) {
void CSystemTimer::UpdateTimer (int StepIncrease) {
Timer -= StepIncrease;
}
#endif

55
Source/Project64/N64 System/Mips/System Timing.h
View File

@ -1,23 +1,41 @@
#include "..\\N64 Types.h"
typedef struct {
bool Active;
double CyclesToTimer;
} TIMER_DETAILS;
class CC_Core;
class CSystemTimer
{
friend CC_Core;
TIMER_DETAILS TimerDetatils[MaxTimer];
int Timer; //How many cycles to the next event
TimerType CurrentTimerType;
void FixTimers ( void );
public:
CSystemTimer ( void );
enum TimerType {
UnknownTimer,
CompareTimer,
SoftResetTimer,
ViTimer,
AiTimer,
AiTimerDMA,
SiTimer,
PiTimer,
RspTimer,
RSPTimerDlist,
MaxTimer
};
typedef struct {
bool Active;
__int64 CyclesToTimer;
} TIMER_DETAILS;
public:
CSystemTimer ( int & NextTimer );
void SetTimer ( TimerType Type, DWORD Cycles, bool bRelative );
void StopTimer ( TimerType Type );
void UpdateTimers ( void );
void TimerDone ( void );
void Reset ( void );
void UpdateCompareTimer ( void );
inline TimerType CurrentType ( void ) const { return m_Current; }
/* CSystemTimer ( void );
void CheckTimer ( void );
void ChangeTimerRelative ( TimerType Type, DWORD Cycles );
void ChangeTimerFixed ( TimerType Type, DWORD Cycles );
@ -26,6 +44,13 @@ public:
void UpdateTimer ( int StepIncrease );
double GetTimer ( TimerType Type ) const;
inline int GetCurrentTimer ( void ) const { return Timer; }
inline TimerType GetCurrentTimerType ( void ) const { return CurrentTimerType; }
inline int GetCurrentTimer ( void ) const { return m_Timer; }
*/
private:
TIMER_DETAILS m_TimerDetatils[MaxTimer];
int m_Timer; //How many cycles to the next event
int & m_NextTimer;
TimerType m_Current;
void FixTimers ( void );
};

1
Source/Project64/N64 System/Mips/TLB Class.h
View File

@ -1,4 +1,3 @@
class CC_Core;
class CDebugTlb;
class CTLB_CB

1
Source/Project64/N64 System/Mips/TLB class.cpp
View File

@ -48,7 +48,6 @@ bool CTLB::AddressDefined ( DWORD VAddr) {
VAddr >= m_FastTlb[i].VSTART &&
VAddr <= m_FastTlb[i].VEND)
{
//TlbLog.Log("AddressDefined from m_tlb entry %d",i);
return true;
}
}

436
Source/Project64/N64 System/N64 Class.cpp
View File

@ -1,7 +1,4 @@
#include "..\N64 System.h"
#include "..\Plugin.h"
#include "..\3rd Party\Zip.h"
#include "C Core\c core.h"
#include "stdafx.h"
#pragma warning(disable:4355) // Disable 'this' : used in base member initializer list
@ -21,7 +18,8 @@ CN64System::CN64System ( CPlugins * Plugins, bool SavesReadOnly ) :
m_InReset(false),
m_EndEmulation(false),
m_bCleanFrameBox(true),
m_bInitilized(false)
m_bInitilized(false),
m_SystemTimer(m_NextTimer)
{
m_CPU_Handle = 0;
m_CPU_ThreadID = 0;
@ -669,26 +667,39 @@ bool CN64System::SetActiveSystem( bool bActive )
{
bool bInitPlugin = false;
if (!m_bInitilized)
if (bActive)
{
if (!m_MMU_VM.Initialize())
if (!m_bInitilized)
{
return false;
if (!m_MMU_VM.Initialize())
{
return false;
}
bool PostPif = true;
InitRegisters(PostPif,m_MMU_VM);
if (PostPif)
{
memcpy((m_MMU_VM.Dmem()+0x40), (_Rom->GetRomAddress() + 0x040), 0xFBC);
}
m_SystemTimer.SetTimer(CSystemTimer::CompareTimer,m_Reg.COMPARE_REGISTER - m_Reg.COUNT_REGISTER,false);
bInitPlugin = true;
}
bool PostPif = true;
m_Reg.InitalizeR4300iRegisters(m_MMU_VM, PostPif, _Rom->GetCountry(), _Rom->CicChipID());
if (PostPif)
_N64System = this;
_MMU = &m_MMU_VM;
_Reg = &m_Reg;
_SystemTimer = &m_SystemTimer;
} else {
if (_N64System == this)
{
memcpy((m_MMU_VM.Dmem()+0x40), (_Rom->GetRomAddress() + 0x040), 0xFBC);
_N64System = NULL;
_MMU = NULL;
_Reg = NULL;
_SystemTimer = NULL;
}
bInitPlugin = true;
}
_N64System = this;
_MMU = &m_MMU_VM;
_Reg = &m_Reg;
if (bInitPlugin)
{
_Plugins->Initiate();
@ -696,6 +707,174 @@ bool CN64System::SetActiveSystem( bool bActive )
return true;
}
void CN64System::InitRegisters( bool bPostPif, CMipsMemory & MMU )
{
//COP0 Registers
m_Reg.RANDOM_REGISTER = 0x1F;
m_Reg.COUNT_REGISTER = 0x5000;
m_Reg.MI_VERSION_REG = 0x02020102;
m_Reg.SP_STATUS_REG = 0x00000001;
m_Reg.CAUSE_REGISTER = 0x0000005C;
m_Reg.CONTEXT_REGISTER = 0x007FFFF0;
m_Reg.EPC_REGISTER = 0xFFFFFFFF;
m_Reg.BAD_VADDR_REGISTER = 0xFFFFFFFF;
m_Reg.ERROREPC_REGISTER = 0xFFFFFFFF;
m_Reg.CONFIG_REGISTER = 0x0006E463;
m_Reg.STATUS_REGISTER = 0x34000000;
//m_Reg.REVISION_REGISTER = 0x00000511;
m_Reg.FixFpuLocations();
if (bPostPif)
{
m_Reg.m_PROGRAM_COUNTER = 0xA4000040;
m_Reg.m_GPR[0].DW=0x0000000000000000;
m_Reg.m_GPR[6].DW=0xFFFFFFFFA4001F0C;
m_Reg.m_GPR[7].DW=0xFFFFFFFFA4001F08;
m_Reg.m_GPR[8].DW=0x00000000000000C0;
m_Reg.m_GPR[9].DW=0x0000000000000000;
m_Reg.m_GPR[10].DW=0x0000000000000040;
m_Reg.m_GPR[11].DW=0xFFFFFFFFA4000040;
m_Reg.m_GPR[16].DW=0x0000000000000000;
m_Reg.m_GPR[17].DW=0x0000000000000000;
m_Reg.m_GPR[18].DW=0x0000000000000000;
m_Reg.m_GPR[19].DW=0x0000000000000000;
m_Reg.m_GPR[21].DW=0x0000000000000000;
m_Reg.m_GPR[26].DW=0x0000000000000000;
m_Reg.m_GPR[27].DW=0x0000000000000000;
m_Reg.m_GPR[28].DW=0x0000000000000000;
m_Reg.m_GPR[29].DW=0xFFFFFFFFA4001FF0;
m_Reg.m_GPR[30].DW=0x0000000000000000;
switch (_Rom->GetCountry()) {
case Germany: case french: case Italian:
case Europe: case Spanish: case Australia:
case X_PAL: case Y_PAL:
switch (_Rom->CicChipID()) {
case CIC_NUS_6102:
m_Reg.m_GPR[5].DW=0xFFFFFFFFC0F1D859;
m_Reg.m_GPR[14].DW=0x000000002DE108EA;
m_Reg.m_GPR[24].DW=0x0000000000000000;
break;
case CIC_NUS_6103:
m_Reg.m_GPR[5].DW=0xFFFFFFFFD4646273;
m_Reg.m_GPR[14].DW=0x000000001AF99984;
m_Reg.m_GPR[24].DW=0x0000000000000000;
break;
case CIC_NUS_6105:
MMU.SW_VAddr(0xA4001004,0xBDA807FC);
m_Reg.m_GPR[5].DW=0xFFFFFFFFDECAAAD1;
m_Reg.m_GPR[14].DW=0x000000000CF85C13;
m_Reg.m_GPR[24].DW=0x0000000000000002;
break;
case CIC_NUS_6106:
m_Reg.m_GPR[5].DW=0xFFFFFFFFB04DC903;
m_Reg.m_GPR[14].DW=0x000000001AF99984;
m_Reg.m_GPR[24].DW=0x0000000000000002;
break;
}
m_Reg.m_GPR[20].DW=0x0000000000000000;
m_Reg.m_GPR[23].DW=0x0000000000000006;
m_Reg.m_GPR[31].DW=0xFFFFFFFFA4001554;
break;
case NTSC_BETA: case X_NTSC: case USA: case Japan:
default:
switch (_Rom->CicChipID()) {
case CIC_NUS_6102:
m_Reg.m_GPR[5].DW=0xFFFFFFFFC95973D5;
m_Reg.m_GPR[14].DW=0x000000002449A366;
break;
case CIC_NUS_6103:
m_Reg.m_GPR[5].DW=0xFFFFFFFF95315A28;
m_Reg.m_GPR[14].DW=0x000000005BACA1DF;
break;
case CIC_NUS_6105:
MMU.SW_VAddr(0xA4001004,0x8DA807FC);
m_Reg.m_GPR[5].DW=0x000000005493FB9A;
m_Reg.m_GPR[14].DW=0xFFFFFFFFC2C20384;
case CIC_NUS_6106:
m_Reg.m_GPR[5].DW=0xFFFFFFFFE067221F;
m_Reg.m_GPR[14].DW=0x000000005CD2B70F;
break;
}
m_Reg.m_GPR[20].DW=0x0000000000000001;
m_Reg.m_GPR[23].DW=0x0000000000000000;
m_Reg.m_GPR[24].DW=0x0000000000000003;
m_Reg.m_GPR[31].DW=0xFFFFFFFFA4001550;
}
switch (_Rom->CicChipID()) {
case CIC_NUS_6101:
m_Reg.m_GPR[22].DW=0x000000000000003F;
break;
case CIC_NUS_6102:
m_Reg.m_GPR[1].DW=0x0000000000000001;
m_Reg.m_GPR[2].DW=0x000000000EBDA536;
m_Reg.m_GPR[3].DW=0x000000000EBDA536;
m_Reg.m_GPR[4].DW=0x000000000000A536;
m_Reg.m_GPR[12].DW=0xFFFFFFFFED10D0B3;
m_Reg.m_GPR[13].DW=0x000000001402A4CC;
m_Reg.m_GPR[15].DW=0x000000003103E121;
m_Reg.m_GPR[22].DW=0x000000000000003F;
m_Reg.m_GPR[25].DW=0xFFFFFFFF9DEBB54F;
break;
case CIC_NUS_6103:
m_Reg.m_GPR[1].DW=0x0000000000000001;
m_Reg.m_GPR[2].DW=0x0000000049A5EE96;
m_Reg.m_GPR[3].DW=0x0000000049A5EE96;
m_Reg.m_GPR[4].DW=0x000000000000EE96;
m_Reg.m_GPR[12].DW=0xFFFFFFFFCE9DFBF7;
m_Reg.m_GPR[13].DW=0xFFFFFFFFCE9DFBF7;
m_Reg.m_GPR[15].DW=0x0000000018B63D28;
m_Reg.m_GPR[22].DW=0x0000000000000078;
m_Reg.m_GPR[25].DW=0xFFFFFFFF825B21C9;
break;
case CIC_NUS_6105:
MMU.SW_VAddr(0xA4001000,0x3C0DBFC0);
MMU.SW_VAddr(0xA4001008,0x25AD07C0);
MMU.SW_VAddr(0xA400100C,0x31080080);
MMU.SW_VAddr(0xA4001010,0x5500FFFC);
MMU.SW_VAddr(0xA4001014,0x3C0DBFC0);
MMU.SW_VAddr(0xA4001018,0x8DA80024);
MMU.SW_VAddr(0xA400101C,0x3C0BB000);
m_Reg.m_GPR[1].DW=0x0000000000000000;
m_Reg.m_GPR[2].DW=0xFFFFFFFFF58B0FBF;
m_Reg.m_GPR[3].DW=0xFFFFFFFFF58B0FBF;
m_Reg.m_GPR[4].DW=0x0000000000000FBF;
m_Reg.m_GPR[12].DW=0xFFFFFFFF9651F81E;
m_Reg.m_GPR[13].DW=0x000000002D42AAC5;
m_Reg.m_GPR[15].DW=0x0000000056584D60;
m_Reg.m_GPR[22].DW=0x0000000000000091;
m_Reg.m_GPR[25].DW=0xFFFFFFFFCDCE565F;
break;
case CIC_NUS_6106:
m_Reg.m_GPR[1].DW=0x0000000000000000;
m_Reg.m_GPR[2].DW=0xFFFFFFFFA95930A4;
m_Reg.m_GPR[3].DW=0xFFFFFFFFA95930A4;
m_Reg.m_GPR[4].DW=0x00000000000030A4;
m_Reg.m_GPR[12].DW=0xFFFFFFFFBCB59510;
m_Reg.m_GPR[13].DW=0xFFFFFFFFBCB59510;
m_Reg.m_GPR[15].DW=0x000000007A3C07F4;
m_Reg.m_GPR[22].DW=0x0000000000000085;
m_Reg.m_GPR[25].DW=0x00000000465E3F72;
break;
}
} else {
m_Reg.m_PROGRAM_COUNTER = 0xBFC00000;
/* PIF_Ram[36] = 0x00; PIF_Ram[39] = 0x3F; //common pif ram start values
switch (_Rom->CicChipID()) {
case CIC_NUS_6101: PIF_Ram[37] = 0x06; PIF_Ram[38] = 0x3F; break;
case CIC_NUS_6102: PIF_Ram[37] = 0x02; PIF_Ram[38] = 0x3F; break;
case CIC_NUS_6103: PIF_Ram[37] = 0x02; PIF_Ram[38] = 0x78; break;
case CIC_NUS_6105: PIF_Ram[37] = 0x02; PIF_Ram[38] = 0x91; break;
case CIC_NUS_6106: PIF_Ram[37] = 0x02; PIF_Ram[38] = 0x85; break;
}*/
}
}
void CN64System::ExecuteCPU ( void )
{
_Settings->SaveBool(GameRunning_CPU_Running,true);
@ -818,17 +997,17 @@ void CN64System::SyncCPU (CN64System * const SecondCPU) {
ErrorFound = true;
}
#endif
if (m_Reg.PROGRAM_COUNTER != SecondCPU->m_Reg.PROGRAM_COUNTER) {
if (m_Reg.m_PROGRAM_COUNTER != SecondCPU->m_Reg.m_PROGRAM_COUNTER) {
ErrorFound = true;
}
for (int count = 0; count < 32; count ++) {
if (m_Reg.GPR[count].DW != SecondCPU->m_Reg.GPR[count].DW) {
if (m_Reg.m_GPR[count].DW != SecondCPU->m_Reg.m_GPR[count].DW) {
ErrorFound = true;
}
if (m_Reg.FPR[count].DW != SecondCPU->m_Reg.FPR[count].DW) {
if (m_Reg.m_FPR[count].DW != SecondCPU->m_Reg.m_FPR[count].DW) {
ErrorFound = true;
}
if (m_Reg.CP0[count] != SecondCPU->m_Reg.CP0[count]) {
if (m_Reg.m_CP0[count] != SecondCPU->m_Reg.m_CP0[count]) {
ErrorFound = true;
}
}
@ -848,22 +1027,25 @@ void CN64System::SyncCPU (CN64System * const SecondCPU) {
{
_Notify->BreakPoint(__FILE__,__LINE__);
#ifdef tofix
if (_MMU->m_MemoryStack != (DWORD)(RDRAM + (m_Reg.GPR[29].W[0] & 0x1FFFFFFF)))
if (_MMU->m_MemoryStack != (DWORD)(RDRAM + (m_Reg.m_GPR[29].W[0] & 0x1FFFFFFF)))
{
ErrorFound = true;
}
#endif
}
_Notify->BreakPoint(__FILE__,__LINE__);
#ifdef tofix
if (m_Reg.GetCurrentTimer() != SecondCPU->m_Reg.GetCurrentTimer()) { ErrorFound = true; }
if (m_Reg.GetCurrentTimerType() != SecondCPU->m_Reg.GetCurrentTimerType()) { ErrorFound = true; }
#endif
if (ErrorFound) { DumpSyncErrors(SecondCPU); }
for (int i = (sizeof(m_LastSuccessSyncPC)/sizeof(m_LastSuccessSyncPC[0])) - 1; i > 0; i--) {
m_LastSuccessSyncPC[i] = m_LastSuccessSyncPC[i - 1];
}
m_LastSuccessSyncPC[0] = m_Reg.PROGRAM_COUNTER;
m_LastSuccessSyncPC[0] = m_Reg.m_PROGRAM_COUNTER;
// if (PROGRAM_COUNTER == 0x8009BBD8) {
// _Notify->BreakPoint(__FILE__,__LINE__);
// }
@ -882,29 +1064,31 @@ void CN64System::DumpSyncErrors (CN64System * SecondCPU) {
Error.Log("m_CurrentSP,%X,%X\r\n",m_CurrentSP,GPR[29].UW[0]);
}
#endif
if (m_Reg.PROGRAM_COUNTER != SecondCPU->m_Reg.PROGRAM_COUNTER) {
Error.LogF("PROGRAM_COUNTER, 0x%X, 0x%X\r\n",m_Reg.PROGRAM_COUNTER,SecondCPU->m_Reg.PROGRAM_COUNTER);
if (m_Reg.m_PROGRAM_COUNTER != SecondCPU->m_Reg.m_PROGRAM_COUNTER) {
Error.LogF("PROGRAM_COUNTER, 0x%X, 0x%X\r\n",m_Reg.m_PROGRAM_COUNTER,SecondCPU->m_Reg.m_PROGRAM_COUNTER);
}
for (count = 0; count < 32; count ++) {
if (m_Reg.GPR[count].DW != SecondCPU->m_Reg.GPR[count].DW) {
Error.LogF("GPR[%s] Different,0x%08X%08X, 0x%08X%08X\r\n",m_Reg.GPR_Name[count],
m_Reg.GPR[count].W[1],m_Reg.GPR[count].W[0],
SecondCPU->m_Reg.GPR[count].W[1],SecondCPU->m_Reg.GPR[count].W[0]);
if (m_Reg.m_GPR[count].DW != SecondCPU->m_Reg.m_GPR[count].DW) {
Error.LogF("GPR[%s] Different,0x%08X%08X, 0x%08X%08X\r\n",CRegName::GPR[count],
m_Reg.m_GPR[count].W[1],m_Reg.m_GPR[count].W[0],
SecondCPU->m_Reg.m_GPR[count].W[1],SecondCPU->m_Reg.m_GPR[count].W[0]);
}
}
for (count = 0; count < 32; count ++) {
if (m_Reg.FPR[count].DW != SecondCPU->m_Reg.FPR[count].DW) {
Error.LogF("FPR[%s] Different,0x%08X%08X, 0x%08X%08X\r\n",m_Reg.FPR_Name[count],
m_Reg.FPR[count].W[1],m_Reg.FPR[count].W[0],
SecondCPU->m_Reg.FPR[count].W[1],SecondCPU->m_Reg.FPR[count].W[0]);
if (m_Reg.m_FPR[count].DW != SecondCPU->m_Reg.m_FPR[count].DW) {
Error.LogF("FPR[%s] Different,0x%08X%08X, 0x%08X%08X\r\n",CRegName::FPR[count],
m_Reg.m_FPR[count].W[1],m_Reg.m_FPR[count].W[0],
SecondCPU->m_Reg.m_FPR[count].W[1],SecondCPU->m_Reg.m_FPR[count].W[0]);
}
}
for (count = 0; count < 32; count ++) {
if (m_Reg.CP0[count] != SecondCPU->m_Reg.CP0[count]) {
Error.LogF("CP0[%s] Different,0x%08X, 0x%08X\r\n",m_Reg.Cop0_Name[count],
m_Reg.CP0[count], SecondCPU->m_Reg.CP0[count]);
if (m_Reg.m_CP0[count] != SecondCPU->m_Reg.m_CP0[count]) {
Error.LogF("CP0[%s] Different,0x%08X, 0x%08X\r\n",CRegName::Cop0[count],
m_Reg.m_CP0[count], SecondCPU->m_Reg.m_CP0[count]);
}
}
_Notify->BreakPoint(__FILE__,__LINE__);
#ifdef tofix
if (m_Reg.GetCurrentTimer() != SecondCPU->m_Reg.GetCurrentTimer())
{
Error.LogF("Current Time is Different: %X %X\r\n",(DWORD)m_Reg.GetCurrentTimer(),(DWORD)SecondCPU->m_Reg.GetCurrentTimer());
@ -913,37 +1097,41 @@ void CN64System::DumpSyncErrors (CN64System * SecondCPU) {
{
Error.LogF("Current Time Type is Different: %X %X\r\n",m_Reg.GetCurrentTimerType(),SecondCPU->m_Reg.GetCurrentTimerType());
}
#endif
if (_Settings->LoadDword(Game_SPHack))
{
_Notify->BreakPoint(__FILE__,__LINE__);
#ifdef tofix
if (_MMU->m_MemoryStack != (DWORD)(RDRAM + (m_Reg.GPR[29].W[0] & 0x1FFFFFFF)))
if (_MMU->m_MemoryStack != (DWORD)(RDRAM + (m_Reg.m_GPR[29].W[0] & 0x1FFFFFFF)))
{
Error.LogF("MemoryStack = %X should be: %X\r\n",_MMU->m_MemoryStack, (DWORD)(_MMU->RDRAM + (m_Reg.GPR[29].W[0] & 0x1FFFFFFF)));
Error.LogF("MemoryStack = %X should be: %X\r\n",_MMU->m_MemoryStack, (DWORD)(_MMU->RDRAM + (m_Reg.m_GPR[29].W[0] & 0x1FFFFFFF)));
}
#endif
}
Error.Log("\r\n");
Error.Log("Information:\r\n");
Error.Log("\r\n");
Error.LogF("PROGRAM_COUNTER,0x%X\r\n",m_Reg.PROGRAM_COUNTER);
Error.LogF("PROGRAM_COUNTER,0x%X\r\n",m_Reg.m_PROGRAM_COUNTER);
_Notify->BreakPoint(__FILE__,__LINE__);
#ifdef tofix
Error.LogF("Current Timer,0x%X\r\n",m_Reg.GetCurrentTimer());
Error.LogF("Timer Type,0x%X\r\n",m_Reg.GetCurrentTimerType());
#endif
Error.Log("\r\n");
for (int i = 0; i < (sizeof(m_LastSuccessSyncPC)/sizeof(m_LastSuccessSyncPC[0])); i++) {
Error.LogF("LastSuccessSyncPC[%d],0x%X\r\n",i,m_LastSuccessSyncPC[i]);
}
Error.Log("");
for (count = 0; count < 32; count ++) {
Error.LogF("GPR[%s], 0x%08X%08X, 0x%08X%08X\r\n",m_Reg.GPR_Name[count],
m_Reg.GPR[count].W[1],m_Reg.GPR[count].W[0],
SecondCPU->m_Reg.GPR[count].W[1],SecondCPU->m_Reg.GPR[count].W[0]);
Error.LogF("GPR[%s], 0x%08X%08X, 0x%08X%08X\r\n",CRegName::GPR[count],
m_Reg.m_GPR[count].W[1],m_Reg.m_GPR[count].W[0],
SecondCPU->m_Reg.m_GPR[count].W[1],SecondCPU->m_Reg.m_GPR[count].W[0]);
}
Error.Log("");
for (count = 0; count < 32; count ++) {
Error.LogF("CP0[%s],%*s0x%08X, 0x%08X\r\n",m_Reg.Cop0_Name[count],
12 - strlen(m_Reg.Cop0_Name[count]),"",
m_Reg.CP0[count],SecondCPU->m_Reg.CP0[count]);
Error.LogF("CP0[%s],%*s0x%08X, 0x%08X\r\n",CRegName::Cop0[count],
12 - strlen(CRegName::Cop0[count]),"",
m_Reg.m_CP0[count],SecondCPU->m_Reg.m_CP0[count]);
}
Error.Log("\r\n");
Error.Log(" Hi Recomp, PageMask, Hi Interp, PageMask\r\n");
@ -963,8 +1151,8 @@ void CN64System::DumpSyncErrors (CN64System * SecondCPU) {
Error.Log("Code at PC:\r\n");
_Notify->BreakPoint(__FILE__,__LINE__);
#ifdef tofix
COpcode Op(SecondCPU->_MMU,SecondCPU->m_Reg,SecondCPU->m_Reg.PROGRAM_COUNTER - (OpCode_Size * 10));
for (;Op.PC() < SecondCPU->m_Reg.PROGRAM_COUNTER + (OpCode_Size * 10); Op.Next()) {
COpcode Op(SecondCPU->_MMU,SecondCPU->m_Reg,SecondCPU->m_Reg.m_PROGRAM_COUNTER - (OpCode_Size * 10));
for (;Op.PC() < SecondCPU->m_Reg.m_PROGRAM_COUNTER + (OpCode_Size * 10); Op.Next()) {
Error.LogF("%X,%s\r\n",Op.PC(),Op.Name().c_str());
}
Error.Log("\r\n");
@ -984,11 +1172,14 @@ bool CN64System::SaveState(void)
{
WriteTrace(TraceDebug,"CN64System::SaveState 1");
_Notify->BreakPoint(__FILE__,__LINE__);
#ifdef tofix
if (m_Reg.GetTimer(AiTimerDMA) != 0) { return false; }
if (m_Reg.GetTimer(SiTimer) != 0) { return false; }
if (m_Reg.GetTimer(PiTimer) != 0) { return false; }
if (m_Reg.GetTimer(RSPTimerDlist) != 0) { return false; }
if ((m_Reg.STATUS_REGISTER & STATUS_EXL) != 0) { return false; }
#endif
//Get the file Name
stdstr FileName, CurrentSaveName = _Settings->LoadString(GameRunning_InstantSaveFile);
@ -1029,9 +1220,12 @@ bool CN64System::SaveState(void)
DWORD dwWritten, SaveID_0 = 0x23D8A6C8;
DWORD RdramSize = _Settings->LoadDword(Game_RDRamSize);
_Notify->BreakPoint(__FILE__,__LINE__);
#ifdef tofix
DWORD NextViTimer = m_Reg.GetTimer(ViTimer);
DWORD MiInterReg = m_Reg.MI_INTR_REG;
if (m_Reg.GetTimer(AiTimer) != 0) { m_Reg.MI_INTR_REG |= MI_INTR_AI; }
#endif
if (_Settings->LoadDword(Setting_AutoZipInstantSave)) {
zipFile file;
@ -1040,23 +1234,26 @@ bool CN64System::SaveState(void)
zipWriteInFileInZip(file,&SaveID_0,sizeof(SaveID_0));
zipWriteInFileInZip(file,&RdramSize,sizeof(DWORD));
zipWriteInFileInZip(file,_Rom->GetRomAddress(),0x40);
_Notify->BreakPoint(__FILE__,__LINE__);
#ifdef tofix
zipWriteInFileInZip(file,&NextViTimer,sizeof(DWORD));
zipWriteInFileInZip(file,&m_Reg.PROGRAM_COUNTER,sizeof(m_Reg.PROGRAM_COUNTER));
zipWriteInFileInZip(file,m_Reg.GPR,sizeof(_int64)*32);
zipWriteInFileInZip(file,m_Reg.FPR,sizeof(_int64)*32);
zipWriteInFileInZip(file,m_Reg.CP0,sizeof(DWORD)*32);
zipWriteInFileInZip(file,m_Reg.FPCR,sizeof(DWORD)*32);
zipWriteInFileInZip(file,&m_Reg.HI,sizeof(_int64));
zipWriteInFileInZip(file,&m_Reg.LO,sizeof(_int64));
zipWriteInFileInZip(file,m_Reg.RDRAM_Registers,sizeof(DWORD)*10);
zipWriteInFileInZip(file,m_Reg.SigProcessor_Interface,sizeof(DWORD)*10);
zipWriteInFileInZip(file,m_Reg.Display_ControlReg,sizeof(DWORD)*10);
zipWriteInFileInZip(file,m_Reg.Mips_Interface,sizeof(DWORD)*4);
zipWriteInFileInZip(file,m_Reg.Video_Interface,sizeof(DWORD)*14);
zipWriteInFileInZip(file,m_Reg.Audio_Interface,sizeof(DWORD)*6);
zipWriteInFileInZip(file,m_Reg.Peripheral_Interface,sizeof(DWORD)*13);
zipWriteInFileInZip(file,m_Reg.RDRAM_Interface,sizeof(DWORD)*8);
zipWriteInFileInZip(file,m_Reg.SerialInterface,sizeof(DWORD)*4);
#endif
zipWriteInFileInZip(file,&m_Reg.m_PROGRAM_COUNTER,sizeof(m_Reg.m_PROGRAM_COUNTER));
zipWriteInFileInZip(file,m_Reg.m_GPR,sizeof(__int64)*32);
zipWriteInFileInZip(file,m_Reg.m_FPR,sizeof(__int64)*32);
zipWriteInFileInZip(file,m_Reg.m_CP0,sizeof(DWORD)*32);
zipWriteInFileInZip(file,m_Reg.m_FPCR,sizeof(DWORD)*32);
zipWriteInFileInZip(file,&m_Reg.m_HI,sizeof(__int64));
zipWriteInFileInZip(file,&m_Reg.m_LO,sizeof(__int64));
zipWriteInFileInZip(file,m_Reg.m_RDRAM_Registers,sizeof(DWORD)*10);
zipWriteInFileInZip(file,m_Reg.m_SigProcessor_Interface,sizeof(DWORD)*10);
zipWriteInFileInZip(file,m_Reg.m_Display_ControlReg,sizeof(DWORD)*10);
zipWriteInFileInZip(file,m_Reg.m_Mips_Interface,sizeof(DWORD)*4);
zipWriteInFileInZip(file,m_Reg.m_Video_Interface,sizeof(DWORD)*14);
zipWriteInFileInZip(file,m_Reg.m_Audio_Interface,sizeof(DWORD)*6);
zipWriteInFileInZip(file,m_Reg.m_Peripheral_Interface,sizeof(DWORD)*13);
zipWriteInFileInZip(file,m_Reg.m_RDRAM_Interface,sizeof(DWORD)*8);
zipWriteInFileInZip(file,m_Reg.m_SerialInterface,sizeof(DWORD)*4);
_Notify->BreakPoint(__FILE__,__LINE__);
#ifdef tofix
zipWriteInFileInZip(file,_MMU->tlb,sizeof(TLB)*32);
@ -1072,7 +1269,9 @@ bool CN64System::SaveState(void)
NULL,OPEN_ALWAYS,FILE_ATTRIBUTE_NORMAL | FILE_FLAG_RANDOM_ACCESS, NULL);
if (hSaveFile == INVALID_HANDLE_VALUE) {
_Notify->DisplayError(GS(MSG_FAIL_OPEN_SAVE));
#ifdef tofix
m_Reg.MI_INTR_REG = MiInterReg;
#endif
return true;
}
@ -1081,23 +1280,25 @@ bool CN64System::SaveState(void)
WriteFile( hSaveFile,&SaveID_0,sizeof(DWORD),&dwWritten,NULL);
WriteFile( hSaveFile,&RdramSize,sizeof(DWORD),&dwWritten,NULL);
WriteFile( hSaveFile,_Rom->GetRomAddress(),0x40,&dwWritten,NULL);
#ifdef tofix
WriteFile( hSaveFile,&NextViTimer,sizeof(DWORD),&dwWritten,NULL);
WriteFile( hSaveFile,&m_Reg.PROGRAM_COUNTER,sizeof(m_Reg.PROGRAM_COUNTER),&dwWritten,NULL);
WriteFile( hSaveFile,m_Reg.GPR,sizeof(_int64)*32,&dwWritten,NULL);
WriteFile( hSaveFile,m_Reg.FPR,sizeof(_int64)*32,&dwWritten,NULL);
WriteFile( hSaveFile,m_Reg.CP0,sizeof(DWORD)*32,&dwWritten,NULL);
WriteFile( hSaveFile,m_Reg.FPCR,sizeof(DWORD)*32,&dwWritten,NULL);
WriteFile( hSaveFile,&m_Reg.HI,sizeof(_int64),&dwWritten,NULL);
WriteFile( hSaveFile,&m_Reg.LO,sizeof(_int64),&dwWritten,NULL);
WriteFile( hSaveFile,m_Reg.RDRAM_Registers,sizeof(DWORD)*10,&dwWritten,NULL);
WriteFile( hSaveFile,m_Reg.SigProcessor_Interface,sizeof(DWORD)*10,&dwWritten,NULL);
WriteFile( hSaveFile,m_Reg.Display_ControlReg,sizeof(DWORD)*10,&dwWritten,NULL);
WriteFile( hSaveFile,m_Reg.Mips_Interface,sizeof(DWORD)*4,&dwWritten,NULL);
WriteFile( hSaveFile,m_Reg.Video_Interface,sizeof(DWORD)*14,&dwWritten,NULL);
WriteFile( hSaveFile,m_Reg.Audio_Interface,sizeof(DWORD)*6,&dwWritten,NULL);
WriteFile( hSaveFile,m_Reg.Peripheral_Interface,sizeof(DWORD)*13,&dwWritten,NULL);
WriteFile( hSaveFile,m_Reg.RDRAM_Interface,sizeof(DWORD)*8,&dwWritten,NULL);
WriteFile( hSaveFile,m_Reg.SerialInterface,sizeof(DWORD)*4,&dwWritten,NULL);
#endif
WriteFile( hSaveFile,&m_Reg.m_PROGRAM_COUNTER,sizeof(m_Reg.m_PROGRAM_COUNTER),&dwWritten,NULL);
WriteFile( hSaveFile,m_Reg.m_GPR,sizeof(_int64)*32,&dwWritten,NULL);
WriteFile( hSaveFile,m_Reg.m_FPR,sizeof(_int64)*32,&dwWritten,NULL);
WriteFile( hSaveFile,m_Reg.m_CP0,sizeof(DWORD)*32,&dwWritten,NULL);
WriteFile( hSaveFile,m_Reg.m_FPCR,sizeof(DWORD)*32,&dwWritten,NULL);
WriteFile( hSaveFile,&m_Reg.m_HI,sizeof(_int64),&dwWritten,NULL);
WriteFile( hSaveFile,&m_Reg.m_LO,sizeof(_int64),&dwWritten,NULL);
WriteFile( hSaveFile,m_Reg.m_RDRAM_Registers,sizeof(DWORD)*10,&dwWritten,NULL);
WriteFile( hSaveFile,m_Reg.m_SigProcessor_Interface,sizeof(DWORD)*10,&dwWritten,NULL);
WriteFile( hSaveFile,m_Reg.m_Display_ControlReg,sizeof(DWORD)*10,&dwWritten,NULL);
WriteFile( hSaveFile,m_Reg.m_Mips_Interface,sizeof(DWORD)*4,&dwWritten,NULL);
WriteFile( hSaveFile,m_Reg.m_Video_Interface,sizeof(DWORD)*14,&dwWritten,NULL);
WriteFile( hSaveFile,m_Reg.m_Audio_Interface,sizeof(DWORD)*6,&dwWritten,NULL);
WriteFile( hSaveFile,m_Reg.m_Peripheral_Interface,sizeof(DWORD)*13,&dwWritten,NULL);
WriteFile( hSaveFile,m_Reg.m_RDRAM_Interface,sizeof(DWORD)*8,&dwWritten,NULL);
WriteFile( hSaveFile,m_Reg.m_SerialInterface,sizeof(DWORD)*4,&dwWritten,NULL);
_Notify->BreakPoint(__FILE__,__LINE__);
#ifdef tofix
WriteFile( hSaveFile,_MMU->tlb,sizeof(TLB)*32,&dwWritten,NULL);
@ -1109,7 +1310,9 @@ bool CN64System::SaveState(void)
CloseHandle(hSaveFile);
}
#ifdef tofix
m_Reg.MI_INTR_REG = MiInterReg;
#endif
_Settings->SaveString(GameRunning_InstantSaveFile,"");
stdstr SaveMessage = _Lang->GetString(MSG_SAVED_STATE);
@ -1226,22 +1429,22 @@ bool CN64System::LoadState(LPCSTR FileName) {
}
#endif
unzReadCurrentFile(file,&NextVITimer,sizeof(NextVITimer));
unzReadCurrentFile(file,&m_Reg.PROGRAM_COUNTER,sizeof(m_Reg.PROGRAM_COUNTER));
unzReadCurrentFile(file,m_Reg.GPR,sizeof(_int64)*32);
unzReadCurrentFile(file,m_Reg.FPR,sizeof(_int64)*32);
unzReadCurrentFile(file,m_Reg.CP0,sizeof(DWORD)*32);
unzReadCurrentFile(file,m_Reg.FPCR,sizeof(DWORD)*32);
unzReadCurrentFile(file,&m_Reg.HI,sizeof(_int64));
unzReadCurrentFile(file,&m_Reg.LO,sizeof(_int64));
unzReadCurrentFile(file,m_Reg.RDRAM_Registers,sizeof(DWORD)*10);
unzReadCurrentFile(file,m_Reg.SigProcessor_Interface,sizeof(DWORD)*10);
unzReadCurrentFile(file,m_Reg.Display_ControlReg,sizeof(DWORD)*10);
unzReadCurrentFile(file,m_Reg.Mips_Interface,sizeof(DWORD)*4);
unzReadCurrentFile(file,m_Reg.Video_Interface,sizeof(DWORD)*14);
unzReadCurrentFile(file,m_Reg.Audio_Interface,sizeof(DWORD)*6);
unzReadCurrentFile(file,m_Reg.Peripheral_Interface,sizeof(DWORD)*13);
unzReadCurrentFile(file,m_Reg.RDRAM_Interface,sizeof(DWORD)*8);
unzReadCurrentFile(file,m_Reg.SerialInterface,sizeof(DWORD)*4);
unzReadCurrentFile(file,&m_Reg.m_PROGRAM_COUNTER,sizeof(m_Reg.m_PROGRAM_COUNTER));
unzReadCurrentFile(file,m_Reg.m_GPR,sizeof(_int64)*32);
unzReadCurrentFile(file,m_Reg.m_FPR,sizeof(_int64)*32);
unzReadCurrentFile(file,m_Reg.m_CP0,sizeof(DWORD)*32);
unzReadCurrentFile(file,m_Reg.m_FPCR,sizeof(DWORD)*32);
unzReadCurrentFile(file,&m_Reg.m_HI,sizeof(_int64));
unzReadCurrentFile(file,&m_Reg.m_LO,sizeof(_int64));
unzReadCurrentFile(file,m_Reg.m_RDRAM_Registers,sizeof(DWORD)*10);
unzReadCurrentFile(file,m_Reg.m_SigProcessor_Interface,sizeof(DWORD)*10);
unzReadCurrentFile(file,m_Reg.m_Display_ControlReg,sizeof(DWORD)*10);
unzReadCurrentFile(file,m_Reg.m_Mips_Interface,sizeof(DWORD)*4);
unzReadCurrentFile(file,m_Reg.m_Video_Interface,sizeof(DWORD)*14);
unzReadCurrentFile(file,m_Reg.m_Audio_Interface,sizeof(DWORD)*6);
unzReadCurrentFile(file,m_Reg.m_Peripheral_Interface,sizeof(DWORD)*13);
unzReadCurrentFile(file,m_Reg.m_RDRAM_Interface,sizeof(DWORD)*8);
unzReadCurrentFile(file,m_Reg.m_SerialInterface,sizeof(DWORD)*4);
_Notify->BreakPoint(__FILE__,__LINE__);
#ifdef tofix
unzReadCurrentFile(file,_MMU->tlb,sizeof(TLB)*32);
@ -1285,22 +1488,22 @@ bool CN64System::LoadState(LPCSTR FileName) {
}
#endif
ReadFile( hSaveFile,&NextVITimer,sizeof(NextVITimer),&dwRead,NULL);
ReadFile( hSaveFile,&m_Reg.PROGRAM_COUNTER,sizeof(m_Reg.PROGRAM_COUNTER),&dwRead,NULL);
ReadFile( hSaveFile,m_Reg.GPR,sizeof(_int64)*32,&dwRead,NULL);
ReadFile( hSaveFile,m_Reg.FPR,sizeof(_int64)*32,&dwRead,NULL);
ReadFile( hSaveFile,m_Reg.CP0,sizeof(DWORD)*32,&dwRead,NULL);
ReadFile( hSaveFile,m_Reg.FPCR,sizeof(DWORD)*32,&dwRead,NULL);
ReadFile( hSaveFile,&m_Reg.HI,sizeof(_int64),&dwRead,NULL);
ReadFile( hSaveFile,&m_Reg.LO,sizeof(_int64),&dwRead,NULL);
ReadFile( hSaveFile,m_Reg.RDRAM_Registers,sizeof(DWORD)*10,&dwRead,NULL);
ReadFile( hSaveFile,m_Reg.SigProcessor_Interface,sizeof(DWORD)*10,&dwRead,NULL);
ReadFile( hSaveFile,m_Reg.Display_ControlReg,sizeof(DWORD)*10,&dwRead,NULL);
ReadFile( hSaveFile,m_Reg.Mips_Interface,sizeof(DWORD)*4,&dwRead,NULL);
ReadFile( hSaveFile,m_Reg.Video_Interface,sizeof(DWORD)*14,&dwRead,NULL);
ReadFile( hSaveFile,m_Reg.Audio_Interface,sizeof(DWORD)*6,&dwRead,NULL);
ReadFile( hSaveFile,m_Reg.Peripheral_Interface,sizeof(DWORD)*13,&dwRead,NULL);
ReadFile( hSaveFile,m_Reg.RDRAM_Interface,sizeof(DWORD)*8,&dwRead,NULL);
ReadFile( hSaveFile,m_Reg.SerialInterface,sizeof(DWORD)*4,&dwRead,NULL);
ReadFile( hSaveFile,&m_Reg.m_PROGRAM_COUNTER,sizeof(m_Reg.m_PROGRAM_COUNTER),&dwRead,NULL);
ReadFile( hSaveFile,m_Reg.m_GPR,sizeof(_int64)*32,&dwRead,NULL);
ReadFile( hSaveFile,m_Reg.m_FPR,sizeof(_int64)*32,&dwRead,NULL);
ReadFile( hSaveFile,m_Reg.m_CP0,sizeof(DWORD)*32,&dwRead,NULL);
ReadFile( hSaveFile,m_Reg.m_FPCR,sizeof(DWORD)*32,&dwRead,NULL);
ReadFile( hSaveFile,&m_Reg.m_HI,sizeof(_int64),&dwRead,NULL);
ReadFile( hSaveFile,&m_Reg.m_LO,sizeof(_int64),&dwRead,NULL);
ReadFile( hSaveFile,m_Reg.m_RDRAM_Registers,sizeof(DWORD)*10,&dwRead,NULL);
ReadFile( hSaveFile,m_Reg.m_SigProcessor_Interface,sizeof(DWORD)*10,&dwRead,NULL);
ReadFile( hSaveFile,m_Reg.m_Display_ControlReg,sizeof(DWORD)*10,&dwRead,NULL);
ReadFile( hSaveFile,m_Reg.m_Mips_Interface,sizeof(DWORD)*4,&dwRead,NULL);
ReadFile( hSaveFile,m_Reg.m_Video_Interface,sizeof(DWORD)*14,&dwRead,NULL);
ReadFile( hSaveFile,m_Reg.m_Audio_Interface,sizeof(DWORD)*6,&dwRead,NULL);
ReadFile( hSaveFile,m_Reg.m_Peripheral_Interface,sizeof(DWORD)*13,&dwRead,NULL);
ReadFile( hSaveFile,m_Reg.m_RDRAM_Interface,sizeof(DWORD)*8,&dwRead,NULL);
ReadFile( hSaveFile,m_Reg.m_SerialInterface,sizeof(DWORD)*4,&dwRead,NULL);
_Notify->BreakPoint(__FILE__,__LINE__);
#ifdef tofix
ReadFile( hSaveFile,_MMU->tlb,sizeof(TLB)*32,&dwRead,NULL);
@ -1323,12 +1526,15 @@ bool CN64System::LoadState(LPCSTR FileName) {
}
//Fix up timer
m_Reg.CP0[32] = 0;
m_Reg.m_CP0[32] = 0;
WriteTrace(TraceDebug,"CN64System::LoadState 2");
_Notify->BreakPoint(__FILE__,__LINE__);
#ifdef tofix
m_Reg.ResetTimer(NextVITimer);
WriteTrace(TraceDebug,"CN64System::LoadState 3");
m_Reg.ChangeTimerFixed(CompareTimer,m_Reg.COMPARE_REGISTER - m_Reg.COUNT_REGISTER);
WriteTrace(TraceDebug,"CN64System::LoadState 4");
#endif
m_Reg.FixFpuLocations();
WriteTrace(TraceDebug,"CN64System::LoadState 5");
_Notify->BreakPoint(__FILE__,__LINE__);
@ -1361,7 +1567,7 @@ bool CN64System::LoadState(LPCSTR FileName) {
#endif
_Notify->BreakPoint(__FILE__,__LINE__);
#ifdef tofix
_MMU->m_MemoryStack = (DWORD)(_MMU->Rdram() + (m_Reg.GPR[29].W[0] & 0x1FFFFFFF));
_MMU->m_MemoryStack = (DWORD)(_MMU->Rdram() + (m_Reg.m_GPR[29].W[0] & 0x1FFFFFFF));
#endif
if (_Settings->LoadDword(Game_CpuType) == CPU_SyncCores) {
@ -1454,7 +1660,7 @@ void CN64System::RunRSP ( void ) {
//if (bProfiling) { m_Profile.StartTimer(ProfileAddr); }
WriteTrace(TraceRSP, "RunRSP: check interrupts");
m_Reg.CheckInterrupts();
CheckInterrupts();
}
}
}
@ -1523,7 +1729,7 @@ void CN64System::RefreshScreen ( void ) {
VI_INTR_TIME -= 38;
}
}
m_Reg.ChangeTimerRelative(ViTimer,VI_INTR_TIME);
_SystemTimer->SetTimer(CSystemTimer::ViTimer,VI_INTR_TIME,true);
if (g_FixedAudio)
{
_Audio->UpdateAudioTimer (VI_INTR_TIME);

11
Source/Project64/N64 System/N64 Class.h
View File

@ -1,8 +1,4 @@
#ifndef __N64_CLASS__H__
#define __N64_CLASS__H__
#include "N64 Types.h"
#include "../Settings/N64System Settings.h"
#pragma once
typedef std::list<SystemEvent> EVENT_LIST;
@ -88,6 +84,7 @@ private:
void DumpSyncErrors ( CN64System * SecondCPU );
void StartEmulation2 ( bool NewThread );
bool SetActiveSystem ( bool bActive );
void InitRegisters ( bool bPostPif, CMipsMemory & MMU );
//CPU Methods
void ExecuteRecompiler ( CC_Core & C_Core );
@ -126,9 +123,11 @@ private:
CAudio m_Audio;
CSpeedLimitor m_Limitor;
bool m_InReset;
CSystemTimer m_SystemTimer;
SystemType m_SystemType;
bool m_bCleanFrameBox;
bool m_bInitilized;
int m_NextTimer;
//When Syncing cores this is the PC where it last Sync'ed correctly
DWORD m_LastSuccessSyncPC[10];
@ -151,5 +150,3 @@ private:
//list of function that have been called .. used in profiling
FUNC_CALLS m_FunctionCalls;
};
#endif

8
Source/Project64/N64 System/N64 Rom Class.cpp
View File

@ -1,10 +1,4 @@
#include "..\N64 System.h"
#include "..\3rd Party\Zip.h"
#include "..\3rd Party\7zip.h"
#include <common\md5.h>
#include <windows.h>
#include <stdio.h>
#include "stdafx.h"
CN64Rom::CN64Rom ( void )
{

14
Source/Project64/N64 System/N64 Types.h
View File

@ -82,20 +82,6 @@ enum SystemType {
SYSTEM_NTSC = 0, SYSTEM_PAL = 1, SYSTEM_MPAL = 2
};
enum TimerType {
UnknownTimer,
CompareTimer,
SoftResetTimer,
ViTimer,
AiTimer,
AiTimerDMA,
SiTimer,
PiTimer,
RspTimer,
RSPTimerDlist,
MaxTimer
};
enum CICChip {
CIC_UNKNOWN = -1, CIC_NUS_6101 = 1, CIC_NUS_6102 = 2, CIC_NUS_6103 = 3,
CIC_NUS_6104 = 4, CIC_NUS_6105 = 5, CIC_NUS_6106 = 6

60
Source/Project64/N64 System/Recompiler/Recompiler Class.cpp
View File

@ -12,7 +12,7 @@
CRecompiler::CRecompiler(CProfiling & Profile, bool & EndEmulation, bool SyncSystem) :
m_Profile(Profile),
PROGRAM_COUNTER(_Reg->PROGRAM_COUNTER),
PROGRAM_COUNTER(_Reg->m_PROGRAM_COUNTER),
m_EndEmulation(EndEmulation),
m_SyncSystem(SyncSystem),
m_Functions(),
@ -1791,7 +1791,7 @@ bool CRecompiler::FillSectionInfo(CBlockSection * Section, STEP_TYPE StartStepTy
// if (Section->CompilePC == 0x8005E4B8) {
//CPU_Message("%X: %s %s = %d",Section->CompilePC,R4300iOpcodeName(Command.Hex,Section->CompilePC),
// GPR_Name[8],Section->MipsRegState(8));
// CRegName::GPR[8],Section->MipsRegState(8));
//_asm int 3
// }
switch (NextInstruction) {
@ -1881,9 +1881,9 @@ bool CRecompiler::Compiler4300iBlock(FUNCTION_INFO * info) {
if (!AnalyseBlock(BlockInfo)) { return false; }
if (bProfiling()) { m_Profile.StartTimer(Timer_CompileBlock); }
DWORD StartAddress;
_Notify->BreakPoint(__FILE__,__LINE__);
#ifdef tofix
DWORD StartAddress;
if (!_TLB->TranslateVaddr(BlockInfo.StartVAddr,StartAddress))
{
DisplayError("Ummm... Where does this block go\n%X",BlockInfo.StartVAddr);
@ -2551,10 +2551,10 @@ bool CRecompiler::GenerateX86Code(CBlockInfo & BlockInfo, CBlockSection * Sectio
//if (m_SyncSystem && (DWORD)RecompPos > 0x6094C283) {
MoveConstToVariable(Section->StartPC,&PROGRAM_COUNTER,"PROGRAM_COUNTER");
if (BlockCycleCount != 0) {
AddConstToVariable(BlockCycleCount,&_CP0[9],Cop0_Name[9]);
AddConstToVariable(BlockCycleCount,&_CP0[9],CRegName::Cop0[9]);
SubConstFromVariable(BlockCycleCount,&Timers.Timer,"Timer");
}
if (BlockRandomModifier != 0) { SubConstFromVariable(BlockRandomModifier,&_CP0[1],Cop0_Name[1]); }
if (BlockRandomModifier != 0) { SubConstFromVariable(BlockRandomModifier,&_CP0[1],CRegName::Cop0[1]); }
BlockCycleCount = 0;
BlockRandomModifier = 0;
Call_Direct(SyncToPC, "SyncToPC");
@ -2577,7 +2577,7 @@ bool CRecompiler::GenerateX86Code(CBlockInfo & BlockInfo, CBlockSection * Sectio
// WriteBackRegisters(Section);
// UpdateCounters(&Section->BlockCycleCount(),&Section->BlockRandomModifier(),false);
//
// CompConstToVariable(0x26D5BB0,&_CP0[9],Cop0_Name[9]);
// CompConstToVariable(0x26D5BB0,&_CP0[9],CRegName::Cop0[9]);
// JlLabel8("blah",0);
// BYTE * Jump = RecompPos - 1;
// // BreakPoint(__FILE__,__LINE__);
@ -2614,13 +2614,13 @@ bool CRecompiler::GenerateX86Code(CBlockInfo & BlockInfo, CBlockSection * Sectio
// }
/*if (Section->CompilePC == 0x802000D0 && NextInstruction == NORMAL) {
CPU_Message("%s = %d",GPR_Name[14],Section->MipsRegState(14));
CPU_Message("%s = %d",CRegName::GPR[14],Section->MipsRegState(14));
}*/
/*if (Section->CompilePC == 0x150A1514 && NextInstruction == NORMAL) {
CPU_Message("%s = %d",GPR_Name[14],Section->MipsRegState(14));
CPU_Message("%s = %d",CRegName::GPR[14],Section->MipsRegState(14));
}
if (Section->CompilePC == 0x150A1454 && NextInstruction == NORMAL) {
CPU_Message("%s = %d",GPR_Name[14],Section->MipsRegState(14));
CPU_Message("%s = %d",CRegName::GPR[14],Section->MipsRegState(14));
}*/
if (Section->CompilePC > Section->BlockInfo->EndVAddr)
@ -3128,7 +3128,7 @@ void CRecompiler::UpdateCounters ( DWORD * Cycles, DWORD * RandomMod, BOOL Check
if (*RandomMod != 0 || *Cycles != 0) {
WriteX86Comment("Update Counters");
}
if (*RandomMod != 0) { SubConstFromVariable(*RandomMod,&_CP0[1],Cop0_Name[1]); }
if (*RandomMod != 0) { SubConstFromVariable(*RandomMod,&_CP0[1],CRegName::Cop0[1]); }
if (*Cycles != 0) {
if (m_SyncSystem) {
char text[100];
@ -3140,8 +3140,11 @@ void CRecompiler::UpdateCounters ( DWORD * Cycles, DWORD * RandomMod, BOOL Check
Call_Direct(UpdateSyncCPU,"UpdateSyncCPU");
Popad();
}
AddConstToVariable(*Cycles,&_CP0[9],Cop0_Name[9]);
_Notify->BreakPoint(__FILE__,__LINE__);
#ifdef tofix
AddConstToVariable(*Cycles,&_CP0[9],CRegName::Cop0[9]);
SubConstFromVariable(*Cycles,_Timer,"Timer");
#endif
}
*Cycles = 0;
*RandomMod = 0;
@ -3152,14 +3155,19 @@ void CRecompiler::UpdateCounters ( DWORD * Cycles, DWORD * RandomMod, BOOL Check
// Timer
if (*Cycles == 0) {
_Notify->BreakPoint(__FILE__,__LINE__);
#ifdef tofix
CompConstToVariable(0,_Timer,"Timer");
#endif
//} else{
// uses SubConstFromVariable(Cycles,_Timer,"Timer"); for compare flag
}
JnsLabel8("Continue_From_Timer_Test",0);
Jump = RecompPos - 1;
Pushad();
Call_Direct(TimerDone,"TimerDone");
X86BreakPoint(__FILE__,__LINE__);
MoveConstToX86reg((DWORD)_SystemTimer,x86_ECX);
Call_Direct(AddressOf(CSystemTimer::TimerDone),"CSystemTimer::TimerDone");
Popad();
CPU_Message("");
@ -3279,8 +3287,8 @@ void SyncRegState (CBlockSection * Section, CRegInfo * SyncTo) {
UnMap_X86reg(Section,x86RegHi);
switch (Section->MipsRegState(count)) {
case CRegInfo::STATE_UNKNOWN:
MoveVariableToX86reg(&_GPR[count].UW[0],GPR_NameLo[count],x86Reg);
MoveVariableToX86reg(&_GPR[count].UW[1],GPR_NameHi[count],x86RegHi);
MoveVariableToX86reg(&_GPR[count].UW[0],CRegName::GPR_Lo[count],x86Reg);
MoveVariableToX86reg(&_GPR[count].UW[1],CRegName::GPR_Hi[count],x86RegHi);
break;
case CRegInfo::STATE_MAPPED_64:
MoveX86RegToX86Reg(Section->MipsRegLo(count),x86Reg);
@ -3326,7 +3334,7 @@ void SyncRegState (CBlockSection * Section, CRegInfo * SyncTo) {
x86Reg = SyncTo->MipsRegLo(count);
UnMap_X86reg(Section,x86Reg);
switch (Section->MipsRegState(count)) {
case CRegInfo::STATE_UNKNOWN: MoveVariableToX86reg(&_GPR[count].UW[0],GPR_NameLo[count],x86Reg); break;
case CRegInfo::STATE_UNKNOWN: MoveVariableToX86reg(&_GPR[count].UW[0],CRegName::GPR_Lo[count],x86Reg); break;
case CRegInfo::STATE_CONST_32: MoveConstToX86reg(Section->MipsRegLo(count),x86Reg); break;
case CRegInfo::STATE_MAPPED_32_SIGN:
MoveX86RegToX86Reg(Section->MipsRegLo(count),x86Reg);
@ -3362,7 +3370,7 @@ void SyncRegState (CBlockSection * Section, CRegInfo * SyncTo) {
switch (Section->MipsRegState(count)) {
case CRegInfo::STATE_MAPPED_64:
case CRegInfo::STATE_UNKNOWN:
MoveVariableToX86reg(&_GPR[count].UW[0],GPR_NameLo[count],x86Reg);
MoveVariableToX86reg(&_GPR[count].UW[0],CRegName::GPR_Lo[count],x86Reg);
break;
case CRegInfo::STATE_MAPPED_32_ZERO:
MoveX86RegToX86Reg(Section->MipsRegLo(count),x86Reg);
@ -3371,7 +3379,7 @@ void SyncRegState (CBlockSection * Section, CRegInfo * SyncTo) {
case CRegInfo::STATE_CONST_32:
if (Section->MipsRegLo_S(count) < 0) {
CPU_Message("Sign Problems in SyncRegState\nSTATE_MAPPED_32_ZERO");
CPU_Message("%s: %X",GPR_Name[count],Section->MipsRegLo_S(count));
CPU_Message("%s: %X",CRegName::GPR[count],Section->MipsRegLo_S(count));
#ifndef EXTERNAL_RELEASE
DisplayError("Sign Problems in SyncRegState\nSTATE_MAPPED_32_ZERO");
#endif
@ -3391,8 +3399,8 @@ void SyncRegState (CBlockSection * Section, CRegInfo * SyncTo) {
break;
default:
#if (!defined(EXTERNAL_RELEASE))
CPU_Message("%d\n%d\nreg: %s (%d)",SyncTo->MipsRegState(count),Section->MipsRegState(count),GPR_Name[count],count);
DisplayError("%d\n%d\nreg: %s (%d)",SyncTo->MipsRegState(count),Section->MipsRegState(count),GPR_Name[count],count);
CPU_Message("%d\n%d\nreg: %s (%d)",SyncTo->MipsRegState(count),Section->MipsRegState(count),CRegName::GPR[count],count);
DisplayError("%d\n%d\nreg: %s (%d)",SyncTo->MipsRegState(count),Section->MipsRegState(count),CRegName::GPR[count],count);
DisplayError("Do something with states in SyncRegState");
#endif
changed = false;
@ -3889,8 +3897,8 @@ void CRecompiler::SyncRegState (CBlockSection * Section, CRegInfo * SyncTo)
UnMap_X86reg(Section,x86RegHi);
switch (Section->MipsRegState(count)) {
case CRegInfo::STATE_UNKNOWN:
MoveVariableToX86reg(&_GPR[count].UW[0],GPR_NameLo[count],x86Reg);
MoveVariableToX86reg(&_GPR[count].UW[1],GPR_NameHi[count],x86RegHi);
MoveVariableToX86reg(&_GPR[count].UW[0],CRegName::GPR_Lo[count],x86Reg);
MoveVariableToX86reg(&_GPR[count].UW[1],CRegName::GPR_Hi[count],x86RegHi);
break;
case CRegInfo::STATE_MAPPED_64:
MoveX86RegToX86Reg(Section->MipsRegLo(count),x86Reg);
@ -3936,7 +3944,7 @@ void CRecompiler::SyncRegState (CBlockSection * Section, CRegInfo * SyncTo)
x86Reg = SyncTo->MipsRegLo(count);
UnMap_X86reg(Section,x86Reg);
switch (Section->MipsRegState(count)) {
case CRegInfo::STATE_UNKNOWN: MoveVariableToX86reg(&_GPR[count].UW[0],GPR_NameLo[count],x86Reg); break;
case CRegInfo::STATE_UNKNOWN: MoveVariableToX86reg(&_GPR[count].UW[0],CRegName::GPR_Lo[count],x86Reg); break;
case CRegInfo::STATE_CONST_32: MoveConstToX86reg(Section->MipsRegLo(count),x86Reg); break;
case CRegInfo::STATE_MAPPED_32_SIGN:
MoveX86RegToX86Reg(Section->MipsRegLo(count),x86Reg);
@ -3972,7 +3980,7 @@ void CRecompiler::SyncRegState (CBlockSection * Section, CRegInfo * SyncTo)
switch (Section->MipsRegState(count)) {
case CRegInfo::STATE_MAPPED_64:
case CRegInfo::STATE_UNKNOWN:
MoveVariableToX86reg(&_GPR[count].UW[0],GPR_NameLo[count],x86Reg);
MoveVariableToX86reg(&_GPR[count].UW[0],CRegName::GPR_Lo[count],x86Reg);
break;
case CRegInfo::STATE_MAPPED_32_ZERO:
MoveX86RegToX86Reg(Section->MipsRegLo(count),x86Reg);
@ -3981,7 +3989,7 @@ void CRecompiler::SyncRegState (CBlockSection * Section, CRegInfo * SyncTo)
case CRegInfo::STATE_CONST_32:
if (Section->MipsRegLo_S(count) < 0) {
CPU_Message("Sign Problems in SyncRegState\nSTATE_MAPPED_32_ZERO");
CPU_Message("%s: %X",GPR_Name[count],Section->MipsRegLo_S(count));
CPU_Message("%s: %X",CRegName::GPR[count],Section->MipsRegLo_S(count));
#ifndef EXTERNAL_RELEASE
DisplayError("Sign Problems in SyncRegState\nSTATE_MAPPED_32_ZERO");
#endif
@ -4001,8 +4009,8 @@ void CRecompiler::SyncRegState (CBlockSection * Section, CRegInfo * SyncTo)
break;
default:
#if (!defined(EXTERNAL_RELEASE))
CPU_Message("%d\n%d\nreg: %s (%d)",SyncTo->MipsRegState(count),Section->MipsRegState(count),GPR_Name[count],count);
DisplayError("%d\n%d\nreg: %s (%d)",SyncTo->MipsRegState(count),Section->MipsRegState(count),GPR_Name[count],count);
CPU_Message("%d\n%d\nreg: %s (%d)",SyncTo->MipsRegState(count),Section->MipsRegState(count),CRegName::GPR[count],count);
DisplayError("%d\n%d\nreg: %s (%d)",SyncTo->MipsRegState(count),Section->MipsRegState(count),CRegName::GPR[count],count);
DisplayError("Do something with states in SyncRegState");
#endif
changed = FALSE;

6
Source/Project64/N64 System/System Globals.cpp
View File

@ -13,15 +13,15 @@ CPlugins * _Plugins;
CN64Rom * _Rom; //The current rom that this system is executing.. it can only execute one file at the time
CAudio * _Audio;
CMemoryLabel * _Labels;
CSystemTimer * _SystemTimer;
MULTI_ACCESS_QWORD * _GPR, * _FPR, * _RegHI, * _RegLO;
MIPS_DWORD * _GPR, * _FPR, * _RegHI, * _RegLO;
DWORD * _PROGRAM_COUNTER, * _CP0, * _RegMI, * _LLBit,
* _LLAddr, * _FPCR, * _RegSI, * _RegRI, * _RegPI, * _RegAI,
* _RegVI, * _RegDPC, * _RegSP, * _RegRDRAM;
double ** _FPRDoubleLocation;
float ** _FPRFloatLocation;
enum TimerType * _CurrentTimerType;
int * _Timer;
int * _NextTimer;

7
Source/Project64/N64 System/System Globals.h
View File

@ -10,12 +10,13 @@ extern CPlugins * _Plugins;
extern CN64Rom * _Rom; //The current rom that this system is executing.. it can only execute one file at the time
extern CAudio * _Audio;
extern CMemoryLabel * _Labels;
extern CSystemTimer * _SystemTimer;
extern MULTI_ACCESS_QWORD * _GPR, * _FPR, * _RegHI, * _RegLO;
extern MIPS_DWORD * _GPR, * _FPR, * _RegHI, * _RegLO;
extern DWORD * _PROGRAM_COUNTER, * _CP0, * _RegMI, * _LLBit,
* _LLAddr, * _FPCR, * _RegSI, * _RegRI, * _RegPI, * _RegAI,
* _RegVI, * _RegDPC, * _RegSP, * _RegRDRAM;
extern double ** _FPRDoubleLocation;
extern float ** _FPRFloatLocation;
extern enum TimerType * _CurrentTimerType;
extern int * _Timer;
extern int * _NextTimer;

15
Source/Project64/N64 System/Types.h
View File

@ -44,19 +44,6 @@ typedef union tagUWORD {
} MIPS_WORD;
typedef union tagUDWORD {
double D;
_int64 DW;
unsigned _int64 UDW;
long W[2];
float F[2];
unsigned long UW[2];
short HW[4];
unsigned short UHW[4];
char B[8];
unsigned char UB[8];
} MIPS_DWORD;
typedef union {
double D;
__int64 DW;
unsigned __int64 UDW;
@ -67,6 +54,6 @@ typedef union {
unsigned short UHW[4];
char B[8];
unsigned char UB[8];
} MULTI_ACCESS_QWORD;
} MIPS_DWORD;
#endif

2
Source/Project64/Plugins/Audio Plugin.cpp
View File

@ -172,7 +172,7 @@ bool CAudioPlugin::Initiate ( CN64System * System, CMainGui * RenderWindow ) {
Info.RDRAM = _MMU->Rdram();
Info.DMEM = _MMU->Dmem();
Info.IMEM = _MMU->Imem();
Info.MI__INTR_REG = &_Reg->AudioIntrReg;
Info.MI__INTR_REG = &_Reg->m_AudioIntrReg;
Info.AI__DRAM_ADDR_REG = &_Reg->AI_DRAM_ADDR_REG;
Info.AI__LEN_REG = &_Reg->AI_LEN_REG;
Info.AI__CONTROL_REG = &_Reg->AI_CONTROL_REG;

2
Source/Project64/main.cpp
View File

@ -153,7 +153,7 @@ void InitializeLog ( void)
}
LogFilePath.SetNameExtension(_T("Project64.log"));
CTraceFileLog * LogFile = new CTraceFileLog(LogFilePath, _Settings->LoadDword(Debugger_AppLogFlush) != 0, Log_New);
CTraceFileLog * LogFile = new CTraceFileLog(LogFilePath, _Settings->LoadDword(Debugger_AppLogFlush) != 0, Log_New,500);
#ifdef VALIDATE_DEBUG
LogFile->SetTraceLevel((TraceLevel)(_Settings->LoadDword(Debugger_AppLogLevel) | TraceValidate));
#else

13
Source/Project64/stdafx.h
View File

@ -6,3 +6,16 @@
#include <windows.h>
#include "Validate Binary.h"
#include <Aclapi.h>
#include "N64 System/C Core/Registers.h"
#include "N64 System/C Core/CPU Log.h"
#include "N64 System/C Core/X86.h"
#include "N64 System/C Core/Dma.h"
#include "N64 System/C Core/Plugin.h"
#include "N64 System/C Core/Exception.h"
#include "N64 System/C Core/C Core Interface.h"
#include "N64 System/C Core/Pif.h"
#include "N64 System/C Core/c core.h"
#include "3rd Party/Zip.h"
#include "3rd Party/7zip.h"