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Core: use m_TLB_WriteMap not m_TLB_ReadMap for NonMemory

This commit is contained in:
zilmar 2023-08-30 11:35:53 +09:30
parent 625f532d73
commit 41fa1fd5dd
2 changed files with 7 additions and 18 deletions
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20
Source/Project64-core/N64System/Mips/MemoryVirtualMem.cpp
View File

@ -548,12 +548,6 @@ bool CMipsMemoryVM::SW_Memory(uint64_t VAddr, uint32_t Value)
*(uint32_t *)(MemoryPtr + VAddr32) = Value; *(uint32_t *)(MemoryPtr + VAddr32) = Value;
return true; return true;
} }
uint32_t BaseAddress = m_TLB_ReadMap[VAddr32 >> 12];
if (BaseAddress == -1)
{
GenerateTLBWriteException(VAddr, __FUNCTION__);
return false;
}
return SW_NonMemory(VAddr32, Value); return SW_NonMemory(VAddr32, Value);
} }
@ -743,7 +737,7 @@ bool CMipsMemoryVM::LD_NonMemory(uint32_t VAddr, uint64_t & Value)
bool CMipsMemoryVM::SB_NonMemory(uint32_t VAddr, uint32_t Value) bool CMipsMemoryVM::SB_NonMemory(uint32_t VAddr, uint32_t Value)
{ {
uint32_t BaseAddress = m_TLB_ReadMap[VAddr >> 12]; uint32_t BaseAddress = m_TLB_WriteMap[VAddr >> 12];
if (BaseAddress == -1) if (BaseAddress == -1)
{ {
GenerateTLBWriteException(VAddr, __FUNCTION__); GenerateTLBWriteException(VAddr, __FUNCTION__);
@ -784,7 +778,7 @@ bool CMipsMemoryVM::SB_NonMemory(uint32_t VAddr, uint32_t Value)
bool CMipsMemoryVM::SH_NonMemory(uint32_t VAddr, uint32_t Value) bool CMipsMemoryVM::SH_NonMemory(uint32_t VAddr, uint32_t Value)
{ {
uint32_t BaseAddress = m_TLB_ReadMap[VAddr >> 12]; uint32_t BaseAddress = m_TLB_WriteMap[VAddr >> 12];
if (BaseAddress == -1) if (BaseAddress == -1)
{ {
GenerateTLBWriteException(VAddr, __FUNCTION__); GenerateTLBWriteException(VAddr, __FUNCTION__);
@ -837,10 +831,10 @@ bool CMipsMemoryVM::SH_NonMemory(uint32_t VAddr, uint32_t Value)
bool CMipsMemoryVM::SW_NonMemory(uint32_t VAddr, uint32_t Value) bool CMipsMemoryVM::SW_NonMemory(uint32_t VAddr, uint32_t Value)
{ {
uint32_t BaseAddress = m_TLB_ReadMap[VAddr >> 12]; uint32_t BaseAddress = m_TLB_WriteMap[VAddr >> 12];
if (BaseAddress == -1) if (BaseAddress == -1)
{ {
GenerateTLBWriteException(VAddr, __FUNCTION__); GenerateTLBWriteException((int64_t)((int32_t)VAddr), __FUNCTION__);
return false; return false;
} }
uint32_t PAddr = BaseAddress + VAddr; uint32_t PAddr = BaseAddress + VAddr;
@ -907,7 +901,7 @@ bool CMipsMemoryVM::SW_NonMemory(uint32_t VAddr, uint32_t Value)
bool CMipsMemoryVM::SD_NonMemory(uint32_t VAddr, uint64_t Value) bool CMipsMemoryVM::SD_NonMemory(uint32_t VAddr, uint64_t Value)
{ {
uint32_t BaseAddress = m_TLB_ReadMap[VAddr >> 12]; uint32_t BaseAddress = m_TLB_WriteMap[VAddr >> 12];
if (BaseAddress == -1) if (BaseAddress == -1)
{ {
GenerateTLBWriteException(VAddr, __FUNCTION__); GenerateTLBWriteException(VAddr, __FUNCTION__);
@ -949,12 +943,12 @@ bool CMipsMemoryVM::SD_NonMemory(uint32_t VAddr, uint64_t Value)
void CMipsMemoryVM::ClearMemoryWriteMap(uint32_t VAddr, uint32_t Length) void CMipsMemoryVM::ClearMemoryWriteMap(uint32_t VAddr, uint32_t Length)
{ {
uint32_t BaseAddress = m_TLB_ReadMap[VAddr >> 12]; uint32_t BaseAddress = m_TLB_WriteMap[VAddr >> 12];
if (BaseAddress == -1) if (BaseAddress == -1)
{ {
return; return;
} }
uint32_t PAddr = m_TLB_ReadMap[VAddr >> 12] + VAddr; uint32_t PAddr = m_TLB_WriteMap[VAddr >> 12] + VAddr;
for (uint32_t i = PAddr, n = (PAddr + (Length & ~0xFFF)) + 0x1000; i < n; i += 0x1000) for (uint32_t i = PAddr, n = (PAddr + (Length & ~0xFFF)) + 0x1000; i < n; i += 0x1000)
{ {
m_MemoryWriteMap[(i + 0x80000000) >> 12] = (size_t)-1; m_MemoryWriteMap[(i + 0x80000000) >> 12] = (size_t)-1;

5
Source/Project64-core/N64System/Mips/SystemTiming.cpp
View File

@ -274,11 +274,6 @@ void CSystemTimer::TimerDone()
default: default:
g_Notify->BreakPoint(__FILE__, __LINE__); g_Notify->BreakPoint(__FILE__, __LINE__);
} }
//CheckTimer();
/*if (Profiling)
{
StartTimer(LastTimer);
}*/
} }
void CSystemTimer::SetCompareTimer() void CSystemTimer::SetCompareTimer()