From 3b208a79cd6731159453cca3503f4a39b55b1721 Mon Sep 17 00:00:00 2001
From: LegendOfDragoon <the_f1u@yahoo.com>
Date: Sun, 1 Mar 2015 02:59:10 -0800
Subject: [PATCH] Implement recompiler version of Cop2_CT

---
 Source/RSP/Recompiler Ops.c | 37 ++++++++++++++++++++++++++++++++++++-
 1 file changed, 36 insertions(+), 1 deletion(-)

diff --git a/Source/RSP/Recompiler Ops.c b/Source/RSP/Recompiler Ops.c
index c09196f35..6b810a9e4 100644
--- a/Source/RSP/Recompiler Ops.c	
+++ b/Source/RSP/Recompiler Ops.c	
@@ -1807,7 +1807,42 @@ void Compile_Cop2_MT ( void ) {
 }
 
 void Compile_Cop2_CT ( void ) {
-	Cheat_r4300iOpcode(RSP_Cop2_CT,"RSP_Cop2_CT");
+	#ifndef Compile_Cop2
+	Cheat_r4300iOpcode(RSP_Cop2_CT, "RSP_Cop2_CT"); return;
+	#endif
+
+	CPU_Message("  %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
+
+	if (RSPOpC.rt == 0){
+		switch ((RSPOpC.rd & 0x03)) {
+		case 0:
+			MoveConstHalfToVariable(0, &RSP_Flags[0].HW[0], "RSP_Flags[0].HW[0]");
+			break;
+		case 1:
+			MoveConstHalfToVariable(0, &RSP_Flags[1].HW[0], "RSP_Flags[1].HW[0]");
+			break;
+		case 2:
+		case 3:
+			MoveConstByteToVariable(0, &RSP_Flags[2].B[0], "RSP_Flags[2].B[0]");
+			break;
+		}
+	} else{
+		switch ((RSPOpC.rd & 0x03)) {
+		case 0:
+			MoveVariableToX86regHalf(&RSP_GPR[RSPOpC.rt].HW[0], GPR_Name(RSPOpC.rt), x86_EAX);
+			MoveX86regHalfToVariable(x86_EAX, &RSP_Flags[0].HW[0], "RSP_Flags[0].HW[0]");
+			break;
+		case 1:
+			MoveVariableToX86regHalf(&RSP_GPR[RSPOpC.rt].HW[0], GPR_Name(RSPOpC.rt), x86_EAX);
+			MoveX86regHalfToVariable(x86_EAX, &RSP_Flags[1].HW[0], "RSP_Flags[1].HW[0]");
+			break;
+		case 2:
+		case 3:
+			MoveVariableToX86regByte(&RSP_GPR[RSPOpC.rt].B[0], GPR_Name(RSPOpC.rt), x86_EAX);
+			MoveX86regByteToVariable(x86_EAX, &RSP_Flags[2].B[0], "RSP_Flags[2].B[0]");
+			break;
+		}
+	}
 }
 
 void Compile_COP2_VECTOR (void) {