diff --git a/Source/Project64/N64 System/Debugger/Debugger - Memory Dump.cpp b/Source/Project64/N64 System/Debugger/Debugger - Memory Dump.cpp
index 4bd479153..092b53beb 100644
--- a/Source/Project64/N64 System/Debugger/Debugger - Memory Dump.cpp	
+++ b/Source/Project64/N64 System/Debugger/Debugger - Memory Dump.cpp	
@@ -85,7 +85,7 @@ LRESULT	CDumpMemory::OnClicked(WORD /*wNotifyCode*/, WORD wID, HWND /*hWndCtl*/,
 			}
 			if (SendDlgItemMessage(IDC_USE_ALT_PC,BM_GETSTATE, 0,0) != BST_CHECKED)
 			{
-				DumpPC = _Reg->m_PROGRAM_COUNTER;
+				DumpPC = g_Reg->m_PROGRAM_COUNTER;
 			}
 			//disable buttons
 			::EnableWindow(GetDlgItem(IDC_E_START_ADDR),FALSE);
diff --git a/Source/Project64/N64 System/Interpreter/Interpreter CPU.cpp b/Source/Project64/N64 System/Interpreter/Interpreter CPU.cpp
index c56944287..4e3f465f9 100644
--- a/Source/Project64/N64 System/Interpreter/Interpreter CPU.cpp	
+++ b/Source/Project64/N64 System/Interpreter/Interpreter CPU.cpp	
@@ -197,10 +197,10 @@ void CInterpreterCPU::InPermLoop (void) {
 	//if (CPU_Type == CPU_SyncCores) { SyncRegisters.CP0[9] +=5; }
 
 	/* Interrupts enabled */
-	if (( _Reg->STATUS_REGISTER & STATUS_IE  ) == 0 ||
-	    ( _Reg->STATUS_REGISTER & STATUS_EXL ) != 0 ||
-		( _Reg->STATUS_REGISTER & STATUS_ERL ) != 0 ||
-		( _Reg->STATUS_REGISTER & 0xFF00) == 0) 
+	if (( g_Reg->STATUS_REGISTER & STATUS_IE  ) == 0 ||
+	    ( g_Reg->STATUS_REGISTER & STATUS_EXL ) != 0 ||
+		( g_Reg->STATUS_REGISTER & STATUS_ERL ) != 0 ||
+		( g_Reg->STATUS_REGISTER & 0xFF00) == 0) 
 	{
 		if (_Plugins->Gfx()->UpdateScreen != NULL) { _Plugins->Gfx()->UpdateScreen(); }
 		//CurrentFrame = 0;
@@ -293,7 +293,7 @@ void CInterpreterCPU::ExecuteCPU (void )
 					g_Notify->BreakPoint(__FILE__,__LINE__);
 				}
 			} else { 
-				_Reg->DoTLBReadMiss(R4300iOp::m_NextInstruction == JUMP,PROGRAM_COUNTER);
+				g_Reg->DoTLBReadMiss(R4300iOp::m_NextInstruction == JUMP,PROGRAM_COUNTER);
 				R4300iOp::m_NextInstruction = NORMAL;
 			}
 		}
@@ -399,7 +399,7 @@ void CInterpreterCPU::ExecuteOps ( int Cycles )
 					g_Notify->BreakPoint(__FILE__,__LINE__);
 				}
 			} else { 
-				_Reg->DoTLBReadMiss(R4300iOp::m_NextInstruction == JUMP,PROGRAM_COUNTER);
+				g_Reg->DoTLBReadMiss(R4300iOp::m_NextInstruction == JUMP,PROGRAM_COUNTER);
 				R4300iOp::m_NextInstruction = NORMAL;
 			}
 		}
diff --git a/Source/Project64/N64 System/Interpreter/Interpreter Ops 32.cpp b/Source/Project64/N64 System/Interpreter/Interpreter Ops 32.cpp
index 5cb105243..31271e542 100644
--- a/Source/Project64/N64 System/Interpreter/Interpreter Ops 32.cpp	
+++ b/Source/Project64/N64 System/Interpreter/Interpreter Ops 32.cpp	
@@ -4,22 +4,22 @@
 bool DelaySlotEffectsCompare ( DWORD PC, DWORD Reg1, DWORD Reg2 );
 
 #define ADDRESS_ERROR_EXCEPTION(Address,FromRead) \
-	_Reg->DoAddressError(m_NextInstruction == JUMP,Address,FromRead);\
+	g_Reg->DoAddressError(m_NextInstruction == JUMP,Address,FromRead);\
 	m_NextInstruction = JUMP;\
 	m_JumpToLocation = (*_PROGRAM_COUNTER);\
 	return;
 
 //#define TEST_COP1_USABLE_EXCEPTION
 #define TEST_COP1_USABLE_EXCEPTION \
-	if ((_Reg->STATUS_REGISTER & STATUS_CU1) == 0) {\
-		_Reg->DoCopUnusableException(m_NextInstruction == JUMP,1);\
+	if ((g_Reg->STATUS_REGISTER & STATUS_CU1) == 0) {\
+		g_Reg->DoCopUnusableException(m_NextInstruction == JUMP,1);\
 		m_NextInstruction = JUMP;\
 		m_JumpToLocation = (*_PROGRAM_COUNTER);\
 		return;\
 	}
 
 #define TLB_READ_EXCEPTION(Address) \
-	_Reg->DoTLBReadMiss(m_NextInstruction == JUMP,Address);\
+	g_Reg->DoTLBReadMiss(m_NextInstruction == JUMP,Address);\
 	m_NextInstruction = JUMP;\
 	m_JumpToLocation = (*_PROGRAM_COUNTER);\
 	return;
@@ -1199,7 +1199,7 @@ void R4300iOp32::COP0_MT (void) {
 			_GPR[m_Opcode.rt].UW[0],CRegName::Cop0[m_Opcode.rd], _CP0[m_Opcode.rd]);
 		if (m_Opcode.rd == 11) { //Compare
 			LogMessage("%08X: Cause register changed from %08X to %08X",(*_PROGRAM_COUNTER),
-				_Reg->CAUSE_REGISTER, (_Reg->CAUSE_REGISTER & ~CAUSE_IP7));
+				g_Reg->CAUSE_REGISTER, (g_Reg->CAUSE_REGISTER & ~CAUSE_IP7));
 		}
 	}
 #endif
@@ -1233,13 +1233,13 @@ void R4300iOp32::COP0_MT (void) {
 	case 11: //Compare
 		_SystemTimer->UpdateTimers();
 		_CP0[m_Opcode.rd] = _GPR[m_Opcode.rt].UW[0];
-		_Reg->FAKE_CAUSE_REGISTER &= ~CAUSE_IP7;
+		g_Reg->FAKE_CAUSE_REGISTER &= ~CAUSE_IP7;
 		_SystemTimer->UpdateCompareTimer();
 		break;		
 	case 12: //Status
 		if ((_CP0[m_Opcode.rd] ^ _GPR[m_Opcode.rt].UW[0]) != 0) {
 			_CP0[m_Opcode.rd] = _GPR[m_Opcode.rt].UW[0];
-			_Reg->FixFpuLocations();
+			g_Reg->FixFpuLocations();
 		} else {
 			_CP0[m_Opcode.rd] = _GPR[m_Opcode.rt].UW[0];
 		}
@@ -1248,7 +1248,7 @@ void R4300iOp32::COP0_MT (void) {
 			g_Notify->DisplayError("Left kernel mode ??");
 #endif
 		}
-		_Reg->CheckInterrupts();
+		g_Reg->CheckInterrupts();
 		break;		
 	case 13: //cause
 		_CP0[m_Opcode.rd] &= 0xFFFFCFF;
diff --git a/Source/Project64/N64 System/Interpreter/Interpreter Ops.cpp b/Source/Project64/N64 System/Interpreter/Interpreter Ops.cpp
index f1c8325b0..8f2ceaec7 100644
--- a/Source/Project64/N64 System/Interpreter/Interpreter Ops.cpp	
+++ b/Source/Project64/N64 System/Interpreter/Interpreter Ops.cpp	
@@ -57,22 +57,22 @@ const int   R4300iOp::LWL_SHIFT[4] = { 0, 8, 16, 24};
 const int   R4300iOp::LWR_SHIFT[4] = { 24, 16 ,8, 0 };
 
 #define ADDRESS_ERROR_EXCEPTION(Address,FromRead) \
-	_Reg->DoAddressError(m_NextInstruction == JUMP,Address,FromRead);\
+	g_Reg->DoAddressError(m_NextInstruction == JUMP,Address,FromRead);\
 	m_NextInstruction = JUMP;\
 	m_JumpToLocation = (*_PROGRAM_COUNTER);\
 	return;
 
 //#define TEST_COP1_USABLE_EXCEPTION
 #define TEST_COP1_USABLE_EXCEPTION \
-	if ((_Reg->STATUS_REGISTER & STATUS_CU1) == 0) {\
-		_Reg->DoCopUnusableException(m_NextInstruction == JUMP,1);\
+	if ((g_Reg->STATUS_REGISTER & STATUS_CU1) == 0) {\
+		g_Reg->DoCopUnusableException(m_NextInstruction == JUMP,1);\
 		m_NextInstruction = JUMP;\
 		m_JumpToLocation = (*_PROGRAM_COUNTER);\
 		return;\
 	}
 
 #define TLB_READ_EXCEPTION(Address) \
-	_Reg->DoTLBReadMiss(m_NextInstruction == JUMP,Address);\
+	g_Reg->DoTLBReadMiss(m_NextInstruction == JUMP,Address);\
 	m_NextInstruction = JUMP;\
 	m_JumpToLocation = (*_PROGRAM_COUNTER);\
 	return;
@@ -1454,13 +1454,13 @@ void R4300iOp::SPECIAL_JALR (void) {
 }
 
 void R4300iOp::SPECIAL_SYSCALL (void) {
-	_Reg->DoSysCallException(m_NextInstruction == JUMP);
+	g_Reg->DoSysCallException(m_NextInstruction == JUMP);
 	m_NextInstruction = JUMP;
 	m_JumpToLocation = (*_PROGRAM_COUNTER);
 }
 
 void R4300iOp::SPECIAL_BREAK (void) {
-	_Reg->DoBreakException(m_NextInstruction == JUMP);
+	g_Reg->DoBreakException(m_NextInstruction == JUMP);
 	m_NextInstruction = JUMP;
 	m_JumpToLocation = (*_PROGRAM_COUNTER);
 }
@@ -1802,7 +1802,7 @@ void R4300iOp::COP0_MT (void) {
 			_GPR[m_Opcode.rt].UW[0],CRegName::Cop0[m_Opcode.rd], _CP0[m_Opcode.rd]);
 		if (m_Opcode.rd == 11) { //Compare
 			LogMessage("%08X: Cause register changed from %08X to %08X",(*_PROGRAM_COUNTER),
-				_Reg->CAUSE_REGISTER, (_Reg->CAUSE_REGISTER & ~CAUSE_IP7));
+				g_Reg->CAUSE_REGISTER, (g_Reg->CAUSE_REGISTER & ~CAUSE_IP7));
 		}
 	}
 #endif
@@ -1836,13 +1836,13 @@ void R4300iOp::COP0_MT (void) {
 	case 11: //Compare
 		_SystemTimer->UpdateTimers();
 		_CP0[m_Opcode.rd] = _GPR[m_Opcode.rt].UW[0];
-		_Reg->FAKE_CAUSE_REGISTER &= ~CAUSE_IP7;
+		g_Reg->FAKE_CAUSE_REGISTER &= ~CAUSE_IP7;
 		_SystemTimer->UpdateCompareTimer();
 		break;		
 	case 12: //Status
 		if ((_CP0[m_Opcode.rd] ^ _GPR[m_Opcode.rt].UW[0]) != 0) {
 			_CP0[m_Opcode.rd] = _GPR[m_Opcode.rt].UW[0];
-			_Reg->FixFpuLocations();
+			g_Reg->FixFpuLocations();
 		} else {
 			_CP0[m_Opcode.rd] = _GPR[m_Opcode.rt].UW[0];
 		}
@@ -1851,7 +1851,7 @@ void R4300iOp::COP0_MT (void) {
 			g_Notify->DisplayError("Left kernel mode ??");
 #endif
 		}
-		_Reg->CheckInterrupts();
+		g_Reg->CheckInterrupts();
 		break;		
 	case 13: //cause
 		_CP0[m_Opcode.rd] &= 0xFFFFCFF;
@@ -1872,12 +1872,12 @@ void R4300iOp::COP0_CO_TLBR (void) {
 
 void R4300iOp::COP0_CO_TLBWI (void) {
 	if (!bUseTlb()) { return; }
-	g_TLB->WriteEntry(_Reg->INDEX_REGISTER & 0x1F,FALSE);
+	g_TLB->WriteEntry(g_Reg->INDEX_REGISTER & 0x1F,FALSE);
 }
 
 void R4300iOp::COP0_CO_TLBWR (void) {
 	if (!bUseTlb()) { return; }
-	g_TLB->WriteEntry(_Reg->RANDOM_REGISTER & 0x1F,true);
+	g_TLB->WriteEntry(g_Reg->RANDOM_REGISTER & 0x1F,true);
 }
 
 void R4300iOp::COP0_CO_TLBP (void) {
@@ -1887,15 +1887,15 @@ void R4300iOp::COP0_CO_TLBP (void) {
 
 void R4300iOp::COP0_CO_ERET (void) {
 	m_NextInstruction = JUMP;
-	if ((_Reg->STATUS_REGISTER & STATUS_ERL) != 0) {
-		m_JumpToLocation = _Reg->ERROREPC_REGISTER;
-		_Reg->STATUS_REGISTER &= ~STATUS_ERL;
+	if ((g_Reg->STATUS_REGISTER & STATUS_ERL) != 0) {
+		m_JumpToLocation = g_Reg->ERROREPC_REGISTER;
+		g_Reg->STATUS_REGISTER &= ~STATUS_ERL;
 	} else {
-		m_JumpToLocation = _Reg->EPC_REGISTER;
-		_Reg->STATUS_REGISTER &= ~STATUS_EXL;
+		m_JumpToLocation = g_Reg->EPC_REGISTER;
+		g_Reg->STATUS_REGISTER &= ~STATUS_EXL;
 	}
 	(*_LLBit) = 0;
-	_Reg->CheckInterrupts();
+	g_Reg->CheckInterrupts();
 	m_TestTimer = TRUE;
 }
 
diff --git a/Source/Project64/N64 System/Mips/Audio.cpp b/Source/Project64/N64 System/Mips/Audio.cpp
index 5a6467487..4cf6cba43 100644
--- a/Source/Project64/N64 System/Mips/Audio.cpp	
+++ b/Source/Project64/N64 System/Mips/Audio.cpp	
@@ -38,12 +38,12 @@ DWORD CAudio::GetStatus ( void )
 
 void CAudio::LenChanged ( void )
 {
-	WriteTraceF(TraceAudio,__FUNCTION__ ": Start (_Reg->AI_LEN_REG = %d)",_Reg->AI_LEN_REG);
-	if (_Reg->AI_LEN_REG != 0)
+	WriteTraceF(TraceAudio,__FUNCTION__ ": Start (g_Reg->AI_LEN_REG = %d)",g_Reg->AI_LEN_REG);
+	if (g_Reg->AI_LEN_REG != 0)
 	{
-		if (_Reg->AI_LEN_REG >= 0x20000)
+		if (g_Reg->AI_LEN_REG >= 0x20000)
 		{
-			WriteTraceF(TraceAudio,__FUNCTION__ ": *** Ignoring Write, To Large (%X)",_Reg->AI_LEN_REG);
+			WriteTraceF(TraceAudio,__FUNCTION__ ": *** Ignoring Write, To Large (%X)",g_Reg->AI_LEN_REG);
 		} else {
 			m_Status |= 0x80000000;
 			if (_SystemTimer->GetTimer(CSystemTimer::AiTimer) == 0)
@@ -52,11 +52,11 @@ void CAudio::LenChanged ( void )
 				{
 					g_Notify->BreakPoint(__FILE__,__LINE__);
 				}
-				WriteTraceF(TraceAudio,__FUNCTION__ ": Set Timer  AI_LEN_REG: %d m_CountsPerByte: %d",_Reg->AI_LEN_REG,m_CountsPerByte);
-				_SystemTimer->SetTimer(CSystemTimer::AiTimer,_Reg->AI_LEN_REG * m_CountsPerByte,false);
+				WriteTraceF(TraceAudio,__FUNCTION__ ": Set Timer  AI_LEN_REG: %d m_CountsPerByte: %d",g_Reg->AI_LEN_REG,m_CountsPerByte);
+				_SystemTimer->SetTimer(CSystemTimer::AiTimer,g_Reg->AI_LEN_REG * m_CountsPerByte,false);
 			} else {
-				WriteTraceF(TraceAudio,__FUNCTION__ ": Increasing Second Buffer (m_SecondBuff %d Increase: %d)",m_SecondBuff,_Reg->AI_LEN_REG);
-				m_SecondBuff += _Reg->AI_LEN_REG;
+				WriteTraceF(TraceAudio,__FUNCTION__ ": Increasing Second Buffer (m_SecondBuff %d Increase: %d)",m_SecondBuff,g_Reg->AI_LEN_REG);
+				m_SecondBuff += g_Reg->AI_LEN_REG;
 			}
 		}
 	} else {
@@ -81,8 +81,8 @@ void CAudio::TimerDone ( void )
 		_SystemTimer->SetTimer(CSystemTimer::AiTimer,m_SecondBuff * m_CountsPerByte,false);
 		m_SecondBuff = 0;
 	} else {
-		_Reg->MI_INTR_REG |= MI_INTR_AI;
-		_Reg->CheckInterrupts();
+		g_Reg->MI_INTR_REG |= MI_INTR_AI;
+		g_Reg->CheckInterrupts();
 		m_Status &= 0x7FFFFFFF;
 	}
 	WriteTraceF(TraceAudio,__FUNCTION__ ": Done",m_SecondBuff);
@@ -102,7 +102,7 @@ void CAudio::SetViIntr ( DWORD /*VI_INTR_TIME*/ )
 
 void CAudio::SetFrequency (DWORD Dacrate, DWORD System) 
 {
-	WriteTraceF(TraceAudio,__FUNCTION__ "(Dacrate: %X System: %d): AI_BITRATE_REG = %X",Dacrate,System,_Reg->AI_BITRATE_REG);
+	WriteTraceF(TraceAudio,__FUNCTION__ "(Dacrate: %X System: %d): AI_BITRATE_REG = %X",Dacrate,System,g_Reg->AI_BITRATE_REG);
 	DWORD Frequency;
 
 	switch (System) {
diff --git a/Source/Project64/N64 System/Mips/Dma.cpp b/Source/Project64/N64 System/Mips/Dma.cpp
index 7f726cfee..e92e4c961 100644
--- a/Source/Project64/N64 System/Mips/Dma.cpp	
+++ b/Source/Project64/N64 System/Mips/Dma.cpp	
@@ -20,97 +20,97 @@ void CDMA::OnFirstDMA (void) {
 void CDMA::PI_DMA_READ (void) {
 //	PI_STATUS_REG |= PI_STATUS_DMA_BUSY;
 
-	if ( _Reg->PI_DRAM_ADDR_REG + _Reg->PI_RD_LEN_REG + 1 > g_MMU->RdramSize()) {
+	if ( g_Reg->PI_DRAM_ADDR_REG + g_Reg->PI_RD_LEN_REG + 1 > g_MMU->RdramSize()) {
 #ifndef EXTERNAL_RELEASE
 		g_Notify->DisplayError("PI_DMA_READ not in Memory");
 #endif
-		_Reg->PI_STATUS_REG &= ~PI_STATUS_DMA_BUSY;
-		_Reg->MI_INTR_REG |= MI_INTR_PI;
-		_Reg->CheckInterrupts();
+		g_Reg->PI_STATUS_REG &= ~PI_STATUS_DMA_BUSY;
+		g_Reg->MI_INTR_REG |= MI_INTR_PI;
+		g_Reg->CheckInterrupts();
 		return;
 	}
 
-	if ( _Reg->PI_CART_ADDR_REG >= 0x08000000 && _Reg->PI_CART_ADDR_REG <= 0x08010000) {
+	if ( g_Reg->PI_CART_ADDR_REG >= 0x08000000 && g_Reg->PI_CART_ADDR_REG <= 0x08010000) {
 		if (g_System->m_SaveUsing == SaveChip_Auto) { g_System->m_SaveUsing = SaveChip_Sram; }
 		if (g_System->m_SaveUsing == SaveChip_Sram) {
 			m_Sram.DmaToSram(
-				g_MMU->Rdram() + _Reg->PI_DRAM_ADDR_REG,
-				_Reg->PI_CART_ADDR_REG - 0x08000000,
-				_Reg->PI_RD_LEN_REG + 1
+				g_MMU->Rdram() + g_Reg->PI_DRAM_ADDR_REG,
+				g_Reg->PI_CART_ADDR_REG - 0x08000000,
+				g_Reg->PI_RD_LEN_REG + 1
 			);
-			_Reg->PI_STATUS_REG &= ~PI_STATUS_DMA_BUSY;
-			_Reg->MI_INTR_REG |= MI_INTR_PI;
-			_Reg->CheckInterrupts();
+			g_Reg->PI_STATUS_REG &= ~PI_STATUS_DMA_BUSY;
+			g_Reg->MI_INTR_REG |= MI_INTR_PI;
+			g_Reg->CheckInterrupts();
 			return;
 		}
 		if (g_System->m_SaveUsing == SaveChip_FlashRam) {
 			m_FlashRam.DmaToFlashram(
-				g_MMU->Rdram()+_Reg->PI_DRAM_ADDR_REG,
-				_Reg->PI_CART_ADDR_REG - 0x08000000,
-				_Reg->PI_WR_LEN_REG + 1
+				g_MMU->Rdram()+g_Reg->PI_DRAM_ADDR_REG,
+				g_Reg->PI_CART_ADDR_REG - 0x08000000,
+				g_Reg->PI_WR_LEN_REG + 1
 			);
-			_Reg->PI_STATUS_REG &= ~PI_STATUS_DMA_BUSY;
-			_Reg->MI_INTR_REG |= MI_INTR_PI;
-			_Reg->CheckInterrupts();
+			g_Reg->PI_STATUS_REG &= ~PI_STATUS_DMA_BUSY;
+			g_Reg->MI_INTR_REG |= MI_INTR_PI;
+			g_Reg->CheckInterrupts();
 			return;
 		}
 	}
 	if (g_System->m_SaveUsing == SaveChip_FlashRam) 
 	{
-		g_Notify->DisplayError("**** FLashRam DMA Read address %X *****",_Reg->PI_CART_ADDR_REG);
-		_Reg->PI_STATUS_REG &= ~PI_STATUS_DMA_BUSY;
-		_Reg->MI_INTR_REG |= MI_INTR_PI;
-		_Reg->CheckInterrupts();
+		g_Notify->DisplayError("**** FLashRam DMA Read address %X *****",g_Reg->PI_CART_ADDR_REG);
+		g_Reg->PI_STATUS_REG &= ~PI_STATUS_DMA_BUSY;
+		g_Reg->MI_INTR_REG |= MI_INTR_PI;
+		g_Reg->CheckInterrupts();
 		return;
 	}
 #ifndef EXTERNAL_RELEASE
 	g_Notify->DisplayError("PI_DMA_READ where are you dmaing to ?");
 #endif	
-	_Reg->PI_STATUS_REG &= ~PI_STATUS_DMA_BUSY;
-	_Reg->MI_INTR_REG |= MI_INTR_PI;
-	_Reg->CheckInterrupts();
+	g_Reg->PI_STATUS_REG &= ~PI_STATUS_DMA_BUSY;
+	g_Reg->MI_INTR_REG |= MI_INTR_PI;
+	g_Reg->CheckInterrupts();
 	return;
 }
 
 void CDMA::PI_DMA_WRITE (void) {
 
-	_Reg->PI_STATUS_REG |= PI_STATUS_DMA_BUSY;
-	if ( _Reg->PI_DRAM_ADDR_REG + _Reg->PI_WR_LEN_REG + 1 > g_MMU->RdramSize()) 
+	g_Reg->PI_STATUS_REG |= PI_STATUS_DMA_BUSY;
+	if ( g_Reg->PI_DRAM_ADDR_REG + g_Reg->PI_WR_LEN_REG + 1 > g_MMU->RdramSize()) 
 	{
 		if (g_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { g_Notify->DisplayError("PI_DMA_WRITE not in Memory"); }
-		_Reg->PI_STATUS_REG &= ~PI_STATUS_DMA_BUSY;
-		_Reg->MI_INTR_REG |= MI_INTR_PI;
-		_Reg->CheckInterrupts();
+		g_Reg->PI_STATUS_REG &= ~PI_STATUS_DMA_BUSY;
+		g_Reg->MI_INTR_REG |= MI_INTR_PI;
+		g_Reg->CheckInterrupts();
 		return;
 	}
 
-	if ( _Reg->PI_CART_ADDR_REG >= 0x08000000 && _Reg->PI_CART_ADDR_REG <= 0x08010000) {
+	if ( g_Reg->PI_CART_ADDR_REG >= 0x08000000 && g_Reg->PI_CART_ADDR_REG <= 0x08010000) {
 		if (g_System->m_SaveUsing == SaveChip_Auto) { g_System->m_SaveUsing = SaveChip_Sram; }
 		if (g_System->m_SaveUsing == SaveChip_Sram) {
 			m_Sram.DmaFromSram(
-				g_MMU->Rdram()+_Reg->PI_DRAM_ADDR_REG,
-				_Reg->PI_CART_ADDR_REG - 0x08000000,
-				_Reg->PI_WR_LEN_REG + 1
+				g_MMU->Rdram()+g_Reg->PI_DRAM_ADDR_REG,
+				g_Reg->PI_CART_ADDR_REG - 0x08000000,
+				g_Reg->PI_WR_LEN_REG + 1
 			);
-			_Reg->PI_STATUS_REG &= ~PI_STATUS_DMA_BUSY;
-			_Reg->MI_INTR_REG |= MI_INTR_PI;
-			_Reg->CheckInterrupts();
+			g_Reg->PI_STATUS_REG &= ~PI_STATUS_DMA_BUSY;
+			g_Reg->MI_INTR_REG |= MI_INTR_PI;
+			g_Reg->CheckInterrupts();
 			return;
 		}
 		if (g_System->m_SaveUsing == SaveChip_FlashRam) {
 			m_FlashRam.DmaFromFlashram(
-				g_MMU->Rdram()+_Reg->PI_DRAM_ADDR_REG,
-				_Reg->PI_CART_ADDR_REG - 0x08000000,
-				_Reg->PI_WR_LEN_REG + 1
+				g_MMU->Rdram()+g_Reg->PI_DRAM_ADDR_REG,
+				g_Reg->PI_CART_ADDR_REG - 0x08000000,
+				g_Reg->PI_WR_LEN_REG + 1
 			);
-			_Reg->PI_STATUS_REG &= ~PI_STATUS_DMA_BUSY;
-			_Reg->MI_INTR_REG |= MI_INTR_PI;
-			_Reg->CheckInterrupts();
+			g_Reg->PI_STATUS_REG &= ~PI_STATUS_DMA_BUSY;
+			g_Reg->MI_INTR_REG |= MI_INTR_PI;
+			g_Reg->CheckInterrupts();
 		}
 		return;
 	}
 
-	if ( _Reg->PI_CART_ADDR_REG >= 0x10000000 && _Reg->PI_CART_ADDR_REG <= 0x1FBFFFFF) 
+	if ( g_Reg->PI_CART_ADDR_REG >= 0x10000000 && g_Reg->PI_CART_ADDR_REG <= 0x1FBFFFFF) 
 	{
 	DWORD i;	
 #ifdef tofix
@@ -123,22 +123,22 @@ void CDMA::PI_DMA_WRITE (void) {
 #endif
 		BYTE * ROM   = _Rom->GetRomAddress();
 		BYTE * RDRAM = g_MMU->Rdram();
-		_Reg->PI_CART_ADDR_REG -= 0x10000000;
-		if (_Reg->PI_CART_ADDR_REG + _Reg->PI_WR_LEN_REG + 1 < _Rom->GetRomSize()) {
-			for (i = 0; i < _Reg->PI_WR_LEN_REG + 1; i ++) {
-				*(RDRAM+((_Reg->PI_DRAM_ADDR_REG + i) ^ 3)) =  *(ROM+((_Reg->PI_CART_ADDR_REG + i) ^ 3));
+		g_Reg->PI_CART_ADDR_REG -= 0x10000000;
+		if (g_Reg->PI_CART_ADDR_REG + g_Reg->PI_WR_LEN_REG + 1 < _Rom->GetRomSize()) {
+			for (i = 0; i < g_Reg->PI_WR_LEN_REG + 1; i ++) {
+				*(RDRAM+((g_Reg->PI_DRAM_ADDR_REG + i) ^ 3)) =  *(ROM+((g_Reg->PI_CART_ADDR_REG + i) ^ 3));
 			}
 		} else {
 			DWORD Len;
-			Len = _Rom->GetRomSize() - _Reg->PI_CART_ADDR_REG;
+			Len = _Rom->GetRomSize() - g_Reg->PI_CART_ADDR_REG;
 			for (i = 0; i < Len; i ++) {
-				*(RDRAM+((_Reg->PI_DRAM_ADDR_REG + i) ^ 3)) =  *(ROM+((_Reg->PI_CART_ADDR_REG + i) ^ 3));
+				*(RDRAM+((g_Reg->PI_DRAM_ADDR_REG + i) ^ 3)) =  *(ROM+((g_Reg->PI_CART_ADDR_REG + i) ^ 3));
 			}
-			for (i = Len; i < _Reg->PI_WR_LEN_REG + 1 - Len; i ++) {
-				*(RDRAM+((_Reg->PI_DRAM_ADDR_REG + i) ^ 3)) =  0;
+			for (i = Len; i < g_Reg->PI_WR_LEN_REG + 1 - Len; i ++) {
+				*(RDRAM+((g_Reg->PI_DRAM_ADDR_REG + i) ^ 3)) =  0;
 			}
 		}
-		_Reg->PI_CART_ADDR_REG += 0x10000000;
+		g_Reg->PI_CART_ADDR_REG += 0x10000000;
 
 		if (!g_System->DmaUsed())
 		{
@@ -147,76 +147,76 @@ void CDMA::PI_DMA_WRITE (void) {
 		}
 		if (g_Recompiler && g_Recompiler->bSMM_PIDMA())
 		{
-			g_Recompiler->ClearRecompCode_Phys(_Reg->PI_DRAM_ADDR_REG, _Reg->PI_WR_LEN_REG,CRecompiler::Remove_DMA);
+			g_Recompiler->ClearRecompCode_Phys(g_Reg->PI_DRAM_ADDR_REG, g_Reg->PI_WR_LEN_REG,CRecompiler::Remove_DMA);
 		}
-		_Reg->PI_STATUS_REG &= ~PI_STATUS_DMA_BUSY;
-		_Reg->MI_INTR_REG |= MI_INTR_PI;
-		_Reg->CheckInterrupts();
+		g_Reg->PI_STATUS_REG &= ~PI_STATUS_DMA_BUSY;
+		g_Reg->MI_INTR_REG |= MI_INTR_PI;
+		g_Reg->CheckInterrupts();
 		//ChangeTimer(PiTimer,(int)(PI_WR_LEN_REG * 8.9) + 50);
 		//ChangeTimer(PiTimer,(int)(PI_WR_LEN_REG * 8.9));
 		return;
 	}
 	
 	if (g_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { g_Notify->DisplayError("PI_DMA_WRITE not in ROM"); }
-	_Reg->PI_STATUS_REG &= ~PI_STATUS_DMA_BUSY;
-	_Reg->MI_INTR_REG |= MI_INTR_PI;
-	_Reg->CheckInterrupts();
+	g_Reg->PI_STATUS_REG &= ~PI_STATUS_DMA_BUSY;
+	g_Reg->MI_INTR_REG |= MI_INTR_PI;
+	g_Reg->CheckInterrupts();
 
 }
 
 void CDMA::SP_DMA_READ (void) { 
-	_Reg->SP_DRAM_ADDR_REG &= 0x1FFFFFFF;
+	g_Reg->SP_DRAM_ADDR_REG &= 0x1FFFFFFF;
 
-	if (_Reg->SP_DRAM_ADDR_REG > g_MMU->RdramSize()) {
+	if (g_Reg->SP_DRAM_ADDR_REG > g_MMU->RdramSize()) {
 #ifndef EXTERNAL_RELEASE
 		g_Notify->DisplayError("SP DMA\nSP_DRAM_ADDR_REG not in RDRam space");
 #endif
-		_Reg->SP_DMA_BUSY_REG = 0;
-		_Reg->SP_STATUS_REG  &= ~SP_STATUS_DMA_BUSY;
+		g_Reg->SP_DMA_BUSY_REG = 0;
+		g_Reg->SP_STATUS_REG  &= ~SP_STATUS_DMA_BUSY;
 		return;
 	}
 	
-	if (_Reg->SP_RD_LEN_REG + 1  + (_Reg->SP_MEM_ADDR_REG & 0xFFF) > 0x1000) {
+	if (g_Reg->SP_RD_LEN_REG + 1  + (g_Reg->SP_MEM_ADDR_REG & 0xFFF) > 0x1000) {
 #ifndef EXTERNAL_RELEASE
 		g_Notify->DisplayError("SP DMA\ncould not fit copy in memory segement");
 #endif
 		return;		
 	}
 	
-	if ((_Reg->SP_MEM_ADDR_REG & 3) != 0) { g_Notify->BreakPoint(__FILE__,__LINE__);  }
-	if ((_Reg->SP_DRAM_ADDR_REG & 3) != 0) { g_Notify->BreakPoint(__FILE__,__LINE__);  }
-	if (((_Reg->SP_RD_LEN_REG + 1) & 3) != 0) { g_Notify->BreakPoint(__FILE__,__LINE__);  }
+	if ((g_Reg->SP_MEM_ADDR_REG & 3) != 0) { g_Notify->BreakPoint(__FILE__,__LINE__);  }
+	if ((g_Reg->SP_DRAM_ADDR_REG & 3) != 0) { g_Notify->BreakPoint(__FILE__,__LINE__);  }
+	if (((g_Reg->SP_RD_LEN_REG + 1) & 3) != 0) { g_Notify->BreakPoint(__FILE__,__LINE__);  }
 
-	memcpy( g_MMU->Dmem() + (_Reg->SP_MEM_ADDR_REG & 0x1FFF), g_MMU->Rdram() + _Reg->SP_DRAM_ADDR_REG,
-		_Reg->SP_RD_LEN_REG + 1 );
+	memcpy( g_MMU->Dmem() + (g_Reg->SP_MEM_ADDR_REG & 0x1FFF), g_MMU->Rdram() + g_Reg->SP_DRAM_ADDR_REG,
+		g_Reg->SP_RD_LEN_REG + 1 );
 		
-	_Reg->SP_DMA_BUSY_REG = 0;
-	_Reg->SP_STATUS_REG  &= ~SP_STATUS_DMA_BUSY;
+	g_Reg->SP_DMA_BUSY_REG = 0;
+	g_Reg->SP_STATUS_REG  &= ~SP_STATUS_DMA_BUSY;
 }
 
 void CDMA::SP_DMA_WRITE (void) { 
-	if (_Reg->SP_DRAM_ADDR_REG > g_MMU->RdramSize()) {
+	if (g_Reg->SP_DRAM_ADDR_REG > g_MMU->RdramSize()) {
 #ifndef EXTERNAL_RELEASE
 		g_Notify->DisplayError("SP DMA WRITE\nSP_DRAM_ADDR_REG not in RDRam space");
 #endif
 		return;
 	}
 	
-	if (_Reg->SP_WR_LEN_REG + 1 + (_Reg->SP_MEM_ADDR_REG & 0xFFF) > 0x1000) {
+	if (g_Reg->SP_WR_LEN_REG + 1 + (g_Reg->SP_MEM_ADDR_REG & 0xFFF) > 0x1000) {
 #ifndef EXTERNAL_RELEASE
 		g_Notify->DisplayError("SP DMA WRITE\ncould not fit copy in memory segement");
 #endif
 		return;		
 	}
 
-	if ((_Reg->SP_MEM_ADDR_REG & 3) != 0) { g_Notify->BreakPoint(__FILE__,__LINE__); }
-	if ((_Reg->SP_DRAM_ADDR_REG & 3) != 0) { g_Notify->BreakPoint(__FILE__,__LINE__);  }
-	if (((_Reg->SP_WR_LEN_REG + 1) & 3) != 0) { g_Notify->BreakPoint(__FILE__,__LINE__);  }
+	if ((g_Reg->SP_MEM_ADDR_REG & 3) != 0) { g_Notify->BreakPoint(__FILE__,__LINE__); }
+	if ((g_Reg->SP_DRAM_ADDR_REG & 3) != 0) { g_Notify->BreakPoint(__FILE__,__LINE__);  }
+	if (((g_Reg->SP_WR_LEN_REG + 1) & 3) != 0) { g_Notify->BreakPoint(__FILE__,__LINE__);  }
 
-	memcpy( g_MMU->Rdram() + _Reg->SP_DRAM_ADDR_REG, g_MMU->Dmem() + (_Reg->SP_MEM_ADDR_REG & 0x1FFF),
-		_Reg->SP_WR_LEN_REG + 1);
+	memcpy( g_MMU->Rdram() + g_Reg->SP_DRAM_ADDR_REG, g_MMU->Dmem() + (g_Reg->SP_MEM_ADDR_REG & 0x1FFF),
+		g_Reg->SP_WR_LEN_REG + 1);
 		
-	_Reg->SP_DMA_BUSY_REG = 0;
-	_Reg->SP_STATUS_REG  &= ~SP_STATUS_DMA_BUSY;
+	g_Reg->SP_DMA_BUSY_REG = 0;
+	g_Reg->SP_STATUS_REG  &= ~SP_STATUS_DMA_BUSY;
 }
 
diff --git a/Source/Project64/N64 System/Mips/Memory Virtual Mem.cpp b/Source/Project64/N64 System/Mips/Memory Virtual Mem.cpp
index 6be86318e..c37510321 100644
--- a/Source/Project64/N64 System/Mips/Memory Virtual Mem.cpp	
+++ b/Source/Project64/N64 System/Mips/Memory Virtual Mem.cpp	
@@ -399,10 +399,10 @@ void  CMipsMemoryVM::Compile_LW (x86Reg Reg, DWORD VAddr ) {
 				break; 
 			}
 			switch (PAddr) {
-			case 0x04040010: MoveVariableToX86reg(&_Reg->SP_STATUS_REG,"SP_STATUS_REG",Reg); break;
-			case 0x04040014: MoveVariableToX86reg(&_Reg->SP_DMA_FULL_REG,"SP_DMA_FULL_REG",Reg); break;
-			case 0x04040018: MoveVariableToX86reg(&_Reg->SP_DMA_BUSY_REG,"SP_DMA_BUSY_REG",Reg); break;
-			case 0x04080000: MoveVariableToX86reg(&_Reg->SP_PC_REG,"SP_PC_REG",Reg); break;
+			case 0x04040010: MoveVariableToX86reg(&g_Reg->SP_STATUS_REG,"SP_STATUS_REG",Reg); break;
+			case 0x04040014: MoveVariableToX86reg(&g_Reg->SP_DMA_FULL_REG,"SP_DMA_FULL_REG",Reg); break;
+			case 0x04040018: MoveVariableToX86reg(&g_Reg->SP_DMA_BUSY_REG,"SP_DMA_BUSY_REG",Reg); break;
+			case 0x04080000: MoveVariableToX86reg(&g_Reg->SP_PC_REG,"SP_PC_REG",Reg); break;
 			default:
 				MoveConstToX86reg(0,Reg);
 				if (g_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { g_Notify->DisplayError(__FUNCTION__ "\nFailed to translate address: %X",VAddr); }
@@ -422,10 +422,10 @@ void  CMipsMemoryVM::Compile_LW (x86Reg Reg, DWORD VAddr ) {
 			break;
 		case 0x04300000:
 			switch (PAddr) {
-			case 0x04300000: MoveVariableToX86reg(&_Reg->MI_MODE_REG,"MI_MODE_REG",Reg); break;
-			case 0x04300004: MoveVariableToX86reg(&_Reg->MI_VERSION_REG,"MI_VERSION_REG",Reg); break;
-			case 0x04300008: MoveVariableToX86reg(&_Reg->MI_INTR_REG,"MI_INTR_REG",Reg); break;
-			case 0x0430000C: MoveVariableToX86reg(&_Reg->MI_INTR_MASK_REG,"MI_INTR_MASK_REG",Reg); break;
+			case 0x04300000: MoveVariableToX86reg(&g_Reg->MI_MODE_REG,"MI_MODE_REG",Reg); break;
+			case 0x04300004: MoveVariableToX86reg(&g_Reg->MI_VERSION_REG,"MI_VERSION_REG",Reg); break;
+			case 0x04300008: MoveVariableToX86reg(&g_Reg->MI_INTR_REG,"MI_INTR_REG",Reg); break;
+			case 0x0430000C: MoveVariableToX86reg(&g_Reg->MI_INTR_MASK_REG,"MI_INTR_MASK_REG",Reg); break;
 			default:
 				MoveConstToX86reg(0,Reg);
 				if (g_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { g_Notify->DisplayError(__FUNCTION__ "\nFailed to translate address: %X",VAddr); }
@@ -484,7 +484,7 @@ void  CMipsMemoryVM::Compile_LW (x86Reg Reg, DWORD VAddr ) {
 					AfterCallDirect(m_RegWorkingSet);
 					MoveVariableToX86reg(&m_TempValue,"m_TempValue",Reg);
 				} else {
-					MoveVariableToX86reg(&_Reg->AI_STATUS_REG,"AI_STATUS_REG",Reg); 
+					MoveVariableToX86reg(&g_Reg->AI_STATUS_REG,"AI_STATUS_REG",Reg); 
 				}
 				break;
 			default:
@@ -494,15 +494,15 @@ void  CMipsMemoryVM::Compile_LW (x86Reg Reg, DWORD VAddr ) {
 			break;
 		case 0x04600000:
 			switch (PAddr) {
-			case 0x04600010: MoveVariableToX86reg(&_Reg->PI_STATUS_REG,"PI_STATUS_REG",Reg); break;
-			case 0x04600014: MoveVariableToX86reg(&_Reg->PI_DOMAIN1_REG,"PI_DOMAIN1_REG",Reg); break;
-			case 0x04600018: MoveVariableToX86reg(&_Reg->PI_BSD_DOM1_PWD_REG,"PI_BSD_DOM1_PWD_REG",Reg); break;
-			case 0x0460001C: MoveVariableToX86reg(&_Reg->PI_BSD_DOM1_PGS_REG,"PI_BSD_DOM1_PGS_REG",Reg); break;
-			case 0x04600020: MoveVariableToX86reg(&_Reg->PI_BSD_DOM1_RLS_REG,"PI_BSD_DOM1_RLS_REG",Reg); break;
-			case 0x04600024: MoveVariableToX86reg(&_Reg->PI_DOMAIN2_REG,"PI_DOMAIN2_REG",Reg); break;
-			case 0x04600028: MoveVariableToX86reg(&_Reg->PI_BSD_DOM2_PWD_REG,"PI_BSD_DOM2_PWD_REG",Reg); break;
-			case 0x0460002C: MoveVariableToX86reg(&_Reg->PI_BSD_DOM2_PGS_REG,"PI_BSD_DOM2_PGS_REG",Reg); break;
-			case 0x04600030: MoveVariableToX86reg(&_Reg->PI_BSD_DOM2_RLS_REG,"PI_BSD_DOM2_RLS_REG",Reg); break;
+			case 0x04600010: MoveVariableToX86reg(&g_Reg->PI_STATUS_REG,"PI_STATUS_REG",Reg); break;
+			case 0x04600014: MoveVariableToX86reg(&g_Reg->PI_DOMAIN1_REG,"PI_DOMAIN1_REG",Reg); break;
+			case 0x04600018: MoveVariableToX86reg(&g_Reg->PI_BSD_DOM1_PWD_REG,"PI_BSD_DOM1_PWD_REG",Reg); break;
+			case 0x0460001C: MoveVariableToX86reg(&g_Reg->PI_BSD_DOM1_PGS_REG,"PI_BSD_DOM1_PGS_REG",Reg); break;
+			case 0x04600020: MoveVariableToX86reg(&g_Reg->PI_BSD_DOM1_RLS_REG,"PI_BSD_DOM1_RLS_REG",Reg); break;
+			case 0x04600024: MoveVariableToX86reg(&g_Reg->PI_DOMAIN2_REG,"PI_DOMAIN2_REG",Reg); break;
+			case 0x04600028: MoveVariableToX86reg(&g_Reg->PI_BSD_DOM2_PWD_REG,"PI_BSD_DOM2_PWD_REG",Reg); break;
+			case 0x0460002C: MoveVariableToX86reg(&g_Reg->PI_BSD_DOM2_PGS_REG,"PI_BSD_DOM2_PGS_REG",Reg); break;
+			case 0x04600030: MoveVariableToX86reg(&g_Reg->PI_BSD_DOM2_RLS_REG,"PI_BSD_DOM2_RLS_REG",Reg); break;
 			default:
 				MoveConstToX86reg(0,Reg);
 				if (g_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { g_Notify->DisplayError(__FUNCTION__ "\nFailed to translate address: %X",VAddr); }
@@ -510,8 +510,8 @@ void  CMipsMemoryVM::Compile_LW (x86Reg Reg, DWORD VAddr ) {
 			break;
 		case 0x04700000:
 			switch (PAddr) {
-			case 0x0470000C: MoveVariableToX86reg(&_Reg->RI_SELECT_REG,"RI_SELECT_REG",Reg); break;
-			case 0x04700010: MoveVariableToX86reg(&_Reg->RI_REFRESH_REG,"RI_REFRESH_REG",Reg); break;
+			case 0x0470000C: MoveVariableToX86reg(&g_Reg->RI_SELECT_REG,"RI_SELECT_REG",Reg); break;
+			case 0x04700010: MoveVariableToX86reg(&g_Reg->RI_REFRESH_REG,"RI_REFRESH_REG",Reg); break;
 			default:
 				MoveConstToX86reg(0,Reg);
 				if (g_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { g_Notify->DisplayError(__FUNCTION__ "\nFailed to translate address: %X",VAddr); }
@@ -519,7 +519,7 @@ void  CMipsMemoryVM::Compile_LW (x86Reg Reg, DWORD VAddr ) {
 			break;
 		case 0x04800000:
 			switch (PAddr) {
-			case 0x04800018: MoveVariableToX86reg(&_Reg->SI_STATUS_REG,"SI_STATUS_REG",Reg); break;
+			case 0x04800018: MoveVariableToX86reg(&g_Reg->SI_STATUS_REG,"SI_STATUS_REG",Reg); break;
 			default:
 				MoveConstToX86reg(0,Reg);
 				if (g_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { g_Notify->DisplayError(__FUNCTION__ "\nFailed to translate address: %X",VAddr); }
@@ -672,16 +672,16 @@ void CMipsMemoryVM::Compile_SW_Const ( DWORD Value, DWORD VAddr ) {
 		break;
 	case 0x03F00000:
 		switch (PAddr) {
-		case 0x03F00000: MoveConstToVariable(Value,&_Reg->RDRAM_CONFIG_REG,"RDRAM_CONFIG_REG"); break;
-		case 0x03F00004: MoveConstToVariable(Value,&_Reg->RDRAM_DEVICE_ID_REG,"RDRAM_DEVICE_ID_REG"); break;
-		case 0x03F00008: MoveConstToVariable(Value,&_Reg->RDRAM_DELAY_REG,"RDRAM_DELAY_REG"); break;
-		case 0x03F0000C: MoveConstToVariable(Value,&_Reg->RDRAM_MODE_REG,"RDRAM_MODE_REG"); break;
-		case 0x03F00010: MoveConstToVariable(Value,&_Reg->RDRAM_REF_INTERVAL_REG,"RDRAM_REF_INTERVAL_REG"); break;
-		case 0x03F00014: MoveConstToVariable(Value,&_Reg->RDRAM_REF_ROW_REG,"RDRAM_REF_ROW_REG"); break;
-		case 0x03F00018: MoveConstToVariable(Value,&_Reg->RDRAM_RAS_INTERVAL_REG,"RDRAM_RAS_INTERVAL_REG"); break;
-		case 0x03F0001C: MoveConstToVariable(Value,&_Reg->RDRAM_MIN_INTERVAL_REG,"RDRAM_MIN_INTERVAL_REG"); break;
-		case 0x03F00020: MoveConstToVariable(Value,&_Reg->RDRAM_ADDR_SELECT_REG,"RDRAM_ADDR_SELECT_REG"); break;
-		case 0x03F00024: MoveConstToVariable(Value,&_Reg->RDRAM_DEVICE_MANUF_REG,"RDRAM_DEVICE_MANUF_REG"); break;
+		case 0x03F00000: MoveConstToVariable(Value,&g_Reg->RDRAM_CONFIG_REG,"RDRAM_CONFIG_REG"); break;
+		case 0x03F00004: MoveConstToVariable(Value,&g_Reg->RDRAM_DEVICE_ID_REG,"RDRAM_DEVICE_ID_REG"); break;
+		case 0x03F00008: MoveConstToVariable(Value,&g_Reg->RDRAM_DELAY_REG,"RDRAM_DELAY_REG"); break;
+		case 0x03F0000C: MoveConstToVariable(Value,&g_Reg->RDRAM_MODE_REG,"RDRAM_MODE_REG"); break;
+		case 0x03F00010: MoveConstToVariable(Value,&g_Reg->RDRAM_REF_INTERVAL_REG,"RDRAM_REF_INTERVAL_REG"); break;
+		case 0x03F00014: MoveConstToVariable(Value,&g_Reg->RDRAM_REF_ROW_REG,"RDRAM_REF_ROW_REG"); break;
+		case 0x03F00018: MoveConstToVariable(Value,&g_Reg->RDRAM_RAS_INTERVAL_REG,"RDRAM_RAS_INTERVAL_REG"); break;
+		case 0x03F0001C: MoveConstToVariable(Value,&g_Reg->RDRAM_MIN_INTERVAL_REG,"RDRAM_MIN_INTERVAL_REG"); break;
+		case 0x03F00020: MoveConstToVariable(Value,&g_Reg->RDRAM_ADDR_SELECT_REG,"RDRAM_ADDR_SELECT_REG"); break;
+		case 0x03F00024: MoveConstToVariable(Value,&g_Reg->RDRAM_DEVICE_MANUF_REG,"RDRAM_DEVICE_MANUF_REG"); break;
 		case 0x03F04004: break;
 		case 0x03F08004: break;
 		case 0x03F80004: break;
@@ -699,10 +699,10 @@ void CMipsMemoryVM::Compile_SW_Const ( DWORD Value, DWORD VAddr ) {
 			break;
 		}
 		switch (PAddr) {
-		case 0x04040000: MoveConstToVariable(Value,&_Reg->SP_MEM_ADDR_REG,"SP_MEM_ADDR_REG"); break;
-		case 0x04040004: MoveConstToVariable(Value,&_Reg->SP_DRAM_ADDR_REG,"SP_DRAM_ADDR_REG"); break;
+		case 0x04040000: MoveConstToVariable(Value,&g_Reg->SP_MEM_ADDR_REG,"SP_MEM_ADDR_REG"); break;
+		case 0x04040004: MoveConstToVariable(Value,&g_Reg->SP_DRAM_ADDR_REG,"SP_DRAM_ADDR_REG"); break;
 		case 0x04040008:
-			MoveConstToVariable(Value,&_Reg->SP_RD_LEN_REG,"SP_RD_LEN_REG");
+			MoveConstToVariable(Value,&g_Reg->SP_RD_LEN_REG,"SP_RD_LEN_REG");
 			BeforeCallDirect(m_RegWorkingSet);
 			MoveConstToX86reg((ULONG)((CDMA *)this),x86_ECX);
 			Call_Direct(AddressOf(&CDMA::SP_DMA_READ),"CDMA::SP_DMA_READ");
@@ -725,7 +725,7 @@ void CMipsMemoryVM::Compile_SW_Const ( DWORD Value, DWORD VAddr ) {
 				if ( ( Value & SP_CLR_SIG6 ) != 0 ) { ModValue |= SP_STATUS_SIG6; }
 				if ( ( Value & SP_CLR_SIG7 ) != 0 ) { ModValue |= SP_STATUS_SIG7; }
 				if (ModValue != 0) {
-					AndConstToVariable(~ModValue,&_Reg->SP_STATUS_REG,"SP_STATUS_REG");
+					AndConstToVariable(~ModValue,&g_Reg->SP_STATUS_REG,"SP_STATUS_REG");
 				}
 
 				ModValue = 0;
@@ -741,23 +741,23 @@ void CMipsMemoryVM::Compile_SW_Const ( DWORD Value, DWORD VAddr ) {
 				if ( ( Value & SP_SET_SIG6 ) != 0 ) { ModValue |= SP_STATUS_SIG6; }
 				if ( ( Value & SP_SET_SIG7 ) != 0 ) { ModValue |= SP_STATUS_SIG7; }
 				if (ModValue != 0) {
-					OrConstToVariable(ModValue,&_Reg->SP_STATUS_REG,"SP_STATUS_REG");
+					OrConstToVariable(ModValue,&g_Reg->SP_STATUS_REG,"SP_STATUS_REG");
 				}
 				if ( ( Value & SP_SET_SIG0 ) != 0 && RspAudioSignal() ) 
 				{ 
-					OrConstToVariable(MI_INTR_SP,&_Reg->MI_INTR_REG,"MI_INTR_REG");
+					OrConstToVariable(MI_INTR_SP,&g_Reg->MI_INTR_REG,"MI_INTR_REG");
 					BeforeCallDirect(m_RegWorkingSet);
-					MoveConstToX86reg((DWORD)_Reg,x86_ECX);
+					MoveConstToX86reg((DWORD)g_Reg,x86_ECX);
 					Call_Direct(AddressOf(&CRegisters::CheckInterrupts),"CRegisters::CheckInterrupts");
 					AfterCallDirect(m_RegWorkingSet);
 				}
 				if ( ( Value & SP_CLR_INTR ) != 0) { 
-					AndConstToVariable((DWORD)~MI_INTR_SP,&_Reg->MI_INTR_REG,"MI_INTR_REG");
-					AndConstToVariable((DWORD)~MI_INTR_SP,&_Reg->m_RspIntrReg,"m_RspIntrReg");
+					AndConstToVariable((DWORD)~MI_INTR_SP,&g_Reg->MI_INTR_REG,"MI_INTR_REG");
+					AndConstToVariable((DWORD)~MI_INTR_SP,&g_Reg->m_RspIntrReg,"m_RspIntrReg");
 					BeforeCallDirect(m_RegWorkingSet);
 					MoveConstToX86reg((DWORD)g_System,x86_ECX);
 					Call_Direct(AddressOf(&CN64System::RunRSP),"CN64System::RunRSP");
-					MoveConstToX86reg((DWORD)_Reg,x86_ECX);
+					MoveConstToX86reg((DWORD)g_Reg,x86_ECX);
 					Call_Direct(AddressOf(&CRegisters::CheckInterrupts),"CRegisters::CheckInterrupts");
 					AfterCallDirect(m_RegWorkingSet);
 				} else {
@@ -768,8 +768,8 @@ void CMipsMemoryVM::Compile_SW_Const ( DWORD Value, DWORD VAddr ) {
 				}
 			}
 			break;
-		case 0x0404001C: MoveConstToVariable(0,&_Reg->SP_SEMAPHORE_REG,"SP_SEMAPHORE_REG"); break;
-		case 0x04080000: MoveConstToVariable(Value & 0xFFC,&_Reg->SP_PC_REG,"SP_PC_REG"); break;
+		case 0x0404001C: MoveConstToVariable(0,&g_Reg->SP_SEMAPHORE_REG,"SP_SEMAPHORE_REG"); break;
+		case 0x04080000: MoveConstToVariable(Value & 0xFFC,&g_Reg->SP_PC_REG,"SP_PC_REG"); break;
 		default:
 			if (g_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { g_Notify->DisplayError("Compile_SW_Const\ntrying to store %X in %X?",Value,VAddr); }
 		}
@@ -784,7 +784,7 @@ void CMipsMemoryVM::Compile_SW_Const ( DWORD Value, DWORD VAddr ) {
 				if ( ( Value & MI_CLR_EBUS ) != 0 ) { ModValue |= MI_MODE_EBUS; }
 				if ( ( Value & MI_CLR_RDRAM ) != 0 ) { ModValue |= MI_MODE_RDRAM; }
 				if (ModValue != 0) {
-					AndConstToVariable(~ModValue,&_Reg->MI_MODE_REG,"MI_MODE_REG");
+					AndConstToVariable(~ModValue,&g_Reg->MI_MODE_REG,"MI_MODE_REG");
 				}
 
 				ModValue = (Value & 0x7F);
@@ -792,11 +792,11 @@ void CMipsMemoryVM::Compile_SW_Const ( DWORD Value, DWORD VAddr ) {
 				if ( ( Value & MI_SET_EBUS ) != 0 ) { ModValue |= MI_MODE_EBUS; }
 				if ( ( Value & MI_SET_RDRAM ) != 0 ) { ModValue |= MI_MODE_RDRAM; }
 				if (ModValue != 0) {
-					OrConstToVariable(ModValue,&_Reg->MI_MODE_REG,"MI_MODE_REG");
+					OrConstToVariable(ModValue,&g_Reg->MI_MODE_REG,"MI_MODE_REG");
 				}
 				if ( ( Value & MI_CLR_DP_INTR ) != 0 ) { 
-					AndConstToVariable((DWORD)~MI_INTR_DP,&_Reg->MI_INTR_REG,"MI_INTR_REG");
-					AndConstToVariable((DWORD)~MI_INTR_DP,&_Reg->m_GfxIntrReg,"m_GfxIntrReg");
+					AndConstToVariable((DWORD)~MI_INTR_DP,&g_Reg->MI_INTR_REG,"MI_INTR_REG");
+					AndConstToVariable((DWORD)~MI_INTR_DP,&g_Reg->m_GfxIntrReg,"m_GfxIntrReg");
 				}
 			}
 			break;
@@ -811,7 +811,7 @@ void CMipsMemoryVM::Compile_SW_Const ( DWORD Value, DWORD VAddr ) {
 				if ( ( Value & MI_INTR_MASK_CLR_PI ) != 0 ) { ModValue |= MI_INTR_MASK_PI; }
 				if ( ( Value & MI_INTR_MASK_CLR_DP ) != 0 ) { ModValue |= MI_INTR_MASK_DP; }
 				if (ModValue != 0) {
-					AndConstToVariable(~ModValue,&_Reg->MI_INTR_MASK_REG,"MI_INTR_MASK_REG");
+					AndConstToVariable(~ModValue,&g_Reg->MI_INTR_MASK_REG,"MI_INTR_MASK_REG");
 				}
 
 				ModValue = 0;
@@ -822,7 +822,7 @@ void CMipsMemoryVM::Compile_SW_Const ( DWORD Value, DWORD VAddr ) {
 				if ( ( Value & MI_INTR_MASK_SET_PI ) != 0 ) { ModValue |= MI_INTR_MASK_PI; }
 				if ( ( Value & MI_INTR_MASK_SET_DP ) != 0 ) { ModValue |= MI_INTR_MASK_DP; }
 				if (ModValue != 0) {
-					OrConstToVariable(ModValue,&_Reg->MI_INTR_MASK_REG,"MI_INTR_MASK_REG");
+					OrConstToVariable(ModValue,&g_Reg->MI_INTR_MASK_REG,"MI_INTR_MASK_REG");
 				}
 			}
 			break;
@@ -834,10 +834,10 @@ void CMipsMemoryVM::Compile_SW_Const ( DWORD Value, DWORD VAddr ) {
 		switch (PAddr) {
 		case 0x04400000: 
 			if (_Plugins->Gfx()->ViStatusChanged != NULL) {
-				CompConstToVariable(Value,&_Reg->VI_STATUS_REG,"VI_STATUS_REG");
+				CompConstToVariable(Value,&g_Reg->VI_STATUS_REG,"VI_STATUS_REG");
 				JeLabel8("Continue",0);
 				Jump = m_RecompPos - 1;
-				MoveConstToVariable(Value,&_Reg->VI_STATUS_REG,"VI_STATUS_REG");
+				MoveConstToVariable(Value,&g_Reg->VI_STATUS_REG,"VI_STATUS_REG");
 				BeforeCallDirect(m_RegWorkingSet);
 				Call_Direct(_Plugins->Gfx()->ViStatusChanged,"ViStatusChanged");
 				AfterCallDirect(m_RegWorkingSet);
@@ -846,13 +846,13 @@ void CMipsMemoryVM::Compile_SW_Const ( DWORD Value, DWORD VAddr ) {
 				SetJump8(Jump,m_RecompPos);
 			}
 			break;
-		case 0x04400004: MoveConstToVariable((Value & 0xFFFFFF),&_Reg->VI_ORIGIN_REG,"VI_ORIGIN_REG"); break;
+		case 0x04400004: MoveConstToVariable((Value & 0xFFFFFF),&g_Reg->VI_ORIGIN_REG,"VI_ORIGIN_REG"); break;
 		case 0x04400008: 
 			if (_Plugins->Gfx()->ViWidthChanged != NULL) {
-				CompConstToVariable(Value,&_Reg->VI_WIDTH_REG,"VI_WIDTH_REG");
+				CompConstToVariable(Value,&g_Reg->VI_WIDTH_REG,"VI_WIDTH_REG");
 				JeLabel8("Continue",0);
 				Jump = m_RecompPos - 1;
-				MoveConstToVariable(Value,&_Reg->VI_WIDTH_REG,"VI_WIDTH_REG");
+				MoveConstToVariable(Value,&g_Reg->VI_WIDTH_REG,"VI_WIDTH_REG");
 				BeforeCallDirect(m_RegWorkingSet);
 				Call_Direct(_Plugins->Gfx()->ViWidthChanged,"ViWidthChanged");
 				AfterCallDirect(m_RegWorkingSet);
@@ -861,32 +861,32 @@ void CMipsMemoryVM::Compile_SW_Const ( DWORD Value, DWORD VAddr ) {
 				SetJump8(Jump,m_RecompPos);
 			}
 			break;
-		case 0x0440000C: MoveConstToVariable(Value,&_Reg->VI_INTR_REG,"VI_INTR_REG"); break;
+		case 0x0440000C: MoveConstToVariable(Value,&g_Reg->VI_INTR_REG,"VI_INTR_REG"); break;
 		case 0x04400010: 
-			AndConstToVariable((DWORD)~MI_INTR_VI,&_Reg->MI_INTR_REG,"MI_INTR_REG");
+			AndConstToVariable((DWORD)~MI_INTR_VI,&g_Reg->MI_INTR_REG,"MI_INTR_REG");
 			BeforeCallDirect(m_RegWorkingSet);
-			MoveConstToX86reg((DWORD)_Reg,x86_ECX);
+			MoveConstToX86reg((DWORD)g_Reg,x86_ECX);
 			Call_Direct(AddressOf(&CRegisters::CheckInterrupts),"CRegisters::CheckInterrupts");
 			AfterCallDirect(m_RegWorkingSet);
 			break;
-		case 0x04400014: MoveConstToVariable(Value,&_Reg->VI_BURST_REG,"VI_BURST_REG"); break;
-		case 0x04400018: MoveConstToVariable(Value,&_Reg->VI_V_SYNC_REG,"VI_V_SYNC_REG"); break;
-		case 0x0440001C: MoveConstToVariable(Value,&_Reg->VI_H_SYNC_REG,"VI_H_SYNC_REG"); break;
-		case 0x04400020: MoveConstToVariable(Value,&_Reg->VI_LEAP_REG,"VI_LEAP_REG"); break;
-		case 0x04400024: MoveConstToVariable(Value,&_Reg->VI_H_START_REG,"VI_H_START_REG"); break;
-		case 0x04400028: MoveConstToVariable(Value,&_Reg->VI_V_START_REG,"VI_V_START_REG"); break;
-		case 0x0440002C: MoveConstToVariable(Value,&_Reg->VI_V_BURST_REG,"VI_V_BURST_REG"); break;
-		case 0x04400030: MoveConstToVariable(Value,&_Reg->VI_X_SCALE_REG,"VI_X_SCALE_REG"); break;
-		case 0x04400034: MoveConstToVariable(Value,&_Reg->VI_Y_SCALE_REG,"VI_Y_SCALE_REG"); break;
+		case 0x04400014: MoveConstToVariable(Value,&g_Reg->VI_BURST_REG,"VI_BURST_REG"); break;
+		case 0x04400018: MoveConstToVariable(Value,&g_Reg->VI_V_SYNC_REG,"VI_V_SYNC_REG"); break;
+		case 0x0440001C: MoveConstToVariable(Value,&g_Reg->VI_H_SYNC_REG,"VI_H_SYNC_REG"); break;
+		case 0x04400020: MoveConstToVariable(Value,&g_Reg->VI_LEAP_REG,"VI_LEAP_REG"); break;
+		case 0x04400024: MoveConstToVariable(Value,&g_Reg->VI_H_START_REG,"VI_H_START_REG"); break;
+		case 0x04400028: MoveConstToVariable(Value,&g_Reg->VI_V_START_REG,"VI_V_START_REG"); break;
+		case 0x0440002C: MoveConstToVariable(Value,&g_Reg->VI_V_BURST_REG,"VI_V_BURST_REG"); break;
+		case 0x04400030: MoveConstToVariable(Value,&g_Reg->VI_X_SCALE_REG,"VI_X_SCALE_REG"); break;
+		case 0x04400034: MoveConstToVariable(Value,&g_Reg->VI_Y_SCALE_REG,"VI_Y_SCALE_REG"); break;
 		default:
 			if (g_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { g_Notify->DisplayError("Compile_SW_Const\ntrying to store %X in %X?",Value,VAddr); }
 		}
 		break;
 	case 0x04500000: /* AI registers */
 		switch (PAddr) {
-		case 0x04500000: MoveConstToVariable(Value,&_Reg->AI_DRAM_ADDR_REG,"AI_DRAM_ADDR_REG"); break;
+		case 0x04500000: MoveConstToVariable(Value,&g_Reg->AI_DRAM_ADDR_REG,"AI_DRAM_ADDR_REG"); break;
 		case 0x04500004: 
-			MoveConstToVariable(Value,&_Reg->AI_LEN_REG,"AI_LEN_REG");
+			MoveConstToVariable(Value,&g_Reg->AI_LEN_REG,"AI_LEN_REG");
 			BeforeCallDirect(m_RegWorkingSet);
 			if (bFixedAudio())
 			{
@@ -898,16 +898,16 @@ void CMipsMemoryVM::Compile_SW_Const ( DWORD Value, DWORD VAddr ) {
 			}
 			AfterCallDirect(m_RegWorkingSet);
 			break;
-		case 0x04500008: MoveConstToVariable((Value & 1),&_Reg->AI_CONTROL_REG,"AI_CONTROL_REG"); break;
+		case 0x04500008: MoveConstToVariable((Value & 1),&g_Reg->AI_CONTROL_REG,"AI_CONTROL_REG"); break;
 		case 0x0450000C:
 			/* Clear Interrupt */; 
-			AndConstToVariable((DWORD)~MI_INTR_AI,&_Reg->MI_INTR_REG,"MI_INTR_REG");
+			AndConstToVariable((DWORD)~MI_INTR_AI,&g_Reg->MI_INTR_REG,"MI_INTR_REG");
 			if (!bFixedAudio())
 			{
-				AndConstToVariable((DWORD)~MI_INTR_AI,&_Reg->m_AudioIntrReg,"m_AudioIntrReg");
+				AndConstToVariable((DWORD)~MI_INTR_AI,&g_Reg->m_AudioIntrReg,"m_AudioIntrReg");
 			}
 			BeforeCallDirect(m_RegWorkingSet);
-			MoveConstToX86reg((DWORD)_Reg,x86_ECX);
+			MoveConstToX86reg((DWORD)g_Reg,x86_ECX);
 			Call_Direct(AddressOf(&CRegisters::CheckInterrupts),"CRegisters::CheckInterrupts");
 			AfterCallDirect(m_RegWorkingSet);
 			break;
@@ -915,7 +915,7 @@ void CMipsMemoryVM::Compile_SW_Const ( DWORD Value, DWORD VAddr ) {
 			sprintf(VarName,"m_RDRAM + %X",PAddr);
 			MoveConstToVariable(Value,PAddr + m_RDRAM,VarName); 
 			break;
-		case 0x04500014: MoveConstToVariable(Value,&_Reg->AI_BITRATE_REG,"AI_BITRATE_REG"); break;
+		case 0x04500014: MoveConstToVariable(Value,&g_Reg->AI_BITRATE_REG,"AI_BITRATE_REG"); break;
 		default:
 			sprintf(VarName,"m_RDRAM + %X",PAddr);
 			MoveConstToVariable(Value,PAddr + m_RDRAM,VarName); 
@@ -924,17 +924,17 @@ void CMipsMemoryVM::Compile_SW_Const ( DWORD Value, DWORD VAddr ) {
 		break;
 	case 0x04600000:
 		switch (PAddr) {
-		case 0x04600000: MoveConstToVariable(Value,&_Reg->PI_DRAM_ADDR_REG,"PI_DRAM_ADDR_REG"); break;
-		case 0x04600004: MoveConstToVariable(Value,&_Reg->PI_CART_ADDR_REG,"PI_CART_ADDR_REG"); break;
+		case 0x04600000: MoveConstToVariable(Value,&g_Reg->PI_DRAM_ADDR_REG,"PI_DRAM_ADDR_REG"); break;
+		case 0x04600004: MoveConstToVariable(Value,&g_Reg->PI_CART_ADDR_REG,"PI_CART_ADDR_REG"); break;
 		case 0x04600008: 
-			MoveConstToVariable(Value,&_Reg->PI_RD_LEN_REG,"PI_RD_LEN_REG");
+			MoveConstToVariable(Value,&g_Reg->PI_RD_LEN_REG,"PI_RD_LEN_REG");
 			BeforeCallDirect(m_RegWorkingSet);
 			MoveConstToX86reg((ULONG)((CDMA *)this),x86_ECX);
 			Call_Direct(AddressOf(&CDMA::PI_DMA_READ),"CDMA::PI_DMA_READ");
 			AfterCallDirect(m_RegWorkingSet);
 			break;
 		case 0x0460000C:
-			MoveConstToVariable(Value,&_Reg->PI_WR_LEN_REG,"PI_WR_LEN_REG");
+			MoveConstToVariable(Value,&g_Reg->PI_WR_LEN_REG,"PI_WR_LEN_REG");
 			BeforeCallDirect(m_RegWorkingSet);
 			MoveConstToX86reg((ULONG)((CDMA *)this),x86_ECX);
 			Call_Direct(AddressOf(&CDMA::PI_DMA_WRITE),"CDMA::PI_DMA_WRITE");
@@ -942,39 +942,39 @@ void CMipsMemoryVM::Compile_SW_Const ( DWORD Value, DWORD VAddr ) {
 			break;
 		case 0x04600010: 
 			if ((Value & PI_CLR_INTR) != 0 ) {
-				AndConstToVariable((DWORD)~MI_INTR_PI,&_Reg->MI_INTR_REG,"MI_INTR_REG");
+				AndConstToVariable((DWORD)~MI_INTR_PI,&g_Reg->MI_INTR_REG,"MI_INTR_REG");
 				BeforeCallDirect(m_RegWorkingSet);
-				MoveConstToX86reg((DWORD)_Reg,x86_ECX);
+				MoveConstToX86reg((DWORD)g_Reg,x86_ECX);
 				Call_Direct(AddressOf(&CRegisters::CheckInterrupts),"CRegisters::CheckInterrupts");
 				AfterCallDirect(m_RegWorkingSet);
 			}
 			break;
-		case 0x04600014: MoveConstToVariable((Value & 0xFF),&_Reg->PI_DOMAIN1_REG,"PI_DOMAIN1_REG"); break;
-		case 0x04600018: MoveConstToVariable((Value & 0xFF),&_Reg->PI_BSD_DOM1_PWD_REG,"PI_BSD_DOM1_PWD_REG"); break;
-		case 0x0460001C: MoveConstToVariable((Value & 0xFF),&_Reg->PI_BSD_DOM1_PGS_REG,"PI_BSD_DOM1_PGS_REG"); break;
-		case 0x04600020: MoveConstToVariable((Value & 0xFF),&_Reg->PI_BSD_DOM1_RLS_REG,"PI_BSD_DOM1_RLS_REG"); break;
+		case 0x04600014: MoveConstToVariable((Value & 0xFF),&g_Reg->PI_DOMAIN1_REG,"PI_DOMAIN1_REG"); break;
+		case 0x04600018: MoveConstToVariable((Value & 0xFF),&g_Reg->PI_BSD_DOM1_PWD_REG,"PI_BSD_DOM1_PWD_REG"); break;
+		case 0x0460001C: MoveConstToVariable((Value & 0xFF),&g_Reg->PI_BSD_DOM1_PGS_REG,"PI_BSD_DOM1_PGS_REG"); break;
+		case 0x04600020: MoveConstToVariable((Value & 0xFF),&g_Reg->PI_BSD_DOM1_RLS_REG,"PI_BSD_DOM1_RLS_REG"); break;
 		default:
 			if (g_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { g_Notify->DisplayError("Compile_SW_Const\ntrying to store %X in %X?",Value,VAddr); }
 		}
 		break;
 	case 0x04700000:
 		switch (PAddr) {
-		case 0x04700000: MoveConstToVariable(Value,&_Reg->RI_MODE_REG,"RI_MODE_REG"); break;
-		case 0x04700004: MoveConstToVariable(Value,&_Reg->RI_CONFIG_REG,"RI_CONFIG_REG"); break;
-		case 0x04700008: MoveConstToVariable(Value,&_Reg->RI_CURRENT_LOAD_REG,"RI_CURRENT_LOAD_REG"); break;
-		case 0x0470000C: MoveConstToVariable(Value,&_Reg->RI_SELECT_REG,"RI_SELECT_REG"); break;
+		case 0x04700000: MoveConstToVariable(Value,&g_Reg->RI_MODE_REG,"RI_MODE_REG"); break;
+		case 0x04700004: MoveConstToVariable(Value,&g_Reg->RI_CONFIG_REG,"RI_CONFIG_REG"); break;
+		case 0x04700008: MoveConstToVariable(Value,&g_Reg->RI_CURRENT_LOAD_REG,"RI_CURRENT_LOAD_REG"); break;
+		case 0x0470000C: MoveConstToVariable(Value,&g_Reg->RI_SELECT_REG,"RI_SELECT_REG"); break;
 		default:
 			if (g_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { g_Notify->DisplayError("Compile_SW_Const\ntrying to store %X in %X?",Value,VAddr); }
 		}
 		break;
 	case 0x04800000:
 		switch (PAddr) {
-		case 0x04800000: MoveConstToVariable(Value,&_Reg->SI_DRAM_ADDR_REG,"SI_DRAM_ADDR_REG"); break;
+		case 0x04800000: MoveConstToVariable(Value,&g_Reg->SI_DRAM_ADDR_REG,"SI_DRAM_ADDR_REG"); break;
 		case 0x04800004: 			
 			m_RegWorkingSet.SetBlockCycleCount(m_RegWorkingSet.GetBlockCycleCount() - CountPerOp());
 			UpdateCounters(m_RegWorkingSet,false, true);
 			m_RegWorkingSet.SetBlockCycleCount(m_RegWorkingSet.GetBlockCycleCount() + CountPerOp());
-			MoveConstToVariable(Value,&_Reg->SI_PIF_ADDR_RD64B_REG,"SI_PIF_ADDR_RD64B_REG");		
+			MoveConstToVariable(Value,&g_Reg->SI_PIF_ADDR_RD64B_REG,"SI_PIF_ADDR_RD64B_REG");		
 			BeforeCallDirect(m_RegWorkingSet);
 			MoveConstToX86reg((DWORD)((CPifRam *)this),x86_ECX);
 			Call_Direct(AddressOf(&CPifRam::SI_DMA_READ),"CPifRam::SI_DMA_READ");
@@ -984,17 +984,17 @@ void CMipsMemoryVM::Compile_SW_Const ( DWORD Value, DWORD VAddr ) {
 			m_RegWorkingSet.SetBlockCycleCount(m_RegWorkingSet.GetBlockCycleCount() - CountPerOp());
 			UpdateCounters(m_RegWorkingSet,false, true);
 			m_RegWorkingSet.SetBlockCycleCount(m_RegWorkingSet.GetBlockCycleCount() + CountPerOp());
-			MoveConstToVariable(Value,&_Reg->SI_PIF_ADDR_WR64B_REG,"SI_PIF_ADDR_WR64B_REG");
+			MoveConstToVariable(Value,&g_Reg->SI_PIF_ADDR_WR64B_REG,"SI_PIF_ADDR_WR64B_REG");
 			BeforeCallDirect(m_RegWorkingSet);
 			MoveConstToX86reg((DWORD)((CPifRam *)this),x86_ECX);
 			Call_Direct(AddressOf(&CPifRam::SI_DMA_WRITE),"CPifRam::SI_DMA_WRITE");
 			AfterCallDirect(m_RegWorkingSet);
 			break;
 		case 0x04800018: 
-			AndConstToVariable((DWORD)~MI_INTR_SI,&_Reg->MI_INTR_REG,"MI_INTR_REG");
-			AndConstToVariable((DWORD)~SI_STATUS_INTERRUPT,&_Reg->SI_STATUS_REG,"SI_STATUS_REG");
+			AndConstToVariable((DWORD)~MI_INTR_SI,&g_Reg->MI_INTR_REG,"MI_INTR_REG");
+			AndConstToVariable((DWORD)~SI_STATUS_INTERRUPT,&g_Reg->SI_STATUS_REG,"SI_STATUS_REG");
 			BeforeCallDirect(m_RegWorkingSet);
-			MoveConstToX86reg((DWORD)_Reg,x86_ECX);
+			MoveConstToX86reg((DWORD)g_Reg,x86_ECX);
 			Call_Direct(AddressOf(&CRegisters::CheckInterrupts),"CRegisters::CheckInterrupts");
 			AfterCallDirect(m_RegWorkingSet);
 			break;
@@ -1033,17 +1033,17 @@ void CMipsMemoryVM::Compile_SW_Register (x86Reg Reg, DWORD VAddr )
 		break;
 	case 0x04000000: 
 		switch (PAddr) {
-		case 0x04040000: MoveX86regToVariable(Reg,&_Reg->SP_MEM_ADDR_REG,"SP_MEM_ADDR_REG"); break;
-		case 0x04040004: MoveX86regToVariable(Reg,&_Reg->SP_DRAM_ADDR_REG,"SP_DRAM_ADDR_REG"); break;
+		case 0x04040000: MoveX86regToVariable(Reg,&g_Reg->SP_MEM_ADDR_REG,"SP_MEM_ADDR_REG"); break;
+		case 0x04040004: MoveX86regToVariable(Reg,&g_Reg->SP_DRAM_ADDR_REG,"SP_DRAM_ADDR_REG"); break;
 		case 0x04040008: 
-			MoveX86regToVariable(Reg,&_Reg->SP_RD_LEN_REG,"SP_RD_LEN_REG");
+			MoveX86regToVariable(Reg,&g_Reg->SP_RD_LEN_REG,"SP_RD_LEN_REG");
 			BeforeCallDirect(m_RegWorkingSet);
 			MoveConstToX86reg((ULONG)((CDMA *)this),x86_ECX);
 			Call_Direct(AddressOf(&CDMA::SP_DMA_READ),"CDMA::SP_DMA_READ");
 			AfterCallDirect(m_RegWorkingSet);
 			break;
 		case 0x0404000C: 
-			MoveX86regToVariable(Reg,&_Reg->SP_WR_LEN_REG,"SP_WR_LEN_REG");
+			MoveX86regToVariable(Reg,&g_Reg->SP_WR_LEN_REG,"SP_WR_LEN_REG");
 			BeforeCallDirect(m_RegWorkingSet);
 			MoveConstToX86reg((ULONG)((CDMA *)this),x86_ECX);
 			Call_Direct(AddressOf(&CDMA::SP_DMA_WRITE),"CDMA::SP_DMA_WRITE");
@@ -1058,10 +1058,10 @@ void CMipsMemoryVM::Compile_SW_Register (x86Reg Reg, DWORD VAddr )
 			Call_Direct(ChangeSpStatus,"ChangeSpStatus");
 			AfterCallDirect(m_RegWorkingSet);
 			break;
-		case 0x0404001C: MoveConstToVariable(0,&_Reg->SP_SEMAPHORE_REG,"SP_SEMAPHORE_REG"); break;
+		case 0x0404001C: MoveConstToVariable(0,&g_Reg->SP_SEMAPHORE_REG,"SP_SEMAPHORE_REG"); break;
 		case 0x04080000: 
-			MoveX86regToVariable(Reg,&_Reg->SP_PC_REG,"SP_PC_REG");
-			AndConstToVariable(0xFFC,&_Reg->SP_PC_REG,"SP_PC_REG");
+			MoveX86regToVariable(Reg,&g_Reg->SP_PC_REG,"SP_PC_REG");
+			AndConstToVariable(0xFFC,&g_Reg->SP_PC_REG,"SP_PC_REG");
 			break;
 		default:
 			if (PAddr < 0x04002000) {
@@ -1110,10 +1110,10 @@ void CMipsMemoryVM::Compile_SW_Register (x86Reg Reg, DWORD VAddr )
 		switch (PAddr) {
 		case 0x04400000: 
 			if (_Plugins->Gfx()->ViStatusChanged != NULL) {
-				CompX86regToVariable(Reg,&_Reg->VI_STATUS_REG,"VI_STATUS_REG");
+				CompX86regToVariable(Reg,&g_Reg->VI_STATUS_REG,"VI_STATUS_REG");
 				JeLabel8("Continue",0);
 				Jump = m_RecompPos - 1;
-				MoveX86regToVariable(Reg,&_Reg->VI_STATUS_REG,"VI_STATUS_REG");
+				MoveX86regToVariable(Reg,&g_Reg->VI_STATUS_REG,"VI_STATUS_REG");
 				BeforeCallDirect(m_RegWorkingSet);
 				Call_Direct(_Plugins->Gfx()->ViStatusChanged,"ViStatusChanged");
 				AfterCallDirect(m_RegWorkingSet);
@@ -1123,15 +1123,15 @@ void CMipsMemoryVM::Compile_SW_Register (x86Reg Reg, DWORD VAddr )
 			}
 			break;
 		case 0x04400004: 
-			MoveX86regToVariable(Reg,&_Reg->VI_ORIGIN_REG,"VI_ORIGIN_REG"); 
-			AndConstToVariable(0xFFFFFF,&_Reg->VI_ORIGIN_REG,"VI_ORIGIN_REG"); 
+			MoveX86regToVariable(Reg,&g_Reg->VI_ORIGIN_REG,"VI_ORIGIN_REG"); 
+			AndConstToVariable(0xFFFFFF,&g_Reg->VI_ORIGIN_REG,"VI_ORIGIN_REG"); 
 			break;
 		case 0x04400008: 
 			if (_Plugins->Gfx()->ViWidthChanged != NULL) {
-				CompX86regToVariable(Reg,&_Reg->VI_WIDTH_REG,"VI_WIDTH_REG");
+				CompX86regToVariable(Reg,&g_Reg->VI_WIDTH_REG,"VI_WIDTH_REG");
 				JeLabel8("Continue",0);
 				Jump = m_RecompPos - 1;
-				MoveX86regToVariable(Reg,&_Reg->VI_WIDTH_REG,"VI_WIDTH_REG");
+				MoveX86regToVariable(Reg,&g_Reg->VI_WIDTH_REG,"VI_WIDTH_REG");
 				BeforeCallDirect(m_RegWorkingSet);
 				Call_Direct(_Plugins->Gfx()->ViWidthChanged,"ViWidthChanged");
 				AfterCallDirect(m_RegWorkingSet);
@@ -1140,23 +1140,23 @@ void CMipsMemoryVM::Compile_SW_Register (x86Reg Reg, DWORD VAddr )
 				SetJump8(Jump,m_RecompPos);
 			}
 			break;
-		case 0x0440000C: MoveX86regToVariable(Reg,&_Reg->VI_INTR_REG,"VI_INTR_REG"); break;
+		case 0x0440000C: MoveX86regToVariable(Reg,&g_Reg->VI_INTR_REG,"VI_INTR_REG"); break;
 		case 0x04400010: 
-			AndConstToVariable((DWORD)~MI_INTR_VI,&_Reg->MI_INTR_REG,"MI_INTR_REG");
+			AndConstToVariable((DWORD)~MI_INTR_VI,&g_Reg->MI_INTR_REG,"MI_INTR_REG");
 			BeforeCallDirect(m_RegWorkingSet);
-			MoveConstToX86reg((DWORD)_Reg,x86_ECX);
+			MoveConstToX86reg((DWORD)g_Reg,x86_ECX);
 			Call_Direct(AddressOf(&CRegisters::CheckInterrupts),"CRegisters::CheckInterrupts");
 			AfterCallDirect(m_RegWorkingSet);
 			break;
-		case 0x04400014: MoveX86regToVariable(Reg,&_Reg->VI_BURST_REG,"VI_BURST_REG"); break;
-		case 0x04400018: MoveX86regToVariable(Reg,&_Reg->VI_V_SYNC_REG,"VI_V_SYNC_REG"); break;
-		case 0x0440001C: MoveX86regToVariable(Reg,&_Reg->VI_H_SYNC_REG,"VI_H_SYNC_REG"); break;
-		case 0x04400020: MoveX86regToVariable(Reg,&_Reg->VI_LEAP_REG,"VI_LEAP_REG"); break;
-		case 0x04400024: MoveX86regToVariable(Reg,&_Reg->VI_H_START_REG,"VI_H_START_REG"); break;
-		case 0x04400028: MoveX86regToVariable(Reg,&_Reg->VI_V_START_REG,"VI_V_START_REG"); break;
-		case 0x0440002C: MoveX86regToVariable(Reg,&_Reg->VI_V_BURST_REG,"VI_V_BURST_REG"); break;
-		case 0x04400030: MoveX86regToVariable(Reg,&_Reg->VI_X_SCALE_REG,"VI_X_SCALE_REG"); break;
-		case 0x04400034: MoveX86regToVariable(Reg,&_Reg->VI_Y_SCALE_REG,"VI_Y_SCALE_REG"); break;
+		case 0x04400014: MoveX86regToVariable(Reg,&g_Reg->VI_BURST_REG,"VI_BURST_REG"); break;
+		case 0x04400018: MoveX86regToVariable(Reg,&g_Reg->VI_V_SYNC_REG,"VI_V_SYNC_REG"); break;
+		case 0x0440001C: MoveX86regToVariable(Reg,&g_Reg->VI_H_SYNC_REG,"VI_H_SYNC_REG"); break;
+		case 0x04400020: MoveX86regToVariable(Reg,&g_Reg->VI_LEAP_REG,"VI_LEAP_REG"); break;
+		case 0x04400024: MoveX86regToVariable(Reg,&g_Reg->VI_H_START_REG,"VI_H_START_REG"); break;
+		case 0x04400028: MoveX86regToVariable(Reg,&g_Reg->VI_V_START_REG,"VI_V_START_REG"); break;
+		case 0x0440002C: MoveX86regToVariable(Reg,&g_Reg->VI_V_BURST_REG,"VI_V_BURST_REG"); break;
+		case 0x04400030: MoveX86regToVariable(Reg,&g_Reg->VI_X_SCALE_REG,"VI_X_SCALE_REG"); break;
+		case 0x04400034: MoveX86regToVariable(Reg,&g_Reg->VI_Y_SCALE_REG,"VI_Y_SCALE_REG"); break;
 		default:
 			CPU_Message("    Should be moving %s in to %X ?!?",x86_Name(Reg),VAddr);
 			if (g_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { g_Notify->DisplayError("Compile_SW_Register\ntrying to store at %X?",VAddr); }
@@ -1164,12 +1164,12 @@ void CMipsMemoryVM::Compile_SW_Register (x86Reg Reg, DWORD VAddr )
 		break;
 	case 0x04500000: /* AI registers */
 		switch (PAddr) {
-		case 0x04500000: MoveX86regToVariable(Reg,&_Reg->AI_DRAM_ADDR_REG,"AI_DRAM_ADDR_REG"); break;
+		case 0x04500000: MoveX86regToVariable(Reg,&g_Reg->AI_DRAM_ADDR_REG,"AI_DRAM_ADDR_REG"); break;
 		case 0x04500004: 
 			m_RegWorkingSet.SetBlockCycleCount(m_RegWorkingSet.GetBlockCycleCount() - CountPerOp());
 			UpdateCounters(m_RegWorkingSet,false, true);
 			m_RegWorkingSet.SetBlockCycleCount(m_RegWorkingSet.GetBlockCycleCount() + CountPerOp());
-			MoveX86regToVariable(Reg,&_Reg->AI_LEN_REG,"AI_LEN_REG");
+			MoveX86regToVariable(Reg,&g_Reg->AI_LEN_REG,"AI_LEN_REG");
 			BeforeCallDirect(m_RegWorkingSet);
 			if (bFixedAudio())
 			{
@@ -1181,17 +1181,17 @@ void CMipsMemoryVM::Compile_SW_Register (x86Reg Reg, DWORD VAddr )
 			AfterCallDirect(m_RegWorkingSet);
 			break;
 		case 0x04500008: 
-			MoveX86regToVariable(Reg,&_Reg->AI_CONTROL_REG,"AI_CONTROL_REG");
-			AndConstToVariable(1,&_Reg->AI_CONTROL_REG,"AI_CONTROL_REG");
+			MoveX86regToVariable(Reg,&g_Reg->AI_CONTROL_REG,"AI_CONTROL_REG");
+			AndConstToVariable(1,&g_Reg->AI_CONTROL_REG,"AI_CONTROL_REG");
 		case 0x0450000C:
 			/* Clear Interrupt */; 
-			AndConstToVariable((DWORD)~MI_INTR_AI,&_Reg->MI_INTR_REG,"MI_INTR_REG");
+			AndConstToVariable((DWORD)~MI_INTR_AI,&g_Reg->MI_INTR_REG,"MI_INTR_REG");
 			if (!bFixedAudio())
 			{
-				AndConstToVariable((DWORD)~MI_INTR_AI,&_Reg->m_AudioIntrReg,"m_AudioIntrReg");
+				AndConstToVariable((DWORD)~MI_INTR_AI,&g_Reg->m_AudioIntrReg,"m_AudioIntrReg");
 			}
 			BeforeCallDirect(m_RegWorkingSet);
-			MoveConstToX86reg((DWORD)_Reg,x86_ECX);
+			MoveConstToX86reg((DWORD)g_Reg,x86_ECX);
 			Call_Direct(AddressOf(&CRegisters::CheckInterrupts),"CRegisters::CheckInterrupts");
 			AfterCallDirect(m_RegWorkingSet);
 			break;
@@ -1199,7 +1199,7 @@ void CMipsMemoryVM::Compile_SW_Register (x86Reg Reg, DWORD VAddr )
 			sprintf(VarName,"m_RDRAM + %X",PAddr);
 			MoveX86regToVariable(Reg,PAddr + m_RDRAM,VarName); 
 			break;
-		case 0x04500014: MoveX86regToVariable(Reg,&_Reg->AI_BITRATE_REG,"AI_BITRATE_REG"); break;
+		case 0x04500014: MoveX86regToVariable(Reg,&g_Reg->AI_BITRATE_REG,"AI_BITRATE_REG"); break;
 		default:
 			sprintf(VarName,"m_RDRAM + %X",PAddr);
 			MoveX86regToVariable(Reg,PAddr + m_RDRAM,VarName); 
@@ -1207,17 +1207,17 @@ void CMipsMemoryVM::Compile_SW_Register (x86Reg Reg, DWORD VAddr )
 		break;
 	case 0x04600000:
 		switch (PAddr) {
-		case 0x04600000: MoveX86regToVariable(Reg,&_Reg->PI_DRAM_ADDR_REG,"PI_DRAM_ADDR_REG"); break;
-		case 0x04600004: MoveX86regToVariable(Reg,&_Reg->PI_CART_ADDR_REG,"PI_CART_ADDR_REG"); break;
+		case 0x04600000: MoveX86regToVariable(Reg,&g_Reg->PI_DRAM_ADDR_REG,"PI_DRAM_ADDR_REG"); break;
+		case 0x04600004: MoveX86regToVariable(Reg,&g_Reg->PI_CART_ADDR_REG,"PI_CART_ADDR_REG"); break;
 		case 0x04600008:
-			MoveX86regToVariable(Reg,&_Reg->PI_RD_LEN_REG,"PI_RD_LEN_REG");
+			MoveX86regToVariable(Reg,&g_Reg->PI_RD_LEN_REG,"PI_RD_LEN_REG");
 			BeforeCallDirect(m_RegWorkingSet);
 			MoveConstToX86reg((ULONG)((CDMA *)this),x86_ECX);
 			Call_Direct(AddressOf(&CDMA::PI_DMA_READ),"CDMA::PI_DMA_READ");
 			AfterCallDirect(m_RegWorkingSet);
 			break;
 		case 0x0460000C:
-			MoveX86regToVariable(Reg,&_Reg->PI_WR_LEN_REG,"PI_WR_LEN_REG");
+			MoveX86regToVariable(Reg,&g_Reg->PI_WR_LEN_REG,"PI_WR_LEN_REG");
 			BeforeCallDirect(m_RegWorkingSet);
 			MoveConstToX86reg((ULONG)((CDMA *)this),x86_ECX);
 			Call_Direct(AddressOf(&CDMA::PI_DMA_WRITE),"CDMA::PI_DMA_WRITE");
@@ -1225,29 +1225,29 @@ void CMipsMemoryVM::Compile_SW_Register (x86Reg Reg, DWORD VAddr )
 			break;
 		case 0x04600010: 
 			if (g_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { g_Notify->DisplayError("Compile_SW_Register\ntrying to store at %X?",VAddr); }
-			AndConstToVariable((DWORD)~MI_INTR_PI,&_Reg->MI_INTR_REG,"MI_INTR_REG");
+			AndConstToVariable((DWORD)~MI_INTR_PI,&g_Reg->MI_INTR_REG,"MI_INTR_REG");
 			BeforeCallDirect(m_RegWorkingSet);
-			MoveConstToX86reg((DWORD)_Reg,x86_ECX);
+			MoveConstToX86reg((DWORD)g_Reg,x86_ECX);
 			Call_Direct(AddressOf(&CRegisters::CheckInterrupts),"CRegisters::CheckInterrupts");
 			AfterCallDirect(m_RegWorkingSet);
 			break;
-			MoveX86regToVariable(Reg,&_Reg->VI_ORIGIN_REG,"VI_ORIGIN_REG"); 
-			AndConstToVariable(0xFFFFFF,&_Reg->VI_ORIGIN_REG,"VI_ORIGIN_REG"); 
+			MoveX86regToVariable(Reg,&g_Reg->VI_ORIGIN_REG,"VI_ORIGIN_REG"); 
+			AndConstToVariable(0xFFFFFF,&g_Reg->VI_ORIGIN_REG,"VI_ORIGIN_REG"); 
 		case 0x04600014: 
-			MoveX86regToVariable(Reg,&_Reg->PI_DOMAIN1_REG,"PI_DOMAIN1_REG");
-			AndConstToVariable(0xFF,&_Reg->PI_DOMAIN1_REG,"PI_DOMAIN1_REG"); 
+			MoveX86regToVariable(Reg,&g_Reg->PI_DOMAIN1_REG,"PI_DOMAIN1_REG");
+			AndConstToVariable(0xFF,&g_Reg->PI_DOMAIN1_REG,"PI_DOMAIN1_REG"); 
 			break;
 		case 0x04600018: 
-			MoveX86regToVariable(Reg,&_Reg->PI_BSD_DOM1_PWD_REG,"PI_BSD_DOM1_PWD_REG"); 
-			AndConstToVariable(0xFF,&_Reg->PI_BSD_DOM1_PWD_REG,"PI_BSD_DOM1_PWD_REG"); 
+			MoveX86regToVariable(Reg,&g_Reg->PI_BSD_DOM1_PWD_REG,"PI_BSD_DOM1_PWD_REG"); 
+			AndConstToVariable(0xFF,&g_Reg->PI_BSD_DOM1_PWD_REG,"PI_BSD_DOM1_PWD_REG"); 
 			break;
 		case 0x0460001C: 
-			MoveX86regToVariable(Reg,&_Reg->PI_BSD_DOM1_PGS_REG,"PI_BSD_DOM1_PGS_REG"); 
-			AndConstToVariable(0xFF,&_Reg->PI_BSD_DOM1_PGS_REG,"PI_BSD_DOM1_PGS_REG"); 
+			MoveX86regToVariable(Reg,&g_Reg->PI_BSD_DOM1_PGS_REG,"PI_BSD_DOM1_PGS_REG"); 
+			AndConstToVariable(0xFF,&g_Reg->PI_BSD_DOM1_PGS_REG,"PI_BSD_DOM1_PGS_REG"); 
 			break;
 		case 0x04600020: 
-			MoveX86regToVariable(Reg,&_Reg->PI_BSD_DOM1_RLS_REG,"PI_BSD_DOM1_RLS_REG"); 
-			AndConstToVariable(0xFF,&_Reg->PI_BSD_DOM1_RLS_REG,"PI_BSD_DOM1_RLS_REG"); 
+			MoveX86regToVariable(Reg,&g_Reg->PI_BSD_DOM1_RLS_REG,"PI_BSD_DOM1_RLS_REG"); 
+			AndConstToVariable(0xFF,&g_Reg->PI_BSD_DOM1_RLS_REG,"PI_BSD_DOM1_RLS_REG"); 
 			break;
 		default:
 			CPU_Message("    Should be moving %s in to %X ?!?",x86_Name(Reg),VAddr);
@@ -1256,33 +1256,33 @@ void CMipsMemoryVM::Compile_SW_Register (x86Reg Reg, DWORD VAddr )
 		break;
 	case 0x04700000:
 		switch (PAddr) {
-		case 0x04700010: MoveX86regToVariable(Reg,&_Reg->RI_REFRESH_REG,"RI_REFRESH_REG"); break;
+		case 0x04700010: MoveX86regToVariable(Reg,&g_Reg->RI_REFRESH_REG,"RI_REFRESH_REG"); break;
 		default:
 			if (g_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { g_Notify->DisplayError("Compile_SW_Register\ntrying to store at %X?",VAddr); }
 		}
 		break;
 	case 0x04800000:
 		switch (PAddr) {
-		case 0x04800000: MoveX86regToVariable(Reg,&_Reg->SI_DRAM_ADDR_REG,"SI_DRAM_ADDR_REG"); break;
+		case 0x04800000: MoveX86regToVariable(Reg,&g_Reg->SI_DRAM_ADDR_REG,"SI_DRAM_ADDR_REG"); break;
 		case 0x04800004: 
-			MoveX86regToVariable(Reg,&_Reg->SI_PIF_ADDR_RD64B_REG,"SI_PIF_ADDR_RD64B_REG"); 
+			MoveX86regToVariable(Reg,&g_Reg->SI_PIF_ADDR_RD64B_REG,"SI_PIF_ADDR_RD64B_REG"); 
 			BeforeCallDirect(m_RegWorkingSet);
 			MoveConstToX86reg((DWORD)((CPifRam *)this),x86_ECX);
 			Call_Direct(AddressOf(&CPifRam::SI_DMA_READ),"CPifRam::SI_DMA_READ");
 			AfterCallDirect(m_RegWorkingSet);
 			break;
 		case 0x04800010: 
-			MoveX86regToVariable(Reg,&_Reg->SI_PIF_ADDR_WR64B_REG,"SI_PIF_ADDR_WR64B_REG"); 
+			MoveX86regToVariable(Reg,&g_Reg->SI_PIF_ADDR_WR64B_REG,"SI_PIF_ADDR_WR64B_REG"); 
 			BeforeCallDirect(m_RegWorkingSet);
 			MoveConstToX86reg((DWORD)((CPifRam *)this),x86_ECX);
 			Call_Direct(AddressOf(&CPifRam::SI_DMA_WRITE),"CPifRam::SI_DMA_WRITE");
 			AfterCallDirect(m_RegWorkingSet);
 			break;
 		case 0x04800018: 
-			AndConstToVariable((DWORD)~MI_INTR_SI,&_Reg->MI_INTR_REG,"MI_INTR_REG");
-			AndConstToVariable((DWORD)~SI_STATUS_INTERRUPT,&_Reg->SI_STATUS_REG,"SI_STATUS_REG");
+			AndConstToVariable((DWORD)~MI_INTR_SI,&g_Reg->MI_INTR_REG,"MI_INTR_REG");
+			AndConstToVariable((DWORD)~SI_STATUS_INTERRUPT,&g_Reg->SI_STATUS_REG,"SI_STATUS_REG");
 			BeforeCallDirect(m_RegWorkingSet);
-			MoveConstToX86reg((DWORD)_Reg,x86_ECX);
+			MoveConstToX86reg((DWORD)g_Reg,x86_ECX);
 			Call_Direct(AddressOf(&CRegisters::CheckInterrupts),"CRegisters::CheckInterrupts");
 			AfterCallDirect(m_RegWorkingSet);
 			break;
@@ -1718,16 +1718,16 @@ int CMipsMemoryVM::LW_NonMemory ( DWORD PAddr, DWORD * Value ) {
 	switch (PAddr & 0xFFF00000) {
 	case 0x03F00000:
 		switch (PAddr) {
-		case 0x03F00000: * Value = _Reg->RDRAM_CONFIG_REG; break;
-		case 0x03F00004: * Value = _Reg->RDRAM_DEVICE_ID_REG; break;
-		case 0x03F00008: * Value = _Reg->RDRAM_DELAY_REG; break;
-		case 0x03F0000C: * Value = _Reg->RDRAM_MODE_REG; break;
-		case 0x03F00010: * Value = _Reg->RDRAM_REF_INTERVAL_REG; break;
-		case 0x03F00014: * Value = _Reg->RDRAM_REF_ROW_REG; break;
-		case 0x03F00018: * Value = _Reg->RDRAM_RAS_INTERVAL_REG; break;
-		case 0x03F0001C: * Value = _Reg->RDRAM_MIN_INTERVAL_REG; break;
-		case 0x03F00020: * Value = _Reg->RDRAM_ADDR_SELECT_REG; break;
-		case 0x03F00024: * Value = _Reg->RDRAM_DEVICE_MANUF_REG; break;	
+		case 0x03F00000: * Value = g_Reg->RDRAM_CONFIG_REG; break;
+		case 0x03F00004: * Value = g_Reg->RDRAM_DEVICE_ID_REG; break;
+		case 0x03F00008: * Value = g_Reg->RDRAM_DELAY_REG; break;
+		case 0x03F0000C: * Value = g_Reg->RDRAM_MODE_REG; break;
+		case 0x03F00010: * Value = g_Reg->RDRAM_REF_INTERVAL_REG; break;
+		case 0x03F00014: * Value = g_Reg->RDRAM_REF_ROW_REG; break;
+		case 0x03F00018: * Value = g_Reg->RDRAM_RAS_INTERVAL_REG; break;
+		case 0x03F0001C: * Value = g_Reg->RDRAM_MIN_INTERVAL_REG; break;
+		case 0x03F00020: * Value = g_Reg->RDRAM_ADDR_SELECT_REG; break;
+		case 0x03F00024: * Value = g_Reg->RDRAM_DEVICE_MANUF_REG; break;	
 		default:
 			* Value = 0;
 			return FALSE;
@@ -1735,10 +1735,10 @@ int CMipsMemoryVM::LW_NonMemory ( DWORD PAddr, DWORD * Value ) {
 		break;
 	case 0x04000000:
 		switch (PAddr) {
-		case 0x04040010: *Value = _Reg->SP_STATUS_REG; break;
-		case 0x04040014: *Value = _Reg->SP_DMA_FULL_REG; break;
-		case 0x04040018: *Value = _Reg->SP_DMA_BUSY_REG; break;
-		case 0x04080000: *Value = _Reg->SP_PC_REG; break;
+		case 0x04040010: *Value = g_Reg->SP_STATUS_REG; break;
+		case 0x04040014: *Value = g_Reg->SP_DMA_FULL_REG; break;
+		case 0x04040018: *Value = g_Reg->SP_DMA_BUSY_REG; break;
+		case 0x04080000: *Value = g_Reg->SP_PC_REG; break;
 		default:
 			* Value = 0;
 			return FALSE;
@@ -1746,11 +1746,11 @@ int CMipsMemoryVM::LW_NonMemory ( DWORD PAddr, DWORD * Value ) {
 		break;
 	case 0x04100000:
 		switch (PAddr) {
-		case 0x0410000C: *Value = _Reg->DPC_STATUS_REG; break;
-		case 0x04100010: *Value = _Reg->DPC_CLOCK_REG; break;
-		case 0x04100014: *Value = _Reg->DPC_BUFBUSY_REG; break;
-		case 0x04100018: *Value = _Reg->DPC_PIPEBUSY_REG; break;
-		case 0x0410001C: *Value = _Reg->DPC_TMEM_REG; break;
+		case 0x0410000C: *Value = g_Reg->DPC_STATUS_REG; break;
+		case 0x04100010: *Value = g_Reg->DPC_CLOCK_REG; break;
+		case 0x04100014: *Value = g_Reg->DPC_BUFBUSY_REG; break;
+		case 0x04100018: *Value = g_Reg->DPC_PIPEBUSY_REG; break;
+		case 0x0410001C: *Value = g_Reg->DPC_TMEM_REG; break;
 		default:
 			* Value = 0;
 			return FALSE;
@@ -1758,10 +1758,10 @@ int CMipsMemoryVM::LW_NonMemory ( DWORD PAddr, DWORD * Value ) {
 		break;
 	case 0x04300000:
 		switch (PAddr) {
-		case 0x04300000: * Value = _Reg->MI_MODE_REG; break;
-		case 0x04300004: * Value = _Reg->MI_VERSION_REG; break;
-		case 0x04300008: * Value = _Reg->MI_INTR_REG; break;
-		case 0x0430000C: * Value = _Reg->MI_INTR_MASK_REG; break;
+		case 0x04300000: * Value = g_Reg->MI_MODE_REG; break;
+		case 0x04300004: * Value = g_Reg->MI_VERSION_REG; break;
+		case 0x04300008: * Value = g_Reg->MI_INTR_REG; break;
+		case 0x0430000C: * Value = g_Reg->MI_INTR_MASK_REG; break;
 		default:
 			* Value = 0;
 			return FALSE;
@@ -1769,23 +1769,23 @@ int CMipsMemoryVM::LW_NonMemory ( DWORD PAddr, DWORD * Value ) {
 		break;
 	case 0x04400000:
 		switch (PAddr) {
-		case 0x04400000: *Value = _Reg->VI_STATUS_REG; break;
-		case 0x04400004: *Value = _Reg->VI_ORIGIN_REG; break;
-		case 0x04400008: *Value = _Reg->VI_WIDTH_REG; break;
-		case 0x0440000C: *Value = _Reg->VI_INTR_REG; break;
+		case 0x04400000: *Value = g_Reg->VI_STATUS_REG; break;
+		case 0x04400004: *Value = g_Reg->VI_ORIGIN_REG; break;
+		case 0x04400008: *Value = g_Reg->VI_WIDTH_REG; break;
+		case 0x0440000C: *Value = g_Reg->VI_INTR_REG; break;
 		case 0x04400010: 
 			UpdateHalfLine();
 			*Value = m_HalfLine; 
 			break;
-		case 0x04400014: *Value = _Reg->VI_BURST_REG; break;
-		case 0x04400018: *Value = _Reg->VI_V_SYNC_REG; break;
-		case 0x0440001C: *Value = _Reg->VI_H_SYNC_REG; break;
-		case 0x04400020: *Value = _Reg->VI_LEAP_REG; break;
-		case 0x04400024: *Value = _Reg->VI_H_START_REG; break;
-		case 0x04400028: *Value = _Reg->VI_V_START_REG ; break;
-		case 0x0440002C: *Value = _Reg->VI_V_BURST_REG; break;
-		case 0x04400030: *Value = _Reg->VI_X_SCALE_REG; break;
-		case 0x04400034: *Value = _Reg->VI_Y_SCALE_REG; break;
+		case 0x04400014: *Value = g_Reg->VI_BURST_REG; break;
+		case 0x04400018: *Value = g_Reg->VI_V_SYNC_REG; break;
+		case 0x0440001C: *Value = g_Reg->VI_H_SYNC_REG; break;
+		case 0x04400020: *Value = g_Reg->VI_LEAP_REG; break;
+		case 0x04400024: *Value = g_Reg->VI_H_START_REG; break;
+		case 0x04400028: *Value = g_Reg->VI_V_START_REG ; break;
+		case 0x0440002C: *Value = g_Reg->VI_V_BURST_REG; break;
+		case 0x04400030: *Value = g_Reg->VI_X_SCALE_REG; break;
+		case 0x04400034: *Value = g_Reg->VI_Y_SCALE_REG; break;
 		default:
 			* Value = 0;
 			return FALSE;
@@ -1810,7 +1810,7 @@ int CMipsMemoryVM::LW_NonMemory ( DWORD PAddr, DWORD * Value ) {
 			{
 				*Value = _Audio->GetStatus();
 			} else {
-				*Value = _Reg->AI_STATUS_REG; 
+				*Value = g_Reg->AI_STATUS_REG; 
 			}
 			break;
 		default:
@@ -1820,15 +1820,15 @@ int CMipsMemoryVM::LW_NonMemory ( DWORD PAddr, DWORD * Value ) {
 		break;
 	case 0x04600000:
 		switch (PAddr) {
-		case 0x04600010: *Value = _Reg->PI_STATUS_REG; break;
-		case 0x04600014: *Value = _Reg->PI_DOMAIN1_REG; break;
-		case 0x04600018: *Value = _Reg->PI_BSD_DOM1_PWD_REG; break;
-		case 0x0460001C: *Value = _Reg->PI_BSD_DOM1_PGS_REG; break;
-		case 0x04600020: *Value = _Reg->PI_BSD_DOM1_RLS_REG; break;
-		case 0x04600024: *Value = _Reg->PI_DOMAIN2_REG; break;
-		case 0x04600028: *Value = _Reg->PI_BSD_DOM2_PWD_REG; break;
-		case 0x0460002C: *Value = _Reg->PI_BSD_DOM2_PGS_REG; break;
-		case 0x04600030: *Value = _Reg->PI_BSD_DOM2_RLS_REG; break;
+		case 0x04600010: *Value = g_Reg->PI_STATUS_REG; break;
+		case 0x04600014: *Value = g_Reg->PI_DOMAIN1_REG; break;
+		case 0x04600018: *Value = g_Reg->PI_BSD_DOM1_PWD_REG; break;
+		case 0x0460001C: *Value = g_Reg->PI_BSD_DOM1_PGS_REG; break;
+		case 0x04600020: *Value = g_Reg->PI_BSD_DOM1_RLS_REG; break;
+		case 0x04600024: *Value = g_Reg->PI_DOMAIN2_REG; break;
+		case 0x04600028: *Value = g_Reg->PI_BSD_DOM2_PWD_REG; break;
+		case 0x0460002C: *Value = g_Reg->PI_BSD_DOM2_PGS_REG; break;
+		case 0x04600030: *Value = g_Reg->PI_BSD_DOM2_RLS_REG; break;
 		default:
 			* Value = 0;
 			return FALSE;
@@ -1836,14 +1836,14 @@ int CMipsMemoryVM::LW_NonMemory ( DWORD PAddr, DWORD * Value ) {
 		break;
 	case 0x04700000:
 		switch (PAddr) {
-		case 0x04700000: * Value = _Reg->RI_MODE_REG; break;
-		case 0x04700004: * Value = _Reg->RI_CONFIG_REG; break;
-		case 0x04700008: * Value = _Reg->RI_CURRENT_LOAD_REG; break;
-		case 0x0470000C: * Value = _Reg->RI_SELECT_REG; break;
-		case 0x04700010: * Value = _Reg->RI_REFRESH_REG; break;
-		case 0x04700014: * Value = _Reg->RI_LATENCY_REG; break;
-		case 0x04700018: * Value = _Reg->RI_RERROR_REG; break;
-		case 0x0470001C: * Value = _Reg->RI_WERROR_REG; break;
+		case 0x04700000: * Value = g_Reg->RI_MODE_REG; break;
+		case 0x04700004: * Value = g_Reg->RI_CONFIG_REG; break;
+		case 0x04700008: * Value = g_Reg->RI_CURRENT_LOAD_REG; break;
+		case 0x0470000C: * Value = g_Reg->RI_SELECT_REG; break;
+		case 0x04700010: * Value = g_Reg->RI_REFRESH_REG; break;
+		case 0x04700014: * Value = g_Reg->RI_LATENCY_REG; break;
+		case 0x04700018: * Value = g_Reg->RI_RERROR_REG; break;
+		case 0x0470001C: * Value = g_Reg->RI_WERROR_REG; break;
 		default:
 			* Value = 0;
 			return FALSE;
@@ -1851,7 +1851,7 @@ int CMipsMemoryVM::LW_NonMemory ( DWORD PAddr, DWORD * Value ) {
 		break;
 	case 0x04800000:
 		switch (PAddr) {
-		case 0x04800018: *Value = _Reg->SI_STATUS_REG; break;
+		case 0x04800018: *Value = g_Reg->SI_STATUS_REG; break;
 		default:
 			*Value = 0;
 			return FALSE;
@@ -2027,16 +2027,16 @@ int CMipsMemoryVM::SW_NonMemory ( DWORD PAddr, DWORD Value ) {
 		break;
 	case 0x03F00000:
 		switch (PAddr) {
-		case 0x03F00000: _Reg->RDRAM_CONFIG_REG = Value; break;
-		case 0x03F00004: _Reg->RDRAM_DEVICE_ID_REG = Value; break;
-		case 0x03F00008: _Reg->RDRAM_DELAY_REG = Value; break;
-		case 0x03F0000C: _Reg->RDRAM_MODE_REG = Value; break;
-		case 0x03F00010: _Reg->RDRAM_REF_INTERVAL_REG = Value; break;
-		case 0x03F00014: _Reg->RDRAM_REF_ROW_REG = Value; break;
-		case 0x03F00018: _Reg->RDRAM_RAS_INTERVAL_REG = Value; break;
-		case 0x03F0001C: _Reg->RDRAM_MIN_INTERVAL_REG = Value; break;
-		case 0x03F00020: _Reg->RDRAM_ADDR_SELECT_REG = Value; break;
-		case 0x03F00024: _Reg->RDRAM_DEVICE_MANUF_REG = Value; break;
+		case 0x03F00000: g_Reg->RDRAM_CONFIG_REG = Value; break;
+		case 0x03F00004: g_Reg->RDRAM_DEVICE_ID_REG = Value; break;
+		case 0x03F00008: g_Reg->RDRAM_DELAY_REG = Value; break;
+		case 0x03F0000C: g_Reg->RDRAM_MODE_REG = Value; break;
+		case 0x03F00010: g_Reg->RDRAM_REF_INTERVAL_REG = Value; break;
+		case 0x03F00014: g_Reg->RDRAM_REF_ROW_REG = Value; break;
+		case 0x03F00018: g_Reg->RDRAM_RAS_INTERVAL_REG = Value; break;
+		case 0x03F0001C: g_Reg->RDRAM_MIN_INTERVAL_REG = Value; break;
+		case 0x03F00020: g_Reg->RDRAM_ADDR_SELECT_REG = Value; break;
+		case 0x03F00024: g_Reg->RDRAM_DEVICE_MANUF_REG = Value; break;
 		case 0x03F04004: break;
 		case 0x03F08004: break;
 		case 0x03F80004: break;
@@ -2053,52 +2053,52 @@ int CMipsMemoryVM::SW_NonMemory ( DWORD PAddr, DWORD Value ) {
 			*(DWORD *)(m_RDRAM+PAddr) = Value;
 		} else {
 			switch (PAddr) {
-			case 0x04040000: _Reg->SP_MEM_ADDR_REG = Value; break;
-			case 0x04040004: _Reg->SP_DRAM_ADDR_REG = Value; break;
+			case 0x04040000: g_Reg->SP_MEM_ADDR_REG = Value; break;
+			case 0x04040004: g_Reg->SP_DRAM_ADDR_REG = Value; break;
 			case 0x04040008: 
-				_Reg->SP_RD_LEN_REG = Value; 
+				g_Reg->SP_RD_LEN_REG = Value; 
 				SP_DMA_READ();
 				break;
 			case 0x0404000C: 
-				_Reg->SP_WR_LEN_REG = Value; 
+				g_Reg->SP_WR_LEN_REG = Value; 
 				SP_DMA_WRITE();
 				break;
 			case 0x04040010: 
-				if ( ( Value & SP_CLR_HALT ) != 0) { _Reg->SP_STATUS_REG &= ~SP_STATUS_HALT; }
-				if ( ( Value & SP_SET_HALT ) != 0) { _Reg->SP_STATUS_REG |= SP_STATUS_HALT;  }
-				if ( ( Value & SP_CLR_BROKE ) != 0) { _Reg->SP_STATUS_REG &= ~SP_STATUS_BROKE; }
+				if ( ( Value & SP_CLR_HALT ) != 0) { g_Reg->SP_STATUS_REG &= ~SP_STATUS_HALT; }
+				if ( ( Value & SP_SET_HALT ) != 0) { g_Reg->SP_STATUS_REG |= SP_STATUS_HALT;  }
+				if ( ( Value & SP_CLR_BROKE ) != 0) { g_Reg->SP_STATUS_REG &= ~SP_STATUS_BROKE; }
 				if ( ( Value & SP_CLR_INTR ) != 0) { 
-					_Reg->MI_INTR_REG &= ~MI_INTR_SP; 
-					_Reg->m_RspIntrReg &= ~MI_INTR_SP; 
-					_Reg->CheckInterrupts();
+					g_Reg->MI_INTR_REG &= ~MI_INTR_SP; 
+					g_Reg->m_RspIntrReg &= ~MI_INTR_SP; 
+					g_Reg->CheckInterrupts();
 				}
 #ifndef EXTERNAL_RELEASE
 				if ( ( Value & SP_SET_INTR ) != 0) { g_Notify->DisplayError("SP_SET_INTR"); }
 #endif
-				if ( ( Value & SP_CLR_SSTEP ) != 0) { _Reg->SP_STATUS_REG &= ~SP_STATUS_SSTEP; }
-				if ( ( Value & SP_SET_SSTEP ) != 0) { _Reg->SP_STATUS_REG |= SP_STATUS_SSTEP;  }
-				if ( ( Value & SP_CLR_INTR_BREAK ) != 0) { _Reg->SP_STATUS_REG &= ~SP_STATUS_INTR_BREAK; }
-				if ( ( Value & SP_SET_INTR_BREAK ) != 0) { _Reg->SP_STATUS_REG |= SP_STATUS_INTR_BREAK;  }
-				if ( ( Value & SP_CLR_SIG0 ) != 0) { _Reg->SP_STATUS_REG &= ~SP_STATUS_SIG0; }
-				if ( ( Value & SP_SET_SIG0 ) != 0) { _Reg->SP_STATUS_REG |= SP_STATUS_SIG0;  }
-				if ( ( Value & SP_CLR_SIG1 ) != 0) { _Reg->SP_STATUS_REG &= ~SP_STATUS_SIG1; }
-				if ( ( Value & SP_SET_SIG1 ) != 0) { _Reg->SP_STATUS_REG |= SP_STATUS_SIG1;  }
-				if ( ( Value & SP_CLR_SIG2 ) != 0) { _Reg->SP_STATUS_REG &= ~SP_STATUS_SIG2; }
-				if ( ( Value & SP_SET_SIG2 ) != 0) { _Reg->SP_STATUS_REG |= SP_STATUS_SIG2;  }
-				if ( ( Value & SP_CLR_SIG3 ) != 0) { _Reg->SP_STATUS_REG &= ~SP_STATUS_SIG3; }
-				if ( ( Value & SP_SET_SIG3 ) != 0) { _Reg->SP_STATUS_REG |= SP_STATUS_SIG3;  }
-				if ( ( Value & SP_CLR_SIG4 ) != 0) { _Reg->SP_STATUS_REG &= ~SP_STATUS_SIG4; }
-				if ( ( Value & SP_SET_SIG4 ) != 0) { _Reg->SP_STATUS_REG |= SP_STATUS_SIG4;  }
-				if ( ( Value & SP_CLR_SIG5 ) != 0) { _Reg->SP_STATUS_REG &= ~SP_STATUS_SIG5; }
-				if ( ( Value & SP_SET_SIG5 ) != 0) { _Reg->SP_STATUS_REG |= SP_STATUS_SIG5;  }
-				if ( ( Value & SP_CLR_SIG6 ) != 0) { _Reg->SP_STATUS_REG &= ~SP_STATUS_SIG6; }
-				if ( ( Value & SP_SET_SIG6 ) != 0) { _Reg->SP_STATUS_REG |= SP_STATUS_SIG6;  }
-				if ( ( Value & SP_CLR_SIG7 ) != 0) { _Reg->SP_STATUS_REG &= ~SP_STATUS_SIG7; }
-				if ( ( Value & SP_SET_SIG7 ) != 0) { _Reg->SP_STATUS_REG |= SP_STATUS_SIG7;  }
+				if ( ( Value & SP_CLR_SSTEP ) != 0) { g_Reg->SP_STATUS_REG &= ~SP_STATUS_SSTEP; }
+				if ( ( Value & SP_SET_SSTEP ) != 0) { g_Reg->SP_STATUS_REG |= SP_STATUS_SSTEP;  }
+				if ( ( Value & SP_CLR_INTR_BREAK ) != 0) { g_Reg->SP_STATUS_REG &= ~SP_STATUS_INTR_BREAK; }
+				if ( ( Value & SP_SET_INTR_BREAK ) != 0) { g_Reg->SP_STATUS_REG |= SP_STATUS_INTR_BREAK;  }
+				if ( ( Value & SP_CLR_SIG0 ) != 0) { g_Reg->SP_STATUS_REG &= ~SP_STATUS_SIG0; }
+				if ( ( Value & SP_SET_SIG0 ) != 0) { g_Reg->SP_STATUS_REG |= SP_STATUS_SIG0;  }
+				if ( ( Value & SP_CLR_SIG1 ) != 0) { g_Reg->SP_STATUS_REG &= ~SP_STATUS_SIG1; }
+				if ( ( Value & SP_SET_SIG1 ) != 0) { g_Reg->SP_STATUS_REG |= SP_STATUS_SIG1;  }
+				if ( ( Value & SP_CLR_SIG2 ) != 0) { g_Reg->SP_STATUS_REG &= ~SP_STATUS_SIG2; }
+				if ( ( Value & SP_SET_SIG2 ) != 0) { g_Reg->SP_STATUS_REG |= SP_STATUS_SIG2;  }
+				if ( ( Value & SP_CLR_SIG3 ) != 0) { g_Reg->SP_STATUS_REG &= ~SP_STATUS_SIG3; }
+				if ( ( Value & SP_SET_SIG3 ) != 0) { g_Reg->SP_STATUS_REG |= SP_STATUS_SIG3;  }
+				if ( ( Value & SP_CLR_SIG4 ) != 0) { g_Reg->SP_STATUS_REG &= ~SP_STATUS_SIG4; }
+				if ( ( Value & SP_SET_SIG4 ) != 0) { g_Reg->SP_STATUS_REG |= SP_STATUS_SIG4;  }
+				if ( ( Value & SP_CLR_SIG5 ) != 0) { g_Reg->SP_STATUS_REG &= ~SP_STATUS_SIG5; }
+				if ( ( Value & SP_SET_SIG5 ) != 0) { g_Reg->SP_STATUS_REG |= SP_STATUS_SIG5;  }
+				if ( ( Value & SP_CLR_SIG6 ) != 0) { g_Reg->SP_STATUS_REG &= ~SP_STATUS_SIG6; }
+				if ( ( Value & SP_SET_SIG6 ) != 0) { g_Reg->SP_STATUS_REG |= SP_STATUS_SIG6;  }
+				if ( ( Value & SP_CLR_SIG7 ) != 0) { g_Reg->SP_STATUS_REG &= ~SP_STATUS_SIG7; }
+				if ( ( Value & SP_SET_SIG7 ) != 0) { g_Reg->SP_STATUS_REG |= SP_STATUS_SIG7;  }
 				if ( ( Value & SP_SET_SIG0 ) != 0 && RspAudioSignal()) 
 				{ 
-					_Reg->MI_INTR_REG |= MI_INTR_SP; 
-					_Reg->CheckInterrupts();				
+					g_Reg->MI_INTR_REG |= MI_INTR_SP; 
+					g_Reg->CheckInterrupts();				
 				}
 				//if (*( DWORD *)(DMEM + 0xFC0) == 1) {
 				//	ChangeTimer(RspTimer,0x30000);
@@ -2110,8 +2110,8 @@ int CMipsMemoryVM::SW_NonMemory ( DWORD PAddr, DWORD Value ) {
 					}
 				//}
 				break;
-			case 0x0404001C: _Reg->SP_SEMAPHORE_REG = 0; break;
-			case 0x04080000: _Reg->SP_PC_REG = Value & 0xFFC; break;
+			case 0x0404001C: g_Reg->SP_SEMAPHORE_REG = 0; break;
+			case 0x04080000: g_Reg->SP_PC_REG = Value & 0xFFC; break;
 			default:
 				return FALSE;
 			}
@@ -2120,26 +2120,26 @@ int CMipsMemoryVM::SW_NonMemory ( DWORD PAddr, DWORD Value ) {
 	case 0x04100000:
 		switch (PAddr) {
 		case 0x04100000: 
-			_Reg->DPC_START_REG = Value; 
-			_Reg->DPC_CURRENT_REG = Value; 
+			g_Reg->DPC_START_REG = Value; 
+			g_Reg->DPC_CURRENT_REG = Value; 
 			break;
 		case 0x04100004: 
-			_Reg->DPC_END_REG = Value; 
+			g_Reg->DPC_END_REG = Value; 
 			if (_Plugins->Gfx()->ProcessRDPList) { _Plugins->Gfx()->ProcessRDPList(); }
 			break;
-		//case 0x04100008: _Reg->DPC_CURRENT_REG = Value; break;
+		//case 0x04100008: g_Reg->DPC_CURRENT_REG = Value; break;
 		case 0x0410000C:
-			if ( ( Value & DPC_CLR_XBUS_DMEM_DMA ) != 0) { _Reg->DPC_STATUS_REG &= ~DPC_STATUS_XBUS_DMEM_DMA; }
-			if ( ( Value & DPC_SET_XBUS_DMEM_DMA ) != 0) { _Reg->DPC_STATUS_REG |= DPC_STATUS_XBUS_DMEM_DMA;  }
-			if ( ( Value & DPC_CLR_FREEZE ) != 0) { _Reg->DPC_STATUS_REG &= ~DPC_STATUS_FREEZE; }
-			if ( ( Value & DPC_SET_FREEZE ) != 0) { _Reg->DPC_STATUS_REG |= DPC_STATUS_FREEZE;  }		
-			if ( ( Value & DPC_CLR_FLUSH ) != 0) { _Reg->DPC_STATUS_REG &= ~DPC_STATUS_FLUSH; }
-			if ( ( Value & DPC_SET_FLUSH ) != 0) { _Reg->DPC_STATUS_REG |= DPC_STATUS_FLUSH;  }
+			if ( ( Value & DPC_CLR_XBUS_DMEM_DMA ) != 0) { g_Reg->DPC_STATUS_REG &= ~DPC_STATUS_XBUS_DMEM_DMA; }
+			if ( ( Value & DPC_SET_XBUS_DMEM_DMA ) != 0) { g_Reg->DPC_STATUS_REG |= DPC_STATUS_XBUS_DMEM_DMA;  }
+			if ( ( Value & DPC_CLR_FREEZE ) != 0) { g_Reg->DPC_STATUS_REG &= ~DPC_STATUS_FREEZE; }
+			if ( ( Value & DPC_SET_FREEZE ) != 0) { g_Reg->DPC_STATUS_REG |= DPC_STATUS_FREEZE;  }		
+			if ( ( Value & DPC_CLR_FLUSH ) != 0) { g_Reg->DPC_STATUS_REG &= ~DPC_STATUS_FLUSH; }
+			if ( ( Value & DPC_SET_FLUSH ) != 0) { g_Reg->DPC_STATUS_REG |= DPC_STATUS_FLUSH;  }
 			if ( ( Value & DPC_CLR_FREEZE ) != 0) 
 			{
-				if ( ( _Reg->SP_STATUS_REG & SP_STATUS_HALT ) == 0) 
+				if ( ( g_Reg->SP_STATUS_REG & SP_STATUS_HALT ) == 0) 
 				{
-					if ( ( _Reg->SP_STATUS_REG & SP_STATUS_BROKE ) == 0 ) 
+					if ( ( g_Reg->SP_STATUS_REG & SP_STATUS_BROKE ) == 0 ) 
 					{
 						try {
 							g_System->RunRSP();
@@ -2165,33 +2165,33 @@ int CMipsMemoryVM::SW_NonMemory ( DWORD PAddr, DWORD Value ) {
 	case 0x04300000: 
 		switch (PAddr) {
 		case 0x04300000: 
-			_Reg->MI_MODE_REG &= ~0x7F;
-			_Reg->MI_MODE_REG |= (Value & 0x7F);
-			if ( ( Value & MI_CLR_INIT ) != 0 ) { _Reg->MI_MODE_REG &= ~MI_MODE_INIT; }
-			if ( ( Value & MI_SET_INIT ) != 0 ) { _Reg->MI_MODE_REG |= MI_MODE_INIT; }
-			if ( ( Value & MI_CLR_EBUS ) != 0 ) { _Reg->MI_MODE_REG &= ~MI_MODE_EBUS; }
-			if ( ( Value & MI_SET_EBUS ) != 0 ) { _Reg->MI_MODE_REG |= MI_MODE_EBUS; }
+			g_Reg->MI_MODE_REG &= ~0x7F;
+			g_Reg->MI_MODE_REG |= (Value & 0x7F);
+			if ( ( Value & MI_CLR_INIT ) != 0 ) { g_Reg->MI_MODE_REG &= ~MI_MODE_INIT; }
+			if ( ( Value & MI_SET_INIT ) != 0 ) { g_Reg->MI_MODE_REG |= MI_MODE_INIT; }
+			if ( ( Value & MI_CLR_EBUS ) != 0 ) { g_Reg->MI_MODE_REG &= ~MI_MODE_EBUS; }
+			if ( ( Value & MI_SET_EBUS ) != 0 ) { g_Reg->MI_MODE_REG |= MI_MODE_EBUS; }
 			if ( ( Value & MI_CLR_DP_INTR ) != 0 ) { 
-				_Reg->MI_INTR_REG &= ~MI_INTR_DP; 
-				_Reg->m_GfxIntrReg &= ~MI_INTR_DP; 
-				_Reg->CheckInterrupts();
+				g_Reg->MI_INTR_REG &= ~MI_INTR_DP; 
+				g_Reg->m_GfxIntrReg &= ~MI_INTR_DP; 
+				g_Reg->CheckInterrupts();
 			}
-			if ( ( Value & MI_CLR_RDRAM ) != 0 ) { _Reg->MI_MODE_REG &= ~MI_MODE_RDRAM; }
-			if ( ( Value & MI_SET_RDRAM ) != 0 ) { _Reg->MI_MODE_REG |= MI_MODE_RDRAM; }
+			if ( ( Value & MI_CLR_RDRAM ) != 0 ) { g_Reg->MI_MODE_REG &= ~MI_MODE_RDRAM; }
+			if ( ( Value & MI_SET_RDRAM ) != 0 ) { g_Reg->MI_MODE_REG |= MI_MODE_RDRAM; }
 			break;
 		case 0x0430000C: 
-			if ( ( Value & MI_INTR_MASK_CLR_SP ) != 0 ) { _Reg->MI_INTR_MASK_REG &= ~MI_INTR_MASK_SP; }
-			if ( ( Value & MI_INTR_MASK_SET_SP ) != 0 ) { _Reg->MI_INTR_MASK_REG |= MI_INTR_MASK_SP; }
-			if ( ( Value & MI_INTR_MASK_CLR_SI ) != 0 ) { _Reg->MI_INTR_MASK_REG &= ~MI_INTR_MASK_SI; }
-			if ( ( Value & MI_INTR_MASK_SET_SI ) != 0 ) { _Reg->MI_INTR_MASK_REG |= MI_INTR_MASK_SI; }
-			if ( ( Value & MI_INTR_MASK_CLR_AI ) != 0 ) { _Reg->MI_INTR_MASK_REG &= ~MI_INTR_MASK_AI; }
-			if ( ( Value & MI_INTR_MASK_SET_AI ) != 0 ) { _Reg->MI_INTR_MASK_REG |= MI_INTR_MASK_AI; }
-			if ( ( Value & MI_INTR_MASK_CLR_VI ) != 0 ) { _Reg->MI_INTR_MASK_REG &= ~MI_INTR_MASK_VI; }
-			if ( ( Value & MI_INTR_MASK_SET_VI ) != 0 ) { _Reg->MI_INTR_MASK_REG |= MI_INTR_MASK_VI; }
-			if ( ( Value & MI_INTR_MASK_CLR_PI ) != 0 ) { _Reg->MI_INTR_MASK_REG &= ~MI_INTR_MASK_PI; }
-			if ( ( Value & MI_INTR_MASK_SET_PI ) != 0 ) { _Reg->MI_INTR_MASK_REG |= MI_INTR_MASK_PI; }
-			if ( ( Value & MI_INTR_MASK_CLR_DP ) != 0 ) { _Reg->MI_INTR_MASK_REG &= ~MI_INTR_MASK_DP; }
-			if ( ( Value & MI_INTR_MASK_SET_DP ) != 0 ) { _Reg->MI_INTR_MASK_REG |= MI_INTR_MASK_DP; }
+			if ( ( Value & MI_INTR_MASK_CLR_SP ) != 0 ) { g_Reg->MI_INTR_MASK_REG &= ~MI_INTR_MASK_SP; }
+			if ( ( Value & MI_INTR_MASK_SET_SP ) != 0 ) { g_Reg->MI_INTR_MASK_REG |= MI_INTR_MASK_SP; }
+			if ( ( Value & MI_INTR_MASK_CLR_SI ) != 0 ) { g_Reg->MI_INTR_MASK_REG &= ~MI_INTR_MASK_SI; }
+			if ( ( Value & MI_INTR_MASK_SET_SI ) != 0 ) { g_Reg->MI_INTR_MASK_REG |= MI_INTR_MASK_SI; }
+			if ( ( Value & MI_INTR_MASK_CLR_AI ) != 0 ) { g_Reg->MI_INTR_MASK_REG &= ~MI_INTR_MASK_AI; }
+			if ( ( Value & MI_INTR_MASK_SET_AI ) != 0 ) { g_Reg->MI_INTR_MASK_REG |= MI_INTR_MASK_AI; }
+			if ( ( Value & MI_INTR_MASK_CLR_VI ) != 0 ) { g_Reg->MI_INTR_MASK_REG &= ~MI_INTR_MASK_VI; }
+			if ( ( Value & MI_INTR_MASK_SET_VI ) != 0 ) { g_Reg->MI_INTR_MASK_REG |= MI_INTR_MASK_VI; }
+			if ( ( Value & MI_INTR_MASK_CLR_PI ) != 0 ) { g_Reg->MI_INTR_MASK_REG &= ~MI_INTR_MASK_PI; }
+			if ( ( Value & MI_INTR_MASK_SET_PI ) != 0 ) { g_Reg->MI_INTR_MASK_REG |= MI_INTR_MASK_PI; }
+			if ( ( Value & MI_INTR_MASK_CLR_DP ) != 0 ) { g_Reg->MI_INTR_MASK_REG &= ~MI_INTR_MASK_DP; }
+			if ( ( Value & MI_INTR_MASK_SET_DP ) != 0 ) { g_Reg->MI_INTR_MASK_REG |= MI_INTR_MASK_DP; }
 			break;
 		default:
 			return FALSE;
@@ -2200,49 +2200,49 @@ int CMipsMemoryVM::SW_NonMemory ( DWORD PAddr, DWORD Value ) {
 	case 0x04400000: 
 		switch (PAddr) {
 		case 0x04400000: 
-			if (_Reg->VI_STATUS_REG != Value) { 
-				_Reg->VI_STATUS_REG = Value; 
+			if (g_Reg->VI_STATUS_REG != Value) { 
+				g_Reg->VI_STATUS_REG = Value; 
 				if (_Plugins->Gfx()->ViStatusChanged != NULL ) { _Plugins->Gfx()->ViStatusChanged(); }
 			}
 			break;
 		case 0x04400004: 
 #ifdef CFB_READ
-			if (_Reg->VI_ORIGIN_REG > 0x280) {
-				SetFrameBuffer(_Reg->VI_ORIGIN_REG, (DWORD)(VI_WIDTH_REG * (VI_WIDTH_REG *.75)));
+			if (g_Reg->VI_ORIGIN_REG > 0x280) {
+				SetFrameBuffer(g_Reg->VI_ORIGIN_REG, (DWORD)(VI_WIDTH_REG * (VI_WIDTH_REG *.75)));
 			}
 #endif
-			_Reg->VI_ORIGIN_REG = (Value & 0xFFFFFF); 
+			g_Reg->VI_ORIGIN_REG = (Value & 0xFFFFFF); 
 			//if (UpdateScreen != NULL ) { UpdateScreen(); }
 			break;
 		case 0x04400008: 
-			if (_Reg->VI_WIDTH_REG != Value) {
-				_Reg->VI_WIDTH_REG = Value; 
+			if (g_Reg->VI_WIDTH_REG != Value) {
+				g_Reg->VI_WIDTH_REG = Value; 
 				if (_Plugins->Gfx()->ViWidthChanged != NULL ) { _Plugins->Gfx()->ViWidthChanged(); }
 			}
 			break;
-		case 0x0440000C: _Reg->VI_INTR_REG = Value; break;
+		case 0x0440000C: g_Reg->VI_INTR_REG = Value; break;
 		case 0x04400010: 
-			_Reg->MI_INTR_REG &= ~MI_INTR_VI;
-			_Reg->CheckInterrupts();
+			g_Reg->MI_INTR_REG &= ~MI_INTR_VI;
+			g_Reg->CheckInterrupts();
 			break;
-		case 0x04400014: _Reg->VI_BURST_REG = Value; break;
-		case 0x04400018: _Reg->VI_V_SYNC_REG = Value; break;
-		case 0x0440001C: _Reg->VI_H_SYNC_REG = Value; break;
-		case 0x04400020: _Reg->VI_LEAP_REG = Value; break;
-		case 0x04400024: _Reg->VI_H_START_REG = Value; break;
-		case 0x04400028: _Reg->VI_V_START_REG = Value; break;
-		case 0x0440002C: _Reg->VI_V_BURST_REG = Value; break;
-		case 0x04400030: _Reg->VI_X_SCALE_REG = Value; break;
-		case 0x04400034: _Reg->VI_Y_SCALE_REG = Value; break;
+		case 0x04400014: g_Reg->VI_BURST_REG = Value; break;
+		case 0x04400018: g_Reg->VI_V_SYNC_REG = Value; break;
+		case 0x0440001C: g_Reg->VI_H_SYNC_REG = Value; break;
+		case 0x04400020: g_Reg->VI_LEAP_REG = Value; break;
+		case 0x04400024: g_Reg->VI_H_START_REG = Value; break;
+		case 0x04400028: g_Reg->VI_V_START_REG = Value; break;
+		case 0x0440002C: g_Reg->VI_V_BURST_REG = Value; break;
+		case 0x04400030: g_Reg->VI_X_SCALE_REG = Value; break;
+		case 0x04400034: g_Reg->VI_Y_SCALE_REG = Value; break;
 		default:
 			return FALSE;
 		}
 		break;
 	case 0x04500000: 
 		switch (PAddr) {
-		case 0x04500000: _Reg->AI_DRAM_ADDR_REG = Value; break;
+		case 0x04500000: g_Reg->AI_DRAM_ADDR_REG = Value; break;
 		case 0x04500004: 
-			_Reg->AI_LEN_REG = Value; 
+			g_Reg->AI_LEN_REG = Value; 
 			if (bFixedAudio())
 			{
 				_Audio->LenChanged();
@@ -2250,86 +2250,86 @@ int CMipsMemoryVM::SW_NonMemory ( DWORD PAddr, DWORD Value ) {
 				if (_Plugins->Audio()->LenChanged != NULL) { _Plugins->Audio()->LenChanged(); }				
 			}
 			break;
-		case 0x04500008: _Reg->AI_CONTROL_REG = (Value & 1); break;
+		case 0x04500008: g_Reg->AI_CONTROL_REG = (Value & 1); break;
 		case 0x0450000C:
 			/* Clear Interrupt */; 
-			_Reg->MI_INTR_REG &= ~MI_INTR_AI;
-			_Reg->m_AudioIntrReg &= ~MI_INTR_AI;
-			_Reg->CheckInterrupts();
+			g_Reg->MI_INTR_REG &= ~MI_INTR_AI;
+			g_Reg->m_AudioIntrReg &= ~MI_INTR_AI;
+			g_Reg->CheckInterrupts();
 			break;
 		case 0x04500010: 
-			_Reg->AI_DACRATE_REG = Value;
+			g_Reg->AI_DACRATE_REG = Value;
 			_Plugins->Audio()->DacrateChanged(g_System->m_SystemType);
 			if (bFixedAudio())
 			{
 				_Audio->SetFrequency(Value,g_System->m_SystemType);
 			}
 			break;
-		case 0x04500014:  _Reg->AI_BITRATE_REG = Value; break;
+		case 0x04500014:  g_Reg->AI_BITRATE_REG = Value; break;
 		default:
 			return FALSE;
 		}
 		break;
 	case 0x04600000: 
 		switch (PAddr) {
-		case 0x04600000: _Reg->PI_DRAM_ADDR_REG = Value; break;
-		case 0x04600004: _Reg->PI_CART_ADDR_REG = Value; break;
+		case 0x04600000: g_Reg->PI_DRAM_ADDR_REG = Value; break;
+		case 0x04600004: g_Reg->PI_CART_ADDR_REG = Value; break;
 		case 0x04600008: 
-			_Reg->PI_RD_LEN_REG = Value; 
+			g_Reg->PI_RD_LEN_REG = Value; 
 			PI_DMA_READ();
 			break;
 		case 0x0460000C: 
-			_Reg->PI_WR_LEN_REG = Value; 
+			g_Reg->PI_WR_LEN_REG = Value; 
 			PI_DMA_WRITE();
 			break;
 		case 0x04600010:
 			//if ((Value & PI_SET_RESET) != 0 ) { g_Notify->DisplayError("reset Controller"); }
 			if ((Value & PI_CLR_INTR) != 0 ) {
-				_Reg->MI_INTR_REG &= ~MI_INTR_PI;
-				_Reg->CheckInterrupts();
+				g_Reg->MI_INTR_REG &= ~MI_INTR_PI;
+				g_Reg->CheckInterrupts();
 			}
 			break;
-		case 0x04600014: _Reg->PI_DOMAIN1_REG = (Value & 0xFF); break; 
-		case 0x04600018: _Reg->PI_BSD_DOM1_PWD_REG = (Value & 0xFF); break; 
-		case 0x0460001C: _Reg->PI_BSD_DOM1_PGS_REG = (Value & 0xFF); break; 
-		case 0x04600020: _Reg->PI_BSD_DOM1_RLS_REG = (Value & 0xFF); break; 
-		case 0x04600024: _Reg->PI_DOMAIN2_REG = (Value & 0xFF); break;
-		case 0x04600028: _Reg->PI_BSD_DOM2_PWD_REG = (Value & 0xFF); break;
-		case 0x0460002C: _Reg->PI_BSD_DOM2_PGS_REG = (Value & 0xFF); break;
-		case 0x04600030: _Reg->PI_BSD_DOM2_RLS_REG = (Value & 0xFF); break;
+		case 0x04600014: g_Reg->PI_DOMAIN1_REG = (Value & 0xFF); break; 
+		case 0x04600018: g_Reg->PI_BSD_DOM1_PWD_REG = (Value & 0xFF); break; 
+		case 0x0460001C: g_Reg->PI_BSD_DOM1_PGS_REG = (Value & 0xFF); break; 
+		case 0x04600020: g_Reg->PI_BSD_DOM1_RLS_REG = (Value & 0xFF); break; 
+		case 0x04600024: g_Reg->PI_DOMAIN2_REG = (Value & 0xFF); break;
+		case 0x04600028: g_Reg->PI_BSD_DOM2_PWD_REG = (Value & 0xFF); break;
+		case 0x0460002C: g_Reg->PI_BSD_DOM2_PGS_REG = (Value & 0xFF); break;
+		case 0x04600030: g_Reg->PI_BSD_DOM2_RLS_REG = (Value & 0xFF); break;
 		default:
 			return FALSE;
 		}
 		break;
 	case 0x04700000:
 		switch (PAddr) {
-		case 0x04700000: _Reg->RI_MODE_REG = Value; break;
-		case 0x04700004: _Reg->RI_CONFIG_REG = Value; break;
-		case 0x04700008: _Reg->RI_CURRENT_LOAD_REG = Value; break;
-		case 0x0470000C: _Reg->RI_SELECT_REG = Value; break;
-		case 0x04700010: _Reg->RI_REFRESH_REG = Value; break;
-		case 0x04700014: _Reg->RI_LATENCY_REG = Value; break;
-		case 0x04700018: _Reg->RI_RERROR_REG = Value; break;
-		case 0x0470001C: _Reg->RI_WERROR_REG = Value; break;
+		case 0x04700000: g_Reg->RI_MODE_REG = Value; break;
+		case 0x04700004: g_Reg->RI_CONFIG_REG = Value; break;
+		case 0x04700008: g_Reg->RI_CURRENT_LOAD_REG = Value; break;
+		case 0x0470000C: g_Reg->RI_SELECT_REG = Value; break;
+		case 0x04700010: g_Reg->RI_REFRESH_REG = Value; break;
+		case 0x04700014: g_Reg->RI_LATENCY_REG = Value; break;
+		case 0x04700018: g_Reg->RI_RERROR_REG = Value; break;
+		case 0x0470001C: g_Reg->RI_WERROR_REG = Value; break;
 		default:
 			return FALSE;
 		}
 		break;
 	case 0x04800000:
 		switch (PAddr) {
-		case 0x04800000: _Reg->SI_DRAM_ADDR_REG = Value; break;
+		case 0x04800000: g_Reg->SI_DRAM_ADDR_REG = Value; break;
 		case 0x04800004: 
-			_Reg->SI_PIF_ADDR_RD64B_REG = Value; 
+			g_Reg->SI_PIF_ADDR_RD64B_REG = Value; 
 			SI_DMA_READ ();
 			break;
 		case 0x04800010: 
-			_Reg->SI_PIF_ADDR_WR64B_REG = Value; 
+			g_Reg->SI_PIF_ADDR_WR64B_REG = Value; 
 			SI_DMA_WRITE();
 			break;
 		case 0x04800018: 
-			_Reg->MI_INTR_REG &= ~MI_INTR_SI; 
-			_Reg->SI_STATUS_REG &= ~SI_STATUS_INTERRUPT;
-			_Reg->CheckInterrupts();
+			g_Reg->MI_INTR_REG &= ~MI_INTR_SI; 
+			g_Reg->SI_STATUS_REG &= ~SI_STATUS_INTERRUPT;
+			g_Reg->CheckInterrupts();
 			break;
 		default:
 			return FALSE;
@@ -3863,42 +3863,42 @@ void CMipsMemoryVM::RdramChanged ( CMipsMemoryVM * _this )
 
 void CMipsMemoryVM::ChangeSpStatus (void)
 {
-	if ( ( RegModValue & SP_CLR_HALT ) != 0) { _Reg->SP_STATUS_REG &= ~SP_STATUS_HALT; }
-	if ( ( RegModValue & SP_SET_HALT ) != 0) { _Reg->SP_STATUS_REG |= SP_STATUS_HALT;  }
-	if ( ( RegModValue & SP_CLR_BROKE ) != 0) { _Reg->SP_STATUS_REG &= ~SP_STATUS_BROKE; }
+	if ( ( RegModValue & SP_CLR_HALT ) != 0) { g_Reg->SP_STATUS_REG &= ~SP_STATUS_HALT; }
+	if ( ( RegModValue & SP_SET_HALT ) != 0) { g_Reg->SP_STATUS_REG |= SP_STATUS_HALT;  }
+	if ( ( RegModValue & SP_CLR_BROKE ) != 0) { g_Reg->SP_STATUS_REG &= ~SP_STATUS_BROKE; }
 	if ( ( RegModValue & SP_CLR_INTR ) != 0) { 
-		_Reg->MI_INTR_REG &= ~MI_INTR_SP; 
-		_Reg->m_RspIntrReg &= ~MI_INTR_SP;
-		_Reg->CheckInterrupts();
+		g_Reg->MI_INTR_REG &= ~MI_INTR_SP; 
+		g_Reg->m_RspIntrReg &= ~MI_INTR_SP;
+		g_Reg->CheckInterrupts();
 	}
 #ifndef EXTERNAL_RELEASE
 	if ( ( RegModValue & SP_SET_INTR ) != 0) { g_Notify->DisplayError("SP_SET_INTR"); }
 #endif
-	if ( ( RegModValue & SP_CLR_SSTEP ) != 0) { _Reg->SP_STATUS_REG &= ~SP_STATUS_SSTEP; }
-	if ( ( RegModValue & SP_SET_SSTEP ) != 0) { _Reg->SP_STATUS_REG |= SP_STATUS_SSTEP;  }
-	if ( ( RegModValue & SP_CLR_INTR_BREAK ) != 0) { _Reg->SP_STATUS_REG &= ~SP_STATUS_INTR_BREAK; }
-	if ( ( RegModValue & SP_SET_INTR_BREAK ) != 0) { _Reg->SP_STATUS_REG |= SP_STATUS_INTR_BREAK;  }
-	if ( ( RegModValue & SP_CLR_SIG0 ) != 0) { _Reg->SP_STATUS_REG &= ~SP_STATUS_SIG0; }
-	if ( ( RegModValue & SP_SET_SIG0 ) != 0) { _Reg->SP_STATUS_REG |= SP_STATUS_SIG0;  }
-	if ( ( RegModValue & SP_CLR_SIG1 ) != 0) { _Reg->SP_STATUS_REG &= ~SP_STATUS_SIG1; }
-	if ( ( RegModValue & SP_SET_SIG1 ) != 0) { _Reg->SP_STATUS_REG |= SP_STATUS_SIG1;  }
-	if ( ( RegModValue & SP_CLR_SIG2 ) != 0) { _Reg->SP_STATUS_REG &= ~SP_STATUS_SIG2; }
-	if ( ( RegModValue & SP_SET_SIG2 ) != 0) { _Reg->SP_STATUS_REG |= SP_STATUS_SIG2;  }
-	if ( ( RegModValue & SP_CLR_SIG3 ) != 0) { _Reg->SP_STATUS_REG &= ~SP_STATUS_SIG3; }
-	if ( ( RegModValue & SP_SET_SIG3 ) != 0) { _Reg->SP_STATUS_REG |= SP_STATUS_SIG3;  }
-	if ( ( RegModValue & SP_CLR_SIG4 ) != 0) { _Reg->SP_STATUS_REG &= ~SP_STATUS_SIG4; }
-	if ( ( RegModValue & SP_SET_SIG4 ) != 0) { _Reg->SP_STATUS_REG |= SP_STATUS_SIG4;  }
-	if ( ( RegModValue & SP_CLR_SIG5 ) != 0) { _Reg->SP_STATUS_REG &= ~SP_STATUS_SIG5; }
-	if ( ( RegModValue & SP_SET_SIG5 ) != 0) { _Reg->SP_STATUS_REG |= SP_STATUS_SIG5;  }
-	if ( ( RegModValue & SP_CLR_SIG6 ) != 0) { _Reg->SP_STATUS_REG &= ~SP_STATUS_SIG6; }
-	if ( ( RegModValue & SP_SET_SIG6 ) != 0) { _Reg->SP_STATUS_REG |= SP_STATUS_SIG6;  }
-	if ( ( RegModValue & SP_CLR_SIG7 ) != 0) { _Reg->SP_STATUS_REG &= ~SP_STATUS_SIG7; }
-	if ( ( RegModValue & SP_SET_SIG7 ) != 0) { _Reg->SP_STATUS_REG |= SP_STATUS_SIG7;  }
+	if ( ( RegModValue & SP_CLR_SSTEP ) != 0) { g_Reg->SP_STATUS_REG &= ~SP_STATUS_SSTEP; }
+	if ( ( RegModValue & SP_SET_SSTEP ) != 0) { g_Reg->SP_STATUS_REG |= SP_STATUS_SSTEP;  }
+	if ( ( RegModValue & SP_CLR_INTR_BREAK ) != 0) { g_Reg->SP_STATUS_REG &= ~SP_STATUS_INTR_BREAK; }
+	if ( ( RegModValue & SP_SET_INTR_BREAK ) != 0) { g_Reg->SP_STATUS_REG |= SP_STATUS_INTR_BREAK;  }
+	if ( ( RegModValue & SP_CLR_SIG0 ) != 0) { g_Reg->SP_STATUS_REG &= ~SP_STATUS_SIG0; }
+	if ( ( RegModValue & SP_SET_SIG0 ) != 0) { g_Reg->SP_STATUS_REG |= SP_STATUS_SIG0;  }
+	if ( ( RegModValue & SP_CLR_SIG1 ) != 0) { g_Reg->SP_STATUS_REG &= ~SP_STATUS_SIG1; }
+	if ( ( RegModValue & SP_SET_SIG1 ) != 0) { g_Reg->SP_STATUS_REG |= SP_STATUS_SIG1;  }
+	if ( ( RegModValue & SP_CLR_SIG2 ) != 0) { g_Reg->SP_STATUS_REG &= ~SP_STATUS_SIG2; }
+	if ( ( RegModValue & SP_SET_SIG2 ) != 0) { g_Reg->SP_STATUS_REG |= SP_STATUS_SIG2;  }
+	if ( ( RegModValue & SP_CLR_SIG3 ) != 0) { g_Reg->SP_STATUS_REG &= ~SP_STATUS_SIG3; }
+	if ( ( RegModValue & SP_SET_SIG3 ) != 0) { g_Reg->SP_STATUS_REG |= SP_STATUS_SIG3;  }
+	if ( ( RegModValue & SP_CLR_SIG4 ) != 0) { g_Reg->SP_STATUS_REG &= ~SP_STATUS_SIG4; }
+	if ( ( RegModValue & SP_SET_SIG4 ) != 0) { g_Reg->SP_STATUS_REG |= SP_STATUS_SIG4;  }
+	if ( ( RegModValue & SP_CLR_SIG5 ) != 0) { g_Reg->SP_STATUS_REG &= ~SP_STATUS_SIG5; }
+	if ( ( RegModValue & SP_SET_SIG5 ) != 0) { g_Reg->SP_STATUS_REG |= SP_STATUS_SIG5;  }
+	if ( ( RegModValue & SP_CLR_SIG6 ) != 0) { g_Reg->SP_STATUS_REG &= ~SP_STATUS_SIG6; }
+	if ( ( RegModValue & SP_SET_SIG6 ) != 0) { g_Reg->SP_STATUS_REG |= SP_STATUS_SIG6;  }
+	if ( ( RegModValue & SP_CLR_SIG7 ) != 0) { g_Reg->SP_STATUS_REG &= ~SP_STATUS_SIG7; }
+	if ( ( RegModValue & SP_SET_SIG7 ) != 0) { g_Reg->SP_STATUS_REG |= SP_STATUS_SIG7;  }
 
 	if ( ( RegModValue & SP_SET_SIG0 ) != 0 && RspAudioSignal())
 	{
-		_Reg->MI_INTR_REG |= MI_INTR_SP; 
-		_Reg->CheckInterrupts();				
+		g_Reg->MI_INTR_REG |= MI_INTR_SP; 
+		g_Reg->CheckInterrupts();				
 	}
 	//if (*( DWORD *)(DMEM + 0xFC0) == 1) {
 	//	ChangeTimer(RspTimer,0x40000);
@@ -3912,16 +3912,16 @@ void CMipsMemoryVM::ChangeSpStatus (void)
 }
 
 void CMipsMemoryVM::ChangeMiIntrMask (void) {
-	if ( ( RegModValue & MI_INTR_MASK_CLR_SP ) != 0 ) { _Reg->MI_INTR_MASK_REG &= ~MI_INTR_MASK_SP; }
-	if ( ( RegModValue & MI_INTR_MASK_SET_SP ) != 0 ) { _Reg->MI_INTR_MASK_REG |= MI_INTR_MASK_SP; }
-	if ( ( RegModValue & MI_INTR_MASK_CLR_SI ) != 0 ) { _Reg->MI_INTR_MASK_REG &= ~MI_INTR_MASK_SI; }
-	if ( ( RegModValue & MI_INTR_MASK_SET_SI ) != 0 ) { _Reg->MI_INTR_MASK_REG |= MI_INTR_MASK_SI; }
-	if ( ( RegModValue & MI_INTR_MASK_CLR_AI ) != 0 ) { _Reg->MI_INTR_MASK_REG &= ~MI_INTR_MASK_AI; }
-	if ( ( RegModValue & MI_INTR_MASK_SET_AI ) != 0 ) { _Reg->MI_INTR_MASK_REG |= MI_INTR_MASK_AI; }
-	if ( ( RegModValue & MI_INTR_MASK_CLR_VI ) != 0 ) { _Reg->MI_INTR_MASK_REG &= ~MI_INTR_MASK_VI; }
-	if ( ( RegModValue & MI_INTR_MASK_SET_VI ) != 0 ) { _Reg->MI_INTR_MASK_REG |= MI_INTR_MASK_VI; }
-	if ( ( RegModValue & MI_INTR_MASK_CLR_PI ) != 0 ) { _Reg->MI_INTR_MASK_REG &= ~MI_INTR_MASK_PI; }
-	if ( ( RegModValue & MI_INTR_MASK_SET_PI ) != 0 ) { _Reg->MI_INTR_MASK_REG |= MI_INTR_MASK_PI; }
-	if ( ( RegModValue & MI_INTR_MASK_CLR_DP ) != 0 ) { _Reg->MI_INTR_MASK_REG &= ~MI_INTR_MASK_DP; }
-	if ( ( RegModValue & MI_INTR_MASK_SET_DP ) != 0 ) { _Reg->MI_INTR_MASK_REG |= MI_INTR_MASK_DP; }
+	if ( ( RegModValue & MI_INTR_MASK_CLR_SP ) != 0 ) { g_Reg->MI_INTR_MASK_REG &= ~MI_INTR_MASK_SP; }
+	if ( ( RegModValue & MI_INTR_MASK_SET_SP ) != 0 ) { g_Reg->MI_INTR_MASK_REG |= MI_INTR_MASK_SP; }
+	if ( ( RegModValue & MI_INTR_MASK_CLR_SI ) != 0 ) { g_Reg->MI_INTR_MASK_REG &= ~MI_INTR_MASK_SI; }
+	if ( ( RegModValue & MI_INTR_MASK_SET_SI ) != 0 ) { g_Reg->MI_INTR_MASK_REG |= MI_INTR_MASK_SI; }
+	if ( ( RegModValue & MI_INTR_MASK_CLR_AI ) != 0 ) { g_Reg->MI_INTR_MASK_REG &= ~MI_INTR_MASK_AI; }
+	if ( ( RegModValue & MI_INTR_MASK_SET_AI ) != 0 ) { g_Reg->MI_INTR_MASK_REG |= MI_INTR_MASK_AI; }
+	if ( ( RegModValue & MI_INTR_MASK_CLR_VI ) != 0 ) { g_Reg->MI_INTR_MASK_REG &= ~MI_INTR_MASK_VI; }
+	if ( ( RegModValue & MI_INTR_MASK_SET_VI ) != 0 ) { g_Reg->MI_INTR_MASK_REG |= MI_INTR_MASK_VI; }
+	if ( ( RegModValue & MI_INTR_MASK_CLR_PI ) != 0 ) { g_Reg->MI_INTR_MASK_REG &= ~MI_INTR_MASK_PI; }
+	if ( ( RegModValue & MI_INTR_MASK_SET_PI ) != 0 ) { g_Reg->MI_INTR_MASK_REG |= MI_INTR_MASK_PI; }
+	if ( ( RegModValue & MI_INTR_MASK_CLR_DP ) != 0 ) { g_Reg->MI_INTR_MASK_REG &= ~MI_INTR_MASK_DP; }
+	if ( ( RegModValue & MI_INTR_MASK_SET_DP ) != 0 ) { g_Reg->MI_INTR_MASK_REG |= MI_INTR_MASK_DP; }
 }
diff --git a/Source/Project64/N64 System/Mips/Pif Ram.cpp b/Source/Project64/N64 System/Mips/Pif Ram.cpp
index 35b734615..29bfc0584 100644
--- a/Source/Project64/N64 System/Mips/Pif Ram.cpp	
+++ b/Source/Project64/N64 System/Mips/Pif Ram.cpp	
@@ -144,9 +144,9 @@ void CPifRam::PifRamWrite (void) {
 			break;
 		case 0x08: 
 			m_PifRam[0x3F] = 0; 
-			_Reg->MI_INTR_REG |= MI_INTR_SI;
-			_Reg->SI_STATUS_REG |= SI_STATUS_INTERRUPT;
-			_Reg->CheckInterrupts();
+			g_Reg->MI_INTR_REG |= MI_INTR_SI;
+			g_Reg->SI_STATUS_REG |= SI_STATUS_INTERRUPT;
+			g_Reg->CheckInterrupts();
 			break;
 		case 0x10:
 			memset(m_PifRom,0,0x7C0);
@@ -206,7 +206,7 @@ void CPifRam::SI_DMA_READ (void)
 	BYTE * PifRamPos = m_PifRam;
 	BYTE * RDRAM = g_MMU->Rdram();
 	
-	DWORD & SI_DRAM_ADDR_REG = _Reg->SI_DRAM_ADDR_REG;
+	DWORD & SI_DRAM_ADDR_REG = g_Reg->SI_DRAM_ADDR_REG;
 	if ((int)SI_DRAM_ADDR_REG > (int)RdramSize()) 
 	{
 		if (bShowPifRamErrors()) 
@@ -288,9 +288,9 @@ void CPifRam::SI_DMA_READ (void)
 	if (bDelaySI()) {
 		_SystemTimer->SetTimer(CSystemTimer::SiTimer,0x900,false);
 	} else {
-		_Reg->MI_INTR_REG |= MI_INTR_SI;
-		_Reg->SI_STATUS_REG |= SI_STATUS_INTERRUPT;
-		_Reg->CheckInterrupts();
+		g_Reg->MI_INTR_REG |= MI_INTR_SI;
+		g_Reg->SI_STATUS_REG |= SI_STATUS_INTERRUPT;
+		g_Reg->CheckInterrupts();
 	}
 }
 
@@ -298,7 +298,7 @@ void CPifRam::SI_DMA_WRITE (void)
 {
 	BYTE * PifRamPos = m_PifRam;
 	
-	DWORD & SI_DRAM_ADDR_REG = _Reg->SI_DRAM_ADDR_REG;
+	DWORD & SI_DRAM_ADDR_REG = g_Reg->SI_DRAM_ADDR_REG;
 	if ((int)SI_DRAM_ADDR_REG > (int)RdramSize()) 
 	{
 		if (bShowPifRamErrors()) 
@@ -384,9 +384,9 @@ void CPifRam::SI_DMA_WRITE (void)
 	if (bDelaySI()) {
 		_SystemTimer->SetTimer(CSystemTimer::SiTimer,0x900,false);
 	} else {
-		_Reg->MI_INTR_REG |= MI_INTR_SI;
-		_Reg->SI_STATUS_REG |= SI_STATUS_INTERRUPT;
-		_Reg->CheckInterrupts();
+		g_Reg->MI_INTR_REG |= MI_INTR_SI;
+		g_Reg->SI_STATUS_REG |= SI_STATUS_INTERRUPT;
+		g_Reg->CheckInterrupts();
 	}
 }
 
diff --git a/Source/Project64/N64 System/Mips/System Events.cpp b/Source/Project64/N64 System/Mips/System Events.cpp
index 96b08aecf..e26dd9bea 100644
--- a/Source/Project64/N64 System/Mips/System Events.cpp	
+++ b/Source/Project64/N64 System/Mips/System Events.cpp	
@@ -47,8 +47,8 @@ void CSystemEvents::ExecuteEvents ( void )
 		case SysEvent_ResetCPU_Soft:
 			_SystemTimer->SetTimer(CSystemTimer::SoftResetTimer,0x3000000,false);
 			_Plugins->Gfx()->ShowCFB();
-			_Reg->FAKE_CAUSE_REGISTER |= CAUSE_IP4;
-			_Reg->CheckInterrupts();
+			g_Reg->FAKE_CAUSE_REGISTER |= CAUSE_IP4;
+			g_Reg->CheckInterrupts();
 			_Plugins->Gfx()->SoftReset();
 			break;
 		case SysEvent_ResetCPU_SoftDone:
@@ -65,31 +65,31 @@ void CSystemEvents::ExecuteEvents ( void )
 			g_System->m_Profile.ResetCounters();
 			break;
 		case SysEvent_ExecuteInterrupt:
-			_Reg->DoIntrException(false);
+			g_Reg->DoIntrException(false);
 			break;
 		case SysEvent_Interrupt_SP:
-			_Reg->MI_INTR_REG |= MI_INTR_SP;
-			_Reg->DoIntrException(false);
+			g_Reg->MI_INTR_REG |= MI_INTR_SP;
+			g_Reg->DoIntrException(false);
 			break;
 		case SysEvent_Interrupt_SI:
-			_Reg->MI_INTR_REG |= MI_INTR_SI;
-			_Reg->DoIntrException(false);
+			g_Reg->MI_INTR_REG |= MI_INTR_SI;
+			g_Reg->DoIntrException(false);
 			break;
 		case SysEvent_Interrupt_AI:
-			_Reg->MI_INTR_REG |= MI_INTR_AI;
-			_Reg->DoIntrException(false);
+			g_Reg->MI_INTR_REG |= MI_INTR_AI;
+			g_Reg->DoIntrException(false);
 			break;
 		case SysEvent_Interrupt_VI:
-			_Reg->MI_INTR_REG |= MI_INTR_VI;
-			_Reg->DoIntrException(false);
+			g_Reg->MI_INTR_REG |= MI_INTR_VI;
+			g_Reg->DoIntrException(false);
 			break;
 		case SysEvent_Interrupt_PI:
-			_Reg->MI_INTR_REG |= MI_INTR_PI;
-			_Reg->DoIntrException(false);
+			g_Reg->MI_INTR_REG |= MI_INTR_PI;
+			g_Reg->DoIntrException(false);
 			break;
 		case SysEvent_Interrupt_DP:
-			_Reg->MI_INTR_REG |= MI_INTR_DP;
-			_Reg->DoIntrException(false);
+			g_Reg->MI_INTR_REG |= MI_INTR_DP;
+			g_Reg->DoIntrException(false);
 			break;
 		case SysEvent_SaveMachineState:
 			if (!g_System->SaveState()) 
diff --git a/Source/Project64/N64 System/Mips/System Timing.cpp b/Source/Project64/N64 System/Mips/System Timing.cpp
index 423c47b91..408bb0110 100644
--- a/Source/Project64/N64 System/Mips/System Timing.cpp	
+++ b/Source/Project64/N64 System/Mips/System Timing.cpp	
@@ -144,11 +144,11 @@ void CSystemTimer::UpdateTimers ( void )
 	if (TimeTaken != 0)
 	{
 		m_LastUpdate = m_NextTimer;
-		_Reg->COUNT_REGISTER += TimeTaken;
-		_Reg->RANDOM_REGISTER -= TimeTaken / CountPerOp();
-		while ((int)_Reg->RANDOM_REGISTER < (int)_Reg->WIRED_REGISTER) 
+		g_Reg->COUNT_REGISTER += TimeTaken;
+		g_Reg->RANDOM_REGISTER -= TimeTaken / CountPerOp();
+		while ((int)g_Reg->RANDOM_REGISTER < (int)g_Reg->WIRED_REGISTER) 
 		{
-			_Reg->RANDOM_REGISTER += 32 - _Reg->WIRED_REGISTER;
+			g_Reg->RANDOM_REGISTER += 32 - g_Reg->WIRED_REGISTER;
 		}
 	}
 }
@@ -169,8 +169,8 @@ void CSystemTimer::TimerDone (void)
 */
 	switch (m_Current) {
 	case CSystemTimer::CompareTimer:
-		_Reg->FAKE_CAUSE_REGISTER |= CAUSE_IP7;
-		_Reg->CheckInterrupts();
+		g_Reg->FAKE_CAUSE_REGISTER |= CAUSE_IP7;
+		g_Reg->CheckInterrupts();
 		UpdateCompareTimer();
 		break;
 	case CSystemTimer::SoftResetTimer:
@@ -179,15 +179,15 @@ void CSystemTimer::TimerDone (void)
 		break;
 	case CSystemTimer::SiTimer:
 		_SystemTimer->StopTimer(CSystemTimer::SiTimer);
-		_Reg->MI_INTR_REG |= MI_INTR_SI;
-		_Reg->SI_STATUS_REG |= SI_STATUS_INTERRUPT;
-		_Reg->CheckInterrupts();
+		g_Reg->MI_INTR_REG |= MI_INTR_SI;
+		g_Reg->SI_STATUS_REG |= SI_STATUS_INTERRUPT;
+		g_Reg->CheckInterrupts();
 		break;
 	case CSystemTimer::PiTimer:
 		_SystemTimer->StopTimer(CSystemTimer::PiTimer);
-		_Reg->PI_STATUS_REG &= ~PI_STATUS_DMA_BUSY;
-		_Reg->MI_INTR_REG |= MI_INTR_PI;
-		_Reg->CheckInterrupts();
+		g_Reg->PI_STATUS_REG &= ~PI_STATUS_DMA_BUSY;
+		g_Reg->MI_INTR_REG |= MI_INTR_PI;
+		g_Reg->CheckInterrupts();
 		break;
 	case CSystemTimer::ViTimer:
 		try
@@ -198,8 +198,8 @@ void CSystemTimer::TimerDone (void)
 		{
 			WriteTraceF(TraceError,"Exception caught in Refresh Screen\nFile: %s\nLine: %d",__FILE__,__LINE__);
 		}
-		_Reg->MI_INTR_REG |= MI_INTR_VI;
-		_Reg->CheckInterrupts();
+		g_Reg->MI_INTR_REG |= MI_INTR_VI;
+		g_Reg->CheckInterrupts();
 		break;
 	case CSystemTimer::RspTimer:
 		_SystemTimer->StopTimer(CSystemTimer::RspTimer);
@@ -211,8 +211,8 @@ void CSystemTimer::TimerDone (void)
 		break;
 	case CSystemTimer::RSPTimerDlist:
 		_SystemTimer->StopTimer(CSystemTimer::RSPTimerDlist);
-		_Reg->m_GfxIntrReg |= MI_INTR_DP;
-		_Reg->CheckInterrupts();
+		g_Reg->m_GfxIntrReg |= MI_INTR_DP;
+		g_Reg->CheckInterrupts();
 		break;
 	case CSystemTimer::AiTimer:
 		_SystemTimer->StopTimer(CSystemTimer::AiTimer);
@@ -230,9 +230,9 @@ void CSystemTimer::TimerDone (void)
 void CSystemTimer::SetCompareTimer ( void )
 {
 	DWORD NextCompare = 0x7FFFFFFF;
-	if (_Reg)
+	if (g_Reg)
 	{
-		NextCompare = _Reg->COMPARE_REGISTER - _Reg->COUNT_REGISTER;
+		NextCompare = g_Reg->COMPARE_REGISTER - g_Reg->COUNT_REGISTER;
 		if ((NextCompare & 0x80000000) != 0) 
 		{
 			NextCompare = 0x7FFFFFFF; 
diff --git a/Source/Project64/N64 System/Mips/TLB class.cpp b/Source/Project64/N64 System/Mips/TLB class.cpp
index e76d2c09b..ba752a9a5 100644
--- a/Source/Project64/N64 System/Mips/TLB class.cpp	
+++ b/Source/Project64/N64 System/Mips/TLB class.cpp	
@@ -60,7 +60,7 @@ void CTLB::Probe (void) {
 	int Counter;
 	
 	WriteTrace(TraceTLB,"TLB Probe");
-	_Reg->INDEX_REGISTER |= 0x80000000;
+	g_Reg->INDEX_REGISTER |= 0x80000000;
 	for (Counter = 0; Counter < 32; Counter ++) 
 	{
 		if (!m_tlb[Counter].EntryDefined)
@@ -71,13 +71,13 @@ void CTLB::Probe (void) {
 		DWORD & TlbEntryHiValue = m_tlb[Counter].EntryHi.Value;
 		DWORD Mask = ~m_tlb[Counter].PageMask.Mask << 13;
 		DWORD TlbValueMasked = TlbEntryHiValue & Mask;
-		DWORD EntryHiMasked = _Reg->ENTRYHI_REGISTER & Mask;
+		DWORD EntryHiMasked = g_Reg->ENTRYHI_REGISTER & Mask;
 
 		if (TlbValueMasked == EntryHiMasked) {			
 			if ((TlbEntryHiValue & 0x100) != 0 || //Global
-				((TlbEntryHiValue & 0xFF) == (_Reg->ENTRYHI_REGISTER & 0xFF))) //SameAsid 
+				((TlbEntryHiValue & 0xFF) == (g_Reg->ENTRYHI_REGISTER & 0xFF))) //SameAsid 
 			{
-				_Reg->INDEX_REGISTER = Counter;
+				g_Reg->INDEX_REGISTER = Counter;
 				int FastIndx = Counter << 1;
 				m_FastTlb[FastIndx].Probed = true;
 				m_FastTlb[FastIndx + 1].Probed = true;
@@ -88,18 +88,18 @@ void CTLB::Probe (void) {
 }
 
 void CTLB::ReadEntry (void) {
-	DWORD index = _Reg->INDEX_REGISTER & 0x1F;
+	DWORD index = g_Reg->INDEX_REGISTER & 0x1F;
 
-	_Reg->PAGE_MASK_REGISTER = m_tlb[index].PageMask.Value ;
-	_Reg->ENTRYHI_REGISTER = (m_tlb[index].EntryHi.Value & ~m_tlb[index].PageMask.Value) ;
-	_Reg->ENTRYLO0_REGISTER = m_tlb[index].EntryLo0.Value;
-	_Reg->ENTRYLO1_REGISTER = m_tlb[index].EntryLo1.Value;		
+	g_Reg->PAGE_MASK_REGISTER = m_tlb[index].PageMask.Value ;
+	g_Reg->ENTRYHI_REGISTER = (m_tlb[index].EntryHi.Value & ~m_tlb[index].PageMask.Value) ;
+	g_Reg->ENTRYLO0_REGISTER = m_tlb[index].EntryLo0.Value;
+	g_Reg->ENTRYLO1_REGISTER = m_tlb[index].EntryLo1.Value;		
 }
 
 void CTLB::WriteEntry (int index, bool Random) {
 	int FastIndx;
 
-	WriteTraceF(TraceTLB,"Write Entry %02d %d %08X %08X %08X %08X ",index,Random,_Reg->PAGE_MASK_REGISTER,_Reg->ENTRYHI_REGISTER,_Reg->ENTRYLO0_REGISTER,_Reg->ENTRYLO1_REGISTER);
+	WriteTraceF(TraceTLB,"Write Entry %02d %d %08X %08X %08X %08X ",index,Random,g_Reg->PAGE_MASK_REGISTER,g_Reg->ENTRYHI_REGISTER,g_Reg->ENTRYLO0_REGISTER,g_Reg->ENTRYLO1_REGISTER);
 
 	//Check to see if entry is unmapping it self
 	if (m_tlb[index].EntryDefined) {
@@ -126,13 +126,13 @@ void CTLB::WriteEntry (int index, bool Random) {
 		for ( FastIndx = index << 1; FastIndx <= (index << 1) + 1; FastIndx++) {
 			if (!m_FastTlb[FastIndx].ValidEntry) { continue; }
 			if (!m_FastTlb[FastIndx].VALID) { continue; }
-			if (m_tlb[index].PageMask.Value == _Reg->PAGE_MASK_REGISTER &&
-				m_tlb[index].EntryHi.Value == _Reg->ENTRYHI_REGISTER) 
+			if (m_tlb[index].PageMask.Value == g_Reg->PAGE_MASK_REGISTER &&
+				m_tlb[index].EntryHi.Value == g_Reg->ENTRYHI_REGISTER) 
 			{
-				if (FastIndx == (index << 1) && m_tlb[index].EntryLo0.Value == _Reg->ENTRYLO0_REGISTER) {
+				if (FastIndx == (index << 1) && m_tlb[index].EntryLo0.Value == g_Reg->ENTRYLO0_REGISTER) {
 					continue;
 				}
-				if (FastIndx != (index << 1) && m_tlb[index].EntryLo1.Value == _Reg->ENTRYLO1_REGISTER) {
+				if (FastIndx != (index << 1) && m_tlb[index].EntryLo1.Value == g_Reg->ENTRYLO1_REGISTER) {
 					continue;
 				}
 			}
@@ -141,10 +141,10 @@ void CTLB::WriteEntry (int index, bool Random) {
 	}
 	
 	//fill in m_tlb entry
-	m_tlb[index].PageMask.Value = _Reg->PAGE_MASK_REGISTER;
-	m_tlb[index].EntryHi.Value = _Reg->ENTRYHI_REGISTER;
-	m_tlb[index].EntryLo0.Value = _Reg->ENTRYLO0_REGISTER;
-	m_tlb[index].EntryLo1.Value = _Reg->ENTRYLO1_REGISTER;
+	m_tlb[index].PageMask.Value = g_Reg->PAGE_MASK_REGISTER;
+	m_tlb[index].EntryHi.Value = g_Reg->ENTRYHI_REGISTER;
+	m_tlb[index].EntryLo0.Value = g_Reg->ENTRYLO0_REGISTER;
+	m_tlb[index].EntryLo1.Value = g_Reg->ENTRYLO1_REGISTER;
 	m_tlb[index].EntryDefined = true;
 	SetupTLB_Entry(index,Random);
 	m_CB->TLB_Changed();
diff --git a/Source/Project64/N64 System/N64 Class.cpp b/Source/Project64/N64 System/N64 Class.cpp
index 9b8a0c81a..d8301334a 100644
--- a/Source/Project64/N64 System/N64 Class.cpp	
+++ b/Source/Project64/N64 System/N64 Class.cpp	
@@ -529,7 +529,7 @@ bool CN64System::SetActiveSystem( bool bActive )
 		g_Recompiler   = m_Recomp;
 		g_MMU          = &m_MMU_VM;
 		g_TLB          = &m_TLB;
-		_Reg          = &m_Reg;
+		g_Reg          = &m_Reg;
 		_Audio        = &m_Audio;
 		//_Labels       = NULL; //???
 		_SystemTimer  = &m_SystemTimer;
@@ -561,7 +561,7 @@ bool CN64System::SetActiveSystem( bool bActive )
 			g_Recompiler      = NULL;
 			g_MMU             = NULL;
 			g_TLB             = NULL;
-			_Reg             = NULL;
+			g_Reg             = NULL;
 			_Audio           = NULL;
 			_Labels          = NULL;
 			_SystemTimer     = NULL;
@@ -1205,7 +1205,7 @@ bool CN64System::SaveState(void)
 
 	DWORD dwWritten, SaveID_0 = 0x23D8A6C8, SaveID_1 = 0x56D2CD23;
 	DWORD RdramSize   = g_Settings->LoadDword(Game_RDRamSize);
-	DWORD MiInterReg  = _Reg->MI_INTR_REG;
+	DWORD MiInterReg  = g_Reg->MI_INTR_REG;
 	DWORD NextViTimer = m_SystemTimer.GetTimer(CSystemTimer::ViTimer);
 	if (g_Settings->LoadDword(Setting_AutoZipInstantSave)) {
 		zipFile			file;
@@ -1597,7 +1597,7 @@ void CN64System::RunRSP ( void ) {
 				_SystemTimer->SetTimer(CSystemTimer::RspTimer,0x200,false);
 			}
 			WriteTrace(TraceRSP, "RunRSP: check interrupts");
-			_Reg->CheckInterrupts();
+			g_Reg->CheckInterrupts();
 		}
 	}
 }
diff --git a/Source/Project64/N64 System/Recompiler/Code Section.cpp b/Source/Project64/N64 System/Recompiler/Code Section.cpp
index d8f00e671..1a420f1a3 100644
--- a/Source/Project64/N64 System/Recompiler/Code Section.cpp	
+++ b/Source/Project64/N64 System/Recompiler/Code Section.cpp	
@@ -125,7 +125,7 @@ void CCodeSection::CompileExit ( DWORD JumpPC, DWORD TargetPC, CRegInfo &ExitReg
 
 	if (TargetPC != (DWORD)-1) 
 	{
-		MoveConstToVariable(TargetPC,&_Reg->m_PROGRAM_COUNTER,"PROGRAM_COUNTER"); 
+		MoveConstToVariable(TargetPC,&g_Reg->m_PROGRAM_COUNTER,"PROGRAM_COUNTER"); 
 		UpdateCounters(ExitRegSet,TargetPC <= JumpPC && JumpPC != -1, reason == CExitInfo::Normal);
 	} else {
 		UpdateCounters(ExitRegSet,false,reason == CExitInfo::Normal);
@@ -255,7 +255,7 @@ void CCodeSection::CompileExit ( DWORD JumpPC, DWORD TargetPC, CRegInfo &ExitReg
 		{
 			bool bDelay = m_NextInstruction == JUMP || m_NextInstruction == DELAY_SLOT;
 			PushImm32(bDelay ? "true" : "false", bDelay);
-			MoveConstToX86reg((DWORD)_Reg,x86_ECX);		
+			MoveConstToX86reg((DWORD)g_Reg,x86_ECX);		
 			Call_Direct(AddressOf(&CRegisters::DoSysCallException), "CRegisters::DoSysCallException");
 			if (g_SyncSystem) {
 				MoveConstToX86reg((DWORD)g_BaseSystem,x86_ECX);
@@ -269,7 +269,7 @@ void CCodeSection::CompileExit ( DWORD JumpPC, DWORD TargetPC, CRegInfo &ExitReg
 			bool bDelay = m_NextInstruction == JUMP || m_NextInstruction == DELAY_SLOT;
 			PushImm32("1",1);
 			PushImm32(bDelay ? "true" : "false", bDelay);
-			MoveConstToX86reg((DWORD)_Reg,x86_ECX);		
+			MoveConstToX86reg((DWORD)g_Reg,x86_ECX);		
 			Call_Direct(AddressOf(&CRegisters::DoCopUnusableException), "CRegisters::DoCopUnusableException");
 			if (g_SyncSystem) { 
 				MoveConstToX86reg((DWORD)g_BaseSystem,x86_ECX);
@@ -298,7 +298,7 @@ void CCodeSection::CompileExit ( DWORD JumpPC, DWORD TargetPC, CRegInfo &ExitReg
 		MoveVariableToX86reg(_TLBLoadAddress,"_TLBLoadAddress",x86_EDX);
 		Push(x86_EDX);
 		PushImm32(m_NextInstruction == JUMP || m_NextInstruction == DELAY_SLOT);
-		MoveConstToX86reg((DWORD)_Reg,x86_ECX);
+		MoveConstToX86reg((DWORD)g_Reg,x86_ECX);
 		Call_Direct(AddressOf(&CRegisters::DoTLBReadMiss),"CRegisters::DoTLBReadMiss");
 		if (g_SyncSystem) {
 			MoveConstToX86reg((DWORD)g_BaseSystem,x86_ECX);
@@ -844,7 +844,7 @@ void CCodeSection::SetContinueAddress (DWORD JumpPC, DWORD TargetPC)
 
 void CCodeSection::CompileCop1Test (void) {
 	if (m_RegWorkingSet.FpuBeenUsed()) { return; }
-	TestVariable(STATUS_CU1,&_Reg->STATUS_REGISTER,"STATUS_REGISTER");
+	TestVariable(STATUS_CU1,&g_Reg->STATUS_REGISTER,"STATUS_REGISTER");
 	CompileExit(m_CompilePC,m_CompilePC,m_RegWorkingSet,CExitInfo::COP1_Unuseable,FALSE,JeLabel32);
 	m_RegWorkingSet.FpuBeenUsed() = TRUE;
 }
@@ -936,7 +936,7 @@ bool CCodeSection::GenerateX86Code ( DWORD Test )
 		{
 			m_RegWorkingSet.WriteBackRegisters();
 			UpdateCounters(m_RegWorkingSet,false,true);
-			MoveConstToVariable(m_CompilePC,&_Reg->m_PROGRAM_COUNTER,"PROGRAM_COUNTER");
+			MoveConstToVariable(m_CompilePC,&g_Reg->m_PROGRAM_COUNTER,"PROGRAM_COUNTER");
 			if (g_SyncSystem) { 
 				MoveConstToX86reg((DWORD)g_BaseSystem,x86_ECX);
 				Call_Direct(AddressOf(&CN64System::SyncSystem), "CN64System::SyncSystem"); 
@@ -949,7 +949,7 @@ bool CCodeSection::GenerateX86Code ( DWORD Test )
 		{
 			m_RegWorkingSet.WriteBackRegisters();
 			UpdateCounters(m_RegWorkingSet,false,true);
-			MoveConstToVariable(m_CompilePC,&_Reg->m_PROGRAM_COUNTER,"PROGRAM_COUNTER");
+			MoveConstToVariable(m_CompilePC,&g_Reg->m_PROGRAM_COUNTER,"PROGRAM_COUNTER");
 			if (g_SyncSystem) { 
 				MoveConstToX86reg((DWORD)g_BaseSystem,x86_ECX);
 				Call_Direct(AddressOf(&CN64System::SyncSystem), "CN64System::SyncSystem"); 
@@ -966,7 +966,7 @@ bool CCodeSection::GenerateX86Code ( DWORD Test )
 		/*if (m_CompilePC >= 0x801C1AF8 && m_CompilePC <= 0x801C1C00 && m_NextInstruction == NORMAL)
 		{
 			UpdateCounters(m_RegWorkingSet,false,true);
-			MoveConstToVariable(m_CompilePC,&_Reg->m_PROGRAM_COUNTER,"PROGRAM_COUNTER");
+			MoveConstToVariable(m_CompilePC,&g_Reg->m_PROGRAM_COUNTER,"PROGRAM_COUNTER");
 			if (g_SyncSystem) { 
 				BeforeCallDirect(m_RegWorkingSet);
 				MoveConstToX86reg((DWORD)g_BaseSystem,x86_ECX);
@@ -984,7 +984,7 @@ bool CCodeSection::GenerateX86Code ( DWORD Test )
 		{
 			m_RegWorkingSet.WriteBackRegisters();
 			UpdateCounters(m_RegWorkingSet,false,true);
-			MoveConstToVariable(m_CompilePC,&_Reg->m_PROGRAM_COUNTER,"PROGRAM_COUNTER");
+			MoveConstToVariable(m_CompilePC,&g_Reg->m_PROGRAM_COUNTER,"PROGRAM_COUNTER");
 			if (g_SyncSystem) { 
 				MoveConstToX86reg((DWORD)g_BaseSystem,x86_ECX);
 				Call_Direct(AddressOf(&CN64System::SyncSystem), "CN64System::SyncSystem"); 
@@ -999,7 +999,7 @@ bool CCodeSection::GenerateX86Code ( DWORD Test )
 		{
 			m_RegWorkingSet.WriteBackRegisters();
 			UpdateCounters(m_RegWorkingSet,false,true);
-			MoveConstToVariable(m_CompilePC,&_Reg->m_PROGRAM_COUNTER,"PROGRAM_COUNTER");
+			MoveConstToVariable(m_CompilePC,&g_Reg->m_PROGRAM_COUNTER,"PROGRAM_COUNTER");
 			if (g_SyncSystem) { 
 				MoveConstToX86reg((DWORD)g_BaseSystem,x86_ECX);
 				Call_Direct(AddressOf(&CN64System::SyncSystem), "CN64System::SyncSystem");
@@ -1009,7 +1009,7 @@ bool CCodeSection::GenerateX86Code ( DWORD Test )
 		{
 			m_RegWorkingSet.WriteBackRegisters();
 			UpdateCounters(m_RegWorkingSet,false,true);
-			MoveConstToVariable(m_CompilePC,&_Reg->m_PROGRAM_COUNTER,"PROGRAM_COUNTER");
+			MoveConstToVariable(m_CompilePC,&g_Reg->m_PROGRAM_COUNTER,"PROGRAM_COUNTER");
 			if (g_SyncSystem) {
 					MoveConstToX86reg((DWORD)g_BaseSystem,x86_ECX);
 					Call_Direct(AddressOf(&CN64System::SyncSystem), "CN64System::SyncSystem");
diff --git a/Source/Project64/N64 System/Recompiler/Recompiler Class.cpp b/Source/Project64/N64 System/Recompiler/Recompiler Class.cpp
index d6c027b84..87ff47a7e 100644
--- a/Source/Project64/N64 System/Recompiler/Recompiler Class.cpp	
+++ b/Source/Project64/N64 System/Recompiler/Recompiler Class.cpp	
@@ -2,7 +2,7 @@
 
 CRecompiler::CRecompiler(CProfiling & Profile, bool & EndEmulation ) :
 	m_Profile(Profile),
-	PROGRAM_COUNTER(_Reg->m_PROGRAM_COUNTER),
+	PROGRAM_COUNTER(g_Reg->m_PROGRAM_COUNTER),
 	m_EndEmulation(EndEmulation)
 {
 	ResetMemoryStackPos();
@@ -85,7 +85,7 @@ void CRecompiler::RecompilerMain_VirtualTable ( void )
 	{
 		if (!_TransVaddr->ValidVaddr(PC)) 
 		{
-			_Reg->DoTLBReadMiss(false,PC);
+			g_Reg->DoTLBReadMiss(false,PC);
 			if (!_TransVaddr->ValidVaddr(PC)) 
 			{
 				g_Notify->DisplayError("Failed to translate PC to a PAddr: %X\n\nEmulation stopped",PC);
@@ -504,7 +504,7 @@ void CRecompiler::RecompilerMain_Lookup_TLB( void )
 	{
 		if (!_TransVaddr->TranslateVaddr(PROGRAM_COUNTER, PhysicalAddr))
 		{
-			_Reg->DoTLBReadMiss(false,PROGRAM_COUNTER);
+			g_Reg->DoTLBReadMiss(false,PROGRAM_COUNTER);
 			if (!_TransVaddr->TranslateVaddr(PROGRAM_COUNTER, PhysicalAddr))
 			{
 				g_Notify->DisplayError("Failed to translate PC to a PAddr: %X\n\nEmulation stopped",PROGRAM_COUNTER);
@@ -604,7 +604,7 @@ void CRecompiler::RecompilerMain_Lookup_validate_TLB( void )
 	{
 		if (!_TransVaddr->TranslateVaddr(PROGRAM_COUNTER, PhysicalAddr))
 		{
-			_Reg->DoTLBReadMiss(false,PROGRAM_COUNTER);
+			g_Reg->DoTLBReadMiss(false,PROGRAM_COUNTER);
 			if (!_TransVaddr->TranslateVaddr(PROGRAM_COUNTER, PhysicalAddr))
 			{
 				g_Notify->DisplayError("Failed to translate PC to a PAddr: %X\n\nEmulation stopped",PROGRAM_COUNTER);
@@ -974,18 +974,18 @@ void CRecompiler::ClearRecompCode_Virt(DWORD Address, int length,REMOVE_REASON R
 
 void CRecompiler::ResetMemoryStackPos( void ) 
 {
-	if (_Reg->m_GPR[29].UW[0] == 0)
+	if (g_Reg->m_GPR[29].UW[0] == 0)
 	{
 		m_MemoryStack = NULL;
 		return;
 	}
-	if (g_MMU == NULL || _Reg == NULL)
+	if (g_MMU == NULL || g_Reg == NULL)
 	{
 		g_Notify->BreakPoint(__FILE__,__LINE__);
 	}
-	if (_Reg->m_GPR[29].UW[0] < 0x80000000 || _Reg->m_GPR[29].UW[0] >= 0xC0000000)
+	if (g_Reg->m_GPR[29].UW[0] < 0x80000000 || g_Reg->m_GPR[29].UW[0] >= 0xC0000000)
 	{
 		g_Notify->BreakPoint(__FILE__,__LINE__);
 	}
-	m_MemoryStack = (DWORD)(g_MMU->Rdram() + (_Reg->m_GPR[29].UW[0] & 0x1FFFFFFF));
+	m_MemoryStack = (DWORD)(g_MMU->Rdram() + (g_Reg->m_GPR[29].UW[0] & 0x1FFFFFFF));
 }
diff --git a/Source/Project64/N64 System/Recompiler/Recompiler Ops.cpp b/Source/Project64/N64 System/Recompiler/Recompiler Ops.cpp
index f72155fd3..55b355163 100644
--- a/Source/Project64/N64 System/Recompiler/Recompiler Ops.cpp	
+++ b/Source/Project64/N64 System/Recompiler/Recompiler Ops.cpp	
@@ -4053,7 +4053,7 @@ void CRecompilerOps::COP0_MT (void) {
 		} else {
 			MoveX86regToVariable(Map_TempReg(x86_Any,m_Opcode.rt,FALSE), &_CP0[m_Opcode.rd], CRegName::Cop0[m_Opcode.rd]);
 		}
-		AndConstToVariable((DWORD)~CAUSE_IP7,&_Reg->FAKE_CAUSE_REGISTER,"FAKE_CAUSE_REGISTER");
+		AndConstToVariable((DWORD)~CAUSE_IP7,&g_Reg->FAKE_CAUSE_REGISTER,"FAKE_CAUSE_REGISTER");
 		BeforeCallDirect(m_RegWorkingSet);
 		MoveConstToX86reg((DWORD)_SystemTimer,x86_ECX);		
 		Call_Direct(AddressOf(&CSystemTimer::UpdateCompareTimer), "CSystemTimer::UpdateCompareTimer");
@@ -4095,7 +4095,7 @@ void CRecompilerOps::COP0_MT (void) {
 			JeLabel8("FpuFlagFine",0);
 			Jump = m_RecompPos - 1;
 			BeforeCallDirect(m_RegWorkingSet);
-			MoveConstToX86reg((DWORD)_Reg,x86_ECX); 
+			MoveConstToX86reg((DWORD)g_Reg,x86_ECX); 
             Call_Direct(AddressOf(&CRegisters::FixFpuLocations),"CRegisters::FixFpuLocations");
 
 			AfterCallDirect(m_RegWorkingSet);
@@ -4104,7 +4104,7 @@ void CRecompilerOps::COP0_MT (void) {
 			//TestConstToX86Reg(STATUS_FR,OldStatusReg);
 			//BreakPoint(__FILE__,__LINE__); //m_Section->CompileExit(m_CompilePC+4,m_RegWorkingSet,ExitResetRecompCode,FALSE,JneLabel32);
 			BeforeCallDirect(m_RegWorkingSet);
-			MoveConstToX86reg((DWORD)_Reg,x86_ECX);
+			MoveConstToX86reg((DWORD)g_Reg,x86_ECX);
 			Call_Direct(AddressOf(&CRegisters::CheckInterrupts),"CRegisters::CheckInterrupts");
 			AfterCallDirect(m_RegWorkingSet);
 		}
@@ -4135,7 +4135,7 @@ void CRecompilerOps::COP0_MT (void) {
 #endif
 		}
 		BeforeCallDirect(m_RegWorkingSet);
-		MoveConstToX86reg((DWORD)_Reg,x86_ECX);
+		MoveConstToX86reg((DWORD)g_Reg,x86_ECX);
 		Call_Direct(AddressOf(&CRegisters::CheckInterrupts),"CRegisters::CheckInterrupts");
 		AfterCallDirect(m_RegWorkingSet);
 		break;
@@ -4162,7 +4162,7 @@ void CRecompilerOps::COP0_CO_TLBWI( void) {
 	if (!bUseTlb()) {	return; }
 	BeforeCallDirect(m_RegWorkingSet);
 	PushImm32("FALSE",FALSE);
-	MoveVariableToX86reg(&_Reg->INDEX_REGISTER,"INDEX_REGISTER",x86_ECX);
+	MoveVariableToX86reg(&g_Reg->INDEX_REGISTER,"INDEX_REGISTER",x86_ECX);
 	AndConstToX86Reg(x86_ECX,0x1F);
 	Push(x86_ECX);
 	MoveConstToX86reg((DWORD)g_TLB,x86_ECX);
@@ -4182,7 +4182,7 @@ void CRecompilerOps::COP0_CO_TLBWR( void) {
 	Call_Direct(AddressOf(&CSystemTimer::UpdateTimers), "CSystemTimer::UpdateTimers");
 
 	PushImm32("true",true);
-	MoveVariableToX86reg(&_Reg->RANDOM_REGISTER,"RANDOM_REGISTER",x86_ECX);
+	MoveVariableToX86reg(&g_Reg->RANDOM_REGISTER,"RANDOM_REGISTER",x86_ECX);
 	AndConstToX86Reg(x86_ECX,0x1F);
 	Push(x86_ECX);
 	MoveConstToX86reg((DWORD)g_TLB,x86_ECX);
@@ -4201,15 +4201,15 @@ void CRecompilerOps::COP0_CO_TLBP( void) {
 }
 
 void compiler_COP0_CO_ERET (void) {
-	if ((_Reg->STATUS_REGISTER & STATUS_ERL) != 0) {
-		_Reg->m_PROGRAM_COUNTER = _Reg->ERROREPC_REGISTER;
-		_Reg->STATUS_REGISTER &= ~STATUS_ERL;
+	if ((g_Reg->STATUS_REGISTER & STATUS_ERL) != 0) {
+		g_Reg->m_PROGRAM_COUNTER = g_Reg->ERROREPC_REGISTER;
+		g_Reg->STATUS_REGISTER &= ~STATUS_ERL;
 	} else {
-		_Reg->m_PROGRAM_COUNTER = _Reg->EPC_REGISTER;
-		_Reg->STATUS_REGISTER &= ~STATUS_EXL;
+		g_Reg->m_PROGRAM_COUNTER = g_Reg->EPC_REGISTER;
+		g_Reg->STATUS_REGISTER &= ~STATUS_EXL;
 	}
-	_Reg->m_LLBit = 0;
-	_Reg->CheckInterrupts();
+	g_Reg->m_LLBit = 0;
+	g_Reg->CheckInterrupts();
 }
 
 void CRecompilerOps::COP0_CO_ERET( void) {
@@ -5057,7 +5057,7 @@ void CRecompilerOps::UnknownOpcode (void) {
 
 	m_RegWorkingSet.WriteBackRegisters();
 	UpdateCounters(m_RegWorkingSet,false,true);
-	MoveConstToVariable(m_CompilePC,&_Reg->m_PROGRAM_COUNTER,"PROGRAM_COUNTER");
+	MoveConstToVariable(m_CompilePC,&g_Reg->m_PROGRAM_COUNTER,"PROGRAM_COUNTER");
 	if (g_SyncSystem) { 
 		MoveConstToX86reg((DWORD)g_BaseSystem,x86_ECX);
 		Call_Direct(AddressOf(&CN64System::SyncSystem), "CN64System::SyncSystem"); 
@@ -5158,7 +5158,7 @@ void CRecompilerOps::CompileSystemCheck (DWORD TargetPC, const CRegInfo & RegSet
 	DWORD * Jump = (DWORD *)(m_RecompPos - 4);
 	if (TargetPC != (DWORD)-1) 
 	{
-		MoveConstToVariable(TargetPC,&_Reg->m_PROGRAM_COUNTER,"PROGRAM_COUNTER"); 
+		MoveConstToVariable(TargetPC,&g_Reg->m_PROGRAM_COUNTER,"PROGRAM_COUNTER"); 
 	}
 
 	CRegInfo RegSetCopy(RegSet);
diff --git a/Source/Project64/N64 System/Recompiler/Reg Info.cpp b/Source/Project64/N64 System/Recompiler/Reg Info.cpp
index 45d454e1c..7a42e6cd1 100644
--- a/Source/Project64/N64 System/Recompiler/Reg Info.cpp	
+++ b/Source/Project64/N64 System/Recompiler/Reg Info.cpp	
@@ -140,7 +140,7 @@ void CRegInfo::FixRoundModel(FPU_ROUND RoundMethod )
 	if (RoundMethod == RoundDefault)
 	{ 
 		x86Reg RoundReg = Map_TempReg(x86_Any,-1,FALSE);
-		MoveVariableToX86reg(&_Reg->m_RoundingModel,"m_RoundingModel", RoundReg);
+		MoveVariableToX86reg(&g_Reg->m_RoundingModel,"m_RoundingModel", RoundReg);
 		ShiftLeftSignImmed(RoundReg,2);
 		OrX86RegToX86Reg(reg,RoundReg);
 		SetX86Protected(RoundReg,false);
@@ -307,22 +307,22 @@ void CRegInfo::Load_FPR_ToTop ( int Reg, int RegToLoad, FPU_STATE Format)
 		switch (Format) {
 		case FPU_Dword:
 			sprintf(Name,"m_FPR_S[%d]",RegToLoad);
-			MoveVariableToX86reg(&_Reg->m_FPR_S[RegToLoad],Name,TempReg);
+			MoveVariableToX86reg(&g_Reg->m_FPR_S[RegToLoad],Name,TempReg);
 			fpuLoadIntegerDwordFromX86Reg(&StackTopPos(),TempReg);
 			break;
 		case FPU_Qword:
 			sprintf(Name,"m_FPR_D[%d]",RegToLoad);
-			MoveVariableToX86reg(&_Reg->m_FPR_D[RegToLoad],Name,TempReg);
+			MoveVariableToX86reg(&g_Reg->m_FPR_D[RegToLoad],Name,TempReg);
 			fpuLoadIntegerQwordFromX86Reg(&StackTopPos(),TempReg);
 			break;
 		case FPU_Float:
 			sprintf(Name,"m_FPR_S[%d]",RegToLoad);
-			MoveVariableToX86reg(&_Reg->m_FPR_S[RegToLoad],Name,TempReg);
+			MoveVariableToX86reg(&g_Reg->m_FPR_S[RegToLoad],Name,TempReg);
 			fpuLoadDwordFromX86Reg(&StackTopPos(),TempReg);
 			break;
 		case FPU_Double:
 			sprintf(Name,"m_FPR_D[%d]",RegToLoad);
-			MoveVariableToX86reg(&_Reg->m_FPR_D[RegToLoad],Name,TempReg);
+			MoveVariableToX86reg(&g_Reg->m_FPR_D[RegToLoad],Name,TempReg);
 			fpuLoadQwordFromX86Reg(&StackTopPos(),TempReg);
 			break;
 #ifndef EXTERNAL_RELEASE
diff --git a/Source/Project64/N64 System/System Globals.cpp b/Source/Project64/N64 System/System Globals.cpp
index 1d0ead826..dab65aae0 100644
--- a/Source/Project64/N64 System/System Globals.cpp	
+++ b/Source/Project64/N64 System/System Globals.cpp	
@@ -6,7 +6,7 @@ CN64System    * g_SyncSystem = NULL;
 CRecompiler   * g_Recompiler = NULL;
 CMipsMemory   * g_MMU = NULL; //Memory of the n64 
 CTLB          * g_TLB = NULL; //TLB Unit
-CRegisters    * _Reg = NULL; //Current Register Set attacted to the g_MMU
+CRegisters    * g_Reg = NULL; //Current Register Set attacted to the g_MMU
 CNotification * g_Notify = NULL;   
 CPlugins      * _Plugins = NULL;
 CN64Rom       * _Rom = NULL;      //The current rom that this system is executing.. it can only execute one file at the time
diff --git a/Source/Project64/N64 System/System Globals.h b/Source/Project64/N64 System/System Globals.h
index a9e90bc85..54cbabc54 100644
--- a/Source/Project64/N64 System/System Globals.h	
+++ b/Source/Project64/N64 System/System Globals.h	
@@ -7,7 +7,7 @@ extern CN64System    * g_SyncSystem;
 extern CRecompiler   * g_Recompiler;
 extern CMipsMemory   * g_MMU; //Memory of the n64 
 extern CTLB          * g_TLB; //TLB Unit
-extern CRegisters    * _Reg; //Current Register Set attacted to the g_MMU
+extern CRegisters    * g_Reg; //Current Register Set attached to the g_MMU
 extern CPlugins      * _Plugins;
 extern CN64Rom       * _Rom;      //The current rom that this system is executing.. it can only execute one file at the time
 extern CAudio        * _Audio;
diff --git a/Source/Project64/Plugins/Audio Plugin.cpp b/Source/Project64/Plugins/Audio Plugin.cpp
index 72fa39277..83a99cc57 100644
--- a/Source/Project64/Plugins/Audio Plugin.cpp	
+++ b/Source/Project64/Plugins/Audio Plugin.cpp	
@@ -188,13 +188,13 @@ bool CAudioPlugin::Initiate ( CN64System * System, CMainGui * RenderWindow ) {
 	Info.RDRAM             = g_MMU->Rdram();
 	Info.DMEM              = g_MMU->Dmem();
 	Info.IMEM              = g_MMU->Imem();
-	Info.MI__INTR_REG      = &_Reg->m_AudioIntrReg;	
-	Info.AI__DRAM_ADDR_REG = &_Reg->AI_DRAM_ADDR_REG;	
-	Info.AI__LEN_REG       = &_Reg->AI_LEN_REG;	
-	Info.AI__CONTROL_REG   = &_Reg->AI_CONTROL_REG;	
-	Info.AI__STATUS_REG    = &_Reg->AI_STATUS_REG;	
-	Info.AI__DACRATE_REG   = &_Reg->AI_DACRATE_REG;	
-	Info.AI__BITRATE_REG   = &_Reg->AI_BITRATE_REG;	
+	Info.MI__INTR_REG      = &g_Reg->m_AudioIntrReg;	
+	Info.AI__DRAM_ADDR_REG = &g_Reg->AI_DRAM_ADDR_REG;	
+	Info.AI__LEN_REG       = &g_Reg->AI_LEN_REG;	
+	Info.AI__CONTROL_REG   = &g_Reg->AI_CONTROL_REG;	
+	Info.AI__STATUS_REG    = &g_Reg->AI_STATUS_REG;	
+	Info.AI__DACRATE_REG   = &g_Reg->AI_DACRATE_REG;	
+	Info.AI__BITRATE_REG   = &g_Reg->AI_BITRATE_REG;	
 	Info.CheckInterrupts   = DummyCheckInterrupts;
 
 	m_Initilized = InitiateAudio(Info) != 0;
@@ -207,7 +207,7 @@ bool CAudioPlugin::Initiate ( CN64System * System, CMainGui * RenderWindow ) {
 		m_hAudioThread = CreateThread(NULL,0,(LPTHREAD_START_ROUTINE)AudioThread, (LPVOID)this,0, &ThreadID);			
 	}
 	
-	if (_Reg->AI_DACRATE_REG != 0) {
+	if (g_Reg->AI_DACRATE_REG != 0) {
 		DacrateChanged(SYSTEM_NTSC);
 	}
 	return m_Initilized;
@@ -273,8 +273,8 @@ void CAudioPlugin::DacrateChanged  (SystemType Type)
 	if (!Initilized()) { return; }
 	WriteTraceF(TraceAudio,__FUNCTION__ ": SystemType: %s", Type == SYSTEM_NTSC ? "SYSTEM_NTSC" : "SYSTEM_PAL");
 
-	//DWORD Frequency = _Reg->AI_DACRATE_REG * 30;
-	//DWORD CountsPerSecond = (_Reg->VI_V_SYNC_REG != 0 ? (_Reg->VI_V_SYNC_REG + 1) * g_Settings->LoadDword(Game_ViRefreshRate) : 500000) * 60;
+	//DWORD Frequency = g_Reg->AI_DACRATE_REG * 30;
+	//DWORD CountsPerSecond = (g_Reg->VI_V_SYNC_REG != 0 ? (g_Reg->VI_V_SYNC_REG + 1) * g_Settings->LoadDword(Game_ViRefreshRate) : 500000) * 60;
 	m_DacrateChanged(Type);
 }
 
diff --git a/Source/Project64/Plugins/GFX plugin.cpp b/Source/Project64/Plugins/GFX plugin.cpp
index 96e802104..0d4aa4aa7 100644
--- a/Source/Project64/Plugins/GFX plugin.cpp	
+++ b/Source/Project64/Plugins/GFX plugin.cpp	
@@ -254,29 +254,29 @@ bool CGfxPlugin::Initiate ( CN64System * System, CMainGui * RenderWindow ) {
 	Info.RDRAM                  = g_MMU->Rdram();
 	Info.DMEM                   = g_MMU->Dmem();
 	Info.IMEM                   = g_MMU->Imem();
-	Info.MI__INTR_REG           = &_Reg->m_GfxIntrReg;	
-	Info.DPC__START_REG         = &_Reg->DPC_START_REG;
-	Info.DPC__END_REG           = &_Reg->DPC_END_REG;
-	Info.DPC__CURRENT_REG       = &_Reg->DPC_CURRENT_REG;
-	Info.DPC__STATUS_REG        = &_Reg->DPC_STATUS_REG;
-	Info.DPC__CLOCK_REG         = &_Reg->DPC_CLOCK_REG;
-	Info.DPC__BUFBUSY_REG       = &_Reg->DPC_BUFBUSY_REG;
-	Info.DPC__PIPEBUSY_REG      = &_Reg->DPC_PIPEBUSY_REG;
-	Info.DPC__TMEM_REG          = &_Reg->DPC_TMEM_REG;
-	Info.VI__STATUS_REG         = &_Reg->VI_STATUS_REG;
-	Info.VI__ORIGIN_REG         = &_Reg->VI_ORIGIN_REG;
-	Info.VI__WIDTH_REG          = &_Reg->VI_WIDTH_REG;
-	Info.VI__INTR_REG           = &_Reg->VI_INTR_REG;
-	Info.VI__V_CURRENT_LINE_REG = &_Reg->VI_CURRENT_REG;
-	Info.VI__TIMING_REG         = &_Reg->VI_TIMING_REG;
-	Info.VI__V_SYNC_REG         = &_Reg->VI_V_SYNC_REG;
-	Info.VI__H_SYNC_REG         = &_Reg->VI_H_SYNC_REG;
-	Info.VI__LEAP_REG           = &_Reg->VI_LEAP_REG;
-	Info.VI__H_START_REG        = &_Reg->VI_H_START_REG;
-	Info.VI__V_START_REG        = &_Reg->VI_V_START_REG;
-	Info.VI__V_BURST_REG        = &_Reg->VI_V_BURST_REG;
-	Info.VI__X_SCALE_REG        = &_Reg->VI_X_SCALE_REG;
-	Info.VI__Y_SCALE_REG        = &_Reg->VI_Y_SCALE_REG;
+	Info.MI__INTR_REG           = &g_Reg->m_GfxIntrReg;	
+	Info.DPC__START_REG         = &g_Reg->DPC_START_REG;
+	Info.DPC__END_REG           = &g_Reg->DPC_END_REG;
+	Info.DPC__CURRENT_REG       = &g_Reg->DPC_CURRENT_REG;
+	Info.DPC__STATUS_REG        = &g_Reg->DPC_STATUS_REG;
+	Info.DPC__CLOCK_REG         = &g_Reg->DPC_CLOCK_REG;
+	Info.DPC__BUFBUSY_REG       = &g_Reg->DPC_BUFBUSY_REG;
+	Info.DPC__PIPEBUSY_REG      = &g_Reg->DPC_PIPEBUSY_REG;
+	Info.DPC__TMEM_REG          = &g_Reg->DPC_TMEM_REG;
+	Info.VI__STATUS_REG         = &g_Reg->VI_STATUS_REG;
+	Info.VI__ORIGIN_REG         = &g_Reg->VI_ORIGIN_REG;
+	Info.VI__WIDTH_REG          = &g_Reg->VI_WIDTH_REG;
+	Info.VI__INTR_REG           = &g_Reg->VI_INTR_REG;
+	Info.VI__V_CURRENT_LINE_REG = &g_Reg->VI_CURRENT_REG;
+	Info.VI__TIMING_REG         = &g_Reg->VI_TIMING_REG;
+	Info.VI__V_SYNC_REG         = &g_Reg->VI_V_SYNC_REG;
+	Info.VI__H_SYNC_REG         = &g_Reg->VI_H_SYNC_REG;
+	Info.VI__LEAP_REG           = &g_Reg->VI_LEAP_REG;
+	Info.VI__H_START_REG        = &g_Reg->VI_H_START_REG;
+	Info.VI__V_START_REG        = &g_Reg->VI_V_START_REG;
+	Info.VI__V_BURST_REG        = &g_Reg->VI_V_BURST_REG;
+	Info.VI__X_SCALE_REG        = &g_Reg->VI_X_SCALE_REG;
+	Info.VI__Y_SCALE_REG        = &g_Reg->VI_Y_SCALE_REG;
 	
 	m_Initilized = InitiateGFX(Info) != 0;
 	//jabo had a bug so I call CreateThread so his dllmain gets called again
diff --git a/Source/Project64/Plugins/RSP Plugin.cpp b/Source/Project64/Plugins/RSP Plugin.cpp
index 53d09564a..330317039 100644
--- a/Source/Project64/Plugins/RSP Plugin.cpp	
+++ b/Source/Project64/Plugins/RSP Plugin.cpp	
@@ -240,26 +240,26 @@ bool CRSP_Plugin::Initiate ( CPlugins * Plugins, CN64System * System )
 	Info.IMEM              = g_MMU->Imem();
 	Info.MemoryBswaped     = FALSE;
 
-	Info.MI__INTR_REG      = &_Reg->m_RspIntrReg;
+	Info.MI__INTR_REG      = &g_Reg->m_RspIntrReg;
 		
-	Info.SP__MEM_ADDR_REG  = &_Reg->SP_MEM_ADDR_REG;
-	Info.SP__DRAM_ADDR_REG = &_Reg->SP_DRAM_ADDR_REG;
-	Info.SP__RD_LEN_REG    = &_Reg->SP_RD_LEN_REG;
-	Info.SP__WR_LEN_REG    = &_Reg->SP_WR_LEN_REG;
-	Info.SP__STATUS_REG    = &_Reg->SP_STATUS_REG;
-	Info.SP__DMA_FULL_REG  = &_Reg->SP_DMA_FULL_REG;
-	Info.SP__DMA_BUSY_REG  = &_Reg->SP_DMA_BUSY_REG;
-	Info.SP__PC_REG        = &_Reg->SP_PC_REG;
-	Info.SP__SEMAPHORE_REG = &_Reg->SP_SEMAPHORE_REG;
+	Info.SP__MEM_ADDR_REG  = &g_Reg->SP_MEM_ADDR_REG;
+	Info.SP__DRAM_ADDR_REG = &g_Reg->SP_DRAM_ADDR_REG;
+	Info.SP__RD_LEN_REG    = &g_Reg->SP_RD_LEN_REG;
+	Info.SP__WR_LEN_REG    = &g_Reg->SP_WR_LEN_REG;
+	Info.SP__STATUS_REG    = &g_Reg->SP_STATUS_REG;
+	Info.SP__DMA_FULL_REG  = &g_Reg->SP_DMA_FULL_REG;
+	Info.SP__DMA_BUSY_REG  = &g_Reg->SP_DMA_BUSY_REG;
+	Info.SP__PC_REG        = &g_Reg->SP_PC_REG;
+	Info.SP__SEMAPHORE_REG = &g_Reg->SP_SEMAPHORE_REG;
 		
-	Info.DPC__START_REG    = &_Reg->DPC_START_REG;
-	Info.DPC__END_REG      = &_Reg->DPC_END_REG;
-	Info.DPC__CURRENT_REG  = &_Reg->DPC_CURRENT_REG;
-	Info.DPC__STATUS_REG   = &_Reg->DPC_STATUS_REG;
-	Info.DPC__CLOCK_REG    = &_Reg->DPC_CLOCK_REG;
-	Info.DPC__BUFBUSY_REG  = &_Reg->DPC_BUFBUSY_REG;
-	Info.DPC__PIPEBUSY_REG = &_Reg->DPC_PIPEBUSY_REG;
-	Info.DPC__TMEM_REG     = &_Reg->DPC_TMEM_REG;
+	Info.DPC__START_REG    = &g_Reg->DPC_START_REG;
+	Info.DPC__END_REG      = &g_Reg->DPC_END_REG;
+	Info.DPC__CURRENT_REG  = &g_Reg->DPC_CURRENT_REG;
+	Info.DPC__STATUS_REG   = &g_Reg->DPC_STATUS_REG;
+	Info.DPC__CLOCK_REG    = &g_Reg->DPC_CLOCK_REG;
+	Info.DPC__BUFBUSY_REG  = &g_Reg->DPC_BUFBUSY_REG;
+	Info.DPC__PIPEBUSY_REG = &g_Reg->DPC_PIPEBUSY_REG;
+	Info.DPC__TMEM_REG     = &g_Reg->DPC_TMEM_REG;
 
 	InitiateRSP(Info,&CycleCount);
 	m_Initilized = true;