diff --git a/Source/Project64-core/Logging.cpp b/Source/Project64-core/Logging.cpp index a83eb191e..aebf55f3a 100644 --- a/Source/Project64-core/Logging.cpp +++ b/Source/Project64-core/Logging.cpp @@ -39,27 +39,8 @@ void CLogging::Log_LW(uint32_t PC, uint32_t VAddr) } if (VAddr >= 0xA3F00000 && VAddr <= 0xA3F00024) { - if (!LogRDRamRegisters()) - { - return; - } - g_MMU->LW_VAddr(VAddr, Value); - - switch (VAddr) - { - case 0xA3F00000: LogMessage("%08X: read from RDRAM_CONFIG_REG/RDRAM_DEVICE_TYPE_REG (%08X)", PC, Value); return; - case 0xA3F00004: LogMessage("%08X: read from RDRAM_DEVICE_ID_REG (%08X)", PC, Value); return; - case 0xA3F00008: LogMessage("%08X: read from RDRAM_DELAY_REG (%08X)", PC, Value); return; - case 0xA3F0000C: LogMessage("%08X: read from RDRAM_MODE_REG (%08X)", PC, Value); return; - case 0xA3F00010: LogMessage("%08X: read from RDRAM_REF_INTERVAL_REG (%08X)", PC, Value); return; - case 0xA3F00014: LogMessage("%08X: read from RDRAM_REF_ROW_REG (%08X)", PC, Value); return; - case 0xA3F00018: LogMessage("%08X: read from RDRAM_RAS_INTERVAL_REG (%08X)", PC, Value); return; - case 0xA3F0001C: LogMessage("%08X: read from RDRAM_MIN_INTERVAL_REG (%08X)", PC, Value); return; - case 0xA3F00020: LogMessage("%08X: read from RDRAM_ADDR_SELECT_REG (%08X)", PC, Value); return; - case 0xA3F00024: LogMessage("%08X: read from RDRAM_DEVICE_MANUF_REG (%08X)", PC, Value); return; - } + return; } - if (VAddr >= 0xA4000000 && VAddr <= 0xA4001FFC) { return; @@ -259,23 +240,6 @@ void CLogging::Log_SW(uint32_t PC, uint32_t VAddr, uint32_t Value) } if (VAddr >= 0xA3F00000 && VAddr <= 0xA3F00024) { - if (!LogRDRamRegisters()) - { - return; - } - switch (VAddr) - { - case 0xA3F00000: LogMessage("%08X: Writing 0x%08X to RDRAM_CONFIG_REG/RDRAM_DEVICE_TYPE_REG", PC, Value); return; - case 0xA3F00004: LogMessage("%08X: Writing 0x%08X to RDRAM_DEVICE_ID_REG", PC, Value); return; - case 0xA3F00008: LogMessage("%08X: Writing 0x%08X to RDRAM_DELAY_REG", PC, Value); return; - case 0xA3F0000C: LogMessage("%08X: Writing 0x%08X to RDRAM_MODE_REG", PC, Value); return; - case 0xA3F00010: LogMessage("%08X: Writing 0x%08X to RDRAM_REF_INTERVAL_REG", PC, Value); return; - case 0xA3F00014: LogMessage("%08X: Writing 0x%08X to RDRAM_REF_ROW_REG", PC, Value); return; - case 0xA3F00018: LogMessage("%08X: Writing 0x%08X to RDRAM_RAS_INTERVAL_REG", PC, Value); return; - case 0xA3F0001C: LogMessage("%08X: Writing 0x%08X to RDRAM_MIN_INTERVAL_REG", PC, Value); return; - case 0xA3F00020: LogMessage("%08X: Writing 0x%08X to RDRAM_ADDR_SELECT_REG", PC, Value); return; - case 0xA3F00024: LogMessage("%08X: Writing 0x%08X to RDRAM_DEVICE_MANUF_REG", PC, Value); return; - } } if (VAddr >= 0xA4000000 && VAddr <= 0xA4001FFC) { diff --git a/Source/Project64-core/N64System/MemoryHandler/RDRAMRegistersHandler.cpp b/Source/Project64-core/N64System/MemoryHandler/RDRAMRegistersHandler.cpp new file mode 100644 index 000000000..02d93ad84 --- /dev/null +++ b/Source/Project64-core/N64System/MemoryHandler/RDRAMRegistersHandler.cpp @@ -0,0 +1,128 @@ +#include "stdafx.h" +#include "RDRAMRegistersHandler.h" +#include +#include + +RDRAMRegistersReg::RDRAMRegistersReg(uint32_t * RdramInterface) : + RDRAM_CONFIG_REG(RdramInterface[0]), + RDRAM_DEVICE_TYPE_REG(RdramInterface[0]), + RDRAM_DEVICE_ID_REG(RdramInterface[1]), + RDRAM_DELAY_REG(RdramInterface[2]), + RDRAM_MODE_REG(RdramInterface[3]), + RDRAM_REF_INTERVAL_REG(RdramInterface[4]), + RDRAM_REF_ROW_REG(RdramInterface[5]), + RDRAM_RAS_INTERVAL_REG(RdramInterface[6]), + RDRAM_MIN_INTERVAL_REG(RdramInterface[7]), + RDRAM_ADDR_SELECT_REG(RdramInterface[8]), + RDRAM_DEVICE_MANUF_REG(RdramInterface[9]) +{ +} + +RDRAMRegistersHandler::RDRAMRegistersHandler(CRegisters & Reg) : + RDRAMRegistersReg(Reg.m_RDRAM_Registers), + m_PC(Reg.m_PROGRAM_COUNTER) +{ +} + +bool RDRAMRegistersHandler::Read32(uint32_t Address, uint32_t & Value) +{ + switch (Address & 0x1FFFFFFF) + { + case 0x03F00000: Value = RDRAM_CONFIG_REG; break; + case 0x03F00004: Value = RDRAM_DEVICE_ID_REG; break; + case 0x03F00008: Value = RDRAM_DELAY_REG; break; + case 0x03F0000C: Value = RDRAM_MODE_REG; break; + case 0x03F00010: Value = RDRAM_REF_INTERVAL_REG; break; + case 0x03F00014: Value = RDRAM_REF_ROW_REG; break; + case 0x03F00018: Value = RDRAM_RAS_INTERVAL_REG; break; + case 0x03F0001C: Value = RDRAM_MIN_INTERVAL_REG; break; + case 0x03F00020: Value = RDRAM_ADDR_SELECT_REG; break; + case 0x03F00024: Value = RDRAM_DEVICE_MANUF_REG; break; + default: + Value = 0; + if (HaveDebugger()) + { + g_Notify->BreakPoint(__FILE__, __LINE__); + } + } + + if (LogRDRamRegisters()) + { + switch (Address & 0x1FFFFFFF) + { + case 0x03F00000: LogMessage("%08X: read from RDRAM_CONFIG_REG/RDRAM_DEVICE_TYPE_REG (%08X)", m_PC, Value); break; + case 0x03F00004: LogMessage("%08X: read from RDRAM_DEVICE_ID_REG (%08X)", m_PC, Value); break; + case 0x03F00008: LogMessage("%08X: read from RDRAM_DELAY_REG (%08X)", m_PC, Value); break; + case 0x03F0000C: LogMessage("%08X: read from RDRAM_MODE_REG (%08X)", m_PC, Value); break; + case 0x03F00010: LogMessage("%08X: read from RDRAM_REF_INTERVAL_REG (%08X)", m_PC, Value); break; + case 0x03F00014: LogMessage("%08X: read from RDRAM_REF_ROW_REG (%08X)", m_PC, Value); break; + case 0x03F00018: LogMessage("%08X: read from RDRAM_RAS_INTERVAL_REG (%08X)", m_PC, Value); break; + case 0x03F0001C: LogMessage("%08X: read from RDRAM_MIN_INTERVAL_REG (%08X)", m_PC, Value); break; + case 0x03F00020: LogMessage("%08X: read from RDRAM_ADDR_SELECT_REG (%08X)", m_PC, Value); break; + case 0x03F00024: LogMessage("%08X: read from RDRAM_DEVICE_MANUF_REG (%08X)", m_PC, Value); break; + default: + if (HaveDebugger()) + { + g_Notify->BreakPoint(__FILE__, __LINE__); + } + } + } + return true; +} + +bool RDRAMRegistersHandler::Write32(uint32_t Address, uint32_t Value, uint32_t Mask) +{ + if (LogRDRamRegisters()) + { + switch (Address & 0x1FFFFFFF) + { + case 0x03F00000: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to RDRAM_CONFIG_REG/RDRAM_DEVICE_TYPE_REG", m_PC, Value, Mask); break; + case 0x03F00004: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to RDRAM_DEVICE_ID_REG", m_PC, Value, Mask); break; + case 0x03F00008: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to RDRAM_DELAY_REG", m_PC, Value, Mask); break; + case 0x03F0000C: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to RDRAM_MODE_REG", m_PC, Value, Mask); break; + case 0x03F00010: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to RDRAM_REF_INTERVAL_REG", m_PC, Value, Mask); break; + case 0x03F00014: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to RDRAM_REF_ROW_REG", m_PC, Value, Mask); break; + case 0x03F00018: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to RDRAM_RAS_INTERVAL_REG", m_PC, Value, Mask); break; + case 0x03F0001C: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to RDRAM_MIN_INTERVAL_REG", m_PC, Value, Mask); break; + case 0x03F00020: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to RDRAM_ADDR_SELECT_REG", m_PC, Value, Mask); break; + case 0x03F00024: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to RDRAM_DEVICE_MANUF_REG", m_PC, Value, Mask); break; + case 0x03F04004: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to 0x08X - Ignored", m_PC, Value, Mask, Address); break; + case 0x03F08004: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to 0x08X - Ignored", m_PC, Value, Mask, Address); break; + case 0x03F80004: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to 0x08X - Ignored", m_PC, Value, Mask, Address); break; + case 0x03F80008: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to 0x08X - Ignored", m_PC, Value, Mask, Address); break; + case 0x03F8000C: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to 0x08X - Ignored", m_PC, Value, Mask, Address); break; + case 0x03F80014: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to 0x08X - Ignored", m_PC, Value, Mask, Address); break; + default: + if (HaveDebugger()) + { + g_Notify->BreakPoint(__FILE__, __LINE__); + } + } + } + + switch ((Address & 0x1FFFFFFF)) + { + case 0x03F00000: RDRAM_CONFIG_REG = (RDRAM_CONFIG_REG & ~Mask) | (Value & Mask); break; + case 0x03F00004: RDRAM_DEVICE_ID_REG = (RDRAM_DEVICE_ID_REG & ~Mask) | (Value & Mask); break; + case 0x03F00008: RDRAM_DELAY_REG = (RDRAM_DELAY_REG & ~Mask) | (Value & Mask); break; + case 0x03F0000C: RDRAM_MODE_REG = (RDRAM_MODE_REG & ~Mask) | (Value & Mask); break; + case 0x03F00010: RDRAM_REF_INTERVAL_REG = (RDRAM_REF_INTERVAL_REG & ~Mask) | (Value & Mask); break; + case 0x03F00014: RDRAM_REF_ROW_REG = (RDRAM_REF_ROW_REG & ~Mask) | (Value & Mask); break; + case 0x03F00018: RDRAM_RAS_INTERVAL_REG = (RDRAM_RAS_INTERVAL_REG & ~Mask) | (Value & Mask); break; + case 0x03F0001C: RDRAM_MIN_INTERVAL_REG = (RDRAM_MIN_INTERVAL_REG & ~Mask) | (Value & Mask); break; + case 0x03F00020: RDRAM_ADDR_SELECT_REG = (RDRAM_ADDR_SELECT_REG & ~Mask) | (Value & Mask); break; + case 0x03F00024: RDRAM_DEVICE_MANUF_REG = (RDRAM_DEVICE_MANUF_REG & ~Mask) | (Value & Mask); break; + case 0x03F04004: break; + case 0x03F08004: break; + case 0x03F80004: break; + case 0x03F80008: break; + case 0x03F8000C: break; + case 0x03F80014: break; + default: + if (HaveDebugger()) + { + g_Notify->BreakPoint(__FILE__, __LINE__); + } + } + return true; +} diff --git a/Source/Project64-core/N64System/MemoryHandler/RDRAMRegistersHandler.h b/Source/Project64-core/N64System/MemoryHandler/RDRAMRegistersHandler.h new file mode 100644 index 000000000..faeb7858c --- /dev/null +++ b/Source/Project64-core/N64System/MemoryHandler/RDRAMRegistersHandler.h @@ -0,0 +1,51 @@ +#pragma once +#include "MemoryHandler.h" +#include +#include +#include + +class RDRAMRegistersReg +{ +protected: + RDRAMRegistersReg(uint32_t * RdramInterface); + +public: + uint32_t & RDRAM_CONFIG_REG; + uint32_t & RDRAM_DEVICE_TYPE_REG; + uint32_t & RDRAM_DEVICE_ID_REG; + uint32_t & RDRAM_DELAY_REG; + uint32_t & RDRAM_MODE_REG; + uint32_t & RDRAM_REF_INTERVAL_REG; + uint32_t & RDRAM_REF_ROW_REG; + uint32_t & RDRAM_RAS_INTERVAL_REG; + uint32_t & RDRAM_MIN_INTERVAL_REG; + uint32_t & RDRAM_ADDR_SELECT_REG; + uint32_t & RDRAM_DEVICE_MANUF_REG; + +private: + RDRAMRegistersReg(); + RDRAMRegistersReg(const RDRAMRegistersReg&); + RDRAMRegistersReg& operator=(const RDRAMRegistersReg&); +}; + +class CRegisters; + +class RDRAMRegistersHandler : + public MemoryHandler, + public RDRAMRegistersReg, + private CDebugSettings, + private CLogging +{ +public: + RDRAMRegistersHandler(CRegisters & Reg); + + bool Read32(uint32_t Address, uint32_t & Value); + bool Write32(uint32_t Address, uint32_t Value, uint32_t Mask); + +private: + RDRAMRegistersHandler(); + RDRAMRegistersHandler(const RDRAMRegistersHandler &); + RDRAMRegistersHandler & operator=(const RDRAMRegistersHandler &); + + uint32_t & m_PC; +}; \ No newline at end of file diff --git a/Source/Project64-core/N64System/Mips/MemoryVirtualMem.cpp b/Source/Project64-core/N64System/Mips/MemoryVirtualMem.cpp index 936f21d9f..e1894ed3d 100755 --- a/Source/Project64-core/N64System/Mips/MemoryVirtualMem.cpp +++ b/Source/Project64-core/N64System/Mips/MemoryVirtualMem.cpp @@ -27,6 +27,7 @@ CMipsMemoryVM::CMipsMemoryVM(CN64System & System, CRegisters & Reg, bool SavesRe CSram(SavesReadOnly), CDMA(*this, *this), m_Reg(Reg), + m_RDRAMRegistersHandler(Reg), m_RomMapped(false), m_PeripheralInterfaceHandler(*this, Reg), m_RDRAMInterfaceHandler(Reg), @@ -639,8 +640,8 @@ bool CMipsMemoryVM::LW_NonMemory(uint32_t PAddr, uint32_t* Value) { switch (PAddr & 0xFFF00000) { - case 0x03F00000: Load32RDRAMRegisters(); break; - case 0x04000000: m_SPRegistersHandler.Read32(PAddr, m_MemLookupValue.UW[0]);; break; + case 0x03F00000: m_RDRAMRegistersHandler.Read32(PAddr, m_MemLookupValue.UW[0]); break; + case 0x04000000: m_SPRegistersHandler.Read32(PAddr, m_MemLookupValue.UW[0]); break; case 0x04100000: Load32DPCommand(); break; case 0x04300000: Load32MIPSInterface(); break; case 0x04400000: Load32VideoInterface(); break; @@ -749,7 +750,7 @@ bool CMipsMemoryVM::SW_NonMemory(uint32_t PAddr, uint32_t Value) *(uint32_t *)(m_RDRAM + PAddr) = Value; } break; - case 0x03F00000: Write32RDRAMRegisters(); break; + case 0x03F00000: m_RDRAMRegistersHandler.Write32(PAddr, Value, 0xFFFFFFFF); break; case 0x04000000: if (PAddr < 0x04002000) { @@ -1118,30 +1119,6 @@ void CMipsMemoryVM::ChangeMiIntrMask() } } -void CMipsMemoryVM::Load32RDRAMRegisters(void) -{ - switch (m_MemLookupAddress & 0x1FFFFFFF) - { - case 0x03F00000: m_MemLookupValue.UW[0] = g_Reg->RDRAM_CONFIG_REG; break; - case 0x03F00004: m_MemLookupValue.UW[0] = g_Reg->RDRAM_DEVICE_ID_REG; break; - case 0x03F00008: m_MemLookupValue.UW[0] = g_Reg->RDRAM_DELAY_REG; break; - case 0x03F0000C: m_MemLookupValue.UW[0] = g_Reg->RDRAM_MODE_REG; break; - case 0x03F00010: m_MemLookupValue.UW[0] = g_Reg->RDRAM_REF_INTERVAL_REG; break; - case 0x03F00014: m_MemLookupValue.UW[0] = g_Reg->RDRAM_REF_ROW_REG; break; - case 0x03F00018: m_MemLookupValue.UW[0] = g_Reg->RDRAM_RAS_INTERVAL_REG; break; - case 0x03F0001C: m_MemLookupValue.UW[0] = g_Reg->RDRAM_MIN_INTERVAL_REG; break; - case 0x03F00020: m_MemLookupValue.UW[0] = g_Reg->RDRAM_ADDR_SELECT_REG; break; - case 0x03F00024: m_MemLookupValue.UW[0] = g_Reg->RDRAM_DEVICE_MANUF_REG; break; - default: - m_MemLookupValue.UW[0] = 0; - if (HaveDebugger()) - { - g_Notify->BreakPoint(__FILE__, __LINE__); - } - } - m_MemLookupValid = true; -} - void CMipsMemoryVM::Load32DPCommand(void) { switch (m_MemLookupAddress & 0x1FFFFFFF) @@ -1406,34 +1383,6 @@ void CMipsMemoryVM::Load32Rom(void) } } -void CMipsMemoryVM::Write32RDRAMRegisters(void) -{ - switch ((m_MemLookupAddress & 0xFFFFFFF)) - { - case 0x03F00000: g_Reg->RDRAM_CONFIG_REG = m_MemLookupValue.UW[0]; break; - case 0x03F00004: g_Reg->RDRAM_DEVICE_ID_REG = m_MemLookupValue.UW[0]; break; - case 0x03F00008: g_Reg->RDRAM_DELAY_REG = m_MemLookupValue.UW[0]; break; - case 0x03F0000C: g_Reg->RDRAM_MODE_REG = m_MemLookupValue.UW[0]; break; - case 0x03F00010: g_Reg->RDRAM_REF_INTERVAL_REG = m_MemLookupValue.UW[0]; break; - case 0x03F00014: g_Reg->RDRAM_REF_ROW_REG = m_MemLookupValue.UW[0]; break; - case 0x03F00018: g_Reg->RDRAM_RAS_INTERVAL_REG = m_MemLookupValue.UW[0]; break; - case 0x03F0001C: g_Reg->RDRAM_MIN_INTERVAL_REG = m_MemLookupValue.UW[0]; break; - case 0x03F00020: g_Reg->RDRAM_ADDR_SELECT_REG = m_MemLookupValue.UW[0]; break; - case 0x03F00024: g_Reg->RDRAM_DEVICE_MANUF_REG = m_MemLookupValue.UW[0]; break; - case 0x03F04004: break; - case 0x03F08004: break; - case 0x03F80004: break; - case 0x03F80008: break; - case 0x03F8000C: break; - case 0x03F80014: break; - default: - if (HaveDebugger()) - { - g_Notify->BreakPoint(__FILE__, __LINE__); - } - } -} - void CMipsMemoryVM::Write32DPCommandRegisters(void) { switch ((m_MemLookupAddress & 0xFFFFFFF)) diff --git a/Source/Project64-core/N64System/Mips/MemoryVirtualMem.h b/Source/Project64-core/N64System/Mips/MemoryVirtualMem.h index 0bda08339..25b000b08 100644 --- a/Source/Project64-core/N64System/Mips/MemoryVirtualMem.h +++ b/Source/Project64-core/N64System/Mips/MemoryVirtualMem.h @@ -9,6 +9,7 @@ #include #include #include +#include #include #include @@ -134,7 +135,6 @@ private: bool SH_NonMemory(uint32_t PAddr, uint16_t Value); bool SW_NonMemory(uint32_t PAddr, uint32_t Value); - static void Load32RDRAMRegisters(void); static void Load32DPCommand(void); static void Load32MIPSInterface(void); static void Load32VideoInterface(void); @@ -147,7 +147,6 @@ private: static void Load32PifRam(void); static void Load32Rom(void); - static void Write32RDRAMRegisters(void); static void Write32DPCommandRegisters(void); static void Write32MIPSInterface(void); static void Write32VideoInterface(void); @@ -183,8 +182,9 @@ private: static uint8_t * m_Reserve1, *m_Reserve2; CRegisters & m_Reg; - PeripheralInterfaceHandler m_PeripheralInterfaceHandler; + PeripheralInterfaceHandler m_PeripheralInterfaceHandler; RDRAMInterfaceHandler m_RDRAMInterfaceHandler; + RDRAMRegistersHandler m_RDRAMRegistersHandler; SPRegistersHandler m_SPRegistersHandler; uint8_t * m_RDRAM, *m_DMEM, *m_IMEM; uint32_t m_AllocatedRdramSize; diff --git a/Source/Project64-core/N64System/Mips/Register.cpp b/Source/Project64-core/N64System/Mips/Register.cpp index f349589ce..94a517446 100644 --- a/Source/Project64-core/N64System/Mips/Register.cpp +++ b/Source/Project64-core/N64System/Mips/Register.cpp @@ -75,21 +75,6 @@ CP0registers::CP0registers(uint32_t * _CP0) : { } -Rdram_InterfaceReg::Rdram_InterfaceReg(uint32_t * _RdramInterface) : - RDRAM_CONFIG_REG(_RdramInterface[0]), - RDRAM_DEVICE_TYPE_REG(_RdramInterface[0]), - RDRAM_DEVICE_ID_REG(_RdramInterface[1]), - RDRAM_DELAY_REG(_RdramInterface[2]), - RDRAM_MODE_REG(_RdramInterface[3]), - RDRAM_REF_INTERVAL_REG(_RdramInterface[4]), - RDRAM_REF_ROW_REG(_RdramInterface[5]), - RDRAM_RAS_INTERVAL_REG(_RdramInterface[6]), - RDRAM_MIN_INTERVAL_REG(_RdramInterface[7]), - RDRAM_ADDR_SELECT_REG(_RdramInterface[8]), - RDRAM_DEVICE_MANUF_REG(_RdramInterface[9]) -{ -} - Mips_InterfaceReg::Mips_InterfaceReg(uint32_t * _MipsInterface) : MI_INIT_MODE_REG(_MipsInterface[0]), MI_MODE_REG(_MipsInterface[0]), @@ -185,7 +170,7 @@ Disk_InterfaceReg::Disk_InterfaceReg(uint32_t * DiskInterface) : CRegisters::CRegisters(CN64System * System, CSystemEvents * SystemEvents) : CP0registers(m_CP0), - Rdram_InterfaceReg(m_RDRAM_Registers), + RDRAMRegistersReg(m_RDRAM_Registers), Mips_InterfaceReg(m_Mips_Interface), Video_InterfaceReg(m_Video_Interface), AudioInterfaceReg(m_Audio_Interface), diff --git a/Source/Project64-core/N64System/Mips/Register.h b/Source/Project64-core/N64System/Mips/Register.h index 9421cde41..321abc479 100644 --- a/Source/Project64-core/N64System/Mips/Register.h +++ b/Source/Project64-core/N64System/Mips/Register.h @@ -4,6 +4,7 @@ #include #include #include +#include #include #include #include @@ -113,31 +114,6 @@ enum FPCSR_RM_RM = 0x00000003, // Round to negative infinity }; -// RDRAM registers -class Rdram_InterfaceReg -{ -protected: - Rdram_InterfaceReg (uint32_t * _RdramInterface); - -public: - uint32_t & RDRAM_CONFIG_REG; - uint32_t & RDRAM_DEVICE_TYPE_REG; - uint32_t & RDRAM_DEVICE_ID_REG; - uint32_t & RDRAM_DELAY_REG; - uint32_t & RDRAM_MODE_REG; - uint32_t & RDRAM_REF_INTERVAL_REG; - uint32_t & RDRAM_REF_ROW_REG; - uint32_t & RDRAM_RAS_INTERVAL_REG; - uint32_t & RDRAM_MIN_INTERVAL_REG; - uint32_t & RDRAM_ADDR_SELECT_REG; - uint32_t & RDRAM_DEVICE_MANUF_REG; - -private: - Rdram_InterfaceReg(); - Rdram_InterfaceReg(const Rdram_InterfaceReg&); - Rdram_InterfaceReg& operator=(const Rdram_InterfaceReg&); -}; - // MIPS interface registers class Mips_InterfaceReg { @@ -499,7 +475,7 @@ class CRegisters : private CGameSettings, protected CSystemRegisters, public CP0registers, - public Rdram_InterfaceReg, + public RDRAMRegistersReg, public Mips_InterfaceReg, public Video_InterfaceReg, public AudioInterfaceReg, diff --git a/Source/Project64-core/Project64-core.vcxproj b/Source/Project64-core/Project64-core.vcxproj index 349367af9..13ce58597 100644 --- a/Source/Project64-core/Project64-core.vcxproj +++ b/Source/Project64-core/Project64-core.vcxproj @@ -55,6 +55,7 @@ + @@ -154,6 +155,7 @@ + diff --git a/Source/Project64-core/Project64-core.vcxproj.filters b/Source/Project64-core/Project64-core.vcxproj.filters index a6bbbc44b..21b6e19ab 100644 --- a/Source/Project64-core/Project64-core.vcxproj.filters +++ b/Source/Project64-core/Project64-core.vcxproj.filters @@ -366,6 +366,9 @@ Source Files\N64 System\MemoryHandler + + Source Files\N64 System\MemoryHandler + @@ -698,6 +701,9 @@ Header Files\N64 System\MemoryHandler + + Header Files\N64 System\MemoryHandler +