Core: Get COP1_D_CVT_L to use COP1_S_CVT
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@ -8601,16 +8601,23 @@ void CX86RecompilerOps::COP1_D_CVT_W()
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void CX86RecompilerOps::COP1_D_CVT_L()
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{
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CompileCop1Test();
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if (m_RegWorkingSet.RegInStack(m_Opcode.fs, CRegInfo::FPU_Double) || m_RegWorkingSet.RegInStack(m_Opcode.fs, CRegInfo::FPU_Qword))
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if (FpuExceptionInRecompiler())
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{
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m_RegWorkingSet.UnMap_FPR(m_Opcode.fs, true);
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COP1_S_CVT(CRegInfo::RoundDefault, CRegInfo::FPU_Double, CRegInfo::FPU_Qword);
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}
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if (m_Opcode.fd != m_Opcode.fs || !m_RegWorkingSet.RegInStack(m_Opcode.fd, CRegInfo::FPU_Double))
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else
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{
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m_RegWorkingSet.Load_FPR_ToTop(m_Opcode.fd, m_Opcode.fs, CRegInfo::FPU_Double);
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CompileCop1Test();
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if (m_RegWorkingSet.RegInStack(m_Opcode.fs, CRegInfo::FPU_Double) || m_RegWorkingSet.RegInStack(m_Opcode.fs, CRegInfo::FPU_Qword))
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{
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m_RegWorkingSet.UnMap_FPR(m_Opcode.fs, true);
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}
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if (m_Opcode.fd != m_Opcode.fs || !m_RegWorkingSet.RegInStack(m_Opcode.fd, CRegInfo::FPU_Double))
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{
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m_RegWorkingSet.Load_FPR_ToTop(m_Opcode.fd, m_Opcode.fs, CRegInfo::FPU_Double);
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}
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m_RegWorkingSet.ChangeFPURegFormat(m_Opcode.fd, CRegInfo::FPU_Double, CRegInfo::FPU_Qword, CRegInfo::RoundDefault);
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}
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m_RegWorkingSet.ChangeFPURegFormat(m_Opcode.fd, CRegInfo::FPU_Double, CRegInfo::FPU_Qword, CRegInfo::RoundDefault);
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}
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void CX86RecompilerOps::COP1_D_CMP()
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