fixed change for mthi and mtlo in 32bit core
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0a320a2953
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@ -2137,11 +2137,6 @@ void CRecompilerOps::SPECIAL_MTLO (void) {
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MoveConstToVariable(0,&_RegLO->UW[1],"_RegLO->UW[1]");
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}
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MoveX86regToVariable(MipsRegMapLo(m_Opcode.rs), &_RegLO->UW[0],"_RegLO->UW[0]");
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} else if (b32BitCore()) {
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x86Reg reg = Map_TempReg(x86_Any,m_Opcode.rs,false);
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MoveX86regToVariable(reg,&_RegLO->UW[0],"_RegLO->UW[0]");
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ShiftRightSignImmed(reg,31);
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MoveX86regToVariable(reg,&_RegLO->UW[1],"_RegLO->UW[1]");
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} else {
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x86Reg reg = Map_TempReg(x86_Any,m_Opcode.rs,TRUE);
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MoveX86regToVariable(reg,&_RegLO->UW[1],"_RegLO->UW[1]");
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@ -2179,11 +2174,6 @@ void CRecompilerOps::SPECIAL_MTHI (void) {
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MoveConstToVariable(0,&_RegHI->UW[1],"_RegHI->UW[1]");
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}
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MoveX86regToVariable(MipsRegMapLo(m_Opcode.rs), &_RegHI->UW[0],"_RegHI->UW[0]");
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} else if (b32BitCore()) {
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x86Reg reg = Map_TempReg(x86_Any,m_Opcode.rs,false);
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MoveX86regToVariable(reg,&_RegHI->UW[0],"_RegHI->UW[0]");
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ShiftRightSignImmed(reg,31);
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MoveX86regToVariable(reg,&_RegHI->UW[1],"_RegHI->UW[1]");
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} else {
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x86Reg reg = Map_TempReg(x86_Any,m_Opcode.rs,TRUE);
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MoveX86regToVariable(reg,&_RegHI->UW[1],"_RegHI->UW[1]");
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