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Core: Make Cop0 64bit

This commit is contained in:
zilmar 2022-09-19 16:36:44 +09:30
parent 21b193152a
commit 1c77f6f0fd
12 changed files with 199 additions and 243 deletions
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97
Source/Project64-core/N64System/Interpreter/InterpreterOps.cpp
View File

@ -274,11 +274,11 @@ R4300iOp::Func * R4300iOp::BuildInterpreter()
Jump_Regimm[31] = UnknownOpcode;
Jump_CoP0[0] = COP0_MF;
Jump_CoP0[1] = COP0_MF;
Jump_CoP0[1] = COP0_DMF;
Jump_CoP0[2] = UnknownOpcode;
Jump_CoP0[3] = UnknownOpcode;
Jump_CoP0[4] = COP0_MT;
Jump_CoP0[5] = COP0_MT;
Jump_CoP0[5] = COP0_DMT;
Jump_CoP0[6] = UnknownOpcode;
Jump_CoP0[7] = UnknownOpcode;
Jump_CoP0[8] = UnknownOpcode;
@ -1935,92 +1935,23 @@ void R4300iOp::REGIMM_TNEI()
void R4300iOp::COP0_MF()
{
if (LogCP0reads())
{
LogMessage("%08X: R4300i read from %s (0x%08X)", (*_PROGRAM_COUNTER), CRegName::Cop0[m_Opcode.rd], _CP0[m_Opcode.rd]);
}
_GPR[m_Opcode.rt].DW = (int32_t)g_Reg->Cop0_MF(m_Opcode.rd);
}
if (m_Opcode.rd == 9)
{
g_SystemTimer->UpdateTimers();
}
_GPR[m_Opcode.rt].DW = (int32_t)_CP0[m_Opcode.rd];
void R4300iOp::COP0_DMF()
{
_GPR[m_Opcode.rt].DW = g_Reg->Cop0_MF(m_Opcode.rd);
}
void R4300iOp::COP0_MT()
{
if (LogCP0changes())
{
LogMessage("%08X: Writing 0x%X to %s register (originally: 0x%08X)", (*_PROGRAM_COUNTER), _GPR[m_Opcode.rt].UW[0], CRegName::Cop0[m_Opcode.rd], _CP0[m_Opcode.rd]);
if (m_Opcode.rd == 11) // Compare
{
LogMessage("%08X: Cause register changed from %08X to %08X", (*_PROGRAM_COUNTER), g_Reg->CAUSE_REGISTER, (g_Reg->CAUSE_REGISTER & ~CAUSE_IP7));
}
}
switch (m_Opcode.rd)
{
case 0: // Index
case 2: // EntryLo0
case 3: // EntryLo1
case 5: // PageMask
case 10: // Entry Hi
case 14: // EPC
case 16: // Config
case 18: // WatchLo
case 19: // WatchHi
case 20: // XContext
case 28: // Tag lo
case 29: // Tag Hi
case 30: // ErrEPC
_CP0[m_Opcode.rd] = _GPR[m_Opcode.rt].UW[0];
break;
case 6: // Wired
g_SystemTimer->UpdateTimers();
_CP0[m_Opcode.rd] = _GPR[m_Opcode.rt].UW[0];
break;
case 4: // Context
_CP0[m_Opcode.rd] = _GPR[m_Opcode.rt].UW[0] & 0xFF800000;
break;
case 9: // Count
g_SystemTimer->UpdateTimers();
_CP0[m_Opcode.rd] = _GPR[m_Opcode.rt].UW[0];
g_SystemTimer->UpdateCompareTimer();
break;
case 11: // Compare
g_SystemTimer->UpdateTimers();
_CP0[m_Opcode.rd] = _GPR[m_Opcode.rt].UW[0];
g_Reg->FAKE_CAUSE_REGISTER &= ~CAUSE_IP7;
g_SystemTimer->UpdateCompareTimer();
break;
case 12: // Status
if ((_CP0[m_Opcode.rd] & STATUS_FR) != (_GPR[m_Opcode.rt].UW[0] & STATUS_FR))
{
_CP0[m_Opcode.rd] = _GPR[m_Opcode.rt].UW[0];
g_Reg->FixFpuLocations();
}
else
{
_CP0[m_Opcode.rd] = _GPR[m_Opcode.rt].UW[0];
}
if ((_CP0[m_Opcode.rd] & 0x18) != 0 && HaveDebugger())
{
g_Notify->DisplayError("Left kernel mode ??");
}
g_Reg->CheckInterrupts();
break;
case 13: // Cause
_CP0[m_Opcode.rd] &= 0xFFFFCFF;
if ((_GPR[m_Opcode.rt].UW[0] & 0x300) != 0 && HaveDebugger())
{
g_Notify->DisplayError("Set IP0 or IP1");
}
break;
default:
UnknownOpcode();
}
g_Reg->Cop0_MT(m_Opcode.rd, _GPR[m_Opcode.rt].UW[0]);
}
void R4300iOp::COP0_DMT()
{
g_Reg->Cop0_MT(m_Opcode.rd, _GPR[m_Opcode.rt].UDW);
}
// COP0 CO functions
void R4300iOp::COP0_CO_TLBR()
@ -2048,12 +1979,12 @@ void R4300iOp::COP0_CO_ERET()
g_System->m_PipelineStage = PIPELINE_STAGE_JUMP;
if ((g_Reg->STATUS_REGISTER & STATUS_ERL) != 0)
{
g_System->m_JumpToLocation = g_Reg->ERROREPC_REGISTER;
g_System->m_JumpToLocation = (uint32_t)g_Reg->ERROREPC_REGISTER;
g_Reg->STATUS_REGISTER &= ~STATUS_ERL;
}
else
{
g_System->m_JumpToLocation = g_Reg->EPC_REGISTER;
g_System->m_JumpToLocation = (uint32_t)g_Reg->EPC_REGISTER;
g_Reg->STATUS_REGISTER &= ~STATUS_EXL;
}
(*_LLBit) = 0;

2
Source/Project64-core/N64System/Interpreter/InterpreterOps.h
View File

@ -131,7 +131,9 @@ public:
// COP0 functions
static void COP0_MF();
static void COP0_DMF();
static void COP0_MT();
static void COP0_DMT();
// COP0 CO functions
static void COP0_CO_TLBR();

84
Source/Project64-core/N64System/Interpreter/InterpreterOps32.cpp
View File

@ -1245,89 +1245,7 @@ void R4300iOp32::REGIMM_BGEZAL()
void R4300iOp32::COP0_MF()
{
if (LogCP0reads())
{
LogMessage("%08X: R4300i read from %s (0x%08X)", (*_PROGRAM_COUNTER), CRegName::Cop0[m_Opcode.rd], _CP0[m_Opcode.rd]);
}
if (m_Opcode.rd == 9)
{
g_SystemTimer->UpdateTimers();
}
_GPR[m_Opcode.rt].W[0] = (int32_t)_CP0[m_Opcode.rd];
}
void R4300iOp32::COP0_MT()
{
if (LogCP0changes())
{
LogMessage("%08X: Writing 0x%X to %s register (Originally: 0x%08X)", (*_PROGRAM_COUNTER), _GPR[m_Opcode.rt].UW[0], CRegName::Cop0[m_Opcode.rd], _CP0[m_Opcode.rd]);
if (m_Opcode.rd == 11) // Compare
{
LogMessage("%08X: Cause register changed from %08X to %08X", (*_PROGRAM_COUNTER), g_Reg->CAUSE_REGISTER, (g_Reg->CAUSE_REGISTER & ~CAUSE_IP7));
}
}
switch (m_Opcode.rd)
{
case 0: // Index
case 2: // EntryLo0
case 3: // EntryLo1
case 5: // PageMask
case 10: // Entry Hi
case 14: // EPC
case 16: // Config
case 18: // WatchLo
case 19: // WatchHi
case 28: // Tag Lo
case 29: // Tag Hi
case 30: // ErrEPC
_CP0[m_Opcode.rd] = _GPR[m_Opcode.rt].UW[0];
break;
case 6: // Wired
g_SystemTimer->UpdateTimers();
_CP0[m_Opcode.rd] = _GPR[m_Opcode.rt].UW[0];
break;
case 4: // Context
_CP0[m_Opcode.rd] = _GPR[m_Opcode.rt].UW[0] & 0xFF800000;
break;
case 9: // Count
g_SystemTimer->UpdateTimers();
_CP0[m_Opcode.rd] = _GPR[m_Opcode.rt].UW[0];
g_SystemTimer->UpdateCompareTimer();
break;
case 11: // Compare
g_SystemTimer->UpdateTimers();
_CP0[m_Opcode.rd] = _GPR[m_Opcode.rt].UW[0];
g_Reg->FAKE_CAUSE_REGISTER &= ~CAUSE_IP7;
g_SystemTimer->UpdateCompareTimer();
break;
case 12: // Status
if ((_CP0[m_Opcode.rd] & STATUS_FR) != (_GPR[m_Opcode.rt].UW[0] & STATUS_FR))
{
_CP0[m_Opcode.rd] = _GPR[m_Opcode.rt].UW[0];
g_Reg->FixFpuLocations();
}
else
{
_CP0[m_Opcode.rd] = _GPR[m_Opcode.rt].UW[0];
}
if ((_CP0[m_Opcode.rd] & 0x18) != 0 && CDebugSettings::HaveDebugger())
{
g_Notify->DisplayError("Left kernel mode?");
}
g_Reg->CheckInterrupts();
break;
case 13: // Cause
_CP0[m_Opcode.rd] &= 0xFFFFCFF;
if ((_GPR[m_Opcode.rt].UW[0] & 0x300) != 0 && CDebugSettings::HaveDebugger())
{
g_Notify->DisplayError("Set IP0 or IP1");
}
break;
default:
UnknownOpcode();
}
_GPR[m_Opcode.rt].W[0] = (int32_t)g_Reg->Cop0_MF(m_Opcode.rd);
}
// COP1 functions

1
Source/Project64-core/N64System/Interpreter/InterpreterOps32.h
View File

@ -63,7 +63,6 @@ public:
// COP0 functions
static void COP0_MF();
static void COP0_MT();
// COP1 functions
static void COP1_MF();

109
Source/Project64-core/N64System/Mips/Register.cpp
View File

@ -222,7 +222,7 @@ const char * CRegName::FPR_Ctrl[32] =
uint32_t * CSystemRegisters::_PROGRAM_COUNTER = nullptr;
MIPS_DWORD * CSystemRegisters::_GPR = nullptr;
MIPS_DWORD * CSystemRegisters::_FPR = nullptr;
uint32_t * CSystemRegisters::_CP0 = nullptr;
uint64_t * CSystemRegisters::_CP0 = nullptr;
MIPS_DWORD * CSystemRegisters::_RegHI = nullptr;
MIPS_DWORD * CSystemRegisters::_RegLO = nullptr;
float ** CSystemRegisters::_FPR_S;
@ -231,7 +231,7 @@ uint32_t * CSystemRegisters::_FPCR = nullptr;
uint32_t * CSystemRegisters::_LLBit = nullptr;
int32_t * CSystemRegisters::_RoundingModel = nullptr;
CP0registers::CP0registers(uint32_t * _CP0) :
CP0registers::CP0registers(uint64_t * _CP0) :
INDEX_REGISTER(_CP0[0]),
RANDOM_REGISTER(_CP0[1]),
ENTRYLO0_REGISTER(_CP0[2]),
@ -333,6 +333,109 @@ void CRegisters::SetAsCurrentSystem()
_RoundingModel = &m_RoundingModel;
}
uint64_t CRegisters::Cop0_MF(uint32_t Reg)
{
if (LogCP0reads() && Reg <= 0x1F)
{
LogMessage("%08X: R4300i read from %s (0x%08X)", (*_PROGRAM_COUNTER), CRegName::Cop0[Reg], m_CP0[Reg]);
}
if (Reg == 9)
{
g_SystemTimer->UpdateTimers();
}
return Reg <= 0x1F ? m_CP0[Reg] : 0;
}
void CRegisters::Cop0_MT(uint32_t Reg, uint64_t Value)
{
if (LogCP0changes() && Reg <= 0x1F)
{
LogMessage("%08X: Writing 0x%I64U to %s register (originally: 0x%I64U)", (*_PROGRAM_COUNTER), Value, CRegName::Cop0[Reg], m_CP0[Reg]);
if (Reg == 11) // Compare
{
LogMessage("%08X: Cause register changed from %08X to %08X", (*_PROGRAM_COUNTER), CAUSE_REGISTER, (g_Reg->CAUSE_REGISTER & ~CAUSE_IP7));
}
}
switch (Reg)
{
case 0: // Index
case 2: // EntryLo0
case 3: // EntryLo1
case 5: // PageMask
case 7: // Reg7
case 8: // BadVaddr
case 10: // Entry Hi
case 14: // EPC
case 15: // PRId
case 16: // Config
case 17: // LLAdrr
case 18: // WatchLo
case 19: // WatchHi
case 20: // XContext
case 21: // Reg21
case 22: // Reg22
case 23: // Reg23
case 24: // Reg24
case 25: // Reg25
case 26: // ECC
case 27: // CacheErr
case 28: // Tag lo
case 29: // Tag Hi
case 30: // ErrEPC
case 31: // Reg31
m_CP0[Reg] = Value;
break;
case 6: // Wired
g_SystemTimer->UpdateTimers();
m_CP0[Reg] = Value;
break;
case 4: // Context
m_CP0[Reg] = Value & 0xFF800000;
break;
case 9: // Count
g_SystemTimer->UpdateTimers();
m_CP0[Reg] = Value;
g_SystemTimer->UpdateCompareTimer();
break;
case 11: // Compare
g_SystemTimer->UpdateTimers();
m_CP0[Reg] = Value;
FAKE_CAUSE_REGISTER &= ~CAUSE_IP7;
g_SystemTimer->UpdateCompareTimer();
break;
case 12: // Status
if ((m_CP0[Reg] & STATUS_FR) != (Value & STATUS_FR))
{
m_CP0[Reg] = Value;
FixFpuLocations();
}
else
{
m_CP0[Reg] = Value;
}
if ((m_CP0[Reg] & 0x18) != 0 && HaveDebugger())
{
g_Notify->DisplayError("Left kernel mode ??");
}
CheckInterrupts();
break;
case 13: // Cause
m_CP0[Reg] &= 0xFFFFCFF;
if ((Value & 0x300) != 0 && HaveDebugger())
{
g_Notify->DisplayError("Set IP0 or IP1");
}
break;
default:
if (HaveDebugger())
{
g_Notify->BreakPoint(__FILE__, __LINE__);
}
}
}
void CRegisters::CheckInterrupts()
{
uint32_t mi_intr_reg = MI_INTR_REG, status_register;
@ -352,7 +455,7 @@ void CRegisters::CheckInterrupts()
FAKE_CAUSE_REGISTER &= ~CAUSE_IP2;
}
MI_INTR_REG = mi_intr_reg;
status_register = STATUS_REGISTER;
status_register = (uint32_t)STATUS_REGISTER;
if ((status_register & STATUS_IE) == 0)
{

49
Source/Project64-core/N64System/Mips/Register.h
View File

@ -20,29 +20,29 @@
class CP0registers
{
protected:
CP0registers (uint32_t * _CP0);
CP0registers (uint64_t * _CP0);
public:
uint32_t & INDEX_REGISTER;
uint32_t & RANDOM_REGISTER;
uint32_t & ENTRYLO0_REGISTER;
uint32_t & ENTRYLO1_REGISTER;
uint32_t & CONTEXT_REGISTER;
uint32_t & PAGE_MASK_REGISTER;
uint32_t & WIRED_REGISTER;
uint32_t & BAD_VADDR_REGISTER;
uint32_t & COUNT_REGISTER;
uint32_t & ENTRYHI_REGISTER;
uint32_t & COMPARE_REGISTER;
uint32_t & STATUS_REGISTER;
uint32_t & CAUSE_REGISTER;
uint32_t & EPC_REGISTER;
uint32_t & PREVID_REGISTER;
uint32_t & CONFIG_REGISTER;
uint32_t & TAGLO_REGISTER;
uint32_t & TAGHI_REGISTER;
uint32_t & ERROREPC_REGISTER;
uint32_t & FAKE_CAUSE_REGISTER;
uint64_t & INDEX_REGISTER;
uint64_t & RANDOM_REGISTER;
uint64_t & ENTRYLO0_REGISTER;
uint64_t & ENTRYLO1_REGISTER;
uint64_t & CONTEXT_REGISTER;
uint64_t & PAGE_MASK_REGISTER;
uint64_t & WIRED_REGISTER;
uint64_t & BAD_VADDR_REGISTER;
uint64_t & COUNT_REGISTER;
uint64_t & ENTRYHI_REGISTER;
uint64_t & COMPARE_REGISTER;
uint64_t & STATUS_REGISTER;
uint64_t & CAUSE_REGISTER;
uint64_t & EPC_REGISTER;
uint64_t & PREVID_REGISTER;
uint64_t & CONFIG_REGISTER;
uint64_t & TAGLO_REGISTER;
uint64_t & TAGHI_REGISTER;
uint64_t & ERROREPC_REGISTER;
uint64_t & FAKE_CAUSE_REGISTER;
private:
CP0registers();
@ -230,7 +230,7 @@ protected:
static uint32_t * _PROGRAM_COUNTER;
static MIPS_DWORD * _GPR;
static MIPS_DWORD * _FPR;
static uint32_t * _CP0;
static uint64_t * _CP0;
static MIPS_DWORD * _RegHI;
static MIPS_DWORD * _RegLO;
static float ** _FPR_S;
@ -278,10 +278,13 @@ public:
void Reset();
void SetAsCurrentSystem();
uint64_t Cop0_MF(uint32_t Reg);
void Cop0_MT(uint32_t Reg, uint64_t Value);
// General registers
uint32_t m_PROGRAM_COUNTER;
MIPS_DWORD m_GPR[32];
uint32_t m_CP0[33];
uint64_t m_CP0[33];
MIPS_DWORD m_HI;
MIPS_DWORD m_LO;
uint32_t m_LLBit;

6
Source/Project64-core/N64System/Mips/SystemTiming.cpp
View File

@ -164,8 +164,8 @@ void CSystemTimer::UpdateTimers()
int32_t random, wired;
m_LastUpdate = m_NextTimer;
m_Reg.COUNT_REGISTER += TimeTaken;
random = m_Reg.RANDOM_REGISTER - ((TimeTaken * CGameSettings::OverClockModifier()) / m_System.CountPerOp());
wired = m_Reg.WIRED_REGISTER;
random = (uint32_t)m_Reg.RANDOM_REGISTER - ((TimeTaken * CGameSettings::OverClockModifier()) / m_System.CountPerOp());
wired = (uint32_t)m_Reg.WIRED_REGISTER;
if (random < wired)
{
if (wired == 0)
@ -280,7 +280,7 @@ void CSystemTimer::TimerDone()
void CSystemTimer::SetCompareTimer()
{
uint32_t NextCompare = 0x7FFFFFFF;
NextCompare = m_Reg.COMPARE_REGISTER - m_Reg.COUNT_REGISTER;
NextCompare = (uint32_t)m_Reg.COMPARE_REGISTER - (uint32_t)m_Reg.COUNT_REGISTER;
if ((NextCompare & 0x80000000) != 0)
{
NextCompare = 0x7FFFFFFF;

8
Source/Project64-core/N64System/Mips/TLB.cpp
View File

@ -165,10 +165,10 @@ void CTLB::WriteEntry(int index, bool Random)
}
// Fill in m_tlb entry
m_tlb[index].PageMask.Value = g_Reg->PAGE_MASK_REGISTER;
m_tlb[index].EntryHi.Value = g_Reg->ENTRYHI_REGISTER;
m_tlb[index].EntryLo0.Value = g_Reg->ENTRYLO0_REGISTER;
m_tlb[index].EntryLo1.Value = g_Reg->ENTRYLO1_REGISTER;
m_tlb[index].PageMask.Value = (uint32_t)g_Reg->PAGE_MASK_REGISTER;
m_tlb[index].EntryHi.Value = (uint32_t)g_Reg->ENTRYHI_REGISTER;
m_tlb[index].EntryLo0.Value = (uint32_t)g_Reg->ENTRYLO0_REGISTER;
m_tlb[index].EntryLo1.Value = (uint32_t)g_Reg->ENTRYLO1_REGISTER;
m_tlb[index].EntryDefined = true;
SetupTLB_Entry(index, Random);
m_CB->TLB_Changed();

4
Source/Project64-core/N64System/N64System.cpp
View File

@ -935,7 +935,7 @@ void CN64System::Reset(bool bInitReg, bool ClearMenory)
}
m_SystemTimer.Reset();
m_SystemTimer.SetTimer(CSystemTimer::CompareTimer, m_Reg.COMPARE_REGISTER - m_Reg.COUNT_REGISTER, false);
m_SystemTimer.SetTimer(CSystemTimer::CompareTimer, (uint32_t)m_Reg.COMPARE_REGISTER - (uint32_t)m_Reg.COUNT_REGISTER, false);
if (m_Recomp)
{
@ -2265,7 +2265,7 @@ bool CN64System::LoadState(const char * FileName)
m_Reg.RANDOM_REGISTER += 32 - m_Reg.WIRED_REGISTER;
}
// Fix up timer
m_SystemTimer.SetTimer(CSystemTimer::CompareTimer, m_Reg.COMPARE_REGISTER - m_Reg.COUNT_REGISTER, false);
m_SystemTimer.SetTimer(CSystemTimer::CompareTimer, (uint32_t)m_Reg.COMPARE_REGISTER - (uint32_t)m_Reg.COUNT_REGISTER, false);
m_SystemTimer.SetTimer(CSystemTimer::ViTimer, NextVITimer, false);
m_Reg.FixFpuLocations();
m_TLB.Reset(false);

4
Source/Project64-core/N64System/Recompiler/x86/x86RecompilerOps.cpp
View File

@ -7362,12 +7362,12 @@ void x86_compiler_COP0_CO_ERET()
{
if ((g_Reg->STATUS_REGISTER & STATUS_ERL) != 0)
{
g_Reg->m_PROGRAM_COUNTER = g_Reg->ERROREPC_REGISTER;
g_Reg->m_PROGRAM_COUNTER = (uint32_t)g_Reg->ERROREPC_REGISTER;
g_Reg->STATUS_REGISTER &= ~STATUS_ERL;
}
else
{
g_Reg->m_PROGRAM_COUNTER = g_Reg->EPC_REGISTER;
g_Reg->m_PROGRAM_COUNTER = (uint32_t)g_Reg->EPC_REGISTER;
g_Reg->STATUS_REGISTER &= ~STATUS_EXL;
}
g_Reg->m_LLBit = 0;

40
Source/Project64/UserInterface/Debugger/Debugger-RegisterTabs.cpp
View File

@ -131,28 +131,28 @@ void CRegisterTabs::RefreshEdits()
m_FCSREdit.SetValue(g_Reg->m_FPCR[31], DisplayMode::ZeroExtend);
m_COP0Edits[0].SetValue(g_Reg->INDEX_REGISTER, DisplayMode::ZeroExtend);
m_COP0Edits[1].SetValue(g_Reg->RANDOM_REGISTER, DisplayMode::ZeroExtend);
m_COP0Edits[2].SetValue(g_Reg->ENTRYLO0_REGISTER, DisplayMode::ZeroExtend);
m_COP0Edits[3].SetValue(g_Reg->ENTRYLO1_REGISTER, DisplayMode::ZeroExtend);
m_COP0Edits[4].SetValue(g_Reg->CONTEXT_REGISTER, DisplayMode::ZeroExtend);
m_COP0Edits[5].SetValue(g_Reg->PAGE_MASK_REGISTER, DisplayMode::ZeroExtend);
m_COP0Edits[6].SetValue(g_Reg->WIRED_REGISTER, DisplayMode::ZeroExtend);
m_COP0Edits[7].SetValue(g_Reg->BAD_VADDR_REGISTER, DisplayMode::ZeroExtend);
m_COP0Edits[8].SetValue(g_Reg->COUNT_REGISTER, DisplayMode::ZeroExtend);
m_COP0Edits[9].SetValue(g_Reg->ENTRYHI_REGISTER, DisplayMode::ZeroExtend);
m_COP0Edits[10].SetValue(g_Reg->COMPARE_REGISTER, DisplayMode::ZeroExtend);
m_COP0Edits[11].SetValue(g_Reg->STATUS_REGISTER, DisplayMode::ZeroExtend);
m_COP0Edits[12].SetValue(g_Reg->CAUSE_REGISTER, DisplayMode::ZeroExtend);
m_COP0Edits[13].SetValue(g_Reg->EPC_REGISTER, DisplayMode::ZeroExtend);
m_COP0Edits[14].SetValue(g_Reg->CONFIG_REGISTER, DisplayMode::ZeroExtend);
m_COP0Edits[15].SetValue(g_Reg->TAGLO_REGISTER, DisplayMode::ZeroExtend);
m_COP0Edits[16].SetValue(g_Reg->TAGHI_REGISTER, DisplayMode::ZeroExtend);
m_COP0Edits[17].SetValue(g_Reg->ERROREPC_REGISTER, DisplayMode::ZeroExtend);
m_COP0Edits[18].SetValue(g_Reg->FAKE_CAUSE_REGISTER, DisplayMode::ZeroExtend);
m_COP0Edits[0].SetValue((uint32_t)g_Reg->INDEX_REGISTER, DisplayMode::ZeroExtend);
m_COP0Edits[1].SetValue((uint32_t)g_Reg->RANDOM_REGISTER, DisplayMode::ZeroExtend);
m_COP0Edits[2].SetValue((uint32_t)g_Reg->ENTRYLO0_REGISTER, DisplayMode::ZeroExtend);
m_COP0Edits[3].SetValue((uint32_t)g_Reg->ENTRYLO1_REGISTER, DisplayMode::ZeroExtend);
m_COP0Edits[4].SetValue((uint32_t)g_Reg->CONTEXT_REGISTER, DisplayMode::ZeroExtend);
m_COP0Edits[5].SetValue((uint32_t)g_Reg->PAGE_MASK_REGISTER, DisplayMode::ZeroExtend);
m_COP0Edits[6].SetValue((uint32_t)g_Reg->WIRED_REGISTER, DisplayMode::ZeroExtend);
m_COP0Edits[7].SetValue((uint32_t)g_Reg->BAD_VADDR_REGISTER, DisplayMode::ZeroExtend);
m_COP0Edits[8].SetValue((uint32_t)g_Reg->COUNT_REGISTER, DisplayMode::ZeroExtend);
m_COP0Edits[9].SetValue((uint32_t)g_Reg->ENTRYHI_REGISTER, DisplayMode::ZeroExtend);
m_COP0Edits[10].SetValue((uint32_t)g_Reg->COMPARE_REGISTER, DisplayMode::ZeroExtend);
m_COP0Edits[11].SetValue((uint32_t)g_Reg->STATUS_REGISTER, DisplayMode::ZeroExtend);
m_COP0Edits[12].SetValue((uint32_t)g_Reg->CAUSE_REGISTER, DisplayMode::ZeroExtend);
m_COP0Edits[13].SetValue((uint32_t)g_Reg->EPC_REGISTER, DisplayMode::ZeroExtend);
m_COP0Edits[14].SetValue((uint32_t)g_Reg->CONFIG_REGISTER, DisplayMode::ZeroExtend);
m_COP0Edits[15].SetValue((uint32_t)g_Reg->TAGLO_REGISTER, DisplayMode::ZeroExtend);
m_COP0Edits[16].SetValue((uint32_t)g_Reg->TAGHI_REGISTER, DisplayMode::ZeroExtend);
m_COP0Edits[17].SetValue((uint32_t)g_Reg->ERROREPC_REGISTER, DisplayMode::ZeroExtend);
m_COP0Edits[18].SetValue((uint32_t)g_Reg->FAKE_CAUSE_REGISTER, DisplayMode::ZeroExtend);
CAUSE cause;
cause.intval = g_Reg->CAUSE_REGISTER;
cause.intval = (uint32_t)g_Reg->CAUSE_REGISTER;
const char* szExceptionCode = ExceptionCodes[cause.exceptionCode];
m_CauseTip.SetWindowText(stdstr(szExceptionCode).ToUTF16().c_str());

38
Source/Project64/UserInterface/Debugger/ScriptAPI/ScriptAPI_cpu.cpp
View File

@ -160,7 +160,7 @@ duk_ret_t ScriptAPI::js_cpu_cop0_get(duk_context* ctx)
if (strcmp(name, "cause") == 0)
{
duk_push_uint(ctx, g_Reg->FAKE_CAUSE_REGISTER | g_Reg->CAUSE_REGISTER);
duk_push_uint(ctx, (uint32_t)(g_Reg->FAKE_CAUSE_REGISTER | g_Reg->CAUSE_REGISTER));
return 1;
}
@ -414,24 +414,24 @@ static uint32_t* COP0RegPtr(const char *regName)
const char* name;
uint32_t *ptr;
} names[] = {
{ "index", &g_Reg->INDEX_REGISTER },
{ "random", &g_Reg->RANDOM_REGISTER },
{ "entrylo0", &g_Reg->ENTRYLO0_REGISTER },
{ "entrylo1", &g_Reg->ENTRYLO1_REGISTER },
{ "context", &g_Reg->CONTEXT_REGISTER },
{ "pagemask", &g_Reg->PAGE_MASK_REGISTER },
{ "wired", &g_Reg->WIRED_REGISTER },
{ "badvaddr", &g_Reg->BAD_VADDR_REGISTER },
{ "count", &g_Reg->COUNT_REGISTER },
{ "entryhi", &g_Reg->ENTRYHI_REGISTER },
{ "compare", &g_Reg->COMPARE_REGISTER },
{ "status", &g_Reg->STATUS_REGISTER },
//{ "cause", &g_Reg->CAUSE_REGISTER },
{ "epc", &g_Reg->EPC_REGISTER },
{ "config", &g_Reg->CONFIG_REGISTER },
{ "taglo", &g_Reg->TAGLO_REGISTER },
{ "taghi", &g_Reg->TAGHI_REGISTER },
{ "errorepc", &g_Reg->ERROREPC_REGISTER },
{ "index", (uint32_t*)&g_Reg->INDEX_REGISTER },
{ "random", (uint32_t*)&g_Reg->RANDOM_REGISTER },
{ "entrylo0", (uint32_t*)&g_Reg->ENTRYLO0_REGISTER },
{ "entrylo1", (uint32_t*)&g_Reg->ENTRYLO1_REGISTER },
{ "context", (uint32_t*)&g_Reg->CONTEXT_REGISTER },
{ "pagemask", (uint32_t*)&g_Reg->PAGE_MASK_REGISTER },
{ "wired", (uint32_t*)&g_Reg->WIRED_REGISTER },
{ "badvaddr", (uint32_t*)&g_Reg->BAD_VADDR_REGISTER },
{ "count", (uint32_t*)&g_Reg->COUNT_REGISTER },
{ "entryhi", (uint32_t*)&g_Reg->ENTRYHI_REGISTER },
{ "compare", (uint32_t*)&g_Reg->COMPARE_REGISTER },
{ "status", (uint32_t*)&g_Reg->STATUS_REGISTER },
//{ "cause", (uint32_t*)&g_Reg->CAUSE_REGISTER },
{ "epc", (uint32_t*)&g_Reg->EPC_REGISTER },
{ "config", (uint32_t*)&g_Reg->CONFIG_REGISTER },
{ "taglo", (uint32_t*)&g_Reg->TAGLO_REGISTER },
{ "taghi",(uint32_t*)&g_Reg->TAGHI_REGISTER },
{ "errorepc", (uint32_t*)&g_Reg->ERROREPC_REGISTER },
{ nullptr, nullptr }
};